1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 88, 92-96, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
27 #include "insn-flags.h"
28 #include "insn-codes.h"
30 #include "insn-config.h"
35 /* Each optab contains info on how this target machine
36 can perform a particular operation
37 for all sizes and kinds of operands.
39 The operation to be performed is often specified
40 by passing one of these optabs as an argument.
42 See expr.h for documentation of these optabs. */
47 optab smul_highpart_optab
;
48 optab umul_highpart_optab
;
49 optab smul_widen_optab
;
50 optab umul_widen_optab
;
73 optab movstrict_optab
;
84 optab ucmp_optab
; /* Used only for libcalls for unsigned comparisons. */
89 /* Tables of patterns for extending one integer mode to another. */
90 enum insn_code extendtab
[MAX_MACHINE_MODE
][MAX_MACHINE_MODE
][2];
92 /* Tables of patterns for converting between fixed and floating point. */
93 enum insn_code fixtab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
94 enum insn_code fixtrunctab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
95 enum insn_code floattab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
97 /* Contains the optab used for each rtx code. */
98 optab code_to_optab
[NUM_RTX_CODE
+ 1];
100 /* SYMBOL_REF rtx's for the library functions that are called
101 implicitly and not via optabs. */
103 rtx extendsfdf2_libfunc
;
104 rtx extendsfxf2_libfunc
;
105 rtx extendsftf2_libfunc
;
106 rtx extenddfxf2_libfunc
;
107 rtx extenddftf2_libfunc
;
109 rtx truncdfsf2_libfunc
;
110 rtx truncxfsf2_libfunc
;
111 rtx trunctfsf2_libfunc
;
112 rtx truncxfdf2_libfunc
;
113 rtx trunctfdf2_libfunc
;
124 rtx sjpopnthrow_libfunc
;
125 rtx terminate_libfunc
;
164 rtx floatsisf_libfunc
;
165 rtx floatdisf_libfunc
;
166 rtx floattisf_libfunc
;
168 rtx floatsidf_libfunc
;
169 rtx floatdidf_libfunc
;
170 rtx floattidf_libfunc
;
172 rtx floatsixf_libfunc
;
173 rtx floatdixf_libfunc
;
174 rtx floattixf_libfunc
;
176 rtx floatsitf_libfunc
;
177 rtx floatditf_libfunc
;
178 rtx floattitf_libfunc
;
196 rtx fixunssfsi_libfunc
;
197 rtx fixunssfdi_libfunc
;
198 rtx fixunssfti_libfunc
;
200 rtx fixunsdfsi_libfunc
;
201 rtx fixunsdfdi_libfunc
;
202 rtx fixunsdfti_libfunc
;
204 rtx fixunsxfsi_libfunc
;
205 rtx fixunsxfdi_libfunc
;
206 rtx fixunsxfti_libfunc
;
208 rtx fixunstfsi_libfunc
;
209 rtx fixunstfdi_libfunc
;
210 rtx fixunstfti_libfunc
;
212 rtx chkr_check_addr_libfunc
;
213 rtx chkr_set_right_libfunc
;
214 rtx chkr_copy_bitmap_libfunc
;
215 rtx chkr_check_exec_libfunc
;
216 rtx chkr_check_str_libfunc
;
218 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
219 gives the gen_function to make a branch to test that condition. */
221 rtxfun bcc_gen_fctn
[NUM_RTX_CODE
];
223 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
224 gives the insn code to make a store-condition insn
225 to test that condition. */
227 enum insn_code setcc_gen_code
[NUM_RTX_CODE
];
229 #ifdef HAVE_conditional_move
230 /* Indexed by the machine mode, gives the insn code to make a conditional
231 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
232 setcc_gen_code to cut down on the number of named patterns. Consider a day
233 when a lot more rtx codes are conditional (eg: for the ARM). */
235 enum insn_code movcc_gen_code
[NUM_MACHINE_MODES
];
238 static int add_equal_note
PROTO((rtx
, rtx
, enum rtx_code
, rtx
, rtx
));
239 static rtx widen_operand
PROTO((rtx
, enum machine_mode
,
240 enum machine_mode
, int, int));
241 static enum insn_code can_fix_p
PROTO((enum machine_mode
, enum machine_mode
,
243 static enum insn_code can_float_p
PROTO((enum machine_mode
, enum machine_mode
,
245 static rtx ftruncify
PROTO((rtx
));
246 static optab init_optab
PROTO((enum rtx_code
));
247 static void init_libfuncs
PROTO((optab
, int, int, char *, int));
248 static void init_integral_libfuncs
PROTO((optab
, char *, int));
249 static void init_floating_libfuncs
PROTO((optab
, char *, int));
251 /* Add a REG_EQUAL note to the last insn in SEQ. TARGET is being set to
252 the result of operation CODE applied to OP0 (and OP1 if it is a binary
255 If the last insn does not set TARGET, don't do anything, but return 1.
257 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
258 don't add the REG_EQUAL note but return 0. Our caller can then try
259 again, ensuring that TARGET is not one of the operands. */
262 add_equal_note (seq
, target
, code
, op0
, op1
)
272 if ((GET_RTX_CLASS (code
) != '1' && GET_RTX_CLASS (code
) != '2'
273 && GET_RTX_CLASS (code
) != 'c' && GET_RTX_CLASS (code
) != '<')
274 || GET_CODE (seq
) != SEQUENCE
275 || (set
= single_set (XVECEXP (seq
, 0, XVECLEN (seq
, 0) - 1))) == 0
276 || GET_CODE (target
) == ZERO_EXTRACT
277 || (! rtx_equal_p (SET_DEST (set
), target
)
278 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the
280 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
281 || ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set
), 0)),
285 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
286 besides the last insn. */
287 if (reg_overlap_mentioned_p (target
, op0
)
288 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
289 for (i
= XVECLEN (seq
, 0) - 2; i
>= 0; i
--)
290 if (reg_set_p (target
, XVECEXP (seq
, 0, i
)))
293 if (GET_RTX_CLASS (code
) == '1')
294 note
= gen_rtx (code
, GET_MODE (target
), copy_rtx (op0
));
296 note
= gen_rtx (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
298 REG_NOTES (XVECEXP (seq
, 0, XVECLEN (seq
, 0) - 1))
299 = gen_rtx (EXPR_LIST
, REG_EQUAL
, note
,
300 REG_NOTES (XVECEXP (seq
, 0, XVECLEN (seq
, 0) - 1)));
305 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
306 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
307 not actually do a sign-extend or zero-extend, but can leave the
308 higher-order bits of the result rtx undefined, for example, in the case
309 of logical operations, but not right shifts. */
312 widen_operand (op
, mode
, oldmode
, unsignedp
, no_extend
)
314 enum machine_mode mode
, oldmode
;
320 /* If we must extend do so. If OP is either a constant or a SUBREG
321 for a promoted object, also extend since it will be more efficient to
324 || GET_MODE (op
) == VOIDmode
325 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)))
326 return convert_modes (mode
, oldmode
, op
, unsignedp
);
328 /* If MODE is no wider than a single word, we return a paradoxical
330 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
331 return gen_rtx (SUBREG
, mode
, force_reg (GET_MODE (op
), op
), 0);
333 /* Otherwise, get an object of MODE, clobber it, and set the low-order
336 result
= gen_reg_rtx (mode
);
337 emit_insn (gen_rtx (CLOBBER
, VOIDmode
, result
));
338 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
342 /* Generate code to perform an operation specified by BINOPTAB
343 on operands OP0 and OP1, with result having machine-mode MODE.
345 UNSIGNEDP is for the case where we have to widen the operands
346 to perform the operation. It says to use zero-extension.
348 If TARGET is nonzero, the value
349 is generated there, if it is convenient to do so.
350 In all cases an rtx is returned for the locus of the value;
351 this may or may not be TARGET. */
354 expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
)
355 enum machine_mode mode
;
360 enum optab_methods methods
;
362 enum optab_methods next_methods
363 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
364 ? OPTAB_WIDEN
: methods
);
365 enum mode_class
class;
366 enum machine_mode wider_mode
;
368 int commutative_op
= 0;
369 int shift_op
= (binoptab
->code
== ASHIFT
370 || binoptab
->code
== ASHIFTRT
371 || binoptab
->code
== LSHIFTRT
372 || binoptab
->code
== ROTATE
373 || binoptab
->code
== ROTATERT
);
374 rtx entry_last
= get_last_insn ();
377 class = GET_MODE_CLASS (mode
);
379 op0
= protect_from_queue (op0
, 0);
380 op1
= protect_from_queue (op1
, 0);
382 target
= protect_from_queue (target
, 1);
386 op0
= force_not_mem (op0
);
387 op1
= force_not_mem (op1
);
390 /* If subtracting an integer constant, convert this into an addition of
391 the negated constant. */
393 if (binoptab
== sub_optab
&& GET_CODE (op1
) == CONST_INT
)
395 op1
= negate_rtx (mode
, op1
);
396 binoptab
= add_optab
;
399 /* If we are inside an appropriately-short loop and one operand is an
400 expensive constant, force it into a register. */
401 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
402 && rtx_cost (op0
, binoptab
->code
) > 2)
403 op0
= force_reg (mode
, op0
);
405 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
406 && ! shift_op
&& rtx_cost (op1
, binoptab
->code
) > 2)
407 op1
= force_reg (mode
, op1
);
409 /* Record where to delete back to if we backtrack. */
410 last
= get_last_insn ();
412 /* If operation is commutative,
413 try to make the first operand a register.
414 Even better, try to make it the same as the target.
415 Also try to make the last operand a constant. */
416 if (GET_RTX_CLASS (binoptab
->code
) == 'c'
417 || binoptab
== smul_widen_optab
418 || binoptab
== umul_widen_optab
419 || binoptab
== smul_highpart_optab
420 || binoptab
== umul_highpart_optab
)
424 if (((target
== 0 || GET_CODE (target
) == REG
)
425 ? ((GET_CODE (op1
) == REG
426 && GET_CODE (op0
) != REG
)
428 : rtx_equal_p (op1
, target
))
429 || GET_CODE (op0
) == CONST_INT
)
437 /* If we can do it with a three-operand insn, do so. */
439 if (methods
!= OPTAB_MUST_WIDEN
440 && binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
442 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
443 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
444 enum machine_mode mode1
= insn_operand_mode
[icode
][2];
446 rtx xop0
= op0
, xop1
= op1
;
451 temp
= gen_reg_rtx (mode
);
453 /* If it is a commutative operator and the modes would match
454 if we would swap the operands, we can save the conversions. */
457 if (GET_MODE (op0
) != mode0
&& GET_MODE (op1
) != mode1
458 && GET_MODE (op0
) == mode1
&& GET_MODE (op1
) == mode0
)
462 tmp
= op0
; op0
= op1
; op1
= tmp
;
463 tmp
= xop0
; xop0
= xop1
; xop1
= tmp
;
467 /* In case the insn wants input operands in modes different from
468 the result, convert the operands. */
470 if (GET_MODE (op0
) != VOIDmode
471 && GET_MODE (op0
) != mode0
472 && mode0
!= VOIDmode
)
473 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
475 if (GET_MODE (xop1
) != VOIDmode
476 && GET_MODE (xop1
) != mode1
477 && mode1
!= VOIDmode
)
478 xop1
= convert_to_mode (mode1
, xop1
, unsignedp
);
480 /* Now, if insn's predicates don't allow our operands, put them into
483 if (! (*insn_operand_predicate
[icode
][1]) (xop0
, mode0
)
484 && mode0
!= VOIDmode
)
485 xop0
= copy_to_mode_reg (mode0
, xop0
);
487 if (! (*insn_operand_predicate
[icode
][2]) (xop1
, mode1
)
488 && mode1
!= VOIDmode
)
489 xop1
= copy_to_mode_reg (mode1
, xop1
);
491 if (! (*insn_operand_predicate
[icode
][0]) (temp
, mode
))
492 temp
= gen_reg_rtx (mode
);
494 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
497 /* If PAT is a multi-insn sequence, try to add an appropriate
498 REG_EQUAL note to it. If we can't because TEMP conflicts with an
499 operand, call ourselves again, this time without a target. */
500 if (GET_CODE (pat
) == SEQUENCE
501 && ! add_equal_note (pat
, temp
, binoptab
->code
, xop0
, xop1
))
503 delete_insns_since (last
);
504 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
512 delete_insns_since (last
);
515 /* If this is a multiply, see if we can do a widening operation that
516 takes operands of this mode and makes a wider mode. */
518 if (binoptab
== smul_optab
&& GET_MODE_WIDER_MODE (mode
) != VOIDmode
519 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
520 ->handlers
[(int) GET_MODE_WIDER_MODE (mode
)].insn_code
)
521 != CODE_FOR_nothing
))
523 temp
= expand_binop (GET_MODE_WIDER_MODE (mode
),
524 unsignedp
? umul_widen_optab
: smul_widen_optab
,
525 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
529 if (GET_MODE_CLASS (mode
) == MODE_INT
)
530 return gen_lowpart (mode
, temp
);
532 return convert_to_mode (mode
, temp
, unsignedp
);
536 /* Look for a wider mode of the same class for which we think we
537 can open-code the operation. Check for a widening multiply at the
538 wider mode as well. */
540 if ((class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
541 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
542 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
543 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
545 if (binoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
546 || (binoptab
== smul_optab
547 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
548 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
549 ->handlers
[(int) GET_MODE_WIDER_MODE (wider_mode
)].insn_code
)
550 != CODE_FOR_nothing
)))
552 rtx xop0
= op0
, xop1
= op1
;
555 /* For certain integer operations, we need not actually extend
556 the narrow operands, as long as we will truncate
557 the results to the same narrowness. */
559 if ((binoptab
== ior_optab
|| binoptab
== and_optab
560 || binoptab
== xor_optab
561 || binoptab
== add_optab
|| binoptab
== sub_optab
562 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
563 && class == MODE_INT
)
566 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
568 /* The second operand of a shift must always be extended. */
569 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
570 no_extend
&& binoptab
!= ashl_optab
);
572 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
573 unsignedp
, OPTAB_DIRECT
);
576 if (class != MODE_INT
)
579 target
= gen_reg_rtx (mode
);
580 convert_move (target
, temp
, 0);
584 return gen_lowpart (mode
, temp
);
587 delete_insns_since (last
);
591 /* These can be done a word at a time. */
592 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
594 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
595 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
601 /* If TARGET is the same as one of the operands, the REG_EQUAL note
602 won't be accurate, so use a new target. */
603 if (target
== 0 || target
== op0
|| target
== op1
)
604 target
= gen_reg_rtx (mode
);
608 /* Do the actual arithmetic. */
609 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
611 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
612 rtx x
= expand_binop (word_mode
, binoptab
,
613 operand_subword_force (op0
, i
, mode
),
614 operand_subword_force (op1
, i
, mode
),
615 target_piece
, unsignedp
, next_methods
);
620 if (target_piece
!= x
)
621 emit_move_insn (target_piece
, x
);
624 insns
= get_insns ();
627 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
629 if (binoptab
->code
!= UNKNOWN
)
631 = gen_rtx (binoptab
->code
, mode
, copy_rtx (op0
), copy_rtx (op1
));
635 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
640 /* Synthesize double word shifts from single word shifts. */
641 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
642 || binoptab
== ashr_optab
)
644 && GET_CODE (op1
) == CONST_INT
645 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
646 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
647 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
648 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
650 rtx insns
, inter
, equiv_value
;
651 rtx into_target
, outof_target
;
652 rtx into_input
, outof_input
;
653 int shift_count
, left_shift
, outof_word
;
655 /* If TARGET is the same as one of the operands, the REG_EQUAL note
656 won't be accurate, so use a new target. */
657 if (target
== 0 || target
== op0
|| target
== op1
)
658 target
= gen_reg_rtx (mode
);
662 shift_count
= INTVAL (op1
);
664 /* OUTOF_* is the word we are shifting bits away from, and
665 INTO_* is the word that we are shifting bits towards, thus
666 they differ depending on the direction of the shift and
669 left_shift
= binoptab
== ashl_optab
;
670 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
672 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
673 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
675 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
676 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
678 if (shift_count
>= BITS_PER_WORD
)
680 inter
= expand_binop (word_mode
, binoptab
,
682 GEN_INT (shift_count
- BITS_PER_WORD
),
683 into_target
, unsignedp
, next_methods
);
685 if (inter
!= 0 && inter
!= into_target
)
686 emit_move_insn (into_target
, inter
);
688 /* For a signed right shift, we must fill the word we are shifting
689 out of with copies of the sign bit. Otherwise it is zeroed. */
690 if (inter
!= 0 && binoptab
!= ashr_optab
)
691 inter
= CONST0_RTX (word_mode
);
693 inter
= expand_binop (word_mode
, binoptab
,
695 GEN_INT (BITS_PER_WORD
- 1),
696 outof_target
, unsignedp
, next_methods
);
698 if (inter
!= 0 && inter
!= outof_target
)
699 emit_move_insn (outof_target
, inter
);
704 optab reverse_unsigned_shift
, unsigned_shift
;
706 /* For a shift of less then BITS_PER_WORD, to compute the carry,
707 we must do a logical shift in the opposite direction of the
710 reverse_unsigned_shift
= (left_shift
? lshr_optab
: ashl_optab
);
712 /* For a shift of less than BITS_PER_WORD, to compute the word
713 shifted towards, we need to unsigned shift the orig value of
716 unsigned_shift
= (left_shift
? ashl_optab
: lshr_optab
);
718 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
720 GEN_INT (BITS_PER_WORD
- shift_count
),
721 0, unsignedp
, next_methods
);
726 inter
= expand_binop (word_mode
, unsigned_shift
, into_input
,
727 op1
, 0, unsignedp
, next_methods
);
730 inter
= expand_binop (word_mode
, ior_optab
, carries
, inter
,
731 into_target
, unsignedp
, next_methods
);
733 if (inter
!= 0 && inter
!= into_target
)
734 emit_move_insn (into_target
, inter
);
737 inter
= expand_binop (word_mode
, binoptab
, outof_input
,
738 op1
, outof_target
, unsignedp
, next_methods
);
740 if (inter
!= 0 && inter
!= outof_target
)
741 emit_move_insn (outof_target
, inter
);
744 insns
= get_insns ();
749 if (binoptab
->code
!= UNKNOWN
)
750 equiv_value
= gen_rtx (binoptab
->code
, mode
, op0
, op1
);
754 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
759 /* Synthesize double word rotates from single word shifts. */
760 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
762 && GET_CODE (op1
) == CONST_INT
763 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
764 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
765 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
767 rtx insns
, equiv_value
;
768 rtx into_target
, outof_target
;
769 rtx into_input
, outof_input
;
771 int shift_count
, left_shift
, outof_word
;
773 /* If TARGET is the same as one of the operands, the REG_EQUAL note
774 won't be accurate, so use a new target. */
775 if (target
== 0 || target
== op0
|| target
== op1
)
776 target
= gen_reg_rtx (mode
);
780 shift_count
= INTVAL (op1
);
782 /* OUTOF_* is the word we are shifting bits away from, and
783 INTO_* is the word that we are shifting bits towards, thus
784 they differ depending on the direction of the shift and
787 left_shift
= (binoptab
== rotl_optab
);
788 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
790 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
791 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
793 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
794 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
796 if (shift_count
== BITS_PER_WORD
)
798 /* This is just a word swap. */
799 emit_move_insn (outof_target
, into_input
);
800 emit_move_insn (into_target
, outof_input
);
805 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
806 rtx first_shift_count
, second_shift_count
;
807 optab reverse_unsigned_shift
, unsigned_shift
;
809 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
810 ? lshr_optab
: ashl_optab
);
812 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
813 ? ashl_optab
: lshr_optab
);
815 if (shift_count
> BITS_PER_WORD
)
817 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
818 second_shift_count
= GEN_INT (2*BITS_PER_WORD
- shift_count
);
822 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
823 second_shift_count
= GEN_INT (shift_count
);
826 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
827 outof_input
, first_shift_count
,
828 NULL_RTX
, unsignedp
, next_methods
);
829 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
830 into_input
, second_shift_count
,
831 into_target
, unsignedp
, next_methods
);
833 if (into_temp1
!= 0 && into_temp2
!= 0)
834 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
835 into_target
, unsignedp
, next_methods
);
839 if (inter
!= 0 && inter
!= into_target
)
840 emit_move_insn (into_target
, inter
);
842 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
843 into_input
, first_shift_count
,
844 NULL_RTX
, unsignedp
, next_methods
);
845 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
846 outof_input
, second_shift_count
,
847 outof_target
, unsignedp
, next_methods
);
849 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
850 inter
= expand_binop (word_mode
, ior_optab
,
851 outof_temp1
, outof_temp2
,
852 outof_target
, unsignedp
, next_methods
);
854 if (inter
!= 0 && inter
!= outof_target
)
855 emit_move_insn (outof_target
, inter
);
858 insns
= get_insns ();
863 if (binoptab
->code
!= UNKNOWN
)
864 equiv_value
= gen_rtx (binoptab
->code
, mode
, op0
, op1
);
868 /* We can't make this a no conflict block if this is a word swap,
869 because the word swap case fails if the input and output values
870 are in the same register. */
871 if (shift_count
!= BITS_PER_WORD
)
872 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
881 /* These can be done a word at a time by propagating carries. */
882 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
884 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
885 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
888 rtx carry_tmp
= gen_reg_rtx (word_mode
);
889 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
890 int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
891 rtx carry_in
, carry_out
;
894 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
895 value is one of those, use it. Otherwise, use 1 since it is the
896 one easiest to get. */
897 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
898 int normalizep
= STORE_FLAG_VALUE
;
903 /* Prepare the operands. */
904 xop0
= force_reg (mode
, op0
);
905 xop1
= force_reg (mode
, op1
);
907 if (target
== 0 || GET_CODE (target
) != REG
908 || target
== xop0
|| target
== xop1
)
909 target
= gen_reg_rtx (mode
);
911 /* Indicate for flow that the entire target reg is being set. */
912 if (GET_CODE (target
) == REG
)
913 emit_insn (gen_rtx (CLOBBER
, VOIDmode
, target
));
915 /* Do the actual arithmetic. */
916 for (i
= 0; i
< nwords
; i
++)
918 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
919 rtx target_piece
= operand_subword (target
, index
, 1, mode
);
920 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
921 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
924 /* Main add/subtract of the input operands. */
925 x
= expand_binop (word_mode
, binoptab
,
926 op0_piece
, op1_piece
,
927 target_piece
, unsignedp
, next_methods
);
933 /* Store carry from main add/subtract. */
934 carry_out
= gen_reg_rtx (word_mode
);
935 carry_out
= emit_store_flag_force (carry_out
,
936 (binoptab
== add_optab
939 word_mode
, 1, normalizep
);
944 /* Add/subtract previous carry to main result. */
945 x
= expand_binop (word_mode
,
946 normalizep
== 1 ? binoptab
: otheroptab
,
948 target_piece
, 1, next_methods
);
951 else if (target_piece
!= x
)
952 emit_move_insn (target_piece
, x
);
956 /* THIS CODE HAS NOT BEEN TESTED. */
957 /* Get out carry from adding/subtracting carry in. */
958 carry_tmp
= emit_store_flag_force (carry_tmp
,
959 binoptab
== add_optab
962 word_mode
, 1, normalizep
);
964 /* Logical-ior the two poss. carry together. */
965 carry_out
= expand_binop (word_mode
, ior_optab
,
966 carry_out
, carry_tmp
,
967 carry_out
, 0, next_methods
);
973 carry_in
= carry_out
;
976 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
978 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
980 rtx temp
= emit_move_insn (target
, target
);
982 REG_NOTES (temp
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
983 gen_rtx (binoptab
->code
, mode
,
991 delete_insns_since (last
);
994 /* If we want to multiply two two-word values and have normal and widening
995 multiplies of single-word values, we can do this with three smaller
996 multiplications. Note that we do not make a REG_NO_CONFLICT block here
997 because we are not operating on one word at a time.
999 The multiplication proceeds as follows:
1000 _______________________
1001 [__op0_high_|__op0_low__]
1002 _______________________
1003 * [__op1_high_|__op1_low__]
1004 _______________________________________________
1005 _______________________
1006 (1) [__op0_low__*__op1_low__]
1007 _______________________
1008 (2a) [__op0_low__*__op1_high_]
1009 _______________________
1010 (2b) [__op0_high_*__op1_low__]
1011 _______________________
1012 (3) [__op0_high_*__op1_high_]
1015 This gives a 4-word result. Since we are only interested in the
1016 lower 2 words, partial result (3) and the upper words of (2a) and
1017 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1018 calculated using non-widening multiplication.
1020 (1), however, needs to be calculated with an unsigned widening
1021 multiplication. If this operation is not directly supported we
1022 try using a signed widening multiplication and adjust the result.
1023 This adjustment works as follows:
1025 If both operands are positive then no adjustment is needed.
1027 If the operands have different signs, for example op0_low < 0 and
1028 op1_low >= 0, the instruction treats the most significant bit of
1029 op0_low as a sign bit instead of a bit with significance
1030 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1031 with 2**BITS_PER_WORD - op0_low, and two's complements the
1032 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1035 Similarly, if both operands are negative, we need to add
1036 (op0_low + op1_low) * 2**BITS_PER_WORD.
1038 We use a trick to adjust quickly. We logically shift op0_low right
1039 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1040 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1041 logical shift exists, we do an arithmetic right shift and subtract
1044 if (binoptab
== smul_optab
1045 && class == MODE_INT
1046 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1047 && smul_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1048 && add_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1049 && ((umul_widen_optab
->handlers
[(int) mode
].insn_code
1050 != CODE_FOR_nothing
)
1051 || (smul_widen_optab
->handlers
[(int) mode
].insn_code
1052 != CODE_FOR_nothing
)))
1054 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1055 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1056 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1057 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1058 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1059 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1064 /* If the target is the same as one of the inputs, don't use it. This
1065 prevents problems with the REG_EQUAL note. */
1066 if (target
== op0
|| target
== op1
1067 || (target
!= 0 && GET_CODE (target
) != REG
))
1070 /* Multiply the two lower words to get a double-word product.
1071 If unsigned widening multiplication is available, use that;
1072 otherwise use the signed form and compensate. */
1074 if (umul_widen_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1076 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1077 target
, 1, OPTAB_DIRECT
);
1079 /* If we didn't succeed, delete everything we did so far. */
1081 delete_insns_since (last
);
1083 op0_xhigh
= op0_high
, op1_xhigh
= op1_high
;
1087 && smul_widen_optab
->handlers
[(int) mode
].insn_code
1088 != CODE_FOR_nothing
)
1090 rtx wordm1
= GEN_INT (BITS_PER_WORD
- 1);
1091 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1092 target
, 1, OPTAB_DIRECT
);
1093 op0_xhigh
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1094 NULL_RTX
, 1, next_methods
);
1096 op0_xhigh
= expand_binop (word_mode
, add_optab
, op0_high
,
1097 op0_xhigh
, op0_xhigh
, 0, next_methods
);
1100 op0_xhigh
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1101 NULL_RTX
, 0, next_methods
);
1103 op0_xhigh
= expand_binop (word_mode
, sub_optab
, op0_high
,
1104 op0_xhigh
, op0_xhigh
, 0,
1108 op1_xhigh
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1109 NULL_RTX
, 1, next_methods
);
1111 op1_xhigh
= expand_binop (word_mode
, add_optab
, op1_high
,
1112 op1_xhigh
, op1_xhigh
, 0, next_methods
);
1115 op1_xhigh
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1116 NULL_RTX
, 0, next_methods
);
1118 op1_xhigh
= expand_binop (word_mode
, sub_optab
, op1_high
,
1119 op1_xhigh
, op1_xhigh
, 0,
1124 /* If we have been able to directly compute the product of the
1125 low-order words of the operands and perform any required adjustments
1126 of the operands, we proceed by trying two more multiplications
1127 and then computing the appropriate sum.
1129 We have checked above that the required addition is provided.
1130 Full-word addition will normally always succeed, especially if
1131 it is provided at all, so we don't worry about its failure. The
1132 multiplication may well fail, however, so we do handle that. */
1134 if (product
&& op0_xhigh
&& op1_xhigh
)
1136 rtx product_high
= operand_subword (product
, high
, 1, mode
);
1137 rtx temp
= expand_binop (word_mode
, binoptab
, op0_low
, op1_xhigh
,
1138 NULL_RTX
, 0, OPTAB_DIRECT
);
1141 temp
= expand_binop (word_mode
, add_optab
, temp
, product_high
,
1142 product_high
, 0, next_methods
);
1144 if (temp
!= 0 && temp
!= product_high
)
1145 emit_move_insn (product_high
, temp
);
1148 temp
= expand_binop (word_mode
, binoptab
, op1_low
, op0_xhigh
,
1149 NULL_RTX
, 0, OPTAB_DIRECT
);
1152 temp
= expand_binop (word_mode
, add_optab
, temp
,
1153 product_high
, product_high
,
1156 if (temp
!= 0 && temp
!= product_high
)
1157 emit_move_insn (product_high
, temp
);
1161 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1163 temp
= emit_move_insn (product
, product
);
1164 REG_NOTES (temp
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
1165 gen_rtx (MULT
, mode
,
1174 /* If we get here, we couldn't do it for some reason even though we
1175 originally thought we could. Delete anything we've emitted in
1178 delete_insns_since (last
);
1181 /* We need to open-code the complex type operations: '+, -, * and /' */
1183 /* At this point we allow operations between two similar complex
1184 numbers, and also if one of the operands is not a complex number
1185 but rather of MODE_FLOAT or MODE_INT. However, the caller
1186 must make sure that the MODE of the non-complex operand matches
1187 the SUBMODE of the complex operand. */
1189 if (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
)
1191 rtx real0
= 0, imag0
= 0;
1192 rtx real1
= 0, imag1
= 0;
1193 rtx realr
, imagr
, res
;
1198 /* Find the correct mode for the real and imaginary parts */
1199 enum machine_mode submode
1200 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
1201 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
1204 if (submode
== BLKmode
)
1208 target
= gen_reg_rtx (mode
);
1212 realr
= gen_realpart (submode
, target
);
1213 imagr
= gen_imagpart (submode
, target
);
1215 if (GET_MODE (op0
) == mode
)
1217 real0
= gen_realpart (submode
, op0
);
1218 imag0
= gen_imagpart (submode
, op0
);
1223 if (GET_MODE (op1
) == mode
)
1225 real1
= gen_realpart (submode
, op1
);
1226 imag1
= gen_imagpart (submode
, op1
);
1231 if (real0
== 0 || real1
== 0 || ! (imag0
!= 0|| imag1
!= 0))
1234 switch (binoptab
->code
)
1237 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1239 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1240 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1241 realr
, unsignedp
, methods
);
1245 else if (res
!= realr
)
1246 emit_move_insn (realr
, res
);
1249 res
= expand_binop (submode
, binoptab
, imag0
, imag1
,
1250 imagr
, unsignedp
, methods
);
1253 else if (binoptab
->code
== MINUS
)
1254 res
= expand_unop (submode
, neg_optab
, imag1
, imagr
, unsignedp
);
1260 else if (res
!= imagr
)
1261 emit_move_insn (imagr
, res
);
1267 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1273 /* Don't fetch these from memory more than once. */
1274 real0
= force_reg (submode
, real0
);
1275 real1
= force_reg (submode
, real1
);
1276 imag0
= force_reg (submode
, imag0
);
1277 imag1
= force_reg (submode
, imag1
);
1279 temp1
= expand_binop (submode
, binoptab
, real0
, real1
, NULL_RTX
,
1280 unsignedp
, methods
);
1282 temp2
= expand_binop (submode
, binoptab
, imag0
, imag1
, NULL_RTX
,
1283 unsignedp
, methods
);
1285 if (temp1
== 0 || temp2
== 0)
1288 res
= expand_binop (submode
, sub_optab
, temp1
, temp2
,
1289 realr
, unsignedp
, methods
);
1293 else if (res
!= realr
)
1294 emit_move_insn (realr
, res
);
1296 temp1
= expand_binop (submode
, binoptab
, real0
, imag1
,
1297 NULL_RTX
, unsignedp
, methods
);
1299 temp2
= expand_binop (submode
, binoptab
, real1
, imag0
,
1300 NULL_RTX
, unsignedp
, methods
);
1302 if (temp1
== 0 || temp2
== 0)
1305 res
= expand_binop (submode
, add_optab
, temp1
, temp2
,
1306 imagr
, unsignedp
, methods
);
1310 else if (res
!= imagr
)
1311 emit_move_insn (imagr
, res
);
1317 /* Don't fetch these from memory more than once. */
1318 real0
= force_reg (submode
, real0
);
1319 real1
= force_reg (submode
, real1
);
1321 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1322 realr
, unsignedp
, methods
);
1325 else if (res
!= realr
)
1326 emit_move_insn (realr
, res
);
1329 res
= expand_binop (submode
, binoptab
,
1330 real1
, imag0
, imagr
, unsignedp
, methods
);
1332 res
= expand_binop (submode
, binoptab
,
1333 real0
, imag1
, imagr
, unsignedp
, methods
);
1337 else if (res
!= imagr
)
1338 emit_move_insn (imagr
, res
);
1345 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1349 /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1351 /* Don't fetch these from memory more than once. */
1352 real1
= force_reg (submode
, real1
);
1354 /* Simply divide the real and imaginary parts by `c' */
1355 if (class == MODE_COMPLEX_FLOAT
)
1356 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1357 realr
, unsignedp
, methods
);
1359 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1360 real0
, real1
, realr
, unsignedp
);
1364 else if (res
!= realr
)
1365 emit_move_insn (realr
, res
);
1367 if (class == MODE_COMPLEX_FLOAT
)
1368 res
= expand_binop (submode
, binoptab
, imag0
, real1
,
1369 imagr
, unsignedp
, methods
);
1371 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1372 imag0
, real1
, imagr
, unsignedp
);
1376 else if (res
!= imagr
)
1377 emit_move_insn (imagr
, res
);
1383 /* Divisor is of complex type:
1389 /* Don't fetch these from memory more than once. */
1390 real0
= force_reg (submode
, real0
);
1391 real1
= force_reg (submode
, real1
);
1394 imag0
= force_reg (submode
, imag0
);
1396 imag1
= force_reg (submode
, imag1
);
1398 /* Divisor: c*c + d*d */
1399 temp1
= expand_binop (submode
, smul_optab
, real1
, real1
,
1400 NULL_RTX
, unsignedp
, methods
);
1402 temp2
= expand_binop (submode
, smul_optab
, imag1
, imag1
,
1403 NULL_RTX
, unsignedp
, methods
);
1405 if (temp1
== 0 || temp2
== 0)
1408 divisor
= expand_binop (submode
, add_optab
, temp1
, temp2
,
1409 NULL_RTX
, unsignedp
, methods
);
1415 /* ((a)(c-id))/divisor */
1416 /* (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)) */
1418 /* Calculate the dividend */
1419 real_t
= expand_binop (submode
, smul_optab
, real0
, real1
,
1420 NULL_RTX
, unsignedp
, methods
);
1422 imag_t
= expand_binop (submode
, smul_optab
, real0
, imag1
,
1423 NULL_RTX
, unsignedp
, methods
);
1425 if (real_t
== 0 || imag_t
== 0)
1428 imag_t
= expand_unop (submode
, neg_optab
, imag_t
,
1429 NULL_RTX
, unsignedp
);
1433 /* ((a+ib)(c-id))/divider */
1434 /* Calculate the dividend */
1435 temp1
= expand_binop (submode
, smul_optab
, real0
, real1
,
1436 NULL_RTX
, unsignedp
, methods
);
1438 temp2
= expand_binop (submode
, smul_optab
, imag0
, imag1
,
1439 NULL_RTX
, unsignedp
, methods
);
1441 if (temp1
== 0 || temp2
== 0)
1444 real_t
= expand_binop (submode
, add_optab
, temp1
, temp2
,
1445 NULL_RTX
, unsignedp
, methods
);
1447 temp1
= expand_binop (submode
, smul_optab
, imag0
, real1
,
1448 NULL_RTX
, unsignedp
, methods
);
1450 temp2
= expand_binop (submode
, smul_optab
, real0
, imag1
,
1451 NULL_RTX
, unsignedp
, methods
);
1453 if (temp1
== 0 || temp2
== 0)
1456 imag_t
= expand_binop (submode
, sub_optab
, temp1
, temp2
,
1457 NULL_RTX
, unsignedp
, methods
);
1459 if (real_t
== 0 || imag_t
== 0)
1463 if (class == MODE_COMPLEX_FLOAT
)
1464 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
1465 realr
, unsignedp
, methods
);
1467 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1468 real_t
, divisor
, realr
, unsignedp
);
1472 else if (res
!= realr
)
1473 emit_move_insn (realr
, res
);
1475 if (class == MODE_COMPLEX_FLOAT
)
1476 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
1477 imagr
, unsignedp
, methods
);
1479 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1480 imag_t
, divisor
, imagr
, unsignedp
);
1484 else if (res
!= imagr
)
1485 emit_move_insn (imagr
, res
);
1500 if (binoptab
->code
!= UNKNOWN
)
1502 = gen_rtx (binoptab
->code
, mode
, copy_rtx (op0
), copy_rtx (op1
));
1506 emit_no_conflict_block (seq
, target
, op0
, op1
, equiv_value
);
1512 /* It can't be open-coded in this mode.
1513 Use a library call if one is available and caller says that's ok. */
1515 if (binoptab
->handlers
[(int) mode
].libfunc
1516 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
1520 enum machine_mode op1_mode
= mode
;
1527 op1_mode
= word_mode
;
1528 /* Specify unsigned here,
1529 since negative shift counts are meaningless. */
1530 op1x
= convert_to_mode (word_mode
, op1
, 1);
1533 if (GET_MODE (op0
) != VOIDmode
1534 && GET_MODE (op0
) != mode
)
1535 op0
= convert_to_mode (mode
, op0
, unsignedp
);
1537 /* Pass 1 for NO_QUEUE so we don't lose any increments
1538 if the libcall is cse'd or moved. */
1539 value
= emit_library_call_value (binoptab
->handlers
[(int) mode
].libfunc
,
1540 NULL_RTX
, 1, mode
, 2,
1541 op0
, mode
, op1x
, op1_mode
);
1543 insns
= get_insns ();
1546 target
= gen_reg_rtx (mode
);
1547 emit_libcall_block (insns
, target
, value
,
1548 gen_rtx (binoptab
->code
, mode
, op0
, op1
));
1553 delete_insns_since (last
);
1555 /* It can't be done in this mode. Can we do it in a wider mode? */
1557 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
1558 || methods
== OPTAB_MUST_WIDEN
))
1560 /* Caller says, don't even try. */
1561 delete_insns_since (entry_last
);
1565 /* Compute the value of METHODS to pass to recursive calls.
1566 Don't allow widening to be tried recursively. */
1568 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
1570 /* Look for a wider mode of the same class for which it appears we can do
1573 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1575 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1576 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1578 if ((binoptab
->handlers
[(int) wider_mode
].insn_code
1579 != CODE_FOR_nothing
)
1580 || (methods
== OPTAB_LIB
1581 && binoptab
->handlers
[(int) wider_mode
].libfunc
))
1583 rtx xop0
= op0
, xop1
= op1
;
1586 /* For certain integer operations, we need not actually extend
1587 the narrow operands, as long as we will truncate
1588 the results to the same narrowness. */
1590 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1591 || binoptab
== xor_optab
1592 || binoptab
== add_optab
|| binoptab
== sub_optab
1593 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1594 && class == MODE_INT
)
1597 xop0
= widen_operand (xop0
, wider_mode
, mode
,
1598 unsignedp
, no_extend
);
1600 /* The second operand of a shift must always be extended. */
1601 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1602 no_extend
&& binoptab
!= ashl_optab
);
1604 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1605 unsignedp
, methods
);
1608 if (class != MODE_INT
)
1611 target
= gen_reg_rtx (mode
);
1612 convert_move (target
, temp
, 0);
1616 return gen_lowpart (mode
, temp
);
1619 delete_insns_since (last
);
1624 delete_insns_since (entry_last
);
1628 /* Expand a binary operator which has both signed and unsigned forms.
1629 UOPTAB is the optab for unsigned operations, and SOPTAB is for
1632 If we widen unsigned operands, we may use a signed wider operation instead
1633 of an unsigned wider operation, since the result would be the same. */
1636 sign_expand_binop (mode
, uoptab
, soptab
, op0
, op1
, target
, unsignedp
, methods
)
1637 enum machine_mode mode
;
1638 optab uoptab
, soptab
;
1639 rtx op0
, op1
, target
;
1641 enum optab_methods methods
;
1644 optab direct_optab
= unsignedp
? uoptab
: soptab
;
1645 struct optab wide_soptab
;
1647 /* Do it without widening, if possible. */
1648 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
1649 unsignedp
, OPTAB_DIRECT
);
1650 if (temp
|| methods
== OPTAB_DIRECT
)
1653 /* Try widening to a signed int. Make a fake signed optab that
1654 hides any signed insn for direct use. */
1655 wide_soptab
= *soptab
;
1656 wide_soptab
.handlers
[(int) mode
].insn_code
= CODE_FOR_nothing
;
1657 wide_soptab
.handlers
[(int) mode
].libfunc
= 0;
1659 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
1660 unsignedp
, OPTAB_WIDEN
);
1662 /* For unsigned operands, try widening to an unsigned int. */
1663 if (temp
== 0 && unsignedp
)
1664 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
1665 unsignedp
, OPTAB_WIDEN
);
1666 if (temp
|| methods
== OPTAB_WIDEN
)
1669 /* Use the right width lib call if that exists. */
1670 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
1671 if (temp
|| methods
== OPTAB_LIB
)
1674 /* Must widen and use a lib call, use either signed or unsigned. */
1675 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
1676 unsignedp
, methods
);
1680 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
1681 unsignedp
, methods
);
1685 /* Generate code to perform an operation specified by BINOPTAB
1686 on operands OP0 and OP1, with two results to TARG1 and TARG2.
1687 We assume that the order of the operands for the instruction
1688 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
1689 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
1691 Either TARG0 or TARG1 may be zero, but what that means is that
1692 that result is not actually wanted. We will generate it into
1693 a dummy pseudo-reg and discard it. They may not both be zero.
1695 Returns 1 if this operation can be performed; 0 if not. */
1698 expand_twoval_binop (binoptab
, op0
, op1
, targ0
, targ1
, unsignedp
)
1704 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
1705 enum mode_class
class;
1706 enum machine_mode wider_mode
;
1707 rtx entry_last
= get_last_insn ();
1710 class = GET_MODE_CLASS (mode
);
1712 op0
= protect_from_queue (op0
, 0);
1713 op1
= protect_from_queue (op1
, 0);
1717 op0
= force_not_mem (op0
);
1718 op1
= force_not_mem (op1
);
1721 /* If we are inside an appropriately-short loop and one operand is an
1722 expensive constant, force it into a register. */
1723 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
1724 && rtx_cost (op0
, binoptab
->code
) > 2)
1725 op0
= force_reg (mode
, op0
);
1727 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
1728 && rtx_cost (op1
, binoptab
->code
) > 2)
1729 op1
= force_reg (mode
, op1
);
1732 targ0
= protect_from_queue (targ0
, 1);
1734 targ0
= gen_reg_rtx (mode
);
1736 targ1
= protect_from_queue (targ1
, 1);
1738 targ1
= gen_reg_rtx (mode
);
1740 /* Record where to go back to if we fail. */
1741 last
= get_last_insn ();
1743 if (binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1745 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
1746 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
1747 enum machine_mode mode1
= insn_operand_mode
[icode
][2];
1749 rtx xop0
= op0
, xop1
= op1
;
1751 /* In case this insn wants input operands in modes different from the
1752 result, convert the operands. */
1753 if (GET_MODE (op0
) != VOIDmode
&& GET_MODE (op0
) != mode0
)
1754 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
1756 if (GET_MODE (op1
) != VOIDmode
&& GET_MODE (op1
) != mode1
)
1757 xop1
= convert_to_mode (mode1
, xop1
, unsignedp
);
1759 /* Now, if insn doesn't accept these operands, put them into pseudos. */
1760 if (! (*insn_operand_predicate
[icode
][1]) (xop0
, mode0
))
1761 xop0
= copy_to_mode_reg (mode0
, xop0
);
1763 if (! (*insn_operand_predicate
[icode
][2]) (xop1
, mode1
))
1764 xop1
= copy_to_mode_reg (mode1
, xop1
);
1766 /* We could handle this, but we should always be called with a pseudo
1767 for our targets and all insns should take them as outputs. */
1768 if (! (*insn_operand_predicate
[icode
][0]) (targ0
, mode
)
1769 || ! (*insn_operand_predicate
[icode
][3]) (targ1
, mode
))
1772 pat
= GEN_FCN (icode
) (targ0
, xop0
, xop1
, targ1
);
1779 delete_insns_since (last
);
1782 /* It can't be done in this mode. Can we do it in a wider mode? */
1784 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1786 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1787 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1789 if (binoptab
->handlers
[(int) wider_mode
].insn_code
1790 != CODE_FOR_nothing
)
1792 register rtx t0
= gen_reg_rtx (wider_mode
);
1793 register rtx t1
= gen_reg_rtx (wider_mode
);
1795 if (expand_twoval_binop (binoptab
,
1796 convert_modes (wider_mode
, mode
, op0
,
1798 convert_modes (wider_mode
, mode
, op1
,
1802 convert_move (targ0
, t0
, unsignedp
);
1803 convert_move (targ1
, t1
, unsignedp
);
1807 delete_insns_since (last
);
1812 delete_insns_since (entry_last
);
1816 /* Generate code to perform an operation specified by UNOPTAB
1817 on operand OP0, with result having machine-mode MODE.
1819 UNSIGNEDP is for the case where we have to widen the operands
1820 to perform the operation. It says to use zero-extension.
1822 If TARGET is nonzero, the value
1823 is generated there, if it is convenient to do so.
1824 In all cases an rtx is returned for the locus of the value;
1825 this may or may not be TARGET. */
1828 expand_unop (mode
, unoptab
, op0
, target
, unsignedp
)
1829 enum machine_mode mode
;
1835 enum mode_class
class;
1836 enum machine_mode wider_mode
;
1838 rtx last
= get_last_insn ();
1841 class = GET_MODE_CLASS (mode
);
1843 op0
= protect_from_queue (op0
, 0);
1847 op0
= force_not_mem (op0
);
1851 target
= protect_from_queue (target
, 1);
1853 if (unoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1855 int icode
= (int) unoptab
->handlers
[(int) mode
].insn_code
;
1856 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
1862 temp
= gen_reg_rtx (mode
);
1864 if (GET_MODE (xop0
) != VOIDmode
1865 && GET_MODE (xop0
) != mode0
)
1866 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
1868 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
1870 if (! (*insn_operand_predicate
[icode
][1]) (xop0
, mode0
))
1871 xop0
= copy_to_mode_reg (mode0
, xop0
);
1873 if (! (*insn_operand_predicate
[icode
][0]) (temp
, mode
))
1874 temp
= gen_reg_rtx (mode
);
1876 pat
= GEN_FCN (icode
) (temp
, xop0
);
1879 if (GET_CODE (pat
) == SEQUENCE
1880 && ! add_equal_note (pat
, temp
, unoptab
->code
, xop0
, NULL_RTX
))
1882 delete_insns_since (last
);
1883 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
1891 delete_insns_since (last
);
1894 /* It can't be done in this mode. Can we open-code it in a wider mode? */
1896 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1897 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1898 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1900 if (unoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
1904 /* For certain operations, we need not actually extend
1905 the narrow operand, as long as we will truncate the
1906 results to the same narrowness. */
1908 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
1909 (unoptab
== neg_optab
1910 || unoptab
== one_cmpl_optab
)
1911 && class == MODE_INT
);
1913 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
1918 if (class != MODE_INT
)
1921 target
= gen_reg_rtx (mode
);
1922 convert_move (target
, temp
, 0);
1926 return gen_lowpart (mode
, temp
);
1929 delete_insns_since (last
);
1933 /* These can be done a word at a time. */
1934 if (unoptab
== one_cmpl_optab
1935 && class == MODE_INT
1936 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
1937 && unoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1942 if (target
== 0 || target
== op0
)
1943 target
= gen_reg_rtx (mode
);
1947 /* Do the actual arithmetic. */
1948 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
1950 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
1951 rtx x
= expand_unop (word_mode
, unoptab
,
1952 operand_subword_force (op0
, i
, mode
),
1953 target_piece
, unsignedp
);
1954 if (target_piece
!= x
)
1955 emit_move_insn (target_piece
, x
);
1958 insns
= get_insns ();
1961 emit_no_conflict_block (insns
, target
, op0
, NULL_RTX
,
1962 gen_rtx (unoptab
->code
, mode
, copy_rtx (op0
)));
1966 /* Open-code the complex negation operation. */
1967 else if (unoptab
== neg_optab
1968 && (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
))
1974 /* Find the correct mode for the real and imaginary parts */
1975 enum machine_mode submode
1976 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
1977 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
1980 if (submode
== BLKmode
)
1984 target
= gen_reg_rtx (mode
);
1988 target_piece
= gen_imagpart (submode
, target
);
1989 x
= expand_unop (submode
, unoptab
,
1990 gen_imagpart (submode
, op0
),
1991 target_piece
, unsignedp
);
1992 if (target_piece
!= x
)
1993 emit_move_insn (target_piece
, x
);
1995 target_piece
= gen_realpart (submode
, target
);
1996 x
= expand_unop (submode
, unoptab
,
1997 gen_realpart (submode
, op0
),
1998 target_piece
, unsignedp
);
1999 if (target_piece
!= x
)
2000 emit_move_insn (target_piece
, x
);
2005 emit_no_conflict_block (seq
, target
, op0
, 0,
2006 gen_rtx (unoptab
->code
, mode
, copy_rtx (op0
)));
2010 /* Now try a library call in this mode. */
2011 if (unoptab
->handlers
[(int) mode
].libfunc
)
2018 /* Pass 1 for NO_QUEUE so we don't lose any increments
2019 if the libcall is cse'd or moved. */
2020 value
= emit_library_call_value (unoptab
->handlers
[(int) mode
].libfunc
,
2021 NULL_RTX
, 1, mode
, 1, op0
, mode
);
2022 insns
= get_insns ();
2025 target
= gen_reg_rtx (mode
);
2026 emit_libcall_block (insns
, target
, value
,
2027 gen_rtx (unoptab
->code
, mode
, op0
));
2032 /* It can't be done in this mode. Can we do it in a wider mode? */
2034 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2036 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2037 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2039 if ((unoptab
->handlers
[(int) wider_mode
].insn_code
2040 != CODE_FOR_nothing
)
2041 || unoptab
->handlers
[(int) wider_mode
].libfunc
)
2045 /* For certain operations, we need not actually extend
2046 the narrow operand, as long as we will truncate the
2047 results to the same narrowness. */
2049 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2050 (unoptab
== neg_optab
2051 || unoptab
== one_cmpl_optab
)
2052 && class == MODE_INT
);
2054 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2059 if (class != MODE_INT
)
2062 target
= gen_reg_rtx (mode
);
2063 convert_move (target
, temp
, 0);
2067 return gen_lowpart (mode
, temp
);
2070 delete_insns_since (last
);
2075 /* If there is no negate operation, try doing a subtract from zero.
2076 The US Software GOFAST library needs this. */
2077 if (unoptab
== neg_optab
)
2080 temp
= expand_binop (mode
, sub_optab
, CONST0_RTX (mode
), op0
,
2081 target
, unsignedp
, OPTAB_LIB_WIDEN
);
2089 /* Emit code to compute the absolute value of OP0, with result to
2090 TARGET if convenient. (TARGET may be 0.) The return value says
2091 where the result actually is to be found.
2093 MODE is the mode of the operand; the mode of the result is
2094 different but can be deduced from MODE.
2096 UNSIGNEDP is relevant if extension is needed. */
2099 expand_abs (mode
, op0
, target
, unsignedp
, safe
)
2100 enum machine_mode mode
;
2108 /* First try to do it with a special abs instruction. */
2109 temp
= expand_unop (mode
, abs_optab
, op0
, target
, 0);
2113 /* If this machine has expensive jumps, we can do integer absolute
2114 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
2115 where W is the width of MODE. */
2117 if (GET_MODE_CLASS (mode
) == MODE_INT
&& BRANCH_COST
>= 2)
2119 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
2120 size_int (GET_MODE_BITSIZE (mode
) - 1),
2123 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
2126 temp
= expand_binop (mode
, sub_optab
, temp
, extended
, target
, 0,
2133 /* If that does not win, use conditional jump and negate. */
2135 /* It is safe to use the target if it is the same
2136 as the source if this is also a pseudo register */
2137 if (op0
== target
&& GET_CODE (op0
) == REG
2138 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
2141 op1
= gen_label_rtx ();
2142 if (target
== 0 || ! safe
2143 || GET_MODE (target
) != mode
2144 || (GET_CODE (target
) == MEM
&& MEM_VOLATILE_P (target
))
2145 || (GET_CODE (target
) == REG
2146 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
2147 target
= gen_reg_rtx (mode
);
2149 emit_move_insn (target
, op0
);
2152 /* If this mode is an integer too wide to compare properly,
2153 compare word by word. Rely on CSE to optimize constant cases. */
2154 if (GET_MODE_CLASS (mode
) == MODE_INT
&& ! can_compare_p (mode
))
2155 do_jump_by_parts_greater_rtx (mode
, 0, target
, const0_rtx
,
2159 temp
= compare_from_rtx (target
, CONST0_RTX (mode
), GE
, 0, mode
,
2161 if (temp
== const1_rtx
)
2163 else if (temp
!= const0_rtx
)
2165 if (bcc_gen_fctn
[(int) GET_CODE (temp
)] != 0)
2166 emit_jump_insn ((*bcc_gen_fctn
[(int) GET_CODE (temp
)]) (op1
));
2172 op0
= expand_unop (mode
, neg_optab
, target
, target
, 0);
2174 emit_move_insn (target
, op0
);
2180 /* Emit code to compute the absolute value of OP0, with result to
2181 TARGET if convenient. (TARGET may be 0.) The return value says
2182 where the result actually is to be found.
2184 MODE is the mode of the operand; the mode of the result is
2185 different but can be deduced from MODE.
2187 UNSIGNEDP is relevant for complex integer modes. */
2190 expand_complex_abs (mode
, op0
, target
, unsignedp
)
2191 enum machine_mode mode
;
2196 enum mode_class
class = GET_MODE_CLASS (mode
);
2197 enum machine_mode wider_mode
;
2199 rtx entry_last
= get_last_insn ();
2203 /* Find the correct mode for the real and imaginary parts. */
2204 enum machine_mode submode
2205 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
2206 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
2209 if (submode
== BLKmode
)
2212 op0
= protect_from_queue (op0
, 0);
2216 op0
= force_not_mem (op0
);
2219 last
= get_last_insn ();
2222 target
= protect_from_queue (target
, 1);
2224 if (abs_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2226 int icode
= (int) abs_optab
->handlers
[(int) mode
].insn_code
;
2227 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
2233 temp
= gen_reg_rtx (submode
);
2235 if (GET_MODE (xop0
) != VOIDmode
2236 && GET_MODE (xop0
) != mode0
)
2237 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2239 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2241 if (! (*insn_operand_predicate
[icode
][1]) (xop0
, mode0
))
2242 xop0
= copy_to_mode_reg (mode0
, xop0
);
2244 if (! (*insn_operand_predicate
[icode
][0]) (temp
, submode
))
2245 temp
= gen_reg_rtx (submode
);
2247 pat
= GEN_FCN (icode
) (temp
, xop0
);
2250 if (GET_CODE (pat
) == SEQUENCE
2251 && ! add_equal_note (pat
, temp
, abs_optab
->code
, xop0
, NULL_RTX
))
2253 delete_insns_since (last
);
2254 return expand_unop (mode
, abs_optab
, op0
, NULL_RTX
, unsignedp
);
2262 delete_insns_since (last
);
2265 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2267 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2268 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2270 if (abs_optab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
2274 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
2275 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
2279 if (class != MODE_COMPLEX_INT
)
2282 target
= gen_reg_rtx (submode
);
2283 convert_move (target
, temp
, 0);
2287 return gen_lowpart (submode
, temp
);
2290 delete_insns_since (last
);
2294 /* Open-code the complex absolute-value operation
2295 if we can open-code sqrt. Otherwise it's not worth while. */
2296 if (sqrt_optab
->handlers
[(int) submode
].insn_code
!= CODE_FOR_nothing
)
2298 rtx real
, imag
, total
;
2300 real
= gen_realpart (submode
, op0
);
2301 imag
= gen_imagpart (submode
, op0
);
2303 /* Square both parts. */
2304 real
= expand_mult (submode
, real
, real
, NULL_RTX
, 0);
2305 imag
= expand_mult (submode
, imag
, imag
, NULL_RTX
, 0);
2307 /* Sum the parts. */
2308 total
= expand_binop (submode
, add_optab
, real
, imag
, NULL_RTX
,
2309 0, OPTAB_LIB_WIDEN
);
2311 /* Get sqrt in TARGET. Set TARGET to where the result is. */
2312 target
= expand_unop (submode
, sqrt_optab
, total
, target
, 0);
2314 delete_insns_since (last
);
2319 /* Now try a library call in this mode. */
2320 if (abs_optab
->handlers
[(int) mode
].libfunc
)
2327 /* Pass 1 for NO_QUEUE so we don't lose any increments
2328 if the libcall is cse'd or moved. */
2329 value
= emit_library_call_value (abs_optab
->handlers
[(int) mode
].libfunc
,
2330 NULL_RTX
, 1, submode
, 1, op0
, mode
);
2331 insns
= get_insns ();
2334 target
= gen_reg_rtx (submode
);
2335 emit_libcall_block (insns
, target
, value
,
2336 gen_rtx (abs_optab
->code
, mode
, op0
));
2341 /* It can't be done in this mode. Can we do it in a wider mode? */
2343 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2344 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2346 if ((abs_optab
->handlers
[(int) wider_mode
].insn_code
2347 != CODE_FOR_nothing
)
2348 || abs_optab
->handlers
[(int) wider_mode
].libfunc
)
2352 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
2354 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
2358 if (class != MODE_COMPLEX_INT
)
2361 target
= gen_reg_rtx (submode
);
2362 convert_move (target
, temp
, 0);
2366 return gen_lowpart (submode
, temp
);
2369 delete_insns_since (last
);
2373 delete_insns_since (entry_last
);
2377 /* Generate an instruction whose insn-code is INSN_CODE,
2378 with two operands: an output TARGET and an input OP0.
2379 TARGET *must* be nonzero, and the output is always stored there.
2380 CODE is an rtx code such that (CODE OP0) is an rtx that describes
2381 the value that is stored into TARGET. */
2384 emit_unop_insn (icode
, target
, op0
, code
)
2391 enum machine_mode mode0
= insn_operand_mode
[icode
][1];
2394 temp
= target
= protect_from_queue (target
, 1);
2396 op0
= protect_from_queue (op0
, 0);
2398 /* Sign and zero extension from memory is often done specially on
2399 RISC machines, so forcing into a register here can pessimize
2401 if (flag_force_mem
&& code
!= SIGN_EXTEND
&& code
!= ZERO_EXTEND
)
2402 op0
= force_not_mem (op0
);
2404 /* Now, if insn does not accept our operands, put them into pseudos. */
2406 if (! (*insn_operand_predicate
[icode
][1]) (op0
, mode0
))
2407 op0
= copy_to_mode_reg (mode0
, op0
);
2409 if (! (*insn_operand_predicate
[icode
][0]) (temp
, GET_MODE (temp
))
2410 || (flag_force_mem
&& GET_CODE (temp
) == MEM
))
2411 temp
= gen_reg_rtx (GET_MODE (temp
));
2413 pat
= GEN_FCN (icode
) (temp
, op0
);
2415 if (GET_CODE (pat
) == SEQUENCE
&& code
!= UNKNOWN
)
2416 add_equal_note (pat
, temp
, code
, op0
, NULL_RTX
);
2421 emit_move_insn (target
, temp
);
2424 /* Emit code to perform a series of operations on a multi-word quantity, one
2427 Such a block is preceded by a CLOBBER of the output, consists of multiple
2428 insns, each setting one word of the output, and followed by a SET copying
2429 the output to itself.
2431 Each of the insns setting words of the output receives a REG_NO_CONFLICT
2432 note indicating that it doesn't conflict with the (also multi-word)
2433 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
2436 INSNS is a block of code generated to perform the operation, not including
2437 the CLOBBER and final copy. All insns that compute intermediate values
2438 are first emitted, followed by the block as described above.
2440 TARGET, OP0, and OP1 are the output and inputs of the operations,
2441 respectively. OP1 may be zero for a unary operation.
2443 EQUIV, if non-zero, is an expression to be placed into a REG_EQUAL note
2446 If TARGET is not a register, INSNS is simply emitted with no special
2447 processing. Likewise if anything in INSNS is not an INSN or if
2448 there is a libcall block inside INSNS.
2450 The final insn emitted is returned. */
2453 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv
)
2459 rtx prev
, next
, first
, last
, insn
;
2461 if (GET_CODE (target
) != REG
|| reload_in_progress
)
2462 return emit_insns (insns
);
2464 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
2465 if (GET_CODE (insn
) != INSN
2466 || find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
2467 return emit_insns (insns
);
2469 /* First emit all insns that do not store into words of the output and remove
2470 these from the list. */
2471 for (insn
= insns
; insn
; insn
= next
)
2476 next
= NEXT_INSN (insn
);
2478 if (GET_CODE (PATTERN (insn
)) == SET
)
2479 set
= PATTERN (insn
);
2480 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2482 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2483 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
2485 set
= XVECEXP (PATTERN (insn
), 0, i
);
2493 if (! reg_overlap_mentioned_p (target
, SET_DEST (set
)))
2495 if (PREV_INSN (insn
))
2496 NEXT_INSN (PREV_INSN (insn
)) = next
;
2501 PREV_INSN (next
) = PREV_INSN (insn
);
2507 prev
= get_last_insn ();
2509 /* Now write the CLOBBER of the output, followed by the setting of each
2510 of the words, followed by the final copy. */
2511 if (target
!= op0
&& target
!= op1
)
2512 emit_insn (gen_rtx (CLOBBER
, VOIDmode
, target
));
2514 for (insn
= insns
; insn
; insn
= next
)
2516 next
= NEXT_INSN (insn
);
2519 if (op1
&& GET_CODE (op1
) == REG
)
2520 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_NO_CONFLICT
, op1
,
2523 if (op0
&& GET_CODE (op0
) == REG
)
2524 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_NO_CONFLICT
, op0
,
2528 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
2529 != CODE_FOR_nothing
)
2531 last
= emit_move_insn (target
, target
);
2534 = gen_rtx (EXPR_LIST
, REG_EQUAL
, equiv
, REG_NOTES (last
));
2537 last
= get_last_insn ();
2540 first
= get_insns ();
2542 first
= NEXT_INSN (prev
);
2544 /* Encapsulate the block so it gets manipulated as a unit. */
2545 REG_NOTES (first
) = gen_rtx (INSN_LIST
, REG_LIBCALL
, last
,
2547 REG_NOTES (last
) = gen_rtx (INSN_LIST
, REG_RETVAL
, first
, REG_NOTES (last
));
2552 /* Emit code to make a call to a constant function or a library call.
2554 INSNS is a list containing all insns emitted in the call.
2555 These insns leave the result in RESULT. Our block is to copy RESULT
2556 to TARGET, which is logically equivalent to EQUIV.
2558 We first emit any insns that set a pseudo on the assumption that these are
2559 loading constants into registers; doing so allows them to be safely cse'ed
2560 between blocks. Then we emit all the other insns in the block, followed by
2561 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
2562 note with an operand of EQUIV.
2564 Moving assignments to pseudos outside of the block is done to improve
2565 the generated code, but is not required to generate correct code,
2566 hence being unable to move an assignment is not grounds for not making
2567 a libcall block. There are two reasons why it is safe to leave these
2568 insns inside the block: First, we know that these pseudos cannot be
2569 used in generated RTL outside the block since they are created for
2570 temporary purposes within the block. Second, CSE will not record the
2571 values of anything set inside a libcall block, so we know they must
2572 be dead at the end of the block.
2574 Except for the first group of insns (the ones setting pseudos), the
2575 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
2578 emit_libcall_block (insns
, target
, result
, equiv
)
2584 rtx prev
, next
, first
, last
, insn
;
2586 /* First emit all insns that set pseudos. Remove them from the list as
2587 we go. Avoid insns that set pseudos which were referenced in previous
2588 insns. These can be generated by move_by_pieces, for example,
2589 to update an address. Similarly, avoid insns that reference things
2590 set in previous insns. */
2592 for (insn
= insns
; insn
; insn
= next
)
2594 rtx set
= single_set (insn
);
2596 next
= NEXT_INSN (insn
);
2598 if (set
!= 0 && GET_CODE (SET_DEST (set
)) == REG
2599 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
2601 || (! reg_mentioned_p (SET_DEST (set
), PATTERN (insns
))
2602 && ! reg_used_between_p (SET_DEST (set
), insns
, insn
)
2603 && ! modified_in_p (SET_SRC (set
), insns
)
2604 && ! modified_between_p (SET_SRC (set
), insns
, insn
))))
2606 if (PREV_INSN (insn
))
2607 NEXT_INSN (PREV_INSN (insn
)) = next
;
2612 PREV_INSN (next
) = PREV_INSN (insn
);
2618 prev
= get_last_insn ();
2620 /* Write the remaining insns followed by the final copy. */
2622 for (insn
= insns
; insn
; insn
= next
)
2624 next
= NEXT_INSN (insn
);
2629 last
= emit_move_insn (target
, result
);
2630 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
2631 != CODE_FOR_nothing
)
2632 REG_NOTES (last
) = gen_rtx (EXPR_LIST
,
2633 REG_EQUAL
, copy_rtx (equiv
), REG_NOTES (last
));
2636 first
= get_insns ();
2638 first
= NEXT_INSN (prev
);
2640 /* Encapsulate the block so it gets manipulated as a unit. */
2641 REG_NOTES (first
) = gen_rtx (INSN_LIST
, REG_LIBCALL
, last
,
2643 REG_NOTES (last
) = gen_rtx (INSN_LIST
, REG_RETVAL
, first
, REG_NOTES (last
));
2646 /* Generate code to store zero in X. */
2652 emit_move_insn (x
, const0_rtx
);
2655 /* Generate code to store 1 in X
2656 assuming it contains zero beforehand. */
2659 emit_0_to_1_insn (x
)
2662 emit_move_insn (x
, const1_rtx
);
2665 /* Generate code to compare X with Y
2666 so that the condition codes are set.
2668 MODE is the mode of the inputs (in case they are const_int).
2669 UNSIGNEDP nonzero says that X and Y are unsigned;
2670 this matters if they need to be widened.
2672 If they have mode BLKmode, then SIZE specifies the size of both X and Y,
2673 and ALIGN specifies the known shared alignment of X and Y.
2675 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
2676 It is ignored for fixed-point and block comparisons;
2677 it is used only for floating-point comparisons. */
2680 emit_cmp_insn (x
, y
, comparison
, size
, mode
, unsignedp
, align
)
2682 enum rtx_code comparison
;
2684 enum machine_mode mode
;
2688 enum mode_class
class;
2689 enum machine_mode wider_mode
;
2691 class = GET_MODE_CLASS (mode
);
2693 /* They could both be VOIDmode if both args are immediate constants,
2694 but we should fold that at an earlier stage.
2695 With no special code here, this will call abort,
2696 reminding the programmer to implement such folding. */
2698 if (mode
!= BLKmode
&& flag_force_mem
)
2700 x
= force_not_mem (x
);
2701 y
= force_not_mem (y
);
2704 /* If we are inside an appropriately-short loop and one operand is an
2705 expensive constant, force it into a register. */
2706 if (CONSTANT_P (x
) && preserve_subexpressions_p () && rtx_cost (x
, COMPARE
) > 2)
2707 x
= force_reg (mode
, x
);
2709 if (CONSTANT_P (y
) && preserve_subexpressions_p () && rtx_cost (y
, COMPARE
) > 2)
2710 y
= force_reg (mode
, y
);
2712 /* Don't let both operands fail to indicate the mode. */
2713 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
2714 x
= force_reg (mode
, x
);
2716 /* Handle all BLKmode compares. */
2718 if (mode
== BLKmode
)
2721 x
= protect_from_queue (x
, 0);
2722 y
= protect_from_queue (y
, 0);
2726 #ifdef HAVE_cmpstrqi
2728 && GET_CODE (size
) == CONST_INT
2729 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (QImode
)))
2731 enum machine_mode result_mode
2732 = insn_operand_mode
[(int) CODE_FOR_cmpstrqi
][0];
2733 rtx result
= gen_reg_rtx (result_mode
);
2734 emit_insn (gen_cmpstrqi (result
, x
, y
, size
, GEN_INT (align
)));
2735 emit_cmp_insn (result
, const0_rtx
, comparison
, NULL_RTX
,
2740 #ifdef HAVE_cmpstrhi
2742 && GET_CODE (size
) == CONST_INT
2743 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (HImode
)))
2745 enum machine_mode result_mode
2746 = insn_operand_mode
[(int) CODE_FOR_cmpstrhi
][0];
2747 rtx result
= gen_reg_rtx (result_mode
);
2748 emit_insn (gen_cmpstrhi (result
, x
, y
, size
, GEN_INT (align
)));
2749 emit_cmp_insn (result
, const0_rtx
, comparison
, NULL_RTX
,
2754 #ifdef HAVE_cmpstrsi
2757 enum machine_mode result_mode
2758 = insn_operand_mode
[(int) CODE_FOR_cmpstrsi
][0];
2759 rtx result
= gen_reg_rtx (result_mode
);
2760 size
= protect_from_queue (size
, 0);
2761 emit_insn (gen_cmpstrsi (result
, x
, y
,
2762 convert_to_mode (SImode
, size
, 1),
2764 emit_cmp_insn (result
, const0_rtx
, comparison
, NULL_RTX
,
2772 #ifdef TARGET_MEM_FUNCTIONS
2773 emit_library_call (memcmp_libfunc
, 0,
2774 TYPE_MODE (integer_type_node
), 3,
2775 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
2776 convert_to_mode (TYPE_MODE (sizetype
), size
,
2777 TREE_UNSIGNED (sizetype
)),
2778 TYPE_MODE (sizetype
));
2780 emit_library_call (bcmp_libfunc
, 0,
2781 TYPE_MODE (integer_type_node
), 3,
2782 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
2783 convert_to_mode (TYPE_MODE (integer_type_node
),
2785 TREE_UNSIGNED (integer_type_node
)),
2786 TYPE_MODE (integer_type_node
));
2789 /* Immediately move the result of the libcall into a pseudo
2790 register so reload doesn't clobber the value if it needs
2791 the return register for a spill reg. */
2792 result
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
2793 emit_move_insn (result
,
2794 hard_libcall_value (TYPE_MODE (integer_type_node
)));
2795 emit_cmp_insn (result
,
2796 const0_rtx
, comparison
, NULL_RTX
,
2797 TYPE_MODE (integer_type_node
), 0, 0);
2802 /* Handle some compares against zero. */
2804 if (y
== CONST0_RTX (mode
)
2805 && tst_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2807 int icode
= (int) tst_optab
->handlers
[(int) mode
].insn_code
;
2810 x
= protect_from_queue (x
, 0);
2811 y
= protect_from_queue (y
, 0);
2813 /* Now, if insn does accept these operands, put them into pseudos. */
2814 if (! (*insn_operand_predicate
[icode
][0])
2815 (x
, insn_operand_mode
[icode
][0]))
2816 x
= copy_to_mode_reg (insn_operand_mode
[icode
][0], x
);
2818 emit_insn (GEN_FCN (icode
) (x
));
2822 /* Handle compares for which there is a directly suitable insn. */
2824 if (cmp_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2826 int icode
= (int) cmp_optab
->handlers
[(int) mode
].insn_code
;
2829 x
= protect_from_queue (x
, 0);
2830 y
= protect_from_queue (y
, 0);
2832 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2833 if (! (*insn_operand_predicate
[icode
][0])
2834 (x
, insn_operand_mode
[icode
][0]))
2835 x
= copy_to_mode_reg (insn_operand_mode
[icode
][0], x
);
2837 if (! (*insn_operand_predicate
[icode
][1])
2838 (y
, insn_operand_mode
[icode
][1]))
2839 y
= copy_to_mode_reg (insn_operand_mode
[icode
][1], y
);
2841 emit_insn (GEN_FCN (icode
) (x
, y
));
2845 /* Try widening if we can find a direct insn that way. */
2847 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2849 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2850 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2852 if (cmp_optab
->handlers
[(int) wider_mode
].insn_code
2853 != CODE_FOR_nothing
)
2855 x
= protect_from_queue (x
, 0);
2856 y
= protect_from_queue (y
, 0);
2857 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
2858 y
= convert_modes (wider_mode
, mode
, y
, unsignedp
);
2859 emit_cmp_insn (x
, y
, comparison
, NULL_RTX
,
2860 wider_mode
, unsignedp
, align
);
2866 /* Handle a lib call just for the mode we are using. */
2868 if (cmp_optab
->handlers
[(int) mode
].libfunc
2869 && class != MODE_FLOAT
)
2871 rtx libfunc
= cmp_optab
->handlers
[(int) mode
].libfunc
;
2874 /* If we want unsigned, and this mode has a distinct unsigned
2875 comparison routine, use that. */
2876 if (unsignedp
&& ucmp_optab
->handlers
[(int) mode
].libfunc
)
2877 libfunc
= ucmp_optab
->handlers
[(int) mode
].libfunc
;
2879 emit_library_call (libfunc
, 1,
2880 word_mode
, 2, x
, mode
, y
, mode
);
2882 /* Immediately move the result of the libcall into a pseudo
2883 register so reload doesn't clobber the value if it needs
2884 the return register for a spill reg. */
2885 result
= gen_reg_rtx (word_mode
);
2886 emit_move_insn (result
, hard_libcall_value (word_mode
));
2888 /* Integer comparison returns a result that must be compared against 1,
2889 so that even if we do an unsigned compare afterward,
2890 there is still a value that can represent the result "less than". */
2891 emit_cmp_insn (result
, const1_rtx
,
2892 comparison
, NULL_RTX
, word_mode
, unsignedp
, 0);
2896 if (class == MODE_FLOAT
)
2897 emit_float_lib_cmp (x
, y
, comparison
);
2903 /* Nonzero if a compare of mode MODE can be done straightforwardly
2904 (without splitting it into pieces). */
2907 can_compare_p (mode
)
2908 enum machine_mode mode
;
2912 if (cmp_optab
->handlers
[(int)mode
].insn_code
!= CODE_FOR_nothing
)
2914 mode
= GET_MODE_WIDER_MODE (mode
);
2915 } while (mode
!= VOIDmode
);
2920 /* Emit a library call comparison between floating point X and Y.
2921 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
2924 emit_float_lib_cmp (x
, y
, comparison
)
2926 enum rtx_code comparison
;
2928 enum machine_mode mode
= GET_MODE (x
);
2936 libfunc
= eqhf2_libfunc
;
2940 libfunc
= nehf2_libfunc
;
2944 libfunc
= gthf2_libfunc
;
2948 libfunc
= gehf2_libfunc
;
2952 libfunc
= lthf2_libfunc
;
2956 libfunc
= lehf2_libfunc
;
2962 else if (mode
== SFmode
)
2966 libfunc
= eqsf2_libfunc
;
2970 libfunc
= nesf2_libfunc
;
2974 libfunc
= gtsf2_libfunc
;
2978 libfunc
= gesf2_libfunc
;
2982 libfunc
= ltsf2_libfunc
;
2986 libfunc
= lesf2_libfunc
;
2992 else if (mode
== DFmode
)
2996 libfunc
= eqdf2_libfunc
;
3000 libfunc
= nedf2_libfunc
;
3004 libfunc
= gtdf2_libfunc
;
3008 libfunc
= gedf2_libfunc
;
3012 libfunc
= ltdf2_libfunc
;
3016 libfunc
= ledf2_libfunc
;
3022 else if (mode
== XFmode
)
3026 libfunc
= eqxf2_libfunc
;
3030 libfunc
= nexf2_libfunc
;
3034 libfunc
= gtxf2_libfunc
;
3038 libfunc
= gexf2_libfunc
;
3042 libfunc
= ltxf2_libfunc
;
3046 libfunc
= lexf2_libfunc
;
3052 else if (mode
== TFmode
)
3056 libfunc
= eqtf2_libfunc
;
3060 libfunc
= netf2_libfunc
;
3064 libfunc
= gttf2_libfunc
;
3068 libfunc
= getf2_libfunc
;
3072 libfunc
= lttf2_libfunc
;
3076 libfunc
= letf2_libfunc
;
3084 enum machine_mode wider_mode
;
3086 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
3087 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3089 if ((cmp_optab
->handlers
[(int) wider_mode
].insn_code
3090 != CODE_FOR_nothing
)
3091 || (cmp_optab
->handlers
[(int) wider_mode
].libfunc
!= 0))
3093 x
= protect_from_queue (x
, 0);
3094 y
= protect_from_queue (y
, 0);
3095 x
= convert_to_mode (wider_mode
, x
, 0);
3096 y
= convert_to_mode (wider_mode
, y
, 0);
3097 emit_float_lib_cmp (x
, y
, comparison
);
3107 emit_library_call (libfunc
, 1,
3108 word_mode
, 2, x
, mode
, y
, mode
);
3110 /* Immediately move the result of the libcall into a pseudo
3111 register so reload doesn't clobber the value if it needs
3112 the return register for a spill reg. */
3113 result
= gen_reg_rtx (word_mode
);
3114 emit_move_insn (result
, hard_libcall_value (word_mode
));
3116 emit_cmp_insn (result
, const0_rtx
, comparison
,
3117 NULL_RTX
, word_mode
, 0, 0);
3120 /* Generate code to indirectly jump to a location given in the rtx LOC. */
3123 emit_indirect_jump (loc
)
3126 if (! ((*insn_operand_predicate
[(int)CODE_FOR_indirect_jump
][0])
3128 loc
= copy_to_mode_reg (Pmode
, loc
);
3130 emit_jump_insn (gen_indirect_jump (loc
));
3134 #ifdef HAVE_conditional_move
3136 /* Emit a conditional move instruction if the machine supports one for that
3137 condition and machine mode.
3139 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
3140 the mode to use should they be constants. If it is VOIDmode, they cannot
3143 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
3144 should be stored there. MODE is the mode to use should they be constants.
3145 If it is VOIDmode, they cannot both be constants.
3147 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
3148 is not supported. */
3151 emit_conditional_move (target
, code
, op0
, op1
, cmode
, op2
, op3
, mode
,
3156 enum machine_mode cmode
;
3158 enum machine_mode mode
;
3161 rtx tem
, subtarget
, comparison
, insn
;
3162 enum insn_code icode
;
3164 /* If one operand is constant, make it the second one. Only do this
3165 if the other operand is not constant as well. */
3167 if ((CONSTANT_P (op0
) && ! CONSTANT_P (op1
))
3168 || (GET_CODE (op0
) == CONST_INT
&& GET_CODE (op1
) != CONST_INT
))
3173 code
= swap_condition (code
);
3176 if (cmode
== VOIDmode
)
3177 cmode
= GET_MODE (op0
);
3179 if ((CONSTANT_P (op2
) && ! CONSTANT_P (op3
))
3180 || (GET_CODE (op2
) == CONST_INT
&& GET_CODE (op3
) != CONST_INT
))
3185 /* ??? This may not be appropriate (consider IEEE). Perhaps we should
3186 call can_reverse_comparison_p here and bail out if necessary.
3187 It's not clear whether we need to do this canonicalization though. */
3188 code
= reverse_condition (code
);
3191 if (mode
== VOIDmode
)
3192 mode
= GET_MODE (op2
);
3194 icode
= movcc_gen_code
[mode
];
3196 if (icode
== CODE_FOR_nothing
)
3201 op2
= force_not_mem (op2
);
3202 op3
= force_not_mem (op3
);
3206 target
= protect_from_queue (target
, 1);
3208 target
= gen_reg_rtx (mode
);
3214 op2
= protect_from_queue (op2
, 0);
3215 op3
= protect_from_queue (op3
, 0);
3217 /* If the insn doesn't accept these operands, put them in pseudos. */
3219 if (! (*insn_operand_predicate
[icode
][0])
3220 (subtarget
, insn_operand_mode
[icode
][0]))
3221 subtarget
= gen_reg_rtx (insn_operand_mode
[icode
][0]);
3223 if (! (*insn_operand_predicate
[icode
][2])
3224 (op2
, insn_operand_mode
[icode
][2]))
3225 op2
= copy_to_mode_reg (insn_operand_mode
[icode
][2], op2
);
3227 if (! (*insn_operand_predicate
[icode
][3])
3228 (op3
, insn_operand_mode
[icode
][3]))
3229 op3
= copy_to_mode_reg (insn_operand_mode
[icode
][3], op3
);
3231 /* Everything should now be in the suitable form, so emit the compare insn
3232 and then the conditional move. */
3235 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
, 0);
3237 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
3238 if (GET_CODE (comparison
) != code
)
3239 /* This shouldn't happen. */
3242 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
3244 /* If that failed, then give up. */
3250 if (subtarget
!= target
)
3251 convert_move (target
, subtarget
, 0);
3256 /* Return non-zero if a conditional move of mode MODE is supported.
3258 This function is for combine so it can tell whether an insn that looks
3259 like a conditional move is actually supported by the hardware. If we
3260 guess wrong we lose a bit on optimization, but that's it. */
3261 /* ??? sparc64 supports conditionally moving integers values based on fp
3262 comparisons, and vice versa. How do we handle them? */
3265 can_conditionally_move_p (mode
)
3266 enum machine_mode mode
;
3268 if (movcc_gen_code
[mode
] != CODE_FOR_nothing
)
3274 #endif /* HAVE_conditional_move */
3276 /* These three functions generate an insn body and return it
3277 rather than emitting the insn.
3279 They do not protect from queued increments,
3280 because they may be used 1) in protect_from_queue itself
3281 and 2) in other passes where there is no queue. */
3283 /* Generate and return an insn body to add Y to X. */
3286 gen_add2_insn (x
, y
)
3289 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
3291 if (! (*insn_operand_predicate
[icode
][0]) (x
, insn_operand_mode
[icode
][0])
3292 || ! (*insn_operand_predicate
[icode
][1]) (x
, insn_operand_mode
[icode
][1])
3293 || ! (*insn_operand_predicate
[icode
][2]) (y
, insn_operand_mode
[icode
][2]))
3296 return (GEN_FCN (icode
) (x
, x
, y
));
3300 have_add2_insn (mode
)
3301 enum machine_mode mode
;
3303 return add_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
;
3306 /* Generate and return an insn body to subtract Y from X. */
3309 gen_sub2_insn (x
, y
)
3312 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
3314 if (! (*insn_operand_predicate
[icode
][0]) (x
, insn_operand_mode
[icode
][0])
3315 || ! (*insn_operand_predicate
[icode
][1]) (x
, insn_operand_mode
[icode
][1])
3316 || ! (*insn_operand_predicate
[icode
][2]) (y
, insn_operand_mode
[icode
][2]))
3319 return (GEN_FCN (icode
) (x
, x
, y
));
3323 have_sub2_insn (mode
)
3324 enum machine_mode mode
;
3326 return sub_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
;
3329 /* Generate the body of an instruction to copy Y into X.
3330 It may be a SEQUENCE, if one insn isn't enough. */
3333 gen_move_insn (x
, y
)
3336 register enum machine_mode mode
= GET_MODE (x
);
3337 enum insn_code insn_code
;
3340 if (mode
== VOIDmode
)
3341 mode
= GET_MODE (y
);
3343 insn_code
= mov_optab
->handlers
[(int) mode
].insn_code
;
3345 /* Handle MODE_CC modes: If we don't have a special move insn for this mode,
3346 find a mode to do it in. If we have a movcc, use it. Otherwise,
3347 find the MODE_INT mode of the same width. */
3349 if (GET_MODE_CLASS (mode
) == MODE_CC
&& insn_code
== CODE_FOR_nothing
)
3351 enum machine_mode tmode
= VOIDmode
;
3355 && mov_optab
->handlers
[(int) CCmode
].insn_code
!= CODE_FOR_nothing
)
3358 for (tmode
= QImode
; tmode
!= VOIDmode
;
3359 tmode
= GET_MODE_WIDER_MODE (tmode
))
3360 if (GET_MODE_SIZE (tmode
) == GET_MODE_SIZE (mode
))
3363 if (tmode
== VOIDmode
)
3366 /* Get X and Y in TMODE. We can't use gen_lowpart here because it
3367 may call change_address which is not appropriate if we were
3368 called when a reload was in progress. We don't have to worry
3369 about changing the address since the size in bytes is supposed to
3370 be the same. Copy the MEM to change the mode and move any
3371 substitutions from the old MEM to the new one. */
3373 if (reload_in_progress
)
3375 x
= gen_lowpart_common (tmode
, x1
);
3376 if (x
== 0 && GET_CODE (x1
) == MEM
)
3378 x
= gen_rtx (MEM
, tmode
, XEXP (x1
, 0));
3379 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (x1
);
3380 MEM_IN_STRUCT_P (x
) = MEM_IN_STRUCT_P (x1
);
3381 MEM_VOLATILE_P (x
) = MEM_VOLATILE_P (x1
);
3382 copy_replacements (x1
, x
);
3385 y
= gen_lowpart_common (tmode
, y1
);
3386 if (y
== 0 && GET_CODE (y1
) == MEM
)
3388 y
= gen_rtx (MEM
, tmode
, XEXP (y1
, 0));
3389 RTX_UNCHANGING_P (y
) = RTX_UNCHANGING_P (y1
);
3390 MEM_IN_STRUCT_P (y
) = MEM_IN_STRUCT_P (y1
);
3391 MEM_VOLATILE_P (y
) = MEM_VOLATILE_P (y1
);
3392 copy_replacements (y1
, y
);
3397 x
= gen_lowpart (tmode
, x
);
3398 y
= gen_lowpart (tmode
, y
);
3401 insn_code
= mov_optab
->handlers
[(int) tmode
].insn_code
;
3402 return (GEN_FCN (insn_code
) (x
, y
));
3406 emit_move_insn_1 (x
, y
);
3407 seq
= gen_sequence ();
3412 /* Return the insn code used to extend FROM_MODE to TO_MODE.
3413 UNSIGNEDP specifies zero-extension instead of sign-extension. If
3414 no such operation exists, CODE_FOR_nothing will be returned. */
3417 can_extend_p (to_mode
, from_mode
, unsignedp
)
3418 enum machine_mode to_mode
, from_mode
;
3421 return extendtab
[(int) to_mode
][(int) from_mode
][unsignedp
];
3424 /* Generate the body of an insn to extend Y (with mode MFROM)
3425 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
3428 gen_extend_insn (x
, y
, mto
, mfrom
, unsignedp
)
3430 enum machine_mode mto
, mfrom
;
3433 return (GEN_FCN (extendtab
[(int) mto
][(int) mfrom
][unsignedp
]) (x
, y
));
3436 /* can_fix_p and can_float_p say whether the target machine
3437 can directly convert a given fixed point type to
3438 a given floating point type, or vice versa.
3439 The returned value is the CODE_FOR_... value to use,
3440 or CODE_FOR_nothing if these modes cannot be directly converted.
3442 *TRUNCP_PTR is set to 1 if it is necessary to output
3443 an explicit FTRUNC insn before the fix insn; otherwise 0. */
3445 static enum insn_code
3446 can_fix_p (fixmode
, fltmode
, unsignedp
, truncp_ptr
)
3447 enum machine_mode fltmode
, fixmode
;
3452 if (fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
] != CODE_FOR_nothing
)
3453 return fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
];
3455 if (ftrunc_optab
->handlers
[(int) fltmode
].insn_code
!= CODE_FOR_nothing
)
3458 return fixtab
[(int) fltmode
][(int) fixmode
][unsignedp
];
3460 return CODE_FOR_nothing
;
3463 static enum insn_code
3464 can_float_p (fltmode
, fixmode
, unsignedp
)
3465 enum machine_mode fixmode
, fltmode
;
3468 return floattab
[(int) fltmode
][(int) fixmode
][unsignedp
];
3471 /* Generate code to convert FROM to floating point
3472 and store in TO. FROM must be fixed point and not VOIDmode.
3473 UNSIGNEDP nonzero means regard FROM as unsigned.
3474 Normally this is done by correcting the final value
3475 if it is negative. */
3478 expand_float (to
, from
, unsignedp
)
3482 enum insn_code icode
;
3483 register rtx target
= to
;
3484 enum machine_mode fmode
, imode
;
3486 /* Crash now, because we won't be able to decide which mode to use. */
3487 if (GET_MODE (from
) == VOIDmode
)
3490 /* Look for an insn to do the conversion. Do it in the specified
3491 modes if possible; otherwise convert either input, output or both to
3492 wider mode. If the integer mode is wider than the mode of FROM,
3493 we can do the conversion signed even if the input is unsigned. */
3495 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
3496 imode
= GET_MODE_WIDER_MODE (imode
))
3497 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
3498 fmode
= GET_MODE_WIDER_MODE (fmode
))
3500 int doing_unsigned
= unsignedp
;
3502 icode
= can_float_p (fmode
, imode
, unsignedp
);
3503 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (from
) && unsignedp
)
3504 icode
= can_float_p (fmode
, imode
, 0), doing_unsigned
= 0;
3506 if (icode
!= CODE_FOR_nothing
)
3508 to
= protect_from_queue (to
, 1);
3509 from
= protect_from_queue (from
, 0);
3511 if (imode
!= GET_MODE (from
))
3512 from
= convert_to_mode (imode
, from
, unsignedp
);
3514 if (fmode
!= GET_MODE (to
))
3515 target
= gen_reg_rtx (fmode
);
3517 emit_unop_insn (icode
, target
, from
,
3518 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
3521 convert_move (to
, target
, 0);
3526 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3528 /* Unsigned integer, and no way to convert directly.
3529 Convert as signed, then conditionally adjust the result. */
3532 rtx label
= gen_label_rtx ();
3534 REAL_VALUE_TYPE offset
;
3538 to
= protect_from_queue (to
, 1);
3539 from
= protect_from_queue (from
, 0);
3542 from
= force_not_mem (from
);
3544 /* Look for a usable floating mode FMODE wider than the source and at
3545 least as wide as the target. Using FMODE will avoid rounding woes
3546 with unsigned values greater than the signed maximum value. */
3548 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
3549 fmode
= GET_MODE_WIDER_MODE (fmode
))
3550 if (GET_MODE_BITSIZE (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
3551 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
3554 if (fmode
== VOIDmode
)
3556 /* There is no such mode. Pretend the target is wide enough. */
3557 fmode
= GET_MODE (to
);
3559 /* Avoid double-rounding when TO is narrower than FROM. */
3560 if ((significand_size (fmode
) + 1)
3561 < GET_MODE_BITSIZE (GET_MODE (from
)))
3564 rtx neglabel
= gen_label_rtx ();
3566 /* Don't use TARGET if it isn't a register, is a hard register,
3567 or is the wrong mode. */
3568 if (GET_CODE (target
) != REG
3569 || REGNO (target
) < FIRST_PSEUDO_REGISTER
3570 || GET_MODE (target
) != fmode
)
3571 target
= gen_reg_rtx (fmode
);
3573 imode
= GET_MODE (from
);
3574 do_pending_stack_adjust ();
3576 /* Test whether the sign bit is set. */
3577 emit_cmp_insn (from
, const0_rtx
, GE
, NULL_RTX
, imode
, 0, 0);
3578 emit_jump_insn (gen_blt (neglabel
));
3580 /* The sign bit is not set. Convert as signed. */
3581 expand_float (target
, from
, 0);
3582 emit_jump_insn (gen_jump (label
));
3585 /* The sign bit is set.
3586 Convert to a usable (positive signed) value by shifting right
3587 one bit, while remembering if a nonzero bit was shifted
3588 out; i.e., compute (from & 1) | (from >> 1). */
3590 emit_label (neglabel
);
3591 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
3592 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3593 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, integer_one_node
,
3595 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
3597 expand_float (target
, temp
, 0);
3599 /* Multiply by 2 to undo the shift above. */
3600 temp
= expand_binop (fmode
, add_optab
, target
, target
,
3601 target
, 0, OPTAB_LIB_WIDEN
);
3603 emit_move_insn (target
, temp
);
3605 do_pending_stack_adjust ();
3611 /* If we are about to do some arithmetic to correct for an
3612 unsigned operand, do it in a pseudo-register. */
3614 if (GET_MODE (to
) != fmode
3615 || GET_CODE (to
) != REG
|| REGNO (to
) < FIRST_PSEUDO_REGISTER
)
3616 target
= gen_reg_rtx (fmode
);
3618 /* Convert as signed integer to floating. */
3619 expand_float (target
, from
, 0);
3621 /* If FROM is negative (and therefore TO is negative),
3622 correct its value by 2**bitwidth. */
3624 do_pending_stack_adjust ();
3625 emit_cmp_insn (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
), 0, 0);
3626 emit_jump_insn (gen_bge (label
));
3628 /* On SCO 3.2.1, ldexp rejects values outside [0.5, 1).
3629 Rather than setting up a dconst_dot_5, let's hope SCO
3631 offset
= REAL_VALUE_LDEXP (dconst1
, GET_MODE_BITSIZE (GET_MODE (from
)));
3632 temp
= expand_binop (fmode
, add_optab
, target
,
3633 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
3634 target
, 0, OPTAB_LIB_WIDEN
);
3636 emit_move_insn (target
, temp
);
3638 do_pending_stack_adjust ();
3644 /* No hardware instruction available; call a library routine to convert from
3645 SImode, DImode, or TImode into SFmode, DFmode, XFmode, or TFmode. */
3651 to
= protect_from_queue (to
, 1);
3652 from
= protect_from_queue (from
, 0);
3654 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
3655 from
= convert_to_mode (SImode
, from
, unsignedp
);
3658 from
= force_not_mem (from
);
3660 if (GET_MODE (to
) == SFmode
)
3662 if (GET_MODE (from
) == SImode
)
3663 libfcn
= floatsisf_libfunc
;
3664 else if (GET_MODE (from
) == DImode
)
3665 libfcn
= floatdisf_libfunc
;
3666 else if (GET_MODE (from
) == TImode
)
3667 libfcn
= floattisf_libfunc
;
3671 else if (GET_MODE (to
) == DFmode
)
3673 if (GET_MODE (from
) == SImode
)
3674 libfcn
= floatsidf_libfunc
;
3675 else if (GET_MODE (from
) == DImode
)
3676 libfcn
= floatdidf_libfunc
;
3677 else if (GET_MODE (from
) == TImode
)
3678 libfcn
= floattidf_libfunc
;
3682 else if (GET_MODE (to
) == XFmode
)
3684 if (GET_MODE (from
) == SImode
)
3685 libfcn
= floatsixf_libfunc
;
3686 else if (GET_MODE (from
) == DImode
)
3687 libfcn
= floatdixf_libfunc
;
3688 else if (GET_MODE (from
) == TImode
)
3689 libfcn
= floattixf_libfunc
;
3693 else if (GET_MODE (to
) == TFmode
)
3695 if (GET_MODE (from
) == SImode
)
3696 libfcn
= floatsitf_libfunc
;
3697 else if (GET_MODE (from
) == DImode
)
3698 libfcn
= floatditf_libfunc
;
3699 else if (GET_MODE (from
) == TImode
)
3700 libfcn
= floattitf_libfunc
;
3709 value
= emit_library_call_value (libfcn
, NULL_RTX
, 1,
3711 1, from
, GET_MODE (from
));
3712 insns
= get_insns ();
3715 emit_libcall_block (insns
, target
, value
,
3716 gen_rtx (FLOAT
, GET_MODE (to
), from
));
3721 /* Copy result to requested destination
3722 if we have been computing in a temp location. */
3726 if (GET_MODE (target
) == GET_MODE (to
))
3727 emit_move_insn (to
, target
);
3729 convert_move (to
, target
, 0);
3733 /* expand_fix: generate code to convert FROM to fixed point
3734 and store in TO. FROM must be floating point. */
3740 rtx temp
= gen_reg_rtx (GET_MODE (x
));
3741 return expand_unop (GET_MODE (x
), ftrunc_optab
, x
, temp
, 0);
3745 expand_fix (to
, from
, unsignedp
)
3746 register rtx to
, from
;
3749 enum insn_code icode
;
3750 register rtx target
= to
;
3751 enum machine_mode fmode
, imode
;
3755 /* We first try to find a pair of modes, one real and one integer, at
3756 least as wide as FROM and TO, respectively, in which we can open-code
3757 this conversion. If the integer mode is wider than the mode of TO,
3758 we can do the conversion either signed or unsigned. */
3760 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
3761 imode
= GET_MODE_WIDER_MODE (imode
))
3762 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
3763 fmode
= GET_MODE_WIDER_MODE (fmode
))
3765 int doing_unsigned
= unsignedp
;
3767 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
3768 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
3769 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
3771 if (icode
!= CODE_FOR_nothing
)
3773 to
= protect_from_queue (to
, 1);
3774 from
= protect_from_queue (from
, 0);
3776 if (fmode
!= GET_MODE (from
))
3777 from
= convert_to_mode (fmode
, from
, 0);
3780 from
= ftruncify (from
);
3782 if (imode
!= GET_MODE (to
))
3783 target
= gen_reg_rtx (imode
);
3785 emit_unop_insn (icode
, target
, from
,
3786 doing_unsigned
? UNSIGNED_FIX
: FIX
);
3788 convert_move (to
, target
, unsignedp
);
3793 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3794 /* For an unsigned conversion, there is one more way to do it.
3795 If we have a signed conversion, we generate code that compares
3796 the real value to the largest representable positive number. If if
3797 is smaller, the conversion is done normally. Otherwise, subtract
3798 one plus the highest signed number, convert, and add it back.
3800 We only need to check all real modes, since we know we didn't find
3801 anything with a wider integer mode. */
3803 if (unsignedp
&& GET_MODE_BITSIZE (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
3804 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
3805 fmode
= GET_MODE_WIDER_MODE (fmode
))
3806 /* Make sure we won't lose significant bits doing this. */
3807 if (GET_MODE_BITSIZE (fmode
) > GET_MODE_BITSIZE (GET_MODE (to
))
3808 && CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0,
3812 REAL_VALUE_TYPE offset
;
3813 rtx limit
, lab1
, lab2
, insn
;
3815 bitsize
= GET_MODE_BITSIZE (GET_MODE (to
));
3816 offset
= REAL_VALUE_LDEXP (dconst1
, bitsize
- 1);
3817 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
3818 lab1
= gen_label_rtx ();
3819 lab2
= gen_label_rtx ();
3822 to
= protect_from_queue (to
, 1);
3823 from
= protect_from_queue (from
, 0);
3826 from
= force_not_mem (from
);
3828 if (fmode
!= GET_MODE (from
))
3829 from
= convert_to_mode (fmode
, from
, 0);
3831 /* See if we need to do the subtraction. */
3832 do_pending_stack_adjust ();
3833 emit_cmp_insn (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
), 0, 0);
3834 emit_jump_insn (gen_bge (lab1
));
3836 /* If not, do the signed "fix" and branch around fixup code. */
3837 expand_fix (to
, from
, 0);
3838 emit_jump_insn (gen_jump (lab2
));
3841 /* Otherwise, subtract 2**(N-1), convert to signed number,
3842 then add 2**(N-1). Do the addition using XOR since this
3843 will often generate better code. */
3845 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
3846 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
3847 expand_fix (to
, target
, 0);
3848 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
3849 GEN_INT ((HOST_WIDE_INT
) 1 << (bitsize
- 1)),
3850 to
, 1, OPTAB_LIB_WIDEN
);
3853 emit_move_insn (to
, target
);
3857 if (mov_optab
->handlers
[(int) GET_MODE (to
)].insn_code
3858 != CODE_FOR_nothing
)
3860 /* Make a place for a REG_NOTE and add it. */
3861 insn
= emit_move_insn (to
, to
);
3862 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
3863 gen_rtx (UNSIGNED_FIX
, GET_MODE (to
),
3871 /* We can't do it with an insn, so use a library call. But first ensure
3872 that the mode of TO is at least as wide as SImode, since those are the
3873 only library calls we know about. */
3875 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
3877 target
= gen_reg_rtx (SImode
);
3879 expand_fix (target
, from
, unsignedp
);
3881 else if (GET_MODE (from
) == SFmode
)
3883 if (GET_MODE (to
) == SImode
)
3884 libfcn
= unsignedp
? fixunssfsi_libfunc
: fixsfsi_libfunc
;
3885 else if (GET_MODE (to
) == DImode
)
3886 libfcn
= unsignedp
? fixunssfdi_libfunc
: fixsfdi_libfunc
;
3887 else if (GET_MODE (to
) == TImode
)
3888 libfcn
= unsignedp
? fixunssfti_libfunc
: fixsfti_libfunc
;
3892 else if (GET_MODE (from
) == DFmode
)
3894 if (GET_MODE (to
) == SImode
)
3895 libfcn
= unsignedp
? fixunsdfsi_libfunc
: fixdfsi_libfunc
;
3896 else if (GET_MODE (to
) == DImode
)
3897 libfcn
= unsignedp
? fixunsdfdi_libfunc
: fixdfdi_libfunc
;
3898 else if (GET_MODE (to
) == TImode
)
3899 libfcn
= unsignedp
? fixunsdfti_libfunc
: fixdfti_libfunc
;
3903 else if (GET_MODE (from
) == XFmode
)
3905 if (GET_MODE (to
) == SImode
)
3906 libfcn
= unsignedp
? fixunsxfsi_libfunc
: fixxfsi_libfunc
;
3907 else if (GET_MODE (to
) == DImode
)
3908 libfcn
= unsignedp
? fixunsxfdi_libfunc
: fixxfdi_libfunc
;
3909 else if (GET_MODE (to
) == TImode
)
3910 libfcn
= unsignedp
? fixunsxfti_libfunc
: fixxfti_libfunc
;
3914 else if (GET_MODE (from
) == TFmode
)
3916 if (GET_MODE (to
) == SImode
)
3917 libfcn
= unsignedp
? fixunstfsi_libfunc
: fixtfsi_libfunc
;
3918 else if (GET_MODE (to
) == DImode
)
3919 libfcn
= unsignedp
? fixunstfdi_libfunc
: fixtfdi_libfunc
;
3920 else if (GET_MODE (to
) == TImode
)
3921 libfcn
= unsignedp
? fixunstfti_libfunc
: fixtfti_libfunc
;
3933 to
= protect_from_queue (to
, 1);
3934 from
= protect_from_queue (from
, 0);
3937 from
= force_not_mem (from
);
3941 value
= emit_library_call_value (libfcn
, NULL_RTX
, 1, GET_MODE (to
),
3943 1, from
, GET_MODE (from
));
3944 insns
= get_insns ();
3947 emit_libcall_block (insns
, target
, value
,
3948 gen_rtx (unsignedp
? UNSIGNED_FIX
: FIX
,
3949 GET_MODE (to
), from
));
3954 if (GET_MODE (to
) == GET_MODE (target
))
3955 emit_move_insn (to
, target
);
3957 convert_move (to
, target
, 0);
3966 optab op
= (optab
) xmalloc (sizeof (struct optab
));
3968 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
3970 op
->handlers
[i
].insn_code
= CODE_FOR_nothing
;
3971 op
->handlers
[i
].libfunc
= 0;
3974 if (code
!= UNKNOWN
)
3975 code_to_optab
[(int) code
] = op
;
3980 /* Initialize the libfunc fields of an entire group of entries in some
3981 optab. Each entry is set equal to a string consisting of a leading
3982 pair of underscores followed by a generic operation name followed by
3983 a mode name (downshifted to lower case) followed by a single character
3984 representing the number of operands for the given operation (which is
3985 usually one of the characters '2', '3', or '4').
3987 OPTABLE is the table in which libfunc fields are to be initialized.
3988 FIRST_MODE is the first machine mode index in the given optab to
3990 LAST_MODE is the last machine mode index in the given optab to
3992 OPNAME is the generic (string) name of the operation.
3993 SUFFIX is the character which specifies the number of operands for
3994 the given generic operation.
3998 init_libfuncs (optable
, first_mode
, last_mode
, opname
, suffix
)
3999 register optab optable
;
4000 register int first_mode
;
4001 register int last_mode
;
4002 register char *opname
;
4003 register int suffix
;
4006 register unsigned opname_len
= strlen (opname
);
4008 for (mode
= first_mode
; (int) mode
<= (int) last_mode
;
4009 mode
= (enum machine_mode
) ((int) mode
+ 1))
4011 register char *mname
= mode_name
[(int) mode
];
4012 register unsigned mname_len
= strlen (mname
);
4013 register char *libfunc_name
4014 = (char *) xmalloc (2 + opname_len
+ mname_len
+ 1 + 1);
4021 for (q
= opname
; *q
; )
4023 for (q
= mname
; *q
; q
++)
4024 *p
++ = tolower (*q
);
4027 optable
->handlers
[(int) mode
].libfunc
4028 = gen_rtx (SYMBOL_REF
, Pmode
, libfunc_name
);
4032 /* Initialize the libfunc fields of an entire group of entries in some
4033 optab which correspond to all integer mode operations. The parameters
4034 have the same meaning as similarly named ones for the `init_libfuncs'
4035 routine. (See above). */
4038 init_integral_libfuncs (optable
, opname
, suffix
)
4039 register optab optable
;
4040 register char *opname
;
4041 register int suffix
;
4043 init_libfuncs (optable
, SImode
, TImode
, opname
, suffix
);
4046 /* Initialize the libfunc fields of an entire group of entries in some
4047 optab which correspond to all real mode operations. The parameters
4048 have the same meaning as similarly named ones for the `init_libfuncs'
4049 routine. (See above). */
4052 init_floating_libfuncs (optable
, opname
, suffix
)
4053 register optab optable
;
4054 register char *opname
;
4055 register int suffix
;
4057 init_libfuncs (optable
, SFmode
, TFmode
, opname
, suffix
);
4061 /* Call this once to initialize the contents of the optabs
4062 appropriately for the current target machine. */
4068 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
4074 /* Start by initializing all tables to contain CODE_FOR_nothing. */
4076 for (p
= fixtab
[0][0];
4077 p
< fixtab
[0][0] + sizeof fixtab
/ sizeof (fixtab
[0][0][0]);
4079 *p
= CODE_FOR_nothing
;
4081 for (p
= fixtrunctab
[0][0];
4082 p
< fixtrunctab
[0][0] + sizeof fixtrunctab
/ sizeof (fixtrunctab
[0][0][0]);
4084 *p
= CODE_FOR_nothing
;
4086 for (p
= floattab
[0][0];
4087 p
< floattab
[0][0] + sizeof floattab
/ sizeof (floattab
[0][0][0]);
4089 *p
= CODE_FOR_nothing
;
4091 for (p
= extendtab
[0][0];
4092 p
< extendtab
[0][0] + sizeof extendtab
/ sizeof extendtab
[0][0][0];
4094 *p
= CODE_FOR_nothing
;
4096 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
4097 setcc_gen_code
[i
] = CODE_FOR_nothing
;
4099 #ifdef HAVE_conditional_move
4100 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4101 movcc_gen_code
[i
] = CODE_FOR_nothing
;
4104 add_optab
= init_optab (PLUS
);
4105 sub_optab
= init_optab (MINUS
);
4106 smul_optab
= init_optab (MULT
);
4107 smul_highpart_optab
= init_optab (UNKNOWN
);
4108 umul_highpart_optab
= init_optab (UNKNOWN
);
4109 smul_widen_optab
= init_optab (UNKNOWN
);
4110 umul_widen_optab
= init_optab (UNKNOWN
);
4111 sdiv_optab
= init_optab (DIV
);
4112 sdivmod_optab
= init_optab (UNKNOWN
);
4113 udiv_optab
= init_optab (UDIV
);
4114 udivmod_optab
= init_optab (UNKNOWN
);
4115 smod_optab
= init_optab (MOD
);
4116 umod_optab
= init_optab (UMOD
);
4117 flodiv_optab
= init_optab (DIV
);
4118 ftrunc_optab
= init_optab (UNKNOWN
);
4119 and_optab
= init_optab (AND
);
4120 ior_optab
= init_optab (IOR
);
4121 xor_optab
= init_optab (XOR
);
4122 ashl_optab
= init_optab (ASHIFT
);
4123 ashr_optab
= init_optab (ASHIFTRT
);
4124 lshr_optab
= init_optab (LSHIFTRT
);
4125 rotl_optab
= init_optab (ROTATE
);
4126 rotr_optab
= init_optab (ROTATERT
);
4127 smin_optab
= init_optab (SMIN
);
4128 smax_optab
= init_optab (SMAX
);
4129 umin_optab
= init_optab (UMIN
);
4130 umax_optab
= init_optab (UMAX
);
4131 mov_optab
= init_optab (UNKNOWN
);
4132 movstrict_optab
= init_optab (UNKNOWN
);
4133 cmp_optab
= init_optab (UNKNOWN
);
4134 ucmp_optab
= init_optab (UNKNOWN
);
4135 tst_optab
= init_optab (UNKNOWN
);
4136 neg_optab
= init_optab (NEG
);
4137 abs_optab
= init_optab (ABS
);
4138 one_cmpl_optab
= init_optab (NOT
);
4139 ffs_optab
= init_optab (FFS
);
4140 sqrt_optab
= init_optab (SQRT
);
4141 sin_optab
= init_optab (UNKNOWN
);
4142 cos_optab
= init_optab (UNKNOWN
);
4143 strlen_optab
= init_optab (UNKNOWN
);
4145 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4147 movstr_optab
[i
] = CODE_FOR_nothing
;
4148 clrstr_optab
[i
] = CODE_FOR_nothing
;
4150 #ifdef HAVE_SECONDARY_RELOADS
4151 reload_in_optab
[i
] = reload_out_optab
[i
] = CODE_FOR_nothing
;
4155 /* Fill in the optabs with the insns we support. */
4158 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
4159 /* This flag says the same insns that convert to a signed fixnum
4160 also convert validly to an unsigned one. */
4161 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4162 for (j
= 0; j
< NUM_MACHINE_MODES
; j
++)
4163 fixtrunctab
[i
][j
][1] = fixtrunctab
[i
][j
][0];
4166 #ifdef EXTRA_CC_MODES
4170 /* Initialize the optabs with the names of the library functions. */
4171 init_integral_libfuncs (add_optab
, "add", '3');
4172 init_floating_libfuncs (add_optab
, "add", '3');
4173 init_integral_libfuncs (sub_optab
, "sub", '3');
4174 init_floating_libfuncs (sub_optab
, "sub", '3');
4175 init_integral_libfuncs (smul_optab
, "mul", '3');
4176 init_floating_libfuncs (smul_optab
, "mul", '3');
4177 init_integral_libfuncs (sdiv_optab
, "div", '3');
4178 init_integral_libfuncs (udiv_optab
, "udiv", '3');
4179 init_integral_libfuncs (sdivmod_optab
, "divmod", '4');
4180 init_integral_libfuncs (udivmod_optab
, "udivmod", '4');
4181 init_integral_libfuncs (smod_optab
, "mod", '3');
4182 init_integral_libfuncs (umod_optab
, "umod", '3');
4183 init_floating_libfuncs (flodiv_optab
, "div", '3');
4184 init_floating_libfuncs (ftrunc_optab
, "ftrunc", '2');
4185 init_integral_libfuncs (and_optab
, "and", '3');
4186 init_integral_libfuncs (ior_optab
, "ior", '3');
4187 init_integral_libfuncs (xor_optab
, "xor", '3');
4188 init_integral_libfuncs (ashl_optab
, "ashl", '3');
4189 init_integral_libfuncs (ashr_optab
, "ashr", '3');
4190 init_integral_libfuncs (lshr_optab
, "lshr", '3');
4191 init_integral_libfuncs (smin_optab
, "min", '3');
4192 init_floating_libfuncs (smin_optab
, "min", '3');
4193 init_integral_libfuncs (smax_optab
, "max", '3');
4194 init_floating_libfuncs (smax_optab
, "max", '3');
4195 init_integral_libfuncs (umin_optab
, "umin", '3');
4196 init_integral_libfuncs (umax_optab
, "umax", '3');
4197 init_integral_libfuncs (neg_optab
, "neg", '2');
4198 init_floating_libfuncs (neg_optab
, "neg", '2');
4199 init_integral_libfuncs (one_cmpl_optab
, "one_cmpl", '2');
4200 init_integral_libfuncs (ffs_optab
, "ffs", '2');
4202 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
4203 init_integral_libfuncs (cmp_optab
, "cmp", '2');
4204 init_integral_libfuncs (ucmp_optab
, "ucmp", '2');
4205 init_floating_libfuncs (cmp_optab
, "cmp", '2');
4207 #ifdef MULSI3_LIBCALL
4208 smul_optab
->handlers
[(int) SImode
].libfunc
4209 = gen_rtx (SYMBOL_REF
, Pmode
, MULSI3_LIBCALL
);
4211 #ifdef MULDI3_LIBCALL
4212 smul_optab
->handlers
[(int) DImode
].libfunc
4213 = gen_rtx (SYMBOL_REF
, Pmode
, MULDI3_LIBCALL
);
4216 #ifdef DIVSI3_LIBCALL
4217 sdiv_optab
->handlers
[(int) SImode
].libfunc
4218 = gen_rtx (SYMBOL_REF
, Pmode
, DIVSI3_LIBCALL
);
4220 #ifdef DIVDI3_LIBCALL
4221 sdiv_optab
->handlers
[(int) DImode
].libfunc
4222 = gen_rtx (SYMBOL_REF
, Pmode
, DIVDI3_LIBCALL
);
4225 #ifdef UDIVSI3_LIBCALL
4226 udiv_optab
->handlers
[(int) SImode
].libfunc
4227 = gen_rtx (SYMBOL_REF
, Pmode
, UDIVSI3_LIBCALL
);
4229 #ifdef UDIVDI3_LIBCALL
4230 udiv_optab
->handlers
[(int) DImode
].libfunc
4231 = gen_rtx (SYMBOL_REF
, Pmode
, UDIVDI3_LIBCALL
);
4234 #ifdef MODSI3_LIBCALL
4235 smod_optab
->handlers
[(int) SImode
].libfunc
4236 = gen_rtx (SYMBOL_REF
, Pmode
, MODSI3_LIBCALL
);
4238 #ifdef MODDI3_LIBCALL
4239 smod_optab
->handlers
[(int) DImode
].libfunc
4240 = gen_rtx (SYMBOL_REF
, Pmode
, MODDI3_LIBCALL
);
4243 #ifdef UMODSI3_LIBCALL
4244 umod_optab
->handlers
[(int) SImode
].libfunc
4245 = gen_rtx (SYMBOL_REF
, Pmode
, UMODSI3_LIBCALL
);
4247 #ifdef UMODDI3_LIBCALL
4248 umod_optab
->handlers
[(int) DImode
].libfunc
4249 = gen_rtx (SYMBOL_REF
, Pmode
, UMODDI3_LIBCALL
);
4252 /* Use cabs for DC complex abs, since systems generally have cabs.
4253 Don't define any libcall for SCmode, so that cabs will be used. */
4254 abs_optab
->handlers
[(int) DCmode
].libfunc
4255 = gen_rtx (SYMBOL_REF
, Pmode
, "cabs");
4257 /* The ffs function operates on `int'. */
4258 #ifndef INT_TYPE_SIZE
4259 #define INT_TYPE_SIZE BITS_PER_WORD
4261 ffs_optab
->handlers
[(int) mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0)] .libfunc
4262 = gen_rtx (SYMBOL_REF
, Pmode
, "ffs");
4264 extendsfdf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__extendsfdf2");
4265 extendsfxf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__extendsfxf2");
4266 extendsftf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__extendsftf2");
4267 extenddfxf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__extenddfxf2");
4268 extenddftf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__extenddftf2");
4270 truncdfsf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__truncdfsf2");
4271 truncxfsf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__truncxfsf2");
4272 trunctfsf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__trunctfsf2");
4273 truncxfdf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__truncxfdf2");
4274 trunctfdf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__trunctfdf2");
4276 memcpy_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "memcpy");
4277 bcopy_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "bcopy");
4278 memcmp_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "memcmp");
4279 bcmp_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gcc_bcmp");
4280 memset_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "memset");
4281 bzero_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "bzero");
4283 throw_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__throw");
4284 sjthrow_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__sjthrow");
4285 sjpopnthrow_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__sjpopnthrow");
4286 terminate_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__terminate");
4287 #ifndef DONT_USE_BUILTIN_SETJMP
4288 setjmp_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__builtin_setjmp");
4289 longjmp_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__builtin_longjmp");
4291 setjmp_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "setjmp");
4292 longjmp_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "longjmp");
4295 eqhf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__eqhf2");
4296 nehf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__nehf2");
4297 gthf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gthf2");
4298 gehf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gehf2");
4299 lthf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__lthf2");
4300 lehf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__lehf2");
4302 eqsf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__eqsf2");
4303 nesf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__nesf2");
4304 gtsf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gtsf2");
4305 gesf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gesf2");
4306 ltsf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__ltsf2");
4307 lesf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__lesf2");
4309 eqdf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__eqdf2");
4310 nedf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__nedf2");
4311 gtdf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gtdf2");
4312 gedf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gedf2");
4313 ltdf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__ltdf2");
4314 ledf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__ledf2");
4316 eqxf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__eqxf2");
4317 nexf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__nexf2");
4318 gtxf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gtxf2");
4319 gexf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gexf2");
4320 ltxf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__ltxf2");
4321 lexf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__lexf2");
4323 eqtf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__eqtf2");
4324 netf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__netf2");
4325 gttf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__gttf2");
4326 getf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__getf2");
4327 lttf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__lttf2");
4328 letf2_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__letf2");
4330 floatsisf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatsisf");
4331 floatdisf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatdisf");
4332 floattisf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floattisf");
4334 floatsidf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatsidf");
4335 floatdidf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatdidf");
4336 floattidf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floattidf");
4338 floatsixf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatsixf");
4339 floatdixf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatdixf");
4340 floattixf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floattixf");
4342 floatsitf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatsitf");
4343 floatditf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floatditf");
4344 floattitf_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__floattitf");
4346 fixsfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixsfsi");
4347 fixsfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixsfdi");
4348 fixsfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixsfti");
4350 fixdfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixdfsi");
4351 fixdfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixdfdi");
4352 fixdfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixdfti");
4354 fixxfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixxfsi");
4355 fixxfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixxfdi");
4356 fixxfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixxfti");
4358 fixtfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixtfsi");
4359 fixtfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixtfdi");
4360 fixtfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixtfti");
4362 fixunssfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunssfsi");
4363 fixunssfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunssfdi");
4364 fixunssfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunssfti");
4366 fixunsdfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunsdfsi");
4367 fixunsdfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunsdfdi");
4368 fixunsdfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunsdfti");
4370 fixunsxfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunsxfsi");
4371 fixunsxfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunsxfdi");
4372 fixunsxfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunsxfti");
4374 fixunstfsi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunstfsi");
4375 fixunstfdi_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunstfdi");
4376 fixunstfti_libfunc
= gen_rtx (SYMBOL_REF
, Pmode
, "__fixunstfti");
4378 /* For check-memory-usage. */
4379 chkr_check_addr_libfunc
= gen_rtx (SYMBOL_REF
, VOIDmode
, "chkr_check_addr");
4380 chkr_set_right_libfunc
= gen_rtx (SYMBOL_REF
, VOIDmode
, "chkr_set_right");
4381 chkr_copy_bitmap_libfunc
= gen_rtx (SYMBOL_REF
, VOIDmode
, "chkr_copy_bitmap");
4382 chkr_check_exec_libfunc
= gen_rtx (SYMBOL_REF
, VOIDmode
, "chkr_check_exec");
4383 chkr_check_str_libfunc
= gen_rtx (SYMBOL_REF
, VOIDmode
, "chkr_check_str");
4385 #ifdef INIT_TARGET_OPTABS
4386 /* Allow the target to add more libcalls or rename some, etc. */
4393 /* SCO 3.2 apparently has a broken ldexp. */
4406 #endif /* BROKEN_LDEXP */