1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 88, 92-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
26 /* Include insn-config.h before expr.h so that HAVE_conditional_move
27 is properly defined. */
28 #include "insn-config.h"
33 #include "insn-flags.h"
34 #include "insn-codes.h"
41 /* Each optab contains info on how this target machine
42 can perform a particular operation
43 for all sizes and kinds of operands.
45 The operation to be performed is often specified
46 by passing one of these optabs as an argument.
48 See expr.h for documentation of these optabs. */
50 optab optab_table
[OTI_MAX
];
52 rtx libfunc_table
[LTI_MAX
];
54 /* Tables of patterns for extending one integer mode to another. */
55 enum insn_code extendtab
[MAX_MACHINE_MODE
][MAX_MACHINE_MODE
][2];
57 /* Tables of patterns for converting between fixed and floating point. */
58 enum insn_code fixtab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
59 enum insn_code fixtrunctab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
60 enum insn_code floattab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
62 /* Contains the optab used for each rtx code. */
63 optab code_to_optab
[NUM_RTX_CODE
+ 1];
65 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
66 gives the gen_function to make a branch to test that condition. */
68 rtxfun bcc_gen_fctn
[NUM_RTX_CODE
];
70 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
71 gives the insn code to make a store-condition insn
72 to test that condition. */
74 enum insn_code setcc_gen_code
[NUM_RTX_CODE
];
76 #ifdef HAVE_conditional_move
77 /* Indexed by the machine mode, gives the insn code to make a conditional
78 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
79 setcc_gen_code to cut down on the number of named patterns. Consider a day
80 when a lot more rtx codes are conditional (eg: for the ARM). */
82 enum insn_code movcc_gen_code
[NUM_MACHINE_MODES
];
85 static int add_equal_note
PROTO((rtx
, rtx
, enum rtx_code
, rtx
, rtx
));
86 static rtx widen_operand
PROTO((rtx
, enum machine_mode
,
87 enum machine_mode
, int, int));
88 static int expand_cmplxdiv_straight
PROTO((rtx
, rtx
, rtx
, rtx
,
89 rtx
, rtx
, enum machine_mode
,
90 int, enum optab_methods
,
91 enum mode_class
, optab
));
92 static int expand_cmplxdiv_wide
PROTO((rtx
, rtx
, rtx
, rtx
,
93 rtx
, rtx
, enum machine_mode
,
94 int, enum optab_methods
,
95 enum mode_class
, optab
));
96 static enum insn_code can_fix_p
PROTO((enum machine_mode
, enum machine_mode
,
98 static enum insn_code can_float_p
PROTO((enum machine_mode
, enum machine_mode
,
100 static rtx ftruncify
PROTO((rtx
));
101 static optab init_optab
PROTO((enum rtx_code
));
102 static void init_libfuncs
PROTO((optab
, int, int, const char *, int));
103 static void init_integral_libfuncs
PROTO((optab
, const char *, int));
104 static void init_floating_libfuncs
PROTO((optab
, const char *, int));
105 #ifdef HAVE_conditional_trap
106 static void init_traps
PROTO((void));
108 static void emit_cmp_and_jump_insn_1
PROTO((rtx
, rtx
, enum machine_mode
,
109 enum rtx_code
, int, rtx
));
110 static void prepare_float_lib_cmp
PROTO((rtx
*, rtx
*, enum rtx_code
*,
111 enum machine_mode
*, int *));
113 /* Add a REG_EQUAL note to the last insn in SEQ. TARGET is being set to
114 the result of operation CODE applied to OP0 (and OP1 if it is a binary
117 If the last insn does not set TARGET, don't do anything, but return 1.
119 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
120 don't add the REG_EQUAL note but return 0. Our caller can then try
121 again, ensuring that TARGET is not one of the operands. */
124 add_equal_note (seq
, target
, code
, op0
, op1
)
134 if ((GET_RTX_CLASS (code
) != '1' && GET_RTX_CLASS (code
) != '2'
135 && GET_RTX_CLASS (code
) != 'c' && GET_RTX_CLASS (code
) != '<')
136 || GET_CODE (seq
) != SEQUENCE
137 || (set
= single_set (XVECEXP (seq
, 0, XVECLEN (seq
, 0) - 1))) == 0
138 || GET_CODE (target
) == ZERO_EXTRACT
139 || (! rtx_equal_p (SET_DEST (set
), target
)
140 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the
142 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
143 || ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set
), 0)),
147 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
148 besides the last insn. */
149 if (reg_overlap_mentioned_p (target
, op0
)
150 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
151 for (i
= XVECLEN (seq
, 0) - 2; i
>= 0; i
--)
152 if (reg_set_p (target
, XVECEXP (seq
, 0, i
)))
155 if (GET_RTX_CLASS (code
) == '1')
156 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
158 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
160 set_unique_reg_note (XVECEXP (seq
, 0, XVECLEN (seq
, 0) - 1), REG_EQUAL
, note
);
165 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
166 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
167 not actually do a sign-extend or zero-extend, but can leave the
168 higher-order bits of the result rtx undefined, for example, in the case
169 of logical operations, but not right shifts. */
172 widen_operand (op
, mode
, oldmode
, unsignedp
, no_extend
)
174 enum machine_mode mode
, oldmode
;
180 /* If we must extend do so. If OP is either a constant or a SUBREG
181 for a promoted object, also extend since it will be more efficient to
184 || GET_MODE (op
) == VOIDmode
185 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)))
186 return convert_modes (mode
, oldmode
, op
, unsignedp
);
188 /* If MODE is no wider than a single word, we return a paradoxical
190 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
191 return gen_rtx_SUBREG (mode
, force_reg (GET_MODE (op
), op
), 0);
193 /* Otherwise, get an object of MODE, clobber it, and set the low-order
196 result
= gen_reg_rtx (mode
);
197 emit_insn (gen_rtx_CLOBBER (VOIDmode
, result
));
198 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
202 /* Generate code to perform a straightforward complex divide. */
205 expand_cmplxdiv_straight (real0
, real1
, imag0
, imag1
, realr
, imagr
, submode
,
206 unsignedp
, methods
, class, binoptab
)
207 rtx real0
, real1
, imag0
, imag1
, realr
, imagr
;
208 enum machine_mode submode
;
210 enum optab_methods methods
;
211 enum mode_class
class;
219 /* Don't fetch these from memory more than once. */
220 real0
= force_reg (submode
, real0
);
221 real1
= force_reg (submode
, real1
);
224 imag0
= force_reg (submode
, imag0
);
226 imag1
= force_reg (submode
, imag1
);
228 /* Divisor: c*c + d*d. */
229 temp1
= expand_binop (submode
, smul_optab
, real1
, real1
,
230 NULL_RTX
, unsignedp
, methods
);
232 temp2
= expand_binop (submode
, smul_optab
, imag1
, imag1
,
233 NULL_RTX
, unsignedp
, methods
);
235 if (temp1
== 0 || temp2
== 0)
238 divisor
= expand_binop (submode
, add_optab
, temp1
, temp2
,
239 NULL_RTX
, unsignedp
, methods
);
245 /* Mathematically, ((a)(c-id))/divisor. */
246 /* Computationally, (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)). */
248 /* Calculate the dividend. */
249 real_t
= expand_binop (submode
, smul_optab
, real0
, real1
,
250 NULL_RTX
, unsignedp
, methods
);
252 imag_t
= expand_binop (submode
, smul_optab
, real0
, imag1
,
253 NULL_RTX
, unsignedp
, methods
);
255 if (real_t
== 0 || imag_t
== 0)
258 imag_t
= expand_unop (submode
, neg_optab
, imag_t
,
259 NULL_RTX
, unsignedp
);
263 /* Mathematically, ((a+ib)(c-id))/divider. */
264 /* Calculate the dividend. */
265 temp1
= expand_binop (submode
, smul_optab
, real0
, real1
,
266 NULL_RTX
, unsignedp
, methods
);
268 temp2
= expand_binop (submode
, smul_optab
, imag0
, imag1
,
269 NULL_RTX
, unsignedp
, methods
);
271 if (temp1
== 0 || temp2
== 0)
274 real_t
= expand_binop (submode
, add_optab
, temp1
, temp2
,
275 NULL_RTX
, unsignedp
, methods
);
277 temp1
= expand_binop (submode
, smul_optab
, imag0
, real1
,
278 NULL_RTX
, unsignedp
, methods
);
280 temp2
= expand_binop (submode
, smul_optab
, real0
, imag1
,
281 NULL_RTX
, unsignedp
, methods
);
283 if (temp1
== 0 || temp2
== 0)
286 imag_t
= expand_binop (submode
, sub_optab
, temp1
, temp2
,
287 NULL_RTX
, unsignedp
, methods
);
289 if (real_t
== 0 || imag_t
== 0)
293 if (class == MODE_COMPLEX_FLOAT
)
294 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
295 realr
, unsignedp
, methods
);
297 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
298 real_t
, divisor
, realr
, unsignedp
);
304 emit_move_insn (realr
, res
);
306 if (class == MODE_COMPLEX_FLOAT
)
307 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
308 imagr
, unsignedp
, methods
);
310 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
311 imag_t
, divisor
, imagr
, unsignedp
);
317 emit_move_insn (imagr
, res
);
322 /* Generate code to perform a wide-input-range-acceptable complex divide. */
325 expand_cmplxdiv_wide (real0
, real1
, imag0
, imag1
, realr
, imagr
, submode
,
326 unsignedp
, methods
, class, binoptab
)
327 rtx real0
, real1
, imag0
, imag1
, realr
, imagr
;
328 enum machine_mode submode
;
330 enum optab_methods methods
;
331 enum mode_class
class;
336 rtx temp1
, temp2
, lab1
, lab2
;
337 enum machine_mode mode
;
341 /* Don't fetch these from memory more than once. */
342 real0
= force_reg (submode
, real0
);
343 real1
= force_reg (submode
, real1
);
346 imag0
= force_reg (submode
, imag0
);
348 imag1
= force_reg (submode
, imag1
);
350 /* XXX What's an "unsigned" complex number? */
358 temp1
= expand_abs (submode
, real1
, NULL_RTX
, 1);
359 temp2
= expand_abs (submode
, imag1
, NULL_RTX
, 1);
362 if (temp1
== 0 || temp2
== 0)
365 mode
= GET_MODE (temp1
);
366 align
= GET_MODE_ALIGNMENT (mode
);
367 lab1
= gen_label_rtx ();
368 emit_cmp_and_jump_insns (temp1
, temp2
, LT
, NULL_RTX
,
369 mode
, unsignedp
, align
, lab1
);
371 /* |c| >= |d|; use ratio d/c to scale dividend and divisor. */
373 if (class == MODE_COMPLEX_FLOAT
)
374 ratio
= expand_binop (submode
, binoptab
, imag1
, real1
,
375 NULL_RTX
, unsignedp
, methods
);
377 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
378 imag1
, real1
, NULL_RTX
, unsignedp
);
383 /* Calculate divisor. */
385 temp1
= expand_binop (submode
, smul_optab
, imag1
, ratio
,
386 NULL_RTX
, unsignedp
, methods
);
391 divisor
= expand_binop (submode
, add_optab
, temp1
, real1
,
392 NULL_RTX
, unsignedp
, methods
);
397 /* Calculate dividend. */
403 /* Compute a / (c+id) as a / (c+d(d/c)) + i (-a(d/c)) / (c+d(d/c)). */
405 imag_t
= expand_binop (submode
, smul_optab
, real0
, ratio
,
406 NULL_RTX
, unsignedp
, methods
);
411 imag_t
= expand_unop (submode
, neg_optab
, imag_t
,
412 NULL_RTX
, unsignedp
);
414 if (real_t
== 0 || imag_t
== 0)
419 /* Compute (a+ib)/(c+id) as
420 (a+b(d/c))/(c+d(d/c) + i(b-a(d/c))/(c+d(d/c)). */
422 temp1
= expand_binop (submode
, smul_optab
, imag0
, ratio
,
423 NULL_RTX
, unsignedp
, methods
);
428 real_t
= expand_binop (submode
, add_optab
, temp1
, real0
,
429 NULL_RTX
, unsignedp
, methods
);
431 temp1
= expand_binop (submode
, smul_optab
, real0
, ratio
,
432 NULL_RTX
, unsignedp
, methods
);
437 imag_t
= expand_binop (submode
, sub_optab
, imag0
, temp1
,
438 NULL_RTX
, unsignedp
, methods
);
440 if (real_t
== 0 || imag_t
== 0)
444 if (class == MODE_COMPLEX_FLOAT
)
445 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
446 realr
, unsignedp
, methods
);
448 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
449 real_t
, divisor
, realr
, unsignedp
);
455 emit_move_insn (realr
, res
);
457 if (class == MODE_COMPLEX_FLOAT
)
458 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
459 imagr
, unsignedp
, methods
);
461 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
462 imag_t
, divisor
, imagr
, unsignedp
);
468 emit_move_insn (imagr
, res
);
470 lab2
= gen_label_rtx ();
471 emit_jump_insn (gen_jump (lab2
));
476 /* |d| > |c|; use ratio c/d to scale dividend and divisor. */
478 if (class == MODE_COMPLEX_FLOAT
)
479 ratio
= expand_binop (submode
, binoptab
, real1
, imag1
,
480 NULL_RTX
, unsignedp
, methods
);
482 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
483 real1
, imag1
, NULL_RTX
, unsignedp
);
488 /* Calculate divisor. */
490 temp1
= expand_binop (submode
, smul_optab
, real1
, ratio
,
491 NULL_RTX
, unsignedp
, methods
);
496 divisor
= expand_binop (submode
, add_optab
, temp1
, imag1
,
497 NULL_RTX
, unsignedp
, methods
);
502 /* Calculate dividend. */
506 /* Compute a / (c+id) as a(c/d) / (c(c/d)+d) + i (-a) / (c(c/d)+d). */
508 real_t
= expand_binop (submode
, smul_optab
, real0
, ratio
,
509 NULL_RTX
, unsignedp
, methods
);
511 imag_t
= expand_unop (submode
, neg_optab
, real0
,
512 NULL_RTX
, unsignedp
);
514 if (real_t
== 0 || imag_t
== 0)
519 /* Compute (a+ib)/(c+id) as
520 (a(c/d)+b)/(c(c/d)+d) + i (b(c/d)-a)/(c(c/d)+d). */
522 temp1
= expand_binop (submode
, smul_optab
, real0
, ratio
,
523 NULL_RTX
, unsignedp
, methods
);
528 real_t
= expand_binop (submode
, add_optab
, temp1
, imag0
,
529 NULL_RTX
, unsignedp
, methods
);
531 temp1
= expand_binop (submode
, smul_optab
, imag0
, ratio
,
532 NULL_RTX
, unsignedp
, methods
);
537 imag_t
= expand_binop (submode
, sub_optab
, temp1
, real0
,
538 NULL_RTX
, unsignedp
, methods
);
540 if (real_t
== 0 || imag_t
== 0)
544 if (class == MODE_COMPLEX_FLOAT
)
545 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
546 realr
, unsignedp
, methods
);
548 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
549 real_t
, divisor
, realr
, unsignedp
);
555 emit_move_insn (realr
, res
);
557 if (class == MODE_COMPLEX_FLOAT
)
558 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
559 imagr
, unsignedp
, methods
);
561 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
562 imag_t
, divisor
, imagr
, unsignedp
);
568 emit_move_insn (imagr
, res
);
575 /* Generate code to perform an operation specified by BINOPTAB
576 on operands OP0 and OP1, with result having machine-mode MODE.
578 UNSIGNEDP is for the case where we have to widen the operands
579 to perform the operation. It says to use zero-extension.
581 If TARGET is nonzero, the value
582 is generated there, if it is convenient to do so.
583 In all cases an rtx is returned for the locus of the value;
584 this may or may not be TARGET. */
587 expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
)
588 enum machine_mode mode
;
593 enum optab_methods methods
;
595 enum optab_methods next_methods
596 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
597 ? OPTAB_WIDEN
: methods
);
598 enum mode_class
class;
599 enum machine_mode wider_mode
;
601 int commutative_op
= 0;
602 int shift_op
= (binoptab
->code
== ASHIFT
603 || binoptab
->code
== ASHIFTRT
604 || binoptab
->code
== LSHIFTRT
605 || binoptab
->code
== ROTATE
606 || binoptab
->code
== ROTATERT
);
607 rtx entry_last
= get_last_insn ();
610 class = GET_MODE_CLASS (mode
);
612 op0
= protect_from_queue (op0
, 0);
613 op1
= protect_from_queue (op1
, 0);
615 target
= protect_from_queue (target
, 1);
619 op0
= force_not_mem (op0
);
620 op1
= force_not_mem (op1
);
623 /* If subtracting an integer constant, convert this into an addition of
624 the negated constant. */
626 if (binoptab
== sub_optab
&& GET_CODE (op1
) == CONST_INT
)
628 op1
= negate_rtx (mode
, op1
);
629 binoptab
= add_optab
;
632 /* If we are inside an appropriately-short loop and one operand is an
633 expensive constant, force it into a register. */
634 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
635 && rtx_cost (op0
, binoptab
->code
) > 2)
636 op0
= force_reg (mode
, op0
);
638 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
639 && ! shift_op
&& rtx_cost (op1
, binoptab
->code
) > 2)
640 op1
= force_reg (mode
, op1
);
642 /* Record where to delete back to if we backtrack. */
643 last
= get_last_insn ();
645 /* If operation is commutative,
646 try to make the first operand a register.
647 Even better, try to make it the same as the target.
648 Also try to make the last operand a constant. */
649 if (GET_RTX_CLASS (binoptab
->code
) == 'c'
650 || binoptab
== smul_widen_optab
651 || binoptab
== umul_widen_optab
652 || binoptab
== smul_highpart_optab
653 || binoptab
== umul_highpart_optab
)
657 if (((target
== 0 || GET_CODE (target
) == REG
)
658 ? ((GET_CODE (op1
) == REG
659 && GET_CODE (op0
) != REG
)
661 : rtx_equal_p (op1
, target
))
662 || GET_CODE (op0
) == CONST_INT
)
670 /* If we can do it with a three-operand insn, do so. */
672 if (methods
!= OPTAB_MUST_WIDEN
673 && binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
675 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
676 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
677 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
679 rtx xop0
= op0
, xop1
= op1
;
684 temp
= gen_reg_rtx (mode
);
686 /* If it is a commutative operator and the modes would match
687 if we would swap the operands, we can save the conversions. */
690 if (GET_MODE (op0
) != mode0
&& GET_MODE (op1
) != mode1
691 && GET_MODE (op0
) == mode1
&& GET_MODE (op1
) == mode0
)
695 tmp
= op0
; op0
= op1
; op1
= tmp
;
696 tmp
= xop0
; xop0
= xop1
; xop1
= tmp
;
700 /* In case the insn wants input operands in modes different from
701 the result, convert the operands. */
703 if (GET_MODE (op0
) != VOIDmode
704 && GET_MODE (op0
) != mode0
705 && mode0
!= VOIDmode
)
706 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
708 if (GET_MODE (xop1
) != VOIDmode
709 && GET_MODE (xop1
) != mode1
710 && mode1
!= VOIDmode
)
711 xop1
= convert_to_mode (mode1
, xop1
, unsignedp
);
713 /* Now, if insn's predicates don't allow our operands, put them into
716 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
)
717 && mode0
!= VOIDmode
)
718 xop0
= copy_to_mode_reg (mode0
, xop0
);
720 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
)
721 && mode1
!= VOIDmode
)
722 xop1
= copy_to_mode_reg (mode1
, xop1
);
724 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
725 temp
= gen_reg_rtx (mode
);
727 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
730 /* If PAT is a multi-insn sequence, try to add an appropriate
731 REG_EQUAL note to it. If we can't because TEMP conflicts with an
732 operand, call ourselves again, this time without a target. */
733 if (GET_CODE (pat
) == SEQUENCE
734 && ! add_equal_note (pat
, temp
, binoptab
->code
, xop0
, xop1
))
736 delete_insns_since (last
);
737 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
745 delete_insns_since (last
);
748 /* If this is a multiply, see if we can do a widening operation that
749 takes operands of this mode and makes a wider mode. */
751 if (binoptab
== smul_optab
&& GET_MODE_WIDER_MODE (mode
) != VOIDmode
752 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
753 ->handlers
[(int) GET_MODE_WIDER_MODE (mode
)].insn_code
)
754 != CODE_FOR_nothing
))
756 temp
= expand_binop (GET_MODE_WIDER_MODE (mode
),
757 unsignedp
? umul_widen_optab
: smul_widen_optab
,
758 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
762 if (GET_MODE_CLASS (mode
) == MODE_INT
)
763 return gen_lowpart (mode
, temp
);
765 return convert_to_mode (mode
, temp
, unsignedp
);
769 /* Look for a wider mode of the same class for which we think we
770 can open-code the operation. Check for a widening multiply at the
771 wider mode as well. */
773 if ((class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
774 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
775 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
776 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
778 if (binoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
779 || (binoptab
== smul_optab
780 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
781 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
782 ->handlers
[(int) GET_MODE_WIDER_MODE (wider_mode
)].insn_code
)
783 != CODE_FOR_nothing
)))
785 rtx xop0
= op0
, xop1
= op1
;
788 /* For certain integer operations, we need not actually extend
789 the narrow operands, as long as we will truncate
790 the results to the same narrowness. */
792 if ((binoptab
== ior_optab
|| binoptab
== and_optab
793 || binoptab
== xor_optab
794 || binoptab
== add_optab
|| binoptab
== sub_optab
795 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
796 && class == MODE_INT
)
799 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
801 /* The second operand of a shift must always be extended. */
802 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
803 no_extend
&& binoptab
!= ashl_optab
);
805 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
806 unsignedp
, OPTAB_DIRECT
);
809 if (class != MODE_INT
)
812 target
= gen_reg_rtx (mode
);
813 convert_move (target
, temp
, 0);
817 return gen_lowpart (mode
, temp
);
820 delete_insns_since (last
);
824 /* These can be done a word at a time. */
825 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
827 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
828 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
834 /* If TARGET is the same as one of the operands, the REG_EQUAL note
835 won't be accurate, so use a new target. */
836 if (target
== 0 || target
== op0
|| target
== op1
)
837 target
= gen_reg_rtx (mode
);
841 /* Do the actual arithmetic. */
842 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
844 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
845 rtx x
= expand_binop (word_mode
, binoptab
,
846 operand_subword_force (op0
, i
, mode
),
847 operand_subword_force (op1
, i
, mode
),
848 target_piece
, unsignedp
, next_methods
);
853 if (target_piece
!= x
)
854 emit_move_insn (target_piece
, x
);
857 insns
= get_insns ();
860 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
862 if (binoptab
->code
!= UNKNOWN
)
864 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
865 copy_rtx (op0
), copy_rtx (op1
));
869 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
874 /* Synthesize double word shifts from single word shifts. */
875 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
876 || binoptab
== ashr_optab
)
878 && GET_CODE (op1
) == CONST_INT
879 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
880 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
881 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
882 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
884 rtx insns
, inter
, equiv_value
;
885 rtx into_target
, outof_target
;
886 rtx into_input
, outof_input
;
887 int shift_count
, left_shift
, outof_word
;
889 /* If TARGET is the same as one of the operands, the REG_EQUAL note
890 won't be accurate, so use a new target. */
891 if (target
== 0 || target
== op0
|| target
== op1
)
892 target
= gen_reg_rtx (mode
);
896 shift_count
= INTVAL (op1
);
898 /* OUTOF_* is the word we are shifting bits away from, and
899 INTO_* is the word that we are shifting bits towards, thus
900 they differ depending on the direction of the shift and
903 left_shift
= binoptab
== ashl_optab
;
904 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
906 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
907 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
909 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
910 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
912 if (shift_count
>= BITS_PER_WORD
)
914 inter
= expand_binop (word_mode
, binoptab
,
916 GEN_INT (shift_count
- BITS_PER_WORD
),
917 into_target
, unsignedp
, next_methods
);
919 if (inter
!= 0 && inter
!= into_target
)
920 emit_move_insn (into_target
, inter
);
922 /* For a signed right shift, we must fill the word we are shifting
923 out of with copies of the sign bit. Otherwise it is zeroed. */
924 if (inter
!= 0 && binoptab
!= ashr_optab
)
925 inter
= CONST0_RTX (word_mode
);
927 inter
= expand_binop (word_mode
, binoptab
,
929 GEN_INT (BITS_PER_WORD
- 1),
930 outof_target
, unsignedp
, next_methods
);
932 if (inter
!= 0 && inter
!= outof_target
)
933 emit_move_insn (outof_target
, inter
);
938 optab reverse_unsigned_shift
, unsigned_shift
;
940 /* For a shift of less then BITS_PER_WORD, to compute the carry,
941 we must do a logical shift in the opposite direction of the
944 reverse_unsigned_shift
= (left_shift
? lshr_optab
: ashl_optab
);
946 /* For a shift of less than BITS_PER_WORD, to compute the word
947 shifted towards, we need to unsigned shift the orig value of
950 unsigned_shift
= (left_shift
? ashl_optab
: lshr_optab
);
952 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
954 GEN_INT (BITS_PER_WORD
- shift_count
),
955 0, unsignedp
, next_methods
);
960 inter
= expand_binop (word_mode
, unsigned_shift
, into_input
,
961 op1
, 0, unsignedp
, next_methods
);
964 inter
= expand_binop (word_mode
, ior_optab
, carries
, inter
,
965 into_target
, unsignedp
, next_methods
);
967 if (inter
!= 0 && inter
!= into_target
)
968 emit_move_insn (into_target
, inter
);
971 inter
= expand_binop (word_mode
, binoptab
, outof_input
,
972 op1
, outof_target
, unsignedp
, next_methods
);
974 if (inter
!= 0 && inter
!= outof_target
)
975 emit_move_insn (outof_target
, inter
);
978 insns
= get_insns ();
983 if (binoptab
->code
!= UNKNOWN
)
984 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
988 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
993 /* Synthesize double word rotates from single word shifts. */
994 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
996 && GET_CODE (op1
) == CONST_INT
997 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
998 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
999 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1001 rtx insns
, equiv_value
;
1002 rtx into_target
, outof_target
;
1003 rtx into_input
, outof_input
;
1005 int shift_count
, left_shift
, outof_word
;
1007 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1008 won't be accurate, so use a new target. */
1009 if (target
== 0 || target
== op0
|| target
== op1
)
1010 target
= gen_reg_rtx (mode
);
1014 shift_count
= INTVAL (op1
);
1016 /* OUTOF_* is the word we are shifting bits away from, and
1017 INTO_* is the word that we are shifting bits towards, thus
1018 they differ depending on the direction of the shift and
1019 WORDS_BIG_ENDIAN. */
1021 left_shift
= (binoptab
== rotl_optab
);
1022 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1024 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1025 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1027 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1028 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1030 if (shift_count
== BITS_PER_WORD
)
1032 /* This is just a word swap. */
1033 emit_move_insn (outof_target
, into_input
);
1034 emit_move_insn (into_target
, outof_input
);
1039 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1040 rtx first_shift_count
, second_shift_count
;
1041 optab reverse_unsigned_shift
, unsigned_shift
;
1043 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1044 ? lshr_optab
: ashl_optab
);
1046 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1047 ? ashl_optab
: lshr_optab
);
1049 if (shift_count
> BITS_PER_WORD
)
1051 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1052 second_shift_count
= GEN_INT (2*BITS_PER_WORD
- shift_count
);
1056 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1057 second_shift_count
= GEN_INT (shift_count
);
1060 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1061 outof_input
, first_shift_count
,
1062 NULL_RTX
, unsignedp
, next_methods
);
1063 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1064 into_input
, second_shift_count
,
1065 into_target
, unsignedp
, next_methods
);
1067 if (into_temp1
!= 0 && into_temp2
!= 0)
1068 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1069 into_target
, unsignedp
, next_methods
);
1073 if (inter
!= 0 && inter
!= into_target
)
1074 emit_move_insn (into_target
, inter
);
1076 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1077 into_input
, first_shift_count
,
1078 NULL_RTX
, unsignedp
, next_methods
);
1079 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1080 outof_input
, second_shift_count
,
1081 outof_target
, unsignedp
, next_methods
);
1083 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1084 inter
= expand_binop (word_mode
, ior_optab
,
1085 outof_temp1
, outof_temp2
,
1086 outof_target
, unsignedp
, next_methods
);
1088 if (inter
!= 0 && inter
!= outof_target
)
1089 emit_move_insn (outof_target
, inter
);
1092 insns
= get_insns ();
1097 if (binoptab
->code
!= UNKNOWN
)
1098 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1102 /* We can't make this a no conflict block if this is a word swap,
1103 because the word swap case fails if the input and output values
1104 are in the same register. */
1105 if (shift_count
!= BITS_PER_WORD
)
1106 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1115 /* These can be done a word at a time by propagating carries. */
1116 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1117 && class == MODE_INT
1118 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1119 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1122 rtx carry_tmp
= gen_reg_rtx (word_mode
);
1123 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1124 int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1125 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1128 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1129 value is one of those, use it. Otherwise, use 1 since it is the
1130 one easiest to get. */
1131 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1132 int normalizep
= STORE_FLAG_VALUE
;
1137 /* Prepare the operands. */
1138 xop0
= force_reg (mode
, op0
);
1139 xop1
= force_reg (mode
, op1
);
1141 if (target
== 0 || GET_CODE (target
) != REG
1142 || target
== xop0
|| target
== xop1
)
1143 target
= gen_reg_rtx (mode
);
1145 /* Indicate for flow that the entire target reg is being set. */
1146 if (GET_CODE (target
) == REG
)
1147 emit_insn (gen_rtx_CLOBBER (VOIDmode
, target
));
1149 /* Do the actual arithmetic. */
1150 for (i
= 0; i
< nwords
; i
++)
1152 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1153 rtx target_piece
= operand_subword (target
, index
, 1, mode
);
1154 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1155 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1158 /* Main add/subtract of the input operands. */
1159 x
= expand_binop (word_mode
, binoptab
,
1160 op0_piece
, op1_piece
,
1161 target_piece
, unsignedp
, next_methods
);
1167 /* Store carry from main add/subtract. */
1168 carry_out
= gen_reg_rtx (word_mode
);
1169 carry_out
= emit_store_flag_force (carry_out
,
1170 (binoptab
== add_optab
1173 word_mode
, 1, normalizep
);
1178 /* Add/subtract previous carry to main result. */
1179 x
= expand_binop (word_mode
,
1180 normalizep
== 1 ? binoptab
: otheroptab
,
1182 target_piece
, 1, next_methods
);
1185 else if (target_piece
!= x
)
1186 emit_move_insn (target_piece
, x
);
1190 /* THIS CODE HAS NOT BEEN TESTED. */
1191 /* Get out carry from adding/subtracting carry in. */
1192 carry_tmp
= emit_store_flag_force (carry_tmp
,
1193 binoptab
== add_optab
1196 word_mode
, 1, normalizep
);
1198 /* Logical-ior the two poss. carry together. */
1199 carry_out
= expand_binop (word_mode
, ior_optab
,
1200 carry_out
, carry_tmp
,
1201 carry_out
, 0, next_methods
);
1207 carry_in
= carry_out
;
1210 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
1212 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1214 rtx temp
= emit_move_insn (target
, target
);
1216 set_unique_reg_note (temp
,
1218 gen_rtx_fmt_ee (binoptab
->code
, mode
,
1227 delete_insns_since (last
);
1230 /* If we want to multiply two two-word values and have normal and widening
1231 multiplies of single-word values, we can do this with three smaller
1232 multiplications. Note that we do not make a REG_NO_CONFLICT block here
1233 because we are not operating on one word at a time.
1235 The multiplication proceeds as follows:
1236 _______________________
1237 [__op0_high_|__op0_low__]
1238 _______________________
1239 * [__op1_high_|__op1_low__]
1240 _______________________________________________
1241 _______________________
1242 (1) [__op0_low__*__op1_low__]
1243 _______________________
1244 (2a) [__op0_low__*__op1_high_]
1245 _______________________
1246 (2b) [__op0_high_*__op1_low__]
1247 _______________________
1248 (3) [__op0_high_*__op1_high_]
1251 This gives a 4-word result. Since we are only interested in the
1252 lower 2 words, partial result (3) and the upper words of (2a) and
1253 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1254 calculated using non-widening multiplication.
1256 (1), however, needs to be calculated with an unsigned widening
1257 multiplication. If this operation is not directly supported we
1258 try using a signed widening multiplication and adjust the result.
1259 This adjustment works as follows:
1261 If both operands are positive then no adjustment is needed.
1263 If the operands have different signs, for example op0_low < 0 and
1264 op1_low >= 0, the instruction treats the most significant bit of
1265 op0_low as a sign bit instead of a bit with significance
1266 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1267 with 2**BITS_PER_WORD - op0_low, and two's complements the
1268 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1271 Similarly, if both operands are negative, we need to add
1272 (op0_low + op1_low) * 2**BITS_PER_WORD.
1274 We use a trick to adjust quickly. We logically shift op0_low right
1275 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1276 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1277 logical shift exists, we do an arithmetic right shift and subtract
1280 if (binoptab
== smul_optab
1281 && class == MODE_INT
1282 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1283 && smul_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1284 && add_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1285 && ((umul_widen_optab
->handlers
[(int) mode
].insn_code
1286 != CODE_FOR_nothing
)
1287 || (smul_widen_optab
->handlers
[(int) mode
].insn_code
1288 != CODE_FOR_nothing
)))
1290 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1291 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1292 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1293 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1294 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1295 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1297 rtx op0_xhigh
= NULL_RTX
;
1298 rtx op1_xhigh
= NULL_RTX
;
1300 /* If the target is the same as one of the inputs, don't use it. This
1301 prevents problems with the REG_EQUAL note. */
1302 if (target
== op0
|| target
== op1
1303 || (target
!= 0 && GET_CODE (target
) != REG
))
1306 /* Multiply the two lower words to get a double-word product.
1307 If unsigned widening multiplication is available, use that;
1308 otherwise use the signed form and compensate. */
1310 if (umul_widen_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1312 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1313 target
, 1, OPTAB_DIRECT
);
1315 /* If we didn't succeed, delete everything we did so far. */
1317 delete_insns_since (last
);
1319 op0_xhigh
= op0_high
, op1_xhigh
= op1_high
;
1323 && smul_widen_optab
->handlers
[(int) mode
].insn_code
1324 != CODE_FOR_nothing
)
1326 rtx wordm1
= GEN_INT (BITS_PER_WORD
- 1);
1327 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1328 target
, 1, OPTAB_DIRECT
);
1329 op0_xhigh
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1330 NULL_RTX
, 1, next_methods
);
1332 op0_xhigh
= expand_binop (word_mode
, add_optab
, op0_high
,
1333 op0_xhigh
, op0_xhigh
, 0, next_methods
);
1336 op0_xhigh
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1337 NULL_RTX
, 0, next_methods
);
1339 op0_xhigh
= expand_binop (word_mode
, sub_optab
, op0_high
,
1340 op0_xhigh
, op0_xhigh
, 0,
1344 op1_xhigh
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1345 NULL_RTX
, 1, next_methods
);
1347 op1_xhigh
= expand_binop (word_mode
, add_optab
, op1_high
,
1348 op1_xhigh
, op1_xhigh
, 0, next_methods
);
1351 op1_xhigh
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1352 NULL_RTX
, 0, next_methods
);
1354 op1_xhigh
= expand_binop (word_mode
, sub_optab
, op1_high
,
1355 op1_xhigh
, op1_xhigh
, 0,
1360 /* If we have been able to directly compute the product of the
1361 low-order words of the operands and perform any required adjustments
1362 of the operands, we proceed by trying two more multiplications
1363 and then computing the appropriate sum.
1365 We have checked above that the required addition is provided.
1366 Full-word addition will normally always succeed, especially if
1367 it is provided at all, so we don't worry about its failure. The
1368 multiplication may well fail, however, so we do handle that. */
1370 if (product
&& op0_xhigh
&& op1_xhigh
)
1372 rtx product_high
= operand_subword (product
, high
, 1, mode
);
1373 rtx temp
= expand_binop (word_mode
, binoptab
, op0_low
, op1_xhigh
,
1374 NULL_RTX
, 0, OPTAB_DIRECT
);
1377 temp
= expand_binop (word_mode
, add_optab
, temp
, product_high
,
1378 product_high
, 0, next_methods
);
1380 if (temp
!= 0 && temp
!= product_high
)
1381 emit_move_insn (product_high
, temp
);
1384 temp
= expand_binop (word_mode
, binoptab
, op1_low
, op0_xhigh
,
1385 NULL_RTX
, 0, OPTAB_DIRECT
);
1388 temp
= expand_binop (word_mode
, add_optab
, temp
,
1389 product_high
, product_high
,
1392 if (temp
!= 0 && temp
!= product_high
)
1393 emit_move_insn (product_high
, temp
);
1397 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1399 temp
= emit_move_insn (product
, product
);
1400 set_unique_reg_note (temp
,
1402 gen_rtx_fmt_ee (MULT
, mode
,
1411 /* If we get here, we couldn't do it for some reason even though we
1412 originally thought we could. Delete anything we've emitted in
1415 delete_insns_since (last
);
1418 /* We need to open-code the complex type operations: '+, -, * and /' */
1420 /* At this point we allow operations between two similar complex
1421 numbers, and also if one of the operands is not a complex number
1422 but rather of MODE_FLOAT or MODE_INT. However, the caller
1423 must make sure that the MODE of the non-complex operand matches
1424 the SUBMODE of the complex operand. */
1426 if (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
)
1428 rtx real0
= 0, imag0
= 0;
1429 rtx real1
= 0, imag1
= 0;
1430 rtx realr
, imagr
, res
;
1435 /* Find the correct mode for the real and imaginary parts */
1436 enum machine_mode submode
1437 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
1438 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
1441 if (submode
== BLKmode
)
1445 target
= gen_reg_rtx (mode
);
1449 realr
= gen_realpart (submode
, target
);
1450 imagr
= gen_imagpart (submode
, target
);
1452 if (GET_MODE (op0
) == mode
)
1454 real0
= gen_realpart (submode
, op0
);
1455 imag0
= gen_imagpart (submode
, op0
);
1460 if (GET_MODE (op1
) == mode
)
1462 real1
= gen_realpart (submode
, op1
);
1463 imag1
= gen_imagpart (submode
, op1
);
1468 if (real0
== 0 || real1
== 0 || ! (imag0
!= 0|| imag1
!= 0))
1471 switch (binoptab
->code
)
1474 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1476 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1477 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1478 realr
, unsignedp
, methods
);
1482 else if (res
!= realr
)
1483 emit_move_insn (realr
, res
);
1486 res
= expand_binop (submode
, binoptab
, imag0
, imag1
,
1487 imagr
, unsignedp
, methods
);
1490 else if (binoptab
->code
== MINUS
)
1491 res
= expand_unop (submode
, neg_optab
, imag1
, imagr
, unsignedp
);
1497 else if (res
!= imagr
)
1498 emit_move_insn (imagr
, res
);
1504 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1510 /* Don't fetch these from memory more than once. */
1511 real0
= force_reg (submode
, real0
);
1512 real1
= force_reg (submode
, real1
);
1513 imag0
= force_reg (submode
, imag0
);
1514 imag1
= force_reg (submode
, imag1
);
1516 temp1
= expand_binop (submode
, binoptab
, real0
, real1
, NULL_RTX
,
1517 unsignedp
, methods
);
1519 temp2
= expand_binop (submode
, binoptab
, imag0
, imag1
, NULL_RTX
,
1520 unsignedp
, methods
);
1522 if (temp1
== 0 || temp2
== 0)
1525 res
= expand_binop (submode
, sub_optab
, temp1
, temp2
,
1526 realr
, unsignedp
, methods
);
1530 else if (res
!= realr
)
1531 emit_move_insn (realr
, res
);
1533 temp1
= expand_binop (submode
, binoptab
, real0
, imag1
,
1534 NULL_RTX
, unsignedp
, methods
);
1536 temp2
= expand_binop (submode
, binoptab
, real1
, imag0
,
1537 NULL_RTX
, unsignedp
, methods
);
1539 if (temp1
== 0 || temp2
== 0)
1542 res
= expand_binop (submode
, add_optab
, temp1
, temp2
,
1543 imagr
, unsignedp
, methods
);
1547 else if (res
!= imagr
)
1548 emit_move_insn (imagr
, res
);
1554 /* Don't fetch these from memory more than once. */
1555 real0
= force_reg (submode
, real0
);
1556 real1
= force_reg (submode
, real1
);
1558 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1559 realr
, unsignedp
, methods
);
1562 else if (res
!= realr
)
1563 emit_move_insn (realr
, res
);
1566 res
= expand_binop (submode
, binoptab
,
1567 real1
, imag0
, imagr
, unsignedp
, methods
);
1569 res
= expand_binop (submode
, binoptab
,
1570 real0
, imag1
, imagr
, unsignedp
, methods
);
1574 else if (res
!= imagr
)
1575 emit_move_insn (imagr
, res
);
1582 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1586 /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1588 /* Don't fetch these from memory more than once. */
1589 real1
= force_reg (submode
, real1
);
1591 /* Simply divide the real and imaginary parts by `c' */
1592 if (class == MODE_COMPLEX_FLOAT
)
1593 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1594 realr
, unsignedp
, methods
);
1596 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1597 real0
, real1
, realr
, unsignedp
);
1601 else if (res
!= realr
)
1602 emit_move_insn (realr
, res
);
1604 if (class == MODE_COMPLEX_FLOAT
)
1605 res
= expand_binop (submode
, binoptab
, imag0
, real1
,
1606 imagr
, unsignedp
, methods
);
1608 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1609 imag0
, real1
, imagr
, unsignedp
);
1613 else if (res
!= imagr
)
1614 emit_move_insn (imagr
, res
);
1620 switch (flag_complex_divide_method
)
1623 ok
= expand_cmplxdiv_straight (real0
, real1
, imag0
, imag1
,
1624 realr
, imagr
, submode
,
1630 ok
= expand_cmplxdiv_wide (real0
, real1
, imag0
, imag1
,
1631 realr
, imagr
, submode
,
1651 if (binoptab
->code
!= UNKNOWN
)
1653 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
1654 copy_rtx (op0
), copy_rtx (op1
));
1658 emit_no_conflict_block (seq
, target
, op0
, op1
, equiv_value
);
1664 /* It can't be open-coded in this mode.
1665 Use a library call if one is available and caller says that's ok. */
1667 if (binoptab
->handlers
[(int) mode
].libfunc
1668 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
1672 enum machine_mode op1_mode
= mode
;
1679 op1_mode
= word_mode
;
1680 /* Specify unsigned here,
1681 since negative shift counts are meaningless. */
1682 op1x
= convert_to_mode (word_mode
, op1
, 1);
1685 if (GET_MODE (op0
) != VOIDmode
1686 && GET_MODE (op0
) != mode
)
1687 op0
= convert_to_mode (mode
, op0
, unsignedp
);
1689 /* Pass 1 for NO_QUEUE so we don't lose any increments
1690 if the libcall is cse'd or moved. */
1691 value
= emit_library_call_value (binoptab
->handlers
[(int) mode
].libfunc
,
1692 NULL_RTX
, 1, mode
, 2,
1693 op0
, mode
, op1x
, op1_mode
);
1695 insns
= get_insns ();
1698 target
= gen_reg_rtx (mode
);
1699 emit_libcall_block (insns
, target
, value
,
1700 gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
));
1705 delete_insns_since (last
);
1707 /* It can't be done in this mode. Can we do it in a wider mode? */
1709 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
1710 || methods
== OPTAB_MUST_WIDEN
))
1712 /* Caller says, don't even try. */
1713 delete_insns_since (entry_last
);
1717 /* Compute the value of METHODS to pass to recursive calls.
1718 Don't allow widening to be tried recursively. */
1720 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
1722 /* Look for a wider mode of the same class for which it appears we can do
1725 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1727 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1728 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1730 if ((binoptab
->handlers
[(int) wider_mode
].insn_code
1731 != CODE_FOR_nothing
)
1732 || (methods
== OPTAB_LIB
1733 && binoptab
->handlers
[(int) wider_mode
].libfunc
))
1735 rtx xop0
= op0
, xop1
= op1
;
1738 /* For certain integer operations, we need not actually extend
1739 the narrow operands, as long as we will truncate
1740 the results to the same narrowness. */
1742 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1743 || binoptab
== xor_optab
1744 || binoptab
== add_optab
|| binoptab
== sub_optab
1745 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1746 && class == MODE_INT
)
1749 xop0
= widen_operand (xop0
, wider_mode
, mode
,
1750 unsignedp
, no_extend
);
1752 /* The second operand of a shift must always be extended. */
1753 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1754 no_extend
&& binoptab
!= ashl_optab
);
1756 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1757 unsignedp
, methods
);
1760 if (class != MODE_INT
)
1763 target
= gen_reg_rtx (mode
);
1764 convert_move (target
, temp
, 0);
1768 return gen_lowpart (mode
, temp
);
1771 delete_insns_since (last
);
1776 delete_insns_since (entry_last
);
1780 /* Expand a binary operator which has both signed and unsigned forms.
1781 UOPTAB is the optab for unsigned operations, and SOPTAB is for
1784 If we widen unsigned operands, we may use a signed wider operation instead
1785 of an unsigned wider operation, since the result would be the same. */
1788 sign_expand_binop (mode
, uoptab
, soptab
, op0
, op1
, target
, unsignedp
, methods
)
1789 enum machine_mode mode
;
1790 optab uoptab
, soptab
;
1791 rtx op0
, op1
, target
;
1793 enum optab_methods methods
;
1796 optab direct_optab
= unsignedp
? uoptab
: soptab
;
1797 struct optab wide_soptab
;
1799 /* Do it without widening, if possible. */
1800 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
1801 unsignedp
, OPTAB_DIRECT
);
1802 if (temp
|| methods
== OPTAB_DIRECT
)
1805 /* Try widening to a signed int. Make a fake signed optab that
1806 hides any signed insn for direct use. */
1807 wide_soptab
= *soptab
;
1808 wide_soptab
.handlers
[(int) mode
].insn_code
= CODE_FOR_nothing
;
1809 wide_soptab
.handlers
[(int) mode
].libfunc
= 0;
1811 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
1812 unsignedp
, OPTAB_WIDEN
);
1814 /* For unsigned operands, try widening to an unsigned int. */
1815 if (temp
== 0 && unsignedp
)
1816 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
1817 unsignedp
, OPTAB_WIDEN
);
1818 if (temp
|| methods
== OPTAB_WIDEN
)
1821 /* Use the right width lib call if that exists. */
1822 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
1823 if (temp
|| methods
== OPTAB_LIB
)
1826 /* Must widen and use a lib call, use either signed or unsigned. */
1827 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
1828 unsignedp
, methods
);
1832 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
1833 unsignedp
, methods
);
1837 /* Generate code to perform an operation specified by BINOPTAB
1838 on operands OP0 and OP1, with two results to TARG1 and TARG2.
1839 We assume that the order of the operands for the instruction
1840 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
1841 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
1843 Either TARG0 or TARG1 may be zero, but what that means is that
1844 the result is not actually wanted. We will generate it into
1845 a dummy pseudo-reg and discard it. They may not both be zero.
1847 Returns 1 if this operation can be performed; 0 if not. */
1850 expand_twoval_binop (binoptab
, op0
, op1
, targ0
, targ1
, unsignedp
)
1856 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
1857 enum mode_class
class;
1858 enum machine_mode wider_mode
;
1859 rtx entry_last
= get_last_insn ();
1862 class = GET_MODE_CLASS (mode
);
1864 op0
= protect_from_queue (op0
, 0);
1865 op1
= protect_from_queue (op1
, 0);
1869 op0
= force_not_mem (op0
);
1870 op1
= force_not_mem (op1
);
1873 /* If we are inside an appropriately-short loop and one operand is an
1874 expensive constant, force it into a register. */
1875 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
1876 && rtx_cost (op0
, binoptab
->code
) > 2)
1877 op0
= force_reg (mode
, op0
);
1879 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
1880 && rtx_cost (op1
, binoptab
->code
) > 2)
1881 op1
= force_reg (mode
, op1
);
1884 targ0
= protect_from_queue (targ0
, 1);
1886 targ0
= gen_reg_rtx (mode
);
1888 targ1
= protect_from_queue (targ1
, 1);
1890 targ1
= gen_reg_rtx (mode
);
1892 /* Record where to go back to if we fail. */
1893 last
= get_last_insn ();
1895 if (binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1897 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
1898 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
1899 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
1901 rtx xop0
= op0
, xop1
= op1
;
1903 /* In case this insn wants input operands in modes different from the
1904 result, convert the operands. */
1905 if (GET_MODE (op0
) != VOIDmode
&& GET_MODE (op0
) != mode0
)
1906 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
1908 if (GET_MODE (op1
) != VOIDmode
&& GET_MODE (op1
) != mode1
)
1909 xop1
= convert_to_mode (mode1
, xop1
, unsignedp
);
1911 /* Now, if insn doesn't accept these operands, put them into pseudos. */
1912 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
1913 xop0
= copy_to_mode_reg (mode0
, xop0
);
1915 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
))
1916 xop1
= copy_to_mode_reg (mode1
, xop1
);
1918 /* We could handle this, but we should always be called with a pseudo
1919 for our targets and all insns should take them as outputs. */
1920 if (! (*insn_data
[icode
].operand
[0].predicate
) (targ0
, mode
)
1921 || ! (*insn_data
[icode
].operand
[3].predicate
) (targ1
, mode
))
1924 pat
= GEN_FCN (icode
) (targ0
, xop0
, xop1
, targ1
);
1931 delete_insns_since (last
);
1934 /* It can't be done in this mode. Can we do it in a wider mode? */
1936 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1938 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1939 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1941 if (binoptab
->handlers
[(int) wider_mode
].insn_code
1942 != CODE_FOR_nothing
)
1944 register rtx t0
= gen_reg_rtx (wider_mode
);
1945 register rtx t1
= gen_reg_rtx (wider_mode
);
1947 if (expand_twoval_binop (binoptab
,
1948 convert_modes (wider_mode
, mode
, op0
,
1950 convert_modes (wider_mode
, mode
, op1
,
1954 convert_move (targ0
, t0
, unsignedp
);
1955 convert_move (targ1
, t1
, unsignedp
);
1959 delete_insns_since (last
);
1964 delete_insns_since (entry_last
);
1968 /* Generate code to perform an operation specified by UNOPTAB
1969 on operand OP0, with result having machine-mode MODE.
1971 UNSIGNEDP is for the case where we have to widen the operands
1972 to perform the operation. It says to use zero-extension.
1974 If TARGET is nonzero, the value
1975 is generated there, if it is convenient to do so.
1976 In all cases an rtx is returned for the locus of the value;
1977 this may or may not be TARGET. */
1980 expand_unop (mode
, unoptab
, op0
, target
, unsignedp
)
1981 enum machine_mode mode
;
1987 enum mode_class
class;
1988 enum machine_mode wider_mode
;
1990 rtx last
= get_last_insn ();
1993 class = GET_MODE_CLASS (mode
);
1995 op0
= protect_from_queue (op0
, 0);
1999 op0
= force_not_mem (op0
);
2003 target
= protect_from_queue (target
, 1);
2005 if (unoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2007 int icode
= (int) unoptab
->handlers
[(int) mode
].insn_code
;
2008 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2014 temp
= gen_reg_rtx (mode
);
2016 if (GET_MODE (xop0
) != VOIDmode
2017 && GET_MODE (xop0
) != mode0
)
2018 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2020 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2022 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2023 xop0
= copy_to_mode_reg (mode0
, xop0
);
2025 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
2026 temp
= gen_reg_rtx (mode
);
2028 pat
= GEN_FCN (icode
) (temp
, xop0
);
2031 if (GET_CODE (pat
) == SEQUENCE
2032 && ! add_equal_note (pat
, temp
, unoptab
->code
, xop0
, NULL_RTX
))
2034 delete_insns_since (last
);
2035 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
2043 delete_insns_since (last
);
2046 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2048 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2049 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2050 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2052 if (unoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
2056 /* For certain operations, we need not actually extend
2057 the narrow operand, as long as we will truncate the
2058 results to the same narrowness. */
2060 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2061 (unoptab
== neg_optab
2062 || unoptab
== one_cmpl_optab
)
2063 && class == MODE_INT
);
2065 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2070 if (class != MODE_INT
)
2073 target
= gen_reg_rtx (mode
);
2074 convert_move (target
, temp
, 0);
2078 return gen_lowpart (mode
, temp
);
2081 delete_insns_since (last
);
2085 /* These can be done a word at a time. */
2086 if (unoptab
== one_cmpl_optab
2087 && class == MODE_INT
2088 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
2089 && unoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
2094 if (target
== 0 || target
== op0
)
2095 target
= gen_reg_rtx (mode
);
2099 /* Do the actual arithmetic. */
2100 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
2102 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
2103 rtx x
= expand_unop (word_mode
, unoptab
,
2104 operand_subword_force (op0
, i
, mode
),
2105 target_piece
, unsignedp
);
2106 if (target_piece
!= x
)
2107 emit_move_insn (target_piece
, x
);
2110 insns
= get_insns ();
2113 emit_no_conflict_block (insns
, target
, op0
, NULL_RTX
,
2114 gen_rtx_fmt_e (unoptab
->code
, mode
,
2119 /* Open-code the complex negation operation. */
2120 else if (unoptab
== neg_optab
2121 && (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
))
2127 /* Find the correct mode for the real and imaginary parts */
2128 enum machine_mode submode
2129 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
2130 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
2133 if (submode
== BLKmode
)
2137 target
= gen_reg_rtx (mode
);
2141 target_piece
= gen_imagpart (submode
, target
);
2142 x
= expand_unop (submode
, unoptab
,
2143 gen_imagpart (submode
, op0
),
2144 target_piece
, unsignedp
);
2145 if (target_piece
!= x
)
2146 emit_move_insn (target_piece
, x
);
2148 target_piece
= gen_realpart (submode
, target
);
2149 x
= expand_unop (submode
, unoptab
,
2150 gen_realpart (submode
, op0
),
2151 target_piece
, unsignedp
);
2152 if (target_piece
!= x
)
2153 emit_move_insn (target_piece
, x
);
2158 emit_no_conflict_block (seq
, target
, op0
, 0,
2159 gen_rtx_fmt_e (unoptab
->code
, mode
,
2164 /* Now try a library call in this mode. */
2165 if (unoptab
->handlers
[(int) mode
].libfunc
)
2172 /* Pass 1 for NO_QUEUE so we don't lose any increments
2173 if the libcall is cse'd or moved. */
2174 value
= emit_library_call_value (unoptab
->handlers
[(int) mode
].libfunc
,
2175 NULL_RTX
, 1, mode
, 1, op0
, mode
);
2176 insns
= get_insns ();
2179 target
= gen_reg_rtx (mode
);
2180 emit_libcall_block (insns
, target
, value
,
2181 gen_rtx_fmt_e (unoptab
->code
, mode
, op0
));
2186 /* It can't be done in this mode. Can we do it in a wider mode? */
2188 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2190 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2191 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2193 if ((unoptab
->handlers
[(int) wider_mode
].insn_code
2194 != CODE_FOR_nothing
)
2195 || unoptab
->handlers
[(int) wider_mode
].libfunc
)
2199 /* For certain operations, we need not actually extend
2200 the narrow operand, as long as we will truncate the
2201 results to the same narrowness. */
2203 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2204 (unoptab
== neg_optab
2205 || unoptab
== one_cmpl_optab
)
2206 && class == MODE_INT
);
2208 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2213 if (class != MODE_INT
)
2216 target
= gen_reg_rtx (mode
);
2217 convert_move (target
, temp
, 0);
2221 return gen_lowpart (mode
, temp
);
2224 delete_insns_since (last
);
2229 /* If there is no negate operation, try doing a subtract from zero.
2230 The US Software GOFAST library needs this. */
2231 if (unoptab
== neg_optab
)
2234 temp
= expand_binop (mode
, sub_optab
, CONST0_RTX (mode
), op0
,
2235 target
, unsignedp
, OPTAB_LIB_WIDEN
);
2243 /* Emit code to compute the absolute value of OP0, with result to
2244 TARGET if convenient. (TARGET may be 0.) The return value says
2245 where the result actually is to be found.
2247 MODE is the mode of the operand; the mode of the result is
2248 different but can be deduced from MODE.
2253 expand_abs (mode
, op0
, target
, safe
)
2254 enum machine_mode mode
;
2261 /* First try to do it with a special abs instruction. */
2262 temp
= expand_unop (mode
, abs_optab
, op0
, target
, 0);
2266 /* If this machine has expensive jumps, we can do integer absolute
2267 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
2268 where W is the width of MODE. */
2270 if (GET_MODE_CLASS (mode
) == MODE_INT
&& BRANCH_COST
>= 2)
2272 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
2273 size_int (GET_MODE_BITSIZE (mode
) - 1),
2276 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
2279 temp
= expand_binop (mode
, sub_optab
, temp
, extended
, target
, 0,
2286 /* If that does not win, use conditional jump and negate. */
2288 /* It is safe to use the target if it is the same
2289 as the source if this is also a pseudo register */
2290 if (op0
== target
&& GET_CODE (op0
) == REG
2291 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
2294 op1
= gen_label_rtx ();
2295 if (target
== 0 || ! safe
2296 || GET_MODE (target
) != mode
2297 || (GET_CODE (target
) == MEM
&& MEM_VOLATILE_P (target
))
2298 || (GET_CODE (target
) == REG
2299 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
2300 target
= gen_reg_rtx (mode
);
2302 emit_move_insn (target
, op0
);
2305 /* If this mode is an integer too wide to compare properly,
2306 compare word by word. Rely on CSE to optimize constant cases. */
2307 if (GET_MODE_CLASS (mode
) == MODE_INT
&& ! can_compare_p (mode
, ccp_jump
))
2308 do_jump_by_parts_greater_rtx (mode
, 0, target
, const0_rtx
,
2311 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
2312 NULL_RTX
, 0, NULL_RTX
, op1
);
2314 op0
= expand_unop (mode
, neg_optab
, target
, target
, 0);
2316 emit_move_insn (target
, op0
);
2322 /* Emit code to compute the absolute value of OP0, with result to
2323 TARGET if convenient. (TARGET may be 0.) The return value says
2324 where the result actually is to be found.
2326 MODE is the mode of the operand; the mode of the result is
2327 different but can be deduced from MODE.
2329 UNSIGNEDP is relevant for complex integer modes. */
2332 expand_complex_abs (mode
, op0
, target
, unsignedp
)
2333 enum machine_mode mode
;
2338 enum mode_class
class = GET_MODE_CLASS (mode
);
2339 enum machine_mode wider_mode
;
2341 rtx entry_last
= get_last_insn ();
2345 /* Find the correct mode for the real and imaginary parts. */
2346 enum machine_mode submode
2347 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
2348 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
2351 if (submode
== BLKmode
)
2354 op0
= protect_from_queue (op0
, 0);
2358 op0
= force_not_mem (op0
);
2361 last
= get_last_insn ();
2364 target
= protect_from_queue (target
, 1);
2366 if (abs_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2368 int icode
= (int) abs_optab
->handlers
[(int) mode
].insn_code
;
2369 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2375 temp
= gen_reg_rtx (submode
);
2377 if (GET_MODE (xop0
) != VOIDmode
2378 && GET_MODE (xop0
) != mode0
)
2379 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2381 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2383 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2384 xop0
= copy_to_mode_reg (mode0
, xop0
);
2386 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, submode
))
2387 temp
= gen_reg_rtx (submode
);
2389 pat
= GEN_FCN (icode
) (temp
, xop0
);
2392 if (GET_CODE (pat
) == SEQUENCE
2393 && ! add_equal_note (pat
, temp
, abs_optab
->code
, xop0
, NULL_RTX
))
2395 delete_insns_since (last
);
2396 return expand_unop (mode
, abs_optab
, op0
, NULL_RTX
, unsignedp
);
2404 delete_insns_since (last
);
2407 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2409 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2410 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2412 if (abs_optab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
2416 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
2417 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
2421 if (class != MODE_COMPLEX_INT
)
2424 target
= gen_reg_rtx (submode
);
2425 convert_move (target
, temp
, 0);
2429 return gen_lowpart (submode
, temp
);
2432 delete_insns_since (last
);
2436 /* Open-code the complex absolute-value operation
2437 if we can open-code sqrt. Otherwise it's not worth while. */
2438 if (sqrt_optab
->handlers
[(int) submode
].insn_code
!= CODE_FOR_nothing
)
2440 rtx real
, imag
, total
;
2442 real
= gen_realpart (submode
, op0
);
2443 imag
= gen_imagpart (submode
, op0
);
2445 /* Square both parts. */
2446 real
= expand_mult (submode
, real
, real
, NULL_RTX
, 0);
2447 imag
= expand_mult (submode
, imag
, imag
, NULL_RTX
, 0);
2449 /* Sum the parts. */
2450 total
= expand_binop (submode
, add_optab
, real
, imag
, NULL_RTX
,
2451 0, OPTAB_LIB_WIDEN
);
2453 /* Get sqrt in TARGET. Set TARGET to where the result is. */
2454 target
= expand_unop (submode
, sqrt_optab
, total
, target
, 0);
2456 delete_insns_since (last
);
2461 /* Now try a library call in this mode. */
2462 if (abs_optab
->handlers
[(int) mode
].libfunc
)
2469 /* Pass 1 for NO_QUEUE so we don't lose any increments
2470 if the libcall is cse'd or moved. */
2471 value
= emit_library_call_value (abs_optab
->handlers
[(int) mode
].libfunc
,
2472 NULL_RTX
, 1, submode
, 1, op0
, mode
);
2473 insns
= get_insns ();
2476 target
= gen_reg_rtx (submode
);
2477 emit_libcall_block (insns
, target
, value
,
2478 gen_rtx_fmt_e (abs_optab
->code
, mode
, op0
));
2483 /* It can't be done in this mode. Can we do it in a wider mode? */
2485 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2486 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2488 if ((abs_optab
->handlers
[(int) wider_mode
].insn_code
2489 != CODE_FOR_nothing
)
2490 || abs_optab
->handlers
[(int) wider_mode
].libfunc
)
2494 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
2496 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
2500 if (class != MODE_COMPLEX_INT
)
2503 target
= gen_reg_rtx (submode
);
2504 convert_move (target
, temp
, 0);
2508 return gen_lowpart (submode
, temp
);
2511 delete_insns_since (last
);
2515 delete_insns_since (entry_last
);
2519 /* Generate an instruction whose insn-code is INSN_CODE,
2520 with two operands: an output TARGET and an input OP0.
2521 TARGET *must* be nonzero, and the output is always stored there.
2522 CODE is an rtx code such that (CODE OP0) is an rtx that describes
2523 the value that is stored into TARGET. */
2526 emit_unop_insn (icode
, target
, op0
, code
)
2533 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2536 temp
= target
= protect_from_queue (target
, 1);
2538 op0
= protect_from_queue (op0
, 0);
2540 /* Sign and zero extension from memory is often done specially on
2541 RISC machines, so forcing into a register here can pessimize
2543 if (flag_force_mem
&& code
!= SIGN_EXTEND
&& code
!= ZERO_EXTEND
)
2544 op0
= force_not_mem (op0
);
2546 /* Now, if insn does not accept our operands, put them into pseudos. */
2548 if (! (*insn_data
[icode
].operand
[1].predicate
) (op0
, mode0
))
2549 op0
= copy_to_mode_reg (mode0
, op0
);
2551 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, GET_MODE (temp
))
2552 || (flag_force_mem
&& GET_CODE (temp
) == MEM
))
2553 temp
= gen_reg_rtx (GET_MODE (temp
));
2555 pat
= GEN_FCN (icode
) (temp
, op0
);
2557 if (GET_CODE (pat
) == SEQUENCE
&& code
!= UNKNOWN
)
2558 add_equal_note (pat
, temp
, code
, op0
, NULL_RTX
);
2563 emit_move_insn (target
, temp
);
2566 /* Emit code to perform a series of operations on a multi-word quantity, one
2569 Such a block is preceded by a CLOBBER of the output, consists of multiple
2570 insns, each setting one word of the output, and followed by a SET copying
2571 the output to itself.
2573 Each of the insns setting words of the output receives a REG_NO_CONFLICT
2574 note indicating that it doesn't conflict with the (also multi-word)
2575 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
2578 INSNS is a block of code generated to perform the operation, not including
2579 the CLOBBER and final copy. All insns that compute intermediate values
2580 are first emitted, followed by the block as described above.
2582 TARGET, OP0, and OP1 are the output and inputs of the operations,
2583 respectively. OP1 may be zero for a unary operation.
2585 EQUIV, if non-zero, is an expression to be placed into a REG_EQUAL note
2588 If TARGET is not a register, INSNS is simply emitted with no special
2589 processing. Likewise if anything in INSNS is not an INSN or if
2590 there is a libcall block inside INSNS.
2592 The final insn emitted is returned. */
2595 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv
)
2601 rtx prev
, next
, first
, last
, insn
;
2603 if (GET_CODE (target
) != REG
|| reload_in_progress
)
2604 return emit_insns (insns
);
2606 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
2607 if (GET_CODE (insn
) != INSN
2608 || find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
2609 return emit_insns (insns
);
2611 /* First emit all insns that do not store into words of the output and remove
2612 these from the list. */
2613 for (insn
= insns
; insn
; insn
= next
)
2618 next
= NEXT_INSN (insn
);
2620 if (GET_CODE (PATTERN (insn
)) == SET
|| GET_CODE (PATTERN (insn
)) == USE
2621 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
2622 set
= PATTERN (insn
);
2623 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2625 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2626 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
2628 set
= XVECEXP (PATTERN (insn
), 0, i
);
2636 if (! reg_overlap_mentioned_p (target
, SET_DEST (set
)))
2638 if (PREV_INSN (insn
))
2639 NEXT_INSN (PREV_INSN (insn
)) = next
;
2644 PREV_INSN (next
) = PREV_INSN (insn
);
2650 prev
= get_last_insn ();
2652 /* Now write the CLOBBER of the output, followed by the setting of each
2653 of the words, followed by the final copy. */
2654 if (target
!= op0
&& target
!= op1
)
2655 emit_insn (gen_rtx_CLOBBER (VOIDmode
, target
));
2657 for (insn
= insns
; insn
; insn
= next
)
2659 next
= NEXT_INSN (insn
);
2662 if (op1
&& GET_CODE (op1
) == REG
)
2663 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op1
,
2666 if (op0
&& GET_CODE (op0
) == REG
)
2667 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op0
,
2671 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
2672 != CODE_FOR_nothing
)
2674 last
= emit_move_insn (target
, target
);
2676 set_unique_reg_note (last
, REG_EQUAL
, equiv
);
2679 last
= get_last_insn ();
2682 first
= get_insns ();
2684 first
= NEXT_INSN (prev
);
2686 /* Encapsulate the block so it gets manipulated as a unit. */
2687 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
2689 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
, REG_NOTES (last
));
2694 /* Emit code to make a call to a constant function or a library call.
2696 INSNS is a list containing all insns emitted in the call.
2697 These insns leave the result in RESULT. Our block is to copy RESULT
2698 to TARGET, which is logically equivalent to EQUIV.
2700 We first emit any insns that set a pseudo on the assumption that these are
2701 loading constants into registers; doing so allows them to be safely cse'ed
2702 between blocks. Then we emit all the other insns in the block, followed by
2703 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
2704 note with an operand of EQUIV.
2706 Moving assignments to pseudos outside of the block is done to improve
2707 the generated code, but is not required to generate correct code,
2708 hence being unable to move an assignment is not grounds for not making
2709 a libcall block. There are two reasons why it is safe to leave these
2710 insns inside the block: First, we know that these pseudos cannot be
2711 used in generated RTL outside the block since they are created for
2712 temporary purposes within the block. Second, CSE will not record the
2713 values of anything set inside a libcall block, so we know they must
2714 be dead at the end of the block.
2716 Except for the first group of insns (the ones setting pseudos), the
2717 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
2720 emit_libcall_block (insns
, target
, result
, equiv
)
2726 rtx prev
, next
, first
, last
, insn
;
2728 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
2729 reg note to indicate that this call cannot throw. (Unless there is
2730 already a REG_EH_REGION note.) */
2732 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
2734 if (GET_CODE (insn
) == CALL_INSN
)
2736 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
2737 if (note
== NULL_RTX
)
2738 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_EH_REGION
, GEN_INT (-1),
2743 /* First emit all insns that set pseudos. Remove them from the list as
2744 we go. Avoid insns that set pseudos which were referenced in previous
2745 insns. These can be generated by move_by_pieces, for example,
2746 to update an address. Similarly, avoid insns that reference things
2747 set in previous insns. */
2749 for (insn
= insns
; insn
; insn
= next
)
2751 rtx set
= single_set (insn
);
2753 next
= NEXT_INSN (insn
);
2755 if (set
!= 0 && GET_CODE (SET_DEST (set
)) == REG
2756 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
2758 || (! reg_mentioned_p (SET_DEST (set
), PATTERN (insns
))
2759 && ! reg_used_between_p (SET_DEST (set
), insns
, insn
)
2760 && ! modified_in_p (SET_SRC (set
), insns
)
2761 && ! modified_between_p (SET_SRC (set
), insns
, insn
))))
2763 if (PREV_INSN (insn
))
2764 NEXT_INSN (PREV_INSN (insn
)) = next
;
2769 PREV_INSN (next
) = PREV_INSN (insn
);
2775 prev
= get_last_insn ();
2777 /* Write the remaining insns followed by the final copy. */
2779 for (insn
= insns
; insn
; insn
= next
)
2781 next
= NEXT_INSN (insn
);
2786 last
= emit_move_insn (target
, result
);
2787 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
2788 != CODE_FOR_nothing
)
2789 set_unique_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
));
2792 first
= get_insns ();
2794 first
= NEXT_INSN (prev
);
2796 /* Encapsulate the block so it gets manipulated as a unit. */
2797 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
2799 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
, REG_NOTES (last
));
2802 /* Generate code to store zero in X. */
2808 emit_move_insn (x
, const0_rtx
);
2811 /* Generate code to store 1 in X
2812 assuming it contains zero beforehand. */
2815 emit_0_to_1_insn (x
)
2818 emit_move_insn (x
, const1_rtx
);
2821 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
2822 If FOR_JUMP is nonzero, we will be generating a jump based on this
2823 comparison, otherwise a store-flags operation. */
2826 can_compare_p (mode
, purpose
)
2827 enum machine_mode mode
;
2828 enum can_compare_purpose purpose
;
2832 if (cmp_optab
->handlers
[(int)mode
].insn_code
!= CODE_FOR_nothing
)
2834 if (purpose
== ccp_jump
2835 && cbranch_optab
->handlers
[(int)mode
].insn_code
!= CODE_FOR_nothing
)
2837 if (purpose
== ccp_cmov
2838 && cmov_optab
->handlers
[(int)mode
].insn_code
!= CODE_FOR_nothing
)
2840 if (purpose
== ccp_store_flag
2841 && cstore_optab
->handlers
[(int)mode
].insn_code
!= CODE_FOR_nothing
)
2844 mode
= GET_MODE_WIDER_MODE (mode
);
2846 while (mode
!= VOIDmode
);
2851 /* This function is called when we are going to emit a compare instruction that
2852 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
2854 *PMODE is the mode of the inputs (in case they are const_int).
2855 *PUNSIGNEDP nonzero says that the operands are unsigned;
2856 this matters if they need to be widened.
2858 If they have mode BLKmode, then SIZE specifies the size of both operands,
2859 and ALIGN specifies the known shared alignment of the operands.
2861 This function performs all the setup necessary so that the caller only has
2862 to emit a single comparison insn. This setup can involve doing a BLKmode
2863 comparison or emitting a library call to perform the comparison if no insn
2864 is available to handle it.
2865 The values which are passed in through pointers can be modified; the caller
2866 should perform the comparison on the modified values. */
2869 prepare_cmp_insn (px
, py
, pcomparison
, size
, pmode
, punsignedp
, align
,
2872 enum rtx_code
*pcomparison
;
2874 enum machine_mode
*pmode
;
2877 enum can_compare_purpose purpose
;
2879 enum machine_mode mode
= *pmode
;
2880 rtx x
= *px
, y
= *py
;
2881 int unsignedp
= *punsignedp
;
2882 enum mode_class
class;
2884 class = GET_MODE_CLASS (mode
);
2886 /* They could both be VOIDmode if both args are immediate constants,
2887 but we should fold that at an earlier stage.
2888 With no special code here, this will call abort,
2889 reminding the programmer to implement such folding. */
2891 if (mode
!= BLKmode
&& flag_force_mem
)
2893 x
= force_not_mem (x
);
2894 y
= force_not_mem (y
);
2897 /* If we are inside an appropriately-short loop and one operand is an
2898 expensive constant, force it into a register. */
2899 if (CONSTANT_P (x
) && preserve_subexpressions_p () && rtx_cost (x
, COMPARE
) > 2)
2900 x
= force_reg (mode
, x
);
2902 if (CONSTANT_P (y
) && preserve_subexpressions_p () && rtx_cost (y
, COMPARE
) > 2)
2903 y
= force_reg (mode
, y
);
2906 /* Abort if we have a non-canonical comparison. The RTL documentation
2907 states that canonical comparisons are required only for targets which
2909 if (CONSTANT_P (x
) && ! CONSTANT_P (y
))
2913 /* Don't let both operands fail to indicate the mode. */
2914 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
2915 x
= force_reg (mode
, x
);
2917 /* Handle all BLKmode compares. */
2919 if (mode
== BLKmode
)
2922 enum machine_mode result_mode
;
2925 x
= protect_from_queue (x
, 0);
2926 y
= protect_from_queue (y
, 0);
2930 #ifdef HAVE_cmpstrqi
2932 && GET_CODE (size
) == CONST_INT
2933 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (QImode
)))
2935 result_mode
= insn_data
[(int) CODE_FOR_cmpstrqi
].operand
[0].mode
;
2936 result
= gen_reg_rtx (result_mode
);
2937 emit_insn (gen_cmpstrqi (result
, x
, y
, size
, GEN_INT (align
)));
2941 #ifdef HAVE_cmpstrhi
2943 && GET_CODE (size
) == CONST_INT
2944 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (HImode
)))
2946 result_mode
= insn_data
[(int) CODE_FOR_cmpstrhi
].operand
[0].mode
;
2947 result
= gen_reg_rtx (result_mode
);
2948 emit_insn (gen_cmpstrhi (result
, x
, y
, size
, GEN_INT (align
)));
2952 #ifdef HAVE_cmpstrsi
2955 result_mode
= insn_data
[(int) CODE_FOR_cmpstrsi
].operand
[0].mode
;
2956 result
= gen_reg_rtx (result_mode
);
2957 size
= protect_from_queue (size
, 0);
2958 emit_insn (gen_cmpstrsi (result
, x
, y
,
2959 convert_to_mode (SImode
, size
, 1),
2965 #ifdef TARGET_MEM_FUNCTIONS
2966 emit_library_call (memcmp_libfunc
, 0,
2967 TYPE_MODE (integer_type_node
), 3,
2968 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
2969 convert_to_mode (TYPE_MODE (sizetype
), size
,
2970 TREE_UNSIGNED (sizetype
)),
2971 TYPE_MODE (sizetype
));
2973 emit_library_call (bcmp_libfunc
, 0,
2974 TYPE_MODE (integer_type_node
), 3,
2975 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
2976 convert_to_mode (TYPE_MODE (integer_type_node
),
2978 TREE_UNSIGNED (integer_type_node
)),
2979 TYPE_MODE (integer_type_node
));
2982 /* Immediately move the result of the libcall into a pseudo
2983 register so reload doesn't clobber the value if it needs
2984 the return register for a spill reg. */
2985 result
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
2986 result_mode
= TYPE_MODE (integer_type_node
);
2987 emit_move_insn (result
,
2988 hard_libcall_value (result_mode
));
2992 *pmode
= result_mode
;
2998 if (can_compare_p (mode
, purpose
))
3001 /* Handle a lib call just for the mode we are using. */
3003 if (cmp_optab
->handlers
[(int) mode
].libfunc
&& class != MODE_FLOAT
)
3005 rtx libfunc
= cmp_optab
->handlers
[(int) mode
].libfunc
;
3008 /* If we want unsigned, and this mode has a distinct unsigned
3009 comparison routine, use that. */
3010 if (unsignedp
&& ucmp_optab
->handlers
[(int) mode
].libfunc
)
3011 libfunc
= ucmp_optab
->handlers
[(int) mode
].libfunc
;
3013 emit_library_call (libfunc
, 1,
3014 word_mode
, 2, x
, mode
, y
, mode
);
3016 /* Immediately move the result of the libcall into a pseudo
3017 register so reload doesn't clobber the value if it needs
3018 the return register for a spill reg. */
3019 result
= gen_reg_rtx (word_mode
);
3020 emit_move_insn (result
, hard_libcall_value (word_mode
));
3022 /* Integer comparison returns a result that must be compared against 1,
3023 so that even if we do an unsigned compare afterward,
3024 there is still a value that can represent the result "less than". */
3031 if (class == MODE_FLOAT
)
3032 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
);
3038 /* Before emitting an insn with code ICODE, make sure that X, which is going
3039 to be used for operand OPNUM of the insn, is converted from mode MODE to
3040 WIDER_MODE (UNSIGNEDP determines whether it is a unsigned conversion), and
3041 that it is accepted by the operand predicate. Return the new value. */
3043 prepare_operand (icode
, x
, opnum
, mode
, wider_mode
, unsignedp
)
3047 enum machine_mode mode
, wider_mode
;
3050 x
= protect_from_queue (x
, 0);
3052 if (mode
!= wider_mode
)
3053 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
3055 if (! (*insn_data
[icode
].operand
[opnum
].predicate
)
3056 (x
, insn_data
[icode
].operand
[opnum
].mode
))
3057 x
= copy_to_mode_reg (insn_data
[icode
].operand
[opnum
].mode
, x
);
3061 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
3062 we can do the comparison.
3063 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
3064 be NULL_RTX which indicates that only a comparison is to be generated. */
3067 emit_cmp_and_jump_insn_1 (x
, y
, mode
, comparison
, unsignedp
, label
)
3069 enum machine_mode mode
;
3070 enum rtx_code comparison
;
3074 rtx test
= gen_rtx_fmt_ee (comparison
, mode
, x
, y
);
3075 enum mode_class
class = GET_MODE_CLASS (mode
);
3076 enum machine_mode wider_mode
= mode
;
3078 /* Try combined insns first. */
3081 enum insn_code icode
;
3082 PUT_MODE (test
, wider_mode
);
3086 icode
= cbranch_optab
->handlers
[(int)wider_mode
].insn_code
;
3088 if (icode
!= CODE_FOR_nothing
3089 && (*insn_data
[icode
].operand
[0].predicate
) (test
, wider_mode
))
3091 x
= prepare_operand (icode
, x
, 1, mode
, wider_mode
, unsignedp
);
3092 y
= prepare_operand (icode
, y
, 2, mode
, wider_mode
, unsignedp
);
3093 emit_jump_insn (GEN_FCN (icode
) (test
, x
, y
, label
));
3098 /* Handle some compares against zero. */
3099 icode
= (int) tst_optab
->handlers
[(int) wider_mode
].insn_code
;
3100 if (y
== CONST0_RTX (mode
) && icode
!= CODE_FOR_nothing
)
3102 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3103 emit_insn (GEN_FCN (icode
) (x
));
3105 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3109 /* Handle compares for which there is a directly suitable insn. */
3111 icode
= (int) cmp_optab
->handlers
[(int) wider_mode
].insn_code
;
3112 if (icode
!= CODE_FOR_nothing
)
3114 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3115 y
= prepare_operand (icode
, y
, 1, mode
, wider_mode
, unsignedp
);
3116 emit_insn (GEN_FCN (icode
) (x
, y
));
3118 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3122 if (class != MODE_INT
&& class != MODE_FLOAT
3123 && class != MODE_COMPLEX_FLOAT
)
3126 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
);
3127 } while (wider_mode
!= VOIDmode
);
3132 /* Generate code to compare X with Y so that the condition codes are
3133 set and to jump to LABEL if the condition is true. If X is a
3134 constant and Y is not a constant, then the comparison is swapped to
3135 ensure that the comparison RTL has the canonical form.
3137 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
3138 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
3139 the proper branch condition code.
3141 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y,
3142 and ALIGN specifies the known shared alignment of X and Y.
3144 MODE is the mode of the inputs (in case they are const_int).
3146 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
3147 be passed unchanged to emit_cmp_insn, then potentially converted into an
3148 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
3151 emit_cmp_and_jump_insns (x
, y
, comparison
, size
, mode
, unsignedp
, align
, label
)
3153 enum rtx_code comparison
;
3155 enum machine_mode mode
;
3163 if ((CONSTANT_P (x
) && ! CONSTANT_P (y
))
3164 || (GET_CODE (x
) == CONST_INT
&& GET_CODE (y
) != CONST_INT
))
3166 /* Swap operands and condition to ensure canonical RTL. */
3169 comparison
= swap_condition (comparison
);
3178 /* If OP0 is still a constant, then both X and Y must be constants. Force
3179 X into a register to avoid aborting in emit_cmp_insn due to non-canonical
3181 if (CONSTANT_P (op0
))
3182 op0
= force_reg (mode
, op0
);
3187 comparison
= unsigned_condition (comparison
);
3188 prepare_cmp_insn (&op0
, &op1
, &comparison
, size
, &mode
, &unsignedp
, align
,
3190 emit_cmp_and_jump_insn_1 (op0
, op1
, mode
, comparison
, unsignedp
, label
);
3193 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
3195 emit_cmp_insn (x
, y
, comparison
, size
, mode
, unsignedp
, align
)
3197 enum rtx_code comparison
;
3199 enum machine_mode mode
;
3203 emit_cmp_and_jump_insns (x
, y
, comparison
, size
, mode
, unsignedp
, align
, 0);
3206 /* Emit a library call comparison between floating point X and Y.
3207 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
3210 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
)
3212 enum rtx_code
*pcomparison
;
3213 enum machine_mode
*pmode
;
3216 enum rtx_code comparison
= *pcomparison
;
3217 rtx x
= *px
, y
= *py
;
3218 enum machine_mode mode
= GET_MODE (x
);
3226 libfunc
= eqhf2_libfunc
;
3230 libfunc
= nehf2_libfunc
;
3234 libfunc
= gthf2_libfunc
;
3238 libfunc
= gehf2_libfunc
;
3242 libfunc
= lthf2_libfunc
;
3246 libfunc
= lehf2_libfunc
;
3252 else if (mode
== SFmode
)
3256 libfunc
= eqsf2_libfunc
;
3260 libfunc
= nesf2_libfunc
;
3264 libfunc
= gtsf2_libfunc
;
3268 libfunc
= gesf2_libfunc
;
3272 libfunc
= ltsf2_libfunc
;
3276 libfunc
= lesf2_libfunc
;
3282 else if (mode
== DFmode
)
3286 libfunc
= eqdf2_libfunc
;
3290 libfunc
= nedf2_libfunc
;
3294 libfunc
= gtdf2_libfunc
;
3298 libfunc
= gedf2_libfunc
;
3302 libfunc
= ltdf2_libfunc
;
3306 libfunc
= ledf2_libfunc
;
3312 else if (mode
== XFmode
)
3316 libfunc
= eqxf2_libfunc
;
3320 libfunc
= nexf2_libfunc
;
3324 libfunc
= gtxf2_libfunc
;
3328 libfunc
= gexf2_libfunc
;
3332 libfunc
= ltxf2_libfunc
;
3336 libfunc
= lexf2_libfunc
;
3342 else if (mode
== TFmode
)
3346 libfunc
= eqtf2_libfunc
;
3350 libfunc
= netf2_libfunc
;
3354 libfunc
= gttf2_libfunc
;
3358 libfunc
= getf2_libfunc
;
3362 libfunc
= lttf2_libfunc
;
3366 libfunc
= letf2_libfunc
;
3374 enum machine_mode wider_mode
;
3376 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
3377 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3379 if ((cmp_optab
->handlers
[(int) wider_mode
].insn_code
3380 != CODE_FOR_nothing
)
3381 || (cmp_optab
->handlers
[(int) wider_mode
].libfunc
!= 0))
3383 x
= protect_from_queue (x
, 0);
3384 y
= protect_from_queue (y
, 0);
3385 *px
= convert_to_mode (wider_mode
, x
, 0);
3386 *py
= convert_to_mode (wider_mode
, y
, 0);
3387 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
);
3397 emit_library_call (libfunc
, 1,
3398 word_mode
, 2, x
, mode
, y
, mode
);
3400 /* Immediately move the result of the libcall into a pseudo
3401 register so reload doesn't clobber the value if it needs
3402 the return register for a spill reg. */
3403 result
= gen_reg_rtx (word_mode
);
3404 emit_move_insn (result
, hard_libcall_value (word_mode
));
3408 #ifdef FLOAT_LIB_COMPARE_RETURNS_BOOL
3409 if (FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
3415 /* Generate code to indirectly jump to a location given in the rtx LOC. */
3418 emit_indirect_jump (loc
)
3421 if (! ((*insn_data
[(int)CODE_FOR_indirect_jump
].operand
[0].predicate
)
3423 loc
= copy_to_mode_reg (Pmode
, loc
);
3425 emit_jump_insn (gen_indirect_jump (loc
));
3429 #ifdef HAVE_conditional_move
3431 /* Emit a conditional move instruction if the machine supports one for that
3432 condition and machine mode.
3434 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
3435 the mode to use should they be constants. If it is VOIDmode, they cannot
3438 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
3439 should be stored there. MODE is the mode to use should they be constants.
3440 If it is VOIDmode, they cannot both be constants.
3442 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
3443 is not supported. */
3446 emit_conditional_move (target
, code
, op0
, op1
, cmode
, op2
, op3
, mode
,
3451 enum machine_mode cmode
;
3453 enum machine_mode mode
;
3456 rtx tem
, subtarget
, comparison
, insn
;
3457 enum insn_code icode
;
3459 /* If one operand is constant, make it the second one. Only do this
3460 if the other operand is not constant as well. */
3462 if ((CONSTANT_P (op0
) && ! CONSTANT_P (op1
))
3463 || (GET_CODE (op0
) == CONST_INT
&& GET_CODE (op1
) != CONST_INT
))
3468 code
= swap_condition (code
);
3471 /* get_condition will prefer to generate LT and GT even if the old
3472 comparison was against zero, so undo that canonicalization here since
3473 comparisons against zero are cheaper. */
3474 if (code
== LT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == 1)
3475 code
= LE
, op1
= const0_rtx
;
3476 else if (code
== GT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == -1)
3477 code
= GE
, op1
= const0_rtx
;
3479 if (cmode
== VOIDmode
)
3480 cmode
= GET_MODE (op0
);
3482 if (((CONSTANT_P (op2
) && ! CONSTANT_P (op3
))
3483 || (GET_CODE (op2
) == CONST_INT
&& GET_CODE (op3
) != CONST_INT
))
3484 && (GET_MODE_CLASS (GET_MODE (op1
)) != MODE_FLOAT
3485 || TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
|| flag_fast_math
))
3490 code
= reverse_condition (code
);
3493 if (mode
== VOIDmode
)
3494 mode
= GET_MODE (op2
);
3496 icode
= movcc_gen_code
[mode
];
3498 if (icode
== CODE_FOR_nothing
)
3503 op2
= force_not_mem (op2
);
3504 op3
= force_not_mem (op3
);
3508 target
= protect_from_queue (target
, 1);
3510 target
= gen_reg_rtx (mode
);
3516 op2
= protect_from_queue (op2
, 0);
3517 op3
= protect_from_queue (op3
, 0);
3519 /* If the insn doesn't accept these operands, put them in pseudos. */
3521 if (! (*insn_data
[icode
].operand
[0].predicate
)
3522 (subtarget
, insn_data
[icode
].operand
[0].mode
))
3523 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
3525 if (! (*insn_data
[icode
].operand
[2].predicate
)
3526 (op2
, insn_data
[icode
].operand
[2].mode
))
3527 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
3529 if (! (*insn_data
[icode
].operand
[3].predicate
)
3530 (op3
, insn_data
[icode
].operand
[3].mode
))
3531 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
3533 /* Everything should now be in the suitable form, so emit the compare insn
3534 and then the conditional move. */
3537 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
, 0);
3539 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
3540 if (GET_CODE (comparison
) != code
)
3541 /* This shouldn't happen. */
3544 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
3546 /* If that failed, then give up. */
3552 if (subtarget
!= target
)
3553 convert_move (target
, subtarget
, 0);
3558 /* Return non-zero if a conditional move of mode MODE is supported.
3560 This function is for combine so it can tell whether an insn that looks
3561 like a conditional move is actually supported by the hardware. If we
3562 guess wrong we lose a bit on optimization, but that's it. */
3563 /* ??? sparc64 supports conditionally moving integers values based on fp
3564 comparisons, and vice versa. How do we handle them? */
3567 can_conditionally_move_p (mode
)
3568 enum machine_mode mode
;
3570 if (movcc_gen_code
[mode
] != CODE_FOR_nothing
)
3576 #endif /* HAVE_conditional_move */
3578 /* These three functions generate an insn body and return it
3579 rather than emitting the insn.
3581 They do not protect from queued increments,
3582 because they may be used 1) in protect_from_queue itself
3583 and 2) in other passes where there is no queue. */
3585 /* Generate and return an insn body to add Y to X. */
3588 gen_add2_insn (x
, y
)
3591 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
3593 if (! ((*insn_data
[icode
].operand
[0].predicate
)
3594 (x
, insn_data
[icode
].operand
[0].mode
))
3595 || ! ((*insn_data
[icode
].operand
[1].predicate
)
3596 (x
, insn_data
[icode
].operand
[1].mode
))
3597 || ! ((*insn_data
[icode
].operand
[2].predicate
)
3598 (y
, insn_data
[icode
].operand
[2].mode
)))
3601 return (GEN_FCN (icode
) (x
, x
, y
));
3605 have_add2_insn (mode
)
3606 enum machine_mode mode
;
3608 return add_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
;
3611 /* Generate and return an insn body to subtract Y from X. */
3614 gen_sub2_insn (x
, y
)
3617 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
3619 if (! ((*insn_data
[icode
].operand
[0].predicate
)
3620 (x
, insn_data
[icode
].operand
[0].mode
))
3621 || ! ((*insn_data
[icode
].operand
[1].predicate
)
3622 (x
, insn_data
[icode
].operand
[1].mode
))
3623 || ! ((*insn_data
[icode
].operand
[2].predicate
)
3624 (y
, insn_data
[icode
].operand
[2].mode
)))
3627 return (GEN_FCN (icode
) (x
, x
, y
));
3631 have_sub2_insn (mode
)
3632 enum machine_mode mode
;
3634 return sub_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
;
3637 /* Generate the body of an instruction to copy Y into X.
3638 It may be a SEQUENCE, if one insn isn't enough. */
3641 gen_move_insn (x
, y
)
3644 register enum machine_mode mode
= GET_MODE (x
);
3645 enum insn_code insn_code
;
3648 if (mode
== VOIDmode
)
3649 mode
= GET_MODE (y
);
3651 insn_code
= mov_optab
->handlers
[(int) mode
].insn_code
;
3653 /* Handle MODE_CC modes: If we don't have a special move insn for this mode,
3654 find a mode to do it in. If we have a movcc, use it. Otherwise,
3655 find the MODE_INT mode of the same width. */
3657 if (GET_MODE_CLASS (mode
) == MODE_CC
&& insn_code
== CODE_FOR_nothing
)
3659 enum machine_mode tmode
= VOIDmode
;
3663 && mov_optab
->handlers
[(int) CCmode
].insn_code
!= CODE_FOR_nothing
)
3666 for (tmode
= QImode
; tmode
!= VOIDmode
;
3667 tmode
= GET_MODE_WIDER_MODE (tmode
))
3668 if (GET_MODE_SIZE (tmode
) == GET_MODE_SIZE (mode
))
3671 if (tmode
== VOIDmode
)
3674 /* Get X and Y in TMODE. We can't use gen_lowpart here because it
3675 may call change_address which is not appropriate if we were
3676 called when a reload was in progress. We don't have to worry
3677 about changing the address since the size in bytes is supposed to
3678 be the same. Copy the MEM to change the mode and move any
3679 substitutions from the old MEM to the new one. */
3681 if (reload_in_progress
)
3683 x
= gen_lowpart_common (tmode
, x1
);
3684 if (x
== 0 && GET_CODE (x1
) == MEM
)
3686 x
= gen_rtx_MEM (tmode
, XEXP (x1
, 0));
3687 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (x1
);
3688 MEM_COPY_ATTRIBUTES (x
, x1
);
3689 copy_replacements (x1
, x
);
3692 y
= gen_lowpart_common (tmode
, y1
);
3693 if (y
== 0 && GET_CODE (y1
) == MEM
)
3695 y
= gen_rtx_MEM (tmode
, XEXP (y1
, 0));
3696 RTX_UNCHANGING_P (y
) = RTX_UNCHANGING_P (y1
);
3697 MEM_COPY_ATTRIBUTES (y
, y1
);
3698 copy_replacements (y1
, y
);
3703 x
= gen_lowpart (tmode
, x
);
3704 y
= gen_lowpart (tmode
, y
);
3707 insn_code
= mov_optab
->handlers
[(int) tmode
].insn_code
;
3708 return (GEN_FCN (insn_code
) (x
, y
));
3712 emit_move_insn_1 (x
, y
);
3713 seq
= gen_sequence ();
3718 /* Return the insn code used to extend FROM_MODE to TO_MODE.
3719 UNSIGNEDP specifies zero-extension instead of sign-extension. If
3720 no such operation exists, CODE_FOR_nothing will be returned. */
3723 can_extend_p (to_mode
, from_mode
, unsignedp
)
3724 enum machine_mode to_mode
, from_mode
;
3727 return extendtab
[(int) to_mode
][(int) from_mode
][unsignedp
];
3730 /* Generate the body of an insn to extend Y (with mode MFROM)
3731 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
3734 gen_extend_insn (x
, y
, mto
, mfrom
, unsignedp
)
3736 enum machine_mode mto
, mfrom
;
3739 return (GEN_FCN (extendtab
[(int) mto
][(int) mfrom
][unsignedp
]) (x
, y
));
3742 /* can_fix_p and can_float_p say whether the target machine
3743 can directly convert a given fixed point type to
3744 a given floating point type, or vice versa.
3745 The returned value is the CODE_FOR_... value to use,
3746 or CODE_FOR_nothing if these modes cannot be directly converted.
3748 *TRUNCP_PTR is set to 1 if it is necessary to output
3749 an explicit FTRUNC insn before the fix insn; otherwise 0. */
3751 static enum insn_code
3752 can_fix_p (fixmode
, fltmode
, unsignedp
, truncp_ptr
)
3753 enum machine_mode fltmode
, fixmode
;
3758 if (fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
] != CODE_FOR_nothing
)
3759 return fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
];
3761 if (ftrunc_optab
->handlers
[(int) fltmode
].insn_code
!= CODE_FOR_nothing
)
3764 return fixtab
[(int) fltmode
][(int) fixmode
][unsignedp
];
3766 return CODE_FOR_nothing
;
3769 static enum insn_code
3770 can_float_p (fltmode
, fixmode
, unsignedp
)
3771 enum machine_mode fixmode
, fltmode
;
3774 return floattab
[(int) fltmode
][(int) fixmode
][unsignedp
];
3777 /* Generate code to convert FROM to floating point
3778 and store in TO. FROM must be fixed point and not VOIDmode.
3779 UNSIGNEDP nonzero means regard FROM as unsigned.
3780 Normally this is done by correcting the final value
3781 if it is negative. */
3784 expand_float (to
, from
, unsignedp
)
3788 enum insn_code icode
;
3789 register rtx target
= to
;
3790 enum machine_mode fmode
, imode
;
3792 /* Crash now, because we won't be able to decide which mode to use. */
3793 if (GET_MODE (from
) == VOIDmode
)
3796 /* Look for an insn to do the conversion. Do it in the specified
3797 modes if possible; otherwise convert either input, output or both to
3798 wider mode. If the integer mode is wider than the mode of FROM,
3799 we can do the conversion signed even if the input is unsigned. */
3801 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
3802 imode
= GET_MODE_WIDER_MODE (imode
))
3803 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
3804 fmode
= GET_MODE_WIDER_MODE (fmode
))
3806 int doing_unsigned
= unsignedp
;
3808 icode
= can_float_p (fmode
, imode
, unsignedp
);
3809 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (from
) && unsignedp
)
3810 icode
= can_float_p (fmode
, imode
, 0), doing_unsigned
= 0;
3812 if (icode
!= CODE_FOR_nothing
)
3814 to
= protect_from_queue (to
, 1);
3815 from
= protect_from_queue (from
, 0);
3817 if (imode
!= GET_MODE (from
))
3818 from
= convert_to_mode (imode
, from
, unsignedp
);
3820 if (fmode
!= GET_MODE (to
))
3821 target
= gen_reg_rtx (fmode
);
3823 emit_unop_insn (icode
, target
, from
,
3824 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
3827 convert_move (to
, target
, 0);
3832 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3834 /* Unsigned integer, and no way to convert directly.
3835 Convert as signed, then conditionally adjust the result. */
3838 rtx label
= gen_label_rtx ();
3840 REAL_VALUE_TYPE offset
;
3844 to
= protect_from_queue (to
, 1);
3845 from
= protect_from_queue (from
, 0);
3848 from
= force_not_mem (from
);
3850 /* Look for a usable floating mode FMODE wider than the source and at
3851 least as wide as the target. Using FMODE will avoid rounding woes
3852 with unsigned values greater than the signed maximum value. */
3854 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
3855 fmode
= GET_MODE_WIDER_MODE (fmode
))
3856 if (GET_MODE_BITSIZE (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
3857 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
3860 if (fmode
== VOIDmode
)
3862 /* There is no such mode. Pretend the target is wide enough. */
3863 fmode
= GET_MODE (to
);
3865 /* Avoid double-rounding when TO is narrower than FROM. */
3866 if ((significand_size (fmode
) + 1)
3867 < GET_MODE_BITSIZE (GET_MODE (from
)))
3870 rtx neglabel
= gen_label_rtx ();
3872 /* Don't use TARGET if it isn't a register, is a hard register,
3873 or is the wrong mode. */
3874 if (GET_CODE (target
) != REG
3875 || REGNO (target
) < FIRST_PSEUDO_REGISTER
3876 || GET_MODE (target
) != fmode
)
3877 target
= gen_reg_rtx (fmode
);
3879 imode
= GET_MODE (from
);
3880 do_pending_stack_adjust ();
3882 /* Test whether the sign bit is set. */
3883 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
3886 /* The sign bit is not set. Convert as signed. */
3887 expand_float (target
, from
, 0);
3888 emit_jump_insn (gen_jump (label
));
3891 /* The sign bit is set.
3892 Convert to a usable (positive signed) value by shifting right
3893 one bit, while remembering if a nonzero bit was shifted
3894 out; i.e., compute (from & 1) | (from >> 1). */
3896 emit_label (neglabel
);
3897 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
3898 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3899 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, integer_one_node
,
3901 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
3903 expand_float (target
, temp
, 0);
3905 /* Multiply by 2 to undo the shift above. */
3906 temp
= expand_binop (fmode
, add_optab
, target
, target
,
3907 target
, 0, OPTAB_LIB_WIDEN
);
3909 emit_move_insn (target
, temp
);
3911 do_pending_stack_adjust ();
3917 /* If we are about to do some arithmetic to correct for an
3918 unsigned operand, do it in a pseudo-register. */
3920 if (GET_MODE (to
) != fmode
3921 || GET_CODE (to
) != REG
|| REGNO (to
) < FIRST_PSEUDO_REGISTER
)
3922 target
= gen_reg_rtx (fmode
);
3924 /* Convert as signed integer to floating. */
3925 expand_float (target
, from
, 0);
3927 /* If FROM is negative (and therefore TO is negative),
3928 correct its value by 2**bitwidth. */
3930 do_pending_stack_adjust ();
3931 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
3934 /* On SCO 3.2.1, ldexp rejects values outside [0.5, 1).
3935 Rather than setting up a dconst_dot_5, let's hope SCO
3937 offset
= REAL_VALUE_LDEXP (dconst1
, GET_MODE_BITSIZE (GET_MODE (from
)));
3938 temp
= expand_binop (fmode
, add_optab
, target
,
3939 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
3940 target
, 0, OPTAB_LIB_WIDEN
);
3942 emit_move_insn (target
, temp
);
3944 do_pending_stack_adjust ();
3950 /* No hardware instruction available; call a library routine to convert from
3951 SImode, DImode, or TImode into SFmode, DFmode, XFmode, or TFmode. */
3957 to
= protect_from_queue (to
, 1);
3958 from
= protect_from_queue (from
, 0);
3960 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
3961 from
= convert_to_mode (SImode
, from
, unsignedp
);
3964 from
= force_not_mem (from
);
3966 if (GET_MODE (to
) == SFmode
)
3968 if (GET_MODE (from
) == SImode
)
3969 libfcn
= floatsisf_libfunc
;
3970 else if (GET_MODE (from
) == DImode
)
3971 libfcn
= floatdisf_libfunc
;
3972 else if (GET_MODE (from
) == TImode
)
3973 libfcn
= floattisf_libfunc
;
3977 else if (GET_MODE (to
) == DFmode
)
3979 if (GET_MODE (from
) == SImode
)
3980 libfcn
= floatsidf_libfunc
;
3981 else if (GET_MODE (from
) == DImode
)
3982 libfcn
= floatdidf_libfunc
;
3983 else if (GET_MODE (from
) == TImode
)
3984 libfcn
= floattidf_libfunc
;
3988 else if (GET_MODE (to
) == XFmode
)
3990 if (GET_MODE (from
) == SImode
)
3991 libfcn
= floatsixf_libfunc
;
3992 else if (GET_MODE (from
) == DImode
)
3993 libfcn
= floatdixf_libfunc
;
3994 else if (GET_MODE (from
) == TImode
)
3995 libfcn
= floattixf_libfunc
;
3999 else if (GET_MODE (to
) == TFmode
)
4001 if (GET_MODE (from
) == SImode
)
4002 libfcn
= floatsitf_libfunc
;
4003 else if (GET_MODE (from
) == DImode
)
4004 libfcn
= floatditf_libfunc
;
4005 else if (GET_MODE (from
) == TImode
)
4006 libfcn
= floattitf_libfunc
;
4015 value
= emit_library_call_value (libfcn
, NULL_RTX
, 1,
4017 1, from
, GET_MODE (from
));
4018 insns
= get_insns ();
4021 emit_libcall_block (insns
, target
, value
,
4022 gen_rtx_FLOAT (GET_MODE (to
), from
));
4027 /* Copy result to requested destination
4028 if we have been computing in a temp location. */
4032 if (GET_MODE (target
) == GET_MODE (to
))
4033 emit_move_insn (to
, target
);
4035 convert_move (to
, target
, 0);
4039 /* expand_fix: generate code to convert FROM to fixed point
4040 and store in TO. FROM must be floating point. */
4046 rtx temp
= gen_reg_rtx (GET_MODE (x
));
4047 return expand_unop (GET_MODE (x
), ftrunc_optab
, x
, temp
, 0);
4051 expand_fix (to
, from
, unsignedp
)
4052 register rtx to
, from
;
4055 enum insn_code icode
;
4056 register rtx target
= to
;
4057 enum machine_mode fmode
, imode
;
4061 /* We first try to find a pair of modes, one real and one integer, at
4062 least as wide as FROM and TO, respectively, in which we can open-code
4063 this conversion. If the integer mode is wider than the mode of TO,
4064 we can do the conversion either signed or unsigned. */
4066 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
4067 imode
= GET_MODE_WIDER_MODE (imode
))
4068 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
4069 fmode
= GET_MODE_WIDER_MODE (fmode
))
4071 int doing_unsigned
= unsignedp
;
4073 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
4074 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
4075 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
4077 if (icode
!= CODE_FOR_nothing
)
4079 to
= protect_from_queue (to
, 1);
4080 from
= protect_from_queue (from
, 0);
4082 if (fmode
!= GET_MODE (from
))
4083 from
= convert_to_mode (fmode
, from
, 0);
4086 from
= ftruncify (from
);
4088 if (imode
!= GET_MODE (to
))
4089 target
= gen_reg_rtx (imode
);
4091 emit_unop_insn (icode
, target
, from
,
4092 doing_unsigned
? UNSIGNED_FIX
: FIX
);
4094 convert_move (to
, target
, unsignedp
);
4099 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4100 /* For an unsigned conversion, there is one more way to do it.
4101 If we have a signed conversion, we generate code that compares
4102 the real value to the largest representable positive number. If if
4103 is smaller, the conversion is done normally. Otherwise, subtract
4104 one plus the highest signed number, convert, and add it back.
4106 We only need to check all real modes, since we know we didn't find
4107 anything with a wider integer mode. */
4109 if (unsignedp
&& GET_MODE_BITSIZE (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
4110 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
4111 fmode
= GET_MODE_WIDER_MODE (fmode
))
4112 /* Make sure we won't lose significant bits doing this. */
4113 if (GET_MODE_BITSIZE (fmode
) > GET_MODE_BITSIZE (GET_MODE (to
))
4114 && CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0,
4118 REAL_VALUE_TYPE offset
;
4119 rtx limit
, lab1
, lab2
, insn
;
4121 bitsize
= GET_MODE_BITSIZE (GET_MODE (to
));
4122 offset
= REAL_VALUE_LDEXP (dconst1
, bitsize
- 1);
4123 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
4124 lab1
= gen_label_rtx ();
4125 lab2
= gen_label_rtx ();
4128 to
= protect_from_queue (to
, 1);
4129 from
= protect_from_queue (from
, 0);
4132 from
= force_not_mem (from
);
4134 if (fmode
!= GET_MODE (from
))
4135 from
= convert_to_mode (fmode
, from
, 0);
4137 /* See if we need to do the subtraction. */
4138 do_pending_stack_adjust ();
4139 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
4142 /* If not, do the signed "fix" and branch around fixup code. */
4143 expand_fix (to
, from
, 0);
4144 emit_jump_insn (gen_jump (lab2
));
4147 /* Otherwise, subtract 2**(N-1), convert to signed number,
4148 then add 2**(N-1). Do the addition using XOR since this
4149 will often generate better code. */
4151 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
4152 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4153 expand_fix (to
, target
, 0);
4154 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
4155 GEN_INT ((HOST_WIDE_INT
) 1 << (bitsize
- 1)),
4156 to
, 1, OPTAB_LIB_WIDEN
);
4159 emit_move_insn (to
, target
);
4163 if (mov_optab
->handlers
[(int) GET_MODE (to
)].insn_code
4164 != CODE_FOR_nothing
)
4166 /* Make a place for a REG_NOTE and add it. */
4167 insn
= emit_move_insn (to
, to
);
4168 set_unique_reg_note (insn
,
4170 gen_rtx_fmt_e (UNSIGNED_FIX
,
4179 /* We can't do it with an insn, so use a library call. But first ensure
4180 that the mode of TO is at least as wide as SImode, since those are the
4181 only library calls we know about. */
4183 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
4185 target
= gen_reg_rtx (SImode
);
4187 expand_fix (target
, from
, unsignedp
);
4189 else if (GET_MODE (from
) == SFmode
)
4191 if (GET_MODE (to
) == SImode
)
4192 libfcn
= unsignedp
? fixunssfsi_libfunc
: fixsfsi_libfunc
;
4193 else if (GET_MODE (to
) == DImode
)
4194 libfcn
= unsignedp
? fixunssfdi_libfunc
: fixsfdi_libfunc
;
4195 else if (GET_MODE (to
) == TImode
)
4196 libfcn
= unsignedp
? fixunssfti_libfunc
: fixsfti_libfunc
;
4200 else if (GET_MODE (from
) == DFmode
)
4202 if (GET_MODE (to
) == SImode
)
4203 libfcn
= unsignedp
? fixunsdfsi_libfunc
: fixdfsi_libfunc
;
4204 else if (GET_MODE (to
) == DImode
)
4205 libfcn
= unsignedp
? fixunsdfdi_libfunc
: fixdfdi_libfunc
;
4206 else if (GET_MODE (to
) == TImode
)
4207 libfcn
= unsignedp
? fixunsdfti_libfunc
: fixdfti_libfunc
;
4211 else if (GET_MODE (from
) == XFmode
)
4213 if (GET_MODE (to
) == SImode
)
4214 libfcn
= unsignedp
? fixunsxfsi_libfunc
: fixxfsi_libfunc
;
4215 else if (GET_MODE (to
) == DImode
)
4216 libfcn
= unsignedp
? fixunsxfdi_libfunc
: fixxfdi_libfunc
;
4217 else if (GET_MODE (to
) == TImode
)
4218 libfcn
= unsignedp
? fixunsxfti_libfunc
: fixxfti_libfunc
;
4222 else if (GET_MODE (from
) == TFmode
)
4224 if (GET_MODE (to
) == SImode
)
4225 libfcn
= unsignedp
? fixunstfsi_libfunc
: fixtfsi_libfunc
;
4226 else if (GET_MODE (to
) == DImode
)
4227 libfcn
= unsignedp
? fixunstfdi_libfunc
: fixtfdi_libfunc
;
4228 else if (GET_MODE (to
) == TImode
)
4229 libfcn
= unsignedp
? fixunstfti_libfunc
: fixtfti_libfunc
;
4241 to
= protect_from_queue (to
, 1);
4242 from
= protect_from_queue (from
, 0);
4245 from
= force_not_mem (from
);
4249 value
= emit_library_call_value (libfcn
, NULL_RTX
, 1, GET_MODE (to
),
4251 1, from
, GET_MODE (from
));
4252 insns
= get_insns ();
4255 emit_libcall_block (insns
, target
, value
,
4256 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
4257 GET_MODE (to
), from
));
4262 if (GET_MODE (to
) == GET_MODE (target
))
4263 emit_move_insn (to
, target
);
4265 convert_move (to
, target
, 0);
4274 optab op
= (optab
) xmalloc (sizeof (struct optab
));
4276 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4278 op
->handlers
[i
].insn_code
= CODE_FOR_nothing
;
4279 op
->handlers
[i
].libfunc
= 0;
4282 if (code
!= UNKNOWN
)
4283 code_to_optab
[(int) code
] = op
;
4288 /* Initialize the libfunc fields of an entire group of entries in some
4289 optab. Each entry is set equal to a string consisting of a leading
4290 pair of underscores followed by a generic operation name followed by
4291 a mode name (downshifted to lower case) followed by a single character
4292 representing the number of operands for the given operation (which is
4293 usually one of the characters '2', '3', or '4').
4295 OPTABLE is the table in which libfunc fields are to be initialized.
4296 FIRST_MODE is the first machine mode index in the given optab to
4298 LAST_MODE is the last machine mode index in the given optab to
4300 OPNAME is the generic (string) name of the operation.
4301 SUFFIX is the character which specifies the number of operands for
4302 the given generic operation.
4306 init_libfuncs (optable
, first_mode
, last_mode
, opname
, suffix
)
4307 register optab optable
;
4308 register int first_mode
;
4309 register int last_mode
;
4310 register const char *opname
;
4311 register int suffix
;
4314 register unsigned opname_len
= strlen (opname
);
4316 for (mode
= first_mode
; (int) mode
<= (int) last_mode
;
4317 mode
= (enum machine_mode
) ((int) mode
+ 1))
4319 register const char *mname
= GET_MODE_NAME(mode
);
4320 register unsigned mname_len
= strlen (mname
);
4321 register char *libfunc_name
4322 = ggc_alloc_string (NULL
, 2 + opname_len
+ mname_len
+ 1 + 1);
4324 register const char *q
;
4329 for (q
= opname
; *q
; )
4331 for (q
= mname
; *q
; q
++)
4332 *p
++ = TOLOWER (*q
);
4336 optable
->handlers
[(int) mode
].libfunc
4337 = gen_rtx_SYMBOL_REF (Pmode
, libfunc_name
);
4341 /* Initialize the libfunc fields of an entire group of entries in some
4342 optab which correspond to all integer mode operations. The parameters
4343 have the same meaning as similarly named ones for the `init_libfuncs'
4344 routine. (See above). */
4347 init_integral_libfuncs (optable
, opname
, suffix
)
4348 register optab optable
;
4349 register const char *opname
;
4350 register int suffix
;
4352 init_libfuncs (optable
, SImode
, TImode
, opname
, suffix
);
4355 /* Initialize the libfunc fields of an entire group of entries in some
4356 optab which correspond to all real mode operations. The parameters
4357 have the same meaning as similarly named ones for the `init_libfuncs'
4358 routine. (See above). */
4361 init_floating_libfuncs (optable
, opname
, suffix
)
4362 register optab optable
;
4363 register const char *opname
;
4364 register int suffix
;
4366 init_libfuncs (optable
, SFmode
, TFmode
, opname
, suffix
);
4370 init_one_libfunc (name
)
4371 register const char *name
;
4374 name
= ggc_alloc_string (name
, -1);
4375 return gen_rtx_SYMBOL_REF (Pmode
, name
);
4378 /* Mark ARG (which is really an OPTAB *) for GC. */
4384 optab o
= *(optab
*) arg
;
4387 for (i
= 0; i
< NUM_MACHINE_MODES
; ++i
)
4388 ggc_mark_rtx (o
->handlers
[i
].libfunc
);
4391 /* Call this once to initialize the contents of the optabs
4392 appropriately for the current target machine. */
4398 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
4404 /* Start by initializing all tables to contain CODE_FOR_nothing. */
4406 for (p
= fixtab
[0][0];
4407 p
< fixtab
[0][0] + sizeof fixtab
/ sizeof (fixtab
[0][0][0]);
4409 *p
= CODE_FOR_nothing
;
4411 for (p
= fixtrunctab
[0][0];
4412 p
< fixtrunctab
[0][0] + sizeof fixtrunctab
/ sizeof (fixtrunctab
[0][0][0]);
4414 *p
= CODE_FOR_nothing
;
4416 for (p
= floattab
[0][0];
4417 p
< floattab
[0][0] + sizeof floattab
/ sizeof (floattab
[0][0][0]);
4419 *p
= CODE_FOR_nothing
;
4421 for (p
= extendtab
[0][0];
4422 p
< extendtab
[0][0] + sizeof extendtab
/ sizeof extendtab
[0][0][0];
4424 *p
= CODE_FOR_nothing
;
4426 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
4427 setcc_gen_code
[i
] = CODE_FOR_nothing
;
4429 #ifdef HAVE_conditional_move
4430 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4431 movcc_gen_code
[i
] = CODE_FOR_nothing
;
4434 add_optab
= init_optab (PLUS
);
4435 sub_optab
= init_optab (MINUS
);
4436 smul_optab
= init_optab (MULT
);
4437 smul_highpart_optab
= init_optab (UNKNOWN
);
4438 umul_highpart_optab
= init_optab (UNKNOWN
);
4439 smul_widen_optab
= init_optab (UNKNOWN
);
4440 umul_widen_optab
= init_optab (UNKNOWN
);
4441 sdiv_optab
= init_optab (DIV
);
4442 sdivmod_optab
= init_optab (UNKNOWN
);
4443 udiv_optab
= init_optab (UDIV
);
4444 udivmod_optab
= init_optab (UNKNOWN
);
4445 smod_optab
= init_optab (MOD
);
4446 umod_optab
= init_optab (UMOD
);
4447 flodiv_optab
= init_optab (DIV
);
4448 ftrunc_optab
= init_optab (UNKNOWN
);
4449 and_optab
= init_optab (AND
);
4450 ior_optab
= init_optab (IOR
);
4451 xor_optab
= init_optab (XOR
);
4452 ashl_optab
= init_optab (ASHIFT
);
4453 ashr_optab
= init_optab (ASHIFTRT
);
4454 lshr_optab
= init_optab (LSHIFTRT
);
4455 rotl_optab
= init_optab (ROTATE
);
4456 rotr_optab
= init_optab (ROTATERT
);
4457 smin_optab
= init_optab (SMIN
);
4458 smax_optab
= init_optab (SMAX
);
4459 umin_optab
= init_optab (UMIN
);
4460 umax_optab
= init_optab (UMAX
);
4461 mov_optab
= init_optab (UNKNOWN
);
4462 movstrict_optab
= init_optab (UNKNOWN
);
4463 cmp_optab
= init_optab (UNKNOWN
);
4464 ucmp_optab
= init_optab (UNKNOWN
);
4465 tst_optab
= init_optab (UNKNOWN
);
4466 neg_optab
= init_optab (NEG
);
4467 abs_optab
= init_optab (ABS
);
4468 one_cmpl_optab
= init_optab (NOT
);
4469 ffs_optab
= init_optab (FFS
);
4470 sqrt_optab
= init_optab (SQRT
);
4471 sin_optab
= init_optab (UNKNOWN
);
4472 cos_optab
= init_optab (UNKNOWN
);
4473 strlen_optab
= init_optab (UNKNOWN
);
4474 cbranch_optab
= init_optab (UNKNOWN
);
4475 cmov_optab
= init_optab (UNKNOWN
);
4476 cstore_optab
= init_optab (UNKNOWN
);
4478 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4480 movstr_optab
[i
] = CODE_FOR_nothing
;
4481 clrstr_optab
[i
] = CODE_FOR_nothing
;
4483 #ifdef HAVE_SECONDARY_RELOADS
4484 reload_in_optab
[i
] = reload_out_optab
[i
] = CODE_FOR_nothing
;
4488 /* Fill in the optabs with the insns we support. */
4491 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
4492 /* This flag says the same insns that convert to a signed fixnum
4493 also convert validly to an unsigned one. */
4494 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4495 for (j
= 0; j
< NUM_MACHINE_MODES
; j
++)
4496 fixtrunctab
[i
][j
][1] = fixtrunctab
[i
][j
][0];
4499 /* Initialize the optabs with the names of the library functions. */
4500 init_integral_libfuncs (add_optab
, "add", '3');
4501 init_floating_libfuncs (add_optab
, "add", '3');
4502 init_integral_libfuncs (sub_optab
, "sub", '3');
4503 init_floating_libfuncs (sub_optab
, "sub", '3');
4504 init_integral_libfuncs (smul_optab
, "mul", '3');
4505 init_floating_libfuncs (smul_optab
, "mul", '3');
4506 init_integral_libfuncs (sdiv_optab
, "div", '3');
4507 init_integral_libfuncs (udiv_optab
, "udiv", '3');
4508 init_integral_libfuncs (sdivmod_optab
, "divmod", '4');
4509 init_integral_libfuncs (udivmod_optab
, "udivmod", '4');
4510 init_integral_libfuncs (smod_optab
, "mod", '3');
4511 init_integral_libfuncs (umod_optab
, "umod", '3');
4512 init_floating_libfuncs (flodiv_optab
, "div", '3');
4513 init_floating_libfuncs (ftrunc_optab
, "ftrunc", '2');
4514 init_integral_libfuncs (and_optab
, "and", '3');
4515 init_integral_libfuncs (ior_optab
, "ior", '3');
4516 init_integral_libfuncs (xor_optab
, "xor", '3');
4517 init_integral_libfuncs (ashl_optab
, "ashl", '3');
4518 init_integral_libfuncs (ashr_optab
, "ashr", '3');
4519 init_integral_libfuncs (lshr_optab
, "lshr", '3');
4520 init_integral_libfuncs (smin_optab
, "min", '3');
4521 init_floating_libfuncs (smin_optab
, "min", '3');
4522 init_integral_libfuncs (smax_optab
, "max", '3');
4523 init_floating_libfuncs (smax_optab
, "max", '3');
4524 init_integral_libfuncs (umin_optab
, "umin", '3');
4525 init_integral_libfuncs (umax_optab
, "umax", '3');
4526 init_integral_libfuncs (neg_optab
, "neg", '2');
4527 init_floating_libfuncs (neg_optab
, "neg", '2');
4528 init_integral_libfuncs (one_cmpl_optab
, "one_cmpl", '2');
4529 init_integral_libfuncs (ffs_optab
, "ffs", '2');
4531 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
4532 init_integral_libfuncs (cmp_optab
, "cmp", '2');
4533 init_integral_libfuncs (ucmp_optab
, "ucmp", '2');
4534 init_floating_libfuncs (cmp_optab
, "cmp", '2');
4536 #ifdef MULSI3_LIBCALL
4537 smul_optab
->handlers
[(int) SImode
].libfunc
4538 = init_one_libfunc (MULSI3_LIBCALL
);
4540 #ifdef MULDI3_LIBCALL
4541 smul_optab
->handlers
[(int) DImode
].libfunc
4542 = init_one_libfunc (MULDI3_LIBCALL
);
4545 #ifdef DIVSI3_LIBCALL
4546 sdiv_optab
->handlers
[(int) SImode
].libfunc
4547 = init_one_libfunc (DIVSI3_LIBCALL
);
4549 #ifdef DIVDI3_LIBCALL
4550 sdiv_optab
->handlers
[(int) DImode
].libfunc
4551 = init_one_libfunc (DIVDI3_LIBCALL
);
4554 #ifdef UDIVSI3_LIBCALL
4555 udiv_optab
->handlers
[(int) SImode
].libfunc
4556 = init_one_libfunc (UDIVSI3_LIBCALL
);
4558 #ifdef UDIVDI3_LIBCALL
4559 udiv_optab
->handlers
[(int) DImode
].libfunc
4560 = init_one_libfunc (UDIVDI3_LIBCALL
);
4563 #ifdef MODSI3_LIBCALL
4564 smod_optab
->handlers
[(int) SImode
].libfunc
4565 = init_one_libfunc (MODSI3_LIBCALL
);
4567 #ifdef MODDI3_LIBCALL
4568 smod_optab
->handlers
[(int) DImode
].libfunc
4569 = init_one_libfunc (MODDI3_LIBCALL
);
4572 #ifdef UMODSI3_LIBCALL
4573 umod_optab
->handlers
[(int) SImode
].libfunc
4574 = init_one_libfunc (UMODSI3_LIBCALL
);
4576 #ifdef UMODDI3_LIBCALL
4577 umod_optab
->handlers
[(int) DImode
].libfunc
4578 = init_one_libfunc (UMODDI3_LIBCALL
);
4581 /* Use cabs for DC complex abs, since systems generally have cabs.
4582 Don't define any libcall for SCmode, so that cabs will be used. */
4583 abs_optab
->handlers
[(int) DCmode
].libfunc
4584 = init_one_libfunc ("cabs");
4586 /* The ffs function operates on `int'. */
4587 #ifndef INT_TYPE_SIZE
4588 #define INT_TYPE_SIZE BITS_PER_WORD
4590 ffs_optab
->handlers
[(int) mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0)].libfunc
4591 = init_one_libfunc ("ffs");
4593 extendsfdf2_libfunc
= init_one_libfunc ("__extendsfdf2");
4594 extendsfxf2_libfunc
= init_one_libfunc ("__extendsfxf2");
4595 extendsftf2_libfunc
= init_one_libfunc ("__extendsftf2");
4596 extenddfxf2_libfunc
= init_one_libfunc ("__extenddfxf2");
4597 extenddftf2_libfunc
= init_one_libfunc ("__extenddftf2");
4599 truncdfsf2_libfunc
= init_one_libfunc ("__truncdfsf2");
4600 truncxfsf2_libfunc
= init_one_libfunc ("__truncxfsf2");
4601 trunctfsf2_libfunc
= init_one_libfunc ("__trunctfsf2");
4602 truncxfdf2_libfunc
= init_one_libfunc ("__truncxfdf2");
4603 trunctfdf2_libfunc
= init_one_libfunc ("__trunctfdf2");
4605 memcpy_libfunc
= init_one_libfunc ("memcpy");
4606 bcopy_libfunc
= init_one_libfunc ("bcopy");
4607 memcmp_libfunc
= init_one_libfunc ("memcmp");
4608 bcmp_libfunc
= init_one_libfunc ("__gcc_bcmp");
4609 memset_libfunc
= init_one_libfunc ("memset");
4610 bzero_libfunc
= init_one_libfunc ("bzero");
4612 throw_libfunc
= init_one_libfunc ("__throw");
4613 rethrow_libfunc
= init_one_libfunc ("__rethrow");
4614 sjthrow_libfunc
= init_one_libfunc ("__sjthrow");
4615 sjpopnthrow_libfunc
= init_one_libfunc ("__sjpopnthrow");
4616 terminate_libfunc
= init_one_libfunc ("__terminate");
4617 eh_rtime_match_libfunc
= init_one_libfunc ("__eh_rtime_match");
4618 #ifndef DONT_USE_BUILTIN_SETJMP
4619 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
4620 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
4622 setjmp_libfunc
= init_one_libfunc ("setjmp");
4623 longjmp_libfunc
= init_one_libfunc ("longjmp");
4626 eqhf2_libfunc
= init_one_libfunc ("__eqhf2");
4627 nehf2_libfunc
= init_one_libfunc ("__nehf2");
4628 gthf2_libfunc
= init_one_libfunc ("__gthf2");
4629 gehf2_libfunc
= init_one_libfunc ("__gehf2");
4630 lthf2_libfunc
= init_one_libfunc ("__lthf2");
4631 lehf2_libfunc
= init_one_libfunc ("__lehf2");
4633 eqsf2_libfunc
= init_one_libfunc ("__eqsf2");
4634 nesf2_libfunc
= init_one_libfunc ("__nesf2");
4635 gtsf2_libfunc
= init_one_libfunc ("__gtsf2");
4636 gesf2_libfunc
= init_one_libfunc ("__gesf2");
4637 ltsf2_libfunc
= init_one_libfunc ("__ltsf2");
4638 lesf2_libfunc
= init_one_libfunc ("__lesf2");
4640 eqdf2_libfunc
= init_one_libfunc ("__eqdf2");
4641 nedf2_libfunc
= init_one_libfunc ("__nedf2");
4642 gtdf2_libfunc
= init_one_libfunc ("__gtdf2");
4643 gedf2_libfunc
= init_one_libfunc ("__gedf2");
4644 ltdf2_libfunc
= init_one_libfunc ("__ltdf2");
4645 ledf2_libfunc
= init_one_libfunc ("__ledf2");
4647 eqxf2_libfunc
= init_one_libfunc ("__eqxf2");
4648 nexf2_libfunc
= init_one_libfunc ("__nexf2");
4649 gtxf2_libfunc
= init_one_libfunc ("__gtxf2");
4650 gexf2_libfunc
= init_one_libfunc ("__gexf2");
4651 ltxf2_libfunc
= init_one_libfunc ("__ltxf2");
4652 lexf2_libfunc
= init_one_libfunc ("__lexf2");
4654 eqtf2_libfunc
= init_one_libfunc ("__eqtf2");
4655 netf2_libfunc
= init_one_libfunc ("__netf2");
4656 gttf2_libfunc
= init_one_libfunc ("__gttf2");
4657 getf2_libfunc
= init_one_libfunc ("__getf2");
4658 lttf2_libfunc
= init_one_libfunc ("__lttf2");
4659 letf2_libfunc
= init_one_libfunc ("__letf2");
4661 floatsisf_libfunc
= init_one_libfunc ("__floatsisf");
4662 floatdisf_libfunc
= init_one_libfunc ("__floatdisf");
4663 floattisf_libfunc
= init_one_libfunc ("__floattisf");
4665 floatsidf_libfunc
= init_one_libfunc ("__floatsidf");
4666 floatdidf_libfunc
= init_one_libfunc ("__floatdidf");
4667 floattidf_libfunc
= init_one_libfunc ("__floattidf");
4669 floatsixf_libfunc
= init_one_libfunc ("__floatsixf");
4670 floatdixf_libfunc
= init_one_libfunc ("__floatdixf");
4671 floattixf_libfunc
= init_one_libfunc ("__floattixf");
4673 floatsitf_libfunc
= init_one_libfunc ("__floatsitf");
4674 floatditf_libfunc
= init_one_libfunc ("__floatditf");
4675 floattitf_libfunc
= init_one_libfunc ("__floattitf");
4677 fixsfsi_libfunc
= init_one_libfunc ("__fixsfsi");
4678 fixsfdi_libfunc
= init_one_libfunc ("__fixsfdi");
4679 fixsfti_libfunc
= init_one_libfunc ("__fixsfti");
4681 fixdfsi_libfunc
= init_one_libfunc ("__fixdfsi");
4682 fixdfdi_libfunc
= init_one_libfunc ("__fixdfdi");
4683 fixdfti_libfunc
= init_one_libfunc ("__fixdfti");
4685 fixxfsi_libfunc
= init_one_libfunc ("__fixxfsi");
4686 fixxfdi_libfunc
= init_one_libfunc ("__fixxfdi");
4687 fixxfti_libfunc
= init_one_libfunc ("__fixxfti");
4689 fixtfsi_libfunc
= init_one_libfunc ("__fixtfsi");
4690 fixtfdi_libfunc
= init_one_libfunc ("__fixtfdi");
4691 fixtfti_libfunc
= init_one_libfunc ("__fixtfti");
4693 fixunssfsi_libfunc
= init_one_libfunc ("__fixunssfsi");
4694 fixunssfdi_libfunc
= init_one_libfunc ("__fixunssfdi");
4695 fixunssfti_libfunc
= init_one_libfunc ("__fixunssfti");
4697 fixunsdfsi_libfunc
= init_one_libfunc ("__fixunsdfsi");
4698 fixunsdfdi_libfunc
= init_one_libfunc ("__fixunsdfdi");
4699 fixunsdfti_libfunc
= init_one_libfunc ("__fixunsdfti");
4701 fixunsxfsi_libfunc
= init_one_libfunc ("__fixunsxfsi");
4702 fixunsxfdi_libfunc
= init_one_libfunc ("__fixunsxfdi");
4703 fixunsxfti_libfunc
= init_one_libfunc ("__fixunsxfti");
4705 fixunstfsi_libfunc
= init_one_libfunc ("__fixunstfsi");
4706 fixunstfdi_libfunc
= init_one_libfunc ("__fixunstfdi");
4707 fixunstfti_libfunc
= init_one_libfunc ("__fixunstfti");
4709 /* For check-memory-usage. */
4710 chkr_check_addr_libfunc
= init_one_libfunc ("chkr_check_addr");
4711 chkr_set_right_libfunc
= init_one_libfunc ("chkr_set_right");
4712 chkr_copy_bitmap_libfunc
= init_one_libfunc ("chkr_copy_bitmap");
4713 chkr_check_exec_libfunc
= init_one_libfunc ("chkr_check_exec");
4714 chkr_check_str_libfunc
= init_one_libfunc ("chkr_check_str");
4716 /* For function entry/exit instrumentation. */
4717 profile_function_entry_libfunc
4718 = init_one_libfunc ("__cyg_profile_func_enter");
4719 profile_function_exit_libfunc
4720 = init_one_libfunc ("__cyg_profile_func_exit");
4722 #ifdef HAVE_conditional_trap
4726 #ifdef INIT_TARGET_OPTABS
4727 /* Allow the target to add more libcalls or rename some, etc. */
4731 /* Add these GC roots. */
4732 ggc_add_root (optab_table
, OTI_MAX
, sizeof(optab
), mark_optab
);
4733 ggc_add_rtx_root (libfunc_table
, LTI_MAX
);
4738 /* SCO 3.2 apparently has a broken ldexp. */
4751 #endif /* BROKEN_LDEXP */
4753 #ifdef HAVE_conditional_trap
4754 /* The insn generating function can not take an rtx_code argument.
4755 TRAP_RTX is used as an rtx argument. Its code is replaced with
4756 the code to be used in the trap insn and all other fields are
4759 ??? Will need to change to support garbage collection. */
4760 static rtx trap_rtx
;
4765 if (HAVE_conditional_trap
)
4766 trap_rtx
= gen_rtx_fmt_ee (EQ
, VOIDmode
, NULL_RTX
, NULL_RTX
);
4770 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
4771 CODE. Return 0 on failure. */
4774 gen_cond_trap (code
, op1
, op2
, tcode
)
4775 enum rtx_code code ATTRIBUTE_UNUSED
;
4776 rtx op1
, op2 ATTRIBUTE_UNUSED
, tcode ATTRIBUTE_UNUSED
;
4778 enum machine_mode mode
= GET_MODE (op1
);
4780 if (mode
== VOIDmode
)
4783 #ifdef HAVE_conditional_trap
4784 if (HAVE_conditional_trap
4785 && cmp_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
4788 emit_insn (GEN_FCN (cmp_optab
->handlers
[(int) mode
].insn_code
) (op1
, op2
));
4789 PUT_CODE (trap_rtx
, code
);
4790 insn
= gen_conditional_trap (trap_rtx
, tcode
);