]>
gcc.gnu.org Git - gcc.git/blob - gcc/loop.c
1 /* Move constant computations out of loops.
2 Copyright (C) 1987, 1988, 1989, 1991 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This is the loop optimization pass of the compiler.
22 It finds invariant computations within loops and moves them
23 to the beginning of the loop. Then it identifies basic and
24 general induction variables. Strength reduction is applied to the general
25 induction variables, and induction variable elimination is applied to
26 the basic induction variables.
28 It also finds cases where
29 a register is set within the loop by zero-extending a narrower value
30 and changes these to zero the entire register once before the loop
31 and merely copy the low part within the loop.
33 Most of the complexity is in heuristics to decide when it is worth
34 while to do these things. */
40 #include "insn-config.h"
41 #include "insn-flags.h"
43 #include "hard-reg-set.h"
50 /* Vector mapping INSN_UIDs to luids.
51 The luids are like uids but increase monononically always.
52 We use them to see whether a jump comes from outside a given loop. */
56 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
57 number the insn is contained in. */
61 /* 1 + largest uid of any insn. */
65 /* 1 + luid of last insn. */
69 /* Number of loops detected in current function. Used as index to the
72 static int max_loop_num
;
74 /* Indexed by loop number, contains the first and last insn of each loop. */
76 static rtx
*loop_number_loop_starts
, *loop_number_loop_ends
;
78 /* For each loop, gives the containing loop number, -1 if none. */
82 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
83 really a loop (an insn outside the loop branches into it). */
85 static char *loop_invalid
;
87 /* Indexed by loop number, links together all LABEL_REFs which refer to
88 code labels outside the loop. Used by routines that need to know all
89 loop exits, such as final_biv_value and final_giv_value.
91 This does not include loop exits due to return instructions. This is
92 because all bivs and givs are pseudos, and hence must be dead after a
93 return, so the presense of a return does not affect any of the
94 optimizations that use this info. It is simpler to just not include return
95 instructions on this list. */
97 rtx
*loop_number_exit_labels
;
99 /* Holds the number of loop iterations. It is zero if the number could not be
100 calculated. Must be unsigned long since the number of iterations can
101 be as high as 2^31-1. For loops with a DImode iterator, this number will
102 will be zero if the number of loop iterations is too large for an
103 unsigned long to hold. */
105 unsigned long loop_n_iterations
;
107 /* Nonzero if there is a subroutine call in the current loop.
108 (unknown_address_altered is also nonzero in this case.) */
110 static int loop_has_call
;
112 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
113 current loop. A continue statement will generate a branch to
114 NEXT_INSN (loop_continue). */
116 static rtx loop_continue
;
118 /* Indexed by register number, contains the number of times the reg
119 is set during the loop being scanned.
120 During code motion, a negative value indicates a reg that has been
121 made a candidate; in particular -2 means that it is an candidate that
122 we know is equal to a constant and -1 means that it is an condidate
123 not known equal to a constant.
124 After code motion, regs moved have 0 (which is accurate now)
125 while the failed candidates have the original number of times set.
127 Therefore, at all times, == 0 indicates an invariant register;
128 < 0 a conditionally invariant one. */
130 static short *n_times_set
;
132 /* Original value of n_times_set; same except that this value
133 is not set negative for a reg whose sets have been made candidates
134 and not set to 0 for a reg that is moved. */
136 static short *n_times_used
;
138 /* Index by register number, 1 indicates that the register
139 cannot be moved or strength reduced. */
141 static char *may_not_optimize
;
143 /* Nonzero means reg N has already been moved out of one loop.
144 This reduces the desire to move it out of another. */
146 static char *moved_once
;
148 /* Array of MEMs that are stored in this loop. If there are too many to fit
149 here, we just turn on unknown_address_altered. */
151 #define NUM_STORES 20
152 static rtx loop_store_mems
[NUM_STORES
];
154 /* Index of first available slot in above array. */
155 static int loop_store_mems_idx
;
157 /* Nonzero if we don't know what MEMs were changed in the current loop.
158 This happens if the loop contains a call (in which call `loop_has_call'
159 will also be set) or if we store into more than NUM_STORES MEMs. */
161 static int unknown_address_altered
;
163 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
164 static int num_movables
;
166 /* Count of memory write instructions discovered in the loop. */
167 static int num_mem_sets
;
169 /* Number of loops contained within the current one, including itself. */
170 static int loops_enclosed
;
172 /* Bound on pseudo register number before loop optimization.
173 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
174 int max_reg_before_loop
;
176 /* This obstack is used in product_cheap_p to allocate its rtl. It
177 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
178 If we used the same obstack that it did, we would be deallocating
181 static struct obstack temp_obstack
;
183 /* This is where the pointer to the obstack being used for RTL is stored. */
185 extern struct obstack
*rtl_obstack
;
187 #define obstack_chunk_alloc xmalloc
188 #define obstack_chunk_free free
190 extern char *oballoc ();
191 extern int xmalloc ();
194 /* During the analysis of a loop, a chain of `struct movable's
195 is made to record all the movable insns found.
196 Then the entire chain can be scanned to decide which to move. */
200 rtx insn
; /* A movable insn */
201 rtx set_src
; /* The expression this reg is set from. */
202 rtx set_dest
; /* The destination of this SET. */
203 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
204 of any registers used within the LIBCALL. */
205 int consec
; /* Number of consecutive following insns
206 that must be moved with this one. */
207 int regno
; /* The register it sets */
208 short lifetime
; /* lifetime of that register;
209 may be adjusted when matching movables
210 that load the same value are found. */
211 short savings
; /* Number of insns we can move for this reg,
212 including other movables that force this
213 or match this one. */
214 unsigned int cond
: 1; /* 1 if only conditionally movable */
215 unsigned int force
: 1; /* 1 means MUST move this insn */
216 unsigned int global
: 1; /* 1 means reg is live outside this loop */
217 /* If PARTIAL is 1, GLOBAL means something different:
218 that the reg is live outside the range from where it is set
219 to the following label. */
220 unsigned int done
: 1; /* 1 inhibits further processing of this */
222 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
223 In particular, moving it does not make it
225 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
226 load SRC, rather than copying INSN. */
227 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
228 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
229 that we should avoid changing when clearing
230 the rest of the reg. */
231 struct movable
*match
; /* First entry for same value */
232 struct movable
*forces
; /* An insn that must be moved if this is */
233 struct movable
*next
;
236 FILE *loop_dump_stream
;
238 /* Forward declarations. */
240 static void find_and_verify_loops ();
241 static void mark_loop_jump ();
242 static void prescan_loop ();
243 static int reg_in_basic_block_p ();
244 static int consec_sets_invariant_p ();
245 static rtx
libcall_other_reg ();
246 static int labels_in_range_p ();
247 static void count_loop_regs_set ();
248 static void note_addr_stored ();
249 static int loop_reg_used_before_p ();
250 static void scan_loop ();
251 static void replace_call_address ();
252 static rtx
skip_consec_insns ();
253 static int libcall_benefit ();
254 static void ignore_some_movables ();
255 static void force_movables ();
256 static void combine_movables ();
257 static int rtx_equal_for_loop_p ();
258 static void move_movables ();
259 static void strength_reduce ();
260 static int valid_initial_value_p ();
261 static void find_mem_givs ();
262 static void record_biv ();
263 static void check_final_value ();
264 static void record_giv ();
265 static void update_giv_derive ();
266 static void delete_insn_forces ();
267 static int basic_induction_var ();
268 static rtx
simplify_giv_expr ();
269 static int general_induction_var ();
270 static int consec_sets_giv ();
271 static int check_dbra_loop ();
272 static rtx
express_from ();
273 static int combine_givs_p ();
274 static void combine_givs ();
275 static int product_cheap_p ();
276 static int maybe_eliminate_biv ();
277 static int maybe_eliminate_biv_1 ();
278 static int last_use_this_basic_block ();
279 static void record_initial ();
280 static void update_reg_last_use ();
282 /* Relative gain of eliminating various kinds of operations. */
289 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
290 copy the value of the strength reduced giv to its original register. */
296 char *free_point
= (char *) oballoc (1);
297 rtx reg
= gen_rtx (REG
, SImode
, 0);
298 rtx pow2
= gen_rtx (CONST_INT
, VOIDmode
, 32);
302 add_cost
= rtx_cost (gen_rtx (PLUS
, SImode
, reg
, reg
));
304 /* We multiply by 2 to reconcile the difference in scale between
305 these two ways of computing costs. Otherwise the cost of a copy
306 will be far less than the cost of an add. */
307 #ifdef REGISTER_MOVE_COST
308 copy_cost
= REGISTER_MOVE_COST (GENERAL_REGS
, GENERAL_REGS
) * 2;
313 /* Free the objects we just allocated. */
316 /* Initialize the obstack used for rtl in product_cheap_p. */
317 gcc_obstack_init (&temp_obstack
);
320 /* Entry point of this file. Perform loop optimization
321 on the current function. F is the first insn of the function
322 and DUMPFILE is a stream for output of a trace of actions taken
323 (or 0 if none should be output). */
326 loop_optimize (f
, dumpfile
)
327 /* f is the first instruction of a chain of insns for one function */
336 loop_dump_stream
= dumpfile
;
338 init_recog_no_volatile ();
339 init_alias_analysis ();
341 max_reg_before_loop
= max_reg_num ();
343 moved_once
= (char *) alloca (max_reg_before_loop
);
344 bzero (moved_once
, max_reg_before_loop
);
348 /* Count the number of loops. */
351 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
353 if (GET_CODE (insn
) == NOTE
354 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
358 /* Don't waste time if no loops. */
359 if (max_loop_num
== 0)
362 /* Get size to use for tables indexed by uids.
363 Leave some space for labels allocated by find_and_verify_loops. */
364 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 4;
366 uid_luid
= (int *) alloca (max_uid_for_loop
* sizeof (int));
367 uid_loop_num
= (int *) alloca (max_uid_for_loop
* sizeof (int));
369 bzero (uid_luid
, max_uid_for_loop
* sizeof (int));
370 bzero (uid_loop_num
, max_uid_for_loop
* sizeof (int));
372 /* Allocate tables for recording each loop. We set each entry, so they need
374 loop_number_loop_starts
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
375 loop_number_loop_ends
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
376 loop_outer_loop
= (int *) alloca (max_loop_num
* sizeof (int));
377 loop_invalid
= (char *) alloca (max_loop_num
* sizeof (char));
378 loop_number_exit_labels
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
380 if (flag_unroll_loops
&& write_symbols
!= NO_DEBUG
)
382 loop_number_first_block
383 = (union tree_node
**) alloca (max_loop_num
384 * sizeof (union tree_node
*));
385 loop_number_last_block
386 = (union tree_node
**) alloca (max_loop_num
387 * sizeof (union tree_node
*));
388 loop_number_block_level
= (int *) alloca (max_loop_num
* sizeof (int));
391 /* Find and process each loop.
392 First, find them, and record them in order of their beginnings. */
393 find_and_verify_loops (f
);
395 /* Now find all register lifetimes. This must be done after
396 find_and_verify_loops, because it might reorder the insns in the
398 reg_scan (f
, max_reg_num (), 1);
400 /* Compute the mapping from uids to luids.
401 LUIDs are numbers assigned to insns, like uids,
402 except that luids increase monotonically through the code.
403 Don't assign luids to line-number NOTEs, so that the distance in luids
404 between two insns is not affected by -g. */
406 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
409 if (GET_CODE (insn
) != NOTE
410 || NOTE_LINE_NUMBER (insn
) <= 0)
411 uid_luid
[INSN_UID (insn
)] = ++i
;
413 /* Give a line number note the same luid as preceding insn. */
414 uid_luid
[INSN_UID (insn
)] = i
;
419 /* Don't leave gaps in uid_luid for insns that have been
420 deleted. It is possible that the first or last insn
421 using some register has been deleted by cross-jumping.
422 Make sure that uid_luid for that former insn's uid
423 points to the general area where that insn used to be. */
424 for (i
= 0; i
< max_uid_for_loop
; i
++)
426 uid_luid
[0] = uid_luid
[i
];
427 if (uid_luid
[0] != 0)
430 for (i
= 0; i
< max_uid_for_loop
; i
++)
431 if (uid_luid
[i
] == 0)
432 uid_luid
[i
] = uid_luid
[i
- 1];
434 /* Create a mapping from loops to BLOCK tree nodes. */
435 if (flag_unroll_loops
&& write_symbols
!= NO_DEBUG
)
436 find_loop_tree_blocks (f
);
438 /* Now scan the loops, last ones first, since this means inner ones are done
439 before outer ones. */
440 for (i
= max_loop_num
-1; i
>= 0; i
--)
441 if (! loop_invalid
[i
] && loop_number_loop_ends
[i
])
442 scan_loop (loop_number_loop_starts
[i
], loop_number_loop_ends
[i
],
446 /* Optimize one loop whose start is LOOP_START and end is END.
447 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
448 NOTE_INSN_LOOP_END. */
450 /* ??? Could also move memory writes out of loops if the destination address
451 is invariant, the source is invariant, the memory write is not volatile,
452 and if we can prove that no read inside the loop can read this address
453 before the write occurs. If there is a read of this address after the
454 write, then we can also mark the memory read as invariant. */
457 scan_loop (loop_start
, end
, nregs
)
463 /* 1 if we are scanning insns that could be executed zero times. */
465 /* 1 if we are scanning insns that might never be executed
466 due to a subroutine call which might exit before they are reached. */
468 /* For a rotated loop that is entered near the bottom,
469 this is the label at the top. Otherwise it is zero. */
471 /* Jump insn that enters the loop, or 0 if control drops in. */
472 rtx loop_entry_jump
= 0;
473 /* Place in the loop where control enters. */
475 /* Number of insns in the loop. */
480 /* The SET from an insn, if it is the only SET in the insn. */
482 /* Chain describing insns movable in current loop. */
483 struct movable
*movables
= 0;
484 /* Last element in `movables' -- so we can add elements at the end. */
485 struct movable
*last_movable
= 0;
486 /* Ratio of extra register life span we can justify
487 for saving an instruction. More if loop doesn't call subroutines
488 since in that case saving an insn makes more difference
489 and more registers are available. */
491 /* If we have calls, contains the insn in which a register was used
492 if it was used exactly once; contains const0_rtx if it was used more
494 rtx
*reg_single_usage
= 0;
496 n_times_set
= (short *) alloca (nregs
* sizeof (short));
497 n_times_used
= (short *) alloca (nregs
* sizeof (short));
498 may_not_optimize
= (char *) alloca (nregs
);
500 /* Determine whether this loop starts with a jump down to a test at
501 the end. This will occur for a small number of loops with a test
502 that is too complex to duplicate in front of the loop.
504 We search for the first insn or label in the loop, skipping NOTEs.
505 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
506 (because we might have a loop executed only once that contains a
507 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
508 (in case we have a degenerate loop).
510 Note that if we mistakenly think that a loop is entered at the top
511 when, in fact, it is entered at the exit test, the only effect will be
512 slightly poorer optimization. Making the opposite error can generate
513 incorrect code. Since very few loops now start with a jump to the
514 exit test, the code here to detect that case is very conservative. */
516 for (p
= NEXT_INSN (loop_start
);
518 && GET_CODE (p
) != CODE_LABEL
&& GET_RTX_CLASS (GET_CODE (p
)) != 'i'
519 && (GET_CODE (p
) != NOTE
520 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
521 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
527 /* Set up variables describing this loop. */
528 prescan_loop (loop_start
, end
);
529 threshold
= (loop_has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
531 /* If loop has a jump before the first label,
532 the true entry is the target of that jump.
533 Start scan from there.
534 But record in LOOP_TOP the place where the end-test jumps
535 back to so we can scan that after the end of the loop. */
536 if (GET_CODE (p
) == JUMP_INSN
)
540 /* Loop entry must be unconditional jump (and not a RETURN) */
542 && JUMP_LABEL (p
) != 0
543 /* Check to see whether the jump actually
544 jumps out of the loop (meaning it's no loop).
545 This case can happen for things like
546 do {..} while (0). If this label was generated previously
547 by loop, we can't tell anything about it and have to reject
549 && INSN_UID (JUMP_LABEL (p
)) < max_uid_for_loop
550 && INSN_LUID (JUMP_LABEL (p
)) >= INSN_LUID (loop_start
)
551 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (end
))
553 loop_top
= next_label (scan_start
);
554 scan_start
= JUMP_LABEL (p
);
558 /* If SCAN_START was an insn created by loop, we don't know its luid
559 as required by loop_reg_used_before_p. So skip such loops. (This
560 test may never be true, but it's best to play it safe.)
562 Also, skip loops where we do not start scanning at a label. This
563 test also rejects loops starting with a JUMP_INSN that failed the
566 if (INSN_UID (scan_start
) >= max_uid_for_loop
567 || GET_CODE (scan_start
) != CODE_LABEL
)
569 if (loop_dump_stream
)
570 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
571 INSN_UID (loop_start
), INSN_UID (end
));
575 /* Count number of times each reg is set during this loop.
576 Set may_not_optimize[I] if it is not safe to move out
577 the setting of register I. If this loop has calls, set
578 reg_single_usage[I]. */
580 bzero (n_times_set
, nregs
* sizeof (short));
581 bzero (may_not_optimize
, nregs
);
585 reg_single_usage
= (rtx
*) alloca (nregs
* sizeof (rtx
));
586 bzero (reg_single_usage
, nregs
* sizeof (rtx
));
589 count_loop_regs_set (loop_top
? loop_top
: loop_start
, end
,
590 may_not_optimize
, reg_single_usage
, &insn_count
, nregs
);
592 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
593 may_not_optimize
[i
] = 1, n_times_set
[i
] = 1;
594 bcopy (n_times_set
, n_times_used
, nregs
* sizeof (short));
596 if (loop_dump_stream
)
598 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
599 INSN_UID (loop_start
), INSN_UID (end
), insn_count
);
601 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
602 INSN_UID (loop_continue
));
605 /* Scan through the loop finding insns that are safe to move.
606 In each such insn, store QImode as the mode, to mark it.
607 Then set n_times_set negative for the reg being set, so that
608 this reg will be considered invariant for subsequent insns.
609 We consider whether subsequent insns use the reg
610 in deciding whether it is worth actually moving.
612 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
613 and therefore it is possible that the insns we are scanning
614 would never be executed. At such times, we must make sure
615 that it is safe to execute the insn once instead of zero times.
616 When MAYBE_NEVER is 0, all insns will be executed at least once
617 so that is not a problem. */
623 /* At end of a straight-in loop, we are done.
624 At end of a loop entered at the bottom, scan the top. */
630 p
= NEXT_INSN (loop_top
);
637 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
638 && find_reg_note (p
, REG_LIBCALL
, 0))
640 else if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
641 && find_reg_note (p
, REG_RETVAL
, 0))
644 if (GET_CODE (p
) == INSN
645 && (set
= single_set (p
))
646 && GET_CODE (SET_DEST (set
)) == REG
647 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
652 rtx src
= SET_SRC (set
);
653 rtx dependencies
= 0;
655 /* Figure out what to use as a source of this insn. If a REG_EQUIV
656 note is given or if a REG_EQUAL note with a constant operand is
657 specified, use it as the source and mark that we should move
658 this insn by calling emit_move_insn rather that duplicating the
661 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
663 temp
= find_reg_note (p
, REG_EQUIV
, 0);
665 src
= XEXP (temp
, 0), move_insn
= 1;
668 temp
= find_reg_note (p
, REG_EQUAL
, 0);
669 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
670 src
= XEXP (temp
, 0), move_insn
= 1;
671 if (temp
&& find_reg_note (p
, REG_RETVAL
, 0))
673 src
= XEXP (temp
, 0);
674 /* A libcall block can use regs that don't appear in
675 the equivalent expression. To move the libcall,
676 we must move those regs too. */
677 dependencies
= libcall_other_reg (p
, src
);
681 /* Don't try to optimize a register that was made
682 by loop-optimization for an inner loop.
683 We don't know its life-span, so we can't compute the benefit. */
684 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
686 /* In order to move a register, we need to have one of three cases:
687 (1) it is used only in the same basic block as the set
688 (2) it is not a user variable.
689 (3) the set is guaranteed to be executed once the loop starts,
690 and the reg is not used until after that. */
691 else if (! ((! maybe_never
692 && ! loop_reg_used_before_p (set
, p
, loop_start
,
694 || ! REG_USERVAR_P (SET_DEST (PATTERN (p
)))
695 || reg_in_basic_block_p (p
, SET_DEST (PATTERN (p
)))))
697 else if ((tem
= invariant_p (src
))
698 && (dependencies
== 0
699 || (tem2
= invariant_p (dependencies
)) != 0)
700 && (n_times_set
[REGNO (SET_DEST (set
))] == 1
702 = consec_sets_invariant_p (SET_DEST (set
),
703 n_times_set
[REGNO (SET_DEST (set
))],
705 /* If the insn can cause a trap (such as divide by zero),
706 can't move it unless it's guaranteed to be executed
707 once loop is entered. Even a function call might
708 prevent the trap insn from being reached
709 (since it might exit!) */
710 && ! ((maybe_never
|| call_passed
)
711 && may_trap_p (src
)))
713 register struct movable
*m
;
714 register int regno
= REGNO (SET_DEST (set
));
716 /* A potential lossage is where we have a case where two insns
717 can be combined as long as they are both in the loop, but
718 we move one of them outside the loop. For large loops,
719 this can lose. The most common case of this is the address
720 of a function being called.
722 Therefore, if this register is marked as being used exactly
723 once if we are in a loop with calls (a "large loop"), see if
724 we can replace the usage of this register with the source
725 of this SET. If we can, delete this insn.
727 Don't do this if P has a REG_RETVAL note or if we have
728 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
730 if (reg_single_usage
&& reg_single_usage
[regno
] != 0
731 && reg_single_usage
[regno
] != const0_rtx
732 && regno_first_uid
[regno
] == INSN_UID (p
)
733 && (regno_last_uid
[regno
]
734 == INSN_UID (reg_single_usage
[regno
]))
735 && n_times_set
[REGNO (SET_DEST (set
))] == 1
736 && ! side_effects_p (SET_SRC (set
))
737 && ! find_reg_note (p
, REG_RETVAL
, 0)
738 #ifdef SMALL_REGISTER_CLASSES
739 && ! (GET_CODE (SET_SRC (set
)) == REG
740 && REGNO (SET_SRC (set
)) < FIRST_PSEUDO_REGISTER
)
742 /* This test is not redundant; SET_SRC (set) might be
743 a call-clobbered register and the life of REGNO
744 might span a call. */
745 && ! modified_between_p (SET_SRC (set
), p
,
746 reg_single_usage
[regno
])
747 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
748 reg_single_usage
[regno
]))
750 /* Replace any usage in a REG_EQUAL note. */
751 REG_NOTES (reg_single_usage
[regno
])
752 = replace_rtx (REG_NOTES (reg_single_usage
[regno
]),
753 SET_DEST (set
), SET_SRC (set
));
756 NOTE_LINE_NUMBER (p
) = NOTE_INSN_DELETED
;
757 NOTE_SOURCE_FILE (p
) = 0;
758 n_times_set
[regno
] = 0;
762 m
= (struct movable
*) alloca (sizeof (struct movable
));
766 m
->dependencies
= dependencies
;
767 m
->set_dest
= SET_DEST (set
);
769 m
->consec
= n_times_set
[REGNO (SET_DEST (set
))] - 1;
773 m
->move_insn
= move_insn
;
774 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, 0) != 0);
775 m
->savemode
= VOIDmode
;
777 /* Set M->cond if either invariant_p or consec_sets_invariant_p
778 returned 2 (only conditionally invariant). */
779 m
->cond
= ((tem
| tem1
| tem2
) > 1);
780 m
->global
= (uid_luid
[regno_last_uid
[regno
]] > INSN_LUID (end
)
781 || uid_luid
[regno_first_uid
[regno
]] < INSN_LUID (loop_start
));
783 m
->lifetime
= (uid_luid
[regno_last_uid
[regno
]]
784 - uid_luid
[regno_first_uid
[regno
]]);
785 m
->savings
= n_times_used
[regno
];
786 if (find_reg_note (p
, REG_RETVAL
, 0))
787 m
->savings
+= libcall_benefit (p
);
788 n_times_set
[regno
] = move_insn
? -2 : -1;
789 /* Add M to the end of the chain MOVABLES. */
793 last_movable
->next
= m
;
798 /* Skip this insn, not checking REG_LIBCALL notes. */
800 /* Skip the consecutive insns, if there are any. */
801 p
= skip_consec_insns (p
, m
->consec
);
802 /* Back up to the last insn of the consecutive group. */
803 p
= prev_nonnote_insn (p
);
805 /* We must now reset m->move_insn, m->is_equiv, and possibly
806 m->set_src to correspond to the effects of all the
808 temp
= find_reg_note (p
, REG_EQUIV
, 0);
810 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
813 temp
= find_reg_note (p
, REG_EQUAL
, 0);
814 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
815 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
820 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, 0) != 0);
823 /* If this register is always set within a STRICT_LOW_PART
824 or set to zero, then its high bytes are constant.
825 So clear them outside the loop and within the loop
826 just load the low bytes.
827 We must check that the machine has an instruction to do so.
828 Also, if the value loaded into the register
829 depends on the same register, this cannot be done. */
830 else if (SET_SRC (set
) == const0_rtx
831 && GET_CODE (NEXT_INSN (p
)) == INSN
832 && (set1
= single_set (NEXT_INSN (p
)))
833 && GET_CODE (set1
) == SET
834 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
835 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
836 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
838 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
840 register int regno
= REGNO (SET_DEST (set
));
841 if (n_times_set
[regno
] == 2)
843 register struct movable
*m
;
844 m
= (struct movable
*) alloca (sizeof (struct movable
));
847 m
->set_dest
= SET_DEST (set
);
855 /* If the insn may not be executed on some cycles,
856 we can't clear the whole reg; clear just high part.
857 Not even if the reg is used only within this loop.
864 Clearing x before the inner loop could clobber a value
865 being saved from the last time around the outer loop.
866 However, if the reg is not used outside this loop
867 and all uses of the register are in the same
868 basic block as the store, there is no problem.
870 If this insn was made by loop, we don't know its
871 INSN_LUID and hence must make a conservative
873 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
874 || (uid_luid
[regno_last_uid
[regno
]]
876 || (uid_luid
[regno_first_uid
[regno
]]
878 || (labels_in_range_p
879 (p
, uid_luid
[regno_first_uid
[regno
]])));
880 if (maybe_never
&& m
->global
)
881 m
->savemode
= GET_MODE (SET_SRC (set1
));
883 m
->savemode
= VOIDmode
;
887 m
->lifetime
= (uid_luid
[regno_last_uid
[regno
]]
888 - uid_luid
[regno_first_uid
[regno
]]);
890 n_times_set
[regno
] = -1;
891 /* Add M to the end of the chain MOVABLES. */
895 last_movable
->next
= m
;
900 /* Past a call insn, we get to insns which might not be executed
901 because the call might exit. This matters for insns that trap.
902 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
903 so they don't count. */
904 else if (GET_CODE (p
) == CALL_INSN
&& ! in_libcall
)
906 /* Past a label or a jump, we get to insns for which we
907 can't count on whether or how many times they will be
908 executed during each iteration. Therefore, we can
909 only move out sets of trivial variables
910 (those not used after the loop). */
911 /* This code appears in three places, once in scan_loop, and twice
912 in strength_reduce. */
913 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
914 /* If we enter the loop in the middle, and scan around to the
915 beginning, don't set maybe_never for that. This must be an
916 unconditional jump, otherwise the code at the top of the
917 loop might never be executed. Unconditional jumps are
918 followed a by barrier then loop end. */
919 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
920 && NEXT_INSN (NEXT_INSN (p
)) == end
921 && simplejump_p (p
)))
923 /* At the virtual top of a converted loop, insns are again known to
924 be executed: logically, the loop begins here even though the exit
925 code has been duplicated. */
926 else if (GET_CODE (p
) == NOTE
927 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
)
928 maybe_never
= call_passed
= 0;
931 /* If one movable subsumes another, ignore that other. */
933 ignore_some_movables (movables
);
935 /* For each movable insn, see if the reg that it loads
936 leads when it dies right into another conditionally movable insn.
937 If so, record that the second insn "forces" the first one,
938 since the second can be moved only if the first is. */
940 force_movables (movables
);
942 /* See if there are multiple movable insns that load the same value.
943 If there are, make all but the first point at the first one
944 through the `match' field, and add the priorities of them
945 all together as the priority of the first. */
947 combine_movables (movables
, nregs
);
949 /* Now consider each movable insn to decide whether it is worth moving.
950 Store 0 in n_times_set for each reg that is moved. */
952 move_movables (movables
, threshold
,
953 insn_count
, loop_start
, end
, nregs
);
955 /* Now candidates that still are negative are those not moved.
956 Change n_times_set to indicate that those are not actually invariant. */
957 for (i
= 0; i
< nregs
; i
++)
958 if (n_times_set
[i
] < 0)
959 n_times_set
[i
] = n_times_used
[i
];
961 if (flag_strength_reduce
)
962 strength_reduce (scan_start
, end
, loop_top
,
963 insn_count
, loop_start
, end
);
966 /* Add elements to *OUTPUT to record all the pseudo-regs
967 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
970 record_excess_regs (in_this
, not_in_this
, output
)
971 rtx in_this
, not_in_this
;
978 code
= GET_CODE (in_this
);
992 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
993 && ! reg_mentioned_p (in_this
, not_in_this
))
994 *output
= gen_rtx (EXPR_LIST
, VOIDmode
, in_this
, *output
);
998 fmt
= GET_RTX_FORMAT (code
);
999 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1006 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1007 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1011 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1017 /* Check what regs are referred to in the libcall block ending with INSN,
1018 aside from those mentioned in the equivalent value.
1019 If there are none, return 0.
1020 If there are one or more, return an EXPR_LIST containing all of them. */
1023 libcall_other_reg (insn
, equiv
)
1026 rtx note
= find_reg_note (insn
, REG_RETVAL
, 0);
1027 rtx p
= XEXP (note
, 0);
1030 /* First, find all the regs used in the libcall block
1031 that are not mentioned as inputs to the result. */
1035 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1036 || GET_CODE (p
) == CALL_INSN
)
1037 record_excess_regs (PATTERN (p
), equiv
, &output
);
1044 /* Return 1 if all uses of REG
1045 are between INSN and the end of the basic block. */
1048 reg_in_basic_block_p (insn
, reg
)
1051 int regno
= REGNO (reg
);
1054 if (regno_first_uid
[regno
] != INSN_UID (insn
))
1057 /* Search this basic block for the already recorded last use of the reg. */
1058 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1060 switch (GET_CODE (p
))
1067 /* Ordinary insn: if this is the last use, we win. */
1068 if (regno_last_uid
[regno
] == INSN_UID (p
))
1073 /* Jump insn: if this is the last use, we win. */
1074 if (regno_last_uid
[regno
] == INSN_UID (p
))
1076 /* Otherwise, it's the end of the basic block, so we lose. */
1081 /* It's the end of the basic block, so we lose. */
1086 /* The "last use" doesn't follow the "first use"?? */
1090 /* Compute the benefit of eliminating the insns in the block whose
1091 last insn is LAST. This may be a group of insns used to compute a
1092 value directly or can contain a library call. */
1095 libcall_benefit (last
)
1101 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, 0), 0);
1102 insn
!= last
; insn
= NEXT_INSN (insn
))
1104 if (GET_CODE (insn
) == CALL_INSN
)
1105 benefit
+= 10; /* Assume at least this many insns in a library
1107 else if (GET_CODE (insn
) == INSN
1108 && GET_CODE (PATTERN (insn
)) != USE
1109 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1116 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1119 skip_consec_insns (insn
, count
)
1123 for (; count
> 0; count
--)
1127 /* If first insn of libcall sequence, skip to end. */
1128 /* Do this at start of loop, since INSN is guaranteed to
1130 if (GET_CODE (insn
) != NOTE
1131 && (temp
= find_reg_note (insn
, REG_LIBCALL
, 0)))
1132 insn
= XEXP (temp
, 0);
1134 do insn
= NEXT_INSN (insn
);
1135 while (GET_CODE (insn
) == NOTE
);
1141 /* Ignore any movable whose insn falls within a libcall
1142 which is part of another movable.
1143 We make use of the fact that the movable for the libcall value
1144 was made later and so appears later on the chain. */
1147 ignore_some_movables (movables
)
1148 struct movable
*movables
;
1150 register struct movable
*m
, *m1
;
1152 for (m
= movables
; m
; m
= m
->next
)
1154 /* Is this a movable for the value of a libcall? */
1155 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, 0);
1159 /* Check for earlier movables inside that range,
1160 and mark them invalid. We cannot use LUIDs here because
1161 insns created by loop.c for prior loops don't have LUIDs.
1162 Rather than reject all such insns from movables, we just
1163 explicitly check each insn in the libcall (since invariant
1164 libcalls aren't that common). */
1165 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1166 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1167 if (m1
->insn
== insn
)
1173 /* For each movable insn, see if the reg that it loads
1174 leads when it dies right into another conditionally movable insn.
1175 If so, record that the second insn "forces" the first one,
1176 since the second can be moved only if the first is. */
1179 force_movables (movables
)
1180 struct movable
*movables
;
1182 register struct movable
*m
, *m1
;
1183 for (m1
= movables
; m1
; m1
= m1
->next
)
1184 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1185 if (!m1
->partial
&& !m1
->done
)
1187 int regno
= m1
->regno
;
1188 for (m
= m1
->next
; m
; m
= m
->next
)
1189 /* ??? Could this be a bug? What if CSE caused the
1190 register of M1 to be used after this insn?
1191 Since CSE does not update regno_last_uid,
1192 this insn M->insn might not be where it dies.
1193 But very likely this doesn't matter; what matters is
1194 that M's reg is computed from M1's reg. */
1195 if (INSN_UID (m
->insn
) == regno_last_uid
[regno
]
1198 if (m
!= 0 && m
->set_src
== m1
->set_dest
1199 /* If m->consec, m->set_src isn't valid. */
1203 /* Increase the priority of the moving the first insn
1204 since it permits the second to be moved as well. */
1208 m1
->lifetime
+= m
->lifetime
;
1209 m1
->savings
+= m1
->savings
;
1214 /* Find invariant expressions that are equal and can be combined into
1218 combine_movables (movables
, nregs
)
1219 struct movable
*movables
;
1222 register struct movable
*m
;
1223 char *matched_regs
= (char *) alloca (nregs
);
1224 enum machine_mode mode
;
1226 /* Regs that are set more than once are not allowed to match
1227 or be matched. I'm no longer sure why not. */
1228 /* Perhaps testing m->consec_sets would be more appropriate here? */
1230 for (m
= movables
; m
; m
= m
->next
)
1231 if (m
->match
== 0 && n_times_used
[m
->regno
] == 1 && !m
->partial
)
1233 register struct movable
*m1
;
1234 int regno
= m
->regno
;
1235 rtx reg_note
, reg_note1
;
1237 bzero (matched_regs
, nregs
);
1238 matched_regs
[regno
] = 1;
1240 for (m1
= movables
; m1
; m1
= m1
->next
)
1241 if (m
!= m1
&& m1
->match
== 0 && n_times_used
[m1
->regno
] == 1
1242 /* A reg used outside the loop mustn't be eliminated. */
1244 /* A reg used for zero-extending mustn't be eliminated. */
1246 && (matched_regs
[m1
->regno
]
1249 /* Can combine regs with different modes loaded from the
1250 same constant only if the modes are the same or
1251 if both are integer modes with M wider or the same
1252 width as M1. The check for integer is redundant, but
1253 safe, since the only case of differing destination
1254 modes with equal sources is when both sources are
1255 VOIDmode, i.e., CONST_INT. */
1256 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1257 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1258 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1259 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1260 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1261 /* See if the source of M1 says it matches M. */
1262 && ((GET_CODE (m1
->set_src
) == REG
1263 && matched_regs
[REGNO (m1
->set_src
)])
1264 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1266 && ((m
->dependencies
== m1
->dependencies
)
1267 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1269 m
->lifetime
+= m1
->lifetime
;
1270 m
->savings
+= m1
->savings
;
1273 matched_regs
[m1
->regno
] = 1;
1277 /* Now combine the regs used for zero-extension.
1278 This can be done for those not marked `global'
1279 provided their lives don't overlap. */
1281 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1282 mode
= GET_MODE_WIDER_MODE (mode
))
1284 register struct movable
*m0
= 0;
1286 /* Combine all the registers for extension from mode MODE.
1287 Don't combine any that are used outside this loop. */
1288 for (m
= movables
; m
; m
= m
->next
)
1289 if (m
->partial
&& ! m
->global
1290 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1292 register struct movable
*m1
;
1293 int first
= uid_luid
[regno_first_uid
[m
->regno
]];
1294 int last
= uid_luid
[regno_last_uid
[m
->regno
]];
1298 /* First one: don't check for overlap, just record it. */
1303 /* Make sure they extend to the same mode.
1304 (Almost always true.) */
1305 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1308 /* We already have one: check for overlap with those
1309 already combined together. */
1310 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1311 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1312 if (! (uid_luid
[regno_first_uid
[m1
->regno
]] > last
1313 || uid_luid
[regno_last_uid
[m1
->regno
]] < first
))
1316 /* No overlap: we can combine this with the others. */
1317 m0
->lifetime
+= m
->lifetime
;
1318 m0
->savings
+= m
->savings
;
1327 /* Return 1 if regs X and Y will become the same if moved. */
1330 regs_match_p (x
, y
, movables
)
1332 struct movable
*movables
;
1336 struct movable
*mx
, *my
;
1338 for (mx
= movables
; mx
; mx
= mx
->next
)
1339 if (mx
->regno
== xn
)
1342 for (my
= movables
; my
; my
= my
->next
)
1343 if (my
->regno
== yn
)
1347 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1349 || mx
== my
->match
));
1352 /* Return 1 if X and Y are identical-looking rtx's.
1353 This is the Lisp function EQUAL for rtx arguments.
1355 If two registers are matching movables or a movable register and an
1356 equivalent constant, consider them equal. */
1359 rtx_equal_for_loop_p (x
, y
, movables
)
1361 struct movable
*movables
;
1365 register struct movable
*m
;
1366 register enum rtx_code code
;
1371 if (x
== 0 || y
== 0)
1374 code
= GET_CODE (x
);
1376 /* If we have a register and a constant, they may sometimes be
1378 if (GET_CODE (x
) == REG
&& n_times_set
[REGNO (x
)] == -2
1380 for (m
= movables
; m
; m
= m
->next
)
1381 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1382 && rtx_equal_p (m
->set_src
, y
))
1385 else if (GET_CODE (y
) == REG
&& n_times_set
[REGNO (y
)] == -2
1387 for (m
= movables
; m
; m
= m
->next
)
1388 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1389 && rtx_equal_p (m
->set_src
, x
))
1392 /* Otherwise, rtx's of different codes cannot be equal. */
1393 if (code
!= GET_CODE (y
))
1396 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1397 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1399 if (GET_MODE (x
) != GET_MODE (y
))
1402 /* These three types of rtx's can be compared nonrecursively. */
1404 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1406 if (code
== LABEL_REF
)
1407 return XEXP (x
, 0) == XEXP (y
, 0);
1408 if (code
== SYMBOL_REF
)
1409 return XSTR (x
, 0) == XSTR (y
, 0);
1411 /* Compare the elements. If any pair of corresponding elements
1412 fail to match, return 0 for the whole things. */
1414 fmt
= GET_RTX_FORMAT (code
);
1415 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1420 if (XINT (x
, i
) != XINT (y
, i
))
1425 /* Two vectors must have the same length. */
1426 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1429 /* And the corresponding elements must match. */
1430 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1431 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
), movables
) == 0)
1436 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
) == 0)
1441 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1446 /* These are just backpointers, so they don't matter. */
1452 /* It is believed that rtx's at this level will never
1453 contain anything but integers and other rtx's,
1454 except for within LABEL_REFs and SYMBOL_REFs. */
1462 /* Scan MOVABLES, and move the insns that deserve to be moved.
1463 If two matching movables are combined, replace one reg with the
1464 other throughout. */
1467 move_movables (movables
, threshold
, insn_count
, loop_start
, end
, nregs
)
1468 struct movable
*movables
;
1476 register struct movable
*m
;
1478 /* Map of pseudo-register replacements to handle combining
1479 when we move several insns that load the same value
1480 into different pseudo-registers. */
1481 rtx
*reg_map
= (rtx
*) alloca (nregs
* sizeof (rtx
));
1482 char *already_moved
= (char *) alloca (nregs
);
1484 bzero (already_moved
, nregs
);
1485 bzero (reg_map
, nregs
* sizeof (rtx
));
1489 for (m
= movables
; m
; m
= m
->next
)
1491 /* Describe this movable insn. */
1493 if (loop_dump_stream
)
1495 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1496 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1498 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1500 fprintf (loop_dump_stream
, "cond ");
1502 fprintf (loop_dump_stream
, "force ");
1504 fprintf (loop_dump_stream
, "global ");
1506 fprintf (loop_dump_stream
, "done ");
1508 fprintf (loop_dump_stream
, "move-insn ");
1510 fprintf (loop_dump_stream
, "matches %d ",
1511 INSN_UID (m
->match
->insn
));
1513 fprintf (loop_dump_stream
, "forces %d ",
1514 INSN_UID (m
->forces
->insn
));
1517 /* Count movables. Value used in heuristics in strength_reduce. */
1520 /* Ignore the insn if it's already done (it matched something else).
1521 Otherwise, see if it is now safe to move. */
1525 || (1 == invariant_p (m
->set_src
)
1526 && (m
->dependencies
== 0
1527 || 1 == invariant_p (m
->dependencies
))
1529 || 1 == consec_sets_invariant_p (m
->set_dest
,
1532 && (! m
->forces
|| m
->forces
->done
))
1536 int savings
= m
->savings
;
1538 /* We have an insn that is safe to move.
1539 Compute its desirability. */
1544 if (loop_dump_stream
)
1545 fprintf (loop_dump_stream
, "savings %d ", savings
);
1547 if (moved_once
[regno
])
1551 if (loop_dump_stream
)
1552 fprintf (loop_dump_stream
, "halved since already moved ");
1555 /* An insn MUST be moved if we already moved something else
1556 which is safe only if this one is moved too: that is,
1557 if already_moved[REGNO] is nonzero. */
1559 /* An insn is desirable to move if the new lifetime of the
1560 register is no more than THRESHOLD times the old lifetime.
1561 If it's not desirable, it means the loop is so big
1562 that moving won't speed things up much,
1563 and it is liable to make register usage worse. */
1565 /* It is also desirable to move if it can be moved at no
1566 extra cost because something else was already moved. */
1568 if (already_moved
[regno
]
1569 || (threshold
* savings
* m
->lifetime
) >= insn_count
1570 || (m
->forces
&& m
->forces
->done
1571 && n_times_used
[m
->forces
->regno
] == 1))
1574 register struct movable
*m1
;
1577 /* Now move the insns that set the reg. */
1579 if (m
->partial
&& m
->match
)
1583 /* Find the end of this chain of matching regs.
1584 Thus, we load each reg in the chain from that one reg.
1585 And that reg is loaded with 0 directly,
1586 since it has ->match == 0. */
1587 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1588 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1589 SET_DEST (PATTERN (m1
->insn
)));
1590 i1
= emit_insn_before (newpat
, loop_start
);
1592 /* Mark the moved, invariant reg as being allowed to
1593 share a hard reg with the other matching invariant. */
1594 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1595 r1
= SET_DEST (PATTERN (m
->insn
));
1596 r2
= SET_DEST (PATTERN (m1
->insn
));
1597 regs_may_share
= gen_rtx (EXPR_LIST
, VOIDmode
, r1
,
1598 gen_rtx (EXPR_LIST
, VOIDmode
, r2
,
1600 delete_insn (m
->insn
);
1605 if (loop_dump_stream
)
1606 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1608 /* If we are to re-generate the item being moved with a
1609 new move insn, first delete what we have and then emit
1610 the move insn before the loop. */
1611 else if (m
->move_insn
)
1615 for (count
= m
->consec
; count
>= 0; count
--)
1617 /* If this is the first insn of a library call sequence,
1619 if (GET_CODE (p
) != NOTE
1620 && (temp
= find_reg_note (p
, REG_LIBCALL
, 0)))
1623 /* If this is the last insn of a libcall sequence, then
1624 delete every insn in the sequence except the last.
1625 The last insn is handled in the normal manner. */
1626 if (GET_CODE (p
) != NOTE
1627 && (temp
= find_reg_note (p
, REG_RETVAL
, 0)))
1629 temp
= XEXP (temp
, 0);
1631 temp
= delete_insn (temp
);
1634 p
= delete_insn (p
);
1638 emit_move_insn (m
->set_dest
, m
->set_src
);
1639 temp
= gen_sequence ();
1642 i1
= emit_insn_before (temp
, loop_start
);
1643 if (! find_reg_note (i1
, REG_EQUAL
, 0))
1645 = gen_rtx (EXPR_LIST
,
1646 m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1647 m
->set_src
, REG_NOTES (i1
));
1649 if (loop_dump_stream
)
1650 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1652 /* The more regs we move, the less we like moving them. */
1657 for (count
= m
->consec
; count
>= 0; count
--)
1661 /* If first insn of libcall sequence, skip to end. */
1662 /* Do this at start of loop, since p is guaranteed to
1664 if (GET_CODE (p
) != NOTE
1665 && (temp
= find_reg_note (p
, REG_LIBCALL
, 0)))
1668 /* If last insn of libcall sequence, move all
1669 insns except the last before the loop. The last
1670 insn is handled in the normal manner. */
1671 if (GET_CODE (p
) != NOTE
1672 && (temp
= find_reg_note (p
, REG_RETVAL
, 0)))
1676 rtx fn_address_insn
= 0;
1679 for (temp
= XEXP (temp
, 0); temp
!= p
;
1680 temp
= NEXT_INSN (temp
))
1686 if (GET_CODE (temp
) == NOTE
)
1689 body
= PATTERN (temp
);
1691 /* Find the next insn after TEMP,
1692 not counting USE or NOTE insns. */
1693 for (next
= NEXT_INSN (temp
); next
!= p
;
1694 next
= NEXT_INSN (next
))
1695 if (! (GET_CODE (next
) == INSN
1696 && GET_CODE (PATTERN (next
)) == USE
)
1697 && GET_CODE (next
) != NOTE
)
1700 /* If that is the call, this may be the insn
1701 that loads the function address.
1703 Extract the function address from the insn
1704 that loads it into a register.
1705 If this insn was cse'd, we get incorrect code.
1707 So emit a new move insn that copies the
1708 function address into the register that the
1709 call insn will use. flow.c will delete any
1710 redundant stores that we have created. */
1711 if (GET_CODE (next
) == CALL_INSN
1712 && GET_CODE (body
) == SET
1713 && GET_CODE (SET_DEST (body
)) == REG
1714 && (n
= find_reg_note (temp
, REG_EQUAL
, 0)))
1716 fn_reg
= SET_SRC (body
);
1717 if (GET_CODE (fn_reg
) != REG
)
1718 fn_reg
= SET_DEST (body
);
1719 fn_address
= XEXP (n
, 0);
1720 fn_address_insn
= temp
;
1722 /* We have the call insn.
1723 If it uses the register we suspect it might,
1724 load it with the correct address directly. */
1725 if (GET_CODE (temp
) == CALL_INSN
1727 && reg_mentioned_p (fn_reg
, body
))
1728 emit_insn_after (gen_move_insn (fn_reg
,
1732 if (GET_CODE (temp
) == CALL_INSN
)
1733 i1
= emit_call_insn_before (body
, loop_start
);
1735 i1
= emit_insn_before (body
, loop_start
);
1738 if (temp
== fn_address_insn
)
1739 fn_address_insn
= i1
;
1740 REG_NOTES (i1
) = REG_NOTES (temp
);
1744 if (m
->savemode
!= VOIDmode
)
1746 /* P sets REG to zero; but we should clear only
1747 the bits that are not covered by the mode
1749 rtx reg
= m
->set_dest
;
1755 (GET_MODE (reg
), and_optab
, reg
,
1756 gen_rtx (CONST_INT
, VOIDmode
,
1757 ((1 << GET_MODE_BITSIZE (m
->savemode
)))
1759 reg
, 1, OPTAB_LIB_WIDEN
);
1763 emit_move_insn (reg
, tem
);
1764 sequence
= gen_sequence ();
1766 i1
= emit_insn_before (sequence
, loop_start
);
1768 else if (GET_CODE (p
) == CALL_INSN
)
1769 i1
= emit_call_insn_before (PATTERN (p
), loop_start
);
1771 i1
= emit_insn_before (PATTERN (p
), loop_start
);
1773 REG_NOTES (i1
) = REG_NOTES (p
);
1778 if (loop_dump_stream
)
1779 fprintf (loop_dump_stream
, " moved to %d",
1783 /* This isn't needed because REG_NOTES is copied
1784 below and is wrong since P might be a PARALLEL. */
1785 if (REG_NOTES (i1
) == 0
1786 && ! m
->partial
/* But not if it's a zero-extend clr. */
1787 && ! m
->global
/* and not if used outside the loop
1788 (since it might get set outside). */
1789 && CONSTANT_P (SET_SRC (PATTERN (p
))))
1791 = gen_rtx (EXPR_LIST
, REG_EQUAL
,
1792 SET_SRC (PATTERN (p
)), REG_NOTES (i1
));
1795 /* If library call, now fix the REG_NOTES that contain
1796 insn pointers, namely REG_LIBCALL on FIRST
1797 and REG_RETVAL on I1. */
1798 if (temp
= find_reg_note (i1
, REG_RETVAL
, 0))
1800 XEXP (temp
, 0) = first
;
1801 temp
= find_reg_note (first
, REG_LIBCALL
, 0);
1802 XEXP (temp
, 0) = i1
;
1806 do p
= NEXT_INSN (p
);
1807 while (p
&& GET_CODE (p
) == NOTE
);
1810 /* The more regs we move, the less we like moving them. */
1814 /* Any other movable that loads the same register
1816 already_moved
[regno
] = 1;
1818 /* This reg has been moved out of one loop. */
1819 moved_once
[regno
] = 1;
1821 /* The reg set here is now invariant. */
1823 n_times_set
[regno
] = 0;
1827 /* Change the length-of-life info for the register
1828 to say it lives at least the full length of this loop.
1829 This will help guide optimizations in outer loops. */
1831 if (uid_luid
[regno_first_uid
[regno
]] > INSN_LUID (loop_start
))
1832 /* This is the old insn before all the moved insns.
1833 We can't use the moved insn because it is out of range
1834 in uid_luid. Only the old insns have luids. */
1835 regno_first_uid
[regno
] = INSN_UID (loop_start
);
1836 if (uid_luid
[regno_last_uid
[regno
]] < INSN_LUID (end
))
1837 regno_last_uid
[regno
] = INSN_UID (end
);
1839 /* Combine with this moved insn any other matching movables. */
1842 for (m1
= movables
; m1
; m1
= m1
->next
)
1847 /* Schedule the reg loaded by M1
1848 for replacement so that shares the reg of M.
1849 If the modes differ (only possible in restricted
1850 circumstances, make a SUBREG. */
1851 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
1852 reg_map
[m1
->regno
] = m
->set_dest
;
1855 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
1858 /* Get rid of the matching insn
1859 and prevent further processing of it. */
1862 /* if library call, delete all insn except last, which
1864 if (temp
= find_reg_note (m1
->insn
, REG_RETVAL
, 0))
1866 for (temp
= XEXP (temp
, 0); temp
!= m1
->insn
;
1867 temp
= NEXT_INSN (temp
))
1870 delete_insn (m1
->insn
);
1872 /* Any other movable that loads the same register
1874 already_moved
[m1
->regno
] = 1;
1876 /* The reg merged here is now invariant,
1877 if the reg it matches is invariant. */
1879 n_times_set
[m1
->regno
] = 0;
1882 else if (loop_dump_stream
)
1883 fprintf (loop_dump_stream
, "not desirable");
1885 else if (loop_dump_stream
&& !m
->match
)
1886 fprintf (loop_dump_stream
, "not safe");
1888 if (loop_dump_stream
)
1889 fprintf (loop_dump_stream
, "\n");
1893 new_start
= loop_start
;
1895 /* Go through all the instructions in the loop, making
1896 all the register substitutions scheduled in REG_MAP. */
1897 for (p
= new_start
; p
!= end
; p
= NEXT_INSN (p
))
1898 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1899 || GET_CODE (p
) == CALL_INSN
)
1901 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
1902 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
1907 /* Scan X and replace the address of any MEM in it with ADDR.
1908 REG is the address that MEM should have before the replacement. */
1911 replace_call_address (x
, reg
, addr
)
1914 register enum rtx_code code
;
1920 code
= GET_CODE (x
);
1934 /* Short cut for very common case. */
1935 replace_call_address (XEXP (x
, 1), reg
, addr
);
1939 /* Short cut for very common case. */
1940 replace_call_address (XEXP (x
, 0), reg
, addr
);
1944 /* If this MEM uses a reg other than the one we expected,
1945 something is wrong. */
1946 if (XEXP (x
, 0) != reg
)
1952 fmt
= GET_RTX_FORMAT (code
);
1953 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1956 replace_call_address (XEXP (x
, i
), reg
, addr
);
1960 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1961 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
1967 /* Return the number of memory refs to addresses that vary
1971 count_nonfixed_reads (x
)
1974 register enum rtx_code code
;
1982 code
= GET_CODE (x
);
1996 return ((invariant_p (XEXP (x
, 0)) != 1)
1997 + count_nonfixed_reads (XEXP (x
, 0)));
2001 fmt
= GET_RTX_FORMAT (code
);
2002 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2005 value
+= count_nonfixed_reads (XEXP (x
, i
));
2009 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2010 value
+= count_nonfixed_reads (XVECEXP (x
, i
, j
));
2018 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2019 Replace it with an instruction to load just the low bytes
2020 if the machine supports such an instruction,
2021 and insert above LOOP_START an instruction to clear the register. */
2024 constant_high_bytes (p
, loop_start
)
2028 register int insn_code_number
;
2030 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2031 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2033 new = gen_rtx (SET
, VOIDmode
,
2034 gen_rtx (STRICT_LOW_PART
, VOIDmode
,
2035 gen_rtx (SUBREG
, GET_MODE (XEXP (SET_SRC (PATTERN (p
)), 0)),
2036 SET_DEST (PATTERN (p
)),
2038 XEXP (SET_SRC (PATTERN (p
)), 0));
2039 insn_code_number
= recog (new, p
);
2041 if (insn_code_number
)
2045 /* Clear destination register before the loop. */
2046 emit_insn_before (gen_rtx (SET
, VOIDmode
,
2047 SET_DEST (PATTERN (p
)),
2051 /* Inside the loop, just load the low part. */
2057 /* Scan a loop setting the variables `unknown_address_altered',
2058 `num_mem_sets', `loop_continue', loops_enclosed' and `loop_has_call'.
2059 Also, fill in the array `loop_store_mems'. */
2062 prescan_loop (start
, end
)
2065 register int level
= 1;
2068 unknown_address_altered
= 0;
2070 loop_store_mems_idx
= 0;
2076 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2077 insn
= NEXT_INSN (insn
))
2079 if (GET_CODE (insn
) == NOTE
)
2081 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2084 /* Count number of loops contained in this one. */
2087 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2096 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_CONT
)
2099 loop_continue
= insn
;
2102 else if (GET_CODE (insn
) == CALL_INSN
)
2104 unknown_address_altered
= 1;
2109 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2110 note_stores (PATTERN (insn
), note_addr_stored
);
2115 /* Scan the function looking for loops. Record the start and end of each loop.
2116 Also mark as invalid loops any loops that contain a setjmp or are branched
2117 to from outside the loop. */
2120 find_and_verify_loops (f
)
2124 int current_loop
= -1;
2128 /* If there are jumps to undefined labels,
2129 treat them as jumps out of any/all loops.
2130 This also avoids writing past end of tables when there are no loops. */
2131 uid_loop_num
[0] = -1;
2133 /* Find boundaries of loops, mark which loops are contained within
2134 loops, and invalidate loops that have setjmp. */
2136 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2138 if (GET_CODE (insn
) == NOTE
)
2139 switch (NOTE_LINE_NUMBER (insn
))
2141 case NOTE_INSN_LOOP_BEG
:
2142 loop_number_loop_starts
[++next_loop
] = insn
;
2143 loop_number_loop_ends
[next_loop
] = 0;
2144 loop_outer_loop
[next_loop
] = current_loop
;
2145 loop_invalid
[next_loop
] = 0;
2146 loop_number_exit_labels
[next_loop
] = 0;
2147 current_loop
= next_loop
;
2150 case NOTE_INSN_SETJMP
:
2151 /* In this case, we must invalidate our current loop and any
2153 for (loop
= current_loop
; loop
!= -1; loop
= loop_outer_loop
[loop
])
2155 loop_invalid
[loop
] = 1;
2156 if (loop_dump_stream
)
2157 fprintf (loop_dump_stream
,
2158 "\nLoop at %d ignored due to setjmp.\n",
2159 INSN_UID (loop_number_loop_starts
[loop
]));
2163 case NOTE_INSN_LOOP_END
:
2164 if (current_loop
== -1)
2167 loop_number_loop_ends
[current_loop
] = insn
;
2168 current_loop
= loop_outer_loop
[current_loop
];
2173 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2174 enclosing loop, but this doesn't matter. */
2175 uid_loop_num
[INSN_UID (insn
)] = current_loop
;
2178 /* Now scan all JUMP_INSN's in the function. If any branches into a loop
2179 that it is not contained within, that loop is marked invalid.
2181 Also look for blocks of code ending in an unconditional branch that
2182 exits the loop. If such a block is surrounded by a conditional
2183 branch around the block, move the block elsewhere (see below) and
2184 invert the jump to point to the code block. This may eliminate a
2185 label in our loop and will simplify processing by both us and a
2186 possible second cse pass. */
2188 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2189 if (GET_CODE (insn
) == JUMP_INSN
)
2191 int this_loop_num
= uid_loop_num
[INSN_UID (insn
)];
2193 mark_loop_jump (PATTERN (insn
), this_loop_num
);
2195 /* See if this is an unconditional branch outside the loop. */
2196 if (this_loop_num
!= -1
2197 && (GET_CODE (PATTERN (insn
)) == RETURN
2198 || (simplejump_p (insn
)
2199 && (uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))]
2200 != this_loop_num
))))
2203 rtx our_next
= next_real_insn (insn
);
2205 /* Go backwards until we reach the start of the loop, a label,
2207 for (p
= PREV_INSN (insn
);
2208 GET_CODE (p
) != CODE_LABEL
2209 && ! (GET_CODE (p
) == NOTE
2210 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2211 && GET_CODE (p
) != JUMP_INSN
;
2215 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2216 we have a block of code to try to move.
2218 We look backward and then forward from the target of INSN
2219 to find a BARRIER at the same loop depth as the target.
2220 If we find such a BARRIER, we make a new label for the start
2221 of the block, invert the jump in P and point it to that label,
2222 and move the block of code to the spot we found. */
2224 if (GET_CODE (p
) == JUMP_INSN
2225 && JUMP_LABEL (p
) != 0
2227 && ! simplejump_p (p
)
2228 && next_real_insn (JUMP_LABEL (p
)) == our_next
)
2231 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2232 int target_loop_num
= uid_loop_num
[INSN_UID (target
)];
2235 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2236 if (GET_CODE (loc
) == BARRIER
2237 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2241 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2242 if (GET_CODE (loc
) == BARRIER
2243 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2248 rtx cond_label
= JUMP_LABEL (p
);
2249 rtx new_label
= get_label_after (p
);
2251 /* Ensure our label doesn't go away. */
2252 LABEL_NUSES (cond_label
)++;
2254 /* Verify that uid_loop_num is large enough and that
2256 if (INSN_UID (new_label
) < max_uid_for_loop
2257 && invert_jump (p
, new_label
))
2261 /* Include the BARRIER after INSN and copy the
2263 squeeze_notes (new_label
, NEXT_INSN (insn
));
2264 reorder_insns (new_label
, NEXT_INSN (insn
), loc
);
2266 /* All those insns are now in TARGET_LOOP_NUM. */
2267 for (q
= new_label
; q
!= NEXT_INSN (NEXT_INSN (insn
));
2269 uid_loop_num
[INSN_UID (q
)] = target_loop_num
;
2271 /* The label jumped to by INSN is no longer a loop exit.
2272 Unless INSN does not have a label (e.g., it is a
2273 RETURN insn), search loop_number_exit_labels to find
2274 its label_ref, and remove it. Also turn off
2275 LABEL_OUTSIDE_LOOP_P bit. */
2276 if (JUMP_LABEL (insn
))
2279 r
= loop_number_exit_labels
[this_loop_num
];
2280 r
; q
= r
, r
= LABEL_NEXTREF (r
))
2281 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2283 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2285 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2287 loop_number_exit_labels
[this_loop_num
]
2288 = LABEL_NEXTREF (r
);
2292 /* If we didn't find it, then something is wrong. */
2297 /* P is now a jump outside the loop, so it must be put
2298 in loop_number_exit_labels, and marked as such.
2299 The easiest way to do this is to just call
2300 mark_loop_jump again for P. */
2301 mark_loop_jump (PATTERN (p
), this_loop_num
);
2303 /* If INSN now jumps to the insn after it,
2305 if (JUMP_LABEL (insn
) != 0
2306 && (next_real_insn (JUMP_LABEL (insn
))
2307 == next_real_insn (insn
)))
2311 /* Continue the loop after where the conditional
2312 branch used to jump, since the only branch insn
2313 in the block (if it still remains) is an inter-loop
2314 branch and hence needs no processing. */
2315 insn
= NEXT_INSN (cond_label
);
2317 if (--LABEL_NUSES (cond_label
) == 0)
2318 delete_insn (cond_label
);
2325 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2326 loops it is contained in, mark the target loop invalid.
2328 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2331 mark_loop_jump (x
, loop_num
)
2339 switch (GET_CODE (x
))
2352 /* There could be a label reference in here. */
2353 mark_loop_jump (XEXP (x
, 0), loop_num
);
2360 mark_loop_jump (XEXP (x
, 0), loop_num
);
2361 mark_loop_jump (XEXP (x
, 1), loop_num
);
2366 mark_loop_jump (XEXP (x
, 0), loop_num
);
2370 dest_loop
= uid_loop_num
[INSN_UID (XEXP (x
, 0))];
2372 /* Link together all labels that branch outside the loop. This
2373 is used by final_[bg]iv_value and the loop unrolling code. Also
2374 mark this LABEL_REF so we know that this branch should predict
2377 if (dest_loop
!= loop_num
&& loop_num
!= -1)
2379 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2380 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2381 loop_number_exit_labels
[loop_num
] = x
;
2384 /* If this is inside a loop, but not in the current loop or one enclosed
2385 by it, it invalidates at least one loop. */
2387 if (dest_loop
== -1)
2390 /* We must invalidate every nested loop containing the target of this
2391 label, except those that also contain the jump insn. */
2393 for (; dest_loop
!= -1; dest_loop
= loop_outer_loop
[dest_loop
])
2395 /* Stop when we reach a loop that also contains the jump insn. */
2396 for (outer_loop
= loop_num
; outer_loop
!= -1;
2397 outer_loop
= loop_outer_loop
[outer_loop
])
2398 if (dest_loop
== outer_loop
)
2401 /* If we get here, we know we need to invalidate a loop. */
2402 if (loop_dump_stream
&& ! loop_invalid
[dest_loop
])
2403 fprintf (loop_dump_stream
,
2404 "\nLoop at %d ignored due to multiple entry points.\n",
2405 INSN_UID (loop_number_loop_starts
[dest_loop
]));
2407 loop_invalid
[dest_loop
] = 1;
2412 /* If this is not setting pc, ignore. */
2413 if (SET_DEST (x
) == pc_rtx
)
2414 mark_loop_jump (SET_SRC (x
), loop_num
);
2418 mark_loop_jump (XEXP (x
, 1), loop_num
);
2419 mark_loop_jump (XEXP (x
, 2), loop_num
);
2424 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
2425 mark_loop_jump (XVECEXP (x
, 0, i
), loop_num
);
2429 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
2430 mark_loop_jump (XVECEXP (x
, 1, i
), loop_num
);
2434 /* Nothing else should occur in a JUMP_INSN. */
2439 /* Return nonzero if there is a label in the range from
2440 insn INSN to and including the insn whose luid is END
2441 INSN must have an assigned luid (i.e., it must not have
2442 been previously created by loop.c). */
2445 labels_in_range_p (insn
, end
)
2449 while (insn
&& INSN_LUID (insn
) <= end
)
2451 if (GET_CODE (insn
) == CODE_LABEL
)
2453 insn
= NEXT_INSN (insn
);
2459 /* Record that a memory reference X is being set. */
2462 note_addr_stored (x
)
2467 if (x
== 0 || GET_CODE (x
) != MEM
)
2470 /* Count number of memory writes.
2471 This affects heuristics in strength_reduce. */
2474 if (unknown_address_altered
)
2477 for (i
= 0; i
< loop_store_mems_idx
; i
++)
2478 if (rtx_equal_p (XEXP (loop_store_mems
[i
], 0), XEXP (x
, 0))
2479 && MEM_IN_STRUCT_P (x
) == MEM_IN_STRUCT_P (loop_store_mems
[i
]))
2481 /* We are storing at the same address as previously noted. Save the
2482 wider reference, treating BLKmode as wider. */
2483 if (GET_MODE (x
) == BLKmode
2484 || (GET_MODE_SIZE (GET_MODE (x
))
2485 > GET_MODE_SIZE (GET_MODE (loop_store_mems
[i
]))))
2486 loop_store_mems
[i
] = x
;
2490 if (i
== NUM_STORES
)
2491 unknown_address_altered
= 1;
2493 else if (i
== loop_store_mems_idx
)
2494 loop_store_mems
[loop_store_mems_idx
++] = x
;
2497 /* Return nonzero if the rtx X is invariant over the current loop.
2499 The value is 2 if we refer to something only conditionally invariant.
2501 If `unknown_address_altered' is nonzero, no memory ref is invariant.
2502 Otherwise, a memory ref is invariant if it does not conflict with
2503 anything stored in `loop_store_mems'. */
2510 register enum rtx_code code
;
2512 int conditional
= 0;
2516 code
= GET_CODE (x
);
2526 /* A LABEL_REF is normally invariant, however, if we are unrolling
2527 loops, and this label is inside the loop, then it isn't invariant.
2528 This is because each unrolled copy of the loop body will have
2529 a copy of this label. If this was invariant, then an insn loading
2530 the address of this label into a register might get moved outside
2531 the loop, and then each loop body would end up using the same label.
2533 We don't know the loop bounds here though, so just fail for all
2535 if (flag_unroll_loops
)
2542 case UNSPEC_VOLATILE
:
2546 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
2547 since the reg might be set by initialization within the loop. */
2548 if (x
== frame_pointer_rtx
|| x
== arg_pointer_rtx
)
2551 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
2553 if (n_times_set
[REGNO (x
)] < 0)
2555 return n_times_set
[REGNO (x
)] == 0;
2558 /* Read-only items (such as constants in a constant pool) are
2559 invariant if their address is. */
2560 if (RTX_UNCHANGING_P (x
))
2563 /* If we filled the table (or had a subroutine call), any location
2564 in memory could have been clobbered. */
2565 if (unknown_address_altered
2566 /* Don't mess with volatile memory references. */
2567 || MEM_VOLATILE_P (x
))
2570 /* See if there is any dependence between a store and this load. */
2571 for (i
= loop_store_mems_idx
- 1; i
>= 0; i
--)
2572 if (true_dependence (loop_store_mems
[i
], x
))
2575 /* It's not invalidated by a store in memory
2576 but we must still verify the address is invariant. */
2580 /* Don't mess with insns declared volatile. */
2581 if (MEM_VOLATILE_P (x
))
2585 fmt
= GET_RTX_FORMAT (code
);
2586 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2590 int tem
= invariant_p (XEXP (x
, i
));
2596 else if (fmt
[i
] == 'E')
2599 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2601 int tem
= invariant_p (XVECEXP (x
, i
, j
));
2611 return 1 + conditional
;
2614 /* Return 1 if OTHER (a mem ref) overlaps the area of memory
2615 which is SIZE bytes starting at BASE. */
2618 addr_overlap_p (other
, base
, size
)
2625 if (GET_CODE (base
) == CONST
)
2626 base
= XEXP (base
, 0);
2627 if (GET_CODE (base
) == PLUS
2628 && GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2630 start
= INTVAL (XEXP (base
, 1));
2631 base
= XEXP (base
, 0);
2635 return refers_to_mem_p (other
, base
, start
, end
);
2638 /* Return nonzero if all the insns in the loop that set REG
2639 are INSN and the immediately following insns,
2640 and if each of those insns sets REG in an invariant way
2641 (not counting uses of REG in them).
2643 The value is 2 if some of these insns are only conditionally invariant.
2645 We assume that INSN itself is the first set of REG
2646 and that its source is invariant. */
2649 consec_sets_invariant_p (reg
, n_sets
, insn
)
2653 register rtx p
= insn
;
2654 register int regno
= REGNO (reg
);
2656 /* Number of sets we have to insist on finding after INSN. */
2657 int count
= n_sets
- 1;
2658 int old
= n_times_set
[regno
];
2662 /* If N_SETS hit the limit, we can't rely on its value. */
2666 n_times_set
[regno
] = 0;
2670 register enum rtx_code code
;
2674 code
= GET_CODE (p
);
2676 /* If library call, skip to end of of it. */
2677 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, 0)))
2682 && (set
= single_set (p
))
2683 && GET_CODE (SET_DEST (set
)) == REG
2684 && REGNO (SET_DEST (set
)) == regno
)
2686 this = invariant_p (SET_SRC (set
));
2689 else if (temp
= find_reg_note (p
, REG_EQUAL
, 0))
2691 this = invariant_p (XEXP (temp
, 0));
2698 else if (code
!= NOTE
)
2700 n_times_set
[regno
] = old
;
2705 n_times_set
[regno
] = old
;
2706 /* If invariant_p ever returned 2, we return 2. */
2707 return 1 + (value
& 2);
2711 /* I don't think this condition is sufficient to allow INSN
2712 to be moved, so we no longer test it. */
2714 /* Return 1 if all insns in the basic block of INSN and following INSN
2715 that set REG are invariant according to TABLE. */
2718 all_sets_invariant_p (reg
, insn
, table
)
2722 register rtx p
= insn
;
2723 register int regno
= REGNO (reg
);
2727 register enum rtx_code code
;
2729 code
= GET_CODE (p
);
2730 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
2732 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
2733 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
2734 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
2736 if (!invariant_p (SET_SRC (PATTERN (p
)), table
))
2743 /* Look at all uses (not sets) of registers in X. For each, if it is
2744 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
2745 a different insn, set USAGE[REGNO] to const0_rtx. */
2748 find_single_use_in_loop (insn
, x
, usage
)
2753 enum rtx_code code
= GET_CODE (x
);
2754 char *fmt
= GET_RTX_FORMAT (code
);
2759 = (usage
[REGNO (x
)] != 0 && usage
[REGNO (x
)] != insn
)
2760 ? const0_rtx
: insn
;
2762 else if (code
== SET
)
2764 /* Don't count SET_DEST if it is a REG; otherwise count things
2765 in SET_DEST because if a register is partially modified, it won't
2766 show up as a potential movable so we don't care how USAGE is set
2768 if (GET_CODE (SET_DEST (x
)) != REG
)
2769 find_single_use_in_loop (insn
, SET_DEST (x
), usage
);
2770 find_single_use_in_loop (insn
, SET_SRC (x
), usage
);
2773 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2775 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
2776 find_single_use_in_loop (insn
, XEXP (x
, i
), usage
);
2777 else if (fmt
[i
] == 'E')
2778 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2779 find_single_use_in_loop (insn
, XVECEXP (x
, i
, j
), usage
);
2783 /* Increment N_TIMES_SET at the index of each register
2784 that is modified by an insn between FROM and TO.
2785 If the value of an element of N_TIMES_SET becomes 127 or more,
2786 stop incrementing it, to avoid overflow.
2788 Store in SINGLE_USAGE[I] the single insn in which register I is
2789 used, if it is only used once. Otherwise, it is set to 0 (for no
2790 uses) or const0_rtx for more than one use. This parameter may be zero,
2791 in which case this processing is not done.
2793 Store in *COUNT_PTR the number of actual instruction
2794 in the loop. We use this to decide what is worth moving out. */
2796 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
2797 In that case, it is the insn that last set reg n. */
2800 count_loop_regs_set (from
, to
, may_not_move
, single_usage
, count_ptr
, nregs
)
2801 register rtx from
, to
;
2807 register rtx
*last_set
= (rtx
*) alloca (nregs
* sizeof (rtx
));
2809 register int count
= 0;
2812 bzero (last_set
, nregs
* sizeof (rtx
));
2813 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
2815 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2819 /* If requested, record registers that have exactly one use. */
2822 find_single_use_in_loop (insn
, PATTERN (insn
), single_usage
);
2824 /* Include uses in REG_EQUAL notes. */
2825 if (REG_NOTES (insn
))
2826 find_single_use_in_loop (insn
, REG_NOTES (insn
), single_usage
);
2829 if (GET_CODE (PATTERN (insn
)) == CLOBBER
2830 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
2831 /* Don't move a reg that has an explicit clobber.
2832 We might do so sometimes, but it's not worth the pain. */
2833 may_not_move
[REGNO (XEXP (PATTERN (insn
), 0))] = 1;
2835 if (GET_CODE (PATTERN (insn
)) == SET
2836 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
2838 dest
= SET_DEST (PATTERN (insn
));
2839 while (GET_CODE (dest
) == SUBREG
2840 || GET_CODE (dest
) == ZERO_EXTRACT
2841 || GET_CODE (dest
) == SIGN_EXTRACT
2842 || GET_CODE (dest
) == STRICT_LOW_PART
)
2843 dest
= XEXP (dest
, 0);
2844 if (GET_CODE (dest
) == REG
)
2846 register int regno
= REGNO (dest
);
2847 /* If this is the first setting of this reg
2848 in current basic block, and it was set before,
2849 it must be set in two basic blocks, so it cannot
2850 be moved out of the loop. */
2851 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
2852 may_not_move
[regno
] = 1;
2853 /* If this is not first setting in current basic block,
2854 see if reg was used in between previous one and this.
2855 If so, neither one can be moved. */
2856 if (last_set
[regno
] != 0
2857 && reg_used_between_p (dest
, last_set
[regno
], insn
))
2858 may_not_move
[regno
] = 1;
2859 if (n_times_set
[regno
] < 127)
2860 ++n_times_set
[regno
];
2861 last_set
[regno
] = insn
;
2864 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2867 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
2869 register rtx x
= XVECEXP (PATTERN (insn
), 0, i
);
2870 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
2871 /* Don't move a reg that has an explicit clobber.
2872 It's not worth the pain to try to do it correctly. */
2873 may_not_move
[REGNO (XEXP (x
, 0))] = 1;
2875 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2877 dest
= SET_DEST (x
);
2878 while (GET_CODE (dest
) == SUBREG
2879 || GET_CODE (dest
) == ZERO_EXTRACT
2880 || GET_CODE (dest
) == SIGN_EXTRACT
2881 || GET_CODE (dest
) == STRICT_LOW_PART
)
2882 dest
= XEXP (dest
, 0);
2883 if (GET_CODE (dest
) == REG
)
2885 register int regno
= REGNO (dest
);
2886 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
2887 may_not_move
[regno
] = 1;
2888 if (last_set
[regno
] != 0
2889 && reg_used_between_p (dest
, last_set
[regno
], insn
))
2890 may_not_move
[regno
] = 1;
2891 if (n_times_set
[regno
] < 127)
2892 ++n_times_set
[regno
];
2893 last_set
[regno
] = insn
;
2899 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
2900 bzero (last_set
, nregs
* sizeof (rtx
));
2905 /* Given a loop that is bounded by LOOP_START and LOOP_END
2906 and that is entered at SCAN_START,
2907 return 1 if the register set in SET contained in insn INSN is used by
2908 any insn that precedes INSN in cyclic order starting
2909 from the loop entry point.
2911 We don't want to use INSN_LUID here because if we restrict INSN to those
2912 that have a valid INSN_LUID, it means we cannot move an invariant out
2913 from an inner loop past two loops. */
2916 loop_reg_used_before_p (set
, insn
, loop_start
, scan_start
, loop_end
)
2917 rtx set
, insn
, loop_start
, scan_start
, loop_end
;
2919 rtx reg
= SET_DEST (set
);
2922 /* Scan forward checking for register usage. If we hit INSN, we
2923 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
2924 for (p
= scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
2926 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
2927 && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
2937 /* A "basic induction variable" or biv is a pseudo reg that is set
2938 (within this loop) only by incrementing or decrementing it. */
2939 /* A "general induction variable" or giv is a pseudo reg whose
2940 value is a linear function of a biv. */
2942 /* Bivs are recognized by `basic_induction_var';
2943 Givs by `general_induct_var'. */
2945 /* Indexed by register number, indicates whether or not register is an
2946 induction variable, and if so what type. */
2948 enum iv_mode
*reg_iv_type
;
2950 /* Indexed by register number, contains pointer to `struct induction'
2951 if register is an induction variable. This holds general info for
2952 all induction variables. */
2954 struct induction
**reg_iv_info
;
2956 /* Indexed by register number, contains pointer to `struct iv_class'
2957 if register is a basic induction variable. This holds info describing
2958 the class (a related group) of induction variables that the biv belongs
2961 struct iv_class
**reg_biv_class
;
2963 /* The head of a list which links together (via the next field)
2964 every iv class for the current loop. */
2966 struct iv_class
*loop_iv_list
;
2968 /* Communication with routines called via `note_stores'. */
2970 static rtx note_insn
;
2972 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
2974 static rtx addr_placeholder
;
2976 /* ??? Unfinished optimizations, and possible future optimizations,
2977 for the strength reduction code. */
2979 /* ??? There is one more optimization you might be interested in doing: to
2980 allocate pseudo registers for frequently-accessed memory locations.
2981 If the same memory location is referenced each time around, it might
2982 be possible to copy it into a register before and out after.
2983 This is especially useful when the memory location is a variable which
2984 is in a stack slot because somewhere its address is taken. If the
2985 loop doesn't contain a function call and the variable isn't volatile,
2986 it is safe to keep the value in a register for the duration of the
2987 loop. One tricky thing is that the copying of the value back from the
2988 register has to be done on all exits from the loop. You need to check that
2989 all the exits from the loop go to the same place. */
2991 /* ??? The interaction of biv elimination, and recognition of 'constant'
2992 bivs, may cause problems. */
2994 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
2995 performance problems.
2997 Perhaps don't eliminate things that can be combined with an addressing
2998 mode. Find all givs that have the same biv, mult_val, and add_val;
2999 then for each giv, check to see if its only use dies in a following
3000 memory address. If so, generate a new memory address and check to see
3001 if it is valid. If it is valid, then store the modified memory address,
3002 otherwise, mark the giv as not done so that it will get its own iv. */
3004 /* ??? Could try to optimize branches when it is known that a biv is always
3007 /* ??? When replace a biv in a compare insn, we should replace with closest
3008 giv so that an optimized branch can still be recognized by the combiner,
3009 e.g. the VAX acb insn. */
3011 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3012 was rerun in loop_optimize whenever a register was added or moved.
3013 Also, some of the optimizations could be a little less conservative. */
3015 /* Perform strength reduction and induction variable elimination. */
3017 /* Pseudo registers created during this function will be beyond the last
3018 valid index in several tables including n_times_set and regno_last_uid.
3019 This does not cause a problem here, because the added registers cannot be
3020 givs outside of their loop, and hence will never be reconsidered.
3021 But scan_loop must check regnos to make sure they are in bounds. */
3024 strength_reduce (scan_start
, end
, loop_top
, insn_count
,
3025 loop_start
, loop_end
)
3038 /* This is 1 if current insn is not executed at least once for every loop
3040 int not_every_iteration
= 0;
3041 /* Temporary list pointers for traversing loop_iv_list. */
3042 struct iv_class
*bl
, **backbl
;
3043 /* Ratio of extra register life span we can justify
3044 for saving an instruction. More if loop doesn't call subroutines
3045 since in that case saving an insn makes more difference
3046 and more registers are available. */
3047 /* ??? could set this to last value of threshold in move_movables */
3048 int threshold
= (loop_has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
3049 /* Map of pseudo-register replacements. */
3053 rtx end_insert_before
;
3055 reg_iv_type
= (enum iv_mode
*) alloca (max_reg_before_loop
3056 * sizeof (enum iv_mode
*));
3057 bzero ((char *) reg_iv_type
, max_reg_before_loop
* sizeof (enum iv_mode
*));
3058 reg_iv_info
= (struct induction
**)
3059 alloca (max_reg_before_loop
* sizeof (struct induction
*));
3060 bzero ((char *) reg_iv_info
, (max_reg_before_loop
3061 * sizeof (struct induction
*)));
3062 reg_biv_class
= (struct iv_class
**)
3063 alloca (max_reg_before_loop
* sizeof (struct iv_class
*));
3064 bzero ((char *) reg_biv_class
, (max_reg_before_loop
3065 * sizeof (struct iv_class
*)));
3068 addr_placeholder
= gen_reg_rtx (Pmode
);
3070 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3071 must be put before this insn, so that they will appear in the right
3072 order (i.e. loop order). */
3074 end_insert_before
= NEXT_INSN (loop_end
);
3076 /* Scan through loop to find all possible bivs. */
3082 /* At end of a straight-in loop, we are done.
3083 At end of a loop entered at the bottom, scan the top. */
3084 if (p
== scan_start
)
3089 p
= NEXT_INSN (loop_top
);
3092 if (p
== scan_start
)
3096 if (GET_CODE (p
) == INSN
3097 && (set
= single_set (p
))
3098 && GET_CODE (SET_DEST (set
)) == REG
)
3100 dest_reg
= SET_DEST (set
);
3101 if (REGNO (dest_reg
) < max_reg_before_loop
3102 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
3103 && reg_iv_type
[REGNO (dest_reg
)] != NOT_BASIC_INDUCT
)
3105 if (basic_induction_var (SET_SRC (set
), dest_reg
,
3106 &inc_val
, &mult_val
))
3108 /* It is a possible basic induction variable.
3109 Create and initialize an induction structure for it. */
3112 = (struct induction
*) alloca (sizeof (struct induction
));
3114 record_biv (v
, p
, dest_reg
, inc_val
, mult_val
,
3115 not_every_iteration
);
3116 reg_iv_type
[REGNO (dest_reg
)] = BASIC_INDUCT
;
3118 else if (REGNO (dest_reg
) < max_reg_before_loop
)
3119 reg_iv_type
[REGNO (dest_reg
)] = NOT_BASIC_INDUCT
;
3123 /* Past a label or a jump, we get to insns for which we can't count
3124 on whether or how many times they will be executed during each
3126 /* This code appears in three places, once in scan_loop, and twice
3127 in strength_reduce. */
3128 if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
3129 /* If we enter the loop in the middle, and scan around to the
3130 beginning, don't set not_every_iteration for that.
3131 This can be any kind of jump, since we want to know if insns
3132 will be executed if the loop is executed. */
3133 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
3134 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3135 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3136 not_every_iteration
= 1;
3138 /* At the virtual top of a converted loop, insns are again known to
3139 be executed each iteration: logically, the loop begins here
3140 even though the exit code has been duplicated. */
3142 else if (GET_CODE (p
) == NOTE
3143 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
)
3144 not_every_iteration
= 0;
3146 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3147 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3148 or not an insn is known to be executed each iteration of the
3149 loop, whether or not any iterations are known to occur.
3151 Therefore, if we have just passed a label and have no more labels
3152 between here and the test insn of the loop, we know these insns
3153 will be executed each iteration. This can also happen if we
3154 have just passed a jump, for example, when there are nested loops. */
3156 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3157 && no_labels_between_p (p
, loop_end
))
3158 not_every_iteration
= 0;
3161 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3162 Make a sanity check against n_times_set. */
3163 for (backbl
= &loop_iv_list
, bl
= *backbl
; bl
; bl
= bl
->next
)
3165 if (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3166 /* Above happens if register modified by subreg, etc. */
3167 /* Make sure it is not recognized as a basic induction var: */
3168 || n_times_set
[bl
->regno
] != bl
->biv_count
3169 /* If never incremented, it is invariant that we decided not to
3170 move. So leave it alone. */
3171 || ! bl
->incremented
)
3173 if (loop_dump_stream
)
3174 fprintf (loop_dump_stream
, "Reg %d: biv discarded, %s\n",
3176 (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3177 ? "not induction variable"
3178 : (! bl
->incremented
? "never incremented"
3181 reg_iv_type
[bl
->regno
] = NOT_BASIC_INDUCT
;
3188 if (loop_dump_stream
)
3189 fprintf (loop_dump_stream
, "Reg %d: biv verified\n", bl
->regno
);
3193 /* Exit if there are no bivs. */
3196 /* Can still unroll the loop anyways, but indicate that there is no
3197 strength reduction info available. */
3198 if (flag_unroll_loops
)
3199 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 0);
3204 /* Find initial value for each biv by searching backwards from loop_start,
3205 halting at first label. Also record any test condition. */
3208 for (p
= loop_start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
3212 if (GET_CODE (p
) == CALL_INSN
)
3215 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3216 || GET_CODE (p
) == CALL_INSN
)
3217 note_stores (PATTERN (p
), record_initial
);
3219 /* Record any test of a biv that branches around the loop if no store
3220 between it and the start of loop. We only care about tests with
3221 constants and registers and only certain of those. */
3222 if (GET_CODE (p
) == JUMP_INSN
3223 && JUMP_LABEL (p
) != 0
3224 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop_end
)
3225 && (test
= get_condition_for_loop (p
)) != 0
3226 && GET_CODE (XEXP (test
, 0)) == REG
3227 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
3228 && (bl
= reg_biv_class
[REGNO (XEXP (test
, 0))]) != 0
3229 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop_start
)
3230 && bl
->init_insn
== 0)
3232 /* If an NE test, we have an initial value! */
3233 if (GET_CODE (test
) == NE
)
3236 bl
->init_set
= gen_rtx (SET
, VOIDmode
,
3237 XEXP (test
, 0), XEXP (test
, 1));
3240 bl
->initial_test
= test
;
3244 /* Look at the each biv and see if we can say anything better about its
3245 initial value from any initializing insns set up above. (This is done
3246 in two passes to avoid missing SETs in a PARALLEL.) */
3247 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3251 if (! bl
->init_insn
)
3254 src
= SET_SRC (bl
->init_set
);
3256 if (loop_dump_stream
)
3257 fprintf (loop_dump_stream
,
3258 "Biv %d initialized at insn %d: initial value ",
3259 bl
->regno
, INSN_UID (bl
->init_insn
));
3261 if (valid_initial_value_p (src
, bl
->init_insn
, call_seen
, loop_start
))
3263 bl
->initial_value
= src
;
3265 if (loop_dump_stream
)
3267 if (GET_CODE (src
) == CONST_INT
)
3268 fprintf (loop_dump_stream
, "%d\n", INTVAL (src
));
3271 print_rtl (loop_dump_stream
, src
);
3272 fprintf (loop_dump_stream
, "\n");
3278 /* Biv initial value is not simple move,
3279 so let it keep intial value of "itself". */
3281 if (loop_dump_stream
)
3282 fprintf (loop_dump_stream
, "is complex\n");
3286 /* Search the loop for general induction variables. */
3288 /* A register is a giv if: it is only set once, it is a function of a
3289 biv and a constant (or invariant), and it is not a biv. */
3291 not_every_iteration
= 0;
3296 /* At end of a straight-in loop, we are done.
3297 At end of a loop entered at the bottom, scan the top. */
3298 if (p
== scan_start
)
3303 p
= NEXT_INSN (loop_top
);
3306 if (p
== scan_start
)
3310 /* Look for a general induction variable in a register. */
3311 if (GET_CODE (p
) == INSN
3312 && (set
= single_set (p
))
3313 && GET_CODE (SET_DEST (set
)) == REG
3314 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
3322 dest_reg
= SET_DEST (set
);
3323 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
3326 if (/* SET_SRC is a giv. */
3327 ((benefit
= general_induction_var (SET_SRC (set
),
3330 /* Equivalent expression is a giv. */
3331 || ((regnote
= find_reg_note (p
, REG_EQUAL
, 0))
3332 && (benefit
= general_induction_var (XEXP (regnote
, 0),
3334 &add_val
, &mult_val
))))
3335 /* Don't try to handle any regs made by loop optimization.
3336 We have nothing on them in regno_first_uid, etc. */
3337 && REGNO (dest_reg
) < max_reg_before_loop
3338 /* Don't recognize a BASIC_INDUCT_VAR here. */
3339 && dest_reg
!= src_reg
3340 /* This must be the only place where the register is set. */
3341 && (n_times_set
[REGNO (dest_reg
)] == 1
3342 /* or all sets must be consecutive and make a giv. */
3343 || (benefit
= consec_sets_giv (benefit
, p
,
3345 &add_val
, &mult_val
))))
3349 = (struct induction
*) alloca (sizeof (struct induction
));
3352 /* If this is a library call, increase benefit. */
3353 if (find_reg_note (p
, REG_RETVAL
, 0))
3354 benefit
+= libcall_benefit (p
);
3356 /* Skip the consecutive insns, if there are any. */
3357 for (count
= n_times_set
[REGNO (dest_reg
)] - 1;
3360 /* If first insn of libcall sequence, skip to end.
3361 Do this at start of loop, since INSN is guaranteed to
3363 if (GET_CODE (p
) != NOTE
3364 && (temp
= find_reg_note (p
, REG_LIBCALL
, 0)))
3367 do p
= NEXT_INSN (p
);
3368 while (GET_CODE (p
) == NOTE
);
3371 record_giv (v
, p
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
3372 DEST_REG
, not_every_iteration
, 0, loop_start
,
3378 #ifndef DONT_REDUCE_ADDR
3379 /* Look for givs which are memory addresses. */
3380 /* This resulted in worse code on a VAX 8600. I wonder if it
3382 if (GET_CODE (p
) == INSN
)
3383 find_mem_givs (PATTERN (p
), p
, not_every_iteration
, loop_start
,
3387 /* Update the status of whether giv can derive other givs. This can
3388 change when we pass a label or an insn that updates a biv. */
3389 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == CODE_LABEL
)
3390 update_giv_derive (p
);
3392 /* Past a label or a jump, we get to insns for which we can't count
3393 on whether or how many times they will be executed during each
3395 /* This code appears in three places, once in scan_loop, and twice
3396 in strength_reduce. */
3397 if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
3398 /* If we enter the loop in the middle, and scan around
3399 to the beginning, don't set not_every_iteration for that.
3400 This can be any kind of jump, since we want to know if insns
3401 will be executed if the loop is executed. */
3402 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
3403 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3404 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3405 not_every_iteration
= 1;
3407 /* At the virtual top of a converted loop, insns are again known to
3408 be executed each iteration: logically, the loop begins here
3409 even though the exit code has been duplicated. */
3411 else if (GET_CODE (p
) == NOTE
3412 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
)
3413 not_every_iteration
= 0;
3415 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3416 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3417 or not an insn is known to be executed each iteration of the
3418 loop, whether or not any iterations are known to occur.
3420 Therefore, if we have just passed a label and have no more labels
3421 between here and the test insn of the loop, we know these insns
3422 will be executed each iteration. */
3424 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3425 && no_labels_between_p (p
, loop_end
))
3426 not_every_iteration
= 0;
3429 /* Try to calculate and save the number of loop iterations. This is
3430 set to zero if the actual number can not be calculated. This must
3431 be called after all giv's have been identified, since otherwise it may
3432 fail if the iteration variable is a giv. */
3434 loop_n_iterations
= loop_iterations (loop_start
, loop_end
);
3436 /* Now for each giv for which we still don't know whether or not it is
3437 replaceable, check to see if it is replaceable because its final value
3438 can be calculated. This must be done after loop_iterations is called,
3439 so that final_giv_value will work correctly. */
3441 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3443 struct induction
*v
;
3445 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3446 if (! v
->replaceable
&& ! v
->not_replaceable
)
3447 check_final_value (v
, loop_start
, loop_end
);
3450 /* Try to prove that the loop counter variable (if any) is always
3451 nonnegative; if so, record that fact with a REG_NONNEG note
3452 so that "decrement and branch until zero" insn can be used. */
3453 check_dbra_loop (loop_end
, insn_count
, loop_start
);
3455 /* Create reg_map to hold substitutions for replaceable giv regs. */
3456 reg_map
= (rtx
*) alloca (max_reg_before_loop
* sizeof (rtx
));
3457 bzero ((char *) reg_map
, max_reg_before_loop
* sizeof (rtx
));
3459 /* Examine each iv class for feasibility of strength reduction/induction
3460 variable elimination. */
3462 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3464 struct induction
*v
;
3467 rtx final_value
= 0;
3469 /* Test whether it will be possible to eliminate this biv
3470 provided all givs are reduced. This is possible if either
3471 the reg is not used outside the loop, or we can compute
3472 what its final value will be.
3474 For architectures with a decrement_and_branch_until_zero insn,
3475 don't do this if we put a REG_NONNEG note on the endtest for
3478 /* Compare against bl->init_insn rather than loop_start.
3479 We aren't concerned with any uses of the biv between
3480 init_insn and loop_start since these won't be affected
3481 by the value of the biv elsewhere in the function, so
3482 long as init_insn doesn't use the biv itself.
3483 March 14, 1989 -- self@bayes.arc.nasa.gov */
3485 if ((uid_luid
[regno_last_uid
[bl
->regno
]] < INSN_LUID (loop_end
)
3487 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
3488 && uid_luid
[regno_first_uid
[bl
->regno
]] >= INSN_LUID (bl
->init_insn
)
3489 #ifdef HAVE_decrement_and_branch_until_zero
3492 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
3493 || ((final_value
= final_biv_value (bl
, loop_start
, loop_end
))
3494 #ifdef HAVE_decrement_and_branch_until_zero
3498 bl
->eliminable
= maybe_eliminate_biv (bl
, loop_start
, end
, 0,
3499 threshold
, insn_count
);
3502 if (loop_dump_stream
)
3504 fprintf (loop_dump_stream
,
3505 "Cannot eliminate biv %d.\n",
3507 fprintf (loop_dump_stream
,
3508 "First use: insn %d, last use: insn %d.\n",
3509 regno_first_uid
[bl
->regno
],
3510 regno_last_uid
[bl
->regno
]);
3514 /* Combine all giv's for this iv_class. */
3517 /* This will be true at the end, if all givs which depend on this
3518 biv have been strength reduced.
3519 We can't (currently) eliminate the biv unless this is so. */
3522 /* Check each giv in this class to see if we will benefit by reducing
3523 it. Skip giv's combined with others. */
3524 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3526 struct induction
*tv
;
3528 if (v
->ignore
|| v
->same
)
3531 benefit
= v
->benefit
;
3533 /* Reduce benefit if not replaceable, since we will insert
3534 a move-insn to replace the insn that calculates this giv.
3535 Don't do this unless the giv is a user variable, since it
3536 will often be marked non-replaceable because of the duplication
3537 of the exit code outside the loop. In such a case, the copies
3538 we insert are dead and will be deleted. So they don't have
3539 a cost. Similar situations exist. */
3540 /* ??? The new final_[bg]iv_value code does a much better job
3541 of finding replaceable giv's, and hence this code may no longer
3543 if (! v
->replaceable
&& ! bl
->eliminable
3544 && REG_USERVAR_P (v
->dest_reg
))
3545 benefit
-= copy_cost
;
3547 /* Decrease the benefit to count the add-insns that we will
3548 insert to increment the reduced reg for the giv. */
3549 benefit
-= add_cost
* bl
->biv_count
;
3551 /* Decide whether to strength-reduce this giv or to leave the code
3552 unchanged (recompute it from the biv each time it is used).
3553 This decision can be made independently for each giv. */
3555 /* ??? Perhaps attempt to guess whether autoincrement will handle
3556 some of the new add insns; if so, can increase BENEFIT
3557 (undo the subtraction of add_cost that was done above). */
3559 /* If an insn is not to be strength reduced, then set its ignore
3560 flag, and clear all_reduced. */
3562 if (v
->lifetime
* threshold
* benefit
< insn_count
)
3564 if (loop_dump_stream
)
3565 fprintf (loop_dump_stream
,
3566 "giv of insn %d not worth while, %d vs %d.\n",
3568 v
->lifetime
* threshold
* benefit
, insn_count
);
3574 /* Check that we can increment the reduced giv without a
3575 multiply insn. If not, reject it. */
3577 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
3578 if (tv
->mult_val
== const1_rtx
3579 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
3581 if (loop_dump_stream
)
3582 fprintf (loop_dump_stream
,
3583 "giv of insn %d: would need a multiply.\n",
3584 INSN_UID (v
->insn
));
3592 /* Reduce each giv that we decided to reduce. */
3594 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3596 struct induction
*tv
;
3597 if (! v
->ignore
&& v
->same
== 0)
3599 v
->new_reg
= gen_reg_rtx (v
->mode
);
3601 /* For each place where the biv is incremented,
3602 add an insn to increment the new, reduced reg for the giv. */
3603 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
3605 if (tv
->mult_val
== const1_rtx
)
3606 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
3607 v
->new_reg
, v
->new_reg
, tv
->insn
);
3608 else /* tv->mult_val == const0_rtx */
3609 /* A multiply is acceptable here
3610 since this is presumed to be seldom executed. */
3611 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
3612 v
->add_val
, v
->new_reg
, tv
->insn
);
3615 /* Add code at loop start to initialize giv's reduced reg. */
3617 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
3618 v
->add_val
, v
->new_reg
, loop_start
);
3622 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
3625 For each giv register that can be reduced now: if replaceable,
3626 substitute reduced reg wherever the old giv occurs;
3627 else add new move insn "giv_reg = reduced_reg".
3629 Also check for givs whose first use is their definition and whose
3630 last use is the definition of another giv. If so, it is likely
3631 dead and should not be used to eliminate a biv. */
3632 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3634 if (v
->same
&& v
->same
->ignore
)
3640 if (v
->giv_type
== DEST_REG
3641 && regno_first_uid
[REGNO (v
->dest_reg
)] == INSN_UID (v
->insn
))
3643 struct induction
*v1
;
3645 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
3646 if (regno_last_uid
[REGNO (v
->dest_reg
)] == INSN_UID (v1
->insn
))
3650 /* Update expression if this was combined, in case other giv was
3653 v
->new_reg
= replace_rtx (v
->new_reg
,
3654 v
->same
->dest_reg
, v
->same
->new_reg
);
3656 if (v
->giv_type
== DEST_ADDR
)
3657 /* Store reduced reg as the address in the memref where we found
3659 *v
->location
= v
->new_reg
;
3660 else if (v
->replaceable
)
3662 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
3665 /* I can no longer duplicate the original problem. Perhaps
3666 this is unnecessary now? */
3668 /* Replaceable; it isn't strictly necessary to delete the old
3669 insn and emit a new one, because v->dest_reg is now dead.
3671 However, especially when unrolling loops, the special
3672 handling for (set REG0 REG1) in the second cse pass may
3673 make v->dest_reg live again. To avoid this problem, emit
3674 an insn to set the original giv reg from the reduced giv.
3675 We can not delete the original insn, since it may be part
3676 of a LIBCALL, and the code in flow that eliminates dead
3677 libcalls will fail if it is deleted. */
3678 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
3684 /* Not replaceable; emit an insn to set the original giv reg from
3685 the reduced giv, same as above. */
3686 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
3690 /* When a loop is reversed, givs which depend on the reversed
3691 biv, and which are live outside the loop, must be set to their
3692 correct final value. This insn is only needed if the giv is
3693 not replaceable. The correct final value is the same as the
3694 value that the giv starts the reversed loop with. */
3695 if (bl
->reversed
&& ! v
->replaceable
)
3696 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
3697 v
->add_val
, v
->dest_reg
, end_insert_before
);
3698 else if (v
->final_value
)
3702 /* If the loop has multiple exits, emit the insn before the
3703 loop to ensure that it will always be executed no matter
3704 how the loop exits. Otherwise, emit the insn after the loop,
3705 since this is slightly more efficient. */
3706 if (loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]])
3707 insert_before
= loop_start
;
3709 insert_before
= end_insert_before
;
3710 emit_insn_before (gen_move_insn (v
->dest_reg
, v
->final_value
),
3714 /* If the insn to set the final value of the giv was emitted
3715 before the loop, then we must delete the insn inside the loop
3716 that sets it. If this is a LIBCALL, then we must delete
3717 every insn in the libcall. Note, however, that
3718 final_giv_value will only succeed when there are multiple
3719 exits if the giv is dead at each exit, hence it does not
3720 matter that the original insn remains because it is dead
3722 /* Delete the insn inside the loop that sets the giv since
3723 the giv is now set before (or after) the loop. */
3724 delete_insn (v
->insn
);
3728 if (loop_dump_stream
)
3730 fprintf (loop_dump_stream
, "giv at %d reduced to ",
3731 INSN_UID (v
->insn
));
3732 print_rtl (loop_dump_stream
, v
->new_reg
);
3733 fprintf (loop_dump_stream
, "\n");
3737 /* All the givs based on the biv bl have been reduced if they
3740 /* For each giv not marked as maybe dead that has been combined with a
3741 second giv, clear any "maybe dead" mark on that second giv.
3742 v->new_reg will either be or refer to the register of the giv it
3745 Doing this clearing avoids problems in biv elimination where a
3746 giv's new_reg is a complex value that can't be put in the insn but
3747 the giv combined with (with a reg as new_reg) is marked maybe_dead.
3748 Since the register will be used in either case, we'd prefer it be
3749 used from the simpler giv. */
3751 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3752 if (! v
->maybe_dead
&& v
->same
)
3753 v
->same
->maybe_dead
= 0;
3755 /* Try to eliminate the biv, if it is a candidate.
3756 This won't work if ! all_reduced,
3757 since the givs we planned to use might not have been reduced.
3759 We have to be careful that we didn't initially think we could elminate
3760 this biv because of a giv that we now think may be dead and shouldn't
3761 be used as a biv replacement.
3763 Also, there is the possibility that we may have a giv that looks
3764 like it can be used to eliminate a biv, but the resulting insn
3765 isn't valid. This can happen, for example, on the 88k, where a
3766 JUMP_INSN can compare a register only with zero. Attempts to
3767 replace it with a comapare with a constant will fail.
3769 Note that in cases where this call fails, we may have replaced some
3770 of the occurrences of the biv with a giv, but no harm was done in
3771 doing so in the rare cases where it can occur. */
3773 if (all_reduced
== 1 && bl
->eliminable
3774 && maybe_eliminate_biv (bl
, loop_start
, end
, 1,
3775 threshold
, insn_count
))
3778 /* ?? If we created a new test to bypass the loop entirely,
3779 or otherwise drop straight in, based on this test, then
3780 we might want to rewrite it also. This way some later
3781 pass has more hope of removing the initialization of this
3784 /* If final_value != 0, then the biv may be used after loop end
3785 and we must emit an insn to set it just in case.
3787 Reversed bivs already have an insn after the loop setting their
3788 value, so we don't need another one. We can't calculate the
3789 proper final value for such a biv here anyways. */
3790 if (final_value
!= 0 && ! bl
->reversed
)
3794 /* If the loop has multiple exits, emit the insn before the
3795 loop to ensure that it will always be executed no matter
3796 how the loop exits. Otherwise, emit the insn after the
3797 loop, since this is slightly more efficient. */
3798 if (loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]])
3799 insert_before
= loop_start
;
3801 insert_before
= end_insert_before
;
3803 emit_insn_before (gen_move_insn (bl
->biv
->dest_reg
, final_value
),
3808 /* Delete all of the instructions inside the loop which set
3809 the biv, as they are all dead. If is safe to delete them,
3810 because an insn setting a biv will never be part of a libcall. */
3811 /* However, deleting them will invalidate the regno_last_uid info,
3812 so keeping them around is more convenient. Final_biv_value
3813 will only succeed when there are multiple exits if the biv
3814 is dead at each exit, hence it does not matter that the original
3815 insn remains, because it is dead anyways. */
3816 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
3817 delete_insn (v
->insn
);
3820 if (loop_dump_stream
)
3821 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
3826 /* Go through all the instructions in the loop, making all the
3827 register substitutions scheduled in REG_MAP. */
3829 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
3830 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3831 || GET_CODE (p
) == CALL_INSN
)
3833 replace_regs (PATTERN (p
), reg_map
, max_reg_before_loop
, 0);
3834 replace_regs (REG_NOTES (p
), reg_map
, max_reg_before_loop
, 0);
3837 /* Unroll loops from within strength reduction so that we can use the
3838 induction variable information that strength_reduce has already
3841 if (flag_unroll_loops
)
3842 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 1);
3844 if (loop_dump_stream
)
3845 fprintf (loop_dump_stream
, "\n");
3848 /* Return 1 if X is a valid source for an initial value (or as value being
3849 compared against in an initial test).
3851 X must be either a register or constant and must not be clobbered between
3852 the current insn and the start of the loop.
3854 INSN is the insn containing X. */
3857 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
3866 /* Only consider psuedos we know about initialized in insns whose luids
3868 if (GET_CODE (x
) != REG
3869 || REGNO (x
) >= max_reg_before_loop
)
3872 /* Don't use call-clobbered registers across a call which clobbers it. On
3873 some machines, don't use any hard registers at all. */
3874 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
3875 #ifndef SMALL_REGISTER_CLASSES
3876 && call_used_regs
[REGNO (x
)] && call_seen
3881 /* Don't use registers that have been clobbered before the start of the
3883 if (reg_set_between_p (x
, insn
, loop_start
))
3889 /* Scan X for memory refs and check each memory address
3890 as a possible giv. INSN is the insn whose pattern X comes from.
3891 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
3892 every loop iteration. */
3895 find_mem_givs (x
, insn
, not_every_iteration
, loop_start
, loop_end
)
3898 int not_every_iteration
;
3899 rtx loop_start
, loop_end
;
3902 register enum rtx_code code
;
3908 code
= GET_CODE (x
);
3932 benefit
= general_induction_var (XEXP (x
, 0),
3933 &src_reg
, &add_val
, &mult_val
);
3935 /* Don't make a DEST_ADDR giv with mult_val == 1 && add_val == 0.
3936 Such a giv isn't useful. */
3937 if (benefit
> 0 && (mult_val
!= const1_rtx
|| add_val
!= const0_rtx
))
3939 /* Found one; record it. */
3941 = (struct induction
*) oballoc (sizeof (struct induction
));
3943 record_giv (v
, insn
, src_reg
, addr_placeholder
, mult_val
,
3944 add_val
, benefit
, DEST_ADDR
, not_every_iteration
,
3945 &XEXP (x
, 0), loop_start
, loop_end
);
3947 v
->mem_mode
= GET_MODE (x
);
3953 /* Recursively scan the subexpressions for other mem refs. */
3955 fmt
= GET_RTX_FORMAT (code
);
3956 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3958 find_mem_givs (XEXP (x
, i
), insn
, not_every_iteration
, loop_start
,
3960 else if (fmt
[i
] == 'E')
3961 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3962 find_mem_givs (XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
3963 loop_start
, loop_end
);
3966 /* Fill in the data about one biv update.
3967 V is the `struct induction' in which we record the biv. (It is
3968 allocated by the caller, with alloca.)
3969 INSN is the insn that sets it.
3970 DEST_REG is the biv's reg.
3972 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
3973 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
3974 being set to INC_VAL. */
3977 record_biv (v
, insn
, dest_reg
, inc_val
, mult_val
, not_every_iteration
)
3978 struct induction
*v
;
3983 int not_every_iteration
;
3985 struct iv_class
*bl
;
3988 v
->src_reg
= dest_reg
;
3989 v
->dest_reg
= dest_reg
;
3990 v
->mult_val
= mult_val
;
3991 v
->add_val
= inc_val
;
3992 v
->mode
= GET_MODE (dest_reg
);
3993 v
->always_computable
= ! not_every_iteration
;
3995 /* Add this to the reg's iv_class, creating a class
3996 if this is the first incrementation of the reg. */
3998 bl
= reg_biv_class
[REGNO (dest_reg
)];
4001 /* Create and initialize new iv_class. */
4003 bl
= (struct iv_class
*) oballoc (sizeof (struct iv_class
));
4005 bl
->regno
= REGNO (dest_reg
);
4011 /* Set initial value to the reg itself. */
4012 bl
->initial_value
= dest_reg
;
4013 /* We haven't seen the intializing insn yet */
4016 bl
->initial_test
= 0;
4017 bl
->incremented
= 0;
4022 /* Add this class to loop_iv_list. */
4023 bl
->next
= loop_iv_list
;
4026 /* Put it in the array of biv register classes. */
4027 reg_biv_class
[REGNO (dest_reg
)] = bl
;
4030 /* Update IV_CLASS entry for this biv. */
4031 v
->next_iv
= bl
->biv
;
4034 if (mult_val
== const1_rtx
)
4035 bl
->incremented
= 1;
4037 if (loop_dump_stream
)
4039 fprintf (loop_dump_stream
,
4040 "Insn %d: possible biv, reg %d,",
4041 INSN_UID (insn
), REGNO (dest_reg
));
4042 if (GET_CODE (inc_val
) == CONST_INT
)
4043 fprintf (loop_dump_stream
, " const = %d\n",
4047 fprintf (loop_dump_stream
, " const = ");
4048 print_rtl (loop_dump_stream
, inc_val
);
4049 fprintf (loop_dump_stream
, "\n");
4054 /* Fill in the data about one giv.
4055 V is the `struct induction' in which we record the giv. (It is
4056 allocated by the caller, with alloca.)
4057 INSN is the insn that sets it.
4058 BENEFIT estimates the savings from deleting this insn.
4059 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4060 into a register or is used as a memory address.
4062 SRC_REG is the biv reg which the giv is computed from.
4063 DEST_REG is the giv's reg (if the giv is stored in a reg).
4064 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4065 LOCATION points to the place where this giv's value appears in INSN. */
4068 record_giv (v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
4069 type
, not_every_iteration
, location
, loop_start
, loop_end
)
4070 struct induction
*v
;
4074 rtx mult_val
, add_val
;
4077 int not_every_iteration
;
4079 rtx loop_start
, loop_end
;
4081 struct induction
*b
;
4082 struct iv_class
*bl
;
4083 rtx set
= single_set (insn
);
4087 v
->src_reg
= src_reg
;
4089 v
->dest_reg
= dest_reg
;
4090 v
->mult_val
= mult_val
;
4091 v
->add_val
= add_val
;
4092 v
->benefit
= benefit
;
4093 v
->location
= location
;
4095 v
->combined_with
= 0;
4097 v
->derive_adjustment
= 0;
4103 /* The v->always_computable field is used in update_giv_derive, to
4104 determine whether a giv can be used to derive another giv. For a
4105 DEST_REG giv, INSN computes a new value for the giv, so its value
4106 isn't computable if INSN insn't executed every iteration.
4107 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4108 it does not compute a new value. Hence the value is always computable
4109 irregardless of whether INSN is executed each iteration. */
4111 if (type
== DEST_ADDR
)
4112 v
->always_computable
= 1;
4114 v
->always_computable
= ! not_every_iteration
;
4116 if (type
== DEST_ADDR
)
4118 v
->mode
= GET_MODE (*location
);
4122 else /* type == DEST_REG */
4124 v
->mode
= GET_MODE (SET_DEST (set
));
4126 v
->lifetime
= (uid_luid
[regno_last_uid
[REGNO (dest_reg
)]]
4127 - uid_luid
[regno_first_uid
[REGNO (dest_reg
)]]);
4129 v
->times_used
= n_times_used
[REGNO (dest_reg
)];
4131 /* If the lifetime is zero, it means that this register is
4132 really a dead store. So mark this as a giv that can be
4133 ignored. This will not prevent the biv from being eliminated. */
4134 if (v
->lifetime
== 0)
4137 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
4138 reg_iv_info
[REGNO (dest_reg
)] = v
;
4141 /* Add the giv to the class of givs computed from one biv. */
4143 bl
= reg_biv_class
[REGNO (src_reg
)];
4146 v
->next_iv
= bl
->giv
;
4148 /* Don't count DEST_ADDR. This is supposed to count the number of
4149 insns that calculate givs. */
4150 if (type
== DEST_REG
)
4152 bl
->total_benefit
+= benefit
;
4155 /* Fatal error, biv missing for this giv? */
4158 if (type
== DEST_ADDR
)
4162 /* The giv can be replaced outright by the reduced register only if all
4163 of the following conditions are true:
4164 - the insn that sets the giv is always executed on any iteration
4165 on which the giv is used at all
4166 (there are two ways to deduce this:
4167 either the insn is executed on every iteration,
4168 or all uses follow that insn in the same basic block),
4169 - the giv is not used outside the loop
4170 - no assignments to the biv occur during the giv's lifetime. */
4172 if (regno_first_uid
[REGNO (dest_reg
)] == INSN_UID (insn
)
4173 /* Previous line always fails if INSN was moved by loop opt. */
4174 && uid_luid
[regno_last_uid
[REGNO (dest_reg
)]] < INSN_LUID (loop_end
)
4175 && (! not_every_iteration
4176 || last_use_this_basic_block (dest_reg
, insn
)))
4178 /* Now check that there are no assignments to the biv within the
4179 giv's lifetime. This requires two separate checks. */
4181 /* Check each biv update, and fail if any are between the first
4182 and last use of the giv.
4184 If this loop contains an inner loop that was unrolled, then
4185 the insn modifying the biv may have been emitted by the loop
4186 unrolling code, and hence does not have a valid luid. Just
4187 mark the biv as not replaceable in this case. It is not very
4188 useful as a biv, because it is used in two different loops.
4189 It is very unlikely that we would be able to optimize the giv
4190 using this biv anyways. */
4193 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4195 if (INSN_UID (b
->insn
) >= max_uid_for_loop
4196 || ((uid_luid
[INSN_UID (b
->insn
)]
4197 >= uid_luid
[regno_first_uid
[REGNO (dest_reg
)]])
4198 && (uid_luid
[INSN_UID (b
->insn
)]
4199 <= uid_luid
[regno_last_uid
[REGNO (dest_reg
)]])))
4202 v
->not_replaceable
= 1;
4207 /* Check each insn between the first and last use of the giv,
4208 and fail if any of them are branches that jump to a named label
4209 outside this range, but still inside the loop. This catches
4210 cases of spaghetti code where the execution order of insns
4211 is not linear, and hence the above test fails. For example,
4212 in the following code, j is not replaceable:
4213 for (i = 0; i < 100; ) {
4214 L0: j = 4*i; goto L1;
4218 printf ("k = %d\n", k); }
4219 This test is conservative, but this test succeeds rarely enough
4220 that it isn't a problem. See also check_final_value below. */
4224 INSN_UID (p
) >= max_uid_for_loop
4225 || INSN_LUID (p
) < uid_luid
[regno_last_uid
[REGNO (dest_reg
)]];
4228 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
4229 && LABEL_NAME (JUMP_LABEL (p
))
4230 && ((INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop_start
)
4231 && (INSN_LUID (JUMP_LABEL (p
))
4232 < uid_luid
[regno_first_uid
[REGNO (dest_reg
)]]))
4233 || (INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop_end
)
4234 && (INSN_LUID (JUMP_LABEL (p
))
4235 > uid_luid
[regno_last_uid
[REGNO (dest_reg
)]]))))
4238 v
->not_replaceable
= 1;
4240 if (loop_dump_stream
)
4241 fprintf (loop_dump_stream
,
4242 "Found branch outside giv lifetime.\n");
4250 /* May still be replaceable, we don't have enough info here to
4253 v
->not_replaceable
= 0;
4257 if (loop_dump_stream
)
4259 if (type
== DEST_REG
)
4260 fprintf (loop_dump_stream
, "Insn %d: giv reg %d",
4261 INSN_UID (insn
), REGNO (dest_reg
));
4263 fprintf (loop_dump_stream
, "Insn %d: dest address",
4266 fprintf (loop_dump_stream
, " src reg %d benefit %d",
4267 REGNO (src_reg
), v
->benefit
);
4268 fprintf (loop_dump_stream
, " used %d lifetime %d",
4269 v
->times_used
, v
->lifetime
);
4272 fprintf (loop_dump_stream
, " replaceable");
4274 if (GET_CODE (mult_val
) == CONST_INT
)
4275 fprintf (loop_dump_stream
, " mult %d",
4279 fprintf (loop_dump_stream
, " mult ");
4280 print_rtl (loop_dump_stream
, mult_val
);
4283 if (GET_CODE (add_val
) == CONST_INT
)
4284 fprintf (loop_dump_stream
, " add %d",
4288 fprintf (loop_dump_stream
, " add ");
4289 print_rtl (loop_dump_stream
, add_val
);
4293 if (loop_dump_stream
)
4294 fprintf (loop_dump_stream
, "\n");
4299 /* All this does is determine whether a giv can be made replaceable because
4300 its final value can be calculated. This code can not be part of record_giv
4301 above, because final_giv_value requires that the number of loop iterations
4302 be known, and that can not be accurately calculated until after all givs
4303 have been identified. */
4306 check_final_value (v
, loop_start
, loop_end
)
4307 struct induction
*v
;
4308 rtx loop_start
, loop_end
;
4310 struct iv_class
*bl
;
4311 rtx final_value
= 0;
4314 bl
= reg_biv_class
[REGNO (v
->src_reg
)];
4316 /* DEST_ADDR givs will never reach here, because they are always marked
4317 replaceable above in record_giv. */
4319 /* The giv can be replaced outright by the reduced register only if all
4320 of the following conditions are true:
4321 - the insn that sets the giv is always executed on any iteration
4322 on which the giv is used at all
4323 (there are two ways to deduce this:
4324 either the insn is executed on every iteration,
4325 or all uses follow that insn in the same basic block),
4326 - its final value can be calculated (this condition is different
4327 than the one above in record_giv)
4328 - no assignments to the biv occur during the giv's lifetime. */
4331 /* This is only called now when replaceable is known to be false. */
4332 /* Clear replaceable, so that it won't confuse final_giv_value. */
4336 if ((final_value
= final_giv_value (v
, loop_start
, loop_end
))
4337 && (v
->always_computable
|| last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
4339 int biv_increment_seen
= 0;
4345 /* When trying to determine whether or not a biv increment occurs
4346 during the lifetime of the giv, we can ignore uses of the variable
4347 outside the loop because final_value is true. Hence we can not
4348 use regno_last_uid and regno_first_uid as above in record_giv. */
4350 /* Search the loop to determine whether any assignments to the
4351 biv occur during the giv's lifetime. Start with the insn
4352 that sets the giv, and search around the loop until we come
4353 back to that insn again.
4355 Also fail if there is a jump within the giv's lifetime that jumps
4356 to somewhere outside the lifetime but still within the loop. This
4357 catches spaghetti code where the execution order is not linear, and
4358 hence the above test fails. Here we assume that the giv lifetime
4359 does not extend from one iteration of the loop to the next, so as
4360 to make the test easier. Since the lifetime isn't known yet,
4361 this requires two loops. See also record_giv above. */
4363 last_giv_use
= v
->insn
;
4369 p
= NEXT_INSN (loop_start
);
4373 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4374 || GET_CODE (p
) == CALL_INSN
)
4376 if (biv_increment_seen
)
4378 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4381 v
->not_replaceable
= 1;
4385 else if (GET_CODE (PATTERN (p
)) == SET
4386 && SET_DEST (PATTERN (p
)) == v
->src_reg
)
4387 biv_increment_seen
= 1;
4388 else if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4393 /* Now that the lifetime of the giv is known, check for branches
4394 from within the lifetime to outside the lifetime if it is still
4404 p
= NEXT_INSN (loop_start
);
4405 if (p
== last_giv_use
)
4408 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
4409 && LABEL_NAME (JUMP_LABEL (p
))
4410 && ((INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (v
->insn
)
4411 && INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop_start
))
4412 || (INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (last_giv_use
)
4413 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop_end
))))
4416 v
->not_replaceable
= 1;
4418 if (loop_dump_stream
)
4419 fprintf (loop_dump_stream
,
4420 "Found branch outside giv lifetime.\n");
4427 /* If it is replaceable, then save the final value. */
4429 v
->final_value
= final_value
;
4432 if (loop_dump_stream
&& v
->replaceable
)
4433 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
4434 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
4437 /* Update the status of whether a giv can derive other givs.
4439 We need to do something special if there is or may be an update to the biv
4440 between the time the giv is defined and the time it is used to derive
4443 In addition, a giv that is only conditionally set is not allowed to
4444 derive another giv once a label has been passed.
4446 The cases we look at are when a label or an update to a biv is passed. */
4449 update_giv_derive (p
)
4452 struct iv_class
*bl
;
4453 struct induction
*biv
, *giv
;
4457 /* Search all IV classes, then all bivs, and finally all givs.
4459 There are two cases we are concerned with. First we have the situation
4460 of a giv that is only updated conditionally. In that case, it may not
4461 derive any givs after a label is passed.
4463 The second case is when a biv update occurs, or may occur, after the
4464 definition of a giv. For certain biv updates (see below) that are
4465 known to occur between the giv definition and use, we can adjust the
4466 giv definition. For others, or when the biv update is conditional,
4467 we must prevent the giv from deriving any other givs. There are two
4468 sub-cases within this case.
4470 If this is a label, we are concerned with any biv update that is done
4471 conditionally, since it may be done after the giv is defined followed by
4472 a branch here (actually, we need to pass both a jump and a label, but
4473 this extra tracking doesn't seem worth it).
4475 If this is a giv update, we must adjust the giv status to show that a
4476 subsequent biv update was performed. If this adjustment cannot be done,
4477 the giv cannot derive further givs. */
4479 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
4480 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
4481 if (GET_CODE (p
) == CODE_LABEL
|| biv
->insn
== p
)
4483 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
4485 /* If cant_derive is already true, there is no point in
4486 checking all of these conditions again. */
4487 if (giv
->cant_derive
)
4490 /* If this giv is conditionally set and we have passed a label,
4491 it cannot derive anything. */
4492 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
4493 giv
->cant_derive
= 1;
4495 /* Skip givs that have mult_val == 0, since
4496 they are really invariants. Also skip those that are
4497 replaceable, since we know their lifetime doesn't contain
4499 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
4502 /* The only way we can allow this giv to derive another
4503 is if this is a biv increment and we can form the product
4504 of biv->add_val and giv->mult_val. In this case, we will
4505 be able to compute a compensation. */
4506 else if (biv
->insn
== p
)
4508 if (biv
->mult_val
== const1_rtx
4509 && (tem
= simplify_giv_expr (gen_rtx (MULT
, giv
->mode
,
4513 giv
->derive_adjustment
= tem
;
4515 giv
->cant_derive
= 1;
4517 else if (GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
4518 giv
->cant_derive
= 1;
4523 /* Check whether an insn is an increment legitimate for a basic induction var.
4524 X is the source of the insn.
4525 DEST_REG is the putative biv, also the destination of the insn.
4526 We accept patterns of these forms:
4527 REG = REG + INVARIANT
4528 REG = INVARIANT + REG
4529 REG = REG - CONSTANT
4531 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
4532 and store the additive term into *INC_VAL.
4534 If X is an assignment of an invariant into DEST_REG, we set
4535 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
4537 Otherwise we return 0. */
4540 basic_induction_var (x
, dest_reg
, inc_val
, mult_val
)
4546 register enum rtx_code code
;
4549 code
= GET_CODE (x
);
4553 if (XEXP (x
, 0) == dest_reg
)
4555 else if (XEXP (x
, 1) == dest_reg
)
4560 if (invariant_p (arg
) != 1)
4564 *mult_val
= const1_rtx
;
4568 if (XEXP (x
, 0) == dest_reg
4569 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
4570 *inc_val
= gen_rtx (CONST_INT
, VOIDmode
,
4571 - INTVAL (XEXP (x
, 1)));
4575 *mult_val
= const1_rtx
;
4578 /* Can accept constant setting of biv only when inside inner most loop.
4579 Otherwise, a biv of an inner loop may be incorrectly recognized
4580 as a biv of the outer loop,
4581 causing code to be moved INTO the inner loop. */
4584 if (invariant_p (x
) != 1)
4589 if (loops_enclosed
== 1)
4592 *mult_val
= const0_rtx
;
4603 /* A general induction variable (giv) is any quantity that is a linear
4604 function of a basic induction variable,
4605 i.e. giv = biv * mult_val + add_val.
4606 The coefficients can be any loop invariant quantity.
4607 A giv need not be computed directly from the biv;
4608 it can be computed by way of other givs. */
4610 /* Determine whether X computes a giv.
4611 If it does, return a nonzero value
4612 which is the benefit from eliminating the computation of X;
4613 set *SRC_REG to the register of the biv that it is computed from;
4614 set *ADD_VAL and *MULT_VAL to the coefficients,
4615 such that the value of X is biv * mult + add; */
4618 general_induction_var (x
, src_reg
, add_val
, mult_val
)
4628 /* If this is an invariant, forget it, it isn't a giv. */
4629 if (invariant_p (x
) == 1)
4632 /* See if the expression could be a giv and get its form.
4633 Mark our place on the obstack in case we don't find a giv. */
4634 storage
= (char *) oballoc (0);
4635 x
= simplify_giv_expr (x
, &benefit
);
4642 switch (GET_CODE (x
))
4646 /* Since this is now an invariant and wasn't before, it must be a giv
4647 with MULT_VAL == 0. It doesn't matter which BIV we associate this
4649 *src_reg
= loop_iv_list
->biv
->dest_reg
;
4650 *mult_val
= const0_rtx
;
4655 /* This is equivalent to a BIV. */
4657 *mult_val
= const1_rtx
;
4658 *add_val
= const0_rtx
;
4662 /* Either (plus (biv) (invar)) or
4663 (plus (mult (biv) (invar_1)) (invar_2)). */
4664 if (GET_CODE (XEXP (x
, 0)) == MULT
)
4666 *src_reg
= XEXP (XEXP (x
, 0), 0);
4667 *mult_val
= XEXP (XEXP (x
, 0), 1);
4671 *src_reg
= XEXP (x
, 0);
4672 *mult_val
= const1_rtx
;
4674 *add_val
= XEXP (x
, 1);
4678 /* ADD_VAL is zero. */
4679 *src_reg
= XEXP (x
, 0);
4680 *mult_val
= XEXP (x
, 1);
4681 *add_val
= const0_rtx
;
4688 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
4689 unless they are CONST_INT). */
4690 if (GET_CODE (*add_val
) == USE
)
4691 *add_val
= XEXP (*add_val
, 0);
4692 if (GET_CODE (*mult_val
) == USE
)
4693 *mult_val
= XEXP (*mult_val
, 0);
4695 benefit
+= rtx_cost (orig_x
);
4697 /* Always return some benefit if this is a giv so it will be detected
4698 as such. This allows elimination of bivs that might otherwise
4699 not be eliminated. */
4700 return benefit
== 0 ? 1 : benefit
;
4703 /* Given an expression, X, try to form it as a linear function of a biv.
4704 We will canonicalize it to be of the form
4705 (plus (mult (BIV) (invar_1))
4707 with possibile degeneracies.
4709 The invariant expressions must each be of a form that can be used as a
4710 machine operand. We surround then with a USE rtx (a hack, but localized
4711 and certainly unambiguous!) if not a CONST_INT for simplicity in this
4712 routine; it is the caller's responsibility to strip them.
4714 If no such canonicalization is possible (i.e., two biv's are used or an
4715 expression that is neither invariant nor a biv or giv), this routine
4718 For a non-zero return, the result will have a code of CONST_INT, USE,
4719 REG (for a BIV), PLUS, or MULT. No other codes will occur.
4721 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
4724 simplify_giv_expr (x
, benefit
)
4728 enum machine_mode mode
= GET_MODE (x
);
4732 /* If this is not an integer mode, or if we cannot do arithmetic in this
4733 mode, this can't be a giv. */
4734 if (mode
!= VOIDmode
4735 && (GET_MODE_CLASS (mode
) != MODE_INT
4736 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_INT
))
4739 switch (GET_CODE (x
))
4742 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
4743 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
4744 if (arg0
== 0 || arg1
== 0)
4747 /* Put constant last, CONST_INT last if both constant. */
4748 if ((GET_CODE (arg0
) == USE
4749 || GET_CODE (arg0
) == CONST_INT
)
4750 && GET_CODE (arg1
) != CONST_INT
)
4751 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
4753 /* Handle addition of zero, then addition of an invariant. */
4754 if (arg1
== const0_rtx
)
4756 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
4757 switch (GET_CODE (arg0
))
4761 /* Both invariant. Only valid if sum is machine operand.
4762 First strip off possible USE on first operand. */
4763 if (GET_CODE (arg0
) == USE
)
4764 arg0
= XEXP (arg0
, 0);
4767 if (CONSTANT_P (arg0
) && GET_CODE (arg1
) == CONST_INT
)
4769 tem
= plus_constant (arg0
, INTVAL (arg1
));
4770 if (GET_CODE (tem
) != CONST_INT
)
4771 tem
= gen_rtx (USE
, mode
, tem
);
4778 /* biv + invar or mult + invar. Return sum. */
4779 return gen_rtx (PLUS
, mode
, arg0
, arg1
);
4782 /* (a + invar_1) + invar_2. Associate. */
4783 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
4785 gen_rtx (PLUS
, mode
,
4786 XEXP (arg0
, 1), arg1
)),
4793 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
4794 MULT to reduce cases. */
4795 if (GET_CODE (arg0
) == REG
)
4796 arg0
= gen_rtx (MULT
, mode
, arg0
, const1_rtx
);
4797 if (GET_CODE (arg1
) == REG
)
4798 arg1
= gen_rtx (MULT
, mode
, arg1
, const1_rtx
);
4800 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
4801 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
4802 Recurse to associate the second PLUS. */
4803 if (GET_CODE (arg1
) == MULT
)
4804 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
4806 if (GET_CODE (arg1
) == PLUS
)
4807 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
4808 gen_rtx (PLUS
, mode
,
4809 arg0
, XEXP (arg1
, 0)),
4813 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
4814 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
4817 if (XEXP (arg0
, 0) != XEXP (arg1
, 0))
4820 return simplify_giv_expr (gen_rtx (MULT
, mode
,
4822 gen_rtx (PLUS
, mode
,
4828 /* Handle "a - b" as "a + b * (-1)". */
4829 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
4831 gen_rtx (MULT
, mode
,
4838 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
4839 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
4840 if (arg0
== 0 || arg1
== 0)
4843 /* Put constant last, CONST_INT last if both constant. */
4844 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
4845 && GET_CODE (arg1
) != CONST_INT
)
4846 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
4848 /* If second argument is not now constant, not giv. */
4849 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
4852 /* Handle multiply by 0 or 1. */
4853 if (arg1
== const0_rtx
)
4856 else if (arg1
== const1_rtx
)
4859 switch (GET_CODE (arg0
))
4862 /* biv * invar. Done. */
4863 return gen_rtx (MULT
, mode
, arg0
, arg1
);
4866 /* Product of two constants. */
4867 return gen_rtx (CONST_INT
, mode
, INTVAL (arg0
) * INTVAL (arg1
));
4870 /* invar * invar. Not giv. */
4874 /* (a * invar_1) * invar_2. Associate. */
4875 return simplify_giv_expr (gen_rtx (MULT
, mode
,
4877 gen_rtx (MULT
, mode
,
4878 XEXP (arg0
, 1), arg1
)),
4882 /* (a + invar_1) * invar_2. Distribute. */
4883 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
4884 gen_rtx (MULT
, mode
,
4885 XEXP (arg0
, 0), arg1
),
4886 gen_rtx (MULT
, mode
,
4887 XEXP (arg0
, 1), arg1
)),
4896 /* Shift by constant is multiply by power of two. */
4897 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
4900 return simplify_giv_expr (gen_rtx (MULT
, mode
,
4902 gen_rtx (CONST_INT
, VOIDmode
,
4903 1 << INTVAL (XEXP (x
, 1)))),
4907 /* "-a" is "a * (-1)" */
4908 return simplify_giv_expr (gen_rtx (MULT
, mode
,
4910 gen_rtx (CONST_INT
, VOIDmode
, -1)),
4914 /* "~a" is "-a - 1". Silly, but easy. */
4915 return simplify_giv_expr (gen_rtx (MINUS
, mode
,
4916 gen_rtx (NEG
, mode
, XEXP (x
, 0)),
4921 /* Already in proper form for invariant. */
4925 /* If this is a new register, we can't deal with it. */
4926 if (REGNO (x
) >= max_reg_before_loop
)
4929 /* Check for biv or giv. */
4930 switch (reg_iv_type
[REGNO (x
)])
4934 case GENERAL_INDUCT
:
4936 struct induction
*v
= reg_iv_info
[REGNO (x
)];
4938 /* Form expression from giv and add benefit. Ensure this giv
4939 can derive another and subtract any needed adjustment if so. */
4940 *benefit
+= v
->benefit
;
4944 tem
= gen_rtx (PLUS
, mode
, gen_rtx (MULT
, mode
,
4945 v
->src_reg
, v
->mult_val
),
4947 if (v
->derive_adjustment
)
4948 tem
= gen_rtx (MINUS
, mode
, tem
, v
->derive_adjustment
);
4949 return simplify_giv_expr (tem
, benefit
);
4953 /* Fall through to general case. */
4955 /* If invariant, return as USE (unless CONST_INT).
4956 Otherwise, not giv. */
4957 if (GET_CODE (x
) == USE
)
4960 if (invariant_p (x
) == 1)
4962 if (GET_CODE (x
) == CONST_INT
)
4965 return gen_rtx (USE
, mode
, x
);
4972 /* Help detect a giv that is calculated by several consecutive insns;
4976 The caller has already identified the first insn P as having a giv as dest;
4977 we check that all other insns that set the same register follow
4978 immediately after P, that they alter nothing else,
4979 and that the result of the last is still a giv.
4981 The value is 0 if the reg set in P is not really a giv.
4982 Otherwise, the value is the amount gained by eliminating
4983 all the consecutive insns that compute the value.
4985 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
4986 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
4988 The coefficients of the ultimate giv value are stored in
4989 *MULT_VAL and *ADD_VAL. */
4992 consec_sets_giv (first_benefit
, p
, src_reg
, dest_reg
,
5007 /* Indicate that this is a giv so that we can update the value produced in
5008 each insn of the multi-insn sequence.
5010 This induction structure will be used only by the call to
5011 general_induction_var below, so we can allocate it on our stack.
5012 If this is a giv, our caller will replace the induct var entry with
5013 a new induction structure. */
5015 = (struct induction
*) alloca (sizeof (struct induction
));
5016 v
->src_reg
= src_reg
;
5017 v
->mult_val
= *mult_val
;
5018 v
->add_val
= *add_val
;
5019 v
->benefit
= first_benefit
;
5021 v
->derive_adjustment
= 0;
5023 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
5024 reg_iv_info
[REGNO (dest_reg
)] = v
;
5026 count
= n_times_set
[REGNO (dest_reg
)] - 1;
5031 code
= GET_CODE (p
);
5033 /* If libcall, skip to end of call sequence. */
5034 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, 0)))
5038 && (set
= single_set (p
))
5039 && GET_CODE (SET_DEST (set
)) == REG
5040 && SET_DEST (set
) == dest_reg
5041 && ((benefit
= general_induction_var (SET_SRC (set
), &src_reg
,
5043 /* Giv created by equivalent expression. */
5044 || ((temp
= find_reg_note (p
, REG_EQUAL
, 0))
5045 && (benefit
= general_induction_var (XEXP (temp
, 0), &src_reg
,
5046 add_val
, mult_val
))))
5047 && src_reg
== v
->src_reg
)
5049 if (find_reg_note (p
, REG_RETVAL
, 0))
5050 benefit
+= libcall_benefit (p
);
5053 v
->mult_val
= *mult_val
;
5054 v
->add_val
= *add_val
;
5055 v
->benefit
= benefit
;
5057 else if (code
!= NOTE
)
5059 /* Allow insns that set something other than this giv to a
5060 constant. Such insns are needed on machines which cannot
5061 include long constants and should not disqualify a giv. */
5063 && (set
= single_set (p
))
5064 && SET_DEST (set
) != dest_reg
5065 && CONSTANT_P (SET_SRC (set
)))
5068 reg_iv_type
[REGNO (dest_reg
)] = UNKNOWN_INDUCT
;
5076 /* Return an rtx, if any, that expresses giv G2 as a function of the register
5077 represented by G1. If no such expression can be found, or it is clear that
5078 it cannot possibly be a valid address, 0 is returned.
5080 To perform the computation, we note that
5083 where `v' is the biv.
5085 So G2 = (c/a) * G1 + (d - b*c/a) */
5089 express_from (g1
, g2
)
5090 struct induction
*g1
, *g2
;
5094 /* The value that G1 will be multiplied by must be a constant integer. Also,
5095 the only chance we have of getting a valid address is if b*c/a (see above
5096 for notation) is also an integer. */
5097 if (GET_CODE (g1
->mult_val
) != CONST_INT
5098 || GET_CODE (g2
->mult_val
) != CONST_INT
5099 || GET_CODE (g1
->add_val
) != CONST_INT
5100 || g1
->mult_val
== const0_rtx
5101 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
5104 mult
= gen_rtx (CONST_INT
, VOIDmode
,
5105 INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
5106 add
= plus_constant (g2
->add_val
, - INTVAL (g1
->add_val
) * INTVAL (mult
));
5108 /* Form simplified final result. */
5109 if (mult
== const0_rtx
)
5111 else if (mult
== const1_rtx
)
5112 mult
= g1
->dest_reg
;
5114 mult
= gen_rtx (MULT
, g2
->mode
, g1
->dest_reg
, mult
);
5116 if (add
== const0_rtx
)
5119 return gen_rtx (PLUS
, g2
->mode
, mult
, add
);
5123 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
5124 (either directly or via an address expression) a register used to represent
5125 G1. Set g2->new_reg to a represtation of G1 (normally just
5129 combine_givs_p (g1
, g2
)
5130 struct induction
*g1
, *g2
;
5134 /* If these givs are identical, they can be combined. */
5135 if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
)
5136 && rtx_equal_p (g1
->add_val
, g2
->add_val
))
5138 g2
->new_reg
= g1
->dest_reg
;
5143 /* If G2 can be expressed as a function of G1 and that function is valid
5144 as an address and no more expensive than using a register for G2,
5145 the expression of G2 in terms of G1 can be used. */
5146 if (g2
->giv_type
== DEST_ADDR
5147 && (tem
= express_from (g1
, g2
)) != 0
5148 && memory_address_p (g2
->mem_mode
, tem
)
5149 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
))
5159 /* Check all pairs of givs for iv_class BL and see if any can be combined with
5160 any other. If so, point SAME to the giv combined with and set NEW_REG to
5161 be an expression (in terms of the other giv's DEST_REG) equivalent to the
5162 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
5166 struct iv_class
*bl
;
5168 struct induction
*g1
, *g2
;
5171 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5172 for (pass
= 0; pass
<= 1; pass
++)
5173 for (g2
= bl
->giv
; g2
; g2
= g2
->next_iv
)
5175 /* First try to combine with replaceable givs, then all givs. */
5176 && (g1
->replaceable
|| pass
== 1)
5177 /* If either has already been combined or is to be ignored, can't
5179 && ! g1
->ignore
&& ! g2
->ignore
&& ! g1
->same
&& ! g2
->same
5180 /* If something has been based on G2, G2 cannot itself be based
5181 on something else. */
5182 && ! g2
->combined_with
5183 && combine_givs_p (g1
, g2
))
5185 /* g2->new_reg set by `combine_givs_p' */
5187 g1
->combined_with
= 1;
5188 g1
->benefit
+= g2
->benefit
;
5189 /* ??? The new final_[bg]iv_value code does a much better job
5190 of finding replaceable giv's, and hence this code may no
5191 longer be necessary. */
5192 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
5193 g1
->benefit
-= copy_cost
;
5194 g1
->lifetime
+= g2
->lifetime
;
5195 g1
->times_used
+= g2
->times_used
;
5197 if (loop_dump_stream
)
5198 fprintf (loop_dump_stream
, "giv at %d combined with giv at %d\n",
5199 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
));
5203 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
5206 emit_iv_add_mult (b
, m
, a
, reg
, insert_before
)
5207 rtx b
; /* initial value of basic induction variable */
5208 rtx m
; /* multiplicative constant */
5209 rtx a
; /* additive constant */
5210 rtx reg
; /* destination register */
5216 /* Prevent unexpected sharing of these rtx. */
5220 /* Increase the lifetime of any invariants moved further in code. */
5221 update_reg_last_use (a
, insert_before
);
5222 update_reg_last_use (b
, insert_before
);
5223 update_reg_last_use (m
, insert_before
);
5226 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 0);
5228 emit_move_insn (reg
, result
);
5229 seq
= gen_sequence ();
5232 emit_insn_before (seq
, insert_before
);
5235 /* Test whether A * B can be computed without
5236 an actual multiply insn. Value is 1 if so. */
5239 product_cheap_p (a
, b
)
5245 struct obstack
*old_rtl_obstack
= rtl_obstack
;
5246 char *storage
= (char *) obstack_alloc (&temp_obstack
, 0);
5249 /* If only one is constant, make it B. */
5250 if (GET_CODE (a
) == CONST_INT
)
5251 tmp
= a
, a
= b
, b
= tmp
;
5253 /* If first constant, both constant, so don't need multiply. */
5254 if (GET_CODE (a
) == CONST_INT
)
5257 /* If second not constant, neither is constant, so would need multiply. */
5258 if (GET_CODE (b
) != CONST_INT
)
5261 /* One operand is constant, so might not need multiply insn. Generate the
5262 code for the multiply and see if a call or multiply, or long sequence
5263 of insns is generated. */
5265 rtl_obstack
= &temp_obstack
;
5267 expand_mult (GET_MODE (a
), a
, b
, 0, 0);
5268 tmp
= gen_sequence ();
5271 if (GET_CODE (tmp
) == SEQUENCE
)
5273 if (XVEC (tmp
, 0) == 0)
5275 else if (XVECLEN (tmp
, 0) > 3)
5278 for (i
= 0; i
< XVECLEN (tmp
, 0); i
++)
5280 rtx insn
= XVECEXP (tmp
, 0, i
);
5282 if (GET_CODE (insn
) != INSN
5283 || (GET_CODE (PATTERN (insn
)) == SET
5284 && GET_CODE (SET_SRC (PATTERN (insn
))) == MULT
)
5285 || (GET_CODE (PATTERN (insn
)) == PARALLEL
5286 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == SET
5287 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn
), 0, 0))) == MULT
))
5294 else if (GET_CODE (tmp
) == SET
5295 && GET_CODE (SET_SRC (tmp
)) == MULT
)
5297 else if (GET_CODE (tmp
) == PARALLEL
5298 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
5299 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
5302 /* Free any storage we obtained in generating this multiply and restore rtl
5303 allocation to its normal obstack. */
5304 obstack_free (&temp_obstack
, storage
);
5305 rtl_obstack
= old_rtl_obstack
;
5310 /* Check to see if loop can be terminated by a "decrement and branch until
5311 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
5312 Also try reversing an increment loop to a decrement loop
5313 to see if the optimization can be performed.
5314 Value is nonzero if optimization was performed. */
5316 /* This is useful even if the architecture doesn't have such an insn,
5317 because it might change a loops which increments from 0 to n to a loop
5318 which decrements from n to 0. A loop that decrements to zero is usually
5319 faster than one that increments from zero. */
5321 /* ??? This could be rewritten to use some of the loop unrolling procedures,
5322 such as approx_final_value, biv_total_increment, loop_iterations, and
5323 final_[bg]iv_value. */
5326 check_dbra_loop (loop_end
, insn_count
, loop_start
)
5331 struct iv_class
*bl
;
5336 enum rtx_code branch_code
;
5339 rtx before_comparison
;
5342 /* If last insn is a conditional branch, and the insn before tests a
5343 register value, try to optimize it. Otherwise, we can't do anything. */
5345 comparison
= get_condition_for_loop (PREV_INSN (loop_end
));
5346 if (comparison
== 0)
5349 /* Check all of the bivs to see if the compare uses one of them.
5350 Skip biv's set more than once because we can't guarantee that
5351 it will be zero on the last iteration. Also skip if the biv is
5352 used between its update and the test insn. */
5354 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
5356 if (bl
->biv_count
== 1
5357 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
5358 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
5359 PREV_INSN (PREV_INSN (loop_end
))))
5366 /* Look for the case where the basic induction variable is always
5367 nonnegative, and equals zero on the last iteration.
5368 In this case, add a reg_note REG_NONNEG, which allows the
5369 m68k DBRA instruction to be used. */
5371 if (((GET_CODE (comparison
) == GT
5372 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
5373 && INTVAL (XEXP (comparison
, 1)) == -1)
5374 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
5375 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
5376 && INTVAL (bl
->biv
->add_val
) < 0)
5378 /* Initial value must be greater than 0,
5379 init_val % -dec_value == 0 to ensure that it equals zero on
5380 the last iteration */
5382 if (GET_CODE (bl
->initial_value
) == CONST_INT
5383 && INTVAL (bl
->initial_value
) > 0
5384 && (INTVAL (bl
->initial_value
) %
5385 (-INTVAL (bl
->biv
->add_val
))) == 0)
5387 /* register always nonnegative, add REG_NOTE to branch */
5388 REG_NOTES (PREV_INSN (loop_end
))
5389 = gen_rtx (EXPR_LIST
, REG_NONNEG
, 0,
5390 REG_NOTES (PREV_INSN (loop_end
)));
5396 /* If the decrement is 1 and the value was tested as >= 0 before
5397 the loop, then we can safely optimize. */
5398 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
5400 if (GET_CODE (p
) == CODE_LABEL
)
5402 if (GET_CODE (p
) != JUMP_INSN
)
5405 before_comparison
= get_condition_for_loop (p
);
5406 if (before_comparison
5407 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
5408 && GET_CODE (before_comparison
) == LT
5409 && XEXP (before_comparison
, 1) == const0_rtx
5410 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
5411 && INTVAL (bl
->biv
->add_val
) == -1)
5413 REG_NOTES (PREV_INSN (loop_end
))
5414 = gen_rtx (EXPR_LIST
, REG_NONNEG
, 0,
5415 REG_NOTES (PREV_INSN (loop_end
)));
5422 else if (num_mem_sets
<= 1)
5424 /* Try to change inc to dec, so can apply above optimization. */
5426 all registers modified are induction variables or invariant,
5427 all memory references have non-overlapping addresses
5428 (obviously true if only one write)
5429 allow 2 insns for the compare/jump at the end of the loop. */
5430 int num_nonfixed_reads
= 0;
5431 /* 1 if the iteration var is used only to count iterations. */
5432 int no_use_except_counting
= 0;
5434 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
5435 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
5436 num_nonfixed_reads
+= count_nonfixed_reads (PATTERN (p
));
5438 if (bl
->giv_count
== 0
5439 && ! loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]])
5441 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
5443 /* If there are no givs for this biv, and the only exit is the
5444 fall through at the end of the the loop, then
5445 see if perhaps there are no uses except to count. */
5446 no_use_except_counting
= 1;
5447 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
5448 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
5450 rtx set
= single_set (p
);
5452 if (set
&& GET_CODE (SET_DEST (set
)) == REG
5453 && REGNO (SET_DEST (set
)) == bl
->regno
)
5454 /* An insn that sets the biv is okay. */
5456 else if (p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
5457 || p
== prev_nonnote_insn (loop_end
))
5458 /* Don't bother about the end test. */
5460 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
5461 /* Any other use of the biv is no good. */
5463 no_use_except_counting
= 0;
5469 /* This code only acts for innermost loops. Also it simplifies
5470 the memory address check by only reversing loops with
5471 zero or one memory access.
5472 Two memory accesses could involve parts of the same array,
5473 and that can't be reversed. */
5475 if (num_nonfixed_reads
<= 1
5477 && (no_use_except_counting
5478 || (bl
->giv_count
+ bl
->biv_count
+ num_mem_sets
5479 + num_movables
+ 2 == insn_count
)))
5481 rtx condition
= get_condition_for_loop (PREV_INSN (loop_end
));
5485 /* Loop can be reversed. */
5486 if (loop_dump_stream
)
5487 fprintf (loop_dump_stream
, "Can reverse loop\n");
5489 /* Now check other conditions:
5490 initial_value must be zero,
5491 final_value % add_val == 0, so that when reversed, the
5492 biv will be zero on the last iteration.
5494 This test can probably be improved since +/- 1 in the constant
5495 can be obtained by changing LT to LE and vice versa; this is
5498 if (comparison
&& bl
->initial_value
== const0_rtx
5499 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
5500 /* LE gets turned into LT */
5501 && GET_CODE (comparison
) == LT
5502 && (INTVAL (XEXP (comparison
, 1))
5503 % INTVAL (bl
->biv
->add_val
)) == 0)
5505 /* Register will always be nonnegative, with value
5506 0 on last iteration if loop reversed */
5508 /* Save some info needed to produce the new insns. */
5509 reg
= bl
->biv
->dest_reg
;
5510 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 1);
5511 new_add_val
= gen_rtx (CONST_INT
, VOIDmode
,
5512 - INTVAL (bl
->biv
->add_val
));
5514 final_value
= XEXP (comparison
, 1);
5515 start_value
= gen_rtx (CONST_INT
, VOIDmode
,
5516 (INTVAL (XEXP (comparison
, 1))
5517 - INTVAL (bl
->biv
->add_val
)));
5519 /* Initialize biv to start_value before loop start.
5520 The old initializing insn will be deleted as a
5521 dead store by flow.c. */
5522 emit_insn_before (gen_move_insn (reg
, start_value
), loop_start
);
5524 /* Add insn to decrement register, and delete insn
5525 that incremented the register. */
5526 p
= emit_insn_before (gen_add2_insn (reg
, new_add_val
),
5528 delete_insn (bl
->biv
->insn
);
5530 /* Update biv info to reflect its new status. */
5532 bl
->initial_value
= start_value
;
5533 bl
->biv
->add_val
= new_add_val
;
5535 /* Inc LABEL_NUSES so that delete_insn will
5536 not delete the label. */
5537 LABEL_NUSES (XEXP (jump_label
, 0)) ++;
5539 /* Emit an insn after the end of the loop to set the biv's
5540 proper exit value if it is used anywhere outside the loop. */
5541 if ((regno_last_uid
[bl
->regno
]
5542 != INSN_UID (PREV_INSN (PREV_INSN (loop_end
))))
5544 || regno_first_uid
[bl
->regno
] != INSN_UID (bl
->init_insn
))
5545 emit_insn_after (gen_move_insn (reg
, final_value
),
5548 /* Delete compare/branch at end of loop. */
5549 delete_insn (PREV_INSN (loop_end
));
5550 delete_insn (PREV_INSN (loop_end
));
5552 /* Add new compare/branch insn at end of loop. */
5554 emit_cmp_insn (reg
, const0_rtx
, GE
, 0, GET_MODE (reg
), 0, 0);
5555 emit_jump_insn (gen_bge (XEXP (jump_label
, 0)));
5556 tem
= gen_sequence ();
5558 emit_jump_insn_before (tem
, loop_end
);
5560 for (tem
= PREV_INSN (loop_end
);
5561 tem
&& GET_CODE (tem
) != JUMP_INSN
; tem
= PREV_INSN (tem
))
5565 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
5567 /* Increment of LABEL_NUSES done above. */
5568 /* Register is now always nonnegative,
5569 so add REG_NONNEG note to the branch. */
5570 REG_NOTES (tem
) = gen_rtx (EXPR_LIST
, REG_NONNEG
, 0,
5576 /* Mark that this biv has been reversed. Each giv which depends
5577 on this biv, and which is also live past the end of the loop
5578 will have to be fixed up. */
5582 if (loop_dump_stream
)
5583 fprintf (loop_dump_stream
,
5584 "Reversed loop and added reg_nonneg\n");
5594 /* Verify whether the biv BL appears to be eliminable,
5595 based on the insns in the loop that refer to it.
5596 LOOP_START is the first insn of the loop, and END is the end insn.
5598 If ELIMINATE_P is non-zero, actually do the elimination.
5600 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
5601 determine whether invariant insns should be placed inside or at the
5602 start of the loop. */
5605 maybe_eliminate_biv (bl
, loop_start
, end
, eliminate_p
, threshold
, insn_count
)
5606 struct iv_class
*bl
;
5610 int threshold
, insn_count
;
5612 rtx reg
= bl
->biv
->dest_reg
;
5614 struct induction
*v
;
5616 /* Scan all insns in the loop, stopping if we find one that uses the
5617 biv in a way that we cannot eliminate. */
5619 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
5621 enum rtx_code code
= GET_CODE (p
);
5622 rtx where
= threshold
>= insn_count
? loop_start
: p
;
5624 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
5625 && reg_mentioned_p (reg
, PATTERN (p
))
5626 && ! maybe_eliminate_biv_1 (PATTERN (p
), p
, bl
, eliminate_p
, where
))
5628 if (loop_dump_stream
)
5629 fprintf (loop_dump_stream
,
5630 "Cannot eliminate biv %d: biv used in insn %d.\n",
5631 bl
->regno
, INSN_UID (p
));
5638 if (loop_dump_stream
)
5639 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
5640 bl
->regno
, eliminate_p
? "was" : "can be");
5647 /* If BL appears in X (part of the pattern of INSN), see if we can
5648 eliminate its use. If so, return 1. If not, return 0.
5650 If BIV does not appear in X, return 1.
5652 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
5653 where extra insns should be added. Depending on how many items have been
5654 moved out of the loop, it will either be before INSN or at the start of
5658 maybe_eliminate_biv_1 (x
, insn
, bl
, eliminate_p
, where
)
5660 struct iv_class
*bl
;
5664 enum rtx_code code
= GET_CODE (x
);
5665 rtx reg
= bl
->biv
->dest_reg
;
5666 enum machine_mode mode
= GET_MODE (reg
);
5667 struct induction
*v
;
5676 /* If we haven't already been able to do something with this BIV,
5677 we can't eliminate it. */
5683 /* If this sets the BIV, it is not a problem. */
5684 if (SET_DEST (x
) == reg
)
5687 /* If this is an insn that defines a giv, it is also ok because
5688 it will go away when the giv is reduced. */
5689 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5690 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
5694 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
5696 /* Can replace with any giv that was reduced and
5697 that has (MULT_VAL != 0) and (ADD_VAL == 0).
5698 Require a constant for MULT_VAL, so we know it's nonzero. */
5700 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5701 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
5702 && v
->add_val
== const0_rtx
5703 && ! v
->ignore
&& ! v
->maybe_dead
5709 /* If the giv has the opposite direction of change,
5710 then reverse the comparison. */
5711 if (INTVAL (v
->mult_val
) < 0)
5712 new = gen_rtx (COMPARE
, GET_MODE (v
->new_reg
),
5713 const0_rtx
, v
->new_reg
);
5717 /* We can probably test that giv's reduced reg. */
5718 if (validate_change (insn
, &SET_SRC (x
), new, 0))
5722 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
5723 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
5724 Require a constant for MULT_VAL, so we know it's nonzero. */
5726 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5727 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
5728 && ! v
->ignore
&& ! v
->maybe_dead
5734 /* If the giv has the opposite direction of change,
5735 then reverse the comparison. */
5736 if (INTVAL (v
->mult_val
) < 0)
5737 new = gen_rtx (COMPARE
, VOIDmode
, copy_rtx (v
->add_val
),
5740 new = gen_rtx (COMPARE
, VOIDmode
, v
->new_reg
,
5741 copy_rtx (v
->add_val
));
5743 /* Replace biv with the giv's reduced register. */
5744 update_reg_last_use (v
->add_val
, insn
);
5745 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
5748 /* Insn doesn't support that constant or invariant. Copy it
5749 into a register (it will be a loop invariant.) */
5750 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
5752 emit_insn_before (gen_move_insn (tem
, copy_rtx (v
->add_val
)),
5755 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)),
5756 gen_rtx (COMPARE
, VOIDmode
,
5757 v
->new_reg
, tem
), 0))
5766 case GT
: case GE
: case GTU
: case GEU
:
5767 case LT
: case LE
: case LTU
: case LEU
:
5768 /* See if either argument is the biv. */
5769 if (XEXP (x
, 0) == reg
)
5770 arg
= XEXP (x
, 1), arg_operand
= 1;
5771 else if (XEXP (x
, 1) == reg
)
5772 arg
= XEXP (x
, 0), arg_operand
= 0;
5776 if (CONSTANT_P (arg
))
5778 /* First try to replace with any giv that has constant positive
5779 mult_val and constant add_val. We might be able to support
5780 negative mult_val, but it seems complex to do it in general. */
5782 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5783 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
5784 && CONSTANT_P (v
->add_val
)
5785 && ! v
->ignore
&& ! v
->maybe_dead
5791 /* Replace biv with the giv's reduced reg. */
5792 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
5794 /* If all constants are actually constant integers and
5795 the derived constant can be directly placed in the COMPARE,
5797 if (GET_CODE (arg
) == CONST_INT
5798 && GET_CODE (v
->mult_val
) == CONST_INT
5799 && GET_CODE (v
->add_val
) == CONST_INT
5800 && validate_change (insn
, &XEXP (x
, arg_operand
),
5801 gen_rtx (CONST_INT
, VOIDmode
,
5803 * INTVAL (v
->mult_val
)
5804 + INTVAL (v
->add_val
))), 0))
5807 /* Otherwise, load it into a register. */
5808 tem
= gen_reg_rtx (mode
);
5809 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
5810 if (validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 0))
5813 /* If that failed, put back the change we made above. */
5814 XEXP (x
, 1-arg_operand
) = reg
;
5817 /* Look for giv with positive constant mult_val and nonconst add_val.
5818 Insert insns to calculate new compare value. */
5820 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5821 if (CONSTANT_P (v
->mult_val
)
5822 && ! v
->ignore
&& ! v
->maybe_dead
5830 tem
= gen_reg_rtx (mode
);
5832 /* Replace biv with giv's reduced register. */
5833 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
5836 /* Compute value to compare against. */
5837 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
5838 /* Use it in this insn. */
5839 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
5840 if (apply_change_group ())
5844 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
5846 if (invariant_p (arg
) == 1)
5848 /* Look for giv with constant positive mult_val and nonconst
5849 add_val. Insert insns to compute new compare value. */
5851 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5852 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
5853 && ! v
->ignore
&& ! v
->maybe_dead
5861 tem
= gen_reg_rtx (mode
);
5863 /* Replace biv with giv's reduced register. */
5864 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
5867 /* Compute value to compare against. */
5868 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
,
5870 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
5871 if (apply_change_group ())
5876 /* This code has problems. Basically, you can't know when
5877 seeing if we will eliminate BL, whether a particular giv
5878 of ARG will be reduced. If it isn't going to be reduced,
5879 we can't eliminate BL. We can try forcing it to be reduced,
5880 but that can generate poor code.
5882 The problem is that the benefit of reducing TV, below should
5883 be increased if BL can actually be eliminated, but this means
5884 we might have to do a topological sort of the order in which
5885 we try to process biv. It doesn't seem worthwhile to do
5886 this sort of thing now. */
5889 /* Otherwise the reg compared with had better be a biv. */
5890 if (GET_CODE (arg
) != REG
5891 || reg_iv_type
[REGNO (arg
)] != BASIC_INDUCT
)
5894 /* Look for a pair of givs, one for each biv,
5895 with identical coefficients. */
5896 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5898 struct induction
*tv
;
5900 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
5903 for (tv
= reg_biv_class
[REGNO (arg
)]->giv
; tv
; tv
= tv
->next_iv
)
5904 if (! tv
->ignore
&& ! tv
->maybe_dead
5905 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
5906 && rtx_equal_p (tv
->add_val
, v
->add_val
)
5907 && tv
->mode
== mode
)
5912 /* Replace biv with its giv's reduced reg. */
5913 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
5914 /* Replace other operand with the other giv's
5916 XEXP (x
, arg_operand
) = tv
->new_reg
;
5923 /* If we get here, the biv can't be eliminated. */
5927 /* If this address is a DEST_ADDR giv, it doesn't matter if the
5928 biv is used in it, since it will be replaced. */
5929 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5930 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
5935 /* See if any subexpression fails elimination. */
5936 fmt
= GET_RTX_FORMAT (code
);
5937 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5942 if (! maybe_eliminate_biv_1 (XEXP (x
, i
), insn
, bl
,
5943 eliminate_p
, where
))
5948 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
5949 if (! maybe_eliminate_biv_1 (XVECEXP (x
, i
, j
), insn
, bl
,
5950 eliminate_p
, where
))
5959 /* Return nonzero if the last use of REG
5960 is in an insn following INSN in the same basic block. */
5963 last_use_this_basic_block (reg
, insn
)
5969 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
5972 if (regno_last_uid
[REGNO (reg
)] == INSN_UID (n
))
5978 /* Called via `note_stores' to record the initial value of a biv. Here we
5979 just record the location of the set and process it later. */
5982 record_initial (dest
, set
)
5986 struct iv_class
*bl
;
5988 if (GET_CODE (dest
) != REG
5989 || REGNO (dest
) >= max_reg_before_loop
5990 || reg_iv_type
[REGNO (dest
)] != BASIC_INDUCT
)
5993 bl
= reg_biv_class
[REGNO (dest
)];
5995 /* If this is the first set found, record it. */
5996 if (bl
->init_insn
== 0)
5998 bl
->init_insn
= note_insn
;
6003 /* If any of the registers in X are "old" and currently have a last use earlier
6004 than INSN, update them to have a last use of INSN. Their actual last use
6005 will be the previous insn but it will not have a valid uid_luid so we can't
6009 update_reg_last_use (x
, insn
)
6013 /* Check for the case where INSN does not have a valid luid. In this case,
6014 there is no need to modify the regno_last_uid, as this can only happen
6015 when code is inserted after the loop_end to set a pseudo's final value,
6016 and hence this insn will never be the last use of x. */
6017 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
6018 && INSN_UID (insn
) < max_uid_for_loop
6019 && uid_luid
[regno_last_uid
[REGNO (x
)]] < uid_luid
[INSN_UID (insn
)])
6020 regno_last_uid
[REGNO (x
)] = INSN_UID (insn
);
6024 register char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6025 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6028 update_reg_last_use (XEXP (x
, i
), insn
);
6029 else if (fmt
[i
] == 'E')
6030 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6031 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
6036 /* Given a jump insn JUMP, return the condition that will cause it to branch
6037 to its JUMP_LABEL. If the condition cannot be understood, or is an
6038 inequality floating-point comparison which needs to be reversed, 0 will
6041 If EARLIEST is non-zero, it is a pointer to a place where the earliest
6042 insn used in locating the condition was found. If a replacement test
6043 of the condition is desired, it should be placed in front of that
6044 insn and we will be sure that the inputs are still valid.
6046 The condition will be returned in a canonical form to simplify testing by
6047 callers. Specifically:
6049 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
6050 (2) Both operands will be machine operands; (cc0) will have been replaced.
6051 (3) If an operand is a constant, it will be the second operand.
6052 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
6053 for GE, GEU, and LEU. */
6056 get_condition (jump
, earliest
)
6065 int reverse_code
= 0;
6066 int did_reverse_condition
= 0;
6068 /* If this is not a standard conditional jump, we can't parse it. */
6069 if (GET_CODE (jump
) != JUMP_INSN
6070 || ! condjump_p (jump
) || simplejump_p (jump
))
6073 code
= GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
6074 op0
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 0);
6075 op1
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 1);
6080 /* If this branches to JUMP_LABEL when the condition is false, reverse
6082 if (XEXP (XEXP (SET_SRC (PATTERN (jump
)), 2), 0) == JUMP_LABEL (jump
))
6083 code
= reverse_condition (code
), did_reverse_condition
^= 1;
6085 /* If we are comparing a register with zero, see if the register is set
6086 in the previous insn to a COMPARE or a comparison operation. Perform
6087 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
6090 while (GET_RTX_CLASS (code
) == '<' && op1
== const0_rtx
)
6092 /* Set non-zero when we find something of interest. */
6096 /* If comparison with cc0, import actual comparison from compare
6100 if ((prev
= prev_nonnote_insn (prev
)) == 0
6101 || GET_CODE (prev
) != INSN
6102 || (set
= single_set (prev
)) == 0
6103 || SET_DEST (set
) != cc0_rtx
)
6106 op0
= SET_SRC (set
);
6107 op1
= CONST0_RTX (GET_MODE (op0
));
6113 /* If this is a COMPARE, pick up the two things being compared. */
6114 if (GET_CODE (op0
) == COMPARE
)
6116 op1
= XEXP (op0
, 1);
6117 op0
= XEXP (op0
, 0);
6120 else if (GET_CODE (op0
) != REG
)
6123 /* Go back to the previous insn. Stop if it is not an INSN. We also
6124 stop if it isn't a single set or if it has a REG_INC note because
6125 we don't want to bother dealing with it. */
6127 if ((prev
= prev_nonnote_insn (prev
)) == 0
6128 || GET_CODE (prev
) != INSN
6129 || FIND_REG_INC_NOTE (prev
, 0)
6130 || (set
= single_set (prev
)) == 0)
6133 /* If this is setting OP0, get what it sets it to if it looks
6135 if (SET_DEST (set
) == op0
)
6137 enum machine_mode inner_mode
= GET_MODE (SET_SRC (set
));
6139 if ((GET_CODE (SET_SRC (set
)) == COMPARE
6142 && GET_MODE_BITSIZE (inner_mode
) <= HOST_BITS_PER_INT
6143 && (STORE_FLAG_VALUE
6144 & (1 << (GET_MODE_BITSIZE (inner_mode
) - 1)))))
6145 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')))
6147 else if ((code
== EQ
6149 && GET_MODE_BITSIZE (inner_mode
) <= HOST_BITS_PER_INT
6150 && (STORE_FLAG_VALUE
6151 & (1 << (GET_MODE_BITSIZE (inner_mode
) - 1)))))
6152 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')
6154 /* We might have reversed a LT to get a GE here. But this wasn't
6155 actually the comparison of data, so we don't flag that we
6156 have had to reverse the condition. */
6157 did_reverse_condition
^= 1;
6163 else if (reg_set_p (op0
, prev
))
6164 /* If this sets OP0, but not directly, we have to give up. */
6169 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
6170 code
= GET_CODE (x
);
6173 code
= reverse_condition (code
);
6174 did_reverse_condition
^= 1;
6178 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
6184 /* If constant is first, put it last. */
6185 if (CONSTANT_P (op0
))
6186 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
6188 /* If OP0 is the result of a comparison, we weren't able to find what
6189 was really being compared, so fail. */
6190 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
6193 /* Canonicalize any ordered comparison with integers involving equality. */
6194 if (GET_CODE (op1
) == CONST_INT
)
6196 int const_val
= INTVAL (op1
);
6197 unsigned uconst_val
= (unsigned) const_val
;
6203 op1
= gen_rtx (CONST_INT
, VOIDmode
, const_val
+ 1);
6208 op1
= gen_rtx (CONST_INT
, VOIDmode
, const_val
- 1);
6213 op1
= gen_rtx (CONST_INT
, VOIDmode
, uconst_val
+ 1);
6218 op1
= gen_rtx (CONST_INT
, VOIDmode
, uconst_val
- 1);
6223 /* If this was floating-point and we reversed anything other than an
6224 EQ or NE, return zero. */
6225 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
6226 && did_reverse_condition
&& code
!= NE
&& code
!= EQ
6227 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
6231 /* Never return CC0; return zero instead. */
6236 return gen_rtx (code
, VOIDmode
, op0
, op1
);
6239 /* Similar to above routine, except that we also put an invariant last
6240 unless both operands are invariants. */
6243 get_condition_for_loop (x
)
6246 rtx comparison
= get_condition (x
, 0);
6249 || ! invariant_p (XEXP (comparison
, 0))
6250 || invariant_p (XEXP (comparison
, 1)))
6253 return gen_rtx (swap_condition (GET_CODE (comparison
)), VOIDmode
,
6254 XEXP (comparison
, 1), XEXP (comparison
, 0));
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