]>
gcc.gnu.org Git - gcc.git/blob - gcc/loop.c
1 /* Move constant computations out of loops.
2 Copyright (C) 1987, 1988, 1989, 1991 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This is the loop optimization pass of the compiler.
22 It finds invariant computations within loops and moves them
23 to the beginning of the loop. Then it identifies basic and
24 general induction variables. Strength reduction is applied to the general
25 induction variables, and induction variable elimination is applied to
26 the basic induction variables.
28 It also finds cases where
29 a register is set within the loop by zero-extending a narrower value
30 and changes these to zero the entire register once before the loop
31 and merely copy the low part within the loop.
33 Most of the complexity is in heuristics to decide when it is worth
34 while to do these things. */
40 #include "insn-config.h"
41 #include "insn-flags.h"
43 #include "hard-reg-set.h"
50 /* Vector mapping INSN_UIDs to luids.
51 The luids are like uids but increase monotonically always.
52 We use them to see whether a jump comes from outside a given loop. */
56 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
57 number the insn is contained in. */
61 /* 1 + largest uid of any insn. */
65 /* 1 + luid of last insn. */
69 /* Number of loops detected in current function. Used as index to the
72 static int max_loop_num
;
74 /* Indexed by loop number, contains the first and last insn of each loop. */
76 static rtx
*loop_number_loop_starts
, *loop_number_loop_ends
;
78 /* For each loop, gives the containing loop number, -1 if none. */
82 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
83 really a loop (an insn outside the loop branches into it). */
85 static char *loop_invalid
;
87 /* Indexed by loop number, links together all LABEL_REFs which refer to
88 code labels outside the loop. Used by routines that need to know all
89 loop exits, such as final_biv_value and final_giv_value.
91 This does not include loop exits due to return instructions. This is
92 because all bivs and givs are pseudos, and hence must be dead after a
93 return, so the presense of a return does not affect any of the
94 optimizations that use this info. It is simpler to just not include return
95 instructions on this list. */
97 rtx
*loop_number_exit_labels
;
99 /* Holds the number of loop iterations. It is zero if the number could not be
100 calculated. Must be unsigned long since the number of iterations can
101 be as high as 2^31-1. For loops with a DImode iterator, this number will
102 will be zero if the number of loop iterations is too large for an
103 unsigned long to hold. */
105 unsigned long loop_n_iterations
;
107 /* Nonzero if there is a subroutine call in the current loop.
108 (unknown_address_altered is also nonzero in this case.) */
110 static int loop_has_call
;
112 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
113 current loop. A continue statement will generate a branch to
114 NEXT_INSN (loop_continue). */
116 static rtx loop_continue
;
118 /* Indexed by register number, contains the number of times the reg
119 is set during the loop being scanned.
120 During code motion, a negative value indicates a reg that has been
121 made a candidate; in particular -2 means that it is an candidate that
122 we know is equal to a constant and -1 means that it is an candidate
123 not known equal to a constant.
124 After code motion, regs moved have 0 (which is accurate now)
125 while the failed candidates have the original number of times set.
127 Therefore, at all times, == 0 indicates an invariant register;
128 < 0 a conditionally invariant one. */
130 static short *n_times_set
;
132 /* Original value of n_times_set; same except that this value
133 is not set negative for a reg whose sets have been made candidates
134 and not set to 0 for a reg that is moved. */
136 static short *n_times_used
;
138 /* Index by register number, 1 indicates that the register
139 cannot be moved or strength reduced. */
141 static char *may_not_optimize
;
143 /* Nonzero means reg N has already been moved out of one loop.
144 This reduces the desire to move it out of another. */
146 static char *moved_once
;
148 /* Array of MEMs that are stored in this loop. If there are too many to fit
149 here, we just turn on unknown_address_altered. */
151 #define NUM_STORES 20
152 static rtx loop_store_mems
[NUM_STORES
];
154 /* Index of first available slot in above array. */
155 static int loop_store_mems_idx
;
157 /* Nonzero if we don't know what MEMs were changed in the current loop.
158 This happens if the loop contains a call (in which call `loop_has_call'
159 will also be set) or if we store into more than NUM_STORES MEMs. */
161 static int unknown_address_altered
;
163 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
164 static int num_movables
;
166 /* Count of memory write instructions discovered in the loop. */
167 static int num_mem_sets
;
169 /* Number of loops contained within the current one, including itself. */
170 static int loops_enclosed
;
172 /* Bound on pseudo register number before loop optimization.
173 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
174 int max_reg_before_loop
;
176 /* This obstack is used in product_cheap_p to allocate its rtl. It
177 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
178 If we used the same obstack that it did, we would be deallocating
181 static struct obstack temp_obstack
;
183 /* This is where the pointer to the obstack being used for RTL is stored. */
185 extern struct obstack
*rtl_obstack
;
187 #define obstack_chunk_alloc xmalloc
188 #define obstack_chunk_free free
190 extern char *oballoc ();
191 extern int xmalloc ();
194 /* During the analysis of a loop, a chain of `struct movable's
195 is made to record all the movable insns found.
196 Then the entire chain can be scanned to decide which to move. */
200 rtx insn
; /* A movable insn */
201 rtx set_src
; /* The expression this reg is set from. */
202 rtx set_dest
; /* The destination of this SET. */
203 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
204 of any registers used within the LIBCALL. */
205 int consec
; /* Number of consecutive following insns
206 that must be moved with this one. */
207 int regno
; /* The register it sets */
208 short lifetime
; /* lifetime of that register;
209 may be adjusted when matching movables
210 that load the same value are found. */
211 short savings
; /* Number of insns we can move for this reg,
212 including other movables that force this
213 or match this one. */
214 unsigned int cond
: 1; /* 1 if only conditionally movable */
215 unsigned int force
: 1; /* 1 means MUST move this insn */
216 unsigned int global
: 1; /* 1 means reg is live outside this loop */
217 /* If PARTIAL is 1, GLOBAL means something different:
218 that the reg is live outside the range from where it is set
219 to the following label. */
220 unsigned int done
: 1; /* 1 inhibits further processing of this */
222 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
223 In particular, moving it does not make it
225 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
226 load SRC, rather than copying INSN. */
227 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
228 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
229 that we should avoid changing when clearing
230 the rest of the reg. */
231 struct movable
*match
; /* First entry for same value */
232 struct movable
*forces
; /* An insn that must be moved if this is */
233 struct movable
*next
;
236 FILE *loop_dump_stream
;
238 /* Forward declarations. */
240 static void find_and_verify_loops ();
241 static void mark_loop_jump ();
242 static void prescan_loop ();
243 static int reg_in_basic_block_p ();
244 static int consec_sets_invariant_p ();
245 static rtx
libcall_other_reg ();
246 static int labels_in_range_p ();
247 static void count_loop_regs_set ();
248 static void note_addr_stored ();
249 static int loop_reg_used_before_p ();
250 static void scan_loop ();
251 static void replace_call_address ();
252 static rtx
skip_consec_insns ();
253 static int libcall_benefit ();
254 static void ignore_some_movables ();
255 static void force_movables ();
256 static void combine_movables ();
257 static int rtx_equal_for_loop_p ();
258 static void move_movables ();
259 static void strength_reduce ();
260 static int valid_initial_value_p ();
261 static void find_mem_givs ();
262 static void record_biv ();
263 static void check_final_value ();
264 static void record_giv ();
265 static void update_giv_derive ();
266 static void delete_insn_forces ();
267 static int basic_induction_var ();
268 static rtx
simplify_giv_expr ();
269 static int general_induction_var ();
270 static int consec_sets_giv ();
271 static int check_dbra_loop ();
272 static rtx
express_from ();
273 static int combine_givs_p ();
274 static void combine_givs ();
275 static int product_cheap_p ();
276 static int maybe_eliminate_biv ();
277 static int maybe_eliminate_biv_1 ();
278 static int last_use_this_basic_block ();
279 static void record_initial ();
280 static void update_reg_last_use ();
282 /* Relative gain of eliminating various kinds of operations. */
289 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
290 copy the value of the strength reduced giv to its original register. */
296 char *free_point
= (char *) oballoc (1);
297 rtx reg
= gen_rtx (REG
, SImode
, 0);
298 rtx pow2
= gen_rtx (CONST_INT
, VOIDmode
, 32);
302 add_cost
= rtx_cost (gen_rtx (PLUS
, SImode
, reg
, reg
), SET
);
304 /* We multiply by 2 to reconcile the difference in scale between
305 these two ways of computing costs. Otherwise the cost of a copy
306 will be far less than the cost of an add. */
307 #ifdef REGISTER_MOVE_COST
308 copy_cost
= REGISTER_MOVE_COST (GENERAL_REGS
, GENERAL_REGS
) * 2;
313 /* Free the objects we just allocated. */
316 /* Initialize the obstack used for rtl in product_cheap_p. */
317 gcc_obstack_init (&temp_obstack
);
320 /* Entry point of this file. Perform loop optimization
321 on the current function. F is the first insn of the function
322 and DUMPFILE is a stream for output of a trace of actions taken
323 (or 0 if none should be output). */
326 loop_optimize (f
, dumpfile
)
327 /* f is the first instruction of a chain of insns for one function */
336 loop_dump_stream
= dumpfile
;
338 init_recog_no_volatile ();
339 init_alias_analysis ();
341 max_reg_before_loop
= max_reg_num ();
343 moved_once
= (char *) alloca (max_reg_before_loop
);
344 bzero (moved_once
, max_reg_before_loop
);
348 /* Count the number of loops. */
351 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
353 if (GET_CODE (insn
) == NOTE
354 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
358 /* Don't waste time if no loops. */
359 if (max_loop_num
== 0)
362 /* Get size to use for tables indexed by uids.
363 Leave some space for labels allocated by find_and_verify_loops. */
364 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 4;
366 uid_luid
= (int *) alloca (max_uid_for_loop
* sizeof (int));
367 uid_loop_num
= (int *) alloca (max_uid_for_loop
* sizeof (int));
369 bzero (uid_luid
, max_uid_for_loop
* sizeof (int));
370 bzero (uid_loop_num
, max_uid_for_loop
* sizeof (int));
372 /* Allocate tables for recording each loop. We set each entry, so they need
374 loop_number_loop_starts
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
375 loop_number_loop_ends
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
376 loop_outer_loop
= (int *) alloca (max_loop_num
* sizeof (int));
377 loop_invalid
= (char *) alloca (max_loop_num
* sizeof (char));
378 loop_number_exit_labels
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
380 if (flag_unroll_loops
&& write_symbols
!= NO_DEBUG
)
382 loop_number_first_block
383 = (union tree_node
**) alloca (max_loop_num
384 * sizeof (union tree_node
*));
385 loop_number_last_block
386 = (union tree_node
**) alloca (max_loop_num
387 * sizeof (union tree_node
*));
388 loop_number_block_level
= (int *) alloca (max_loop_num
* sizeof (int));
391 /* Find and process each loop.
392 First, find them, and record them in order of their beginnings. */
393 find_and_verify_loops (f
);
395 /* Now find all register lifetimes. This must be done after
396 find_and_verify_loops, because it might reorder the insns in the
398 reg_scan (f
, max_reg_num (), 1);
400 /* Compute the mapping from uids to luids.
401 LUIDs are numbers assigned to insns, like uids,
402 except that luids increase monotonically through the code.
403 Don't assign luids to line-number NOTEs, so that the distance in luids
404 between two insns is not affected by -g. */
406 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
409 if (GET_CODE (insn
) != NOTE
410 || NOTE_LINE_NUMBER (insn
) <= 0)
411 uid_luid
[INSN_UID (insn
)] = ++i
;
413 /* Give a line number note the same luid as preceding insn. */
414 uid_luid
[INSN_UID (insn
)] = i
;
419 /* Don't leave gaps in uid_luid for insns that have been
420 deleted. It is possible that the first or last insn
421 using some register has been deleted by cross-jumping.
422 Make sure that uid_luid for that former insn's uid
423 points to the general area where that insn used to be. */
424 for (i
= 0; i
< max_uid_for_loop
; i
++)
426 uid_luid
[0] = uid_luid
[i
];
427 if (uid_luid
[0] != 0)
430 for (i
= 0; i
< max_uid_for_loop
; i
++)
431 if (uid_luid
[i
] == 0)
432 uid_luid
[i
] = uid_luid
[i
- 1];
434 /* Create a mapping from loops to BLOCK tree nodes. */
435 if (flag_unroll_loops
&& write_symbols
!= NO_DEBUG
)
436 find_loop_tree_blocks (f
);
438 /* Now scan the loops, last ones first, since this means inner ones are done
439 before outer ones. */
440 for (i
= max_loop_num
-1; i
>= 0; i
--)
441 if (! loop_invalid
[i
] && loop_number_loop_ends
[i
])
442 scan_loop (loop_number_loop_starts
[i
], loop_number_loop_ends
[i
],
446 /* Optimize one loop whose start is LOOP_START and end is END.
447 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
448 NOTE_INSN_LOOP_END. */
450 /* ??? Could also move memory writes out of loops if the destination address
451 is invariant, the source is invariant, the memory write is not volatile,
452 and if we can prove that no read inside the loop can read this address
453 before the write occurs. If there is a read of this address after the
454 write, then we can also mark the memory read as invariant. */
457 scan_loop (loop_start
, end
, nregs
)
463 /* 1 if we are scanning insns that could be executed zero times. */
465 /* 1 if we are scanning insns that might never be executed
466 due to a subroutine call which might exit before they are reached. */
468 /* For a rotated loop that is entered near the bottom,
469 this is the label at the top. Otherwise it is zero. */
471 /* Jump insn that enters the loop, or 0 if control drops in. */
472 rtx loop_entry_jump
= 0;
473 /* Place in the loop where control enters. */
475 /* Number of insns in the loop. */
480 /* The SET from an insn, if it is the only SET in the insn. */
482 /* Chain describing insns movable in current loop. */
483 struct movable
*movables
= 0;
484 /* Last element in `movables' -- so we can add elements at the end. */
485 struct movable
*last_movable
= 0;
486 /* Ratio of extra register life span we can justify
487 for saving an instruction. More if loop doesn't call subroutines
488 since in that case saving an insn makes more difference
489 and more registers are available. */
491 /* If we have calls, contains the insn in which a register was used
492 if it was used exactly once; contains const0_rtx if it was used more
494 rtx
*reg_single_usage
= 0;
496 n_times_set
= (short *) alloca (nregs
* sizeof (short));
497 n_times_used
= (short *) alloca (nregs
* sizeof (short));
498 may_not_optimize
= (char *) alloca (nregs
);
500 /* Determine whether this loop starts with a jump down to a test at
501 the end. This will occur for a small number of loops with a test
502 that is too complex to duplicate in front of the loop.
504 We search for the first insn or label in the loop, skipping NOTEs.
505 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
506 (because we might have a loop executed only once that contains a
507 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
508 (in case we have a degenerate loop).
510 Note that if we mistakenly think that a loop is entered at the top
511 when, in fact, it is entered at the exit test, the only effect will be
512 slightly poorer optimization. Making the opposite error can generate
513 incorrect code. Since very few loops now start with a jump to the
514 exit test, the code here to detect that case is very conservative. */
516 for (p
= NEXT_INSN (loop_start
);
518 && GET_CODE (p
) != CODE_LABEL
&& GET_RTX_CLASS (GET_CODE (p
)) != 'i'
519 && (GET_CODE (p
) != NOTE
520 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
521 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
527 /* Set up variables describing this loop. */
528 prescan_loop (loop_start
, end
);
529 threshold
= (loop_has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
531 /* If loop has a jump before the first label,
532 the true entry is the target of that jump.
533 Start scan from there.
534 But record in LOOP_TOP the place where the end-test jumps
535 back to so we can scan that after the end of the loop. */
536 if (GET_CODE (p
) == JUMP_INSN
)
540 /* Loop entry must be unconditional jump (and not a RETURN) */
542 && JUMP_LABEL (p
) != 0
543 /* Check to see whether the jump actually
544 jumps out of the loop (meaning it's no loop).
545 This case can happen for things like
546 do {..} while (0). If this label was generated previously
547 by loop, we can't tell anything about it and have to reject
549 && INSN_UID (JUMP_LABEL (p
)) < max_uid_for_loop
550 && INSN_LUID (JUMP_LABEL (p
)) >= INSN_LUID (loop_start
)
551 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (end
))
553 loop_top
= next_label (scan_start
);
554 scan_start
= JUMP_LABEL (p
);
558 /* If SCAN_START was an insn created by loop, we don't know its luid
559 as required by loop_reg_used_before_p. So skip such loops. (This
560 test may never be true, but it's best to play it safe.)
562 Also, skip loops where we do not start scanning at a label. This
563 test also rejects loops starting with a JUMP_INSN that failed the
566 if (INSN_UID (scan_start
) >= max_uid_for_loop
567 || GET_CODE (scan_start
) != CODE_LABEL
)
569 if (loop_dump_stream
)
570 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
571 INSN_UID (loop_start
), INSN_UID (end
));
575 /* Count number of times each reg is set during this loop.
576 Set may_not_optimize[I] if it is not safe to move out
577 the setting of register I. If this loop has calls, set
578 reg_single_usage[I]. */
580 bzero (n_times_set
, nregs
* sizeof (short));
581 bzero (may_not_optimize
, nregs
);
585 reg_single_usage
= (rtx
*) alloca (nregs
* sizeof (rtx
));
586 bzero (reg_single_usage
, nregs
* sizeof (rtx
));
589 count_loop_regs_set (loop_top
? loop_top
: loop_start
, end
,
590 may_not_optimize
, reg_single_usage
, &insn_count
, nregs
);
592 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
593 may_not_optimize
[i
] = 1, n_times_set
[i
] = 1;
594 bcopy (n_times_set
, n_times_used
, nregs
* sizeof (short));
596 if (loop_dump_stream
)
598 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
599 INSN_UID (loop_start
), INSN_UID (end
), insn_count
);
601 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
602 INSN_UID (loop_continue
));
605 /* Scan through the loop finding insns that are safe to move.
606 Set n_times_set negative for the reg being set, so that
607 this reg will be considered invariant for subsequent insns.
608 We consider whether subsequent insns use the reg
609 in deciding whether it is worth actually moving.
611 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
612 and therefore it is possible that the insns we are scanning
613 would never be executed. At such times, we must make sure
614 that it is safe to execute the insn once instead of zero times.
615 When MAYBE_NEVER is 0, all insns will be executed at least once
616 so that is not a problem. */
622 /* At end of a straight-in loop, we are done.
623 At end of a loop entered at the bottom, scan the top. */
629 p
= NEXT_INSN (loop_top
);
636 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
637 && find_reg_note (p
, REG_LIBCALL
, 0))
639 else if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
640 && find_reg_note (p
, REG_RETVAL
, 0))
643 if (GET_CODE (p
) == INSN
644 && (set
= single_set (p
))
645 && GET_CODE (SET_DEST (set
)) == REG
646 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
651 rtx src
= SET_SRC (set
);
652 rtx dependencies
= 0;
654 /* Figure out what to use as a source of this insn. If a REG_EQUIV
655 note is given or if a REG_EQUAL note with a constant operand is
656 specified, use it as the source and mark that we should move
657 this insn by calling emit_move_insn rather that duplicating the
660 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
662 temp
= find_reg_note (p
, REG_EQUIV
, 0);
664 src
= XEXP (temp
, 0), move_insn
= 1;
667 temp
= find_reg_note (p
, REG_EQUAL
, 0);
668 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
669 src
= XEXP (temp
, 0), move_insn
= 1;
670 if (temp
&& find_reg_note (p
, REG_RETVAL
, 0))
672 src
= XEXP (temp
, 0);
673 /* A libcall block can use regs that don't appear in
674 the equivalent expression. To move the libcall,
675 we must move those regs too. */
676 dependencies
= libcall_other_reg (p
, src
);
680 /* Don't try to optimize a register that was made
681 by loop-optimization for an inner loop.
682 We don't know its life-span, so we can't compute the benefit. */
683 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
685 /* In order to move a register, we need to have one of three cases:
686 (1) it is used only in the same basic block as the set
687 (2) it is not a user variable.
688 (3) the set is guaranteed to be executed once the loop starts,
689 and the reg is not used until after that. */
690 else if (! ((! maybe_never
691 && ! loop_reg_used_before_p (set
, p
, loop_start
,
693 || ! REG_USERVAR_P (SET_DEST (PATTERN (p
)))
694 || reg_in_basic_block_p (p
, SET_DEST (PATTERN (p
)))))
696 else if ((tem
= invariant_p (src
))
697 && (dependencies
== 0
698 || (tem2
= invariant_p (dependencies
)) != 0)
699 && (n_times_set
[REGNO (SET_DEST (set
))] == 1
701 = consec_sets_invariant_p (SET_DEST (set
),
702 n_times_set
[REGNO (SET_DEST (set
))],
704 /* If the insn can cause a trap (such as divide by zero),
705 can't move it unless it's guaranteed to be executed
706 once loop is entered. Even a function call might
707 prevent the trap insn from being reached
708 (since it might exit!) */
709 && ! ((maybe_never
|| call_passed
)
710 && may_trap_p (src
)))
712 register struct movable
*m
;
713 register int regno
= REGNO (SET_DEST (set
));
715 /* A potential lossage is where we have a case where two insns
716 can be combined as long as they are both in the loop, but
717 we move one of them outside the loop. For large loops,
718 this can lose. The most common case of this is the address
719 of a function being called.
721 Therefore, if this register is marked as being used exactly
722 once if we are in a loop with calls (a "large loop"), see if
723 we can replace the usage of this register with the source
724 of this SET. If we can, delete this insn.
726 Don't do this if P has a REG_RETVAL note or if we have
727 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
729 if (reg_single_usage
&& reg_single_usage
[regno
] != 0
730 && reg_single_usage
[regno
] != const0_rtx
731 && regno_first_uid
[regno
] == INSN_UID (p
)
732 && (regno_last_uid
[regno
]
733 == INSN_UID (reg_single_usage
[regno
]))
734 && n_times_set
[REGNO (SET_DEST (set
))] == 1
735 && ! side_effects_p (SET_SRC (set
))
736 && ! find_reg_note (p
, REG_RETVAL
, 0)
737 #ifdef SMALL_REGISTER_CLASSES
738 && ! (GET_CODE (SET_SRC (set
)) == REG
739 && REGNO (SET_SRC (set
)) < FIRST_PSEUDO_REGISTER
)
741 /* This test is not redundant; SET_SRC (set) might be
742 a call-clobbered register and the life of REGNO
743 might span a call. */
744 && ! modified_between_p (SET_SRC (set
), p
,
745 reg_single_usage
[regno
])
746 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
747 reg_single_usage
[regno
]))
749 /* Replace any usage in a REG_EQUAL note. */
750 REG_NOTES (reg_single_usage
[regno
])
751 = replace_rtx (REG_NOTES (reg_single_usage
[regno
]),
752 SET_DEST (set
), SET_SRC (set
));
755 NOTE_LINE_NUMBER (p
) = NOTE_INSN_DELETED
;
756 NOTE_SOURCE_FILE (p
) = 0;
757 n_times_set
[regno
] = 0;
761 m
= (struct movable
*) alloca (sizeof (struct movable
));
765 m
->dependencies
= dependencies
;
766 m
->set_dest
= SET_DEST (set
);
768 m
->consec
= n_times_set
[REGNO (SET_DEST (set
))] - 1;
772 m
->move_insn
= move_insn
;
773 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, 0) != 0);
774 m
->savemode
= VOIDmode
;
776 /* Set M->cond if either invariant_p or consec_sets_invariant_p
777 returned 2 (only conditionally invariant). */
778 m
->cond
= ((tem
| tem1
| tem2
) > 1);
779 m
->global
= (uid_luid
[regno_last_uid
[regno
]] > INSN_LUID (end
)
780 || uid_luid
[regno_first_uid
[regno
]] < INSN_LUID (loop_start
));
782 m
->lifetime
= (uid_luid
[regno_last_uid
[regno
]]
783 - uid_luid
[regno_first_uid
[regno
]]);
784 m
->savings
= n_times_used
[regno
];
785 if (find_reg_note (p
, REG_RETVAL
, 0))
786 m
->savings
+= libcall_benefit (p
);
787 n_times_set
[regno
] = move_insn
? -2 : -1;
788 /* Add M to the end of the chain MOVABLES. */
792 last_movable
->next
= m
;
797 /* Skip this insn, not checking REG_LIBCALL notes. */
799 /* Skip the consecutive insns, if there are any. */
800 p
= skip_consec_insns (p
, m
->consec
);
801 /* Back up to the last insn of the consecutive group. */
802 p
= prev_nonnote_insn (p
);
804 /* We must now reset m->move_insn, m->is_equiv, and possibly
805 m->set_src to correspond to the effects of all the
807 temp
= find_reg_note (p
, REG_EQUIV
, 0);
809 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
812 temp
= find_reg_note (p
, REG_EQUAL
, 0);
813 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
814 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
819 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, 0) != 0);
822 /* If this register is always set within a STRICT_LOW_PART
823 or set to zero, then its high bytes are constant.
824 So clear them outside the loop and within the loop
825 just load the low bytes.
826 We must check that the machine has an instruction to do so.
827 Also, if the value loaded into the register
828 depends on the same register, this cannot be done. */
829 else if (SET_SRC (set
) == const0_rtx
830 && GET_CODE (NEXT_INSN (p
)) == INSN
831 && (set1
= single_set (NEXT_INSN (p
)))
832 && GET_CODE (set1
) == SET
833 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
834 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
835 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
837 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
839 register int regno
= REGNO (SET_DEST (set
));
840 if (n_times_set
[regno
] == 2)
842 register struct movable
*m
;
843 m
= (struct movable
*) alloca (sizeof (struct movable
));
846 m
->set_dest
= SET_DEST (set
);
854 /* If the insn may not be executed on some cycles,
855 we can't clear the whole reg; clear just high part.
856 Not even if the reg is used only within this loop.
863 Clearing x before the inner loop could clobber a value
864 being saved from the last time around the outer loop.
865 However, if the reg is not used outside this loop
866 and all uses of the register are in the same
867 basic block as the store, there is no problem.
869 If this insn was made by loop, we don't know its
870 INSN_LUID and hence must make a conservative
872 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
873 || (uid_luid
[regno_last_uid
[regno
]]
875 || (uid_luid
[regno_first_uid
[regno
]]
877 || (labels_in_range_p
878 (p
, uid_luid
[regno_first_uid
[regno
]])));
879 if (maybe_never
&& m
->global
)
880 m
->savemode
= GET_MODE (SET_SRC (set1
));
882 m
->savemode
= VOIDmode
;
886 m
->lifetime
= (uid_luid
[regno_last_uid
[regno
]]
887 - uid_luid
[regno_first_uid
[regno
]]);
889 n_times_set
[regno
] = -1;
890 /* Add M to the end of the chain MOVABLES. */
894 last_movable
->next
= m
;
899 /* Past a call insn, we get to insns which might not be executed
900 because the call might exit. This matters for insns that trap.
901 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
902 so they don't count. */
903 else if (GET_CODE (p
) == CALL_INSN
&& ! in_libcall
)
905 /* Past a label or a jump, we get to insns for which we
906 can't count on whether or how many times they will be
907 executed during each iteration. Therefore, we can
908 only move out sets of trivial variables
909 (those not used after the loop). */
910 /* This code appears in three places, once in scan_loop, and twice
911 in strength_reduce. */
912 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
913 /* If we enter the loop in the middle, and scan around to the
914 beginning, don't set maybe_never for that. This must be an
915 unconditional jump, otherwise the code at the top of the
916 loop might never be executed. Unconditional jumps are
917 followed a by barrier then loop end. */
918 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
919 && NEXT_INSN (NEXT_INSN (p
)) == end
920 && simplejump_p (p
)))
922 /* At the virtual top of a converted loop, insns are again known to
923 be executed: logically, the loop begins here even though the exit
924 code has been duplicated. */
925 else if (GET_CODE (p
) == NOTE
926 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
)
927 maybe_never
= call_passed
= 0;
930 /* If one movable subsumes another, ignore that other. */
932 ignore_some_movables (movables
);
934 /* For each movable insn, see if the reg that it loads
935 leads when it dies right into another conditionally movable insn.
936 If so, record that the second insn "forces" the first one,
937 since the second can be moved only if the first is. */
939 force_movables (movables
);
941 /* See if there are multiple movable insns that load the same value.
942 If there are, make all but the first point at the first one
943 through the `match' field, and add the priorities of them
944 all together as the priority of the first. */
946 combine_movables (movables
, nregs
);
948 /* Now consider each movable insn to decide whether it is worth moving.
949 Store 0 in n_times_set for each reg that is moved. */
951 move_movables (movables
, threshold
,
952 insn_count
, loop_start
, end
, nregs
);
954 /* Now candidates that still are negative are those not moved.
955 Change n_times_set to indicate that those are not actually invariant. */
956 for (i
= 0; i
< nregs
; i
++)
957 if (n_times_set
[i
] < 0)
958 n_times_set
[i
] = n_times_used
[i
];
960 if (flag_strength_reduce
)
961 strength_reduce (scan_start
, end
, loop_top
,
962 insn_count
, loop_start
, end
);
965 /* Add elements to *OUTPUT to record all the pseudo-regs
966 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
969 record_excess_regs (in_this
, not_in_this
, output
)
970 rtx in_this
, not_in_this
;
977 code
= GET_CODE (in_this
);
991 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
992 && ! reg_mentioned_p (in_this
, not_in_this
))
993 *output
= gen_rtx (EXPR_LIST
, VOIDmode
, in_this
, *output
);
997 fmt
= GET_RTX_FORMAT (code
);
998 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1005 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1006 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1010 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1016 /* Check what regs are referred to in the libcall block ending with INSN,
1017 aside from those mentioned in the equivalent value.
1018 If there are none, return 0.
1019 If there are one or more, return an EXPR_LIST containing all of them. */
1022 libcall_other_reg (insn
, equiv
)
1025 rtx note
= find_reg_note (insn
, REG_RETVAL
, 0);
1026 rtx p
= XEXP (note
, 0);
1029 /* First, find all the regs used in the libcall block
1030 that are not mentioned as inputs to the result. */
1034 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1035 || GET_CODE (p
) == CALL_INSN
)
1036 record_excess_regs (PATTERN (p
), equiv
, &output
);
1043 /* Return 1 if all uses of REG
1044 are between INSN and the end of the basic block. */
1047 reg_in_basic_block_p (insn
, reg
)
1050 int regno
= REGNO (reg
);
1053 if (regno_first_uid
[regno
] != INSN_UID (insn
))
1056 /* Search this basic block for the already recorded last use of the reg. */
1057 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1059 switch (GET_CODE (p
))
1066 /* Ordinary insn: if this is the last use, we win. */
1067 if (regno_last_uid
[regno
] == INSN_UID (p
))
1072 /* Jump insn: if this is the last use, we win. */
1073 if (regno_last_uid
[regno
] == INSN_UID (p
))
1075 /* Otherwise, it's the end of the basic block, so we lose. */
1080 /* It's the end of the basic block, so we lose. */
1085 /* The "last use" doesn't follow the "first use"?? */
1089 /* Compute the benefit of eliminating the insns in the block whose
1090 last insn is LAST. This may be a group of insns used to compute a
1091 value directly or can contain a library call. */
1094 libcall_benefit (last
)
1100 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, 0), 0);
1101 insn
!= last
; insn
= NEXT_INSN (insn
))
1103 if (GET_CODE (insn
) == CALL_INSN
)
1104 benefit
+= 10; /* Assume at least this many insns in a library
1106 else if (GET_CODE (insn
) == INSN
1107 && GET_CODE (PATTERN (insn
)) != USE
1108 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1115 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1118 skip_consec_insns (insn
, count
)
1122 for (; count
> 0; count
--)
1126 /* If first insn of libcall sequence, skip to end. */
1127 /* Do this at start of loop, since INSN is guaranteed to
1129 if (GET_CODE (insn
) != NOTE
1130 && (temp
= find_reg_note (insn
, REG_LIBCALL
, 0)))
1131 insn
= XEXP (temp
, 0);
1133 do insn
= NEXT_INSN (insn
);
1134 while (GET_CODE (insn
) == NOTE
);
1140 /* Ignore any movable whose insn falls within a libcall
1141 which is part of another movable.
1142 We make use of the fact that the movable for the libcall value
1143 was made later and so appears later on the chain. */
1146 ignore_some_movables (movables
)
1147 struct movable
*movables
;
1149 register struct movable
*m
, *m1
;
1151 for (m
= movables
; m
; m
= m
->next
)
1153 /* Is this a movable for the value of a libcall? */
1154 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, 0);
1158 /* Check for earlier movables inside that range,
1159 and mark them invalid. We cannot use LUIDs here because
1160 insns created by loop.c for prior loops don't have LUIDs.
1161 Rather than reject all such insns from movables, we just
1162 explicitly check each insn in the libcall (since invariant
1163 libcalls aren't that common). */
1164 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1165 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1166 if (m1
->insn
== insn
)
1172 /* For each movable insn, see if the reg that it loads
1173 leads when it dies right into another conditionally movable insn.
1174 If so, record that the second insn "forces" the first one,
1175 since the second can be moved only if the first is. */
1178 force_movables (movables
)
1179 struct movable
*movables
;
1181 register struct movable
*m
, *m1
;
1182 for (m1
= movables
; m1
; m1
= m1
->next
)
1183 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1184 if (!m1
->partial
&& !m1
->done
)
1186 int regno
= m1
->regno
;
1187 for (m
= m1
->next
; m
; m
= m
->next
)
1188 /* ??? Could this be a bug? What if CSE caused the
1189 register of M1 to be used after this insn?
1190 Since CSE does not update regno_last_uid,
1191 this insn M->insn might not be where it dies.
1192 But very likely this doesn't matter; what matters is
1193 that M's reg is computed from M1's reg. */
1194 if (INSN_UID (m
->insn
) == regno_last_uid
[regno
]
1197 if (m
!= 0 && m
->set_src
== m1
->set_dest
1198 /* If m->consec, m->set_src isn't valid. */
1202 /* Increase the priority of the moving the first insn
1203 since it permits the second to be moved as well. */
1207 m1
->lifetime
+= m
->lifetime
;
1208 m1
->savings
+= m1
->savings
;
1213 /* Find invariant expressions that are equal and can be combined into
1217 combine_movables (movables
, nregs
)
1218 struct movable
*movables
;
1221 register struct movable
*m
;
1222 char *matched_regs
= (char *) alloca (nregs
);
1223 enum machine_mode mode
;
1225 /* Regs that are set more than once are not allowed to match
1226 or be matched. I'm no longer sure why not. */
1227 /* Perhaps testing m->consec_sets would be more appropriate here? */
1229 for (m
= movables
; m
; m
= m
->next
)
1230 if (m
->match
== 0 && n_times_used
[m
->regno
] == 1 && !m
->partial
)
1232 register struct movable
*m1
;
1233 int regno
= m
->regno
;
1234 rtx reg_note
, reg_note1
;
1236 bzero (matched_regs
, nregs
);
1237 matched_regs
[regno
] = 1;
1239 for (m1
= movables
; m1
; m1
= m1
->next
)
1240 if (m
!= m1
&& m1
->match
== 0 && n_times_used
[m1
->regno
] == 1
1241 /* A reg used outside the loop mustn't be eliminated. */
1243 /* A reg used for zero-extending mustn't be eliminated. */
1245 && (matched_regs
[m1
->regno
]
1248 /* Can combine regs with different modes loaded from the
1249 same constant only if the modes are the same or
1250 if both are integer modes with M wider or the same
1251 width as M1. The check for integer is redundant, but
1252 safe, since the only case of differing destination
1253 modes with equal sources is when both sources are
1254 VOIDmode, i.e., CONST_INT. */
1255 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1256 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1257 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1258 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1259 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1260 /* See if the source of M1 says it matches M. */
1261 && ((GET_CODE (m1
->set_src
) == REG
1262 && matched_regs
[REGNO (m1
->set_src
)])
1263 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1265 && ((m
->dependencies
== m1
->dependencies
)
1266 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1268 m
->lifetime
+= m1
->lifetime
;
1269 m
->savings
+= m1
->savings
;
1272 matched_regs
[m1
->regno
] = 1;
1276 /* Now combine the regs used for zero-extension.
1277 This can be done for those not marked `global'
1278 provided their lives don't overlap. */
1280 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1281 mode
= GET_MODE_WIDER_MODE (mode
))
1283 register struct movable
*m0
= 0;
1285 /* Combine all the registers for extension from mode MODE.
1286 Don't combine any that are used outside this loop. */
1287 for (m
= movables
; m
; m
= m
->next
)
1288 if (m
->partial
&& ! m
->global
1289 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1291 register struct movable
*m1
;
1292 int first
= uid_luid
[regno_first_uid
[m
->regno
]];
1293 int last
= uid_luid
[regno_last_uid
[m
->regno
]];
1297 /* First one: don't check for overlap, just record it. */
1302 /* Make sure they extend to the same mode.
1303 (Almost always true.) */
1304 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1307 /* We already have one: check for overlap with those
1308 already combined together. */
1309 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1310 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1311 if (! (uid_luid
[regno_first_uid
[m1
->regno
]] > last
1312 || uid_luid
[regno_last_uid
[m1
->regno
]] < first
))
1315 /* No overlap: we can combine this with the others. */
1316 m0
->lifetime
+= m
->lifetime
;
1317 m0
->savings
+= m
->savings
;
1326 /* Return 1 if regs X and Y will become the same if moved. */
1329 regs_match_p (x
, y
, movables
)
1331 struct movable
*movables
;
1335 struct movable
*mx
, *my
;
1337 for (mx
= movables
; mx
; mx
= mx
->next
)
1338 if (mx
->regno
== xn
)
1341 for (my
= movables
; my
; my
= my
->next
)
1342 if (my
->regno
== yn
)
1346 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1348 || mx
== my
->match
));
1351 /* Return 1 if X and Y are identical-looking rtx's.
1352 This is the Lisp function EQUAL for rtx arguments.
1354 If two registers are matching movables or a movable register and an
1355 equivalent constant, consider them equal. */
1358 rtx_equal_for_loop_p (x
, y
, movables
)
1360 struct movable
*movables
;
1364 register struct movable
*m
;
1365 register enum rtx_code code
;
1370 if (x
== 0 || y
== 0)
1373 code
= GET_CODE (x
);
1375 /* If we have a register and a constant, they may sometimes be
1377 if (GET_CODE (x
) == REG
&& n_times_set
[REGNO (x
)] == -2
1379 for (m
= movables
; m
; m
= m
->next
)
1380 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1381 && rtx_equal_p (m
->set_src
, y
))
1384 else if (GET_CODE (y
) == REG
&& n_times_set
[REGNO (y
)] == -2
1386 for (m
= movables
; m
; m
= m
->next
)
1387 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1388 && rtx_equal_p (m
->set_src
, x
))
1391 /* Otherwise, rtx's of different codes cannot be equal. */
1392 if (code
!= GET_CODE (y
))
1395 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1396 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1398 if (GET_MODE (x
) != GET_MODE (y
))
1401 /* These three types of rtx's can be compared nonrecursively. */
1403 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1405 if (code
== LABEL_REF
)
1406 return XEXP (x
, 0) == XEXP (y
, 0);
1407 if (code
== SYMBOL_REF
)
1408 return XSTR (x
, 0) == XSTR (y
, 0);
1410 /* Compare the elements. If any pair of corresponding elements
1411 fail to match, return 0 for the whole things. */
1413 fmt
= GET_RTX_FORMAT (code
);
1414 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1419 if (XINT (x
, i
) != XINT (y
, i
))
1424 /* Two vectors must have the same length. */
1425 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1428 /* And the corresponding elements must match. */
1429 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1430 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
), movables
) == 0)
1435 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
) == 0)
1440 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1445 /* These are just backpointers, so they don't matter. */
1451 /* It is believed that rtx's at this level will never
1452 contain anything but integers and other rtx's,
1453 except for within LABEL_REFs and SYMBOL_REFs. */
1461 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1462 insns in INSNS which use thet reference. */
1465 add_label_notes (x
, insns
)
1469 enum rtx_code code
= GET_CODE (x
);
1474 if (code
== LABEL_REF
)
1476 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1477 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1478 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_LABEL
, XEXP (x
, 0),
1483 fmt
= GET_RTX_FORMAT (code
);
1484 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1487 add_label_notes (XEXP (x
, i
), insns
);
1488 else if (fmt
[i
] == 'E')
1489 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1490 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1494 /* Scan MOVABLES, and move the insns that deserve to be moved.
1495 If two matching movables are combined, replace one reg with the
1496 other throughout. */
1499 move_movables (movables
, threshold
, insn_count
, loop_start
, end
, nregs
)
1500 struct movable
*movables
;
1508 register struct movable
*m
;
1510 /* Map of pseudo-register replacements to handle combining
1511 when we move several insns that load the same value
1512 into different pseudo-registers. */
1513 rtx
*reg_map
= (rtx
*) alloca (nregs
* sizeof (rtx
));
1514 char *already_moved
= (char *) alloca (nregs
);
1516 bzero (already_moved
, nregs
);
1517 bzero (reg_map
, nregs
* sizeof (rtx
));
1521 for (m
= movables
; m
; m
= m
->next
)
1523 /* Describe this movable insn. */
1525 if (loop_dump_stream
)
1527 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1528 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1530 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1532 fprintf (loop_dump_stream
, "cond ");
1534 fprintf (loop_dump_stream
, "force ");
1536 fprintf (loop_dump_stream
, "global ");
1538 fprintf (loop_dump_stream
, "done ");
1540 fprintf (loop_dump_stream
, "move-insn ");
1542 fprintf (loop_dump_stream
, "matches %d ",
1543 INSN_UID (m
->match
->insn
));
1545 fprintf (loop_dump_stream
, "forces %d ",
1546 INSN_UID (m
->forces
->insn
));
1549 /* Count movables. Value used in heuristics in strength_reduce. */
1552 /* Ignore the insn if it's already done (it matched something else).
1553 Otherwise, see if it is now safe to move. */
1557 || (1 == invariant_p (m
->set_src
)
1558 && (m
->dependencies
== 0
1559 || 1 == invariant_p (m
->dependencies
))
1561 || 1 == consec_sets_invariant_p (m
->set_dest
,
1564 && (! m
->forces
|| m
->forces
->done
))
1568 int savings
= m
->savings
;
1570 /* We have an insn that is safe to move.
1571 Compute its desirability. */
1576 if (loop_dump_stream
)
1577 fprintf (loop_dump_stream
, "savings %d ", savings
);
1579 if (moved_once
[regno
])
1583 if (loop_dump_stream
)
1584 fprintf (loop_dump_stream
, "halved since already moved ");
1587 /* An insn MUST be moved if we already moved something else
1588 which is safe only if this one is moved too: that is,
1589 if already_moved[REGNO] is nonzero. */
1591 /* An insn is desirable to move if the new lifetime of the
1592 register is no more than THRESHOLD times the old lifetime.
1593 If it's not desirable, it means the loop is so big
1594 that moving won't speed things up much,
1595 and it is liable to make register usage worse. */
1597 /* It is also desirable to move if it can be moved at no
1598 extra cost because something else was already moved. */
1600 if (already_moved
[regno
]
1601 || (threshold
* savings
* m
->lifetime
) >= insn_count
1602 || (m
->forces
&& m
->forces
->done
1603 && n_times_used
[m
->forces
->regno
] == 1))
1606 register struct movable
*m1
;
1609 /* Now move the insns that set the reg. */
1611 if (m
->partial
&& m
->match
)
1615 /* Find the end of this chain of matching regs.
1616 Thus, we load each reg in the chain from that one reg.
1617 And that reg is loaded with 0 directly,
1618 since it has ->match == 0. */
1619 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1620 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1621 SET_DEST (PATTERN (m1
->insn
)));
1622 i1
= emit_insn_before (newpat
, loop_start
);
1624 /* Mark the moved, invariant reg as being allowed to
1625 share a hard reg with the other matching invariant. */
1626 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1627 r1
= SET_DEST (PATTERN (m
->insn
));
1628 r2
= SET_DEST (PATTERN (m1
->insn
));
1629 regs_may_share
= gen_rtx (EXPR_LIST
, VOIDmode
, r1
,
1630 gen_rtx (EXPR_LIST
, VOIDmode
, r2
,
1632 delete_insn (m
->insn
);
1637 if (loop_dump_stream
)
1638 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1640 /* If we are to re-generate the item being moved with a
1641 new move insn, first delete what we have and then emit
1642 the move insn before the loop. */
1643 else if (m
->move_insn
)
1647 for (count
= m
->consec
; count
>= 0; count
--)
1649 /* If this is the first insn of a library call sequence,
1651 if (GET_CODE (p
) != NOTE
1652 && (temp
= find_reg_note (p
, REG_LIBCALL
, 0)))
1655 /* If this is the last insn of a libcall sequence, then
1656 delete every insn in the sequence except the last.
1657 The last insn is handled in the normal manner. */
1658 if (GET_CODE (p
) != NOTE
1659 && (temp
= find_reg_note (p
, REG_RETVAL
, 0)))
1661 temp
= XEXP (temp
, 0);
1663 temp
= delete_insn (temp
);
1666 p
= delete_insn (p
);
1670 emit_move_insn (m
->set_dest
, m
->set_src
);
1671 temp
= get_insns ();
1674 add_label_notes (m
->set_src
, temp
);
1676 i1
= emit_insns_before (temp
, loop_start
);
1677 if (! find_reg_note (i1
, REG_EQUAL
, 0))
1679 = gen_rtx (EXPR_LIST
,
1680 m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1681 m
->set_src
, REG_NOTES (i1
));
1683 if (loop_dump_stream
)
1684 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1686 /* The more regs we move, the less we like moving them. */
1691 for (count
= m
->consec
; count
>= 0; count
--)
1695 /* If first insn of libcall sequence, skip to end. */
1696 /* Do this at start of loop, since p is guaranteed to
1698 if (GET_CODE (p
) != NOTE
1699 && (temp
= find_reg_note (p
, REG_LIBCALL
, 0)))
1702 /* If last insn of libcall sequence, move all
1703 insns except the last before the loop. The last
1704 insn is handled in the normal manner. */
1705 if (GET_CODE (p
) != NOTE
1706 && (temp
= find_reg_note (p
, REG_RETVAL
, 0)))
1710 rtx fn_address_insn
= 0;
1713 for (temp
= XEXP (temp
, 0); temp
!= p
;
1714 temp
= NEXT_INSN (temp
))
1720 if (GET_CODE (temp
) == NOTE
)
1723 body
= PATTERN (temp
);
1725 /* Find the next insn after TEMP,
1726 not counting USE or NOTE insns. */
1727 for (next
= NEXT_INSN (temp
); next
!= p
;
1728 next
= NEXT_INSN (next
))
1729 if (! (GET_CODE (next
) == INSN
1730 && GET_CODE (PATTERN (next
)) == USE
)
1731 && GET_CODE (next
) != NOTE
)
1734 /* If that is the call, this may be the insn
1735 that loads the function address.
1737 Extract the function address from the insn
1738 that loads it into a register.
1739 If this insn was cse'd, we get incorrect code.
1741 So emit a new move insn that copies the
1742 function address into the register that the
1743 call insn will use. flow.c will delete any
1744 redundant stores that we have created. */
1745 if (GET_CODE (next
) == CALL_INSN
1746 && GET_CODE (body
) == SET
1747 && GET_CODE (SET_DEST (body
)) == REG
1748 && (n
= find_reg_note (temp
, REG_EQUAL
, 0)))
1750 fn_reg
= SET_SRC (body
);
1751 if (GET_CODE (fn_reg
) != REG
)
1752 fn_reg
= SET_DEST (body
);
1753 fn_address
= XEXP (n
, 0);
1754 fn_address_insn
= temp
;
1756 /* We have the call insn.
1757 If it uses the register we suspect it might,
1758 load it with the correct address directly. */
1759 if (GET_CODE (temp
) == CALL_INSN
1761 && reg_mentioned_p (fn_reg
, body
))
1762 emit_insn_after (gen_move_insn (fn_reg
,
1766 if (GET_CODE (temp
) == CALL_INSN
)
1767 i1
= emit_call_insn_before (body
, loop_start
);
1769 i1
= emit_insn_before (body
, loop_start
);
1772 if (temp
== fn_address_insn
)
1773 fn_address_insn
= i1
;
1774 REG_NOTES (i1
) = REG_NOTES (temp
);
1778 if (m
->savemode
!= VOIDmode
)
1780 /* P sets REG to zero; but we should clear only
1781 the bits that are not covered by the mode
1783 rtx reg
= m
->set_dest
;
1789 (GET_MODE (reg
), and_optab
, reg
,
1790 gen_rtx (CONST_INT
, VOIDmode
,
1791 ((1 << GET_MODE_BITSIZE (m
->savemode
)))
1793 reg
, 1, OPTAB_LIB_WIDEN
);
1797 emit_move_insn (reg
, tem
);
1798 sequence
= gen_sequence ();
1800 i1
= emit_insn_before (sequence
, loop_start
);
1802 else if (GET_CODE (p
) == CALL_INSN
)
1803 i1
= emit_call_insn_before (PATTERN (p
), loop_start
);
1805 i1
= emit_insn_before (PATTERN (p
), loop_start
);
1807 REG_NOTES (i1
) = REG_NOTES (p
);
1812 if (loop_dump_stream
)
1813 fprintf (loop_dump_stream
, " moved to %d",
1817 /* This isn't needed because REG_NOTES is copied
1818 below and is wrong since P might be a PARALLEL. */
1819 if (REG_NOTES (i1
) == 0
1820 && ! m
->partial
/* But not if it's a zero-extend clr. */
1821 && ! m
->global
/* and not if used outside the loop
1822 (since it might get set outside). */
1823 && CONSTANT_P (SET_SRC (PATTERN (p
))))
1825 = gen_rtx (EXPR_LIST
, REG_EQUAL
,
1826 SET_SRC (PATTERN (p
)), REG_NOTES (i1
));
1829 /* If library call, now fix the REG_NOTES that contain
1830 insn pointers, namely REG_LIBCALL on FIRST
1831 and REG_RETVAL on I1. */
1832 if (temp
= find_reg_note (i1
, REG_RETVAL
, 0))
1834 XEXP (temp
, 0) = first
;
1835 temp
= find_reg_note (first
, REG_LIBCALL
, 0);
1836 XEXP (temp
, 0) = i1
;
1840 do p
= NEXT_INSN (p
);
1841 while (p
&& GET_CODE (p
) == NOTE
);
1844 /* The more regs we move, the less we like moving them. */
1848 /* Any other movable that loads the same register
1850 already_moved
[regno
] = 1;
1852 /* This reg has been moved out of one loop. */
1853 moved_once
[regno
] = 1;
1855 /* The reg set here is now invariant. */
1857 n_times_set
[regno
] = 0;
1861 /* Change the length-of-life info for the register
1862 to say it lives at least the full length of this loop.
1863 This will help guide optimizations in outer loops. */
1865 if (uid_luid
[regno_first_uid
[regno
]] > INSN_LUID (loop_start
))
1866 /* This is the old insn before all the moved insns.
1867 We can't use the moved insn because it is out of range
1868 in uid_luid. Only the old insns have luids. */
1869 regno_first_uid
[regno
] = INSN_UID (loop_start
);
1870 if (uid_luid
[regno_last_uid
[regno
]] < INSN_LUID (end
))
1871 regno_last_uid
[regno
] = INSN_UID (end
);
1873 /* Combine with this moved insn any other matching movables. */
1876 for (m1
= movables
; m1
; m1
= m1
->next
)
1881 /* Schedule the reg loaded by M1
1882 for replacement so that shares the reg of M.
1883 If the modes differ (only possible in restricted
1884 circumstances, make a SUBREG. */
1885 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
1886 reg_map
[m1
->regno
] = m
->set_dest
;
1889 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
1892 /* Get rid of the matching insn
1893 and prevent further processing of it. */
1896 /* if library call, delete all insn except last, which
1898 if (temp
= find_reg_note (m1
->insn
, REG_RETVAL
, 0))
1900 for (temp
= XEXP (temp
, 0); temp
!= m1
->insn
;
1901 temp
= NEXT_INSN (temp
))
1904 delete_insn (m1
->insn
);
1906 /* Any other movable that loads the same register
1908 already_moved
[m1
->regno
] = 1;
1910 /* The reg merged here is now invariant,
1911 if the reg it matches is invariant. */
1913 n_times_set
[m1
->regno
] = 0;
1916 else if (loop_dump_stream
)
1917 fprintf (loop_dump_stream
, "not desirable");
1919 else if (loop_dump_stream
&& !m
->match
)
1920 fprintf (loop_dump_stream
, "not safe");
1922 if (loop_dump_stream
)
1923 fprintf (loop_dump_stream
, "\n");
1927 new_start
= loop_start
;
1929 /* Go through all the instructions in the loop, making
1930 all the register substitutions scheduled in REG_MAP. */
1931 for (p
= new_start
; p
!= end
; p
= NEXT_INSN (p
))
1932 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1933 || GET_CODE (p
) == CALL_INSN
)
1935 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
1936 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
1941 /* Scan X and replace the address of any MEM in it with ADDR.
1942 REG is the address that MEM should have before the replacement. */
1945 replace_call_address (x
, reg
, addr
)
1948 register enum rtx_code code
;
1954 code
= GET_CODE (x
);
1968 /* Short cut for very common case. */
1969 replace_call_address (XEXP (x
, 1), reg
, addr
);
1973 /* Short cut for very common case. */
1974 replace_call_address (XEXP (x
, 0), reg
, addr
);
1978 /* If this MEM uses a reg other than the one we expected,
1979 something is wrong. */
1980 if (XEXP (x
, 0) != reg
)
1986 fmt
= GET_RTX_FORMAT (code
);
1987 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1990 replace_call_address (XEXP (x
, i
), reg
, addr
);
1994 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1995 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2001 /* Return the number of memory refs to addresses that vary
2005 count_nonfixed_reads (x
)
2008 register enum rtx_code code
;
2016 code
= GET_CODE (x
);
2030 return ((invariant_p (XEXP (x
, 0)) != 1)
2031 + count_nonfixed_reads (XEXP (x
, 0)));
2035 fmt
= GET_RTX_FORMAT (code
);
2036 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2039 value
+= count_nonfixed_reads (XEXP (x
, i
));
2043 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2044 value
+= count_nonfixed_reads (XVECEXP (x
, i
, j
));
2052 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2053 Replace it with an instruction to load just the low bytes
2054 if the machine supports such an instruction,
2055 and insert above LOOP_START an instruction to clear the register. */
2058 constant_high_bytes (p
, loop_start
)
2062 register int insn_code_number
;
2064 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2065 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2067 new = gen_rtx (SET
, VOIDmode
,
2068 gen_rtx (STRICT_LOW_PART
, VOIDmode
,
2069 gen_rtx (SUBREG
, GET_MODE (XEXP (SET_SRC (PATTERN (p
)), 0)),
2070 SET_DEST (PATTERN (p
)),
2072 XEXP (SET_SRC (PATTERN (p
)), 0));
2073 insn_code_number
= recog (new, p
);
2075 if (insn_code_number
)
2079 /* Clear destination register before the loop. */
2080 emit_insn_before (gen_rtx (SET
, VOIDmode
,
2081 SET_DEST (PATTERN (p
)),
2085 /* Inside the loop, just load the low part. */
2091 /* Scan a loop setting the variables `unknown_address_altered',
2092 `num_mem_sets', `loop_continue', loops_enclosed' and `loop_has_call'.
2093 Also, fill in the array `loop_store_mems'. */
2096 prescan_loop (start
, end
)
2099 register int level
= 1;
2102 unknown_address_altered
= 0;
2104 loop_store_mems_idx
= 0;
2110 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2111 insn
= NEXT_INSN (insn
))
2113 if (GET_CODE (insn
) == NOTE
)
2115 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2118 /* Count number of loops contained in this one. */
2121 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2130 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_CONT
)
2133 loop_continue
= insn
;
2136 else if (GET_CODE (insn
) == CALL_INSN
)
2138 unknown_address_altered
= 1;
2143 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2144 note_stores (PATTERN (insn
), note_addr_stored
);
2149 /* Scan the function looking for loops. Record the start and end of each loop.
2150 Also mark as invalid loops any loops that contain a setjmp or are branched
2151 to from outside the loop. */
2154 find_and_verify_loops (f
)
2158 int current_loop
= -1;
2162 /* If there are jumps to undefined labels,
2163 treat them as jumps out of any/all loops.
2164 This also avoids writing past end of tables when there are no loops. */
2165 uid_loop_num
[0] = -1;
2167 /* Find boundaries of loops, mark which loops are contained within
2168 loops, and invalidate loops that have setjmp. */
2170 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2172 if (GET_CODE (insn
) == NOTE
)
2173 switch (NOTE_LINE_NUMBER (insn
))
2175 case NOTE_INSN_LOOP_BEG
:
2176 loop_number_loop_starts
[++next_loop
] = insn
;
2177 loop_number_loop_ends
[next_loop
] = 0;
2178 loop_outer_loop
[next_loop
] = current_loop
;
2179 loop_invalid
[next_loop
] = 0;
2180 loop_number_exit_labels
[next_loop
] = 0;
2181 current_loop
= next_loop
;
2184 case NOTE_INSN_SETJMP
:
2185 /* In this case, we must invalidate our current loop and any
2187 for (loop
= current_loop
; loop
!= -1; loop
= loop_outer_loop
[loop
])
2189 loop_invalid
[loop
] = 1;
2190 if (loop_dump_stream
)
2191 fprintf (loop_dump_stream
,
2192 "\nLoop at %d ignored due to setjmp.\n",
2193 INSN_UID (loop_number_loop_starts
[loop
]));
2197 case NOTE_INSN_LOOP_END
:
2198 if (current_loop
== -1)
2201 loop_number_loop_ends
[current_loop
] = insn
;
2202 current_loop
= loop_outer_loop
[current_loop
];
2207 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2208 enclosing loop, but this doesn't matter. */
2209 uid_loop_num
[INSN_UID (insn
)] = current_loop
;
2212 /* Now scan all JUMP_INSN's in the function. If any branches into a loop
2213 that it is not contained within, that loop is marked invalid.
2215 Also look for blocks of code ending in an unconditional branch that
2216 exits the loop. If such a block is surrounded by a conditional
2217 branch around the block, move the block elsewhere (see below) and
2218 invert the jump to point to the code block. This may eliminate a
2219 label in our loop and will simplify processing by both us and a
2220 possible second cse pass. */
2222 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2223 if (GET_CODE (insn
) == JUMP_INSN
)
2225 int this_loop_num
= uid_loop_num
[INSN_UID (insn
)];
2227 mark_loop_jump (PATTERN (insn
), this_loop_num
);
2229 /* See if this is an unconditional branch outside the loop. */
2230 if (this_loop_num
!= -1
2231 && (GET_CODE (PATTERN (insn
)) == RETURN
2232 || (simplejump_p (insn
)
2233 && (uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))]
2234 != this_loop_num
))))
2237 rtx our_next
= next_real_insn (insn
);
2239 /* Go backwards until we reach the start of the loop, a label,
2241 for (p
= PREV_INSN (insn
);
2242 GET_CODE (p
) != CODE_LABEL
2243 && ! (GET_CODE (p
) == NOTE
2244 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2245 && GET_CODE (p
) != JUMP_INSN
;
2249 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2250 we have a block of code to try to move.
2252 We look backward and then forward from the target of INSN
2253 to find a BARRIER at the same loop depth as the target.
2254 If we find such a BARRIER, we make a new label for the start
2255 of the block, invert the jump in P and point it to that label,
2256 and move the block of code to the spot we found. */
2258 if (GET_CODE (p
) == JUMP_INSN
2259 && JUMP_LABEL (p
) != 0
2261 && ! simplejump_p (p
)
2262 && next_real_insn (JUMP_LABEL (p
)) == our_next
)
2265 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2266 int target_loop_num
= uid_loop_num
[INSN_UID (target
)];
2269 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2270 if (GET_CODE (loc
) == BARRIER
2271 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2275 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2276 if (GET_CODE (loc
) == BARRIER
2277 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2282 rtx cond_label
= JUMP_LABEL (p
);
2283 rtx new_label
= get_label_after (p
);
2285 /* Ensure our label doesn't go away. */
2286 LABEL_NUSES (cond_label
)++;
2288 /* Verify that uid_loop_num is large enough and that
2290 if (INSN_UID (new_label
) < max_uid_for_loop
2291 && invert_jump (p
, new_label
))
2295 /* Include the BARRIER after INSN and copy the
2297 new_label
= squeeze_notes (new_label
, NEXT_INSN (insn
));
2298 reorder_insns (new_label
, NEXT_INSN (insn
), loc
);
2300 /* All those insns are now in TARGET_LOOP_NUM. */
2301 for (q
= new_label
; q
!= NEXT_INSN (NEXT_INSN (insn
));
2303 uid_loop_num
[INSN_UID (q
)] = target_loop_num
;
2305 /* The label jumped to by INSN is no longer a loop exit.
2306 Unless INSN does not have a label (e.g., it is a
2307 RETURN insn), search loop_number_exit_labels to find
2308 its label_ref, and remove it. Also turn off
2309 LABEL_OUTSIDE_LOOP_P bit. */
2310 if (JUMP_LABEL (insn
))
2313 r
= loop_number_exit_labels
[this_loop_num
];
2314 r
; q
= r
, r
= LABEL_NEXTREF (r
))
2315 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2317 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2319 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2321 loop_number_exit_labels
[this_loop_num
]
2322 = LABEL_NEXTREF (r
);
2326 /* If we didn't find it, then something is wrong. */
2331 /* P is now a jump outside the loop, so it must be put
2332 in loop_number_exit_labels, and marked as such.
2333 The easiest way to do this is to just call
2334 mark_loop_jump again for P. */
2335 mark_loop_jump (PATTERN (p
), this_loop_num
);
2337 /* If INSN now jumps to the insn after it,
2339 if (JUMP_LABEL (insn
) != 0
2340 && (next_real_insn (JUMP_LABEL (insn
))
2341 == next_real_insn (insn
)))
2345 /* Continue the loop after where the conditional
2346 branch used to jump, since the only branch insn
2347 in the block (if it still remains) is an inter-loop
2348 branch and hence needs no processing. */
2349 insn
= NEXT_INSN (cond_label
);
2351 if (--LABEL_NUSES (cond_label
) == 0)
2352 delete_insn (cond_label
);
2359 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2360 loops it is contained in, mark the target loop invalid.
2362 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2365 mark_loop_jump (x
, loop_num
)
2373 switch (GET_CODE (x
))
2386 /* There could be a label reference in here. */
2387 mark_loop_jump (XEXP (x
, 0), loop_num
);
2394 mark_loop_jump (XEXP (x
, 0), loop_num
);
2395 mark_loop_jump (XEXP (x
, 1), loop_num
);
2400 mark_loop_jump (XEXP (x
, 0), loop_num
);
2404 dest_loop
= uid_loop_num
[INSN_UID (XEXP (x
, 0))];
2406 /* Link together all labels that branch outside the loop. This
2407 is used by final_[bg]iv_value and the loop unrolling code. Also
2408 mark this LABEL_REF so we know that this branch should predict
2411 if (dest_loop
!= loop_num
&& loop_num
!= -1)
2413 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2414 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2415 loop_number_exit_labels
[loop_num
] = x
;
2418 /* If this is inside a loop, but not in the current loop or one enclosed
2419 by it, it invalidates at least one loop. */
2421 if (dest_loop
== -1)
2424 /* We must invalidate every nested loop containing the target of this
2425 label, except those that also contain the jump insn. */
2427 for (; dest_loop
!= -1; dest_loop
= loop_outer_loop
[dest_loop
])
2429 /* Stop when we reach a loop that also contains the jump insn. */
2430 for (outer_loop
= loop_num
; outer_loop
!= -1;
2431 outer_loop
= loop_outer_loop
[outer_loop
])
2432 if (dest_loop
== outer_loop
)
2435 /* If we get here, we know we need to invalidate a loop. */
2436 if (loop_dump_stream
&& ! loop_invalid
[dest_loop
])
2437 fprintf (loop_dump_stream
,
2438 "\nLoop at %d ignored due to multiple entry points.\n",
2439 INSN_UID (loop_number_loop_starts
[dest_loop
]));
2441 loop_invalid
[dest_loop
] = 1;
2446 /* If this is not setting pc, ignore. */
2447 if (SET_DEST (x
) == pc_rtx
)
2448 mark_loop_jump (SET_SRC (x
), loop_num
);
2452 mark_loop_jump (XEXP (x
, 1), loop_num
);
2453 mark_loop_jump (XEXP (x
, 2), loop_num
);
2458 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
2459 mark_loop_jump (XVECEXP (x
, 0, i
), loop_num
);
2463 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
2464 mark_loop_jump (XVECEXP (x
, 1, i
), loop_num
);
2468 /* Nothing else should occur in a JUMP_INSN. */
2473 /* Return nonzero if there is a label in the range from
2474 insn INSN to and including the insn whose luid is END
2475 INSN must have an assigned luid (i.e., it must not have
2476 been previously created by loop.c). */
2479 labels_in_range_p (insn
, end
)
2483 while (insn
&& INSN_LUID (insn
) <= end
)
2485 if (GET_CODE (insn
) == CODE_LABEL
)
2487 insn
= NEXT_INSN (insn
);
2493 /* Record that a memory reference X is being set. */
2496 note_addr_stored (x
)
2501 if (x
== 0 || GET_CODE (x
) != MEM
)
2504 /* Count number of memory writes.
2505 This affects heuristics in strength_reduce. */
2508 if (unknown_address_altered
)
2511 for (i
= 0; i
< loop_store_mems_idx
; i
++)
2512 if (rtx_equal_p (XEXP (loop_store_mems
[i
], 0), XEXP (x
, 0))
2513 && MEM_IN_STRUCT_P (x
) == MEM_IN_STRUCT_P (loop_store_mems
[i
]))
2515 /* We are storing at the same address as previously noted. Save the
2516 wider reference, treating BLKmode as wider. */
2517 if (GET_MODE (x
) == BLKmode
2518 || (GET_MODE_SIZE (GET_MODE (x
))
2519 > GET_MODE_SIZE (GET_MODE (loop_store_mems
[i
]))))
2520 loop_store_mems
[i
] = x
;
2524 if (i
== NUM_STORES
)
2525 unknown_address_altered
= 1;
2527 else if (i
== loop_store_mems_idx
)
2528 loop_store_mems
[loop_store_mems_idx
++] = x
;
2531 /* Return nonzero if the rtx X is invariant over the current loop.
2533 The value is 2 if we refer to something only conditionally invariant.
2535 If `unknown_address_altered' is nonzero, no memory ref is invariant.
2536 Otherwise, a memory ref is invariant if it does not conflict with
2537 anything stored in `loop_store_mems'. */
2544 register enum rtx_code code
;
2546 int conditional
= 0;
2550 code
= GET_CODE (x
);
2560 /* A LABEL_REF is normally invariant, however, if we are unrolling
2561 loops, and this label is inside the loop, then it isn't invariant.
2562 This is because each unrolled copy of the loop body will have
2563 a copy of this label. If this was invariant, then an insn loading
2564 the address of this label into a register might get moved outside
2565 the loop, and then each loop body would end up using the same label.
2567 We don't know the loop bounds here though, so just fail for all
2569 if (flag_unroll_loops
)
2576 case UNSPEC_VOLATILE
:
2580 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
2581 since the reg might be set by initialization within the loop. */
2582 if (x
== frame_pointer_rtx
|| x
== arg_pointer_rtx
)
2585 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
2587 if (n_times_set
[REGNO (x
)] < 0)
2589 return n_times_set
[REGNO (x
)] == 0;
2592 /* Read-only items (such as constants in a constant pool) are
2593 invariant if their address is. */
2594 if (RTX_UNCHANGING_P (x
))
2597 /* If we filled the table (or had a subroutine call), any location
2598 in memory could have been clobbered. */
2599 if (unknown_address_altered
2600 /* Don't mess with volatile memory references. */
2601 || MEM_VOLATILE_P (x
))
2604 /* See if there is any dependence between a store and this load. */
2605 for (i
= loop_store_mems_idx
- 1; i
>= 0; i
--)
2606 if (true_dependence (loop_store_mems
[i
], x
))
2609 /* It's not invalidated by a store in memory
2610 but we must still verify the address is invariant. */
2614 /* Don't mess with insns declared volatile. */
2615 if (MEM_VOLATILE_P (x
))
2619 fmt
= GET_RTX_FORMAT (code
);
2620 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2624 int tem
= invariant_p (XEXP (x
, i
));
2630 else if (fmt
[i
] == 'E')
2633 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2635 int tem
= invariant_p (XVECEXP (x
, i
, j
));
2645 return 1 + conditional
;
2648 /* Return 1 if OTHER (a mem ref) overlaps the area of memory
2649 which is SIZE bytes starting at BASE. */
2652 addr_overlap_p (other
, base
, size
)
2659 if (GET_CODE (base
) == CONST
)
2660 base
= XEXP (base
, 0);
2661 if (GET_CODE (base
) == PLUS
2662 && GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2664 start
= INTVAL (XEXP (base
, 1));
2665 base
= XEXP (base
, 0);
2669 return refers_to_mem_p (other
, base
, start
, end
);
2672 /* Return nonzero if all the insns in the loop that set REG
2673 are INSN and the immediately following insns,
2674 and if each of those insns sets REG in an invariant way
2675 (not counting uses of REG in them).
2677 The value is 2 if some of these insns are only conditionally invariant.
2679 We assume that INSN itself is the first set of REG
2680 and that its source is invariant. */
2683 consec_sets_invariant_p (reg
, n_sets
, insn
)
2687 register rtx p
= insn
;
2688 register int regno
= REGNO (reg
);
2690 /* Number of sets we have to insist on finding after INSN. */
2691 int count
= n_sets
- 1;
2692 int old
= n_times_set
[regno
];
2696 /* If N_SETS hit the limit, we can't rely on its value. */
2700 n_times_set
[regno
] = 0;
2704 register enum rtx_code code
;
2708 code
= GET_CODE (p
);
2710 /* If library call, skip to end of of it. */
2711 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, 0)))
2716 && (set
= single_set (p
))
2717 && GET_CODE (SET_DEST (set
)) == REG
2718 && REGNO (SET_DEST (set
)) == regno
)
2720 this = invariant_p (SET_SRC (set
));
2723 else if (temp
= find_reg_note (p
, REG_EQUAL
, 0))
2725 this = invariant_p (XEXP (temp
, 0));
2732 else if (code
!= NOTE
)
2734 n_times_set
[regno
] = old
;
2739 n_times_set
[regno
] = old
;
2740 /* If invariant_p ever returned 2, we return 2. */
2741 return 1 + (value
& 2);
2745 /* I don't think this condition is sufficient to allow INSN
2746 to be moved, so we no longer test it. */
2748 /* Return 1 if all insns in the basic block of INSN and following INSN
2749 that set REG are invariant according to TABLE. */
2752 all_sets_invariant_p (reg
, insn
, table
)
2756 register rtx p
= insn
;
2757 register int regno
= REGNO (reg
);
2761 register enum rtx_code code
;
2763 code
= GET_CODE (p
);
2764 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
2766 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
2767 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
2768 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
2770 if (!invariant_p (SET_SRC (PATTERN (p
)), table
))
2777 /* Look at all uses (not sets) of registers in X. For each, if it is
2778 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
2779 a different insn, set USAGE[REGNO] to const0_rtx. */
2782 find_single_use_in_loop (insn
, x
, usage
)
2787 enum rtx_code code
= GET_CODE (x
);
2788 char *fmt
= GET_RTX_FORMAT (code
);
2793 = (usage
[REGNO (x
)] != 0 && usage
[REGNO (x
)] != insn
)
2794 ? const0_rtx
: insn
;
2796 else if (code
== SET
)
2798 /* Don't count SET_DEST if it is a REG; otherwise count things
2799 in SET_DEST because if a register is partially modified, it won't
2800 show up as a potential movable so we don't care how USAGE is set
2802 if (GET_CODE (SET_DEST (x
)) != REG
)
2803 find_single_use_in_loop (insn
, SET_DEST (x
), usage
);
2804 find_single_use_in_loop (insn
, SET_SRC (x
), usage
);
2807 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2809 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
2810 find_single_use_in_loop (insn
, XEXP (x
, i
), usage
);
2811 else if (fmt
[i
] == 'E')
2812 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2813 find_single_use_in_loop (insn
, XVECEXP (x
, i
, j
), usage
);
2817 /* Increment N_TIMES_SET at the index of each register
2818 that is modified by an insn between FROM and TO.
2819 If the value of an element of N_TIMES_SET becomes 127 or more,
2820 stop incrementing it, to avoid overflow.
2822 Store in SINGLE_USAGE[I] the single insn in which register I is
2823 used, if it is only used once. Otherwise, it is set to 0 (for no
2824 uses) or const0_rtx for more than one use. This parameter may be zero,
2825 in which case this processing is not done.
2827 Store in *COUNT_PTR the number of actual instruction
2828 in the loop. We use this to decide what is worth moving out. */
2830 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
2831 In that case, it is the insn that last set reg n. */
2834 count_loop_regs_set (from
, to
, may_not_move
, single_usage
, count_ptr
, nregs
)
2835 register rtx from
, to
;
2841 register rtx
*last_set
= (rtx
*) alloca (nregs
* sizeof (rtx
));
2843 register int count
= 0;
2846 bzero (last_set
, nregs
* sizeof (rtx
));
2847 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
2849 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2853 /* If requested, record registers that have exactly one use. */
2856 find_single_use_in_loop (insn
, PATTERN (insn
), single_usage
);
2858 /* Include uses in REG_EQUAL notes. */
2859 if (REG_NOTES (insn
))
2860 find_single_use_in_loop (insn
, REG_NOTES (insn
), single_usage
);
2863 if (GET_CODE (PATTERN (insn
)) == CLOBBER
2864 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
2865 /* Don't move a reg that has an explicit clobber.
2866 We might do so sometimes, but it's not worth the pain. */
2867 may_not_move
[REGNO (XEXP (PATTERN (insn
), 0))] = 1;
2869 if (GET_CODE (PATTERN (insn
)) == SET
2870 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
2872 dest
= SET_DEST (PATTERN (insn
));
2873 while (GET_CODE (dest
) == SUBREG
2874 || GET_CODE (dest
) == ZERO_EXTRACT
2875 || GET_CODE (dest
) == SIGN_EXTRACT
2876 || GET_CODE (dest
) == STRICT_LOW_PART
)
2877 dest
= XEXP (dest
, 0);
2878 if (GET_CODE (dest
) == REG
)
2880 register int regno
= REGNO (dest
);
2881 /* If this is the first setting of this reg
2882 in current basic block, and it was set before,
2883 it must be set in two basic blocks, so it cannot
2884 be moved out of the loop. */
2885 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
2886 may_not_move
[regno
] = 1;
2887 /* If this is not first setting in current basic block,
2888 see if reg was used in between previous one and this.
2889 If so, neither one can be moved. */
2890 if (last_set
[regno
] != 0
2891 && reg_used_between_p (dest
, last_set
[regno
], insn
))
2892 may_not_move
[regno
] = 1;
2893 if (n_times_set
[regno
] < 127)
2894 ++n_times_set
[regno
];
2895 last_set
[regno
] = insn
;
2898 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2901 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
2903 register rtx x
= XVECEXP (PATTERN (insn
), 0, i
);
2904 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
2905 /* Don't move a reg that has an explicit clobber.
2906 It's not worth the pain to try to do it correctly. */
2907 may_not_move
[REGNO (XEXP (x
, 0))] = 1;
2909 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2911 dest
= SET_DEST (x
);
2912 while (GET_CODE (dest
) == SUBREG
2913 || GET_CODE (dest
) == ZERO_EXTRACT
2914 || GET_CODE (dest
) == SIGN_EXTRACT
2915 || GET_CODE (dest
) == STRICT_LOW_PART
)
2916 dest
= XEXP (dest
, 0);
2917 if (GET_CODE (dest
) == REG
)
2919 register int regno
= REGNO (dest
);
2920 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
2921 may_not_move
[regno
] = 1;
2922 if (last_set
[regno
] != 0
2923 && reg_used_between_p (dest
, last_set
[regno
], insn
))
2924 may_not_move
[regno
] = 1;
2925 if (n_times_set
[regno
] < 127)
2926 ++n_times_set
[regno
];
2927 last_set
[regno
] = insn
;
2933 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
2934 bzero (last_set
, nregs
* sizeof (rtx
));
2939 /* Given a loop that is bounded by LOOP_START and LOOP_END
2940 and that is entered at SCAN_START,
2941 return 1 if the register set in SET contained in insn INSN is used by
2942 any insn that precedes INSN in cyclic order starting
2943 from the loop entry point.
2945 We don't want to use INSN_LUID here because if we restrict INSN to those
2946 that have a valid INSN_LUID, it means we cannot move an invariant out
2947 from an inner loop past two loops. */
2950 loop_reg_used_before_p (set
, insn
, loop_start
, scan_start
, loop_end
)
2951 rtx set
, insn
, loop_start
, scan_start
, loop_end
;
2953 rtx reg
= SET_DEST (set
);
2956 /* Scan forward checking for register usage. If we hit INSN, we
2957 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
2958 for (p
= scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
2960 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
2961 && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
2971 /* A "basic induction variable" or biv is a pseudo reg that is set
2972 (within this loop) only by incrementing or decrementing it. */
2973 /* A "general induction variable" or giv is a pseudo reg whose
2974 value is a linear function of a biv. */
2976 /* Bivs are recognized by `basic_induction_var';
2977 Givs by `general_induct_var'. */
2979 /* Indexed by register number, indicates whether or not register is an
2980 induction variable, and if so what type. */
2982 enum iv_mode
*reg_iv_type
;
2984 /* Indexed by register number, contains pointer to `struct induction'
2985 if register is an induction variable. This holds general info for
2986 all induction variables. */
2988 struct induction
**reg_iv_info
;
2990 /* Indexed by register number, contains pointer to `struct iv_class'
2991 if register is a basic induction variable. This holds info describing
2992 the class (a related group) of induction variables that the biv belongs
2995 struct iv_class
**reg_biv_class
;
2997 /* The head of a list which links together (via the next field)
2998 every iv class for the current loop. */
3000 struct iv_class
*loop_iv_list
;
3002 /* Communication with routines called via `note_stores'. */
3004 static rtx note_insn
;
3006 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3008 static rtx addr_placeholder
;
3010 /* ??? Unfinished optimizations, and possible future optimizations,
3011 for the strength reduction code. */
3013 /* ??? There is one more optimization you might be interested in doing: to
3014 allocate pseudo registers for frequently-accessed memory locations.
3015 If the same memory location is referenced each time around, it might
3016 be possible to copy it into a register before and out after.
3017 This is especially useful when the memory location is a variable which
3018 is in a stack slot because somewhere its address is taken. If the
3019 loop doesn't contain a function call and the variable isn't volatile,
3020 it is safe to keep the value in a register for the duration of the
3021 loop. One tricky thing is that the copying of the value back from the
3022 register has to be done on all exits from the loop. You need to check that
3023 all the exits from the loop go to the same place. */
3025 /* ??? The interaction of biv elimination, and recognition of 'constant'
3026 bivs, may cause problems. */
3028 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3029 performance problems.
3031 Perhaps don't eliminate things that can be combined with an addressing
3032 mode. Find all givs that have the same biv, mult_val, and add_val;
3033 then for each giv, check to see if its only use dies in a following
3034 memory address. If so, generate a new memory address and check to see
3035 if it is valid. If it is valid, then store the modified memory address,
3036 otherwise, mark the giv as not done so that it will get its own iv. */
3038 /* ??? Could try to optimize branches when it is known that a biv is always
3041 /* ??? When replace a biv in a compare insn, we should replace with closest
3042 giv so that an optimized branch can still be recognized by the combiner,
3043 e.g. the VAX acb insn. */
3045 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3046 was rerun in loop_optimize whenever a register was added or moved.
3047 Also, some of the optimizations could be a little less conservative. */
3049 /* Perform strength reduction and induction variable elimination. */
3051 /* Pseudo registers created during this function will be beyond the last
3052 valid index in several tables including n_times_set and regno_last_uid.
3053 This does not cause a problem here, because the added registers cannot be
3054 givs outside of their loop, and hence will never be reconsidered.
3055 But scan_loop must check regnos to make sure they are in bounds. */
3058 strength_reduce (scan_start
, end
, loop_top
, insn_count
,
3059 loop_start
, loop_end
)
3072 /* This is 1 if current insn is not executed at least once for every loop
3074 int not_every_iteration
= 0;
3075 /* This is 1 if current insn may be executed more than once for every
3077 int maybe_multiple
= 0;
3078 /* Temporary list pointers for traversing loop_iv_list. */
3079 struct iv_class
*bl
, **backbl
;
3080 /* Ratio of extra register life span we can justify
3081 for saving an instruction. More if loop doesn't call subroutines
3082 since in that case saving an insn makes more difference
3083 and more registers are available. */
3084 /* ??? could set this to last value of threshold in move_movables */
3085 int threshold
= (loop_has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
3086 /* Map of pseudo-register replacements. */
3090 rtx end_insert_before
;
3092 reg_iv_type
= (enum iv_mode
*) alloca (max_reg_before_loop
3093 * sizeof (enum iv_mode
*));
3094 bzero ((char *) reg_iv_type
, max_reg_before_loop
* sizeof (enum iv_mode
*));
3095 reg_iv_info
= (struct induction
**)
3096 alloca (max_reg_before_loop
* sizeof (struct induction
*));
3097 bzero ((char *) reg_iv_info
, (max_reg_before_loop
3098 * sizeof (struct induction
*)));
3099 reg_biv_class
= (struct iv_class
**)
3100 alloca (max_reg_before_loop
* sizeof (struct iv_class
*));
3101 bzero ((char *) reg_biv_class
, (max_reg_before_loop
3102 * sizeof (struct iv_class
*)));
3105 addr_placeholder
= gen_reg_rtx (Pmode
);
3107 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3108 must be put before this insn, so that they will appear in the right
3109 order (i.e. loop order). */
3111 end_insert_before
= NEXT_INSN (loop_end
);
3113 /* Scan through loop to find all possible bivs. */
3119 /* At end of a straight-in loop, we are done.
3120 At end of a loop entered at the bottom, scan the top. */
3121 if (p
== scan_start
)
3126 p
= NEXT_INSN (loop_top
);
3129 if (p
== scan_start
)
3133 if (GET_CODE (p
) == INSN
3134 && (set
= single_set (p
))
3135 && GET_CODE (SET_DEST (set
)) == REG
)
3137 dest_reg
= SET_DEST (set
);
3138 if (REGNO (dest_reg
) < max_reg_before_loop
3139 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
3140 && reg_iv_type
[REGNO (dest_reg
)] != NOT_BASIC_INDUCT
)
3142 if (basic_induction_var (SET_SRC (set
), dest_reg
,
3143 &inc_val
, &mult_val
))
3145 /* It is a possible basic induction variable.
3146 Create and initialize an induction structure for it. */
3149 = (struct induction
*) alloca (sizeof (struct induction
));
3151 record_biv (v
, p
, dest_reg
, inc_val
, mult_val
,
3152 not_every_iteration
, maybe_multiple
);
3153 reg_iv_type
[REGNO (dest_reg
)] = BASIC_INDUCT
;
3155 else if (REGNO (dest_reg
) < max_reg_before_loop
)
3156 reg_iv_type
[REGNO (dest_reg
)] = NOT_BASIC_INDUCT
;
3160 /* Past CODE_LABEL, we get to insns that may be executed multiple
3161 times. The only way we can be sure that they can't is if every
3162 every jump insn between here and the end of the loop either
3163 returns, exits the loop, or is a forward jump. */
3165 if (GET_CODE (p
) == CODE_LABEL
)
3173 insn
= NEXT_INSN (insn
);
3174 if (insn
== scan_start
)
3179 insn
= NEXT_INSN (loop_top
);
3182 if (insn
== scan_start
)
3186 if (GET_CODE (insn
) == JUMP_INSN
3187 && GET_CODE (PATTERN (insn
)) != RETURN
3188 && (! condjump_p (insn
)
3189 || (JUMP_LABEL (insn
) != 0
3190 && (INSN_UID (JUMP_LABEL (insn
)) >= max_uid_for_loop
3191 || INSN_UID (insn
) >= max_uid_for_loop
3192 || (INSN_LUID (JUMP_LABEL (insn
))
3193 < INSN_LUID (insn
))))))
3201 /* Past a label or a jump, we get to insns for which we can't count
3202 on whether or how many times they will be executed during each
3204 /* This code appears in three places, once in scan_loop, and twice
3205 in strength_reduce. */
3206 if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
3207 /* If we enter the loop in the middle, and scan around to the
3208 beginning, don't set not_every_iteration for that.
3209 This can be any kind of jump, since we want to know if insns
3210 will be executed if the loop is executed. */
3211 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
3212 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3213 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3214 not_every_iteration
= 1;
3216 /* At the virtual top of a converted loop, insns are again known to
3217 be executed each iteration: logically, the loop begins here
3218 even though the exit code has been duplicated. */
3220 else if (GET_CODE (p
) == NOTE
3221 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
)
3222 not_every_iteration
= 0;
3224 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3225 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3226 or not an insn is known to be executed each iteration of the
3227 loop, whether or not any iterations are known to occur.
3229 Therefore, if we have just passed a label and have no more labels
3230 between here and the test insn of the loop, we know these insns
3231 will be executed each iteration. This can also happen if we
3232 have just passed a jump, for example, when there are nested loops. */
3234 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3235 && no_labels_between_p (p
, loop_end
))
3236 not_every_iteration
= 0;
3239 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3240 Make a sanity check against n_times_set. */
3241 for (backbl
= &loop_iv_list
, bl
= *backbl
; bl
; bl
= bl
->next
)
3243 if (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3244 /* Above happens if register modified by subreg, etc. */
3245 /* Make sure it is not recognized as a basic induction var: */
3246 || n_times_set
[bl
->regno
] != bl
->biv_count
3247 /* If never incremented, it is invariant that we decided not to
3248 move. So leave it alone. */
3249 || ! bl
->incremented
)
3251 if (loop_dump_stream
)
3252 fprintf (loop_dump_stream
, "Reg %d: biv discarded, %s\n",
3254 (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3255 ? "not induction variable"
3256 : (! bl
->incremented
? "never incremented"
3259 reg_iv_type
[bl
->regno
] = NOT_BASIC_INDUCT
;
3266 if (loop_dump_stream
)
3267 fprintf (loop_dump_stream
, "Reg %d: biv verified\n", bl
->regno
);
3271 /* Exit if there are no bivs. */
3274 /* Can still unroll the loop anyways, but indicate that there is no
3275 strength reduction info available. */
3276 if (flag_unroll_loops
)
3277 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 0);
3282 /* Find initial value for each biv by searching backwards from loop_start,
3283 halting at first label. Also record any test condition. */
3286 for (p
= loop_start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
3290 if (GET_CODE (p
) == CALL_INSN
)
3293 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3294 || GET_CODE (p
) == CALL_INSN
)
3295 note_stores (PATTERN (p
), record_initial
);
3297 /* Record any test of a biv that branches around the loop if no store
3298 between it and the start of loop. We only care about tests with
3299 constants and registers and only certain of those. */
3300 if (GET_CODE (p
) == JUMP_INSN
3301 && JUMP_LABEL (p
) != 0
3302 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop_end
)
3303 && (test
= get_condition_for_loop (p
)) != 0
3304 && GET_CODE (XEXP (test
, 0)) == REG
3305 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
3306 && (bl
= reg_biv_class
[REGNO (XEXP (test
, 0))]) != 0
3307 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop_start
)
3308 && bl
->init_insn
== 0)
3310 /* If an NE test, we have an initial value! */
3311 if (GET_CODE (test
) == NE
)
3314 bl
->init_set
= gen_rtx (SET
, VOIDmode
,
3315 XEXP (test
, 0), XEXP (test
, 1));
3318 bl
->initial_test
= test
;
3322 /* Look at the each biv and see if we can say anything better about its
3323 initial value from any initializing insns set up above. (This is done
3324 in two passes to avoid missing SETs in a PARALLEL.) */
3325 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3329 if (! bl
->init_insn
)
3332 src
= SET_SRC (bl
->init_set
);
3334 if (loop_dump_stream
)
3335 fprintf (loop_dump_stream
,
3336 "Biv %d initialized at insn %d: initial value ",
3337 bl
->regno
, INSN_UID (bl
->init_insn
));
3339 if (valid_initial_value_p (src
, bl
->init_insn
, call_seen
, loop_start
))
3341 bl
->initial_value
= src
;
3343 if (loop_dump_stream
)
3345 if (GET_CODE (src
) == CONST_INT
)
3346 fprintf (loop_dump_stream
, "%d\n", INTVAL (src
));
3349 print_rtl (loop_dump_stream
, src
);
3350 fprintf (loop_dump_stream
, "\n");
3356 /* Biv initial value is not simple move,
3357 so let it keep initial value of "itself". */
3359 if (loop_dump_stream
)
3360 fprintf (loop_dump_stream
, "is complex\n");
3364 /* Search the loop for general induction variables. */
3366 /* A register is a giv if: it is only set once, it is a function of a
3367 biv and a constant (or invariant), and it is not a biv. */
3369 not_every_iteration
= 0;
3374 /* At end of a straight-in loop, we are done.
3375 At end of a loop entered at the bottom, scan the top. */
3376 if (p
== scan_start
)
3381 p
= NEXT_INSN (loop_top
);
3384 if (p
== scan_start
)
3388 /* Look for a general induction variable in a register. */
3389 if (GET_CODE (p
) == INSN
3390 && (set
= single_set (p
))
3391 && GET_CODE (SET_DEST (set
)) == REG
3392 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
3400 dest_reg
= SET_DEST (set
);
3401 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
3404 if (/* SET_SRC is a giv. */
3405 ((benefit
= general_induction_var (SET_SRC (set
),
3408 /* Equivalent expression is a giv. */
3409 || ((regnote
= find_reg_note (p
, REG_EQUAL
, 0))
3410 && (benefit
= general_induction_var (XEXP (regnote
, 0),
3412 &add_val
, &mult_val
))))
3413 /* Don't try to handle any regs made by loop optimization.
3414 We have nothing on them in regno_first_uid, etc. */
3415 && REGNO (dest_reg
) < max_reg_before_loop
3416 /* Don't recognize a BASIC_INDUCT_VAR here. */
3417 && dest_reg
!= src_reg
3418 /* This must be the only place where the register is set. */
3419 && (n_times_set
[REGNO (dest_reg
)] == 1
3420 /* or all sets must be consecutive and make a giv. */
3421 || (benefit
= consec_sets_giv (benefit
, p
,
3423 &add_val
, &mult_val
))))
3427 = (struct induction
*) alloca (sizeof (struct induction
));
3430 /* If this is a library call, increase benefit. */
3431 if (find_reg_note (p
, REG_RETVAL
, 0))
3432 benefit
+= libcall_benefit (p
);
3434 /* Skip the consecutive insns, if there are any. */
3435 for (count
= n_times_set
[REGNO (dest_reg
)] - 1;
3438 /* If first insn of libcall sequence, skip to end.
3439 Do this at start of loop, since INSN is guaranteed to
3441 if (GET_CODE (p
) != NOTE
3442 && (temp
= find_reg_note (p
, REG_LIBCALL
, 0)))
3445 do p
= NEXT_INSN (p
);
3446 while (GET_CODE (p
) == NOTE
);
3449 record_giv (v
, p
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
3450 DEST_REG
, not_every_iteration
, 0, loop_start
,
3456 #ifndef DONT_REDUCE_ADDR
3457 /* Look for givs which are memory addresses. */
3458 /* This resulted in worse code on a VAX 8600. I wonder if it
3460 if (GET_CODE (p
) == INSN
)
3461 find_mem_givs (PATTERN (p
), p
, not_every_iteration
, loop_start
,
3465 /* Update the status of whether giv can derive other givs. This can
3466 change when we pass a label or an insn that updates a biv. */
3467 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3468 || GET_CODE (p
) == CODE_LABEL
)
3469 update_giv_derive (p
);
3471 /* Past a label or a jump, we get to insns for which we can't count
3472 on whether or how many times they will be executed during each
3474 /* This code appears in three places, once in scan_loop, and twice
3475 in strength_reduce. */
3476 if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
3477 /* If we enter the loop in the middle, and scan around
3478 to the beginning, don't set not_every_iteration for that.
3479 This can be any kind of jump, since we want to know if insns
3480 will be executed if the loop is executed. */
3481 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
3482 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3483 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3484 not_every_iteration
= 1;
3486 /* At the virtual top of a converted loop, insns are again known to
3487 be executed each iteration: logically, the loop begins here
3488 even though the exit code has been duplicated. */
3490 else if (GET_CODE (p
) == NOTE
3491 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
)
3492 not_every_iteration
= 0;
3494 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3495 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3496 or not an insn is known to be executed each iteration of the
3497 loop, whether or not any iterations are known to occur.
3499 Therefore, if we have just passed a label and have no more labels
3500 between here and the test insn of the loop, we know these insns
3501 will be executed each iteration. */
3503 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3504 && no_labels_between_p (p
, loop_end
))
3505 not_every_iteration
= 0;
3508 /* Try to calculate and save the number of loop iterations. This is
3509 set to zero if the actual number can not be calculated. This must
3510 be called after all giv's have been identified, since otherwise it may
3511 fail if the iteration variable is a giv. */
3513 loop_n_iterations
= loop_iterations (loop_start
, loop_end
);
3515 /* Now for each giv for which we still don't know whether or not it is
3516 replaceable, check to see if it is replaceable because its final value
3517 can be calculated. This must be done after loop_iterations is called,
3518 so that final_giv_value will work correctly. */
3520 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3522 struct induction
*v
;
3524 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3525 if (! v
->replaceable
&& ! v
->not_replaceable
)
3526 check_final_value (v
, loop_start
, loop_end
);
3529 /* Try to prove that the loop counter variable (if any) is always
3530 nonnegative; if so, record that fact with a REG_NONNEG note
3531 so that "decrement and branch until zero" insn can be used. */
3532 check_dbra_loop (loop_end
, insn_count
, loop_start
);
3534 /* Create reg_map to hold substitutions for replaceable giv regs. */
3535 reg_map
= (rtx
*) alloca (max_reg_before_loop
* sizeof (rtx
));
3536 bzero ((char *) reg_map
, max_reg_before_loop
* sizeof (rtx
));
3538 /* Examine each iv class for feasibility of strength reduction/induction
3539 variable elimination. */
3541 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3543 struct induction
*v
;
3546 rtx final_value
= 0;
3548 /* Test whether it will be possible to eliminate this biv
3549 provided all givs are reduced. This is possible if either
3550 the reg is not used outside the loop, or we can compute
3551 what its final value will be.
3553 For architectures with a decrement_and_branch_until_zero insn,
3554 don't do this if we put a REG_NONNEG note on the endtest for
3557 /* Compare against bl->init_insn rather than loop_start.
3558 We aren't concerned with any uses of the biv between
3559 init_insn and loop_start since these won't be affected
3560 by the value of the biv elsewhere in the function, so
3561 long as init_insn doesn't use the biv itself.
3562 March 14, 1989 -- self@bayes.arc.nasa.gov */
3564 if ((uid_luid
[regno_last_uid
[bl
->regno
]] < INSN_LUID (loop_end
)
3566 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
3567 && uid_luid
[regno_first_uid
[bl
->regno
]] >= INSN_LUID (bl
->init_insn
)
3568 #ifdef HAVE_decrement_and_branch_until_zero
3571 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
3572 || ((final_value
= final_biv_value (bl
, loop_start
, loop_end
))
3573 #ifdef HAVE_decrement_and_branch_until_zero
3577 bl
->eliminable
= maybe_eliminate_biv (bl
, loop_start
, end
, 0,
3578 threshold
, insn_count
);
3581 if (loop_dump_stream
)
3583 fprintf (loop_dump_stream
,
3584 "Cannot eliminate biv %d.\n",
3586 fprintf (loop_dump_stream
,
3587 "First use: insn %d, last use: insn %d.\n",
3588 regno_first_uid
[bl
->regno
],
3589 regno_last_uid
[bl
->regno
]);
3593 /* Combine all giv's for this iv_class. */
3596 /* This will be true at the end, if all givs which depend on this
3597 biv have been strength reduced.
3598 We can't (currently) eliminate the biv unless this is so. */
3601 /* Check each giv in this class to see if we will benefit by reducing
3602 it. Skip giv's combined with others. */
3603 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3605 struct induction
*tv
;
3607 if (v
->ignore
|| v
->same
)
3610 benefit
= v
->benefit
;
3612 /* Reduce benefit if not replaceable, since we will insert
3613 a move-insn to replace the insn that calculates this giv.
3614 Don't do this unless the giv is a user variable, since it
3615 will often be marked non-replaceable because of the duplication
3616 of the exit code outside the loop. In such a case, the copies
3617 we insert are dead and will be deleted. So they don't have
3618 a cost. Similar situations exist. */
3619 /* ??? The new final_[bg]iv_value code does a much better job
3620 of finding replaceable giv's, and hence this code may no longer
3622 if (! v
->replaceable
&& ! bl
->eliminable
3623 && REG_USERVAR_P (v
->dest_reg
))
3624 benefit
-= copy_cost
;
3626 /* Decrease the benefit to count the add-insns that we will
3627 insert to increment the reduced reg for the giv. */
3628 benefit
-= add_cost
* bl
->biv_count
;
3630 /* Decide whether to strength-reduce this giv or to leave the code
3631 unchanged (recompute it from the biv each time it is used).
3632 This decision can be made independently for each giv. */
3634 /* ??? Perhaps attempt to guess whether autoincrement will handle
3635 some of the new add insns; if so, can increase BENEFIT
3636 (undo the subtraction of add_cost that was done above). */
3638 /* If an insn is not to be strength reduced, then set its ignore
3639 flag, and clear all_reduced. */
3641 if (v
->lifetime
* threshold
* benefit
< insn_count
)
3643 if (loop_dump_stream
)
3644 fprintf (loop_dump_stream
,
3645 "giv of insn %d not worth while, %d vs %d.\n",
3647 v
->lifetime
* threshold
* benefit
, insn_count
);
3653 /* Check that we can increment the reduced giv without a
3654 multiply insn. If not, reject it. */
3656 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
3657 if (tv
->mult_val
== const1_rtx
3658 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
3660 if (loop_dump_stream
)
3661 fprintf (loop_dump_stream
,
3662 "giv of insn %d: would need a multiply.\n",
3663 INSN_UID (v
->insn
));
3671 /* Reduce each giv that we decided to reduce. */
3673 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3675 struct induction
*tv
;
3676 if (! v
->ignore
&& v
->same
== 0)
3678 v
->new_reg
= gen_reg_rtx (v
->mode
);
3680 /* For each place where the biv is incremented,
3681 add an insn to increment the new, reduced reg for the giv. */
3682 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
3684 if (tv
->mult_val
== const1_rtx
)
3685 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
3686 v
->new_reg
, v
->new_reg
, tv
->insn
);
3687 else /* tv->mult_val == const0_rtx */
3688 /* A multiply is acceptable here
3689 since this is presumed to be seldom executed. */
3690 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
3691 v
->add_val
, v
->new_reg
, tv
->insn
);
3694 /* Add code at loop start to initialize giv's reduced reg. */
3696 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
3697 v
->add_val
, v
->new_reg
, loop_start
);
3701 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
3704 For each giv register that can be reduced now: if replaceable,
3705 substitute reduced reg wherever the old giv occurs;
3706 else add new move insn "giv_reg = reduced_reg".
3708 Also check for givs whose first use is their definition and whose
3709 last use is the definition of another giv. If so, it is likely
3710 dead and should not be used to eliminate a biv. */
3711 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3713 if (v
->same
&& v
->same
->ignore
)
3719 if (v
->giv_type
== DEST_REG
3720 && regno_first_uid
[REGNO (v
->dest_reg
)] == INSN_UID (v
->insn
))
3722 struct induction
*v1
;
3724 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
3725 if (regno_last_uid
[REGNO (v
->dest_reg
)] == INSN_UID (v1
->insn
))
3729 /* Update expression if this was combined, in case other giv was
3732 v
->new_reg
= replace_rtx (v
->new_reg
,
3733 v
->same
->dest_reg
, v
->same
->new_reg
);
3735 if (v
->giv_type
== DEST_ADDR
)
3736 /* Store reduced reg as the address in the memref where we found
3738 *v
->location
= v
->new_reg
;
3739 else if (v
->replaceable
)
3741 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
3744 /* I can no longer duplicate the original problem. Perhaps
3745 this is unnecessary now? */
3747 /* Replaceable; it isn't strictly necessary to delete the old
3748 insn and emit a new one, because v->dest_reg is now dead.
3750 However, especially when unrolling loops, the special
3751 handling for (set REG0 REG1) in the second cse pass may
3752 make v->dest_reg live again. To avoid this problem, emit
3753 an insn to set the original giv reg from the reduced giv.
3754 We can not delete the original insn, since it may be part
3755 of a LIBCALL, and the code in flow that eliminates dead
3756 libcalls will fail if it is deleted. */
3757 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
3763 /* Not replaceable; emit an insn to set the original giv reg from
3764 the reduced giv, same as above. */
3765 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
3769 /* When a loop is reversed, givs which depend on the reversed
3770 biv, and which are live outside the loop, must be set to their
3771 correct final value. This insn is only needed if the giv is
3772 not replaceable. The correct final value is the same as the
3773 value that the giv starts the reversed loop with. */
3774 if (bl
->reversed
&& ! v
->replaceable
)
3775 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
3776 v
->add_val
, v
->dest_reg
, end_insert_before
);
3777 else if (v
->final_value
)
3781 /* If the loop has multiple exits, emit the insn before the
3782 loop to ensure that it will always be executed no matter
3783 how the loop exits. Otherwise, emit the insn after the loop,
3784 since this is slightly more efficient. */
3785 if (loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]])
3786 insert_before
= loop_start
;
3788 insert_before
= end_insert_before
;
3789 emit_insn_before (gen_move_insn (v
->dest_reg
, v
->final_value
),
3793 /* If the insn to set the final value of the giv was emitted
3794 before the loop, then we must delete the insn inside the loop
3795 that sets it. If this is a LIBCALL, then we must delete
3796 every insn in the libcall. Note, however, that
3797 final_giv_value will only succeed when there are multiple
3798 exits if the giv is dead at each exit, hence it does not
3799 matter that the original insn remains because it is dead
3801 /* Delete the insn inside the loop that sets the giv since
3802 the giv is now set before (or after) the loop. */
3803 delete_insn (v
->insn
);
3807 if (loop_dump_stream
)
3809 fprintf (loop_dump_stream
, "giv at %d reduced to ",
3810 INSN_UID (v
->insn
));
3811 print_rtl (loop_dump_stream
, v
->new_reg
);
3812 fprintf (loop_dump_stream
, "\n");
3816 /* All the givs based on the biv bl have been reduced if they
3819 /* For each giv not marked as maybe dead that has been combined with a
3820 second giv, clear any "maybe dead" mark on that second giv.
3821 v->new_reg will either be or refer to the register of the giv it
3824 Doing this clearing avoids problems in biv elimination where a
3825 giv's new_reg is a complex value that can't be put in the insn but
3826 the giv combined with (with a reg as new_reg) is marked maybe_dead.
3827 Since the register will be used in either case, we'd prefer it be
3828 used from the simpler giv. */
3830 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3831 if (! v
->maybe_dead
&& v
->same
)
3832 v
->same
->maybe_dead
= 0;
3834 /* Try to eliminate the biv, if it is a candidate.
3835 This won't work if ! all_reduced,
3836 since the givs we planned to use might not have been reduced.
3838 We have to be careful that we didn't initially think we could eliminate
3839 this biv because of a giv that we now think may be dead and shouldn't
3840 be used as a biv replacement.
3842 Also, there is the possibility that we may have a giv that looks
3843 like it can be used to eliminate a biv, but the resulting insn
3844 isn't valid. This can happen, for example, on the 88k, where a
3845 JUMP_INSN can compare a register only with zero. Attempts to
3846 replace it with a compare with a constant will fail.
3848 Note that in cases where this call fails, we may have replaced some
3849 of the occurrences of the biv with a giv, but no harm was done in
3850 doing so in the rare cases where it can occur. */
3852 if (all_reduced
== 1 && bl
->eliminable
3853 && maybe_eliminate_biv (bl
, loop_start
, end
, 1,
3854 threshold
, insn_count
))
3857 /* ?? If we created a new test to bypass the loop entirely,
3858 or otherwise drop straight in, based on this test, then
3859 we might want to rewrite it also. This way some later
3860 pass has more hope of removing the initialization of this
3863 /* If final_value != 0, then the biv may be used after loop end
3864 and we must emit an insn to set it just in case.
3866 Reversed bivs already have an insn after the loop setting their
3867 value, so we don't need another one. We can't calculate the
3868 proper final value for such a biv here anyways. */
3869 if (final_value
!= 0 && ! bl
->reversed
)
3873 /* If the loop has multiple exits, emit the insn before the
3874 loop to ensure that it will always be executed no matter
3875 how the loop exits. Otherwise, emit the insn after the
3876 loop, since this is slightly more efficient. */
3877 if (loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]])
3878 insert_before
= loop_start
;
3880 insert_before
= end_insert_before
;
3882 emit_insn_before (gen_move_insn (bl
->biv
->dest_reg
, final_value
),
3887 /* Delete all of the instructions inside the loop which set
3888 the biv, as they are all dead. If is safe to delete them,
3889 because an insn setting a biv will never be part of a libcall. */
3890 /* However, deleting them will invalidate the regno_last_uid info,
3891 so keeping them around is more convenient. Final_biv_value
3892 will only succeed when there are multiple exits if the biv
3893 is dead at each exit, hence it does not matter that the original
3894 insn remains, because it is dead anyways. */
3895 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
3896 delete_insn (v
->insn
);
3899 if (loop_dump_stream
)
3900 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
3905 /* Go through all the instructions in the loop, making all the
3906 register substitutions scheduled in REG_MAP. */
3908 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
3909 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3910 || GET_CODE (p
) == CALL_INSN
)
3912 replace_regs (PATTERN (p
), reg_map
, max_reg_before_loop
, 0);
3913 replace_regs (REG_NOTES (p
), reg_map
, max_reg_before_loop
, 0);
3916 /* Unroll loops from within strength reduction so that we can use the
3917 induction variable information that strength_reduce has already
3920 if (flag_unroll_loops
)
3921 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 1);
3923 if (loop_dump_stream
)
3924 fprintf (loop_dump_stream
, "\n");
3927 /* Return 1 if X is a valid source for an initial value (or as value being
3928 compared against in an initial test).
3930 X must be either a register or constant and must not be clobbered between
3931 the current insn and the start of the loop.
3933 INSN is the insn containing X. */
3936 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
3945 /* Only consider pseudos we know about initialized in insns whose luids
3947 if (GET_CODE (x
) != REG
3948 || REGNO (x
) >= max_reg_before_loop
)
3951 /* Don't use call-clobbered registers across a call which clobbers it. On
3952 some machines, don't use any hard registers at all. */
3953 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
3954 #ifndef SMALL_REGISTER_CLASSES
3955 && call_used_regs
[REGNO (x
)] && call_seen
3960 /* Don't use registers that have been clobbered before the start of the
3962 if (reg_set_between_p (x
, insn
, loop_start
))
3968 /* Scan X for memory refs and check each memory address
3969 as a possible giv. INSN is the insn whose pattern X comes from.
3970 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
3971 every loop iteration. */
3974 find_mem_givs (x
, insn
, not_every_iteration
, loop_start
, loop_end
)
3977 int not_every_iteration
;
3978 rtx loop_start
, loop_end
;
3981 register enum rtx_code code
;
3987 code
= GET_CODE (x
);
4011 benefit
= general_induction_var (XEXP (x
, 0),
4012 &src_reg
, &add_val
, &mult_val
);
4014 /* Don't make a DEST_ADDR giv with mult_val == 1 && add_val == 0.
4015 Such a giv isn't useful. */
4016 if (benefit
> 0 && (mult_val
!= const1_rtx
|| add_val
!= const0_rtx
))
4018 /* Found one; record it. */
4020 = (struct induction
*) oballoc (sizeof (struct induction
));
4022 record_giv (v
, insn
, src_reg
, addr_placeholder
, mult_val
,
4023 add_val
, benefit
, DEST_ADDR
, not_every_iteration
,
4024 &XEXP (x
, 0), loop_start
, loop_end
);
4026 v
->mem_mode
= GET_MODE (x
);
4032 /* Recursively scan the subexpressions for other mem refs. */
4034 fmt
= GET_RTX_FORMAT (code
);
4035 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4037 find_mem_givs (XEXP (x
, i
), insn
, not_every_iteration
, loop_start
,
4039 else if (fmt
[i
] == 'E')
4040 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
4041 find_mem_givs (XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
4042 loop_start
, loop_end
);
4045 /* Fill in the data about one biv update.
4046 V is the `struct induction' in which we record the biv. (It is
4047 allocated by the caller, with alloca.)
4048 INSN is the insn that sets it.
4049 DEST_REG is the biv's reg.
4051 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4052 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4053 being set to INC_VAL.
4055 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4056 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4057 can be executed more than once per iteration. If MAYBE_MULTIPLE
4058 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4059 executed exactly once per iteration. */
4062 record_biv (v
, insn
, dest_reg
, inc_val
, mult_val
,
4063 not_every_iteration
, maybe_multiple
)
4064 struct induction
*v
;
4069 int not_every_iteration
;
4072 struct iv_class
*bl
;
4075 v
->src_reg
= dest_reg
;
4076 v
->dest_reg
= dest_reg
;
4077 v
->mult_val
= mult_val
;
4078 v
->add_val
= inc_val
;
4079 v
->mode
= GET_MODE (dest_reg
);
4080 v
->always_computable
= ! not_every_iteration
;
4081 v
->maybe_multiple
= maybe_multiple
;
4083 /* Add this to the reg's iv_class, creating a class
4084 if this is the first incrementation of the reg. */
4086 bl
= reg_biv_class
[REGNO (dest_reg
)];
4089 /* Create and initialize new iv_class. */
4091 bl
= (struct iv_class
*) oballoc (sizeof (struct iv_class
));
4093 bl
->regno
= REGNO (dest_reg
);
4099 /* Set initial value to the reg itself. */
4100 bl
->initial_value
= dest_reg
;
4101 /* We haven't seen the initializing insn yet */
4104 bl
->initial_test
= 0;
4105 bl
->incremented
= 0;
4110 /* Add this class to loop_iv_list. */
4111 bl
->next
= loop_iv_list
;
4114 /* Put it in the array of biv register classes. */
4115 reg_biv_class
[REGNO (dest_reg
)] = bl
;
4118 /* Update IV_CLASS entry for this biv. */
4119 v
->next_iv
= bl
->biv
;
4122 if (mult_val
== const1_rtx
)
4123 bl
->incremented
= 1;
4125 if (loop_dump_stream
)
4127 fprintf (loop_dump_stream
,
4128 "Insn %d: possible biv, reg %d,",
4129 INSN_UID (insn
), REGNO (dest_reg
));
4130 if (GET_CODE (inc_val
) == CONST_INT
)
4131 fprintf (loop_dump_stream
, " const = %d\n",
4135 fprintf (loop_dump_stream
, " const = ");
4136 print_rtl (loop_dump_stream
, inc_val
);
4137 fprintf (loop_dump_stream
, "\n");
4142 /* Fill in the data about one giv.
4143 V is the `struct induction' in which we record the giv. (It is
4144 allocated by the caller, with alloca.)
4145 INSN is the insn that sets it.
4146 BENEFIT estimates the savings from deleting this insn.
4147 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4148 into a register or is used as a memory address.
4150 SRC_REG is the biv reg which the giv is computed from.
4151 DEST_REG is the giv's reg (if the giv is stored in a reg).
4152 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4153 LOCATION points to the place where this giv's value appears in INSN. */
4156 record_giv (v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
4157 type
, not_every_iteration
, location
, loop_start
, loop_end
)
4158 struct induction
*v
;
4162 rtx mult_val
, add_val
;
4165 int not_every_iteration
;
4167 rtx loop_start
, loop_end
;
4169 struct induction
*b
;
4170 struct iv_class
*bl
;
4171 rtx set
= single_set (insn
);
4175 v
->src_reg
= src_reg
;
4177 v
->dest_reg
= dest_reg
;
4178 v
->mult_val
= mult_val
;
4179 v
->add_val
= add_val
;
4180 v
->benefit
= benefit
;
4181 v
->location
= location
;
4183 v
->combined_with
= 0;
4184 v
->maybe_multiple
= 0;
4186 v
->derive_adjustment
= 0;
4192 /* The v->always_computable field is used in update_giv_derive, to
4193 determine whether a giv can be used to derive another giv. For a
4194 DEST_REG giv, INSN computes a new value for the giv, so its value
4195 isn't computable if INSN insn't executed every iteration.
4196 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4197 it does not compute a new value. Hence the value is always computable
4198 regardless of whether INSN is executed each iteration. */
4200 if (type
== DEST_ADDR
)
4201 v
->always_computable
= 1;
4203 v
->always_computable
= ! not_every_iteration
;
4205 if (type
== DEST_ADDR
)
4207 v
->mode
= GET_MODE (*location
);
4211 else /* type == DEST_REG */
4213 v
->mode
= GET_MODE (SET_DEST (set
));
4215 v
->lifetime
= (uid_luid
[regno_last_uid
[REGNO (dest_reg
)]]
4216 - uid_luid
[regno_first_uid
[REGNO (dest_reg
)]]);
4218 v
->times_used
= n_times_used
[REGNO (dest_reg
)];
4220 /* If the lifetime is zero, it means that this register is
4221 really a dead store. So mark this as a giv that can be
4222 ignored. This will not prevent the biv from being eliminated. */
4223 if (v
->lifetime
== 0)
4226 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
4227 reg_iv_info
[REGNO (dest_reg
)] = v
;
4230 /* Add the giv to the class of givs computed from one biv. */
4232 bl
= reg_biv_class
[REGNO (src_reg
)];
4235 v
->next_iv
= bl
->giv
;
4237 /* Don't count DEST_ADDR. This is supposed to count the number of
4238 insns that calculate givs. */
4239 if (type
== DEST_REG
)
4241 bl
->total_benefit
+= benefit
;
4244 /* Fatal error, biv missing for this giv? */
4247 if (type
== DEST_ADDR
)
4251 /* The giv can be replaced outright by the reduced register only if all
4252 of the following conditions are true:
4253 - the insn that sets the giv is always executed on any iteration
4254 on which the giv is used at all
4255 (there are two ways to deduce this:
4256 either the insn is executed on every iteration,
4257 or all uses follow that insn in the same basic block),
4258 - the giv is not used outside the loop
4259 - no assignments to the biv occur during the giv's lifetime. */
4261 if (regno_first_uid
[REGNO (dest_reg
)] == INSN_UID (insn
)
4262 /* Previous line always fails if INSN was moved by loop opt. */
4263 && uid_luid
[regno_last_uid
[REGNO (dest_reg
)]] < INSN_LUID (loop_end
)
4264 && (! not_every_iteration
4265 || last_use_this_basic_block (dest_reg
, insn
)))
4267 /* Now check that there are no assignments to the biv within the
4268 giv's lifetime. This requires two separate checks. */
4270 /* Check each biv update, and fail if any are between the first
4271 and last use of the giv.
4273 If this loop contains an inner loop that was unrolled, then
4274 the insn modifying the biv may have been emitted by the loop
4275 unrolling code, and hence does not have a valid luid. Just
4276 mark the biv as not replaceable in this case. It is not very
4277 useful as a biv, because it is used in two different loops.
4278 It is very unlikely that we would be able to optimize the giv
4279 using this biv anyways. */
4282 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4284 if (INSN_UID (b
->insn
) >= max_uid_for_loop
4285 || ((uid_luid
[INSN_UID (b
->insn
)]
4286 >= uid_luid
[regno_first_uid
[REGNO (dest_reg
)]])
4287 && (uid_luid
[INSN_UID (b
->insn
)]
4288 <= uid_luid
[regno_last_uid
[REGNO (dest_reg
)]])))
4291 v
->not_replaceable
= 1;
4296 /* Check each insn between the first and last use of the giv,
4297 and fail if any of them are branches that jump to a named label
4298 outside this range, but still inside the loop. This catches
4299 cases of spaghetti code where the execution order of insns
4300 is not linear, and hence the above test fails. For example,
4301 in the following code, j is not replaceable:
4302 for (i = 0; i < 100; ) {
4303 L0: j = 4*i; goto L1;
4307 printf ("k = %d\n", k); }
4308 This test is conservative, but this test succeeds rarely enough
4309 that it isn't a problem. See also check_final_value below. */
4313 INSN_UID (p
) >= max_uid_for_loop
4314 || INSN_LUID (p
) < uid_luid
[regno_last_uid
[REGNO (dest_reg
)]];
4317 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
4318 && LABEL_NAME (JUMP_LABEL (p
))
4319 && ((INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop_start
)
4320 && (INSN_LUID (JUMP_LABEL (p
))
4321 < uid_luid
[regno_first_uid
[REGNO (dest_reg
)]]))
4322 || (INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop_end
)
4323 && (INSN_LUID (JUMP_LABEL (p
))
4324 > uid_luid
[regno_last_uid
[REGNO (dest_reg
)]]))))
4327 v
->not_replaceable
= 1;
4329 if (loop_dump_stream
)
4330 fprintf (loop_dump_stream
,
4331 "Found branch outside giv lifetime.\n");
4339 /* May still be replaceable, we don't have enough info here to
4342 v
->not_replaceable
= 0;
4346 if (loop_dump_stream
)
4348 if (type
== DEST_REG
)
4349 fprintf (loop_dump_stream
, "Insn %d: giv reg %d",
4350 INSN_UID (insn
), REGNO (dest_reg
));
4352 fprintf (loop_dump_stream
, "Insn %d: dest address",
4355 fprintf (loop_dump_stream
, " src reg %d benefit %d",
4356 REGNO (src_reg
), v
->benefit
);
4357 fprintf (loop_dump_stream
, " used %d lifetime %d",
4358 v
->times_used
, v
->lifetime
);
4361 fprintf (loop_dump_stream
, " replaceable");
4363 if (GET_CODE (mult_val
) == CONST_INT
)
4364 fprintf (loop_dump_stream
, " mult %d",
4368 fprintf (loop_dump_stream
, " mult ");
4369 print_rtl (loop_dump_stream
, mult_val
);
4372 if (GET_CODE (add_val
) == CONST_INT
)
4373 fprintf (loop_dump_stream
, " add %d",
4377 fprintf (loop_dump_stream
, " add ");
4378 print_rtl (loop_dump_stream
, add_val
);
4382 if (loop_dump_stream
)
4383 fprintf (loop_dump_stream
, "\n");
4388 /* All this does is determine whether a giv can be made replaceable because
4389 its final value can be calculated. This code can not be part of record_giv
4390 above, because final_giv_value requires that the number of loop iterations
4391 be known, and that can not be accurately calculated until after all givs
4392 have been identified. */
4395 check_final_value (v
, loop_start
, loop_end
)
4396 struct induction
*v
;
4397 rtx loop_start
, loop_end
;
4399 struct iv_class
*bl
;
4400 rtx final_value
= 0;
4403 bl
= reg_biv_class
[REGNO (v
->src_reg
)];
4405 /* DEST_ADDR givs will never reach here, because they are always marked
4406 replaceable above in record_giv. */
4408 /* The giv can be replaced outright by the reduced register only if all
4409 of the following conditions are true:
4410 - the insn that sets the giv is always executed on any iteration
4411 on which the giv is used at all
4412 (there are two ways to deduce this:
4413 either the insn is executed on every iteration,
4414 or all uses follow that insn in the same basic block),
4415 - its final value can be calculated (this condition is different
4416 than the one above in record_giv)
4417 - no assignments to the biv occur during the giv's lifetime. */
4420 /* This is only called now when replaceable is known to be false. */
4421 /* Clear replaceable, so that it won't confuse final_giv_value. */
4425 if ((final_value
= final_giv_value (v
, loop_start
, loop_end
))
4426 && (v
->always_computable
|| last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
4428 int biv_increment_seen
= 0;
4434 /* When trying to determine whether or not a biv increment occurs
4435 during the lifetime of the giv, we can ignore uses of the variable
4436 outside the loop because final_value is true. Hence we can not
4437 use regno_last_uid and regno_first_uid as above in record_giv. */
4439 /* Search the loop to determine whether any assignments to the
4440 biv occur during the giv's lifetime. Start with the insn
4441 that sets the giv, and search around the loop until we come
4442 back to that insn again.
4444 Also fail if there is a jump within the giv's lifetime that jumps
4445 to somewhere outside the lifetime but still within the loop. This
4446 catches spaghetti code where the execution order is not linear, and
4447 hence the above test fails. Here we assume that the giv lifetime
4448 does not extend from one iteration of the loop to the next, so as
4449 to make the test easier. Since the lifetime isn't known yet,
4450 this requires two loops. See also record_giv above. */
4452 last_giv_use
= v
->insn
;
4458 p
= NEXT_INSN (loop_start
);
4462 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4463 || GET_CODE (p
) == CALL_INSN
)
4465 if (biv_increment_seen
)
4467 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4470 v
->not_replaceable
= 1;
4474 else if (GET_CODE (PATTERN (p
)) == SET
4475 && SET_DEST (PATTERN (p
)) == v
->src_reg
)
4476 biv_increment_seen
= 1;
4477 else if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4482 /* Now that the lifetime of the giv is known, check for branches
4483 from within the lifetime to outside the lifetime if it is still
4493 p
= NEXT_INSN (loop_start
);
4494 if (p
== last_giv_use
)
4497 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
4498 && LABEL_NAME (JUMP_LABEL (p
))
4499 && ((INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (v
->insn
)
4500 && INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop_start
))
4501 || (INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (last_giv_use
)
4502 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop_end
))))
4505 v
->not_replaceable
= 1;
4507 if (loop_dump_stream
)
4508 fprintf (loop_dump_stream
,
4509 "Found branch outside giv lifetime.\n");
4516 /* If it is replaceable, then save the final value. */
4518 v
->final_value
= final_value
;
4521 if (loop_dump_stream
&& v
->replaceable
)
4522 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
4523 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
4526 /* Update the status of whether a giv can derive other givs.
4528 We need to do something special if there is or may be an update to the biv
4529 between the time the giv is defined and the time it is used to derive
4532 In addition, a giv that is only conditionally set is not allowed to
4533 derive another giv once a label has been passed.
4535 The cases we look at are when a label or an update to a biv is passed. */
4538 update_giv_derive (p
)
4541 struct iv_class
*bl
;
4542 struct induction
*biv
, *giv
;
4546 /* Search all IV classes, then all bivs, and finally all givs.
4548 There are three cases we are concerned with. First we have the situation
4549 of a giv that is only updated conditionally. In that case, it may not
4550 derive any givs after a label is passed.
4552 The second case is when a biv update occurs, or may occur, after the
4553 definition of a giv. For certain biv updates (see below) that are
4554 known to occur between the giv definition and use, we can adjust the
4555 giv definition. For others, or when the biv update is conditional,
4556 we must prevent the giv from deriving any other givs. There are two
4557 sub-cases within this case.
4559 If this is a label, we are concerned with any biv update that is done
4560 conditionally, since it may be done after the giv is defined followed by
4561 a branch here (actually, we need to pass both a jump and a label, but
4562 this extra tracking doesn't seem worth it).
4564 If this is a jump, we are concerned about any biv update that may be
4565 executed multiple times. We are actually only concerned about
4566 backward jumps, but it is probably not worth performing the test
4567 on the jump again here.
4569 If this is a biv update, we must adjust the giv status to show that a
4570 subsequent biv update was performed. If this adjustment cannot be done,
4571 the giv cannot derive further givs. */
4573 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
4574 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
4575 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
4578 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
4580 /* If cant_derive is already true, there is no point in
4581 checking all of these conditions again. */
4582 if (giv
->cant_derive
)
4585 /* If this giv is conditionally set and we have passed a label,
4586 it cannot derive anything. */
4587 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
4588 giv
->cant_derive
= 1;
4590 /* Skip givs that have mult_val == 0, since
4591 they are really invariants. Also skip those that are
4592 replaceable, since we know their lifetime doesn't contain
4594 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
4597 /* The only way we can allow this giv to derive another
4598 is if this is a biv increment and we can form the product
4599 of biv->add_val and giv->mult_val. In this case, we will
4600 be able to compute a compensation. */
4601 else if (biv
->insn
== p
)
4605 if (biv
->mult_val
== const1_rtx
)
4606 tem
= simplify_giv_expr (gen_rtx (MULT
, giv
->mode
,
4611 if (tem
&& giv
->derive_adjustment
)
4612 tem
= simplify_giv_expr (gen_rtx (PLUS
, giv
->mode
, tem
,
4613 giv
->derive_adjustment
),
4616 giv
->derive_adjustment
= tem
;
4618 giv
->cant_derive
= 1;
4620 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
4621 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
4622 giv
->cant_derive
= 1;
4627 /* Check whether an insn is an increment legitimate for a basic induction var.
4628 X is the source of the insn.
4629 DEST_REG is the putative biv, also the destination of the insn.
4630 We accept patterns of these forms:
4631 REG = REG + INVARIANT
4632 REG = INVARIANT + REG
4633 REG = REG - CONSTANT
4635 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
4636 and store the additive term into *INC_VAL.
4638 If X is an assignment of an invariant into DEST_REG, we set
4639 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
4641 Otherwise we return 0. */
4644 basic_induction_var (x
, dest_reg
, inc_val
, mult_val
)
4650 register enum rtx_code code
;
4653 code
= GET_CODE (x
);
4657 if (XEXP (x
, 0) == dest_reg
)
4659 else if (XEXP (x
, 1) == dest_reg
)
4664 if (invariant_p (arg
) != 1)
4668 *mult_val
= const1_rtx
;
4672 if (XEXP (x
, 0) == dest_reg
4673 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
4674 *inc_val
= gen_rtx (CONST_INT
, VOIDmode
,
4675 - INTVAL (XEXP (x
, 1)));
4679 *mult_val
= const1_rtx
;
4682 /* Can accept constant setting of biv only when inside inner most loop.
4683 Otherwise, a biv of an inner loop may be incorrectly recognized
4684 as a biv of the outer loop,
4685 causing code to be moved INTO the inner loop. */
4688 if (invariant_p (x
) != 1)
4693 if (loops_enclosed
== 1)
4696 *mult_val
= const0_rtx
;
4707 /* A general induction variable (giv) is any quantity that is a linear
4708 function of a basic induction variable,
4709 i.e. giv = biv * mult_val + add_val.
4710 The coefficients can be any loop invariant quantity.
4711 A giv need not be computed directly from the biv;
4712 it can be computed by way of other givs. */
4714 /* Determine whether X computes a giv.
4715 If it does, return a nonzero value
4716 which is the benefit from eliminating the computation of X;
4717 set *SRC_REG to the register of the biv that it is computed from;
4718 set *ADD_VAL and *MULT_VAL to the coefficients,
4719 such that the value of X is biv * mult + add; */
4722 general_induction_var (x
, src_reg
, add_val
, mult_val
)
4732 /* If this is an invariant, forget it, it isn't a giv. */
4733 if (invariant_p (x
) == 1)
4736 /* See if the expression could be a giv and get its form.
4737 Mark our place on the obstack in case we don't find a giv. */
4738 storage
= (char *) oballoc (0);
4739 x
= simplify_giv_expr (x
, &benefit
);
4746 switch (GET_CODE (x
))
4750 /* Since this is now an invariant and wasn't before, it must be a giv
4751 with MULT_VAL == 0. It doesn't matter which BIV we associate this
4753 *src_reg
= loop_iv_list
->biv
->dest_reg
;
4754 *mult_val
= const0_rtx
;
4759 /* This is equivalent to a BIV. */
4761 *mult_val
= const1_rtx
;
4762 *add_val
= const0_rtx
;
4766 /* Either (plus (biv) (invar)) or
4767 (plus (mult (biv) (invar_1)) (invar_2)). */
4768 if (GET_CODE (XEXP (x
, 0)) == MULT
)
4770 *src_reg
= XEXP (XEXP (x
, 0), 0);
4771 *mult_val
= XEXP (XEXP (x
, 0), 1);
4775 *src_reg
= XEXP (x
, 0);
4776 *mult_val
= const1_rtx
;
4778 *add_val
= XEXP (x
, 1);
4782 /* ADD_VAL is zero. */
4783 *src_reg
= XEXP (x
, 0);
4784 *mult_val
= XEXP (x
, 1);
4785 *add_val
= const0_rtx
;
4792 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
4793 unless they are CONST_INT). */
4794 if (GET_CODE (*add_val
) == USE
)
4795 *add_val
= XEXP (*add_val
, 0);
4796 if (GET_CODE (*mult_val
) == USE
)
4797 *mult_val
= XEXP (*mult_val
, 0);
4799 benefit
+= rtx_cost (orig_x
, SET
);
4801 /* Always return some benefit if this is a giv so it will be detected
4802 as such. This allows elimination of bivs that might otherwise
4803 not be eliminated. */
4804 return benefit
== 0 ? 1 : benefit
;
4807 /* Given an expression, X, try to form it as a linear function of a biv.
4808 We will canonicalize it to be of the form
4809 (plus (mult (BIV) (invar_1))
4811 with possible degeneracies.
4813 The invariant expressions must each be of a form that can be used as a
4814 machine operand. We surround then with a USE rtx (a hack, but localized
4815 and certainly unambiguous!) if not a CONST_INT for simplicity in this
4816 routine; it is the caller's responsibility to strip them.
4818 If no such canonicalization is possible (i.e., two biv's are used or an
4819 expression that is neither invariant nor a biv or giv), this routine
4822 For a non-zero return, the result will have a code of CONST_INT, USE,
4823 REG (for a BIV), PLUS, or MULT. No other codes will occur.
4825 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
4828 simplify_giv_expr (x
, benefit
)
4832 enum machine_mode mode
= GET_MODE (x
);
4836 /* If this is not an integer mode, or if we cannot do arithmetic in this
4837 mode, this can't be a giv. */
4838 if (mode
!= VOIDmode
4839 && (GET_MODE_CLASS (mode
) != MODE_INT
4840 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_INT
))
4843 switch (GET_CODE (x
))
4846 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
4847 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
4848 if (arg0
== 0 || arg1
== 0)
4851 /* Put constant last, CONST_INT last if both constant. */
4852 if ((GET_CODE (arg0
) == USE
4853 || GET_CODE (arg0
) == CONST_INT
)
4854 && GET_CODE (arg1
) != CONST_INT
)
4855 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
4857 /* Handle addition of zero, then addition of an invariant. */
4858 if (arg1
== const0_rtx
)
4860 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
4861 switch (GET_CODE (arg0
))
4865 /* Both invariant. Only valid if sum is machine operand.
4866 First strip off possible USE on first operand. */
4867 if (GET_CODE (arg0
) == USE
)
4868 arg0
= XEXP (arg0
, 0);
4871 if (CONSTANT_P (arg0
) && GET_CODE (arg1
) == CONST_INT
)
4873 tem
= plus_constant (arg0
, INTVAL (arg1
));
4874 if (GET_CODE (tem
) != CONST_INT
)
4875 tem
= gen_rtx (USE
, mode
, tem
);
4882 /* biv + invar or mult + invar. Return sum. */
4883 return gen_rtx (PLUS
, mode
, arg0
, arg1
);
4886 /* (a + invar_1) + invar_2. Associate. */
4887 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
4889 gen_rtx (PLUS
, mode
,
4890 XEXP (arg0
, 1), arg1
)),
4897 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
4898 MULT to reduce cases. */
4899 if (GET_CODE (arg0
) == REG
)
4900 arg0
= gen_rtx (MULT
, mode
, arg0
, const1_rtx
);
4901 if (GET_CODE (arg1
) == REG
)
4902 arg1
= gen_rtx (MULT
, mode
, arg1
, const1_rtx
);
4904 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
4905 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
4906 Recurse to associate the second PLUS. */
4907 if (GET_CODE (arg1
) == MULT
)
4908 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
4910 if (GET_CODE (arg1
) == PLUS
)
4911 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
4912 gen_rtx (PLUS
, mode
,
4913 arg0
, XEXP (arg1
, 0)),
4917 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
4918 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
4921 if (XEXP (arg0
, 0) != XEXP (arg1
, 0))
4924 return simplify_giv_expr (gen_rtx (MULT
, mode
,
4926 gen_rtx (PLUS
, mode
,
4932 /* Handle "a - b" as "a + b * (-1)". */
4933 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
4935 gen_rtx (MULT
, mode
,
4942 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
4943 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
4944 if (arg0
== 0 || arg1
== 0)
4947 /* Put constant last, CONST_INT last if both constant. */
4948 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
4949 && GET_CODE (arg1
) != CONST_INT
)
4950 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
4952 /* If second argument is not now constant, not giv. */
4953 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
4956 /* Handle multiply by 0 or 1. */
4957 if (arg1
== const0_rtx
)
4960 else if (arg1
== const1_rtx
)
4963 switch (GET_CODE (arg0
))
4966 /* biv * invar. Done. */
4967 return gen_rtx (MULT
, mode
, arg0
, arg1
);
4970 /* Product of two constants. */
4971 return gen_rtx (CONST_INT
, mode
, INTVAL (arg0
) * INTVAL (arg1
));
4974 /* invar * invar. Not giv. */
4978 /* (a * invar_1) * invar_2. Associate. */
4979 return simplify_giv_expr (gen_rtx (MULT
, mode
,
4981 gen_rtx (MULT
, mode
,
4982 XEXP (arg0
, 1), arg1
)),
4986 /* (a + invar_1) * invar_2. Distribute. */
4987 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
4988 gen_rtx (MULT
, mode
,
4989 XEXP (arg0
, 0), arg1
),
4990 gen_rtx (MULT
, mode
,
4991 XEXP (arg0
, 1), arg1
)),
5000 /* Shift by constant is multiply by power of two. */
5001 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
5004 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5006 gen_rtx (CONST_INT
, VOIDmode
,
5007 1 << INTVAL (XEXP (x
, 1)))),
5011 /* "-a" is "a * (-1)" */
5012 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5014 gen_rtx (CONST_INT
, VOIDmode
, -1)),
5018 /* "~a" is "-a - 1". Silly, but easy. */
5019 return simplify_giv_expr (gen_rtx (MINUS
, mode
,
5020 gen_rtx (NEG
, mode
, XEXP (x
, 0)),
5025 /* Already in proper form for invariant. */
5029 /* If this is a new register, we can't deal with it. */
5030 if (REGNO (x
) >= max_reg_before_loop
)
5033 /* Check for biv or giv. */
5034 switch (reg_iv_type
[REGNO (x
)])
5038 case GENERAL_INDUCT
:
5040 struct induction
*v
= reg_iv_info
[REGNO (x
)];
5042 /* Form expression from giv and add benefit. Ensure this giv
5043 can derive another and subtract any needed adjustment if so. */
5044 *benefit
+= v
->benefit
;
5048 tem
= gen_rtx (PLUS
, mode
, gen_rtx (MULT
, mode
,
5049 v
->src_reg
, v
->mult_val
),
5051 if (v
->derive_adjustment
)
5052 tem
= gen_rtx (MINUS
, mode
, tem
, v
->derive_adjustment
);
5053 return simplify_giv_expr (tem
, benefit
);
5057 /* Fall through to general case. */
5059 /* If invariant, return as USE (unless CONST_INT).
5060 Otherwise, not giv. */
5061 if (GET_CODE (x
) == USE
)
5064 if (invariant_p (x
) == 1)
5066 if (GET_CODE (x
) == CONST_INT
)
5069 return gen_rtx (USE
, mode
, x
);
5076 /* Help detect a giv that is calculated by several consecutive insns;
5080 The caller has already identified the first insn P as having a giv as dest;
5081 we check that all other insns that set the same register follow
5082 immediately after P, that they alter nothing else,
5083 and that the result of the last is still a giv.
5085 The value is 0 if the reg set in P is not really a giv.
5086 Otherwise, the value is the amount gained by eliminating
5087 all the consecutive insns that compute the value.
5089 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
5090 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
5092 The coefficients of the ultimate giv value are stored in
5093 *MULT_VAL and *ADD_VAL. */
5096 consec_sets_giv (first_benefit
, p
, src_reg
, dest_reg
,
5111 /* Indicate that this is a giv so that we can update the value produced in
5112 each insn of the multi-insn sequence.
5114 This induction structure will be used only by the call to
5115 general_induction_var below, so we can allocate it on our stack.
5116 If this is a giv, our caller will replace the induct var entry with
5117 a new induction structure. */
5119 = (struct induction
*) alloca (sizeof (struct induction
));
5120 v
->src_reg
= src_reg
;
5121 v
->mult_val
= *mult_val
;
5122 v
->add_val
= *add_val
;
5123 v
->benefit
= first_benefit
;
5125 v
->derive_adjustment
= 0;
5127 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
5128 reg_iv_info
[REGNO (dest_reg
)] = v
;
5130 count
= n_times_set
[REGNO (dest_reg
)] - 1;
5135 code
= GET_CODE (p
);
5137 /* If libcall, skip to end of call sequence. */
5138 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, 0)))
5142 && (set
= single_set (p
))
5143 && GET_CODE (SET_DEST (set
)) == REG
5144 && SET_DEST (set
) == dest_reg
5145 && ((benefit
= general_induction_var (SET_SRC (set
), &src_reg
,
5147 /* Giv created by equivalent expression. */
5148 || ((temp
= find_reg_note (p
, REG_EQUAL
, 0))
5149 && (benefit
= general_induction_var (XEXP (temp
, 0), &src_reg
,
5150 add_val
, mult_val
))))
5151 && src_reg
== v
->src_reg
)
5153 if (find_reg_note (p
, REG_RETVAL
, 0))
5154 benefit
+= libcall_benefit (p
);
5157 v
->mult_val
= *mult_val
;
5158 v
->add_val
= *add_val
;
5159 v
->benefit
= benefit
;
5161 else if (code
!= NOTE
)
5163 /* Allow insns that set something other than this giv to a
5164 constant. Such insns are needed on machines which cannot
5165 include long constants and should not disqualify a giv. */
5167 && (set
= single_set (p
))
5168 && SET_DEST (set
) != dest_reg
5169 && CONSTANT_P (SET_SRC (set
)))
5172 reg_iv_type
[REGNO (dest_reg
)] = UNKNOWN_INDUCT
;
5180 /* Return an rtx, if any, that expresses giv G2 as a function of the register
5181 represented by G1. If no such expression can be found, or it is clear that
5182 it cannot possibly be a valid address, 0 is returned.
5184 To perform the computation, we note that
5187 where `v' is the biv.
5189 So G2 = (c/a) * G1 + (d - b*c/a) */
5193 express_from (g1
, g2
)
5194 struct induction
*g1
, *g2
;
5198 /* The value that G1 will be multiplied by must be a constant integer. Also,
5199 the only chance we have of getting a valid address is if b*c/a (see above
5200 for notation) is also an integer. */
5201 if (GET_CODE (g1
->mult_val
) != CONST_INT
5202 || GET_CODE (g2
->mult_val
) != CONST_INT
5203 || GET_CODE (g1
->add_val
) != CONST_INT
5204 || g1
->mult_val
== const0_rtx
5205 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
5208 mult
= gen_rtx (CONST_INT
, VOIDmode
,
5209 INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
5210 add
= plus_constant (g2
->add_val
, - INTVAL (g1
->add_val
) * INTVAL (mult
));
5212 /* Form simplified final result. */
5213 if (mult
== const0_rtx
)
5215 else if (mult
== const1_rtx
)
5216 mult
= g1
->dest_reg
;
5218 mult
= gen_rtx (MULT
, g2
->mode
, g1
->dest_reg
, mult
);
5220 if (add
== const0_rtx
)
5223 return gen_rtx (PLUS
, g2
->mode
, mult
, add
);
5227 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
5228 (either directly or via an address expression) a register used to represent
5229 G1. Set g2->new_reg to a represtation of G1 (normally just
5233 combine_givs_p (g1
, g2
)
5234 struct induction
*g1
, *g2
;
5238 /* If these givs are identical, they can be combined. */
5239 if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
)
5240 && rtx_equal_p (g1
->add_val
, g2
->add_val
))
5242 g2
->new_reg
= g1
->dest_reg
;
5247 /* If G2 can be expressed as a function of G1 and that function is valid
5248 as an address and no more expensive than using a register for G2,
5249 the expression of G2 in terms of G1 can be used. */
5250 if (g2
->giv_type
== DEST_ADDR
5251 && (tem
= express_from (g1
, g2
)) != 0
5252 && memory_address_p (g2
->mem_mode
, tem
)
5253 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
))
5263 /* Check all pairs of givs for iv_class BL and see if any can be combined with
5264 any other. If so, point SAME to the giv combined with and set NEW_REG to
5265 be an expression (in terms of the other giv's DEST_REG) equivalent to the
5266 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
5270 struct iv_class
*bl
;
5272 struct induction
*g1
, *g2
;
5275 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5276 for (pass
= 0; pass
<= 1; pass
++)
5277 for (g2
= bl
->giv
; g2
; g2
= g2
->next_iv
)
5279 /* First try to combine with replaceable givs, then all givs. */
5280 && (g1
->replaceable
|| pass
== 1)
5281 /* If either has already been combined or is to be ignored, can't
5283 && ! g1
->ignore
&& ! g2
->ignore
&& ! g1
->same
&& ! g2
->same
5284 /* If something has been based on G2, G2 cannot itself be based
5285 on something else. */
5286 && ! g2
->combined_with
5287 && combine_givs_p (g1
, g2
))
5289 /* g2->new_reg set by `combine_givs_p' */
5291 g1
->combined_with
= 1;
5292 g1
->benefit
+= g2
->benefit
;
5293 /* ??? The new final_[bg]iv_value code does a much better job
5294 of finding replaceable giv's, and hence this code may no
5295 longer be necessary. */
5296 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
5297 g1
->benefit
-= copy_cost
;
5298 g1
->lifetime
+= g2
->lifetime
;
5299 g1
->times_used
+= g2
->times_used
;
5301 if (loop_dump_stream
)
5302 fprintf (loop_dump_stream
, "giv at %d combined with giv at %d\n",
5303 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
));
5307 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
5310 emit_iv_add_mult (b
, m
, a
, reg
, insert_before
)
5311 rtx b
; /* initial value of basic induction variable */
5312 rtx m
; /* multiplicative constant */
5313 rtx a
; /* additive constant */
5314 rtx reg
; /* destination register */
5320 /* Prevent unexpected sharing of these rtx. */
5324 /* Increase the lifetime of any invariants moved further in code. */
5325 update_reg_last_use (a
, insert_before
);
5326 update_reg_last_use (b
, insert_before
);
5327 update_reg_last_use (m
, insert_before
);
5330 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 0);
5332 emit_move_insn (reg
, result
);
5333 seq
= gen_sequence ();
5336 emit_insn_before (seq
, insert_before
);
5339 /* Test whether A * B can be computed without
5340 an actual multiply insn. Value is 1 if so. */
5343 product_cheap_p (a
, b
)
5349 struct obstack
*old_rtl_obstack
= rtl_obstack
;
5350 char *storage
= (char *) obstack_alloc (&temp_obstack
, 0);
5353 /* If only one is constant, make it B. */
5354 if (GET_CODE (a
) == CONST_INT
)
5355 tmp
= a
, a
= b
, b
= tmp
;
5357 /* If first constant, both constant, so don't need multiply. */
5358 if (GET_CODE (a
) == CONST_INT
)
5361 /* If second not constant, neither is constant, so would need multiply. */
5362 if (GET_CODE (b
) != CONST_INT
)
5365 /* One operand is constant, so might not need multiply insn. Generate the
5366 code for the multiply and see if a call or multiply, or long sequence
5367 of insns is generated. */
5369 rtl_obstack
= &temp_obstack
;
5371 expand_mult (GET_MODE (a
), a
, b
, 0, 0);
5372 tmp
= gen_sequence ();
5375 if (GET_CODE (tmp
) == SEQUENCE
)
5377 if (XVEC (tmp
, 0) == 0)
5379 else if (XVECLEN (tmp
, 0) > 3)
5382 for (i
= 0; i
< XVECLEN (tmp
, 0); i
++)
5384 rtx insn
= XVECEXP (tmp
, 0, i
);
5386 if (GET_CODE (insn
) != INSN
5387 || (GET_CODE (PATTERN (insn
)) == SET
5388 && GET_CODE (SET_SRC (PATTERN (insn
))) == MULT
)
5389 || (GET_CODE (PATTERN (insn
)) == PARALLEL
5390 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == SET
5391 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn
), 0, 0))) == MULT
))
5398 else if (GET_CODE (tmp
) == SET
5399 && GET_CODE (SET_SRC (tmp
)) == MULT
)
5401 else if (GET_CODE (tmp
) == PARALLEL
5402 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
5403 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
5406 /* Free any storage we obtained in generating this multiply and restore rtl
5407 allocation to its normal obstack. */
5408 obstack_free (&temp_obstack
, storage
);
5409 rtl_obstack
= old_rtl_obstack
;
5414 /* Check to see if loop can be terminated by a "decrement and branch until
5415 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
5416 Also try reversing an increment loop to a decrement loop
5417 to see if the optimization can be performed.
5418 Value is nonzero if optimization was performed. */
5420 /* This is useful even if the architecture doesn't have such an insn,
5421 because it might change a loops which increments from 0 to n to a loop
5422 which decrements from n to 0. A loop that decrements to zero is usually
5423 faster than one that increments from zero. */
5425 /* ??? This could be rewritten to use some of the loop unrolling procedures,
5426 such as approx_final_value, biv_total_increment, loop_iterations, and
5427 final_[bg]iv_value. */
5430 check_dbra_loop (loop_end
, insn_count
, loop_start
)
5435 struct iv_class
*bl
;
5440 enum rtx_code branch_code
;
5443 rtx before_comparison
;
5446 /* If last insn is a conditional branch, and the insn before tests a
5447 register value, try to optimize it. Otherwise, we can't do anything. */
5449 comparison
= get_condition_for_loop (PREV_INSN (loop_end
));
5450 if (comparison
== 0)
5453 /* Check all of the bivs to see if the compare uses one of them.
5454 Skip biv's set more than once because we can't guarantee that
5455 it will be zero on the last iteration. Also skip if the biv is
5456 used between its update and the test insn. */
5458 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
5460 if (bl
->biv_count
== 1
5461 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
5462 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
5463 PREV_INSN (PREV_INSN (loop_end
))))
5470 /* Look for the case where the basic induction variable is always
5471 nonnegative, and equals zero on the last iteration.
5472 In this case, add a reg_note REG_NONNEG, which allows the
5473 m68k DBRA instruction to be used. */
5475 if (((GET_CODE (comparison
) == GT
5476 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
5477 && INTVAL (XEXP (comparison
, 1)) == -1)
5478 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
5479 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
5480 && INTVAL (bl
->biv
->add_val
) < 0)
5482 /* Initial value must be greater than 0,
5483 init_val % -dec_value == 0 to ensure that it equals zero on
5484 the last iteration */
5486 if (GET_CODE (bl
->initial_value
) == CONST_INT
5487 && INTVAL (bl
->initial_value
) > 0
5488 && (INTVAL (bl
->initial_value
) %
5489 (-INTVAL (bl
->biv
->add_val
))) == 0)
5491 /* register always nonnegative, add REG_NOTE to branch */
5492 REG_NOTES (PREV_INSN (loop_end
))
5493 = gen_rtx (EXPR_LIST
, REG_NONNEG
, 0,
5494 REG_NOTES (PREV_INSN (loop_end
)));
5500 /* If the decrement is 1 and the value was tested as >= 0 before
5501 the loop, then we can safely optimize. */
5502 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
5504 if (GET_CODE (p
) == CODE_LABEL
)
5506 if (GET_CODE (p
) != JUMP_INSN
)
5509 before_comparison
= get_condition_for_loop (p
);
5510 if (before_comparison
5511 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
5512 && GET_CODE (before_comparison
) == LT
5513 && XEXP (before_comparison
, 1) == const0_rtx
5514 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
5515 && INTVAL (bl
->biv
->add_val
) == -1)
5517 REG_NOTES (PREV_INSN (loop_end
))
5518 = gen_rtx (EXPR_LIST
, REG_NONNEG
, 0,
5519 REG_NOTES (PREV_INSN (loop_end
)));
5526 else if (num_mem_sets
<= 1)
5528 /* Try to change inc to dec, so can apply above optimization. */
5530 all registers modified are induction variables or invariant,
5531 all memory references have non-overlapping addresses
5532 (obviously true if only one write)
5533 allow 2 insns for the compare/jump at the end of the loop. */
5534 int num_nonfixed_reads
= 0;
5535 /* 1 if the iteration var is used only to count iterations. */
5536 int no_use_except_counting
= 0;
5538 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
5539 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
5540 num_nonfixed_reads
+= count_nonfixed_reads (PATTERN (p
));
5542 if (bl
->giv_count
== 0
5543 && ! loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]])
5545 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
5547 /* If there are no givs for this biv, and the only exit is the
5548 fall through at the end of the the loop, then
5549 see if perhaps there are no uses except to count. */
5550 no_use_except_counting
= 1;
5551 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
5552 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
5554 rtx set
= single_set (p
);
5556 if (set
&& GET_CODE (SET_DEST (set
)) == REG
5557 && REGNO (SET_DEST (set
)) == bl
->regno
)
5558 /* An insn that sets the biv is okay. */
5560 else if (p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
5561 || p
== prev_nonnote_insn (loop_end
))
5562 /* Don't bother about the end test. */
5564 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
5565 /* Any other use of the biv is no good. */
5567 no_use_except_counting
= 0;
5573 /* This code only acts for innermost loops. Also it simplifies
5574 the memory address check by only reversing loops with
5575 zero or one memory access.
5576 Two memory accesses could involve parts of the same array,
5577 and that can't be reversed. */
5579 if (num_nonfixed_reads
<= 1
5581 && (no_use_except_counting
5582 || (bl
->giv_count
+ bl
->biv_count
+ num_mem_sets
5583 + num_movables
+ 2 == insn_count
)))
5585 rtx condition
= get_condition_for_loop (PREV_INSN (loop_end
));
5589 /* Loop can be reversed. */
5590 if (loop_dump_stream
)
5591 fprintf (loop_dump_stream
, "Can reverse loop\n");
5593 /* Now check other conditions:
5594 initial_value must be zero,
5595 final_value % add_val == 0, so that when reversed, the
5596 biv will be zero on the last iteration.
5598 This test can probably be improved since +/- 1 in the constant
5599 can be obtained by changing LT to LE and vice versa; this is
5602 if (comparison
&& bl
->initial_value
== const0_rtx
5603 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
5604 /* LE gets turned into LT */
5605 && GET_CODE (comparison
) == LT
5606 && (INTVAL (XEXP (comparison
, 1))
5607 % INTVAL (bl
->biv
->add_val
)) == 0)
5609 /* Register will always be nonnegative, with value
5610 0 on last iteration if loop reversed */
5612 /* Save some info needed to produce the new insns. */
5613 reg
= bl
->biv
->dest_reg
;
5614 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 1);
5615 new_add_val
= gen_rtx (CONST_INT
, VOIDmode
,
5616 - INTVAL (bl
->biv
->add_val
));
5618 final_value
= XEXP (comparison
, 1);
5619 start_value
= gen_rtx (CONST_INT
, VOIDmode
,
5620 (INTVAL (XEXP (comparison
, 1))
5621 - INTVAL (bl
->biv
->add_val
)));
5623 /* Initialize biv to start_value before loop start.
5624 The old initializing insn will be deleted as a
5625 dead store by flow.c. */
5626 emit_insn_before (gen_move_insn (reg
, start_value
), loop_start
);
5628 /* Add insn to decrement register, and delete insn
5629 that incremented the register. */
5630 p
= emit_insn_before (gen_add2_insn (reg
, new_add_val
),
5632 delete_insn (bl
->biv
->insn
);
5634 /* Update biv info to reflect its new status. */
5636 bl
->initial_value
= start_value
;
5637 bl
->biv
->add_val
= new_add_val
;
5639 /* Inc LABEL_NUSES so that delete_insn will
5640 not delete the label. */
5641 LABEL_NUSES (XEXP (jump_label
, 0)) ++;
5643 /* Emit an insn after the end of the loop to set the biv's
5644 proper exit value if it is used anywhere outside the loop. */
5645 if ((regno_last_uid
[bl
->regno
]
5646 != INSN_UID (PREV_INSN (PREV_INSN (loop_end
))))
5648 || regno_first_uid
[bl
->regno
] != INSN_UID (bl
->init_insn
))
5649 emit_insn_after (gen_move_insn (reg
, final_value
),
5652 /* Delete compare/branch at end of loop. */
5653 delete_insn (PREV_INSN (loop_end
));
5654 delete_insn (PREV_INSN (loop_end
));
5656 /* Add new compare/branch insn at end of loop. */
5658 emit_cmp_insn (reg
, const0_rtx
, GE
, 0, GET_MODE (reg
), 0, 0);
5659 emit_jump_insn (gen_bge (XEXP (jump_label
, 0)));
5660 tem
= gen_sequence ();
5662 emit_jump_insn_before (tem
, loop_end
);
5664 for (tem
= PREV_INSN (loop_end
);
5665 tem
&& GET_CODE (tem
) != JUMP_INSN
; tem
= PREV_INSN (tem
))
5669 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
5671 /* Increment of LABEL_NUSES done above. */
5672 /* Register is now always nonnegative,
5673 so add REG_NONNEG note to the branch. */
5674 REG_NOTES (tem
) = gen_rtx (EXPR_LIST
, REG_NONNEG
, 0,
5680 /* Mark that this biv has been reversed. Each giv which depends
5681 on this biv, and which is also live past the end of the loop
5682 will have to be fixed up. */
5686 if (loop_dump_stream
)
5687 fprintf (loop_dump_stream
,
5688 "Reversed loop and added reg_nonneg\n");
5698 /* Verify whether the biv BL appears to be eliminable,
5699 based on the insns in the loop that refer to it.
5700 LOOP_START is the first insn of the loop, and END is the end insn.
5702 If ELIMINATE_P is non-zero, actually do the elimination.
5704 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
5705 determine whether invariant insns should be placed inside or at the
5706 start of the loop. */
5709 maybe_eliminate_biv (bl
, loop_start
, end
, eliminate_p
, threshold
, insn_count
)
5710 struct iv_class
*bl
;
5714 int threshold
, insn_count
;
5716 rtx reg
= bl
->biv
->dest_reg
;
5718 struct induction
*v
;
5720 /* Scan all insns in the loop, stopping if we find one that uses the
5721 biv in a way that we cannot eliminate. */
5723 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
5725 enum rtx_code code
= GET_CODE (p
);
5726 rtx where
= threshold
>= insn_count
? loop_start
: p
;
5728 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
5729 && reg_mentioned_p (reg
, PATTERN (p
))
5730 && ! maybe_eliminate_biv_1 (PATTERN (p
), p
, bl
, eliminate_p
, where
))
5732 if (loop_dump_stream
)
5733 fprintf (loop_dump_stream
,
5734 "Cannot eliminate biv %d: biv used in insn %d.\n",
5735 bl
->regno
, INSN_UID (p
));
5742 if (loop_dump_stream
)
5743 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
5744 bl
->regno
, eliminate_p
? "was" : "can be");
5751 /* If BL appears in X (part of the pattern of INSN), see if we can
5752 eliminate its use. If so, return 1. If not, return 0.
5754 If BIV does not appear in X, return 1.
5756 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
5757 where extra insns should be added. Depending on how many items have been
5758 moved out of the loop, it will either be before INSN or at the start of
5762 maybe_eliminate_biv_1 (x
, insn
, bl
, eliminate_p
, where
)
5764 struct iv_class
*bl
;
5768 enum rtx_code code
= GET_CODE (x
);
5769 rtx reg
= bl
->biv
->dest_reg
;
5770 enum machine_mode mode
= GET_MODE (reg
);
5771 struct induction
*v
;
5780 /* If we haven't already been able to do something with this BIV,
5781 we can't eliminate it. */
5787 /* If this sets the BIV, it is not a problem. */
5788 if (SET_DEST (x
) == reg
)
5791 /* If this is an insn that defines a giv, it is also ok because
5792 it will go away when the giv is reduced. */
5793 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5794 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
5798 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
5800 /* Can replace with any giv that was reduced and
5801 that has (MULT_VAL != 0) and (ADD_VAL == 0).
5802 Require a constant for MULT_VAL, so we know it's nonzero. */
5804 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5805 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
5806 && v
->add_val
== const0_rtx
5807 && ! v
->ignore
&& ! v
->maybe_dead
5813 /* If the giv has the opposite direction of change,
5814 then reverse the comparison. */
5815 if (INTVAL (v
->mult_val
) < 0)
5816 new = gen_rtx (COMPARE
, GET_MODE (v
->new_reg
),
5817 const0_rtx
, v
->new_reg
);
5821 /* We can probably test that giv's reduced reg. */
5822 if (validate_change (insn
, &SET_SRC (x
), new, 0))
5826 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
5827 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
5828 Require a constant for MULT_VAL, so we know it's nonzero. */
5830 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5831 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
5832 && ! v
->ignore
&& ! v
->maybe_dead
5838 /* If the giv has the opposite direction of change,
5839 then reverse the comparison. */
5840 if (INTVAL (v
->mult_val
) < 0)
5841 new = gen_rtx (COMPARE
, VOIDmode
, copy_rtx (v
->add_val
),
5844 new = gen_rtx (COMPARE
, VOIDmode
, v
->new_reg
,
5845 copy_rtx (v
->add_val
));
5847 /* Replace biv with the giv's reduced register. */
5848 update_reg_last_use (v
->add_val
, insn
);
5849 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
5852 /* Insn doesn't support that constant or invariant. Copy it
5853 into a register (it will be a loop invariant.) */
5854 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
5856 emit_insn_before (gen_move_insn (tem
, copy_rtx (v
->add_val
)),
5859 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)),
5860 gen_rtx (COMPARE
, VOIDmode
,
5861 v
->new_reg
, tem
), 0))
5870 case GT
: case GE
: case GTU
: case GEU
:
5871 case LT
: case LE
: case LTU
: case LEU
:
5872 /* See if either argument is the biv. */
5873 if (XEXP (x
, 0) == reg
)
5874 arg
= XEXP (x
, 1), arg_operand
= 1;
5875 else if (XEXP (x
, 1) == reg
)
5876 arg
= XEXP (x
, 0), arg_operand
= 0;
5880 if (CONSTANT_P (arg
))
5882 /* First try to replace with any giv that has constant positive
5883 mult_val and constant add_val. We might be able to support
5884 negative mult_val, but it seems complex to do it in general. */
5886 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5887 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
5888 && CONSTANT_P (v
->add_val
)
5889 && ! v
->ignore
&& ! v
->maybe_dead
5895 /* Replace biv with the giv's reduced reg. */
5896 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
5898 /* If all constants are actually constant integers and
5899 the derived constant can be directly placed in the COMPARE,
5901 if (GET_CODE (arg
) == CONST_INT
5902 && GET_CODE (v
->mult_val
) == CONST_INT
5903 && GET_CODE (v
->add_val
) == CONST_INT
5904 && validate_change (insn
, &XEXP (x
, arg_operand
),
5905 gen_rtx (CONST_INT
, VOIDmode
,
5907 * INTVAL (v
->mult_val
)
5908 + INTVAL (v
->add_val
))), 0))
5911 /* Otherwise, load it into a register. */
5912 tem
= gen_reg_rtx (mode
);
5913 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
5914 if (validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 0))
5917 /* If that failed, put back the change we made above. */
5918 XEXP (x
, 1-arg_operand
) = reg
;
5921 /* Look for giv with positive constant mult_val and nonconst add_val.
5922 Insert insns to calculate new compare value. */
5924 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5925 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
5926 && ! v
->ignore
&& ! v
->maybe_dead
5934 tem
= gen_reg_rtx (mode
);
5936 /* Replace biv with giv's reduced register. */
5937 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
5940 /* Compute value to compare against. */
5941 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
5942 /* Use it in this insn. */
5943 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
5944 if (apply_change_group ())
5948 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
5950 if (invariant_p (arg
) == 1)
5952 /* Look for giv with constant positive mult_val and nonconst
5953 add_val. Insert insns to compute new compare value. */
5955 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5956 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
5957 && ! v
->ignore
&& ! v
->maybe_dead
5965 tem
= gen_reg_rtx (mode
);
5967 /* Replace biv with giv's reduced register. */
5968 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
5971 /* Compute value to compare against. */
5972 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
,
5974 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
5975 if (apply_change_group ())
5980 /* This code has problems. Basically, you can't know when
5981 seeing if we will eliminate BL, whether a particular giv
5982 of ARG will be reduced. If it isn't going to be reduced,
5983 we can't eliminate BL. We can try forcing it to be reduced,
5984 but that can generate poor code.
5986 The problem is that the benefit of reducing TV, below should
5987 be increased if BL can actually be eliminated, but this means
5988 we might have to do a topological sort of the order in which
5989 we try to process biv. It doesn't seem worthwhile to do
5990 this sort of thing now. */
5993 /* Otherwise the reg compared with had better be a biv. */
5994 if (GET_CODE (arg
) != REG
5995 || reg_iv_type
[REGNO (arg
)] != BASIC_INDUCT
)
5998 /* Look for a pair of givs, one for each biv,
5999 with identical coefficients. */
6000 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6002 struct induction
*tv
;
6004 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
6007 for (tv
= reg_biv_class
[REGNO (arg
)]->giv
; tv
; tv
= tv
->next_iv
)
6008 if (! tv
->ignore
&& ! tv
->maybe_dead
6009 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
6010 && rtx_equal_p (tv
->add_val
, v
->add_val
)
6011 && tv
->mode
== mode
)
6016 /* Replace biv with its giv's reduced reg. */
6017 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6018 /* Replace other operand with the other giv's
6020 XEXP (x
, arg_operand
) = tv
->new_reg
;
6027 /* If we get here, the biv can't be eliminated. */
6031 /* If this address is a DEST_ADDR giv, it doesn't matter if the
6032 biv is used in it, since it will be replaced. */
6033 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6034 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
6039 /* See if any subexpression fails elimination. */
6040 fmt
= GET_RTX_FORMAT (code
);
6041 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6046 if (! maybe_eliminate_biv_1 (XEXP (x
, i
), insn
, bl
,
6047 eliminate_p
, where
))
6052 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6053 if (! maybe_eliminate_biv_1 (XVECEXP (x
, i
, j
), insn
, bl
,
6054 eliminate_p
, where
))
6063 /* Return nonzero if the last use of REG
6064 is in an insn following INSN in the same basic block. */
6067 last_use_this_basic_block (reg
, insn
)
6073 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
6076 if (regno_last_uid
[REGNO (reg
)] == INSN_UID (n
))
6082 /* Called via `note_stores' to record the initial value of a biv. Here we
6083 just record the location of the set and process it later. */
6086 record_initial (dest
, set
)
6090 struct iv_class
*bl
;
6092 if (GET_CODE (dest
) != REG
6093 || REGNO (dest
) >= max_reg_before_loop
6094 || reg_iv_type
[REGNO (dest
)] != BASIC_INDUCT
)
6097 bl
= reg_biv_class
[REGNO (dest
)];
6099 /* If this is the first set found, record it. */
6100 if (bl
->init_insn
== 0)
6102 bl
->init_insn
= note_insn
;
6107 /* If any of the registers in X are "old" and currently have a last use earlier
6108 than INSN, update them to have a last use of INSN. Their actual last use
6109 will be the previous insn but it will not have a valid uid_luid so we can't
6113 update_reg_last_use (x
, insn
)
6117 /* Check for the case where INSN does not have a valid luid. In this case,
6118 there is no need to modify the regno_last_uid, as this can only happen
6119 when code is inserted after the loop_end to set a pseudo's final value,
6120 and hence this insn will never be the last use of x. */
6121 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
6122 && INSN_UID (insn
) < max_uid_for_loop
6123 && uid_luid
[regno_last_uid
[REGNO (x
)]] < uid_luid
[INSN_UID (insn
)])
6124 regno_last_uid
[REGNO (x
)] = INSN_UID (insn
);
6128 register char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6129 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6132 update_reg_last_use (XEXP (x
, i
), insn
);
6133 else if (fmt
[i
] == 'E')
6134 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6135 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
6140 /* Given a jump insn JUMP, return the condition that will cause it to branch
6141 to its JUMP_LABEL. If the condition cannot be understood, or is an
6142 inequality floating-point comparison which needs to be reversed, 0 will
6145 If EARLIEST is non-zero, it is a pointer to a place where the earliest
6146 insn used in locating the condition was found. If a replacement test
6147 of the condition is desired, it should be placed in front of that
6148 insn and we will be sure that the inputs are still valid.
6150 The condition will be returned in a canonical form to simplify testing by
6151 callers. Specifically:
6153 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
6154 (2) Both operands will be machine operands; (cc0) will have been replaced.
6155 (3) If an operand is a constant, it will be the second operand.
6156 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
6157 for GE, GEU, and LEU. */
6160 get_condition (jump
, earliest
)
6169 int reverse_code
= 0;
6170 int did_reverse_condition
= 0;
6172 /* If this is not a standard conditional jump, we can't parse it. */
6173 if (GET_CODE (jump
) != JUMP_INSN
6174 || ! condjump_p (jump
) || simplejump_p (jump
))
6177 code
= GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
6178 op0
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 0);
6179 op1
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 1);
6184 /* If this branches to JUMP_LABEL when the condition is false, reverse
6186 if (XEXP (XEXP (SET_SRC (PATTERN (jump
)), 2), 0) == JUMP_LABEL (jump
))
6187 code
= reverse_condition (code
), did_reverse_condition
^= 1;
6189 /* If we are comparing a register with zero, see if the register is set
6190 in the previous insn to a COMPARE or a comparison operation. Perform
6191 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
6194 while (GET_RTX_CLASS (code
) == '<' && op1
== const0_rtx
)
6196 /* Set non-zero when we find something of interest. */
6200 /* If comparison with cc0, import actual comparison from compare
6204 if ((prev
= prev_nonnote_insn (prev
)) == 0
6205 || GET_CODE (prev
) != INSN
6206 || (set
= single_set (prev
)) == 0
6207 || SET_DEST (set
) != cc0_rtx
)
6210 op0
= SET_SRC (set
);
6211 op1
= CONST0_RTX (GET_MODE (op0
));
6217 /* If this is a COMPARE, pick up the two things being compared. */
6218 if (GET_CODE (op0
) == COMPARE
)
6220 op1
= XEXP (op0
, 1);
6221 op0
= XEXP (op0
, 0);
6224 else if (GET_CODE (op0
) != REG
)
6227 /* Go back to the previous insn. Stop if it is not an INSN. We also
6228 stop if it isn't a single set or if it has a REG_INC note because
6229 we don't want to bother dealing with it. */
6231 if ((prev
= prev_nonnote_insn (prev
)) == 0
6232 || GET_CODE (prev
) != INSN
6233 || FIND_REG_INC_NOTE (prev
, 0)
6234 || (set
= single_set (prev
)) == 0)
6237 /* If this is setting OP0, get what it sets it to if it looks
6239 if (SET_DEST (set
) == op0
)
6241 enum machine_mode inner_mode
= GET_MODE (SET_SRC (set
));
6243 if ((GET_CODE (SET_SRC (set
)) == COMPARE
6246 && GET_MODE_BITSIZE (inner_mode
) <= HOST_BITS_PER_INT
6247 && (STORE_FLAG_VALUE
6248 & (1 << (GET_MODE_BITSIZE (inner_mode
) - 1)))))
6249 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')))
6251 else if ((code
== EQ
6253 && GET_MODE_BITSIZE (inner_mode
) <= HOST_BITS_PER_INT
6254 && (STORE_FLAG_VALUE
6255 & (1 << (GET_MODE_BITSIZE (inner_mode
) - 1)))))
6256 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')
6258 /* We might have reversed a LT to get a GE here. But this wasn't
6259 actually the comparison of data, so we don't flag that we
6260 have had to reverse the condition. */
6261 did_reverse_condition
^= 1;
6267 else if (reg_set_p (op0
, prev
))
6268 /* If this sets OP0, but not directly, we have to give up. */
6273 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
6274 code
= GET_CODE (x
);
6277 code
= reverse_condition (code
);
6278 did_reverse_condition
^= 1;
6282 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
6288 /* If constant is first, put it last. */
6289 if (CONSTANT_P (op0
))
6290 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
6292 /* If OP0 is the result of a comparison, we weren't able to find what
6293 was really being compared, so fail. */
6294 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
6297 /* Canonicalize any ordered comparison with integers involving equality. */
6298 if (GET_CODE (op1
) == CONST_INT
)
6300 int const_val
= INTVAL (op1
);
6301 unsigned uconst_val
= (unsigned) const_val
;
6307 op1
= gen_rtx (CONST_INT
, VOIDmode
, const_val
+ 1);
6312 op1
= gen_rtx (CONST_INT
, VOIDmode
, const_val
- 1);
6317 op1
= gen_rtx (CONST_INT
, VOIDmode
, uconst_val
+ 1);
6322 op1
= gen_rtx (CONST_INT
, VOIDmode
, uconst_val
- 1);
6327 /* If this was floating-point and we reversed anything other than an
6328 EQ or NE, return zero. */
6329 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
6330 && did_reverse_condition
&& code
!= NE
&& code
!= EQ
6331 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
6335 /* Never return CC0; return zero instead. */
6340 return gen_rtx (code
, VOIDmode
, op0
, op1
);
6343 /* Similar to above routine, except that we also put an invariant last
6344 unless both operands are invariants. */
6347 get_condition_for_loop (x
)
6350 rtx comparison
= get_condition (x
, 0);
6353 || ! invariant_p (XEXP (comparison
, 0))
6354 || invariant_p (XEXP (comparison
, 1)))
6357 return gen_rtx (swap_condition (GET_CODE (comparison
)), VOIDmode
,
6358 XEXP (comparison
, 1), XEXP (comparison
, 0));
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