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1 /* Optimize jump instructions, for GNU compiler.
2 Copyright (C) 1987, 88, 89, 91-97, 1998 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21
22 /* This is the jump-optimization pass of the compiler.
23 It is run two or three times: once before cse, sometimes once after cse,
24 and once after reload (before final).
25
26 jump_optimize deletes unreachable code and labels that are not used.
27 It also deletes jumps that jump to the following insn,
28 and simplifies jumps around unconditional jumps and jumps
29 to unconditional jumps.
30
31 Each CODE_LABEL has a count of the times it is used
32 stored in the LABEL_NUSES internal field, and each JUMP_INSN
33 has one label that it refers to stored in the
34 JUMP_LABEL internal field. With this we can detect labels that
35 become unused because of the deletion of all the jumps that
36 formerly used them. The JUMP_LABEL info is sometimes looked
37 at by later passes.
38
39 Optionally, cross-jumping can be done. Currently it is done
40 only the last time (when after reload and before final).
41 In fact, the code for cross-jumping now assumes that register
42 allocation has been done, since it uses `rtx_renumbered_equal_p'.
43
44 Jump optimization is done after cse when cse's constant-propagation
45 causes jumps to become unconditional or to be deleted.
46
47 Unreachable loops are not detected here, because the labels
48 have references and the insns appear reachable from the labels.
49 find_basic_blocks in flow.c finds and deletes such loops.
50
51 The subroutines delete_insn, redirect_jump, and invert_jump are used
52 from other passes as well. */
53
54 #include "config.h"
55 #include "system.h"
56 #include "rtl.h"
57 #include "flags.h"
58 #include "hard-reg-set.h"
59 #include "regs.h"
60 #include "insn-config.h"
61 #include "insn-flags.h"
62 #include "recog.h"
63 #include "expr.h"
64 #include "real.h"
65 #include "except.h"
66 #include "toplev.h"
67
68 /* ??? Eventually must record somehow the labels used by jumps
69 from nested functions. */
70 /* Pre-record the next or previous real insn for each label?
71 No, this pass is very fast anyway. */
72 /* Condense consecutive labels?
73 This would make life analysis faster, maybe. */
74 /* Optimize jump y; x: ... y: jumpif... x?
75 Don't know if it is worth bothering with. */
76 /* Optimize two cases of conditional jump to conditional jump?
77 This can never delete any instruction or make anything dead,
78 or even change what is live at any point.
79 So perhaps let combiner do it. */
80
81 /* Vector indexed by uid.
82 For each CODE_LABEL, index by its uid to get first unconditional jump
83 that jumps to the label.
84 For each JUMP_INSN, index by its uid to get the next unconditional jump
85 that jumps to the same label.
86 Element 0 is the start of a chain of all return insns.
87 (It is safe to use element 0 because insn uid 0 is not used. */
88
89 static rtx *jump_chain;
90
91 /* List of labels referred to from initializers.
92 These can never be deleted. */
93 rtx forced_labels;
94
95 /* Maximum index in jump_chain. */
96
97 static int max_jump_chain;
98
99 /* Set nonzero by jump_optimize if control can fall through
100 to the end of the function. */
101 int can_reach_end;
102
103 /* Indicates whether death notes are significant in cross jump analysis.
104 Normally they are not significant, because of A and B jump to C,
105 and R dies in A, it must die in B. But this might not be true after
106 stack register conversion, and we must compare death notes in that
107 case. */
108
109 static int cross_jump_death_matters = 0;
110
111 static int duplicate_loop_exit_test PROTO((rtx));
112 static void find_cross_jump PROTO((rtx, rtx, int, rtx *, rtx *));
113 static void do_cross_jump PROTO((rtx, rtx, rtx));
114 static int jump_back_p PROTO((rtx, rtx));
115 static int tension_vector_labels PROTO((rtx, int));
116 static void mark_jump_label PROTO((rtx, rtx, int));
117 static void delete_computation PROTO((rtx));
118 static void delete_from_jump_chain PROTO((rtx));
119 static int delete_labelref_insn PROTO((rtx, rtx, int));
120 static void mark_modified_reg PROTO((rtx, rtx));
121 static void redirect_tablejump PROTO((rtx, rtx));
122 #ifndef HAVE_cc0
123 static rtx find_insert_position PROTO((rtx, rtx));
124 #endif
125 \f
126 /* Delete no-op jumps and optimize jumps to jumps
127 and jumps around jumps.
128 Delete unused labels and unreachable code.
129
130 If CROSS_JUMP is 1, detect matching code
131 before a jump and its destination and unify them.
132 If CROSS_JUMP is 2, do cross-jumping, but pay attention to death notes.
133
134 If NOOP_MOVES is nonzero, delete no-op move insns.
135
136 If AFTER_REGSCAN is nonzero, then this jump pass is being run immediately
137 after regscan, and it is safe to use regno_first_uid and regno_last_uid.
138
139 If `optimize' is zero, don't change any code,
140 just determine whether control drops off the end of the function.
141 This case occurs when we have -W and not -O.
142 It works because `delete_insn' checks the value of `optimize'
143 and refrains from actually deleting when that is 0. */
144
145 void
146 jump_optimize (f, cross_jump, noop_moves, after_regscan)
147 rtx f;
148 int cross_jump;
149 int noop_moves;
150 int after_regscan;
151 {
152 register rtx insn, next, note;
153 int changed;
154 int old_max_reg;
155 int first = 1;
156 int max_uid = 0;
157 rtx last_insn;
158
159 cross_jump_death_matters = (cross_jump == 2);
160
161 /* Initialize LABEL_NUSES and JUMP_LABEL fields. Delete any REG_LABEL
162 notes whose labels don't occur in the insn any more. */
163
164 for (insn = f; insn; insn = NEXT_INSN (insn))
165 {
166 if (GET_CODE (insn) == CODE_LABEL)
167 LABEL_NUSES (insn) = (LABEL_PRESERVE_P (insn) != 0);
168 else if (GET_CODE (insn) == JUMP_INSN)
169 JUMP_LABEL (insn) = 0;
170 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
171 for (note = REG_NOTES (insn); note; note = next)
172 {
173 next = XEXP (note, 1);
174 if (REG_NOTE_KIND (note) == REG_LABEL
175 && ! reg_mentioned_p (XEXP (note, 0), PATTERN (insn)))
176 remove_note (insn, note);
177 }
178
179 if (INSN_UID (insn) > max_uid)
180 max_uid = INSN_UID (insn);
181 }
182
183 max_uid++;
184
185 /* Delete insns following barriers, up to next label. */
186
187 for (insn = f; insn;)
188 {
189 if (GET_CODE (insn) == BARRIER)
190 {
191 insn = NEXT_INSN (insn);
192 while (insn != 0 && GET_CODE (insn) != CODE_LABEL)
193 {
194 if (GET_CODE (insn) == NOTE
195 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)
196 insn = NEXT_INSN (insn);
197 else
198 insn = delete_insn (insn);
199 }
200 /* INSN is now the code_label. */
201 }
202 else
203 insn = NEXT_INSN (insn);
204 }
205
206 /* Leave some extra room for labels and duplicate exit test insns
207 we make. */
208 max_jump_chain = max_uid * 14 / 10;
209 jump_chain = (rtx *) alloca (max_jump_chain * sizeof (rtx));
210 bzero ((char *) jump_chain, max_jump_chain * sizeof (rtx));
211
212 /* Mark the label each jump jumps to.
213 Combine consecutive labels, and count uses of labels.
214
215 For each label, make a chain (using `jump_chain')
216 of all the *unconditional* jumps that jump to it;
217 also make a chain of all returns. */
218
219 for (insn = f; insn; insn = NEXT_INSN (insn))
220 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
221 {
222 mark_jump_label (PATTERN (insn), insn, cross_jump);
223 if (! INSN_DELETED_P (insn) && GET_CODE (insn) == JUMP_INSN)
224 {
225 if (JUMP_LABEL (insn) != 0 && simplejump_p (insn))
226 {
227 jump_chain[INSN_UID (insn)]
228 = jump_chain[INSN_UID (JUMP_LABEL (insn))];
229 jump_chain[INSN_UID (JUMP_LABEL (insn))] = insn;
230 }
231 if (GET_CODE (PATTERN (insn)) == RETURN)
232 {
233 jump_chain[INSN_UID (insn)] = jump_chain[0];
234 jump_chain[0] = insn;
235 }
236 }
237 }
238
239 /* Keep track of labels used from static data;
240 they cannot ever be deleted. */
241
242 for (insn = forced_labels; insn; insn = XEXP (insn, 1))
243 LABEL_NUSES (XEXP (insn, 0))++;
244
245 check_exception_handler_labels ();
246
247 /* Keep track of labels used for marking handlers for exception
248 regions; they cannot usually be deleted. */
249
250 for (insn = exception_handler_labels; insn; insn = XEXP (insn, 1))
251 LABEL_NUSES (XEXP (insn, 0))++;
252
253 exception_optimize ();
254
255 /* Delete all labels already not referenced.
256 Also find the last insn. */
257
258 last_insn = 0;
259 for (insn = f; insn; )
260 {
261 if (GET_CODE (insn) == CODE_LABEL && LABEL_NUSES (insn) == 0)
262 insn = delete_insn (insn);
263 else
264 {
265 last_insn = insn;
266 insn = NEXT_INSN (insn);
267 }
268 }
269
270 if (!optimize)
271 {
272 /* See if there is still a NOTE_INSN_FUNCTION_END in this function.
273 If so record that this function can drop off the end. */
274
275 insn = last_insn;
276 {
277 int n_labels = 1;
278 while (insn
279 /* One label can follow the end-note: the return label. */
280 && ((GET_CODE (insn) == CODE_LABEL && n_labels-- > 0)
281 /* Ordinary insns can follow it if returning a structure. */
282 || GET_CODE (insn) == INSN
283 /* If machine uses explicit RETURN insns, no epilogue,
284 then one of them follows the note. */
285 || (GET_CODE (insn) == JUMP_INSN
286 && GET_CODE (PATTERN (insn)) == RETURN)
287 /* A barrier can follow the return insn. */
288 || GET_CODE (insn) == BARRIER
289 /* Other kinds of notes can follow also. */
290 || (GET_CODE (insn) == NOTE
291 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)))
292 insn = PREV_INSN (insn);
293 }
294
295 /* Report if control can fall through at the end of the function. */
296 if (insn && GET_CODE (insn) == NOTE
297 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_END
298 && ! INSN_DELETED_P (insn))
299 can_reach_end = 1;
300
301 /* Zero the "deleted" flag of all the "deleted" insns. */
302 for (insn = f; insn; insn = NEXT_INSN (insn))
303 INSN_DELETED_P (insn) = 0;
304
305 /* Show that the jump chain is not valid. */
306 jump_chain = 0;
307 return;
308 }
309
310 #ifdef HAVE_return
311 if (HAVE_return)
312 {
313 /* If we fall through to the epilogue, see if we can insert a RETURN insn
314 in front of it. If the machine allows it at this point (we might be
315 after reload for a leaf routine), it will improve optimization for it
316 to be there. */
317 insn = get_last_insn ();
318 while (insn && GET_CODE (insn) == NOTE)
319 insn = PREV_INSN (insn);
320
321 if (insn && GET_CODE (insn) != BARRIER)
322 {
323 emit_jump_insn (gen_return ());
324 emit_barrier ();
325 }
326 }
327 #endif
328
329 if (noop_moves)
330 for (insn = f; insn; )
331 {
332 next = NEXT_INSN (insn);
333
334 if (GET_CODE (insn) == INSN)
335 {
336 register rtx body = PATTERN (insn);
337
338 /* Combine stack_adjusts with following push_insns. */
339 #ifdef PUSH_ROUNDING
340 if (GET_CODE (body) == SET
341 && SET_DEST (body) == stack_pointer_rtx
342 && GET_CODE (SET_SRC (body)) == PLUS
343 && XEXP (SET_SRC (body), 0) == stack_pointer_rtx
344 && GET_CODE (XEXP (SET_SRC (body), 1)) == CONST_INT
345 && INTVAL (XEXP (SET_SRC (body), 1)) > 0)
346 {
347 rtx p;
348 rtx stack_adjust_insn = insn;
349 int stack_adjust_amount = INTVAL (XEXP (SET_SRC (body), 1));
350 int total_pushed = 0;
351 int pushes = 0;
352
353 /* Find all successive push insns. */
354 p = insn;
355 /* Don't convert more than three pushes;
356 that starts adding too many displaced addresses
357 and the whole thing starts becoming a losing
358 proposition. */
359 while (pushes < 3)
360 {
361 rtx pbody, dest;
362 p = next_nonnote_insn (p);
363 if (p == 0 || GET_CODE (p) != INSN)
364 break;
365 pbody = PATTERN (p);
366 if (GET_CODE (pbody) != SET)
367 break;
368 dest = SET_DEST (pbody);
369 /* Allow a no-op move between the adjust and the push. */
370 if (GET_CODE (dest) == REG
371 && GET_CODE (SET_SRC (pbody)) == REG
372 && REGNO (dest) == REGNO (SET_SRC (pbody)))
373 continue;
374 if (! (GET_CODE (dest) == MEM
375 && GET_CODE (XEXP (dest, 0)) == POST_INC
376 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx))
377 break;
378 pushes++;
379 if (total_pushed + GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)))
380 > stack_adjust_amount)
381 break;
382 total_pushed += GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)));
383 }
384
385 /* Discard the amount pushed from the stack adjust;
386 maybe eliminate it entirely. */
387 if (total_pushed >= stack_adjust_amount)
388 {
389 delete_computation (stack_adjust_insn);
390 total_pushed = stack_adjust_amount;
391 }
392 else
393 XEXP (SET_SRC (PATTERN (stack_adjust_insn)), 1)
394 = GEN_INT (stack_adjust_amount - total_pushed);
395
396 /* Change the appropriate push insns to ordinary stores. */
397 p = insn;
398 while (total_pushed > 0)
399 {
400 rtx pbody, dest;
401 p = next_nonnote_insn (p);
402 if (GET_CODE (p) != INSN)
403 break;
404 pbody = PATTERN (p);
405 if (GET_CODE (pbody) == SET)
406 break;
407 dest = SET_DEST (pbody);
408 if (! (GET_CODE (dest) == MEM
409 && GET_CODE (XEXP (dest, 0)) == POST_INC
410 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx))
411 break;
412 total_pushed -= GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)));
413 /* If this push doesn't fully fit in the space
414 of the stack adjust that we deleted,
415 make another stack adjust here for what we
416 didn't use up. There should be peepholes
417 to recognize the resulting sequence of insns. */
418 if (total_pushed < 0)
419 {
420 emit_insn_before (gen_add2_insn (stack_pointer_rtx,
421 GEN_INT (- total_pushed)),
422 p);
423 break;
424 }
425 XEXP (dest, 0)
426 = plus_constant (stack_pointer_rtx, total_pushed);
427 }
428 }
429 #endif
430
431 /* Detect and delete no-op move instructions
432 resulting from not allocating a parameter in a register. */
433
434 if (GET_CODE (body) == SET
435 && (SET_DEST (body) == SET_SRC (body)
436 || (GET_CODE (SET_DEST (body)) == MEM
437 && GET_CODE (SET_SRC (body)) == MEM
438 && rtx_equal_p (SET_SRC (body), SET_DEST (body))))
439 && ! (GET_CODE (SET_DEST (body)) == MEM
440 && MEM_VOLATILE_P (SET_DEST (body)))
441 && ! (GET_CODE (SET_SRC (body)) == MEM
442 && MEM_VOLATILE_P (SET_SRC (body))))
443 delete_computation (insn);
444
445 /* Detect and ignore no-op move instructions
446 resulting from smart or fortuitous register allocation. */
447
448 else if (GET_CODE (body) == SET)
449 {
450 int sreg = true_regnum (SET_SRC (body));
451 int dreg = true_regnum (SET_DEST (body));
452
453 if (sreg == dreg && sreg >= 0)
454 delete_insn (insn);
455 else if (sreg >= 0 && dreg >= 0)
456 {
457 rtx trial;
458 rtx tem = find_equiv_reg (NULL_RTX, insn, 0,
459 sreg, NULL_PTR, dreg,
460 GET_MODE (SET_SRC (body)));
461
462 if (tem != 0
463 && GET_MODE (tem) == GET_MODE (SET_DEST (body)))
464 {
465 /* DREG may have been the target of a REG_DEAD note in
466 the insn which makes INSN redundant. If so, reorg
467 would still think it is dead. So search for such a
468 note and delete it if we find it. */
469 if (! find_regno_note (insn, REG_UNUSED, dreg))
470 for (trial = prev_nonnote_insn (insn);
471 trial && GET_CODE (trial) != CODE_LABEL;
472 trial = prev_nonnote_insn (trial))
473 if (find_regno_note (trial, REG_DEAD, dreg))
474 {
475 remove_death (dreg, trial);
476 break;
477 }
478 #ifdef PRESERVE_DEATH_INFO_REGNO_P
479 /* Deleting insn could lose a death-note for SREG
480 so don't do it if final needs accurate
481 death-notes. */
482 if (PRESERVE_DEATH_INFO_REGNO_P (sreg)
483 && (trial = find_regno_note (insn, REG_DEAD, sreg)))
484 {
485 /* Change this into a USE so that we won't emit
486 code for it, but still can keep the note. */
487 PATTERN (insn)
488 = gen_rtx_USE (VOIDmode, XEXP (trial, 0));
489 INSN_CODE (insn) = -1;
490 /* Remove all reg notes but the REG_DEAD one. */
491 REG_NOTES (insn) = trial;
492 XEXP (trial, 1) = NULL_RTX;
493 }
494 else
495 #endif
496 delete_insn (insn);
497 }
498 }
499 else if (dreg >= 0 && CONSTANT_P (SET_SRC (body))
500 && find_equiv_reg (SET_SRC (body), insn, 0, dreg,
501 NULL_PTR, 0,
502 GET_MODE (SET_DEST (body))))
503 {
504 /* This handles the case where we have two consecutive
505 assignments of the same constant to pseudos that didn't
506 get a hard reg. Each SET from the constant will be
507 converted into a SET of the spill register and an
508 output reload will be made following it. This produces
509 two loads of the same constant into the same spill
510 register. */
511
512 rtx in_insn = insn;
513
514 /* Look back for a death note for the first reg.
515 If there is one, it is no longer accurate. */
516 while (in_insn && GET_CODE (in_insn) != CODE_LABEL)
517 {
518 if ((GET_CODE (in_insn) == INSN
519 || GET_CODE (in_insn) == JUMP_INSN)
520 && find_regno_note (in_insn, REG_DEAD, dreg))
521 {
522 remove_death (dreg, in_insn);
523 break;
524 }
525 in_insn = PREV_INSN (in_insn);
526 }
527
528 /* Delete the second load of the value. */
529 delete_insn (insn);
530 }
531 }
532 else if (GET_CODE (body) == PARALLEL)
533 {
534 /* If each part is a set between two identical registers or
535 a USE or CLOBBER, delete the insn. */
536 int i, sreg, dreg;
537 rtx tem;
538
539 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
540 {
541 tem = XVECEXP (body, 0, i);
542 if (GET_CODE (tem) == USE || GET_CODE (tem) == CLOBBER)
543 continue;
544
545 if (GET_CODE (tem) != SET
546 || (sreg = true_regnum (SET_SRC (tem))) < 0
547 || (dreg = true_regnum (SET_DEST (tem))) < 0
548 || dreg != sreg)
549 break;
550 }
551
552 if (i < 0)
553 delete_insn (insn);
554 }
555 /* Also delete insns to store bit fields if they are no-ops. */
556 /* Not worth the hair to detect this in the big-endian case. */
557 else if (! BYTES_BIG_ENDIAN
558 && GET_CODE (body) == SET
559 && GET_CODE (SET_DEST (body)) == ZERO_EXTRACT
560 && XEXP (SET_DEST (body), 2) == const0_rtx
561 && XEXP (SET_DEST (body), 0) == SET_SRC (body)
562 && ! (GET_CODE (SET_SRC (body)) == MEM
563 && MEM_VOLATILE_P (SET_SRC (body))))
564 delete_insn (insn);
565 }
566 insn = next;
567 }
568
569 /* If we haven't yet gotten to reload and we have just run regscan,
570 delete any insn that sets a register that isn't used elsewhere.
571 This helps some of the optimizations below by having less insns
572 being jumped around. */
573
574 if (! reload_completed && after_regscan)
575 for (insn = f; insn; insn = next)
576 {
577 rtx set = single_set (insn);
578
579 next = NEXT_INSN (insn);
580
581 if (set && GET_CODE (SET_DEST (set)) == REG
582 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
583 && REGNO_FIRST_UID (REGNO (SET_DEST (set))) == INSN_UID (insn)
584 /* We use regno_last_note_uid so as not to delete the setting
585 of a reg that's used in notes. A subsequent optimization
586 might arrange to use that reg for real. */
587 && REGNO_LAST_NOTE_UID (REGNO (SET_DEST (set))) == INSN_UID (insn)
588 && ! side_effects_p (SET_SRC (set))
589 && ! find_reg_note (insn, REG_RETVAL, 0))
590 delete_insn (insn);
591 }
592
593 /* Now iterate optimizing jumps until nothing changes over one pass. */
594 changed = 1;
595 old_max_reg = max_reg_num ();
596 while (changed)
597 {
598 changed = 0;
599
600 for (insn = f; insn; insn = next)
601 {
602 rtx reallabelprev;
603 rtx temp, temp1, temp2, temp3, temp4, temp5, temp6;
604 rtx nlabel;
605 int this_is_simplejump, this_is_condjump, reversep = 0;
606 int this_is_condjump_in_parallel;
607
608 #if 0
609 /* If NOT the first iteration, if this is the last jump pass
610 (just before final), do the special peephole optimizations.
611 Avoiding the first iteration gives ordinary jump opts
612 a chance to work before peephole opts. */
613
614 if (reload_completed && !first && !flag_no_peephole)
615 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
616 peephole (insn);
617 #endif
618
619 /* That could have deleted some insns after INSN, so check now
620 what the following insn is. */
621
622 next = NEXT_INSN (insn);
623
624 /* See if this is a NOTE_INSN_LOOP_BEG followed by an unconditional
625 jump. Try to optimize by duplicating the loop exit test if so.
626 This is only safe immediately after regscan, because it uses
627 the values of regno_first_uid and regno_last_uid. */
628 if (after_regscan && GET_CODE (insn) == NOTE
629 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
630 && (temp1 = next_nonnote_insn (insn)) != 0
631 && simplejump_p (temp1))
632 {
633 temp = PREV_INSN (insn);
634 if (duplicate_loop_exit_test (insn))
635 {
636 changed = 1;
637 next = NEXT_INSN (temp);
638 continue;
639 }
640 }
641
642 if (GET_CODE (insn) != JUMP_INSN)
643 continue;
644
645 this_is_simplejump = simplejump_p (insn);
646 this_is_condjump = condjump_p (insn);
647 this_is_condjump_in_parallel = condjump_in_parallel_p (insn);
648
649 /* Tension the labels in dispatch tables. */
650
651 if (GET_CODE (PATTERN (insn)) == ADDR_VEC)
652 changed |= tension_vector_labels (PATTERN (insn), 0);
653 if (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
654 changed |= tension_vector_labels (PATTERN (insn), 1);
655
656 /* If a dispatch table always goes to the same place,
657 get rid of it and replace the insn that uses it. */
658
659 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
660 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
661 {
662 int i;
663 rtx pat = PATTERN (insn);
664 int diff_vec_p = GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC;
665 int len = XVECLEN (pat, diff_vec_p);
666 rtx dispatch = prev_real_insn (insn);
667
668 for (i = 0; i < len; i++)
669 if (XEXP (XVECEXP (pat, diff_vec_p, i), 0)
670 != XEXP (XVECEXP (pat, diff_vec_p, 0), 0))
671 break;
672 if (i == len
673 && dispatch != 0
674 && GET_CODE (dispatch) == JUMP_INSN
675 && JUMP_LABEL (dispatch) != 0
676 /* Don't mess with a casesi insn. */
677 && !(GET_CODE (PATTERN (dispatch)) == SET
678 && (GET_CODE (SET_SRC (PATTERN (dispatch)))
679 == IF_THEN_ELSE))
680 && next_real_insn (JUMP_LABEL (dispatch)) == insn)
681 {
682 redirect_tablejump (dispatch,
683 XEXP (XVECEXP (pat, diff_vec_p, 0), 0));
684 changed = 1;
685 }
686 }
687
688 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
689
690 /* If a jump references the end of the function, try to turn
691 it into a RETURN insn, possibly a conditional one. */
692 if (JUMP_LABEL (insn)
693 && (next_active_insn (JUMP_LABEL (insn)) == 0
694 || GET_CODE (PATTERN (next_active_insn (JUMP_LABEL (insn))))
695 == RETURN))
696 changed |= redirect_jump (insn, NULL_RTX);
697
698 /* Detect jump to following insn. */
699 if (reallabelprev == insn && condjump_p (insn))
700 {
701 next = next_real_insn (JUMP_LABEL (insn));
702 delete_jump (insn);
703 changed = 1;
704 continue;
705 }
706
707 /* If we have an unconditional jump preceded by a USE, try to put
708 the USE before the target and jump there. This simplifies many
709 of the optimizations below since we don't have to worry about
710 dealing with these USE insns. We only do this if the label
711 being branch to already has the identical USE or if code
712 never falls through to that label. */
713
714 if (this_is_simplejump
715 && (temp = prev_nonnote_insn (insn)) != 0
716 && GET_CODE (temp) == INSN && GET_CODE (PATTERN (temp)) == USE
717 && (temp1 = prev_nonnote_insn (JUMP_LABEL (insn))) != 0
718 && (GET_CODE (temp1) == BARRIER
719 || (GET_CODE (temp1) == INSN
720 && rtx_equal_p (PATTERN (temp), PATTERN (temp1))))
721 /* Don't do this optimization if we have a loop containing only
722 the USE instruction, and the loop start label has a usage
723 count of 1. This is because we will redo this optimization
724 everytime through the outer loop, and jump opt will never
725 exit. */
726 && ! ((temp2 = prev_nonnote_insn (temp)) != 0
727 && temp2 == JUMP_LABEL (insn)
728 && LABEL_NUSES (temp2) == 1))
729 {
730 if (GET_CODE (temp1) == BARRIER)
731 {
732 emit_insn_after (PATTERN (temp), temp1);
733 temp1 = NEXT_INSN (temp1);
734 }
735
736 delete_insn (temp);
737 redirect_jump (insn, get_label_before (temp1));
738 reallabelprev = prev_real_insn (temp1);
739 changed = 1;
740 }
741
742 /* Simplify if (...) x = a; else x = b; by converting it
743 to x = b; if (...) x = a;
744 if B is sufficiently simple, the test doesn't involve X,
745 and nothing in the test modifies B or X.
746
747 If we have small register classes, we also can't do this if X
748 is a hard register.
749
750 If the "x = b;" insn has any REG_NOTES, we don't do this because
751 of the possibility that we are running after CSE and there is a
752 REG_EQUAL note that is only valid if the branch has already been
753 taken. If we move the insn with the REG_EQUAL note, we may
754 fold the comparison to always be false in a later CSE pass.
755 (We could also delete the REG_NOTES when moving the insn, but it
756 seems simpler to not move it.) An exception is that we can move
757 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
758 value is the same as "b".
759
760 INSN is the branch over the `else' part.
761
762 We set:
763
764 TEMP to the jump insn preceding "x = a;"
765 TEMP1 to X
766 TEMP2 to the insn that sets "x = b;"
767 TEMP3 to the insn that sets "x = a;"
768 TEMP4 to the set of "x = b"; */
769
770 if (this_is_simplejump
771 && (temp3 = prev_active_insn (insn)) != 0
772 && GET_CODE (temp3) == INSN
773 && (temp4 = single_set (temp3)) != 0
774 && GET_CODE (temp1 = SET_DEST (temp4)) == REG
775 && (! SMALL_REGISTER_CLASSES
776 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
777 && (temp2 = next_active_insn (insn)) != 0
778 && GET_CODE (temp2) == INSN
779 && (temp4 = single_set (temp2)) != 0
780 && rtx_equal_p (SET_DEST (temp4), temp1)
781 && ! side_effects_p (SET_SRC (temp4))
782 && ! may_trap_p (SET_SRC (temp4))
783 && (REG_NOTES (temp2) == 0
784 || ((REG_NOTE_KIND (REG_NOTES (temp2)) == REG_EQUAL
785 || REG_NOTE_KIND (REG_NOTES (temp2)) == REG_EQUIV)
786 && XEXP (REG_NOTES (temp2), 1) == 0
787 && rtx_equal_p (XEXP (REG_NOTES (temp2), 0),
788 SET_SRC (temp4))))
789 && (temp = prev_active_insn (temp3)) != 0
790 && condjump_p (temp) && ! simplejump_p (temp)
791 /* TEMP must skip over the "x = a;" insn */
792 && prev_real_insn (JUMP_LABEL (temp)) == insn
793 && no_labels_between_p (insn, JUMP_LABEL (temp))
794 /* There must be no other entries to the "x = b;" insn. */
795 && no_labels_between_p (JUMP_LABEL (temp), temp2)
796 /* INSN must either branch to the insn after TEMP2 or the insn
797 after TEMP2 must branch to the same place as INSN. */
798 && (reallabelprev == temp2
799 || ((temp5 = next_active_insn (temp2)) != 0
800 && simplejump_p (temp5)
801 && JUMP_LABEL (temp5) == JUMP_LABEL (insn))))
802 {
803 /* The test expression, X, may be a complicated test with
804 multiple branches. See if we can find all the uses of
805 the label that TEMP branches to without hitting a CALL_INSN
806 or a jump to somewhere else. */
807 rtx target = JUMP_LABEL (temp);
808 int nuses = LABEL_NUSES (target);
809 rtx p;
810 #ifdef HAVE_cc0
811 rtx q;
812 #endif
813
814 /* Set P to the first jump insn that goes around "x = a;". */
815 for (p = temp; nuses && p; p = prev_nonnote_insn (p))
816 {
817 if (GET_CODE (p) == JUMP_INSN)
818 {
819 if (condjump_p (p) && ! simplejump_p (p)
820 && JUMP_LABEL (p) == target)
821 {
822 nuses--;
823 if (nuses == 0)
824 break;
825 }
826 else
827 break;
828 }
829 else if (GET_CODE (p) == CALL_INSN)
830 break;
831 }
832
833 #ifdef HAVE_cc0
834 /* We cannot insert anything between a set of cc and its use
835 so if P uses cc0, we must back up to the previous insn. */
836 q = prev_nonnote_insn (p);
837 if (q && GET_RTX_CLASS (GET_CODE (q)) == 'i'
838 && sets_cc0_p (PATTERN (q)))
839 p = q;
840 #endif
841
842 if (p)
843 p = PREV_INSN (p);
844
845 /* If we found all the uses and there was no data conflict, we
846 can move the assignment unless we can branch into the middle
847 from somewhere. */
848 if (nuses == 0 && p
849 && no_labels_between_p (p, insn)
850 && ! reg_referenced_between_p (temp1, p, NEXT_INSN (temp3))
851 && ! reg_set_between_p (temp1, p, temp3)
852 && (GET_CODE (SET_SRC (temp4)) == CONST_INT
853 || ! modified_between_p (SET_SRC (temp4), p, temp2)))
854 {
855 emit_insn_after_with_line_notes (PATTERN (temp2), p, temp2);
856 delete_insn (temp2);
857
858 /* Set NEXT to an insn that we know won't go away. */
859 next = next_active_insn (insn);
860
861 /* Delete the jump around the set. Note that we must do
862 this before we redirect the test jumps so that it won't
863 delete the code immediately following the assignment
864 we moved (which might be a jump). */
865
866 delete_insn (insn);
867
868 /* We either have two consecutive labels or a jump to
869 a jump, so adjust all the JUMP_INSNs to branch to where
870 INSN branches to. */
871 for (p = NEXT_INSN (p); p != next; p = NEXT_INSN (p))
872 if (GET_CODE (p) == JUMP_INSN)
873 redirect_jump (p, target);
874
875 changed = 1;
876 continue;
877 }
878 }
879
880 /* Simplify if (...) { x = a; goto l; } x = b; by converting it
881 to x = a; if (...) goto l; x = b;
882 if A is sufficiently simple, the test doesn't involve X,
883 and nothing in the test modifies A or X.
884
885 If we have small register classes, we also can't do this if X
886 is a hard register.
887
888 If the "x = a;" insn has any REG_NOTES, we don't do this because
889 of the possibility that we are running after CSE and there is a
890 REG_EQUAL note that is only valid if the branch has already been
891 taken. If we move the insn with the REG_EQUAL note, we may
892 fold the comparison to always be false in a later CSE pass.
893 (We could also delete the REG_NOTES when moving the insn, but it
894 seems simpler to not move it.) An exception is that we can move
895 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
896 value is the same as "a".
897
898 INSN is the goto.
899
900 We set:
901
902 TEMP to the jump insn preceding "x = a;"
903 TEMP1 to X
904 TEMP2 to the insn that sets "x = b;"
905 TEMP3 to the insn that sets "x = a;"
906 TEMP4 to the set of "x = a"; */
907
908 if (this_is_simplejump
909 && (temp2 = next_active_insn (insn)) != 0
910 && GET_CODE (temp2) == INSN
911 && (temp4 = single_set (temp2)) != 0
912 && GET_CODE (temp1 = SET_DEST (temp4)) == REG
913 && (! SMALL_REGISTER_CLASSES
914 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
915 && (temp3 = prev_active_insn (insn)) != 0
916 && GET_CODE (temp3) == INSN
917 && (temp4 = single_set (temp3)) != 0
918 && rtx_equal_p (SET_DEST (temp4), temp1)
919 && ! side_effects_p (SET_SRC (temp4))
920 && ! may_trap_p (SET_SRC (temp4))
921 && (REG_NOTES (temp3) == 0
922 || ((REG_NOTE_KIND (REG_NOTES (temp3)) == REG_EQUAL
923 || REG_NOTE_KIND (REG_NOTES (temp3)) == REG_EQUIV)
924 && XEXP (REG_NOTES (temp3), 1) == 0
925 && rtx_equal_p (XEXP (REG_NOTES (temp3), 0),
926 SET_SRC (temp4))))
927 && (temp = prev_active_insn (temp3)) != 0
928 && condjump_p (temp) && ! simplejump_p (temp)
929 /* TEMP must skip over the "x = a;" insn */
930 && prev_real_insn (JUMP_LABEL (temp)) == insn
931 && no_labels_between_p (temp, insn))
932 {
933 rtx prev_label = JUMP_LABEL (temp);
934 rtx insert_after = prev_nonnote_insn (temp);
935
936 #ifdef HAVE_cc0
937 /* We cannot insert anything between a set of cc and its use. */
938 if (insert_after && GET_RTX_CLASS (GET_CODE (insert_after)) == 'i'
939 && sets_cc0_p (PATTERN (insert_after)))
940 insert_after = prev_nonnote_insn (insert_after);
941 #endif
942 ++LABEL_NUSES (prev_label);
943
944 if (insert_after
945 && no_labels_between_p (insert_after, temp)
946 && ! reg_referenced_between_p (temp1, insert_after, temp3)
947 && ! reg_referenced_between_p (temp1, temp3,
948 NEXT_INSN (temp2))
949 && ! reg_set_between_p (temp1, insert_after, temp)
950 && ! modified_between_p (SET_SRC (temp4), insert_after, temp)
951 && invert_jump (temp, JUMP_LABEL (insn)))
952 {
953 emit_insn_after_with_line_notes (PATTERN (temp3),
954 insert_after, temp3);
955 delete_insn (temp3);
956 delete_insn (insn);
957 /* Set NEXT to an insn that we know won't go away. */
958 next = temp2;
959 changed = 1;
960 }
961 if (prev_label && --LABEL_NUSES (prev_label) == 0)
962 delete_insn (prev_label);
963 if (changed)
964 continue;
965 }
966
967 #ifndef HAVE_cc0
968 /* If we have if (...) x = exp; and branches are expensive,
969 EXP is a single insn, does not have any side effects, cannot
970 trap, and is not too costly, convert this to
971 t = exp; if (...) x = t;
972
973 Don't do this when we have CC0 because it is unlikely to help
974 and we'd need to worry about where to place the new insn and
975 the potential for conflicts. We also can't do this when we have
976 notes on the insn for the same reason as above.
977
978 We set:
979
980 TEMP to the "x = exp;" insn.
981 TEMP1 to the single set in the "x = exp;" insn.
982 TEMP2 to "x". */
983
984 if (! reload_completed
985 && this_is_condjump && ! this_is_simplejump
986 && BRANCH_COST >= 3
987 && (temp = next_nonnote_insn (insn)) != 0
988 && GET_CODE (temp) == INSN
989 && REG_NOTES (temp) == 0
990 && (reallabelprev == temp
991 || ((temp2 = next_active_insn (temp)) != 0
992 && simplejump_p (temp2)
993 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
994 && (temp1 = single_set (temp)) != 0
995 && (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
996 && (! SMALL_REGISTER_CLASSES
997 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
998 && GET_CODE (SET_SRC (temp1)) != REG
999 && GET_CODE (SET_SRC (temp1)) != SUBREG
1000 && GET_CODE (SET_SRC (temp1)) != CONST_INT
1001 && ! side_effects_p (SET_SRC (temp1))
1002 && ! may_trap_p (SET_SRC (temp1))
1003 && rtx_cost (SET_SRC (temp1), SET) < 10)
1004 {
1005 rtx new = gen_reg_rtx (GET_MODE (temp2));
1006
1007 if ((temp3 = find_insert_position (insn, temp))
1008 && validate_change (temp, &SET_DEST (temp1), new, 0))
1009 {
1010 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1011 emit_insn_after_with_line_notes (PATTERN (temp),
1012 PREV_INSN (temp3), temp);
1013 delete_insn (temp);
1014 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
1015
1016 if (after_regscan)
1017 {
1018 reg_scan_update (temp3, NEXT_INSN (next), old_max_reg);
1019 old_max_reg = max_reg_num ();
1020 }
1021 }
1022 }
1023
1024 /* Similarly, if it takes two insns to compute EXP but they
1025 have the same destination. Here TEMP3 will be the second
1026 insn and TEMP4 the SET from that insn. */
1027
1028 if (! reload_completed
1029 && this_is_condjump && ! this_is_simplejump
1030 && BRANCH_COST >= 4
1031 && (temp = next_nonnote_insn (insn)) != 0
1032 && GET_CODE (temp) == INSN
1033 && REG_NOTES (temp) == 0
1034 && (temp3 = next_nonnote_insn (temp)) != 0
1035 && GET_CODE (temp3) == INSN
1036 && REG_NOTES (temp3) == 0
1037 && (reallabelprev == temp3
1038 || ((temp2 = next_active_insn (temp3)) != 0
1039 && simplejump_p (temp2)
1040 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
1041 && (temp1 = single_set (temp)) != 0
1042 && (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
1043 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
1044 && (! SMALL_REGISTER_CLASSES
1045 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
1046 && ! side_effects_p (SET_SRC (temp1))
1047 && ! may_trap_p (SET_SRC (temp1))
1048 && rtx_cost (SET_SRC (temp1), SET) < 10
1049 && (temp4 = single_set (temp3)) != 0
1050 && rtx_equal_p (SET_DEST (temp4), temp2)
1051 && ! side_effects_p (SET_SRC (temp4))
1052 && ! may_trap_p (SET_SRC (temp4))
1053 && rtx_cost (SET_SRC (temp4), SET) < 10)
1054 {
1055 rtx new = gen_reg_rtx (GET_MODE (temp2));
1056
1057 if ((temp5 = find_insert_position (insn, temp))
1058 && (temp6 = find_insert_position (insn, temp3))
1059 && validate_change (temp, &SET_DEST (temp1), new, 0))
1060 {
1061 /* Use the earliest of temp5 and temp6. */
1062 if (temp5 != insn)
1063 temp6 = temp5;
1064 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1065 emit_insn_after_with_line_notes (PATTERN (temp),
1066 PREV_INSN (temp6), temp);
1067 emit_insn_after_with_line_notes
1068 (replace_rtx (PATTERN (temp3), temp2, new),
1069 PREV_INSN (temp6), temp3);
1070 delete_insn (temp);
1071 delete_insn (temp3);
1072 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
1073
1074 if (after_regscan)
1075 {
1076 reg_scan_update (temp6, NEXT_INSN (next), old_max_reg);
1077 old_max_reg = max_reg_num ();
1078 }
1079 }
1080 }
1081
1082 /* Finally, handle the case where two insns are used to
1083 compute EXP but a temporary register is used. Here we must
1084 ensure that the temporary register is not used anywhere else. */
1085
1086 if (! reload_completed
1087 && after_regscan
1088 && this_is_condjump && ! this_is_simplejump
1089 && BRANCH_COST >= 4
1090 && (temp = next_nonnote_insn (insn)) != 0
1091 && GET_CODE (temp) == INSN
1092 && REG_NOTES (temp) == 0
1093 && (temp3 = next_nonnote_insn (temp)) != 0
1094 && GET_CODE (temp3) == INSN
1095 && REG_NOTES (temp3) == 0
1096 && (reallabelprev == temp3
1097 || ((temp2 = next_active_insn (temp3)) != 0
1098 && simplejump_p (temp2)
1099 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
1100 && (temp1 = single_set (temp)) != 0
1101 && (temp5 = SET_DEST (temp1),
1102 (GET_CODE (temp5) == REG
1103 || (GET_CODE (temp5) == SUBREG
1104 && (temp5 = SUBREG_REG (temp5),
1105 GET_CODE (temp5) == REG))))
1106 && REGNO (temp5) >= FIRST_PSEUDO_REGISTER
1107 && REGNO_FIRST_UID (REGNO (temp5)) == INSN_UID (temp)
1108 && REGNO_LAST_UID (REGNO (temp5)) == INSN_UID (temp3)
1109 && ! side_effects_p (SET_SRC (temp1))
1110 && ! may_trap_p (SET_SRC (temp1))
1111 && rtx_cost (SET_SRC (temp1), SET) < 10
1112 && (temp4 = single_set (temp3)) != 0
1113 && (temp2 = SET_DEST (temp4), GET_CODE (temp2) == REG)
1114 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
1115 && (! SMALL_REGISTER_CLASSES
1116 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
1117 && rtx_equal_p (SET_DEST (temp4), temp2)
1118 && ! side_effects_p (SET_SRC (temp4))
1119 && ! may_trap_p (SET_SRC (temp4))
1120 && rtx_cost (SET_SRC (temp4), SET) < 10)
1121 {
1122 rtx new = gen_reg_rtx (GET_MODE (temp2));
1123
1124 if ((temp5 = find_insert_position (insn, temp))
1125 && (temp6 = find_insert_position (insn, temp3))
1126 && validate_change (temp3, &SET_DEST (temp4), new, 0))
1127 {
1128 /* Use the earliest of temp5 and temp6. */
1129 if (temp5 != insn)
1130 temp6 = temp5;
1131 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1132 emit_insn_after_with_line_notes (PATTERN (temp),
1133 PREV_INSN (temp6), temp);
1134 emit_insn_after_with_line_notes (PATTERN (temp3),
1135 PREV_INSN (temp6), temp3);
1136 delete_insn (temp);
1137 delete_insn (temp3);
1138 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
1139
1140 if (after_regscan)
1141 {
1142 reg_scan_update (temp6, NEXT_INSN (next), old_max_reg);
1143 old_max_reg = max_reg_num ();
1144 }
1145 }
1146 }
1147 #endif /* HAVE_cc0 */
1148
1149 /* Try to use a conditional move (if the target has them), or a
1150 store-flag insn. The general case is:
1151
1152 1) x = a; if (...) x = b; and
1153 2) if (...) x = b;
1154
1155 If the jump would be faster, the machine should not have defined
1156 the movcc or scc insns!. These cases are often made by the
1157 previous optimization.
1158
1159 The second case is treated as x = x; if (...) x = b;.
1160
1161 INSN here is the jump around the store. We set:
1162
1163 TEMP to the "x = b;" insn.
1164 TEMP1 to X.
1165 TEMP2 to B.
1166 TEMP3 to A (X in the second case).
1167 TEMP4 to the condition being tested.
1168 TEMP5 to the earliest insn used to find the condition. */
1169
1170 if (/* We can't do this after reload has completed. */
1171 ! reload_completed
1172 && this_is_condjump && ! this_is_simplejump
1173 /* Set TEMP to the "x = b;" insn. */
1174 && (temp = next_nonnote_insn (insn)) != 0
1175 && GET_CODE (temp) == INSN
1176 && GET_CODE (PATTERN (temp)) == SET
1177 && GET_CODE (temp1 = SET_DEST (PATTERN (temp))) == REG
1178 && (! SMALL_REGISTER_CLASSES
1179 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
1180 && ! side_effects_p (temp2 = SET_SRC (PATTERN (temp)))
1181 && ! may_trap_p (temp2)
1182 /* Allow either form, but prefer the former if both apply.
1183 There is no point in using the old value of TEMP1 if
1184 it is a register, since cse will alias them. It can
1185 lose if the old value were a hard register since CSE
1186 won't replace hard registers. Avoid using TEMP3 if
1187 small register classes and it is a hard register. */
1188 && (((temp3 = reg_set_last (temp1, insn)) != 0
1189 && ! (SMALL_REGISTER_CLASSES && GET_CODE (temp3) == REG
1190 && REGNO (temp3) < FIRST_PSEUDO_REGISTER))
1191 /* Make the latter case look like x = x; if (...) x = b; */
1192 || (temp3 = temp1, 1))
1193 /* INSN must either branch to the insn after TEMP or the insn
1194 after TEMP must branch to the same place as INSN. */
1195 && (reallabelprev == temp
1196 || ((temp4 = next_active_insn (temp)) != 0
1197 && simplejump_p (temp4)
1198 && JUMP_LABEL (temp4) == JUMP_LABEL (insn)))
1199 && (temp4 = get_condition (insn, &temp5)) != 0
1200 /* We must be comparing objects whose modes imply the size.
1201 We could handle BLKmode if (1) emit_store_flag could
1202 and (2) we could find the size reliably. */
1203 && GET_MODE (XEXP (temp4, 0)) != BLKmode
1204 /* Even if branches are cheap, the store_flag optimization
1205 can win when the operation to be performed can be
1206 expressed directly. */
1207 #ifdef HAVE_cc0
1208 /* If the previous insn sets CC0 and something else, we can't
1209 do this since we are going to delete that insn. */
1210
1211 && ! ((temp6 = prev_nonnote_insn (insn)) != 0
1212 && GET_CODE (temp6) == INSN
1213 && (sets_cc0_p (PATTERN (temp6)) == -1
1214 || (sets_cc0_p (PATTERN (temp6)) == 1
1215 && FIND_REG_INC_NOTE (temp6, NULL_RTX))))
1216 #endif
1217 )
1218 {
1219 #ifdef HAVE_conditional_move
1220 /* First try a conditional move. */
1221 {
1222 enum rtx_code code = GET_CODE (temp4);
1223 rtx var = temp1;
1224 rtx cond0, cond1, aval, bval;
1225 rtx target;
1226
1227 /* Copy the compared variables into cond0 and cond1, so that
1228 any side effects performed in or after the old comparison,
1229 will not affect our compare which will come later. */
1230 /* ??? Is it possible to just use the comparison in the jump
1231 insn? After all, we're going to delete it. We'd have
1232 to modify emit_conditional_move to take a comparison rtx
1233 instead or write a new function. */
1234 cond0 = gen_reg_rtx (GET_MODE (XEXP (temp4, 0)));
1235 /* We want the target to be able to simplify comparisons with
1236 zero (and maybe other constants as well), so don't create
1237 pseudos for them. There's no need to either. */
1238 if (GET_CODE (XEXP (temp4, 1)) == CONST_INT
1239 || GET_CODE (XEXP (temp4, 1)) == CONST_DOUBLE)
1240 cond1 = XEXP (temp4, 1);
1241 else
1242 cond1 = gen_reg_rtx (GET_MODE (XEXP (temp4, 1)));
1243
1244 aval = temp3;
1245 bval = temp2;
1246
1247 start_sequence ();
1248 target = emit_conditional_move (var, code,
1249 cond0, cond1, VOIDmode,
1250 aval, bval, GET_MODE (var),
1251 (code == LTU || code == GEU
1252 || code == LEU || code == GTU));
1253
1254 if (target)
1255 {
1256 rtx seq1,seq2,last;
1257
1258 /* Save the conditional move sequence but don't emit it
1259 yet. On some machines, like the alpha, it is possible
1260 that temp5 == insn, so next generate the sequence that
1261 saves the compared values and then emit both
1262 sequences ensuring seq1 occurs before seq2. */
1263 seq2 = get_insns ();
1264 end_sequence ();
1265
1266 /* Now that we can't fail, generate the copy insns that
1267 preserve the compared values. */
1268 start_sequence ();
1269 emit_move_insn (cond0, XEXP (temp4, 0));
1270 if (cond1 != XEXP (temp4, 1))
1271 emit_move_insn (cond1, XEXP (temp4, 1));
1272 seq1 = get_insns ();
1273 end_sequence ();
1274
1275 emit_insns_before (seq1, temp5);
1276 /* Insert conditional move after insn, to be sure that
1277 the jump and a possible compare won't be separated */
1278 last = emit_insns_after (seq2, insn);
1279
1280 /* ??? We can also delete the insn that sets X to A.
1281 Flow will do it too though. */
1282 delete_insn (temp);
1283 next = NEXT_INSN (insn);
1284 delete_jump (insn);
1285
1286 if (after_regscan)
1287 {
1288 reg_scan_update (seq1, NEXT_INSN (last), old_max_reg);
1289 old_max_reg = max_reg_num ();
1290 }
1291
1292 changed = 1;
1293 continue;
1294 }
1295 else
1296 end_sequence ();
1297 }
1298 #endif
1299
1300 /* That didn't work, try a store-flag insn.
1301
1302 We further divide the cases into:
1303
1304 1) x = a; if (...) x = b; and either A or B is zero,
1305 2) if (...) x = 0; and jumps are expensive,
1306 3) x = a; if (...) x = b; and A and B are constants where all
1307 the set bits in A are also set in B and jumps are expensive,
1308 4) x = a; if (...) x = b; and A and B non-zero, and jumps are
1309 more expensive, and
1310 5) if (...) x = b; if jumps are even more expensive. */
1311
1312 if (GET_MODE_CLASS (GET_MODE (temp1)) == MODE_INT
1313 && ((GET_CODE (temp3) == CONST_INT)
1314 /* Make the latter case look like
1315 x = x; if (...) x = 0; */
1316 || (temp3 = temp1,
1317 ((BRANCH_COST >= 2
1318 && temp2 == const0_rtx)
1319 || BRANCH_COST >= 3)))
1320 /* If B is zero, OK; if A is zero, can only do (1) if we
1321 can reverse the condition. See if (3) applies possibly
1322 by reversing the condition. Prefer reversing to (4) when
1323 branches are very expensive. */
1324 && (((BRANCH_COST >= 2
1325 || STORE_FLAG_VALUE == -1
1326 || (STORE_FLAG_VALUE == 1
1327 /* Check that the mask is a power of two,
1328 so that it can probably be generated
1329 with a shift. */
1330 && GET_CODE (temp3) == CONST_INT
1331 && exact_log2 (INTVAL (temp3)) >= 0))
1332 && (reversep = 0, temp2 == const0_rtx))
1333 || ((BRANCH_COST >= 2
1334 || STORE_FLAG_VALUE == -1
1335 || (STORE_FLAG_VALUE == 1
1336 && GET_CODE (temp2) == CONST_INT
1337 && exact_log2 (INTVAL (temp2)) >= 0))
1338 && temp3 == const0_rtx
1339 && (reversep = can_reverse_comparison_p (temp4, insn)))
1340 || (BRANCH_COST >= 2
1341 && GET_CODE (temp2) == CONST_INT
1342 && GET_CODE (temp3) == CONST_INT
1343 && ((INTVAL (temp2) & INTVAL (temp3)) == INTVAL (temp2)
1344 || ((INTVAL (temp2) & INTVAL (temp3)) == INTVAL (temp3)
1345 && (reversep = can_reverse_comparison_p (temp4,
1346 insn)))))
1347 || BRANCH_COST >= 3)
1348 )
1349 {
1350 enum rtx_code code = GET_CODE (temp4);
1351 rtx uval, cval, var = temp1;
1352 int normalizep;
1353 rtx target;
1354
1355 /* If necessary, reverse the condition. */
1356 if (reversep)
1357 code = reverse_condition (code), uval = temp2, cval = temp3;
1358 else
1359 uval = temp3, cval = temp2;
1360
1361 /* If CVAL is non-zero, normalize to -1. Otherwise, if UVAL
1362 is the constant 1, it is best to just compute the result
1363 directly. If UVAL is constant and STORE_FLAG_VALUE
1364 includes all of its bits, it is best to compute the flag
1365 value unnormalized and `and' it with UVAL. Otherwise,
1366 normalize to -1 and `and' with UVAL. */
1367 normalizep = (cval != const0_rtx ? -1
1368 : (uval == const1_rtx ? 1
1369 : (GET_CODE (uval) == CONST_INT
1370 && (INTVAL (uval) & ~STORE_FLAG_VALUE) == 0)
1371 ? 0 : -1));
1372
1373 /* We will be putting the store-flag insn immediately in
1374 front of the comparison that was originally being done,
1375 so we know all the variables in TEMP4 will be valid.
1376 However, this might be in front of the assignment of
1377 A to VAR. If it is, it would clobber the store-flag
1378 we will be emitting.
1379
1380 Therefore, emit into a temporary which will be copied to
1381 VAR immediately after TEMP. */
1382
1383 start_sequence ();
1384 target = emit_store_flag (gen_reg_rtx (GET_MODE (var)), code,
1385 XEXP (temp4, 0), XEXP (temp4, 1),
1386 VOIDmode,
1387 (code == LTU || code == LEU
1388 || code == GEU || code == GTU),
1389 normalizep);
1390 if (target)
1391 {
1392 rtx seq;
1393 rtx before = insn;
1394
1395 seq = get_insns ();
1396 end_sequence ();
1397
1398 /* Put the store-flag insns in front of the first insn
1399 used to compute the condition to ensure that we
1400 use the same values of them as the current
1401 comparison. However, the remainder of the insns we
1402 generate will be placed directly in front of the
1403 jump insn, in case any of the pseudos we use
1404 are modified earlier. */
1405
1406 emit_insns_before (seq, temp5);
1407
1408 start_sequence ();
1409
1410 /* Both CVAL and UVAL are non-zero. */
1411 if (cval != const0_rtx && uval != const0_rtx)
1412 {
1413 rtx tem1, tem2;
1414
1415 tem1 = expand_and (uval, target, NULL_RTX);
1416 if (GET_CODE (cval) == CONST_INT
1417 && GET_CODE (uval) == CONST_INT
1418 && (INTVAL (cval) & INTVAL (uval)) == INTVAL (cval))
1419 tem2 = cval;
1420 else
1421 {
1422 tem2 = expand_unop (GET_MODE (var), one_cmpl_optab,
1423 target, NULL_RTX, 0);
1424 tem2 = expand_and (cval, tem2,
1425 (GET_CODE (tem2) == REG
1426 ? tem2 : 0));
1427 }
1428
1429 /* If we usually make new pseudos, do so here. This
1430 turns out to help machines that have conditional
1431 move insns. */
1432 /* ??? Conditional moves have already been handled.
1433 This may be obsolete. */
1434
1435 if (flag_expensive_optimizations)
1436 target = 0;
1437
1438 target = expand_binop (GET_MODE (var), ior_optab,
1439 tem1, tem2, target,
1440 1, OPTAB_WIDEN);
1441 }
1442 else if (normalizep != 1)
1443 {
1444 /* We know that either CVAL or UVAL is zero. If
1445 UVAL is zero, negate TARGET and `and' with CVAL.
1446 Otherwise, `and' with UVAL. */
1447 if (uval == const0_rtx)
1448 {
1449 target = expand_unop (GET_MODE (var), one_cmpl_optab,
1450 target, NULL_RTX, 0);
1451 uval = cval;
1452 }
1453
1454 target = expand_and (uval, target,
1455 (GET_CODE (target) == REG
1456 && ! preserve_subexpressions_p ()
1457 ? target : NULL_RTX));
1458 }
1459
1460 emit_move_insn (var, target);
1461 seq = get_insns ();
1462 end_sequence ();
1463 #ifdef HAVE_cc0
1464 /* If INSN uses CC0, we must not separate it from the
1465 insn that sets cc0. */
1466 if (reg_mentioned_p (cc0_rtx, PATTERN (before)))
1467 before = prev_nonnote_insn (before);
1468 #endif
1469 emit_insns_before (seq, before);
1470
1471 delete_insn (temp);
1472 next = NEXT_INSN (insn);
1473 delete_jump (insn);
1474
1475 if (after_regscan)
1476 {
1477 reg_scan_update (seq, NEXT_INSN (next), old_max_reg);
1478 old_max_reg = max_reg_num ();
1479 }
1480
1481 changed = 1;
1482 continue;
1483 }
1484 else
1485 end_sequence ();
1486 }
1487 }
1488
1489 /* If branches are expensive, convert
1490 if (foo) bar++; to bar += (foo != 0);
1491 and similarly for "bar--;"
1492
1493 INSN is the conditional branch around the arithmetic. We set:
1494
1495 TEMP is the arithmetic insn.
1496 TEMP1 is the SET doing the arithmetic.
1497 TEMP2 is the operand being incremented or decremented.
1498 TEMP3 to the condition being tested.
1499 TEMP4 to the earliest insn used to find the condition. */
1500
1501 if ((BRANCH_COST >= 2
1502 #ifdef HAVE_incscc
1503 || HAVE_incscc
1504 #endif
1505 #ifdef HAVE_decscc
1506 || HAVE_decscc
1507 #endif
1508 )
1509 && ! reload_completed
1510 && this_is_condjump && ! this_is_simplejump
1511 && (temp = next_nonnote_insn (insn)) != 0
1512 && (temp1 = single_set (temp)) != 0
1513 && (temp2 = SET_DEST (temp1),
1514 GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT)
1515 && GET_CODE (SET_SRC (temp1)) == PLUS
1516 && (XEXP (SET_SRC (temp1), 1) == const1_rtx
1517 || XEXP (SET_SRC (temp1), 1) == constm1_rtx)
1518 && rtx_equal_p (temp2, XEXP (SET_SRC (temp1), 0))
1519 && ! side_effects_p (temp2)
1520 && ! may_trap_p (temp2)
1521 /* INSN must either branch to the insn after TEMP or the insn
1522 after TEMP must branch to the same place as INSN. */
1523 && (reallabelprev == temp
1524 || ((temp3 = next_active_insn (temp)) != 0
1525 && simplejump_p (temp3)
1526 && JUMP_LABEL (temp3) == JUMP_LABEL (insn)))
1527 && (temp3 = get_condition (insn, &temp4)) != 0
1528 /* We must be comparing objects whose modes imply the size.
1529 We could handle BLKmode if (1) emit_store_flag could
1530 and (2) we could find the size reliably. */
1531 && GET_MODE (XEXP (temp3, 0)) != BLKmode
1532 && can_reverse_comparison_p (temp3, insn))
1533 {
1534 rtx temp6, target = 0, seq, init_insn = 0, init = temp2;
1535 enum rtx_code code = reverse_condition (GET_CODE (temp3));
1536
1537 start_sequence ();
1538
1539 /* It must be the case that TEMP2 is not modified in the range
1540 [TEMP4, INSN). The one exception we make is if the insn
1541 before INSN sets TEMP2 to something which is also unchanged
1542 in that range. In that case, we can move the initialization
1543 into our sequence. */
1544
1545 if ((temp5 = prev_active_insn (insn)) != 0
1546 && no_labels_between_p (temp5, insn)
1547 && GET_CODE (temp5) == INSN
1548 && (temp6 = single_set (temp5)) != 0
1549 && rtx_equal_p (temp2, SET_DEST (temp6))
1550 && (CONSTANT_P (SET_SRC (temp6))
1551 || GET_CODE (SET_SRC (temp6)) == REG
1552 || GET_CODE (SET_SRC (temp6)) == SUBREG))
1553 {
1554 emit_insn (PATTERN (temp5));
1555 init_insn = temp5;
1556 init = SET_SRC (temp6);
1557 }
1558
1559 if (CONSTANT_P (init)
1560 || ! reg_set_between_p (init, PREV_INSN (temp4), insn))
1561 target = emit_store_flag (gen_reg_rtx (GET_MODE (temp2)), code,
1562 XEXP (temp3, 0), XEXP (temp3, 1),
1563 VOIDmode,
1564 (code == LTU || code == LEU
1565 || code == GTU || code == GEU), 1);
1566
1567 /* If we can do the store-flag, do the addition or
1568 subtraction. */
1569
1570 if (target)
1571 target = expand_binop (GET_MODE (temp2),
1572 (XEXP (SET_SRC (temp1), 1) == const1_rtx
1573 ? add_optab : sub_optab),
1574 temp2, target, temp2, 0, OPTAB_WIDEN);
1575
1576 if (target != 0)
1577 {
1578 /* Put the result back in temp2 in case it isn't already.
1579 Then replace the jump, possible a CC0-setting insn in
1580 front of the jump, and TEMP, with the sequence we have
1581 made. */
1582
1583 if (target != temp2)
1584 emit_move_insn (temp2, target);
1585
1586 seq = get_insns ();
1587 end_sequence ();
1588
1589 emit_insns_before (seq, temp4);
1590 delete_insn (temp);
1591
1592 if (init_insn)
1593 delete_insn (init_insn);
1594
1595 next = NEXT_INSN (insn);
1596 #ifdef HAVE_cc0
1597 delete_insn (prev_nonnote_insn (insn));
1598 #endif
1599 delete_insn (insn);
1600
1601 if (after_regscan)
1602 {
1603 reg_scan_update (seq, NEXT_INSN (next), old_max_reg);
1604 old_max_reg = max_reg_num ();
1605 }
1606
1607 changed = 1;
1608 continue;
1609 }
1610 else
1611 end_sequence ();
1612 }
1613
1614 /* Simplify if (...) x = 1; else {...} if (x) ...
1615 We recognize this case scanning backwards as well.
1616
1617 TEMP is the assignment to x;
1618 TEMP1 is the label at the head of the second if. */
1619 /* ?? This should call get_condition to find the values being
1620 compared, instead of looking for a COMPARE insn when HAVE_cc0
1621 is not defined. This would allow it to work on the m88k. */
1622 /* ?? This optimization is only safe before cse is run if HAVE_cc0
1623 is not defined and the condition is tested by a separate compare
1624 insn. This is because the code below assumes that the result
1625 of the compare dies in the following branch.
1626
1627 Not only that, but there might be other insns between the
1628 compare and branch whose results are live. Those insns need
1629 to be executed.
1630
1631 A way to fix this is to move the insns at JUMP_LABEL (insn)
1632 to before INSN. If we are running before flow, they will
1633 be deleted if they aren't needed. But this doesn't work
1634 well after flow.
1635
1636 This is really a special-case of jump threading, anyway. The
1637 right thing to do is to replace this and jump threading with
1638 much simpler code in cse.
1639
1640 This code has been turned off in the non-cc0 case in the
1641 meantime. */
1642
1643 #ifdef HAVE_cc0
1644 else if (this_is_simplejump
1645 /* Safe to skip USE and CLOBBER insns here
1646 since they will not be deleted. */
1647 && (temp = prev_active_insn (insn))
1648 && no_labels_between_p (temp, insn)
1649 && GET_CODE (temp) == INSN
1650 && GET_CODE (PATTERN (temp)) == SET
1651 && GET_CODE (SET_DEST (PATTERN (temp))) == REG
1652 && CONSTANT_P (SET_SRC (PATTERN (temp)))
1653 && (temp1 = next_active_insn (JUMP_LABEL (insn)))
1654 /* If we find that the next value tested is `x'
1655 (TEMP1 is the insn where this happens), win. */
1656 && GET_CODE (temp1) == INSN
1657 && GET_CODE (PATTERN (temp1)) == SET
1658 #ifdef HAVE_cc0
1659 /* Does temp1 `tst' the value of x? */
1660 && SET_SRC (PATTERN (temp1)) == SET_DEST (PATTERN (temp))
1661 && SET_DEST (PATTERN (temp1)) == cc0_rtx
1662 && (temp1 = next_nonnote_insn (temp1))
1663 #else
1664 /* Does temp1 compare the value of x against zero? */
1665 && GET_CODE (SET_SRC (PATTERN (temp1))) == COMPARE
1666 && XEXP (SET_SRC (PATTERN (temp1)), 1) == const0_rtx
1667 && (XEXP (SET_SRC (PATTERN (temp1)), 0)
1668 == SET_DEST (PATTERN (temp)))
1669 && GET_CODE (SET_DEST (PATTERN (temp1))) == REG
1670 && (temp1 = find_next_ref (SET_DEST (PATTERN (temp1)), temp1))
1671 #endif
1672 && condjump_p (temp1))
1673 {
1674 /* Get the if_then_else from the condjump. */
1675 rtx choice = SET_SRC (PATTERN (temp1));
1676 if (GET_CODE (choice) == IF_THEN_ELSE)
1677 {
1678 enum rtx_code code = GET_CODE (XEXP (choice, 0));
1679 rtx val = SET_SRC (PATTERN (temp));
1680 rtx cond
1681 = simplify_relational_operation (code, GET_MODE (SET_DEST (PATTERN (temp))),
1682 val, const0_rtx);
1683 rtx ultimate;
1684
1685 if (cond == const_true_rtx)
1686 ultimate = XEXP (choice, 1);
1687 else if (cond == const0_rtx)
1688 ultimate = XEXP (choice, 2);
1689 else
1690 ultimate = 0;
1691
1692 if (ultimate == pc_rtx)
1693 ultimate = get_label_after (temp1);
1694 else if (ultimate && GET_CODE (ultimate) != RETURN)
1695 ultimate = XEXP (ultimate, 0);
1696
1697 if (ultimate && JUMP_LABEL(insn) != ultimate)
1698 changed |= redirect_jump (insn, ultimate);
1699 }
1700 }
1701 #endif
1702
1703 #if 0
1704 /* @@ This needs a bit of work before it will be right.
1705
1706 Any type of comparison can be accepted for the first and
1707 second compare. When rewriting the first jump, we must
1708 compute the what conditions can reach label3, and use the
1709 appropriate code. We can not simply reverse/swap the code
1710 of the first jump. In some cases, the second jump must be
1711 rewritten also.
1712
1713 For example,
1714 < == converts to > ==
1715 < != converts to == >
1716 etc.
1717
1718 If the code is written to only accept an '==' test for the second
1719 compare, then all that needs to be done is to swap the condition
1720 of the first branch.
1721
1722 It is questionable whether we want this optimization anyways,
1723 since if the user wrote code like this because he/she knew that
1724 the jump to label1 is taken most of the time, then rewriting
1725 this gives slower code. */
1726 /* @@ This should call get_condition to find the values being
1727 compared, instead of looking for a COMPARE insn when HAVE_cc0
1728 is not defined. This would allow it to work on the m88k. */
1729 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1730 is not defined and the condition is tested by a separate compare
1731 insn. This is because the code below assumes that the result
1732 of the compare dies in the following branch. */
1733
1734 /* Simplify test a ~= b
1735 condjump label1;
1736 test a == b
1737 condjump label2;
1738 jump label3;
1739 label1:
1740
1741 rewriting as
1742 test a ~~= b
1743 condjump label3
1744 test a == b
1745 condjump label2
1746 label1:
1747
1748 where ~= is an inequality, e.g. >, and ~~= is the swapped
1749 inequality, e.g. <.
1750
1751 We recognize this case scanning backwards.
1752
1753 TEMP is the conditional jump to `label2';
1754 TEMP1 is the test for `a == b';
1755 TEMP2 is the conditional jump to `label1';
1756 TEMP3 is the test for `a ~= b'. */
1757 else if (this_is_simplejump
1758 && (temp = prev_active_insn (insn))
1759 && no_labels_between_p (temp, insn)
1760 && condjump_p (temp)
1761 && (temp1 = prev_active_insn (temp))
1762 && no_labels_between_p (temp1, temp)
1763 && GET_CODE (temp1) == INSN
1764 && GET_CODE (PATTERN (temp1)) == SET
1765 #ifdef HAVE_cc0
1766 && sets_cc0_p (PATTERN (temp1)) == 1
1767 #else
1768 && GET_CODE (SET_SRC (PATTERN (temp1))) == COMPARE
1769 && GET_CODE (SET_DEST (PATTERN (temp1))) == REG
1770 && (temp == find_next_ref (SET_DEST (PATTERN (temp1)), temp1))
1771 #endif
1772 && (temp2 = prev_active_insn (temp1))
1773 && no_labels_between_p (temp2, temp1)
1774 && condjump_p (temp2)
1775 && JUMP_LABEL (temp2) == next_nonnote_insn (NEXT_INSN (insn))
1776 && (temp3 = prev_active_insn (temp2))
1777 && no_labels_between_p (temp3, temp2)
1778 && GET_CODE (PATTERN (temp3)) == SET
1779 && rtx_equal_p (SET_DEST (PATTERN (temp3)),
1780 SET_DEST (PATTERN (temp1)))
1781 && rtx_equal_p (SET_SRC (PATTERN (temp1)),
1782 SET_SRC (PATTERN (temp3)))
1783 && ! inequality_comparisons_p (PATTERN (temp))
1784 && inequality_comparisons_p (PATTERN (temp2)))
1785 {
1786 rtx fallthrough_label = JUMP_LABEL (temp2);
1787
1788 ++LABEL_NUSES (fallthrough_label);
1789 if (swap_jump (temp2, JUMP_LABEL (insn)))
1790 {
1791 delete_insn (insn);
1792 changed = 1;
1793 }
1794
1795 if (--LABEL_NUSES (fallthrough_label) == 0)
1796 delete_insn (fallthrough_label);
1797 }
1798 #endif
1799 /* Simplify if (...) {... x = 1;} if (x) ...
1800
1801 We recognize this case backwards.
1802
1803 TEMP is the test of `x';
1804 TEMP1 is the assignment to `x' at the end of the
1805 previous statement. */
1806 /* @@ This should call get_condition to find the values being
1807 compared, instead of looking for a COMPARE insn when HAVE_cc0
1808 is not defined. This would allow it to work on the m88k. */
1809 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1810 is not defined and the condition is tested by a separate compare
1811 insn. This is because the code below assumes that the result
1812 of the compare dies in the following branch. */
1813
1814 /* ??? This has to be turned off. The problem is that the
1815 unconditional jump might indirectly end up branching to the
1816 label between TEMP1 and TEMP. We can't detect this, in general,
1817 since it may become a jump to there after further optimizations.
1818 If that jump is done, it will be deleted, so we will retry
1819 this optimization in the next pass, thus an infinite loop.
1820
1821 The present code prevents this by putting the jump after the
1822 label, but this is not logically correct. */
1823 #if 0
1824 else if (this_is_condjump
1825 /* Safe to skip USE and CLOBBER insns here
1826 since they will not be deleted. */
1827 && (temp = prev_active_insn (insn))
1828 && no_labels_between_p (temp, insn)
1829 && GET_CODE (temp) == INSN
1830 && GET_CODE (PATTERN (temp)) == SET
1831 #ifdef HAVE_cc0
1832 && sets_cc0_p (PATTERN (temp)) == 1
1833 && GET_CODE (SET_SRC (PATTERN (temp))) == REG
1834 #else
1835 /* Temp must be a compare insn, we can not accept a register
1836 to register move here, since it may not be simply a
1837 tst insn. */
1838 && GET_CODE (SET_SRC (PATTERN (temp))) == COMPARE
1839 && XEXP (SET_SRC (PATTERN (temp)), 1) == const0_rtx
1840 && GET_CODE (XEXP (SET_SRC (PATTERN (temp)), 0)) == REG
1841 && GET_CODE (SET_DEST (PATTERN (temp))) == REG
1842 && insn == find_next_ref (SET_DEST (PATTERN (temp)), temp)
1843 #endif
1844 /* May skip USE or CLOBBER insns here
1845 for checking for opportunity, since we
1846 take care of them later. */
1847 && (temp1 = prev_active_insn (temp))
1848 && GET_CODE (temp1) == INSN
1849 && GET_CODE (PATTERN (temp1)) == SET
1850 #ifdef HAVE_cc0
1851 && SET_SRC (PATTERN (temp)) == SET_DEST (PATTERN (temp1))
1852 #else
1853 && (XEXP (SET_SRC (PATTERN (temp)), 0)
1854 == SET_DEST (PATTERN (temp1)))
1855 #endif
1856 && CONSTANT_P (SET_SRC (PATTERN (temp1)))
1857 /* If this isn't true, cse will do the job. */
1858 && ! no_labels_between_p (temp1, temp))
1859 {
1860 /* Get the if_then_else from the condjump. */
1861 rtx choice = SET_SRC (PATTERN (insn));
1862 if (GET_CODE (choice) == IF_THEN_ELSE
1863 && (GET_CODE (XEXP (choice, 0)) == EQ
1864 || GET_CODE (XEXP (choice, 0)) == NE))
1865 {
1866 int want_nonzero = (GET_CODE (XEXP (choice, 0)) == NE);
1867 rtx last_insn;
1868 rtx ultimate;
1869 rtx p;
1870
1871 /* Get the place that condjump will jump to
1872 if it is reached from here. */
1873 if ((SET_SRC (PATTERN (temp1)) != const0_rtx)
1874 == want_nonzero)
1875 ultimate = XEXP (choice, 1);
1876 else
1877 ultimate = XEXP (choice, 2);
1878 /* Get it as a CODE_LABEL. */
1879 if (ultimate == pc_rtx)
1880 ultimate = get_label_after (insn);
1881 else
1882 /* Get the label out of the LABEL_REF. */
1883 ultimate = XEXP (ultimate, 0);
1884
1885 /* Insert the jump immediately before TEMP, specifically
1886 after the label that is between TEMP1 and TEMP. */
1887 last_insn = PREV_INSN (temp);
1888
1889 /* If we would be branching to the next insn, the jump
1890 would immediately be deleted and the re-inserted in
1891 a subsequent pass over the code. So don't do anything
1892 in that case. */
1893 if (next_active_insn (last_insn)
1894 != next_active_insn (ultimate))
1895 {
1896 emit_barrier_after (last_insn);
1897 p = emit_jump_insn_after (gen_jump (ultimate),
1898 last_insn);
1899 JUMP_LABEL (p) = ultimate;
1900 ++LABEL_NUSES (ultimate);
1901 if (INSN_UID (ultimate) < max_jump_chain
1902 && INSN_CODE (p) < max_jump_chain)
1903 {
1904 jump_chain[INSN_UID (p)]
1905 = jump_chain[INSN_UID (ultimate)];
1906 jump_chain[INSN_UID (ultimate)] = p;
1907 }
1908 changed = 1;
1909 continue;
1910 }
1911 }
1912 }
1913 #endif
1914 /* Detect a conditional jump going to the same place
1915 as an immediately following unconditional jump. */
1916 else if (this_is_condjump
1917 && (temp = next_active_insn (insn)) != 0
1918 && simplejump_p (temp)
1919 && (next_active_insn (JUMP_LABEL (insn))
1920 == next_active_insn (JUMP_LABEL (temp))))
1921 {
1922 rtx tem = temp;
1923
1924 /* ??? Optional. Disables some optimizations, but makes
1925 gcov output more accurate with -O. */
1926 if (flag_test_coverage && !reload_completed)
1927 for (tem = insn; tem != temp; tem = NEXT_INSN (tem))
1928 if (GET_CODE (tem) == NOTE && NOTE_LINE_NUMBER (tem) > 0)
1929 break;
1930
1931 if (tem == temp)
1932 {
1933 delete_jump (insn);
1934 changed = 1;
1935 continue;
1936 }
1937 }
1938 #ifdef HAVE_trap
1939 /* Detect a conditional jump jumping over an unconditional trap. */
1940 else if (HAVE_trap
1941 && this_is_condjump && ! this_is_simplejump
1942 && reallabelprev != 0
1943 && GET_CODE (reallabelprev) == INSN
1944 && GET_CODE (PATTERN (reallabelprev)) == TRAP_IF
1945 && TRAP_CONDITION (PATTERN (reallabelprev)) == const_true_rtx
1946 && prev_active_insn (reallabelprev) == insn
1947 && no_labels_between_p (insn, reallabelprev)
1948 && (temp2 = get_condition (insn, &temp4))
1949 && can_reverse_comparison_p (temp2, insn))
1950 {
1951 rtx new = gen_cond_trap (reverse_condition (GET_CODE (temp2)),
1952 XEXP (temp2, 0), XEXP (temp2, 1),
1953 TRAP_CODE (PATTERN (reallabelprev)));
1954
1955 if (new)
1956 {
1957 emit_insn_before (new, temp4);
1958 delete_insn (reallabelprev);
1959 delete_jump (insn);
1960 changed = 1;
1961 continue;
1962 }
1963 }
1964 /* Detect a jump jumping to an unconditional trap. */
1965 else if (HAVE_trap && this_is_condjump
1966 && (temp = next_active_insn (JUMP_LABEL (insn)))
1967 && GET_CODE (temp) == INSN
1968 && GET_CODE (PATTERN (temp)) == TRAP_IF
1969 && (this_is_simplejump
1970 || (temp2 = get_condition (insn, &temp4))))
1971 {
1972 rtx tc = TRAP_CONDITION (PATTERN (temp));
1973
1974 if (tc == const_true_rtx
1975 || (! this_is_simplejump && rtx_equal_p (temp2, tc)))
1976 {
1977 rtx new;
1978 /* Replace an unconditional jump to a trap with a trap. */
1979 if (this_is_simplejump)
1980 {
1981 emit_barrier_after (emit_insn_before (gen_trap (), insn));
1982 delete_jump (insn);
1983 changed = 1;
1984 continue;
1985 }
1986 new = gen_cond_trap (GET_CODE (temp2), XEXP (temp2, 0),
1987 XEXP (temp2, 1),
1988 TRAP_CODE (PATTERN (temp)));
1989 if (new)
1990 {
1991 emit_insn_before (new, temp4);
1992 delete_jump (insn);
1993 changed = 1;
1994 continue;
1995 }
1996 }
1997 /* If the trap condition and jump condition are mutually
1998 exclusive, redirect the jump to the following insn. */
1999 else if (GET_RTX_CLASS (GET_CODE (tc)) == '<'
2000 && ! this_is_simplejump
2001 && swap_condition (GET_CODE (temp2)) == GET_CODE (tc)
2002 && rtx_equal_p (XEXP (tc, 0), XEXP (temp2, 0))
2003 && rtx_equal_p (XEXP (tc, 1), XEXP (temp2, 1))
2004 && redirect_jump (insn, get_label_after (temp)))
2005 {
2006 changed = 1;
2007 continue;
2008 }
2009 }
2010 #endif
2011
2012 /* Detect a conditional jump jumping over an unconditional jump. */
2013
2014 else if ((this_is_condjump || this_is_condjump_in_parallel)
2015 && ! this_is_simplejump
2016 && reallabelprev != 0
2017 && GET_CODE (reallabelprev) == JUMP_INSN
2018 && prev_active_insn (reallabelprev) == insn
2019 && no_labels_between_p (insn, reallabelprev)
2020 && simplejump_p (reallabelprev))
2021 {
2022 /* When we invert the unconditional jump, we will be
2023 decrementing the usage count of its old label.
2024 Make sure that we don't delete it now because that
2025 might cause the following code to be deleted. */
2026 rtx prev_uses = prev_nonnote_insn (reallabelprev);
2027 rtx prev_label = JUMP_LABEL (insn);
2028
2029 if (prev_label)
2030 ++LABEL_NUSES (prev_label);
2031
2032 if (invert_jump (insn, JUMP_LABEL (reallabelprev)))
2033 {
2034 /* It is very likely that if there are USE insns before
2035 this jump, they hold REG_DEAD notes. These REG_DEAD
2036 notes are no longer valid due to this optimization,
2037 and will cause the life-analysis that following passes
2038 (notably delayed-branch scheduling) to think that
2039 these registers are dead when they are not.
2040
2041 To prevent this trouble, we just remove the USE insns
2042 from the insn chain. */
2043
2044 while (prev_uses && GET_CODE (prev_uses) == INSN
2045 && GET_CODE (PATTERN (prev_uses)) == USE)
2046 {
2047 rtx useless = prev_uses;
2048 prev_uses = prev_nonnote_insn (prev_uses);
2049 delete_insn (useless);
2050 }
2051
2052 delete_insn (reallabelprev);
2053 next = insn;
2054 changed = 1;
2055 }
2056
2057 /* We can now safely delete the label if it is unreferenced
2058 since the delete_insn above has deleted the BARRIER. */
2059 if (prev_label && --LABEL_NUSES (prev_label) == 0)
2060 delete_insn (prev_label);
2061 continue;
2062 }
2063 else
2064 {
2065 /* Detect a jump to a jump. */
2066
2067 nlabel = follow_jumps (JUMP_LABEL (insn));
2068 if (nlabel != JUMP_LABEL (insn)
2069 && redirect_jump (insn, nlabel))
2070 {
2071 changed = 1;
2072 next = insn;
2073 }
2074
2075 /* Look for if (foo) bar; else break; */
2076 /* The insns look like this:
2077 insn = condjump label1;
2078 ...range1 (some insns)...
2079 jump label2;
2080 label1:
2081 ...range2 (some insns)...
2082 jump somewhere unconditionally
2083 label2: */
2084 {
2085 rtx label1 = next_label (insn);
2086 rtx range1end = label1 ? prev_active_insn (label1) : 0;
2087 /* Don't do this optimization on the first round, so that
2088 jump-around-a-jump gets simplified before we ask here
2089 whether a jump is unconditional.
2090
2091 Also don't do it when we are called after reload since
2092 it will confuse reorg. */
2093 if (! first
2094 && (reload_completed ? ! flag_delayed_branch : 1)
2095 /* Make sure INSN is something we can invert. */
2096 && condjump_p (insn)
2097 && label1 != 0
2098 && JUMP_LABEL (insn) == label1
2099 && LABEL_NUSES (label1) == 1
2100 && GET_CODE (range1end) == JUMP_INSN
2101 && simplejump_p (range1end))
2102 {
2103 rtx label2 = next_label (label1);
2104 rtx range2end = label2 ? prev_active_insn (label2) : 0;
2105 if (range1end != range2end
2106 && JUMP_LABEL (range1end) == label2
2107 && GET_CODE (range2end) == JUMP_INSN
2108 && GET_CODE (NEXT_INSN (range2end)) == BARRIER
2109 /* Invert the jump condition, so we
2110 still execute the same insns in each case. */
2111 && invert_jump (insn, label1))
2112 {
2113 rtx range1beg = next_active_insn (insn);
2114 rtx range2beg = next_active_insn (label1);
2115 rtx range1after, range2after;
2116 rtx range1before, range2before;
2117 rtx rangenext;
2118
2119 /* Include in each range any notes before it, to be
2120 sure that we get the line number note if any, even
2121 if there are other notes here. */
2122 while (PREV_INSN (range1beg)
2123 && GET_CODE (PREV_INSN (range1beg)) == NOTE)
2124 range1beg = PREV_INSN (range1beg);
2125
2126 while (PREV_INSN (range2beg)
2127 && GET_CODE (PREV_INSN (range2beg)) == NOTE)
2128 range2beg = PREV_INSN (range2beg);
2129
2130 /* Don't move NOTEs for blocks or loops; shift them
2131 outside the ranges, where they'll stay put. */
2132 range1beg = squeeze_notes (range1beg, range1end);
2133 range2beg = squeeze_notes (range2beg, range2end);
2134
2135 /* Get current surrounds of the 2 ranges. */
2136 range1before = PREV_INSN (range1beg);
2137 range2before = PREV_INSN (range2beg);
2138 range1after = NEXT_INSN (range1end);
2139 range2after = NEXT_INSN (range2end);
2140
2141 /* Splice range2 where range1 was. */
2142 NEXT_INSN (range1before) = range2beg;
2143 PREV_INSN (range2beg) = range1before;
2144 NEXT_INSN (range2end) = range1after;
2145 PREV_INSN (range1after) = range2end;
2146 /* Splice range1 where range2 was. */
2147 NEXT_INSN (range2before) = range1beg;
2148 PREV_INSN (range1beg) = range2before;
2149 NEXT_INSN (range1end) = range2after;
2150 PREV_INSN (range2after) = range1end;
2151
2152 /* Check for a loop end note between the end of
2153 range2, and the next code label. If there is one,
2154 then what we have really seen is
2155 if (foo) break; end_of_loop;
2156 and moved the break sequence outside the loop.
2157 We must move the LOOP_END note to where the
2158 loop really ends now, or we will confuse loop
2159 optimization. Stop if we find a LOOP_BEG note
2160 first, since we don't want to move the LOOP_END
2161 note in that case. */
2162 for (;range2after != label2; range2after = rangenext)
2163 {
2164 rangenext = NEXT_INSN (range2after);
2165 if (GET_CODE (range2after) == NOTE)
2166 {
2167 if (NOTE_LINE_NUMBER (range2after)
2168 == NOTE_INSN_LOOP_END)
2169 {
2170 NEXT_INSN (PREV_INSN (range2after))
2171 = rangenext;
2172 PREV_INSN (rangenext)
2173 = PREV_INSN (range2after);
2174 PREV_INSN (range2after)
2175 = PREV_INSN (range1beg);
2176 NEXT_INSN (range2after) = range1beg;
2177 NEXT_INSN (PREV_INSN (range1beg))
2178 = range2after;
2179 PREV_INSN (range1beg) = range2after;
2180 }
2181 else if (NOTE_LINE_NUMBER (range2after)
2182 == NOTE_INSN_LOOP_BEG)
2183 break;
2184 }
2185 }
2186 changed = 1;
2187 continue;
2188 }
2189 }
2190 }
2191
2192 /* Now that the jump has been tensioned,
2193 try cross jumping: check for identical code
2194 before the jump and before its target label. */
2195
2196 /* First, cross jumping of conditional jumps: */
2197
2198 if (cross_jump && condjump_p (insn))
2199 {
2200 rtx newjpos, newlpos;
2201 rtx x = prev_real_insn (JUMP_LABEL (insn));
2202
2203 /* A conditional jump may be crossjumped
2204 only if the place it jumps to follows
2205 an opposing jump that comes back here. */
2206
2207 if (x != 0 && ! jump_back_p (x, insn))
2208 /* We have no opposing jump;
2209 cannot cross jump this insn. */
2210 x = 0;
2211
2212 newjpos = 0;
2213 /* TARGET is nonzero if it is ok to cross jump
2214 to code before TARGET. If so, see if matches. */
2215 if (x != 0)
2216 find_cross_jump (insn, x, 2,
2217 &newjpos, &newlpos);
2218
2219 if (newjpos != 0)
2220 {
2221 do_cross_jump (insn, newjpos, newlpos);
2222 /* Make the old conditional jump
2223 into an unconditional one. */
2224 SET_SRC (PATTERN (insn))
2225 = gen_rtx_LABEL_REF (VOIDmode, JUMP_LABEL (insn));
2226 INSN_CODE (insn) = -1;
2227 emit_barrier_after (insn);
2228 /* Add to jump_chain unless this is a new label
2229 whose UID is too large. */
2230 if (INSN_UID (JUMP_LABEL (insn)) < max_jump_chain)
2231 {
2232 jump_chain[INSN_UID (insn)]
2233 = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2234 jump_chain[INSN_UID (JUMP_LABEL (insn))] = insn;
2235 }
2236 changed = 1;
2237 next = insn;
2238 }
2239 }
2240
2241 /* Cross jumping of unconditional jumps:
2242 a few differences. */
2243
2244 if (cross_jump && simplejump_p (insn))
2245 {
2246 rtx newjpos, newlpos;
2247 rtx target;
2248
2249 newjpos = 0;
2250
2251 /* TARGET is nonzero if it is ok to cross jump
2252 to code before TARGET. If so, see if matches. */
2253 find_cross_jump (insn, JUMP_LABEL (insn), 1,
2254 &newjpos, &newlpos);
2255
2256 /* If cannot cross jump to code before the label,
2257 see if we can cross jump to another jump to
2258 the same label. */
2259 /* Try each other jump to this label. */
2260 if (INSN_UID (JUMP_LABEL (insn)) < max_uid)
2261 for (target = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2262 target != 0 && newjpos == 0;
2263 target = jump_chain[INSN_UID (target)])
2264 if (target != insn
2265 && JUMP_LABEL (target) == JUMP_LABEL (insn)
2266 /* Ignore TARGET if it's deleted. */
2267 && ! INSN_DELETED_P (target))
2268 find_cross_jump (insn, target, 2,
2269 &newjpos, &newlpos);
2270
2271 if (newjpos != 0)
2272 {
2273 do_cross_jump (insn, newjpos, newlpos);
2274 changed = 1;
2275 next = insn;
2276 }
2277 }
2278
2279 /* This code was dead in the previous jump.c! */
2280 if (cross_jump && GET_CODE (PATTERN (insn)) == RETURN)
2281 {
2282 /* Return insns all "jump to the same place"
2283 so we can cross-jump between any two of them. */
2284
2285 rtx newjpos, newlpos, target;
2286
2287 newjpos = 0;
2288
2289 /* If cannot cross jump to code before the label,
2290 see if we can cross jump to another jump to
2291 the same label. */
2292 /* Try each other jump to this label. */
2293 for (target = jump_chain[0];
2294 target != 0 && newjpos == 0;
2295 target = jump_chain[INSN_UID (target)])
2296 if (target != insn
2297 && ! INSN_DELETED_P (target)
2298 && GET_CODE (PATTERN (target)) == RETURN)
2299 find_cross_jump (insn, target, 2,
2300 &newjpos, &newlpos);
2301
2302 if (newjpos != 0)
2303 {
2304 do_cross_jump (insn, newjpos, newlpos);
2305 changed = 1;
2306 next = insn;
2307 }
2308 }
2309 }
2310 }
2311
2312 first = 0;
2313 }
2314
2315 /* Delete extraneous line number notes.
2316 Note that two consecutive notes for different lines are not really
2317 extraneous. There should be some indication where that line belonged,
2318 even if it became empty. */
2319
2320 {
2321 rtx last_note = 0;
2322
2323 for (insn = f; insn; insn = NEXT_INSN (insn))
2324 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0)
2325 {
2326 /* Delete this note if it is identical to previous note. */
2327 if (last_note
2328 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last_note)
2329 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last_note))
2330 {
2331 delete_insn (insn);
2332 continue;
2333 }
2334
2335 last_note = insn;
2336 }
2337 }
2338
2339 #ifdef HAVE_return
2340 if (HAVE_return)
2341 {
2342 /* If we fall through to the epilogue, see if we can insert a RETURN insn
2343 in front of it. If the machine allows it at this point (we might be
2344 after reload for a leaf routine), it will improve optimization for it
2345 to be there. We do this both here and at the start of this pass since
2346 the RETURN might have been deleted by some of our optimizations. */
2347 insn = get_last_insn ();
2348 while (insn && GET_CODE (insn) == NOTE)
2349 insn = PREV_INSN (insn);
2350
2351 if (insn && GET_CODE (insn) != BARRIER)
2352 {
2353 emit_jump_insn (gen_return ());
2354 emit_barrier ();
2355 }
2356 }
2357 #endif
2358
2359 /* See if there is still a NOTE_INSN_FUNCTION_END in this function.
2360 If so, delete it, and record that this function can drop off the end. */
2361
2362 insn = last_insn;
2363 {
2364 int n_labels = 1;
2365 while (insn
2366 /* One label can follow the end-note: the return label. */
2367 && ((GET_CODE (insn) == CODE_LABEL && n_labels-- > 0)
2368 /* Ordinary insns can follow it if returning a structure. */
2369 || GET_CODE (insn) == INSN
2370 /* If machine uses explicit RETURN insns, no epilogue,
2371 then one of them follows the note. */
2372 || (GET_CODE (insn) == JUMP_INSN
2373 && GET_CODE (PATTERN (insn)) == RETURN)
2374 /* A barrier can follow the return insn. */
2375 || GET_CODE (insn) == BARRIER
2376 /* Other kinds of notes can follow also. */
2377 || (GET_CODE (insn) == NOTE
2378 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)))
2379 insn = PREV_INSN (insn);
2380 }
2381
2382 /* Report if control can fall through at the end of the function. */
2383 if (insn && GET_CODE (insn) == NOTE
2384 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_END)
2385 {
2386 can_reach_end = 1;
2387 delete_insn (insn);
2388 }
2389
2390 /* Show JUMP_CHAIN no longer valid. */
2391 jump_chain = 0;
2392 }
2393 \f
2394 /* LOOP_START is a NOTE_INSN_LOOP_BEG note that is followed by an unconditional
2395 jump. Assume that this unconditional jump is to the exit test code. If
2396 the code is sufficiently simple, make a copy of it before INSN,
2397 followed by a jump to the exit of the loop. Then delete the unconditional
2398 jump after INSN.
2399
2400 Return 1 if we made the change, else 0.
2401
2402 This is only safe immediately after a regscan pass because it uses the
2403 values of regno_first_uid and regno_last_uid. */
2404
2405 static int
2406 duplicate_loop_exit_test (loop_start)
2407 rtx loop_start;
2408 {
2409 rtx insn, set, reg, p, link;
2410 rtx copy = 0;
2411 int num_insns = 0;
2412 rtx exitcode = NEXT_INSN (JUMP_LABEL (next_nonnote_insn (loop_start)));
2413 rtx lastexit;
2414 int max_reg = max_reg_num ();
2415 rtx *reg_map = 0;
2416
2417 /* Scan the exit code. We do not perform this optimization if any insn:
2418
2419 is a CALL_INSN
2420 is a CODE_LABEL
2421 has a REG_RETVAL or REG_LIBCALL note (hard to adjust)
2422 is a NOTE_INSN_LOOP_BEG because this means we have a nested loop
2423 is a NOTE_INSN_BLOCK_{BEG,END} because duplicating these notes
2424 are not valid
2425
2426
2427 We also do not do this if we find an insn with ASM_OPERANDS. While
2428 this restriction should not be necessary, copying an insn with
2429 ASM_OPERANDS can confuse asm_noperands in some cases.
2430
2431 Also, don't do this if the exit code is more than 20 insns. */
2432
2433 for (insn = exitcode;
2434 insn
2435 && ! (GET_CODE (insn) == NOTE
2436 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
2437 insn = NEXT_INSN (insn))
2438 {
2439 switch (GET_CODE (insn))
2440 {
2441 case CODE_LABEL:
2442 case CALL_INSN:
2443 return 0;
2444 case NOTE:
2445 /* We could be in front of the wrong NOTE_INSN_LOOP_END if there is
2446 a jump immediately after the loop start that branches outside
2447 the loop but within an outer loop, near the exit test.
2448 If we copied this exit test and created a phony
2449 NOTE_INSN_LOOP_VTOP, this could make instructions immediately
2450 before the exit test look like these could be safely moved
2451 out of the loop even if they actually may be never executed.
2452 This can be avoided by checking here for NOTE_INSN_LOOP_CONT. */
2453
2454 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
2455 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2456 return 0;
2457
2458 if (optimize < 2
2459 && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2460 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END))
2461 /* If we were to duplicate this code, we would not move
2462 the BLOCK notes, and so debugging the moved code would
2463 be difficult. Thus, we only move the code with -O2 or
2464 higher. */
2465 return 0;
2466
2467 break;
2468 case JUMP_INSN:
2469 case INSN:
2470 if (++num_insns > 20
2471 || find_reg_note (insn, REG_RETVAL, NULL_RTX)
2472 || find_reg_note (insn, REG_LIBCALL, NULL_RTX)
2473 || asm_noperands (PATTERN (insn)) > 0)
2474 return 0;
2475 break;
2476 default:
2477 break;
2478 }
2479 }
2480
2481 /* Unless INSN is zero, we can do the optimization. */
2482 if (insn == 0)
2483 return 0;
2484
2485 lastexit = insn;
2486
2487 /* See if any insn sets a register only used in the loop exit code and
2488 not a user variable. If so, replace it with a new register. */
2489 for (insn = exitcode; insn != lastexit; insn = NEXT_INSN (insn))
2490 if (GET_CODE (insn) == INSN
2491 && (set = single_set (insn)) != 0
2492 && ((reg = SET_DEST (set), GET_CODE (reg) == REG)
2493 || (GET_CODE (reg) == SUBREG
2494 && (reg = SUBREG_REG (reg), GET_CODE (reg) == REG)))
2495 && REGNO (reg) >= FIRST_PSEUDO_REGISTER
2496 && REGNO_FIRST_UID (REGNO (reg)) == INSN_UID (insn))
2497 {
2498 for (p = NEXT_INSN (insn); p != lastexit; p = NEXT_INSN (p))
2499 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (p))
2500 break;
2501
2502 if (p != lastexit)
2503 {
2504 /* We can do the replacement. Allocate reg_map if this is the
2505 first replacement we found. */
2506 if (reg_map == 0)
2507 {
2508 reg_map = (rtx *) alloca (max_reg * sizeof (rtx));
2509 bzero ((char *) reg_map, max_reg * sizeof (rtx));
2510 }
2511
2512 REG_LOOP_TEST_P (reg) = 1;
2513
2514 reg_map[REGNO (reg)] = gen_reg_rtx (GET_MODE (reg));
2515 }
2516 }
2517
2518 /* Now copy each insn. */
2519 for (insn = exitcode; insn != lastexit; insn = NEXT_INSN (insn))
2520 switch (GET_CODE (insn))
2521 {
2522 case BARRIER:
2523 copy = emit_barrier_before (loop_start);
2524 break;
2525 case NOTE:
2526 /* Only copy line-number notes. */
2527 if (NOTE_LINE_NUMBER (insn) >= 0)
2528 {
2529 copy = emit_note_before (NOTE_LINE_NUMBER (insn), loop_start);
2530 NOTE_SOURCE_FILE (copy) = NOTE_SOURCE_FILE (insn);
2531 }
2532 break;
2533
2534 case INSN:
2535 copy = emit_insn_before (copy_rtx (PATTERN (insn)), loop_start);
2536 if (reg_map)
2537 replace_regs (PATTERN (copy), reg_map, max_reg, 1);
2538
2539 mark_jump_label (PATTERN (copy), copy, 0);
2540
2541 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
2542 make them. */
2543 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
2544 if (REG_NOTE_KIND (link) != REG_LABEL)
2545 REG_NOTES (copy)
2546 = copy_rtx (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
2547 XEXP (link, 0),
2548 REG_NOTES (copy)));
2549 if (reg_map && REG_NOTES (copy))
2550 replace_regs (REG_NOTES (copy), reg_map, max_reg, 1);
2551 break;
2552
2553 case JUMP_INSN:
2554 copy = emit_jump_insn_before (copy_rtx (PATTERN (insn)), loop_start);
2555 if (reg_map)
2556 replace_regs (PATTERN (copy), reg_map, max_reg, 1);
2557 mark_jump_label (PATTERN (copy), copy, 0);
2558 if (REG_NOTES (insn))
2559 {
2560 REG_NOTES (copy) = copy_rtx (REG_NOTES (insn));
2561 if (reg_map)
2562 replace_regs (REG_NOTES (copy), reg_map, max_reg, 1);
2563 }
2564
2565 /* If this is a simple jump, add it to the jump chain. */
2566
2567 if (INSN_UID (copy) < max_jump_chain && JUMP_LABEL (copy)
2568 && simplejump_p (copy))
2569 {
2570 jump_chain[INSN_UID (copy)]
2571 = jump_chain[INSN_UID (JUMP_LABEL (copy))];
2572 jump_chain[INSN_UID (JUMP_LABEL (copy))] = copy;
2573 }
2574 break;
2575
2576 default:
2577 abort ();
2578 }
2579
2580 /* Now clean up by emitting a jump to the end label and deleting the jump
2581 at the start of the loop. */
2582 if (! copy || GET_CODE (copy) != BARRIER)
2583 {
2584 copy = emit_jump_insn_before (gen_jump (get_label_after (insn)),
2585 loop_start);
2586 mark_jump_label (PATTERN (copy), copy, 0);
2587 if (INSN_UID (copy) < max_jump_chain
2588 && INSN_UID (JUMP_LABEL (copy)) < max_jump_chain)
2589 {
2590 jump_chain[INSN_UID (copy)]
2591 = jump_chain[INSN_UID (JUMP_LABEL (copy))];
2592 jump_chain[INSN_UID (JUMP_LABEL (copy))] = copy;
2593 }
2594 emit_barrier_before (loop_start);
2595 }
2596
2597 /* Mark the exit code as the virtual top of the converted loop. */
2598 emit_note_before (NOTE_INSN_LOOP_VTOP, exitcode);
2599
2600 delete_insn (next_nonnote_insn (loop_start));
2601
2602 return 1;
2603 }
2604 \f
2605 /* Move all block-beg, block-end, loop-beg, loop-cont, loop-vtop, and
2606 loop-end notes between START and END out before START. Assume that
2607 END is not such a note. START may be such a note. Returns the value
2608 of the new starting insn, which may be different if the original start
2609 was such a note. */
2610
2611 rtx
2612 squeeze_notes (start, end)
2613 rtx start, end;
2614 {
2615 rtx insn;
2616 rtx next;
2617
2618 for (insn = start; insn != end; insn = next)
2619 {
2620 next = NEXT_INSN (insn);
2621 if (GET_CODE (insn) == NOTE
2622 && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END
2623 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2624 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
2625 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END
2626 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT
2627 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP))
2628 {
2629 if (insn == start)
2630 start = next;
2631 else
2632 {
2633 rtx prev = PREV_INSN (insn);
2634 PREV_INSN (insn) = PREV_INSN (start);
2635 NEXT_INSN (insn) = start;
2636 NEXT_INSN (PREV_INSN (insn)) = insn;
2637 PREV_INSN (NEXT_INSN (insn)) = insn;
2638 NEXT_INSN (prev) = next;
2639 PREV_INSN (next) = prev;
2640 }
2641 }
2642 }
2643
2644 return start;
2645 }
2646 \f
2647 /* Compare the instructions before insn E1 with those before E2
2648 to find an opportunity for cross jumping.
2649 (This means detecting identical sequences of insns followed by
2650 jumps to the same place, or followed by a label and a jump
2651 to that label, and replacing one with a jump to the other.)
2652
2653 Assume E1 is a jump that jumps to label E2
2654 (that is not always true but it might as well be).
2655 Find the longest possible equivalent sequences
2656 and store the first insns of those sequences into *F1 and *F2.
2657 Store zero there if no equivalent preceding instructions are found.
2658
2659 We give up if we find a label in stream 1.
2660 Actually we could transfer that label into stream 2. */
2661
2662 static void
2663 find_cross_jump (e1, e2, minimum, f1, f2)
2664 rtx e1, e2;
2665 int minimum;
2666 rtx *f1, *f2;
2667 {
2668 register rtx i1 = e1, i2 = e2;
2669 register rtx p1, p2;
2670 int lose = 0;
2671
2672 rtx last1 = 0, last2 = 0;
2673 rtx afterlast1 = 0, afterlast2 = 0;
2674
2675 *f1 = 0;
2676 *f2 = 0;
2677
2678 while (1)
2679 {
2680 i1 = prev_nonnote_insn (i1);
2681
2682 i2 = PREV_INSN (i2);
2683 while (i2 && (GET_CODE (i2) == NOTE || GET_CODE (i2) == CODE_LABEL))
2684 i2 = PREV_INSN (i2);
2685
2686 if (i1 == 0)
2687 break;
2688
2689 /* Don't allow the range of insns preceding E1 or E2
2690 to include the other (E2 or E1). */
2691 if (i2 == e1 || i1 == e2)
2692 break;
2693
2694 /* If we will get to this code by jumping, those jumps will be
2695 tensioned to go directly to the new label (before I2),
2696 so this cross-jumping won't cost extra. So reduce the minimum. */
2697 if (GET_CODE (i1) == CODE_LABEL)
2698 {
2699 --minimum;
2700 break;
2701 }
2702
2703 if (i2 == 0 || GET_CODE (i1) != GET_CODE (i2))
2704 break;
2705
2706 p1 = PATTERN (i1);
2707 p2 = PATTERN (i2);
2708
2709 /* If this is a CALL_INSN, compare register usage information.
2710 If we don't check this on stack register machines, the two
2711 CALL_INSNs might be merged leaving reg-stack.c with mismatching
2712 numbers of stack registers in the same basic block.
2713 If we don't check this on machines with delay slots, a delay slot may
2714 be filled that clobbers a parameter expected by the subroutine.
2715
2716 ??? We take the simple route for now and assume that if they're
2717 equal, they were constructed identically. */
2718
2719 if (GET_CODE (i1) == CALL_INSN
2720 && ! rtx_equal_p (CALL_INSN_FUNCTION_USAGE (i1),
2721 CALL_INSN_FUNCTION_USAGE (i2)))
2722 lose = 1;
2723
2724 #ifdef STACK_REGS
2725 /* If cross_jump_death_matters is not 0, the insn's mode
2726 indicates whether or not the insn contains any stack-like
2727 regs. */
2728
2729 if (!lose && cross_jump_death_matters && GET_MODE (i1) == QImode)
2730 {
2731 /* If register stack conversion has already been done, then
2732 death notes must also be compared before it is certain that
2733 the two instruction streams match. */
2734
2735 rtx note;
2736 HARD_REG_SET i1_regset, i2_regset;
2737
2738 CLEAR_HARD_REG_SET (i1_regset);
2739 CLEAR_HARD_REG_SET (i2_regset);
2740
2741 for (note = REG_NOTES (i1); note; note = XEXP (note, 1))
2742 if (REG_NOTE_KIND (note) == REG_DEAD
2743 && STACK_REG_P (XEXP (note, 0)))
2744 SET_HARD_REG_BIT (i1_regset, REGNO (XEXP (note, 0)));
2745
2746 for (note = REG_NOTES (i2); note; note = XEXP (note, 1))
2747 if (REG_NOTE_KIND (note) == REG_DEAD
2748 && STACK_REG_P (XEXP (note, 0)))
2749 SET_HARD_REG_BIT (i2_regset, REGNO (XEXP (note, 0)));
2750
2751 GO_IF_HARD_REG_EQUAL (i1_regset, i2_regset, done);
2752
2753 lose = 1;
2754
2755 done:
2756 ;
2757 }
2758 #endif
2759
2760 /* Don't allow old-style asm or volatile extended asms to be accepted
2761 for cross jumping purposes. It is conceptually correct to allow
2762 them, since cross-jumping preserves the dynamic instruction order
2763 even though it is changing the static instruction order. However,
2764 if an asm is being used to emit an assembler pseudo-op, such as
2765 the MIPS `.set reorder' pseudo-op, then the static instruction order
2766 matters and it must be preserved. */
2767 if (GET_CODE (p1) == ASM_INPUT || GET_CODE (p2) == ASM_INPUT
2768 || (GET_CODE (p1) == ASM_OPERANDS && MEM_VOLATILE_P (p1))
2769 || (GET_CODE (p2) == ASM_OPERANDS && MEM_VOLATILE_P (p2)))
2770 lose = 1;
2771
2772 if (lose || GET_CODE (p1) != GET_CODE (p2)
2773 || ! rtx_renumbered_equal_p (p1, p2))
2774 {
2775 /* The following code helps take care of G++ cleanups. */
2776 rtx equiv1;
2777 rtx equiv2;
2778
2779 if (!lose && GET_CODE (p1) == GET_CODE (p2)
2780 && ((equiv1 = find_reg_note (i1, REG_EQUAL, NULL_RTX)) != 0
2781 || (equiv1 = find_reg_note (i1, REG_EQUIV, NULL_RTX)) != 0)
2782 && ((equiv2 = find_reg_note (i2, REG_EQUAL, NULL_RTX)) != 0
2783 || (equiv2 = find_reg_note (i2, REG_EQUIV, NULL_RTX)) != 0)
2784 /* If the equivalences are not to a constant, they may
2785 reference pseudos that no longer exist, so we can't
2786 use them. */
2787 && CONSTANT_P (XEXP (equiv1, 0))
2788 && rtx_equal_p (XEXP (equiv1, 0), XEXP (equiv2, 0)))
2789 {
2790 rtx s1 = single_set (i1);
2791 rtx s2 = single_set (i2);
2792 if (s1 != 0 && s2 != 0
2793 && rtx_renumbered_equal_p (SET_DEST (s1), SET_DEST (s2)))
2794 {
2795 validate_change (i1, &SET_SRC (s1), XEXP (equiv1, 0), 1);
2796 validate_change (i2, &SET_SRC (s2), XEXP (equiv2, 0), 1);
2797 if (! rtx_renumbered_equal_p (p1, p2))
2798 cancel_changes (0);
2799 else if (apply_change_group ())
2800 goto win;
2801 }
2802 }
2803
2804 /* Insns fail to match; cross jumping is limited to the following
2805 insns. */
2806
2807 #ifdef HAVE_cc0
2808 /* Don't allow the insn after a compare to be shared by
2809 cross-jumping unless the compare is also shared.
2810 Here, if either of these non-matching insns is a compare,
2811 exclude the following insn from possible cross-jumping. */
2812 if (sets_cc0_p (p1) || sets_cc0_p (p2))
2813 last1 = afterlast1, last2 = afterlast2, ++minimum;
2814 #endif
2815
2816 /* If cross-jumping here will feed a jump-around-jump
2817 optimization, this jump won't cost extra, so reduce
2818 the minimum. */
2819 if (GET_CODE (i1) == JUMP_INSN
2820 && JUMP_LABEL (i1)
2821 && prev_real_insn (JUMP_LABEL (i1)) == e1)
2822 --minimum;
2823 break;
2824 }
2825
2826 win:
2827 if (GET_CODE (p1) != USE && GET_CODE (p1) != CLOBBER)
2828 {
2829 /* Ok, this insn is potentially includable in a cross-jump here. */
2830 afterlast1 = last1, afterlast2 = last2;
2831 last1 = i1, last2 = i2, --minimum;
2832 }
2833 }
2834
2835 if (minimum <= 0 && last1 != 0 && last1 != e1)
2836 *f1 = last1, *f2 = last2;
2837 }
2838
2839 static void
2840 do_cross_jump (insn, newjpos, newlpos)
2841 rtx insn, newjpos, newlpos;
2842 {
2843 /* Find an existing label at this point
2844 or make a new one if there is none. */
2845 register rtx label = get_label_before (newlpos);
2846
2847 /* Make the same jump insn jump to the new point. */
2848 if (GET_CODE (PATTERN (insn)) == RETURN)
2849 {
2850 /* Remove from jump chain of returns. */
2851 delete_from_jump_chain (insn);
2852 /* Change the insn. */
2853 PATTERN (insn) = gen_jump (label);
2854 INSN_CODE (insn) = -1;
2855 JUMP_LABEL (insn) = label;
2856 LABEL_NUSES (label)++;
2857 /* Add to new the jump chain. */
2858 if (INSN_UID (label) < max_jump_chain
2859 && INSN_UID (insn) < max_jump_chain)
2860 {
2861 jump_chain[INSN_UID (insn)] = jump_chain[INSN_UID (label)];
2862 jump_chain[INSN_UID (label)] = insn;
2863 }
2864 }
2865 else
2866 redirect_jump (insn, label);
2867
2868 /* Delete the matching insns before the jump. Also, remove any REG_EQUAL
2869 or REG_EQUIV note in the NEWLPOS stream that isn't also present in
2870 the NEWJPOS stream. */
2871
2872 while (newjpos != insn)
2873 {
2874 rtx lnote;
2875
2876 for (lnote = REG_NOTES (newlpos); lnote; lnote = XEXP (lnote, 1))
2877 if ((REG_NOTE_KIND (lnote) == REG_EQUAL
2878 || REG_NOTE_KIND (lnote) == REG_EQUIV)
2879 && ! find_reg_note (newjpos, REG_EQUAL, XEXP (lnote, 0))
2880 && ! find_reg_note (newjpos, REG_EQUIV, XEXP (lnote, 0)))
2881 remove_note (newlpos, lnote);
2882
2883 delete_insn (newjpos);
2884 newjpos = next_real_insn (newjpos);
2885 newlpos = next_real_insn (newlpos);
2886 }
2887 }
2888 \f
2889 /* Return the label before INSN, or put a new label there. */
2890
2891 rtx
2892 get_label_before (insn)
2893 rtx insn;
2894 {
2895 rtx label;
2896
2897 /* Find an existing label at this point
2898 or make a new one if there is none. */
2899 label = prev_nonnote_insn (insn);
2900
2901 if (label == 0 || GET_CODE (label) != CODE_LABEL)
2902 {
2903 rtx prev = PREV_INSN (insn);
2904
2905 label = gen_label_rtx ();
2906 emit_label_after (label, prev);
2907 LABEL_NUSES (label) = 0;
2908 }
2909 return label;
2910 }
2911
2912 /* Return the label after INSN, or put a new label there. */
2913
2914 rtx
2915 get_label_after (insn)
2916 rtx insn;
2917 {
2918 rtx label;
2919
2920 /* Find an existing label at this point
2921 or make a new one if there is none. */
2922 label = next_nonnote_insn (insn);
2923
2924 if (label == 0 || GET_CODE (label) != CODE_LABEL)
2925 {
2926 label = gen_label_rtx ();
2927 emit_label_after (label, insn);
2928 LABEL_NUSES (label) = 0;
2929 }
2930 return label;
2931 }
2932 \f
2933 /* Return 1 if INSN is a jump that jumps to right after TARGET
2934 only on the condition that TARGET itself would drop through.
2935 Assumes that TARGET is a conditional jump. */
2936
2937 static int
2938 jump_back_p (insn, target)
2939 rtx insn, target;
2940 {
2941 rtx cinsn, ctarget;
2942 enum rtx_code codei, codet;
2943
2944 if (simplejump_p (insn) || ! condjump_p (insn)
2945 || simplejump_p (target)
2946 || target != prev_real_insn (JUMP_LABEL (insn)))
2947 return 0;
2948
2949 cinsn = XEXP (SET_SRC (PATTERN (insn)), 0);
2950 ctarget = XEXP (SET_SRC (PATTERN (target)), 0);
2951
2952 codei = GET_CODE (cinsn);
2953 codet = GET_CODE (ctarget);
2954
2955 if (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx)
2956 {
2957 if (! can_reverse_comparison_p (cinsn, insn))
2958 return 0;
2959 codei = reverse_condition (codei);
2960 }
2961
2962 if (XEXP (SET_SRC (PATTERN (target)), 2) == pc_rtx)
2963 {
2964 if (! can_reverse_comparison_p (ctarget, target))
2965 return 0;
2966 codet = reverse_condition (codet);
2967 }
2968
2969 return (codei == codet
2970 && rtx_renumbered_equal_p (XEXP (cinsn, 0), XEXP (ctarget, 0))
2971 && rtx_renumbered_equal_p (XEXP (cinsn, 1), XEXP (ctarget, 1)));
2972 }
2973 \f
2974 /* Given a comparison, COMPARISON, inside a conditional jump insn, INSN,
2975 return non-zero if it is safe to reverse this comparison. It is if our
2976 floating-point is not IEEE, if this is an NE or EQ comparison, or if
2977 this is known to be an integer comparison. */
2978
2979 int
2980 can_reverse_comparison_p (comparison, insn)
2981 rtx comparison;
2982 rtx insn;
2983 {
2984 rtx arg0;
2985
2986 /* If this is not actually a comparison, we can't reverse it. */
2987 if (GET_RTX_CLASS (GET_CODE (comparison)) != '<')
2988 return 0;
2989
2990 if (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
2991 /* If this is an NE comparison, it is safe to reverse it to an EQ
2992 comparison and vice versa, even for floating point. If no operands
2993 are NaNs, the reversal is valid. If some operand is a NaN, EQ is
2994 always false and NE is always true, so the reversal is also valid. */
2995 || flag_fast_math
2996 || GET_CODE (comparison) == NE
2997 || GET_CODE (comparison) == EQ)
2998 return 1;
2999
3000 arg0 = XEXP (comparison, 0);
3001
3002 /* Make sure ARG0 is one of the actual objects being compared. If we
3003 can't do this, we can't be sure the comparison can be reversed.
3004
3005 Handle cc0 and a MODE_CC register. */
3006 if ((GET_CODE (arg0) == REG && GET_MODE_CLASS (GET_MODE (arg0)) == MODE_CC)
3007 #ifdef HAVE_cc0
3008 || arg0 == cc0_rtx
3009 #endif
3010 )
3011 {
3012 rtx prev = prev_nonnote_insn (insn);
3013 rtx set = single_set (prev);
3014
3015 if (set == 0 || SET_DEST (set) != arg0)
3016 return 0;
3017
3018 arg0 = SET_SRC (set);
3019
3020 if (GET_CODE (arg0) == COMPARE)
3021 arg0 = XEXP (arg0, 0);
3022 }
3023
3024 /* We can reverse this if ARG0 is a CONST_INT or if its mode is
3025 not VOIDmode and neither a MODE_CC nor MODE_FLOAT type. */
3026 return (GET_CODE (arg0) == CONST_INT
3027 || (GET_MODE (arg0) != VOIDmode
3028 && GET_MODE_CLASS (GET_MODE (arg0)) != MODE_CC
3029 && GET_MODE_CLASS (GET_MODE (arg0)) != MODE_FLOAT));
3030 }
3031
3032 /* Given an rtx-code for a comparison, return the code
3033 for the negated comparison.
3034 WATCH OUT! reverse_condition is not safe to use on a jump
3035 that might be acting on the results of an IEEE floating point comparison,
3036 because of the special treatment of non-signaling nans in comparisons.
3037 Use can_reverse_comparison_p to be sure. */
3038
3039 enum rtx_code
3040 reverse_condition (code)
3041 enum rtx_code code;
3042 {
3043 switch (code)
3044 {
3045 case EQ:
3046 return NE;
3047
3048 case NE:
3049 return EQ;
3050
3051 case GT:
3052 return LE;
3053
3054 case GE:
3055 return LT;
3056
3057 case LT:
3058 return GE;
3059
3060 case LE:
3061 return GT;
3062
3063 case GTU:
3064 return LEU;
3065
3066 case GEU:
3067 return LTU;
3068
3069 case LTU:
3070 return GEU;
3071
3072 case LEU:
3073 return GTU;
3074
3075 default:
3076 abort ();
3077 return UNKNOWN;
3078 }
3079 }
3080
3081 /* Similar, but return the code when two operands of a comparison are swapped.
3082 This IS safe for IEEE floating-point. */
3083
3084 enum rtx_code
3085 swap_condition (code)
3086 enum rtx_code code;
3087 {
3088 switch (code)
3089 {
3090 case EQ:
3091 case NE:
3092 return code;
3093
3094 case GT:
3095 return LT;
3096
3097 case GE:
3098 return LE;
3099
3100 case LT:
3101 return GT;
3102
3103 case LE:
3104 return GE;
3105
3106 case GTU:
3107 return LTU;
3108
3109 case GEU:
3110 return LEU;
3111
3112 case LTU:
3113 return GTU;
3114
3115 case LEU:
3116 return GEU;
3117
3118 default:
3119 abort ();
3120 return UNKNOWN;
3121 }
3122 }
3123
3124 /* Given a comparison CODE, return the corresponding unsigned comparison.
3125 If CODE is an equality comparison or already an unsigned comparison,
3126 CODE is returned. */
3127
3128 enum rtx_code
3129 unsigned_condition (code)
3130 enum rtx_code code;
3131 {
3132 switch (code)
3133 {
3134 case EQ:
3135 case NE:
3136 case GTU:
3137 case GEU:
3138 case LTU:
3139 case LEU:
3140 return code;
3141
3142 case GT:
3143 return GTU;
3144
3145 case GE:
3146 return GEU;
3147
3148 case LT:
3149 return LTU;
3150
3151 case LE:
3152 return LEU;
3153
3154 default:
3155 abort ();
3156 }
3157 }
3158
3159 /* Similarly, return the signed version of a comparison. */
3160
3161 enum rtx_code
3162 signed_condition (code)
3163 enum rtx_code code;
3164 {
3165 switch (code)
3166 {
3167 case EQ:
3168 case NE:
3169 case GT:
3170 case GE:
3171 case LT:
3172 case LE:
3173 return code;
3174
3175 case GTU:
3176 return GT;
3177
3178 case GEU:
3179 return GE;
3180
3181 case LTU:
3182 return LT;
3183
3184 case LEU:
3185 return LE;
3186
3187 default:
3188 abort ();
3189 }
3190 }
3191 \f
3192 /* Return non-zero if CODE1 is more strict than CODE2, i.e., if the
3193 truth of CODE1 implies the truth of CODE2. */
3194
3195 int
3196 comparison_dominates_p (code1, code2)
3197 enum rtx_code code1, code2;
3198 {
3199 if (code1 == code2)
3200 return 1;
3201
3202 switch (code1)
3203 {
3204 case EQ:
3205 if (code2 == LE || code2 == LEU || code2 == GE || code2 == GEU)
3206 return 1;
3207 break;
3208
3209 case LT:
3210 if (code2 == LE || code2 == NE)
3211 return 1;
3212 break;
3213
3214 case GT:
3215 if (code2 == GE || code2 == NE)
3216 return 1;
3217 break;
3218
3219 case LTU:
3220 if (code2 == LEU || code2 == NE)
3221 return 1;
3222 break;
3223
3224 case GTU:
3225 if (code2 == GEU || code2 == NE)
3226 return 1;
3227 break;
3228
3229 default:
3230 break;
3231 }
3232
3233 return 0;
3234 }
3235 \f
3236 /* Return 1 if INSN is an unconditional jump and nothing else. */
3237
3238 int
3239 simplejump_p (insn)
3240 rtx insn;
3241 {
3242 return (GET_CODE (insn) == JUMP_INSN
3243 && GET_CODE (PATTERN (insn)) == SET
3244 && GET_CODE (SET_DEST (PATTERN (insn))) == PC
3245 && GET_CODE (SET_SRC (PATTERN (insn))) == LABEL_REF);
3246 }
3247
3248 /* Return nonzero if INSN is a (possibly) conditional jump
3249 and nothing more. */
3250
3251 int
3252 condjump_p (insn)
3253 rtx insn;
3254 {
3255 register rtx x = PATTERN (insn);
3256 if (GET_CODE (x) != SET)
3257 return 0;
3258 if (GET_CODE (SET_DEST (x)) != PC)
3259 return 0;
3260 if (GET_CODE (SET_SRC (x)) == LABEL_REF)
3261 return 1;
3262 if (GET_CODE (SET_SRC (x)) != IF_THEN_ELSE)
3263 return 0;
3264 if (XEXP (SET_SRC (x), 2) == pc_rtx
3265 && (GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF
3266 || GET_CODE (XEXP (SET_SRC (x), 1)) == RETURN))
3267 return 1;
3268 if (XEXP (SET_SRC (x), 1) == pc_rtx
3269 && (GET_CODE (XEXP (SET_SRC (x), 2)) == LABEL_REF
3270 || GET_CODE (XEXP (SET_SRC (x), 2)) == RETURN))
3271 return 1;
3272 return 0;
3273 }
3274
3275 /* Return nonzero if INSN is a (possibly) conditional jump
3276 and nothing more. */
3277
3278 int
3279 condjump_in_parallel_p (insn)
3280 rtx insn;
3281 {
3282 register rtx x = PATTERN (insn);
3283
3284 if (GET_CODE (x) != PARALLEL)
3285 return 0;
3286 else
3287 x = XVECEXP (x, 0, 0);
3288
3289 if (GET_CODE (x) != SET)
3290 return 0;
3291 if (GET_CODE (SET_DEST (x)) != PC)
3292 return 0;
3293 if (GET_CODE (SET_SRC (x)) == LABEL_REF)
3294 return 1;
3295 if (GET_CODE (SET_SRC (x)) != IF_THEN_ELSE)
3296 return 0;
3297 if (XEXP (SET_SRC (x), 2) == pc_rtx
3298 && (GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF
3299 || GET_CODE (XEXP (SET_SRC (x), 1)) == RETURN))
3300 return 1;
3301 if (XEXP (SET_SRC (x), 1) == pc_rtx
3302 && (GET_CODE (XEXP (SET_SRC (x), 2)) == LABEL_REF
3303 || GET_CODE (XEXP (SET_SRC (x), 2)) == RETURN))
3304 return 1;
3305 return 0;
3306 }
3307
3308 /* Return 1 if X is an RTX that does nothing but set the condition codes
3309 and CLOBBER or USE registers.
3310 Return -1 if X does explicitly set the condition codes,
3311 but also does other things. */
3312
3313 int
3314 sets_cc0_p (x)
3315 rtx x;
3316 {
3317 #ifdef HAVE_cc0
3318 if (GET_CODE (x) == SET && SET_DEST (x) == cc0_rtx)
3319 return 1;
3320 if (GET_CODE (x) == PARALLEL)
3321 {
3322 int i;
3323 int sets_cc0 = 0;
3324 int other_things = 0;
3325 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
3326 {
3327 if (GET_CODE (XVECEXP (x, 0, i)) == SET
3328 && SET_DEST (XVECEXP (x, 0, i)) == cc0_rtx)
3329 sets_cc0 = 1;
3330 else if (GET_CODE (XVECEXP (x, 0, i)) == SET)
3331 other_things = 1;
3332 }
3333 return ! sets_cc0 ? 0 : other_things ? -1 : 1;
3334 }
3335 return 0;
3336 #else
3337 abort ();
3338 #endif
3339 }
3340 \f
3341 /* Follow any unconditional jump at LABEL;
3342 return the ultimate label reached by any such chain of jumps.
3343 If LABEL is not followed by a jump, return LABEL.
3344 If the chain loops or we can't find end, return LABEL,
3345 since that tells caller to avoid changing the insn.
3346
3347 If RELOAD_COMPLETED is 0, we do not chain across a NOTE_INSN_LOOP_BEG or
3348 a USE or CLOBBER. */
3349
3350 rtx
3351 follow_jumps (label)
3352 rtx label;
3353 {
3354 register rtx insn;
3355 register rtx next;
3356 register rtx value = label;
3357 register int depth;
3358
3359 for (depth = 0;
3360 (depth < 10
3361 && (insn = next_active_insn (value)) != 0
3362 && GET_CODE (insn) == JUMP_INSN
3363 && ((JUMP_LABEL (insn) != 0 && simplejump_p (insn))
3364 || GET_CODE (PATTERN (insn)) == RETURN)
3365 && (next = NEXT_INSN (insn))
3366 && GET_CODE (next) == BARRIER);
3367 depth++)
3368 {
3369 /* Don't chain through the insn that jumps into a loop
3370 from outside the loop,
3371 since that would create multiple loop entry jumps
3372 and prevent loop optimization. */
3373 rtx tem;
3374 if (!reload_completed)
3375 for (tem = value; tem != insn; tem = NEXT_INSN (tem))
3376 if (GET_CODE (tem) == NOTE
3377 && (NOTE_LINE_NUMBER (tem) == NOTE_INSN_LOOP_BEG
3378 /* ??? Optional. Disables some optimizations, but makes
3379 gcov output more accurate with -O. */
3380 || (flag_test_coverage && NOTE_LINE_NUMBER (tem) > 0)))
3381 return value;
3382
3383 /* If we have found a cycle, make the insn jump to itself. */
3384 if (JUMP_LABEL (insn) == label)
3385 return label;
3386
3387 tem = next_active_insn (JUMP_LABEL (insn));
3388 if (tem && (GET_CODE (PATTERN (tem)) == ADDR_VEC
3389 || GET_CODE (PATTERN (tem)) == ADDR_DIFF_VEC))
3390 break;
3391
3392 value = JUMP_LABEL (insn);
3393 }
3394 if (depth == 10)
3395 return label;
3396 return value;
3397 }
3398
3399 /* Assuming that field IDX of X is a vector of label_refs,
3400 replace each of them by the ultimate label reached by it.
3401 Return nonzero if a change is made.
3402 If IGNORE_LOOPS is 0, we do not chain across a NOTE_INSN_LOOP_BEG. */
3403
3404 static int
3405 tension_vector_labels (x, idx)
3406 register rtx x;
3407 register int idx;
3408 {
3409 int changed = 0;
3410 register int i;
3411 for (i = XVECLEN (x, idx) - 1; i >= 0; i--)
3412 {
3413 register rtx olabel = XEXP (XVECEXP (x, idx, i), 0);
3414 register rtx nlabel = follow_jumps (olabel);
3415 if (nlabel && nlabel != olabel)
3416 {
3417 XEXP (XVECEXP (x, idx, i), 0) = nlabel;
3418 ++LABEL_NUSES (nlabel);
3419 if (--LABEL_NUSES (olabel) == 0)
3420 delete_insn (olabel);
3421 changed = 1;
3422 }
3423 }
3424 return changed;
3425 }
3426 \f
3427 /* Find all CODE_LABELs referred to in X, and increment their use counts.
3428 If INSN is a JUMP_INSN and there is at least one CODE_LABEL referenced
3429 in INSN, then store one of them in JUMP_LABEL (INSN).
3430 If INSN is an INSN or a CALL_INSN and there is at least one CODE_LABEL
3431 referenced in INSN, add a REG_LABEL note containing that label to INSN.
3432 Also, when there are consecutive labels, canonicalize on the last of them.
3433
3434 Note that two labels separated by a loop-beginning note
3435 must be kept distinct if we have not yet done loop-optimization,
3436 because the gap between them is where loop-optimize
3437 will want to move invariant code to. CROSS_JUMP tells us
3438 that loop-optimization is done with.
3439
3440 Once reload has completed (CROSS_JUMP non-zero), we need not consider
3441 two labels distinct if they are separated by only USE or CLOBBER insns. */
3442
3443 static void
3444 mark_jump_label (x, insn, cross_jump)
3445 register rtx x;
3446 rtx insn;
3447 int cross_jump;
3448 {
3449 register RTX_CODE code = GET_CODE (x);
3450 register int i;
3451 register char *fmt;
3452
3453 switch (code)
3454 {
3455 case PC:
3456 case CC0:
3457 case REG:
3458 case SUBREG:
3459 case CONST_INT:
3460 case SYMBOL_REF:
3461 case CONST_DOUBLE:
3462 case CLOBBER:
3463 case CALL:
3464 return;
3465
3466 case MEM:
3467 /* If this is a constant-pool reference, see if it is a label. */
3468 if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
3469 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)))
3470 mark_jump_label (get_pool_constant (XEXP (x, 0)), insn, cross_jump);
3471 break;
3472
3473 case LABEL_REF:
3474 {
3475 rtx label = XEXP (x, 0);
3476 rtx olabel = label;
3477 rtx note;
3478 rtx next;
3479
3480 if (GET_CODE (label) != CODE_LABEL)
3481 abort ();
3482
3483 /* Ignore references to labels of containing functions. */
3484 if (LABEL_REF_NONLOCAL_P (x))
3485 break;
3486
3487 /* If there are other labels following this one,
3488 replace it with the last of the consecutive labels. */
3489 for (next = NEXT_INSN (label); next; next = NEXT_INSN (next))
3490 {
3491 if (GET_CODE (next) == CODE_LABEL)
3492 label = next;
3493 else if (cross_jump && GET_CODE (next) == INSN
3494 && (GET_CODE (PATTERN (next)) == USE
3495 || GET_CODE (PATTERN (next)) == CLOBBER))
3496 continue;
3497 else if (GET_CODE (next) != NOTE)
3498 break;
3499 else if (! cross_jump
3500 && (NOTE_LINE_NUMBER (next) == NOTE_INSN_LOOP_BEG
3501 || NOTE_LINE_NUMBER (next) == NOTE_INSN_FUNCTION_END
3502 /* ??? Optional. Disables some optimizations, but
3503 makes gcov output more accurate with -O. */
3504 || (flag_test_coverage && NOTE_LINE_NUMBER (next) > 0)))
3505 break;
3506 }
3507
3508 XEXP (x, 0) = label;
3509 if (! insn || ! INSN_DELETED_P (insn))
3510 ++LABEL_NUSES (label);
3511
3512 if (insn)
3513 {
3514 if (GET_CODE (insn) == JUMP_INSN)
3515 JUMP_LABEL (insn) = label;
3516
3517 /* If we've changed OLABEL and we had a REG_LABEL note
3518 for it, update it as well. */
3519 else if (label != olabel
3520 && (note = find_reg_note (insn, REG_LABEL, olabel)) != 0)
3521 XEXP (note, 0) = label;
3522
3523 /* Otherwise, add a REG_LABEL note for LABEL unless there already
3524 is one. */
3525 else if (! find_reg_note (insn, REG_LABEL, label))
3526 {
3527 /* This code used to ignore labels which refered to dispatch
3528 tables to avoid flow.c generating worse code.
3529
3530 However, in the presense of global optimizations like
3531 gcse which call find_basic_blocks without calling
3532 life_analysis, not recording such labels will lead
3533 to compiler aborts because of inconsistencies in the
3534 flow graph. So we go ahead and record the label.
3535
3536 It may also be the case that the optimization argument
3537 is no longer valid because of the more accurate cfg
3538 we build in find_basic_blocks -- it no longer pessimizes
3539 code when it finds a REG_LABEL note. */
3540 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, label,
3541 REG_NOTES (insn));
3542 }
3543 }
3544 return;
3545 }
3546
3547 /* Do walk the labels in a vector, but not the first operand of an
3548 ADDR_DIFF_VEC. Don't set the JUMP_LABEL of a vector. */
3549 case ADDR_VEC:
3550 case ADDR_DIFF_VEC:
3551 if (! INSN_DELETED_P (insn))
3552 {
3553 int eltnum = code == ADDR_DIFF_VEC ? 1 : 0;
3554
3555 for (i = 0; i < XVECLEN (x, eltnum); i++)
3556 mark_jump_label (XVECEXP (x, eltnum, i), NULL_RTX, cross_jump);
3557 }
3558 return;
3559
3560 default:
3561 break;
3562 }
3563
3564 fmt = GET_RTX_FORMAT (code);
3565 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3566 {
3567 if (fmt[i] == 'e')
3568 mark_jump_label (XEXP (x, i), insn, cross_jump);
3569 else if (fmt[i] == 'E')
3570 {
3571 register int j;
3572 for (j = 0; j < XVECLEN (x, i); j++)
3573 mark_jump_label (XVECEXP (x, i, j), insn, cross_jump);
3574 }
3575 }
3576 }
3577
3578 /* If all INSN does is set the pc, delete it,
3579 and delete the insn that set the condition codes for it
3580 if that's what the previous thing was. */
3581
3582 void
3583 delete_jump (insn)
3584 rtx insn;
3585 {
3586 register rtx set = single_set (insn);
3587
3588 if (set && GET_CODE (SET_DEST (set)) == PC)
3589 delete_computation (insn);
3590 }
3591
3592 /* Delete INSN and recursively delete insns that compute values used only
3593 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3594 If we are running before flow.c, we need do nothing since flow.c will
3595 delete dead code. We also can't know if the registers being used are
3596 dead or not at this point.
3597
3598 Otherwise, look at all our REG_DEAD notes. If a previous insn does
3599 nothing other than set a register that dies in this insn, we can delete
3600 that insn as well.
3601
3602 On machines with CC0, if CC0 is used in this insn, we may be able to
3603 delete the insn that set it. */
3604
3605 static void
3606 delete_computation (insn)
3607 rtx insn;
3608 {
3609 rtx note, next;
3610
3611 #ifdef HAVE_cc0
3612 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
3613 {
3614 rtx prev = prev_nonnote_insn (insn);
3615 /* We assume that at this stage
3616 CC's are always set explicitly
3617 and always immediately before the jump that
3618 will use them. So if the previous insn
3619 exists to set the CC's, delete it
3620 (unless it performs auto-increments, etc.). */
3621 if (prev && GET_CODE (prev) == INSN
3622 && sets_cc0_p (PATTERN (prev)))
3623 {
3624 if (sets_cc0_p (PATTERN (prev)) > 0
3625 && !FIND_REG_INC_NOTE (prev, NULL_RTX))
3626 delete_computation (prev);
3627 else
3628 /* Otherwise, show that cc0 won't be used. */
3629 REG_NOTES (prev) = gen_rtx_EXPR_LIST (REG_UNUSED,
3630 cc0_rtx, REG_NOTES (prev));
3631 }
3632 }
3633 #endif
3634
3635 for (note = REG_NOTES (insn); note; note = next)
3636 {
3637 rtx our_prev;
3638
3639 next = XEXP (note, 1);
3640
3641 if (REG_NOTE_KIND (note) != REG_DEAD
3642 /* Verify that the REG_NOTE is legitimate. */
3643 || GET_CODE (XEXP (note, 0)) != REG)
3644 continue;
3645
3646 for (our_prev = prev_nonnote_insn (insn);
3647 our_prev && GET_CODE (our_prev) == INSN;
3648 our_prev = prev_nonnote_insn (our_prev))
3649 {
3650 /* If we reach a SEQUENCE, it is too complex to try to
3651 do anything with it, so give up. */
3652 if (GET_CODE (PATTERN (our_prev)) == SEQUENCE)
3653 break;
3654
3655 if (GET_CODE (PATTERN (our_prev)) == USE
3656 && GET_CODE (XEXP (PATTERN (our_prev), 0)) == INSN)
3657 /* reorg creates USEs that look like this. We leave them
3658 alone because reorg needs them for its own purposes. */
3659 break;
3660
3661 if (reg_set_p (XEXP (note, 0), PATTERN (our_prev)))
3662 {
3663 if (FIND_REG_INC_NOTE (our_prev, NULL_RTX))
3664 break;
3665
3666 if (GET_CODE (PATTERN (our_prev)) == PARALLEL)
3667 {
3668 /* If we find a SET of something else, we can't
3669 delete the insn. */
3670
3671 int i;
3672
3673 for (i = 0; i < XVECLEN (PATTERN (our_prev), 0); i++)
3674 {
3675 rtx part = XVECEXP (PATTERN (our_prev), 0, i);
3676
3677 if (GET_CODE (part) == SET
3678 && SET_DEST (part) != XEXP (note, 0))
3679 break;
3680 }
3681
3682 if (i == XVECLEN (PATTERN (our_prev), 0))
3683 delete_computation (our_prev);
3684 }
3685 else if (GET_CODE (PATTERN (our_prev)) == SET
3686 && SET_DEST (PATTERN (our_prev)) == XEXP (note, 0))
3687 delete_computation (our_prev);
3688
3689 break;
3690 }
3691
3692 /* If OUR_PREV references the register that dies here, it is an
3693 additional use. Hence any prior SET isn't dead. However, this
3694 insn becomes the new place for the REG_DEAD note. */
3695 if (reg_overlap_mentioned_p (XEXP (note, 0),
3696 PATTERN (our_prev)))
3697 {
3698 XEXP (note, 1) = REG_NOTES (our_prev);
3699 REG_NOTES (our_prev) = note;
3700 break;
3701 }
3702 }
3703 }
3704
3705 delete_insn (insn);
3706 }
3707 \f
3708 /* Delete insn INSN from the chain of insns and update label ref counts.
3709 May delete some following insns as a consequence; may even delete
3710 a label elsewhere and insns that follow it.
3711
3712 Returns the first insn after INSN that was not deleted. */
3713
3714 rtx
3715 delete_insn (insn)
3716 register rtx insn;
3717 {
3718 register rtx next = NEXT_INSN (insn);
3719 register rtx prev = PREV_INSN (insn);
3720 register int was_code_label = (GET_CODE (insn) == CODE_LABEL);
3721 register int dont_really_delete = 0;
3722
3723 while (next && INSN_DELETED_P (next))
3724 next = NEXT_INSN (next);
3725
3726 /* This insn is already deleted => return first following nondeleted. */
3727 if (INSN_DELETED_P (insn))
3728 return next;
3729
3730 /* Don't delete user-declared labels. Convert them to special NOTEs
3731 instead. */
3732 if (was_code_label && LABEL_NAME (insn) != 0
3733 && optimize && ! dont_really_delete)
3734 {
3735 PUT_CODE (insn, NOTE);
3736 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED_LABEL;
3737 NOTE_SOURCE_FILE (insn) = 0;
3738 dont_really_delete = 1;
3739 }
3740 else
3741 /* Mark this insn as deleted. */
3742 INSN_DELETED_P (insn) = 1;
3743
3744 /* If this is an unconditional jump, delete it from the jump chain. */
3745 if (simplejump_p (insn))
3746 delete_from_jump_chain (insn);
3747
3748 /* If instruction is followed by a barrier,
3749 delete the barrier too. */
3750
3751 if (next != 0 && GET_CODE (next) == BARRIER)
3752 {
3753 INSN_DELETED_P (next) = 1;
3754 next = NEXT_INSN (next);
3755 }
3756
3757 /* Patch out INSN (and the barrier if any) */
3758
3759 if (optimize && ! dont_really_delete)
3760 {
3761 if (prev)
3762 {
3763 NEXT_INSN (prev) = next;
3764 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3765 NEXT_INSN (XVECEXP (PATTERN (prev), 0,
3766 XVECLEN (PATTERN (prev), 0) - 1)) = next;
3767 }
3768
3769 if (next)
3770 {
3771 PREV_INSN (next) = prev;
3772 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3773 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3774 }
3775
3776 if (prev && NEXT_INSN (prev) == 0)
3777 set_last_insn (prev);
3778 }
3779
3780 /* If deleting a jump, decrement the count of the label,
3781 and delete the label if it is now unused. */
3782
3783 if (GET_CODE (insn) == JUMP_INSN && JUMP_LABEL (insn))
3784 if (--LABEL_NUSES (JUMP_LABEL (insn)) == 0)
3785 {
3786 /* This can delete NEXT or PREV,
3787 either directly if NEXT is JUMP_LABEL (INSN),
3788 or indirectly through more levels of jumps. */
3789 delete_insn (JUMP_LABEL (insn));
3790 /* I feel a little doubtful about this loop,
3791 but I see no clean and sure alternative way
3792 to find the first insn after INSN that is not now deleted.
3793 I hope this works. */
3794 while (next && INSN_DELETED_P (next))
3795 next = NEXT_INSN (next);
3796 return next;
3797 }
3798
3799 /* Likewise if we're deleting a dispatch table. */
3800
3801 if (GET_CODE (insn) == JUMP_INSN
3802 && (GET_CODE (PATTERN (insn)) == ADDR_VEC
3803 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC))
3804 {
3805 rtx pat = PATTERN (insn);
3806 int i, diff_vec_p = GET_CODE (pat) == ADDR_DIFF_VEC;
3807 int len = XVECLEN (pat, diff_vec_p);
3808
3809 for (i = 0; i < len; i++)
3810 if (--LABEL_NUSES (XEXP (XVECEXP (pat, diff_vec_p, i), 0)) == 0)
3811 delete_insn (XEXP (XVECEXP (pat, diff_vec_p, i), 0));
3812 while (next && INSN_DELETED_P (next))
3813 next = NEXT_INSN (next);
3814 return next;
3815 }
3816
3817 while (prev && (INSN_DELETED_P (prev) || GET_CODE (prev) == NOTE))
3818 prev = PREV_INSN (prev);
3819
3820 /* If INSN was a label and a dispatch table follows it,
3821 delete the dispatch table. The tablejump must have gone already.
3822 It isn't useful to fall through into a table. */
3823
3824 if (was_code_label
3825 && NEXT_INSN (insn) != 0
3826 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN
3827 && (GET_CODE (PATTERN (NEXT_INSN (insn))) == ADDR_VEC
3828 || GET_CODE (PATTERN (NEXT_INSN (insn))) == ADDR_DIFF_VEC))
3829 next = delete_insn (NEXT_INSN (insn));
3830
3831 /* If INSN was a label, delete insns following it if now unreachable. */
3832
3833 if (was_code_label && prev && GET_CODE (prev) == BARRIER)
3834 {
3835 register RTX_CODE code;
3836 while (next != 0
3837 && (GET_RTX_CLASS (code = GET_CODE (next)) == 'i'
3838 || code == NOTE || code == BARRIER
3839 || (code == CODE_LABEL && INSN_DELETED_P (next))))
3840 {
3841 if (code == NOTE
3842 && NOTE_LINE_NUMBER (next) != NOTE_INSN_FUNCTION_END)
3843 next = NEXT_INSN (next);
3844 /* Keep going past other deleted labels to delete what follows. */
3845 else if (code == CODE_LABEL && INSN_DELETED_P (next))
3846 next = NEXT_INSN (next);
3847 else
3848 /* Note: if this deletes a jump, it can cause more
3849 deletion of unreachable code, after a different label.
3850 As long as the value from this recursive call is correct,
3851 this invocation functions correctly. */
3852 next = delete_insn (next);
3853 }
3854 }
3855
3856 return next;
3857 }
3858
3859 /* Advance from INSN till reaching something not deleted
3860 then return that. May return INSN itself. */
3861
3862 rtx
3863 next_nondeleted_insn (insn)
3864 rtx insn;
3865 {
3866 while (INSN_DELETED_P (insn))
3867 insn = NEXT_INSN (insn);
3868 return insn;
3869 }
3870 \f
3871 /* Delete a range of insns from FROM to TO, inclusive.
3872 This is for the sake of peephole optimization, so assume
3873 that whatever these insns do will still be done by a new
3874 peephole insn that will replace them. */
3875
3876 void
3877 delete_for_peephole (from, to)
3878 register rtx from, to;
3879 {
3880 register rtx insn = from;
3881
3882 while (1)
3883 {
3884 register rtx next = NEXT_INSN (insn);
3885 register rtx prev = PREV_INSN (insn);
3886
3887 if (GET_CODE (insn) != NOTE)
3888 {
3889 INSN_DELETED_P (insn) = 1;
3890
3891 /* Patch this insn out of the chain. */
3892 /* We don't do this all at once, because we
3893 must preserve all NOTEs. */
3894 if (prev)
3895 NEXT_INSN (prev) = next;
3896
3897 if (next)
3898 PREV_INSN (next) = prev;
3899 }
3900
3901 if (insn == to)
3902 break;
3903 insn = next;
3904 }
3905
3906 /* Note that if TO is an unconditional jump
3907 we *do not* delete the BARRIER that follows,
3908 since the peephole that replaces this sequence
3909 is also an unconditional jump in that case. */
3910 }
3911 \f
3912 /* Invert the condition of the jump JUMP, and make it jump
3913 to label NLABEL instead of where it jumps now. */
3914
3915 int
3916 invert_jump (jump, nlabel)
3917 rtx jump, nlabel;
3918 {
3919 /* We have to either invert the condition and change the label or
3920 do neither. Either operation could fail. We first try to invert
3921 the jump. If that succeeds, we try changing the label. If that fails,
3922 we invert the jump back to what it was. */
3923
3924 if (! invert_exp (PATTERN (jump), jump))
3925 return 0;
3926
3927 if (redirect_jump (jump, nlabel))
3928 {
3929 if (flag_branch_probabilities)
3930 {
3931 rtx note = find_reg_note (jump, REG_BR_PROB, 0);
3932
3933 /* An inverted jump means that a probability taken becomes a
3934 probability not taken. Subtract the branch probability from the
3935 probability base to convert it back to a taken probability.
3936 (We don't flip the probability on a branch that's never taken. */
3937 if (note && XINT (XEXP (note, 0), 0) >= 0)
3938 XINT (XEXP (note, 0), 0) = REG_BR_PROB_BASE - XINT (XEXP (note, 0), 0);
3939 }
3940
3941 return 1;
3942 }
3943
3944 if (! invert_exp (PATTERN (jump), jump))
3945 /* This should just be putting it back the way it was. */
3946 abort ();
3947
3948 return 0;
3949 }
3950
3951 /* Invert the jump condition of rtx X contained in jump insn, INSN.
3952
3953 Return 1 if we can do so, 0 if we cannot find a way to do so that
3954 matches a pattern. */
3955
3956 int
3957 invert_exp (x, insn)
3958 rtx x;
3959 rtx insn;
3960 {
3961 register RTX_CODE code;
3962 register int i;
3963 register char *fmt;
3964
3965 code = GET_CODE (x);
3966
3967 if (code == IF_THEN_ELSE)
3968 {
3969 register rtx comp = XEXP (x, 0);
3970 register rtx tem;
3971
3972 /* We can do this in two ways: The preferable way, which can only
3973 be done if this is not an integer comparison, is to reverse
3974 the comparison code. Otherwise, swap the THEN-part and ELSE-part
3975 of the IF_THEN_ELSE. If we can't do either, fail. */
3976
3977 if (can_reverse_comparison_p (comp, insn)
3978 && validate_change (insn, &XEXP (x, 0),
3979 gen_rtx_fmt_ee (reverse_condition (GET_CODE (comp)),
3980 GET_MODE (comp), XEXP (comp, 0),
3981 XEXP (comp, 1)), 0))
3982 return 1;
3983
3984 tem = XEXP (x, 1);
3985 validate_change (insn, &XEXP (x, 1), XEXP (x, 2), 1);
3986 validate_change (insn, &XEXP (x, 2), tem, 1);
3987 return apply_change_group ();
3988 }
3989
3990 fmt = GET_RTX_FORMAT (code);
3991 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3992 {
3993 if (fmt[i] == 'e')
3994 if (! invert_exp (XEXP (x, i), insn))
3995 return 0;
3996 if (fmt[i] == 'E')
3997 {
3998 register int j;
3999 for (j = 0; j < XVECLEN (x, i); j++)
4000 if (!invert_exp (XVECEXP (x, i, j), insn))
4001 return 0;
4002 }
4003 }
4004
4005 return 1;
4006 }
4007 \f
4008 /* Make jump JUMP jump to label NLABEL instead of where it jumps now.
4009 If the old jump target label is unused as a result,
4010 it and the code following it may be deleted.
4011
4012 If NLABEL is zero, we are to turn the jump into a (possibly conditional)
4013 RETURN insn.
4014
4015 The return value will be 1 if the change was made, 0 if it wasn't (this
4016 can only occur for NLABEL == 0). */
4017
4018 int
4019 redirect_jump (jump, nlabel)
4020 rtx jump, nlabel;
4021 {
4022 register rtx olabel = JUMP_LABEL (jump);
4023
4024 if (nlabel == olabel)
4025 return 1;
4026
4027 if (! redirect_exp (&PATTERN (jump), olabel, nlabel, jump))
4028 return 0;
4029
4030 /* If this is an unconditional branch, delete it from the jump_chain of
4031 OLABEL and add it to the jump_chain of NLABEL (assuming both labels
4032 have UID's in range and JUMP_CHAIN is valid). */
4033 if (jump_chain && (simplejump_p (jump)
4034 || GET_CODE (PATTERN (jump)) == RETURN))
4035 {
4036 int label_index = nlabel ? INSN_UID (nlabel) : 0;
4037
4038 delete_from_jump_chain (jump);
4039 if (label_index < max_jump_chain
4040 && INSN_UID (jump) < max_jump_chain)
4041 {
4042 jump_chain[INSN_UID (jump)] = jump_chain[label_index];
4043 jump_chain[label_index] = jump;
4044 }
4045 }
4046
4047 JUMP_LABEL (jump) = nlabel;
4048 if (nlabel)
4049 ++LABEL_NUSES (nlabel);
4050
4051 if (olabel && --LABEL_NUSES (olabel) == 0)
4052 delete_insn (olabel);
4053
4054 return 1;
4055 }
4056
4057 /* Delete the instruction JUMP from any jump chain it might be on. */
4058
4059 static void
4060 delete_from_jump_chain (jump)
4061 rtx jump;
4062 {
4063 int index;
4064 rtx olabel = JUMP_LABEL (jump);
4065
4066 /* Handle unconditional jumps. */
4067 if (jump_chain && olabel != 0
4068 && INSN_UID (olabel) < max_jump_chain
4069 && simplejump_p (jump))
4070 index = INSN_UID (olabel);
4071 /* Handle return insns. */
4072 else if (jump_chain && GET_CODE (PATTERN (jump)) == RETURN)
4073 index = 0;
4074 else return;
4075
4076 if (jump_chain[index] == jump)
4077 jump_chain[index] = jump_chain[INSN_UID (jump)];
4078 else
4079 {
4080 rtx insn;
4081
4082 for (insn = jump_chain[index];
4083 insn != 0;
4084 insn = jump_chain[INSN_UID (insn)])
4085 if (jump_chain[INSN_UID (insn)] == jump)
4086 {
4087 jump_chain[INSN_UID (insn)] = jump_chain[INSN_UID (jump)];
4088 break;
4089 }
4090 }
4091 }
4092
4093 /* If NLABEL is nonzero, throughout the rtx at LOC,
4094 alter (LABEL_REF OLABEL) to (LABEL_REF NLABEL). If OLABEL is
4095 zero, alter (RETURN) to (LABEL_REF NLABEL).
4096
4097 If NLABEL is zero, alter (LABEL_REF OLABEL) to (RETURN) and check
4098 validity with validate_change. Convert (set (pc) (label_ref olabel))
4099 to (return).
4100
4101 Return 0 if we found a change we would like to make but it is invalid.
4102 Otherwise, return 1. */
4103
4104 int
4105 redirect_exp (loc, olabel, nlabel, insn)
4106 rtx *loc;
4107 rtx olabel, nlabel;
4108 rtx insn;
4109 {
4110 register rtx x = *loc;
4111 register RTX_CODE code = GET_CODE (x);
4112 register int i;
4113 register char *fmt;
4114
4115 if (code == LABEL_REF)
4116 {
4117 if (XEXP (x, 0) == olabel)
4118 {
4119 if (nlabel)
4120 XEXP (x, 0) = nlabel;
4121 else
4122 return validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 0);
4123 return 1;
4124 }
4125 }
4126 else if (code == RETURN && olabel == 0)
4127 {
4128 x = gen_rtx_LABEL_REF (VOIDmode, nlabel);
4129 if (loc == &PATTERN (insn))
4130 x = gen_rtx_SET (VOIDmode, pc_rtx, x);
4131 return validate_change (insn, loc, x, 0);
4132 }
4133
4134 if (code == SET && nlabel == 0 && SET_DEST (x) == pc_rtx
4135 && GET_CODE (SET_SRC (x)) == LABEL_REF
4136 && XEXP (SET_SRC (x), 0) == olabel)
4137 return validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 0);
4138
4139 fmt = GET_RTX_FORMAT (code);
4140 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4141 {
4142 if (fmt[i] == 'e')
4143 if (! redirect_exp (&XEXP (x, i), olabel, nlabel, insn))
4144 return 0;
4145 if (fmt[i] == 'E')
4146 {
4147 register int j;
4148 for (j = 0; j < XVECLEN (x, i); j++)
4149 if (! redirect_exp (&XVECEXP (x, i, j), olabel, nlabel, insn))
4150 return 0;
4151 }
4152 }
4153
4154 return 1;
4155 }
4156 \f
4157 /* Make jump JUMP jump to label NLABEL, assuming it used to be a tablejump.
4158
4159 If the old jump target label (before the dispatch table) becomes unused,
4160 it and the dispatch table may be deleted. In that case, find the insn
4161 before the jump references that label and delete it and logical successors
4162 too. */
4163
4164 static void
4165 redirect_tablejump (jump, nlabel)
4166 rtx jump, nlabel;
4167 {
4168 register rtx olabel = JUMP_LABEL (jump);
4169
4170 /* Add this jump to the jump_chain of NLABEL. */
4171 if (jump_chain && INSN_UID (nlabel) < max_jump_chain
4172 && INSN_UID (jump) < max_jump_chain)
4173 {
4174 jump_chain[INSN_UID (jump)] = jump_chain[INSN_UID (nlabel)];
4175 jump_chain[INSN_UID (nlabel)] = jump;
4176 }
4177
4178 PATTERN (jump) = gen_jump (nlabel);
4179 JUMP_LABEL (jump) = nlabel;
4180 ++LABEL_NUSES (nlabel);
4181 INSN_CODE (jump) = -1;
4182
4183 if (--LABEL_NUSES (olabel) == 0)
4184 {
4185 delete_labelref_insn (jump, olabel, 0);
4186 delete_insn (olabel);
4187 }
4188 }
4189
4190 /* Find the insn referencing LABEL that is a logical predecessor of INSN.
4191 If we found one, delete it and then delete this insn if DELETE_THIS is
4192 non-zero. Return non-zero if INSN or a predecessor references LABEL. */
4193
4194 static int
4195 delete_labelref_insn (insn, label, delete_this)
4196 rtx insn, label;
4197 int delete_this;
4198 {
4199 int deleted = 0;
4200 rtx link;
4201
4202 if (GET_CODE (insn) != NOTE
4203 && reg_mentioned_p (label, PATTERN (insn)))
4204 {
4205 if (delete_this)
4206 {
4207 delete_insn (insn);
4208 deleted = 1;
4209 }
4210 else
4211 return 1;
4212 }
4213
4214 for (link = LOG_LINKS (insn); link; link = XEXP (link, 1))
4215 if (delete_labelref_insn (XEXP (link, 0), label, 1))
4216 {
4217 if (delete_this)
4218 {
4219 delete_insn (insn);
4220 deleted = 1;
4221 }
4222 else
4223 return 1;
4224 }
4225
4226 return deleted;
4227 }
4228 \f
4229 /* Like rtx_equal_p except that it considers two REGs as equal
4230 if they renumber to the same value and considers two commutative
4231 operations to be the same if the order of the operands has been
4232 reversed. */
4233
4234 int
4235 rtx_renumbered_equal_p (x, y)
4236 rtx x, y;
4237 {
4238 register int i;
4239 register RTX_CODE code = GET_CODE (x);
4240 register char *fmt;
4241
4242 if (x == y)
4243 return 1;
4244
4245 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
4246 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
4247 && GET_CODE (SUBREG_REG (y)) == REG)))
4248 {
4249 int reg_x = -1, reg_y = -1;
4250 int word_x = 0, word_y = 0;
4251
4252 if (GET_MODE (x) != GET_MODE (y))
4253 return 0;
4254
4255 /* If we haven't done any renumbering, don't
4256 make any assumptions. */
4257 if (reg_renumber == 0)
4258 return rtx_equal_p (x, y);
4259
4260 if (code == SUBREG)
4261 {
4262 reg_x = REGNO (SUBREG_REG (x));
4263 word_x = SUBREG_WORD (x);
4264
4265 if (reg_renumber[reg_x] >= 0)
4266 {
4267 reg_x = reg_renumber[reg_x] + word_x;
4268 word_x = 0;
4269 }
4270 }
4271
4272 else
4273 {
4274 reg_x = REGNO (x);
4275 if (reg_renumber[reg_x] >= 0)
4276 reg_x = reg_renumber[reg_x];
4277 }
4278
4279 if (GET_CODE (y) == SUBREG)
4280 {
4281 reg_y = REGNO (SUBREG_REG (y));
4282 word_y = SUBREG_WORD (y);
4283
4284 if (reg_renumber[reg_y] >= 0)
4285 {
4286 reg_y = reg_renumber[reg_y];
4287 word_y = 0;
4288 }
4289 }
4290
4291 else
4292 {
4293 reg_y = REGNO (y);
4294 if (reg_renumber[reg_y] >= 0)
4295 reg_y = reg_renumber[reg_y];
4296 }
4297
4298 return reg_x >= 0 && reg_x == reg_y && word_x == word_y;
4299 }
4300
4301 /* Now we have disposed of all the cases
4302 in which different rtx codes can match. */
4303 if (code != GET_CODE (y))
4304 return 0;
4305
4306 switch (code)
4307 {
4308 case PC:
4309 case CC0:
4310 case ADDR_VEC:
4311 case ADDR_DIFF_VEC:
4312 return 0;
4313
4314 case CONST_INT:
4315 return INTVAL (x) == INTVAL (y);
4316
4317 case LABEL_REF:
4318 /* We can't assume nonlocal labels have their following insns yet. */
4319 if (LABEL_REF_NONLOCAL_P (x) || LABEL_REF_NONLOCAL_P (y))
4320 return XEXP (x, 0) == XEXP (y, 0);
4321
4322 /* Two label-refs are equivalent if they point at labels
4323 in the same position in the instruction stream. */
4324 return (next_real_insn (XEXP (x, 0))
4325 == next_real_insn (XEXP (y, 0)));
4326
4327 case SYMBOL_REF:
4328 return XSTR (x, 0) == XSTR (y, 0);
4329
4330 default:
4331 break;
4332 }
4333
4334 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
4335
4336 if (GET_MODE (x) != GET_MODE (y))
4337 return 0;
4338
4339 /* For commutative operations, the RTX match if the operand match in any
4340 order. Also handle the simple binary and unary cases without a loop. */
4341 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
4342 return ((rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
4343 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)))
4344 || (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 1))
4345 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 0))));
4346 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
4347 return (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
4348 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)));
4349 else if (GET_RTX_CLASS (code) == '1')
4350 return rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0));
4351
4352 /* Compare the elements. If any pair of corresponding elements
4353 fail to match, return 0 for the whole things. */
4354
4355 fmt = GET_RTX_FORMAT (code);
4356 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4357 {
4358 register int j;
4359 switch (fmt[i])
4360 {
4361 case 'w':
4362 if (XWINT (x, i) != XWINT (y, i))
4363 return 0;
4364 break;
4365
4366 case 'i':
4367 if (XINT (x, i) != XINT (y, i))
4368 return 0;
4369 break;
4370
4371 case 's':
4372 if (strcmp (XSTR (x, i), XSTR (y, i)))
4373 return 0;
4374 break;
4375
4376 case 'e':
4377 if (! rtx_renumbered_equal_p (XEXP (x, i), XEXP (y, i)))
4378 return 0;
4379 break;
4380
4381 case 'u':
4382 if (XEXP (x, i) != XEXP (y, i))
4383 return 0;
4384 /* fall through. */
4385 case '0':
4386 break;
4387
4388 case 'E':
4389 if (XVECLEN (x, i) != XVECLEN (y, i))
4390 return 0;
4391 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4392 if (!rtx_renumbered_equal_p (XVECEXP (x, i, j), XVECEXP (y, i, j)))
4393 return 0;
4394 break;
4395
4396 default:
4397 abort ();
4398 }
4399 }
4400 return 1;
4401 }
4402 \f
4403 /* If X is a hard register or equivalent to one or a subregister of one,
4404 return the hard register number. If X is a pseudo register that was not
4405 assigned a hard register, return the pseudo register number. Otherwise,
4406 return -1. Any rtx is valid for X. */
4407
4408 int
4409 true_regnum (x)
4410 rtx x;
4411 {
4412 if (GET_CODE (x) == REG)
4413 {
4414 if (REGNO (x) >= FIRST_PSEUDO_REGISTER && reg_renumber[REGNO (x)] >= 0)
4415 return reg_renumber[REGNO (x)];
4416 return REGNO (x);
4417 }
4418 if (GET_CODE (x) == SUBREG)
4419 {
4420 int base = true_regnum (SUBREG_REG (x));
4421 if (base >= 0 && base < FIRST_PSEUDO_REGISTER)
4422 return SUBREG_WORD (x) + base;
4423 }
4424 return -1;
4425 }
4426 \f
4427 /* Optimize code of the form:
4428
4429 for (x = a[i]; x; ...)
4430 ...
4431 for (x = a[i]; x; ...)
4432 ...
4433 foo:
4434
4435 Loop optimize will change the above code into
4436
4437 if (x = a[i])
4438 for (;;)
4439 { ...; if (! (x = ...)) break; }
4440 if (x = a[i])
4441 for (;;)
4442 { ...; if (! (x = ...)) break; }
4443 foo:
4444
4445 In general, if the first test fails, the program can branch
4446 directly to `foo' and skip the second try which is doomed to fail.
4447 We run this after loop optimization and before flow analysis. */
4448
4449 /* When comparing the insn patterns, we track the fact that different
4450 pseudo-register numbers may have been used in each computation.
4451 The following array stores an equivalence -- same_regs[I] == J means
4452 that pseudo register I was used in the first set of tests in a context
4453 where J was used in the second set. We also count the number of such
4454 pending equivalences. If nonzero, the expressions really aren't the
4455 same. */
4456
4457 static int *same_regs;
4458
4459 static int num_same_regs;
4460
4461 /* Track any registers modified between the target of the first jump and
4462 the second jump. They never compare equal. */
4463
4464 static char *modified_regs;
4465
4466 /* Record if memory was modified. */
4467
4468 static int modified_mem;
4469
4470 /* Called via note_stores on each insn between the target of the first
4471 branch and the second branch. It marks any changed registers. */
4472
4473 static void
4474 mark_modified_reg (dest, x)
4475 rtx dest;
4476 rtx x ATTRIBUTE_UNUSED;
4477 {
4478 int regno, i;
4479
4480 if (GET_CODE (dest) == SUBREG)
4481 dest = SUBREG_REG (dest);
4482
4483 if (GET_CODE (dest) == MEM)
4484 modified_mem = 1;
4485
4486 if (GET_CODE (dest) != REG)
4487 return;
4488
4489 regno = REGNO (dest);
4490 if (regno >= FIRST_PSEUDO_REGISTER)
4491 modified_regs[regno] = 1;
4492 else
4493 for (i = 0; i < HARD_REGNO_NREGS (regno, GET_MODE (dest)); i++)
4494 modified_regs[regno + i] = 1;
4495 }
4496
4497 /* F is the first insn in the chain of insns. */
4498
4499 void
4500 thread_jumps (f, max_reg, flag_before_loop)
4501 rtx f;
4502 int max_reg;
4503 int flag_before_loop;
4504 {
4505 /* Basic algorithm is to find a conditional branch,
4506 the label it may branch to, and the branch after
4507 that label. If the two branches test the same condition,
4508 walk back from both branch paths until the insn patterns
4509 differ, or code labels are hit. If we make it back to
4510 the target of the first branch, then we know that the first branch
4511 will either always succeed or always fail depending on the relative
4512 senses of the two branches. So adjust the first branch accordingly
4513 in this case. */
4514
4515 rtx label, b1, b2, t1, t2;
4516 enum rtx_code code1, code2;
4517 rtx b1op0, b1op1, b2op0, b2op1;
4518 int changed = 1;
4519 int i;
4520 int *all_reset;
4521
4522 /* Allocate register tables and quick-reset table. */
4523 modified_regs = (char *) alloca (max_reg * sizeof (char));
4524 same_regs = (int *) alloca (max_reg * sizeof (int));
4525 all_reset = (int *) alloca (max_reg * sizeof (int));
4526 for (i = 0; i < max_reg; i++)
4527 all_reset[i] = -1;
4528
4529 while (changed)
4530 {
4531 changed = 0;
4532
4533 for (b1 = f; b1; b1 = NEXT_INSN (b1))
4534 {
4535 /* Get to a candidate branch insn. */
4536 if (GET_CODE (b1) != JUMP_INSN
4537 || ! condjump_p (b1) || simplejump_p (b1)
4538 || JUMP_LABEL (b1) == 0)
4539 continue;
4540
4541 bzero (modified_regs, max_reg * sizeof (char));
4542 modified_mem = 0;
4543
4544 bcopy ((char *) all_reset, (char *) same_regs,
4545 max_reg * sizeof (int));
4546 num_same_regs = 0;
4547
4548 label = JUMP_LABEL (b1);
4549
4550 /* Look for a branch after the target. Record any registers and
4551 memory modified between the target and the branch. Stop when we
4552 get to a label since we can't know what was changed there. */
4553 for (b2 = NEXT_INSN (label); b2; b2 = NEXT_INSN (b2))
4554 {
4555 if (GET_CODE (b2) == CODE_LABEL)
4556 break;
4557
4558 else if (GET_CODE (b2) == JUMP_INSN)
4559 {
4560 /* If this is an unconditional jump and is the only use of
4561 its target label, we can follow it. */
4562 if (simplejump_p (b2)
4563 && JUMP_LABEL (b2) != 0
4564 && LABEL_NUSES (JUMP_LABEL (b2)) == 1)
4565 {
4566 b2 = JUMP_LABEL (b2);
4567 continue;
4568 }
4569 else
4570 break;
4571 }
4572
4573 if (GET_CODE (b2) != CALL_INSN && GET_CODE (b2) != INSN)
4574 continue;
4575
4576 if (GET_CODE (b2) == CALL_INSN)
4577 {
4578 modified_mem = 1;
4579 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4580 if (call_used_regs[i] && ! fixed_regs[i]
4581 && i != STACK_POINTER_REGNUM
4582 && i != FRAME_POINTER_REGNUM
4583 && i != HARD_FRAME_POINTER_REGNUM
4584 && i != ARG_POINTER_REGNUM)
4585 modified_regs[i] = 1;
4586 }
4587
4588 note_stores (PATTERN (b2), mark_modified_reg);
4589 }
4590
4591 /* Check the next candidate branch insn from the label
4592 of the first. */
4593 if (b2 == 0
4594 || GET_CODE (b2) != JUMP_INSN
4595 || b2 == b1
4596 || ! condjump_p (b2)
4597 || simplejump_p (b2))
4598 continue;
4599
4600 /* Get the comparison codes and operands, reversing the
4601 codes if appropriate. If we don't have comparison codes,
4602 we can't do anything. */
4603 b1op0 = XEXP (XEXP (SET_SRC (PATTERN (b1)), 0), 0);
4604 b1op1 = XEXP (XEXP (SET_SRC (PATTERN (b1)), 0), 1);
4605 code1 = GET_CODE (XEXP (SET_SRC (PATTERN (b1)), 0));
4606 if (XEXP (SET_SRC (PATTERN (b1)), 1) == pc_rtx)
4607 code1 = reverse_condition (code1);
4608
4609 b2op0 = XEXP (XEXP (SET_SRC (PATTERN (b2)), 0), 0);
4610 b2op1 = XEXP (XEXP (SET_SRC (PATTERN (b2)), 0), 1);
4611 code2 = GET_CODE (XEXP (SET_SRC (PATTERN (b2)), 0));
4612 if (XEXP (SET_SRC (PATTERN (b2)), 1) == pc_rtx)
4613 code2 = reverse_condition (code2);
4614
4615 /* If they test the same things and knowing that B1 branches
4616 tells us whether or not B2 branches, check if we
4617 can thread the branch. */
4618 if (rtx_equal_for_thread_p (b1op0, b2op0, b2)
4619 && rtx_equal_for_thread_p (b1op1, b2op1, b2)
4620 && (comparison_dominates_p (code1, code2)
4621 || (comparison_dominates_p (code1, reverse_condition (code2))
4622 && can_reverse_comparison_p (XEXP (SET_SRC (PATTERN (b1)),
4623 0),
4624 b1))))
4625 {
4626 t1 = prev_nonnote_insn (b1);
4627 t2 = prev_nonnote_insn (b2);
4628
4629 while (t1 != 0 && t2 != 0)
4630 {
4631 if (t2 == label)
4632 {
4633 /* We have reached the target of the first branch.
4634 If there are no pending register equivalents,
4635 we know that this branch will either always
4636 succeed (if the senses of the two branches are
4637 the same) or always fail (if not). */
4638 rtx new_label;
4639
4640 if (num_same_regs != 0)
4641 break;
4642
4643 if (comparison_dominates_p (code1, code2))
4644 new_label = JUMP_LABEL (b2);
4645 else
4646 new_label = get_label_after (b2);
4647
4648 if (JUMP_LABEL (b1) != new_label)
4649 {
4650 rtx prev = PREV_INSN (new_label);
4651
4652 if (flag_before_loop
4653 && GET_CODE (prev) == NOTE
4654 && NOTE_LINE_NUMBER (prev) == NOTE_INSN_LOOP_BEG)
4655 {
4656 /* Don't thread to the loop label. If a loop
4657 label is reused, loop optimization will
4658 be disabled for that loop. */
4659 new_label = gen_label_rtx ();
4660 emit_label_after (new_label, PREV_INSN (prev));
4661 }
4662 changed |= redirect_jump (b1, new_label);
4663 }
4664 break;
4665 }
4666
4667 /* If either of these is not a normal insn (it might be
4668 a JUMP_INSN, CALL_INSN, or CODE_LABEL) we fail. (NOTEs
4669 have already been skipped above.) Similarly, fail
4670 if the insns are different. */
4671 if (GET_CODE (t1) != INSN || GET_CODE (t2) != INSN
4672 || recog_memoized (t1) != recog_memoized (t2)
4673 || ! rtx_equal_for_thread_p (PATTERN (t1),
4674 PATTERN (t2), t2))
4675 break;
4676
4677 t1 = prev_nonnote_insn (t1);
4678 t2 = prev_nonnote_insn (t2);
4679 }
4680 }
4681 }
4682 }
4683 }
4684 \f
4685 /* This is like RTX_EQUAL_P except that it knows about our handling of
4686 possibly equivalent registers and knows to consider volatile and
4687 modified objects as not equal.
4688
4689 YINSN is the insn containing Y. */
4690
4691 int
4692 rtx_equal_for_thread_p (x, y, yinsn)
4693 rtx x, y;
4694 rtx yinsn;
4695 {
4696 register int i;
4697 register int j;
4698 register enum rtx_code code;
4699 register char *fmt;
4700
4701 code = GET_CODE (x);
4702 /* Rtx's of different codes cannot be equal. */
4703 if (code != GET_CODE (y))
4704 return 0;
4705
4706 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
4707 (REG:SI x) and (REG:HI x) are NOT equivalent. */
4708
4709 if (GET_MODE (x) != GET_MODE (y))
4710 return 0;
4711
4712 /* For floating-point, consider everything unequal. This is a bit
4713 pessimistic, but this pass would only rarely do anything for FP
4714 anyway. */
4715 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
4716 && FLOAT_MODE_P (GET_MODE (x)) && ! flag_fast_math)
4717 return 0;
4718
4719 /* For commutative operations, the RTX match if the operand match in any
4720 order. Also handle the simple binary and unary cases without a loop. */
4721 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
4722 return ((rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn)
4723 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 1), yinsn))
4724 || (rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 1), yinsn)
4725 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 0), yinsn)));
4726 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
4727 return (rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn)
4728 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 1), yinsn));
4729 else if (GET_RTX_CLASS (code) == '1')
4730 return rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn);
4731
4732 /* Handle special-cases first. */
4733 switch (code)
4734 {
4735 case REG:
4736 if (REGNO (x) == REGNO (y) && ! modified_regs[REGNO (x)])
4737 return 1;
4738
4739 /* If neither is user variable or hard register, check for possible
4740 equivalence. */
4741 if (REG_USERVAR_P (x) || REG_USERVAR_P (y)
4742 || REGNO (x) < FIRST_PSEUDO_REGISTER
4743 || REGNO (y) < FIRST_PSEUDO_REGISTER)
4744 return 0;
4745
4746 if (same_regs[REGNO (x)] == -1)
4747 {
4748 same_regs[REGNO (x)] = REGNO (y);
4749 num_same_regs++;
4750
4751 /* If this is the first time we are seeing a register on the `Y'
4752 side, see if it is the last use. If not, we can't thread the
4753 jump, so mark it as not equivalent. */
4754 if (REGNO_LAST_UID (REGNO (y)) != INSN_UID (yinsn))
4755 return 0;
4756
4757 return 1;
4758 }
4759 else
4760 return (same_regs[REGNO (x)] == REGNO (y));
4761
4762 break;
4763
4764 case MEM:
4765 /* If memory modified or either volatile, not equivalent.
4766 Else, check address. */
4767 if (modified_mem || MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
4768 return 0;
4769
4770 return rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn);
4771
4772 case ASM_INPUT:
4773 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
4774 return 0;
4775
4776 break;
4777
4778 case SET:
4779 /* Cancel a pending `same_regs' if setting equivalenced registers.
4780 Then process source. */
4781 if (GET_CODE (SET_DEST (x)) == REG
4782 && GET_CODE (SET_DEST (y)) == REG)
4783 {
4784 if (same_regs[REGNO (SET_DEST (x))] == REGNO (SET_DEST (y)))
4785 {
4786 same_regs[REGNO (SET_DEST (x))] = -1;
4787 num_same_regs--;
4788 }
4789 else if (REGNO (SET_DEST (x)) != REGNO (SET_DEST (y)))
4790 return 0;
4791 }
4792 else
4793 if (rtx_equal_for_thread_p (SET_DEST (x), SET_DEST (y), yinsn) == 0)
4794 return 0;
4795
4796 return rtx_equal_for_thread_p (SET_SRC (x), SET_SRC (y), yinsn);
4797
4798 case LABEL_REF:
4799 return XEXP (x, 0) == XEXP (y, 0);
4800
4801 case SYMBOL_REF:
4802 return XSTR (x, 0) == XSTR (y, 0);
4803
4804 default:
4805 break;
4806 }
4807
4808 if (x == y)
4809 return 1;
4810
4811 fmt = GET_RTX_FORMAT (code);
4812 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4813 {
4814 switch (fmt[i])
4815 {
4816 case 'w':
4817 if (XWINT (x, i) != XWINT (y, i))
4818 return 0;
4819 break;
4820
4821 case 'n':
4822 case 'i':
4823 if (XINT (x, i) != XINT (y, i))
4824 return 0;
4825 break;
4826
4827 case 'V':
4828 case 'E':
4829 /* Two vectors must have the same length. */
4830 if (XVECLEN (x, i) != XVECLEN (y, i))
4831 return 0;
4832
4833 /* And the corresponding elements must match. */
4834 for (j = 0; j < XVECLEN (x, i); j++)
4835 if (rtx_equal_for_thread_p (XVECEXP (x, i, j),
4836 XVECEXP (y, i, j), yinsn) == 0)
4837 return 0;
4838 break;
4839
4840 case 'e':
4841 if (rtx_equal_for_thread_p (XEXP (x, i), XEXP (y, i), yinsn) == 0)
4842 return 0;
4843 break;
4844
4845 case 'S':
4846 case 's':
4847 if (strcmp (XSTR (x, i), XSTR (y, i)))
4848 return 0;
4849 break;
4850
4851 case 'u':
4852 /* These are just backpointers, so they don't matter. */
4853 break;
4854
4855 case '0':
4856 break;
4857
4858 /* It is believed that rtx's at this level will never
4859 contain anything but integers and other rtx's,
4860 except for within LABEL_REFs and SYMBOL_REFs. */
4861 default:
4862 abort ();
4863 }
4864 }
4865 return 1;
4866 }
4867 \f
4868
4869 #ifndef HAVE_cc0
4870 /* Return the insn that NEW can be safely inserted in front of starting at
4871 the jump insn INSN. Return 0 if it is not safe to do this jump
4872 optimization. Note that NEW must contain a single set. */
4873
4874 static rtx
4875 find_insert_position (insn, new)
4876 rtx insn;
4877 rtx new;
4878 {
4879 int i;
4880 rtx prev;
4881
4882 /* If NEW does not clobber, it is safe to insert NEW before INSN. */
4883 if (GET_CODE (PATTERN (new)) != PARALLEL)
4884 return insn;
4885
4886 for (i = XVECLEN (PATTERN (new), 0) - 1; i >= 0; i--)
4887 if (GET_CODE (XVECEXP (PATTERN (new), 0, i)) == CLOBBER
4888 && reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4889 insn))
4890 break;
4891
4892 if (i < 0)
4893 return insn;
4894
4895 /* There is a good chance that the previous insn PREV sets the thing
4896 being clobbered (often the CC in a hard reg). If PREV does not
4897 use what NEW sets, we can insert NEW before PREV. */
4898
4899 prev = prev_active_insn (insn);
4900 for (i = XVECLEN (PATTERN (new), 0) - 1; i >= 0; i--)
4901 if (GET_CODE (XVECEXP (PATTERN (new), 0, i)) == CLOBBER
4902 && reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4903 insn)
4904 && ! modified_in_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4905 prev))
4906 return 0;
4907
4908 return reg_mentioned_p (SET_DEST (single_set (new)), prev) ? 0 : prev;
4909 }
4910 #endif /* !HAVE_cc0 */
GNU Compiler Collection
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