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[gcc.git] / gcc / jump.c
1 /* Optimize jump instructions, for GNU compiler.
2 Copyright (C) 1987, 88, 89, 91-97, 1998 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21
22 /* This is the jump-optimization pass of the compiler.
23 It is run two or three times: once before cse, sometimes once after cse,
24 and once after reload (before final).
25
26 jump_optimize deletes unreachable code and labels that are not used.
27 It also deletes jumps that jump to the following insn,
28 and simplifies jumps around unconditional jumps and jumps
29 to unconditional jumps.
30
31 Each CODE_LABEL has a count of the times it is used
32 stored in the LABEL_NUSES internal field, and each JUMP_INSN
33 has one label that it refers to stored in the
34 JUMP_LABEL internal field. With this we can detect labels that
35 become unused because of the deletion of all the jumps that
36 formerly used them. The JUMP_LABEL info is sometimes looked
37 at by later passes.
38
39 Optionally, cross-jumping can be done. Currently it is done
40 only the last time (when after reload and before final).
41 In fact, the code for cross-jumping now assumes that register
42 allocation has been done, since it uses `rtx_renumbered_equal_p'.
43
44 Jump optimization is done after cse when cse's constant-propagation
45 causes jumps to become unconditional or to be deleted.
46
47 Unreachable loops are not detected here, because the labels
48 have references and the insns appear reachable from the labels.
49 find_basic_blocks in flow.c finds and deletes such loops.
50
51 The subroutines delete_insn, redirect_jump, and invert_jump are used
52 from other passes as well. */
53
54 #include "config.h"
55 #include "system.h"
56 #include "rtl.h"
57 #include "flags.h"
58 #include "hard-reg-set.h"
59 #include "regs.h"
60 #include "insn-config.h"
61 #include "insn-flags.h"
62 #include "recog.h"
63 #include "expr.h"
64 #include "real.h"
65 #include "except.h"
66
67 /* ??? Eventually must record somehow the labels used by jumps
68 from nested functions. */
69 /* Pre-record the next or previous real insn for each label?
70 No, this pass is very fast anyway. */
71 /* Condense consecutive labels?
72 This would make life analysis faster, maybe. */
73 /* Optimize jump y; x: ... y: jumpif... x?
74 Don't know if it is worth bothering with. */
75 /* Optimize two cases of conditional jump to conditional jump?
76 This can never delete any instruction or make anything dead,
77 or even change what is live at any point.
78 So perhaps let combiner do it. */
79
80 /* Vector indexed by uid.
81 For each CODE_LABEL, index by its uid to get first unconditional jump
82 that jumps to the label.
83 For each JUMP_INSN, index by its uid to get the next unconditional jump
84 that jumps to the same label.
85 Element 0 is the start of a chain of all return insns.
86 (It is safe to use element 0 because insn uid 0 is not used. */
87
88 static rtx *jump_chain;
89
90 /* List of labels referred to from initializers.
91 These can never be deleted. */
92 rtx forced_labels;
93
94 /* Maximum index in jump_chain. */
95
96 static int max_jump_chain;
97
98 /* Set nonzero by jump_optimize if control can fall through
99 to the end of the function. */
100 int can_reach_end;
101
102 /* Indicates whether death notes are significant in cross jump analysis.
103 Normally they are not significant, because of A and B jump to C,
104 and R dies in A, it must die in B. But this might not be true after
105 stack register conversion, and we must compare death notes in that
106 case. */
107
108 static int cross_jump_death_matters = 0;
109
110 static int duplicate_loop_exit_test PROTO((rtx));
111 static void find_cross_jump PROTO((rtx, rtx, int, rtx *, rtx *));
112 static void do_cross_jump PROTO((rtx, rtx, rtx));
113 static int jump_back_p PROTO((rtx, rtx));
114 static int tension_vector_labels PROTO((rtx, int));
115 static void mark_jump_label PROTO((rtx, rtx, int));
116 static void delete_computation PROTO((rtx));
117 static void delete_from_jump_chain PROTO((rtx));
118 static int delete_labelref_insn PROTO((rtx, rtx, int));
119 static void redirect_tablejump PROTO((rtx, rtx));
120 static rtx find_insert_position PROTO((rtx, rtx));
121 \f
122 /* Delete no-op jumps and optimize jumps to jumps
123 and jumps around jumps.
124 Delete unused labels and unreachable code.
125
126 If CROSS_JUMP is 1, detect matching code
127 before a jump and its destination and unify them.
128 If CROSS_JUMP is 2, do cross-jumping, but pay attention to death notes.
129
130 If NOOP_MOVES is nonzero, delete no-op move insns.
131
132 If AFTER_REGSCAN is nonzero, then this jump pass is being run immediately
133 after regscan, and it is safe to use regno_first_uid and regno_last_uid.
134
135 If `optimize' is zero, don't change any code,
136 just determine whether control drops off the end of the function.
137 This case occurs when we have -W and not -O.
138 It works because `delete_insn' checks the value of `optimize'
139 and refrains from actually deleting when that is 0. */
140
141 void
142 jump_optimize (f, cross_jump, noop_moves, after_regscan)
143 rtx f;
144 int cross_jump;
145 int noop_moves;
146 int after_regscan;
147 {
148 register rtx insn, next, note;
149 int changed;
150 int first = 1;
151 int max_uid = 0;
152 rtx last_insn;
153
154 cross_jump_death_matters = (cross_jump == 2);
155
156 /* Initialize LABEL_NUSES and JUMP_LABEL fields. Delete any REG_LABEL
157 notes whose labels don't occur in the insn any more. */
158
159 for (insn = f; insn; insn = NEXT_INSN (insn))
160 {
161 if (GET_CODE (insn) == CODE_LABEL)
162 LABEL_NUSES (insn) = (LABEL_PRESERVE_P (insn) != 0);
163 else if (GET_CODE (insn) == JUMP_INSN)
164 JUMP_LABEL (insn) = 0;
165 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
166 for (note = REG_NOTES (insn); note; note = next)
167 {
168 next = XEXP (note, 1);
169 if (REG_NOTE_KIND (note) == REG_LABEL
170 && ! reg_mentioned_p (XEXP (note, 0), PATTERN (insn)))
171 remove_note (insn, note);
172 }
173
174 if (INSN_UID (insn) > max_uid)
175 max_uid = INSN_UID (insn);
176 }
177
178 max_uid++;
179
180 /* Delete insns following barriers, up to next label. */
181
182 for (insn = f; insn;)
183 {
184 if (GET_CODE (insn) == BARRIER)
185 {
186 insn = NEXT_INSN (insn);
187 while (insn != 0 && GET_CODE (insn) != CODE_LABEL)
188 {
189 if (GET_CODE (insn) == NOTE
190 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)
191 insn = NEXT_INSN (insn);
192 else
193 insn = delete_insn (insn);
194 }
195 /* INSN is now the code_label. */
196 }
197 else
198 insn = NEXT_INSN (insn);
199 }
200
201 /* Leave some extra room for labels and duplicate exit test insns
202 we make. */
203 max_jump_chain = max_uid * 14 / 10;
204 jump_chain = (rtx *) alloca (max_jump_chain * sizeof (rtx));
205 bzero ((char *) jump_chain, max_jump_chain * sizeof (rtx));
206
207 /* Mark the label each jump jumps to.
208 Combine consecutive labels, and count uses of labels.
209
210 For each label, make a chain (using `jump_chain')
211 of all the *unconditional* jumps that jump to it;
212 also make a chain of all returns. */
213
214 for (insn = f; insn; insn = NEXT_INSN (insn))
215 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
216 {
217 mark_jump_label (PATTERN (insn), insn, cross_jump);
218 if (! INSN_DELETED_P (insn) && GET_CODE (insn) == JUMP_INSN)
219 {
220 if (JUMP_LABEL (insn) != 0 && simplejump_p (insn))
221 {
222 jump_chain[INSN_UID (insn)]
223 = jump_chain[INSN_UID (JUMP_LABEL (insn))];
224 jump_chain[INSN_UID (JUMP_LABEL (insn))] = insn;
225 }
226 if (GET_CODE (PATTERN (insn)) == RETURN)
227 {
228 jump_chain[INSN_UID (insn)] = jump_chain[0];
229 jump_chain[0] = insn;
230 }
231 }
232 }
233
234 /* Keep track of labels used from static data;
235 they cannot ever be deleted. */
236
237 for (insn = forced_labels; insn; insn = XEXP (insn, 1))
238 LABEL_NUSES (XEXP (insn, 0))++;
239
240 check_exception_handler_labels ();
241
242 /* Keep track of labels used for marking handlers for exception
243 regions; they cannot usually be deleted. */
244
245 for (insn = exception_handler_labels; insn; insn = XEXP (insn, 1))
246 LABEL_NUSES (XEXP (insn, 0))++;
247
248 exception_optimize ();
249
250 /* Delete all labels already not referenced.
251 Also find the last insn. */
252
253 last_insn = 0;
254 for (insn = f; insn; )
255 {
256 if (GET_CODE (insn) == CODE_LABEL && LABEL_NUSES (insn) == 0)
257 insn = delete_insn (insn);
258 else
259 {
260 last_insn = insn;
261 insn = NEXT_INSN (insn);
262 }
263 }
264
265 if (!optimize)
266 {
267 /* See if there is still a NOTE_INSN_FUNCTION_END in this function.
268 If so record that this function can drop off the end. */
269
270 insn = last_insn;
271 {
272 int n_labels = 1;
273 while (insn
274 /* One label can follow the end-note: the return label. */
275 && ((GET_CODE (insn) == CODE_LABEL && n_labels-- > 0)
276 /* Ordinary insns can follow it if returning a structure. */
277 || GET_CODE (insn) == INSN
278 /* If machine uses explicit RETURN insns, no epilogue,
279 then one of them follows the note. */
280 || (GET_CODE (insn) == JUMP_INSN
281 && GET_CODE (PATTERN (insn)) == RETURN)
282 /* A barrier can follow the return insn. */
283 || GET_CODE (insn) == BARRIER
284 /* Other kinds of notes can follow also. */
285 || (GET_CODE (insn) == NOTE
286 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)))
287 insn = PREV_INSN (insn);
288 }
289
290 /* Report if control can fall through at the end of the function. */
291 if (insn && GET_CODE (insn) == NOTE
292 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_END
293 && ! INSN_DELETED_P (insn))
294 can_reach_end = 1;
295
296 /* Zero the "deleted" flag of all the "deleted" insns. */
297 for (insn = f; insn; insn = NEXT_INSN (insn))
298 INSN_DELETED_P (insn) = 0;
299 return;
300 }
301
302 #ifdef HAVE_return
303 if (HAVE_return)
304 {
305 /* If we fall through to the epilogue, see if we can insert a RETURN insn
306 in front of it. If the machine allows it at this point (we might be
307 after reload for a leaf routine), it will improve optimization for it
308 to be there. */
309 insn = get_last_insn ();
310 while (insn && GET_CODE (insn) == NOTE)
311 insn = PREV_INSN (insn);
312
313 if (insn && GET_CODE (insn) != BARRIER)
314 {
315 emit_jump_insn (gen_return ());
316 emit_barrier ();
317 }
318 }
319 #endif
320
321 if (noop_moves)
322 for (insn = f; insn; )
323 {
324 next = NEXT_INSN (insn);
325
326 if (GET_CODE (insn) == INSN)
327 {
328 register rtx body = PATTERN (insn);
329
330 /* Combine stack_adjusts with following push_insns. */
331 #ifdef PUSH_ROUNDING
332 if (GET_CODE (body) == SET
333 && SET_DEST (body) == stack_pointer_rtx
334 && GET_CODE (SET_SRC (body)) == PLUS
335 && XEXP (SET_SRC (body), 0) == stack_pointer_rtx
336 && GET_CODE (XEXP (SET_SRC (body), 1)) == CONST_INT
337 && INTVAL (XEXP (SET_SRC (body), 1)) > 0)
338 {
339 rtx p;
340 rtx stack_adjust_insn = insn;
341 int stack_adjust_amount = INTVAL (XEXP (SET_SRC (body), 1));
342 int total_pushed = 0;
343 int pushes = 0;
344
345 /* Find all successive push insns. */
346 p = insn;
347 /* Don't convert more than three pushes;
348 that starts adding too many displaced addresses
349 and the whole thing starts becoming a losing
350 proposition. */
351 while (pushes < 3)
352 {
353 rtx pbody, dest;
354 p = next_nonnote_insn (p);
355 if (p == 0 || GET_CODE (p) != INSN)
356 break;
357 pbody = PATTERN (p);
358 if (GET_CODE (pbody) != SET)
359 break;
360 dest = SET_DEST (pbody);
361 /* Allow a no-op move between the adjust and the push. */
362 if (GET_CODE (dest) == REG
363 && GET_CODE (SET_SRC (pbody)) == REG
364 && REGNO (dest) == REGNO (SET_SRC (pbody)))
365 continue;
366 if (! (GET_CODE (dest) == MEM
367 && GET_CODE (XEXP (dest, 0)) == POST_INC
368 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx))
369 break;
370 pushes++;
371 if (total_pushed + GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)))
372 > stack_adjust_amount)
373 break;
374 total_pushed += GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)));
375 }
376
377 /* Discard the amount pushed from the stack adjust;
378 maybe eliminate it entirely. */
379 if (total_pushed >= stack_adjust_amount)
380 {
381 delete_computation (stack_adjust_insn);
382 total_pushed = stack_adjust_amount;
383 }
384 else
385 XEXP (SET_SRC (PATTERN (stack_adjust_insn)), 1)
386 = GEN_INT (stack_adjust_amount - total_pushed);
387
388 /* Change the appropriate push insns to ordinary stores. */
389 p = insn;
390 while (total_pushed > 0)
391 {
392 rtx pbody, dest;
393 p = next_nonnote_insn (p);
394 if (GET_CODE (p) != INSN)
395 break;
396 pbody = PATTERN (p);
397 if (GET_CODE (pbody) == SET)
398 break;
399 dest = SET_DEST (pbody);
400 if (! (GET_CODE (dest) == MEM
401 && GET_CODE (XEXP (dest, 0)) == POST_INC
402 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx))
403 break;
404 total_pushed -= GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)));
405 /* If this push doesn't fully fit in the space
406 of the stack adjust that we deleted,
407 make another stack adjust here for what we
408 didn't use up. There should be peepholes
409 to recognize the resulting sequence of insns. */
410 if (total_pushed < 0)
411 {
412 emit_insn_before (gen_add2_insn (stack_pointer_rtx,
413 GEN_INT (- total_pushed)),
414 p);
415 break;
416 }
417 XEXP (dest, 0)
418 = plus_constant (stack_pointer_rtx, total_pushed);
419 }
420 }
421 #endif
422
423 /* Detect and delete no-op move instructions
424 resulting from not allocating a parameter in a register. */
425
426 if (GET_CODE (body) == SET
427 && (SET_DEST (body) == SET_SRC (body)
428 || (GET_CODE (SET_DEST (body)) == MEM
429 && GET_CODE (SET_SRC (body)) == MEM
430 && rtx_equal_p (SET_SRC (body), SET_DEST (body))))
431 && ! (GET_CODE (SET_DEST (body)) == MEM
432 && MEM_VOLATILE_P (SET_DEST (body)))
433 && ! (GET_CODE (SET_SRC (body)) == MEM
434 && MEM_VOLATILE_P (SET_SRC (body))))
435 delete_computation (insn);
436
437 /* Detect and ignore no-op move instructions
438 resulting from smart or fortuitous register allocation. */
439
440 else if (GET_CODE (body) == SET)
441 {
442 int sreg = true_regnum (SET_SRC (body));
443 int dreg = true_regnum (SET_DEST (body));
444
445 if (sreg == dreg && sreg >= 0)
446 delete_insn (insn);
447 else if (sreg >= 0 && dreg >= 0)
448 {
449 rtx trial;
450 rtx tem = find_equiv_reg (NULL_RTX, insn, 0,
451 sreg, NULL_PTR, dreg,
452 GET_MODE (SET_SRC (body)));
453
454 if (tem != 0
455 && GET_MODE (tem) == GET_MODE (SET_DEST (body)))
456 {
457 /* DREG may have been the target of a REG_DEAD note in
458 the insn which makes INSN redundant. If so, reorg
459 would still think it is dead. So search for such a
460 note and delete it if we find it. */
461 if (! find_regno_note (insn, REG_UNUSED, dreg))
462 for (trial = prev_nonnote_insn (insn);
463 trial && GET_CODE (trial) != CODE_LABEL;
464 trial = prev_nonnote_insn (trial))
465 if (find_regno_note (trial, REG_DEAD, dreg))
466 {
467 remove_death (dreg, trial);
468 break;
469 }
470 #ifdef PRESERVE_DEATH_INFO_REGNO_P
471 /* Deleting insn could lose a death-note for SREG
472 so don't do it if final needs accurate
473 death-notes. */
474 if (PRESERVE_DEATH_INFO_REGNO_P (sreg)
475 && (trial = find_regno_note (insn, REG_DEAD, sreg)))
476 {
477 /* Change this into a USE so that we won't emit
478 code for it, but still can keep the note. */
479 PATTERN (insn)
480 = gen_rtx_USE (VOIDmode, XEXP (trial, 0));
481 INSN_CODE (insn) = -1;
482 /* Remove all reg notes but the REG_DEAD one. */
483 REG_NOTES (insn) = trial;
484 XEXP (trial, 1) = NULL_RTX;
485 }
486 else
487 #endif
488 delete_insn (insn);
489 }
490 }
491 else if (dreg >= 0 && CONSTANT_P (SET_SRC (body))
492 && find_equiv_reg (SET_SRC (body), insn, 0, dreg,
493 NULL_PTR, 0,
494 GET_MODE (SET_DEST (body))))
495 {
496 /* This handles the case where we have two consecutive
497 assignments of the same constant to pseudos that didn't
498 get a hard reg. Each SET from the constant will be
499 converted into a SET of the spill register and an
500 output reload will be made following it. This produces
501 two loads of the same constant into the same spill
502 register. */
503
504 rtx in_insn = insn;
505
506 /* Look back for a death note for the first reg.
507 If there is one, it is no longer accurate. */
508 while (in_insn && GET_CODE (in_insn) != CODE_LABEL)
509 {
510 if ((GET_CODE (in_insn) == INSN
511 || GET_CODE (in_insn) == JUMP_INSN)
512 && find_regno_note (in_insn, REG_DEAD, dreg))
513 {
514 remove_death (dreg, in_insn);
515 break;
516 }
517 in_insn = PREV_INSN (in_insn);
518 }
519
520 /* Delete the second load of the value. */
521 delete_insn (insn);
522 }
523 }
524 else if (GET_CODE (body) == PARALLEL)
525 {
526 /* If each part is a set between two identical registers or
527 a USE or CLOBBER, delete the insn. */
528 int i, sreg, dreg;
529 rtx tem;
530
531 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
532 {
533 tem = XVECEXP (body, 0, i);
534 if (GET_CODE (tem) == USE || GET_CODE (tem) == CLOBBER)
535 continue;
536
537 if (GET_CODE (tem) != SET
538 || (sreg = true_regnum (SET_SRC (tem))) < 0
539 || (dreg = true_regnum (SET_DEST (tem))) < 0
540 || dreg != sreg)
541 break;
542 }
543
544 if (i < 0)
545 delete_insn (insn);
546 }
547 /* Also delete insns to store bit fields if they are no-ops. */
548 /* Not worth the hair to detect this in the big-endian case. */
549 else if (! BYTES_BIG_ENDIAN
550 && GET_CODE (body) == SET
551 && GET_CODE (SET_DEST (body)) == ZERO_EXTRACT
552 && XEXP (SET_DEST (body), 2) == const0_rtx
553 && XEXP (SET_DEST (body), 0) == SET_SRC (body)
554 && ! (GET_CODE (SET_SRC (body)) == MEM
555 && MEM_VOLATILE_P (SET_SRC (body))))
556 delete_insn (insn);
557 }
558 insn = next;
559 }
560
561 /* If we haven't yet gotten to reload and we have just run regscan,
562 delete any insn that sets a register that isn't used elsewhere.
563 This helps some of the optimizations below by having less insns
564 being jumped around. */
565
566 if (! reload_completed && after_regscan)
567 for (insn = f; insn; insn = next)
568 {
569 rtx set = single_set (insn);
570
571 next = NEXT_INSN (insn);
572
573 if (set && GET_CODE (SET_DEST (set)) == REG
574 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
575 && REGNO_FIRST_UID (REGNO (SET_DEST (set))) == INSN_UID (insn)
576 /* We use regno_last_note_uid so as not to delete the setting
577 of a reg that's used in notes. A subsequent optimization
578 might arrange to use that reg for real. */
579 && REGNO_LAST_NOTE_UID (REGNO (SET_DEST (set))) == INSN_UID (insn)
580 && ! side_effects_p (SET_SRC (set))
581 && ! find_reg_note (insn, REG_RETVAL, 0))
582 delete_insn (insn);
583 }
584
585 /* Now iterate optimizing jumps until nothing changes over one pass. */
586 changed = 1;
587 while (changed)
588 {
589 changed = 0;
590
591 for (insn = f; insn; insn = next)
592 {
593 rtx reallabelprev;
594 rtx temp, temp1, temp2, temp3, temp4, temp5, temp6;
595 rtx nlabel;
596 int this_is_simplejump, this_is_condjump, reversep;
597 int this_is_condjump_in_parallel;
598 #if 0
599 /* If NOT the first iteration, if this is the last jump pass
600 (just before final), do the special peephole optimizations.
601 Avoiding the first iteration gives ordinary jump opts
602 a chance to work before peephole opts. */
603
604 if (reload_completed && !first && !flag_no_peephole)
605 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
606 peephole (insn);
607 #endif
608
609 /* That could have deleted some insns after INSN, so check now
610 what the following insn is. */
611
612 next = NEXT_INSN (insn);
613
614 /* See if this is a NOTE_INSN_LOOP_BEG followed by an unconditional
615 jump. Try to optimize by duplicating the loop exit test if so.
616 This is only safe immediately after regscan, because it uses
617 the values of regno_first_uid and regno_last_uid. */
618 if (after_regscan && GET_CODE (insn) == NOTE
619 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
620 && (temp1 = next_nonnote_insn (insn)) != 0
621 && simplejump_p (temp1))
622 {
623 temp = PREV_INSN (insn);
624 if (duplicate_loop_exit_test (insn))
625 {
626 changed = 1;
627 next = NEXT_INSN (temp);
628 continue;
629 }
630 }
631
632 if (GET_CODE (insn) != JUMP_INSN)
633 continue;
634
635 this_is_simplejump = simplejump_p (insn);
636 this_is_condjump = condjump_p (insn);
637 this_is_condjump_in_parallel = condjump_in_parallel_p (insn);
638
639 /* Tension the labels in dispatch tables. */
640
641 if (GET_CODE (PATTERN (insn)) == ADDR_VEC)
642 changed |= tension_vector_labels (PATTERN (insn), 0);
643 if (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
644 changed |= tension_vector_labels (PATTERN (insn), 1);
645
646 /* If a dispatch table always goes to the same place,
647 get rid of it and replace the insn that uses it. */
648
649 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
650 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
651 {
652 int i;
653 rtx pat = PATTERN (insn);
654 int diff_vec_p = GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC;
655 int len = XVECLEN (pat, diff_vec_p);
656 rtx dispatch = prev_real_insn (insn);
657
658 for (i = 0; i < len; i++)
659 if (XEXP (XVECEXP (pat, diff_vec_p, i), 0)
660 != XEXP (XVECEXP (pat, diff_vec_p, 0), 0))
661 break;
662 if (i == len
663 && dispatch != 0
664 && GET_CODE (dispatch) == JUMP_INSN
665 && JUMP_LABEL (dispatch) != 0
666 /* Don't mess with a casesi insn. */
667 && !(GET_CODE (PATTERN (dispatch)) == SET
668 && (GET_CODE (SET_SRC (PATTERN (dispatch)))
669 == IF_THEN_ELSE))
670 && next_real_insn (JUMP_LABEL (dispatch)) == insn)
671 {
672 redirect_tablejump (dispatch,
673 XEXP (XVECEXP (pat, diff_vec_p, 0), 0));
674 changed = 1;
675 }
676 }
677
678 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
679
680 /* If a jump references the end of the function, try to turn
681 it into a RETURN insn, possibly a conditional one. */
682 if (JUMP_LABEL (insn)
683 && (next_active_insn (JUMP_LABEL (insn)) == 0
684 || GET_CODE (PATTERN (next_active_insn (JUMP_LABEL (insn))))
685 == RETURN))
686 changed |= redirect_jump (insn, NULL_RTX);
687
688 /* Detect jump to following insn. */
689 if (reallabelprev == insn && condjump_p (insn))
690 {
691 next = next_real_insn (JUMP_LABEL (insn));
692 delete_jump (insn);
693 changed = 1;
694 continue;
695 }
696
697 /* If we have an unconditional jump preceded by a USE, try to put
698 the USE before the target and jump there. This simplifies many
699 of the optimizations below since we don't have to worry about
700 dealing with these USE insns. We only do this if the label
701 being branch to already has the identical USE or if code
702 never falls through to that label. */
703
704 if (this_is_simplejump
705 && (temp = prev_nonnote_insn (insn)) != 0
706 && GET_CODE (temp) == INSN && GET_CODE (PATTERN (temp)) == USE
707 && (temp1 = prev_nonnote_insn (JUMP_LABEL (insn))) != 0
708 && (GET_CODE (temp1) == BARRIER
709 || (GET_CODE (temp1) == INSN
710 && rtx_equal_p (PATTERN (temp), PATTERN (temp1))))
711 /* Don't do this optimization if we have a loop containing only
712 the USE instruction, and the loop start label has a usage
713 count of 1. This is because we will redo this optimization
714 everytime through the outer loop, and jump opt will never
715 exit. */
716 && ! ((temp2 = prev_nonnote_insn (temp)) != 0
717 && temp2 == JUMP_LABEL (insn)
718 && LABEL_NUSES (temp2) == 1))
719 {
720 if (GET_CODE (temp1) == BARRIER)
721 {
722 emit_insn_after (PATTERN (temp), temp1);
723 temp1 = NEXT_INSN (temp1);
724 }
725
726 delete_insn (temp);
727 redirect_jump (insn, get_label_before (temp1));
728 reallabelprev = prev_real_insn (temp1);
729 changed = 1;
730 }
731
732 /* Simplify if (...) x = a; else x = b; by converting it
733 to x = b; if (...) x = a;
734 if B is sufficiently simple, the test doesn't involve X,
735 and nothing in the test modifies B or X.
736
737 If we have small register classes, we also can't do this if X
738 is a hard register.
739
740 If the "x = b;" insn has any REG_NOTES, we don't do this because
741 of the possibility that we are running after CSE and there is a
742 REG_EQUAL note that is only valid if the branch has already been
743 taken. If we move the insn with the REG_EQUAL note, we may
744 fold the comparison to always be false in a later CSE pass.
745 (We could also delete the REG_NOTES when moving the insn, but it
746 seems simpler to not move it.) An exception is that we can move
747 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
748 value is the same as "b".
749
750 INSN is the branch over the `else' part.
751
752 We set:
753
754 TEMP to the jump insn preceding "x = a;"
755 TEMP1 to X
756 TEMP2 to the insn that sets "x = b;"
757 TEMP3 to the insn that sets "x = a;"
758 TEMP4 to the set of "x = b"; */
759
760 if (this_is_simplejump
761 && (temp3 = prev_active_insn (insn)) != 0
762 && GET_CODE (temp3) == INSN
763 && (temp4 = single_set (temp3)) != 0
764 && GET_CODE (temp1 = SET_DEST (temp4)) == REG
765 && (! SMALL_REGISTER_CLASSES
766 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
767 && (temp2 = next_active_insn (insn)) != 0
768 && GET_CODE (temp2) == INSN
769 && (temp4 = single_set (temp2)) != 0
770 && rtx_equal_p (SET_DEST (temp4), temp1)
771 && (GET_CODE (SET_SRC (temp4)) == REG
772 || GET_CODE (SET_SRC (temp4)) == SUBREG
773 || (GET_CODE (SET_SRC (temp4)) == MEM
774 && RTX_UNCHANGING_P (SET_SRC (temp4)))
775 || CONSTANT_P (SET_SRC (temp4)))
776 && (REG_NOTES (temp2) == 0
777 || ((REG_NOTE_KIND (REG_NOTES (temp2)) == REG_EQUAL
778 || REG_NOTE_KIND (REG_NOTES (temp2)) == REG_EQUIV)
779 && XEXP (REG_NOTES (temp2), 1) == 0
780 && rtx_equal_p (XEXP (REG_NOTES (temp2), 0),
781 SET_SRC (temp4))))
782 && (temp = prev_active_insn (temp3)) != 0
783 && condjump_p (temp) && ! simplejump_p (temp)
784 /* TEMP must skip over the "x = a;" insn */
785 && prev_real_insn (JUMP_LABEL (temp)) == insn
786 && no_labels_between_p (insn, JUMP_LABEL (temp))
787 /* There must be no other entries to the "x = b;" insn. */
788 && no_labels_between_p (JUMP_LABEL (temp), temp2)
789 /* INSN must either branch to the insn after TEMP2 or the insn
790 after TEMP2 must branch to the same place as INSN. */
791 && (reallabelprev == temp2
792 || ((temp5 = next_active_insn (temp2)) != 0
793 && simplejump_p (temp5)
794 && JUMP_LABEL (temp5) == JUMP_LABEL (insn))))
795 {
796 /* The test expression, X, may be a complicated test with
797 multiple branches. See if we can find all the uses of
798 the label that TEMP branches to without hitting a CALL_INSN
799 or a jump to somewhere else. */
800 rtx target = JUMP_LABEL (temp);
801 int nuses = LABEL_NUSES (target);
802 rtx p;
803 #ifdef HAVE_cc0
804 rtx q;
805 #endif
806
807 /* Set P to the first jump insn that goes around "x = a;". */
808 for (p = temp; nuses && p; p = prev_nonnote_insn (p))
809 {
810 if (GET_CODE (p) == JUMP_INSN)
811 {
812 if (condjump_p (p) && ! simplejump_p (p)
813 && JUMP_LABEL (p) == target)
814 {
815 nuses--;
816 if (nuses == 0)
817 break;
818 }
819 else
820 break;
821 }
822 else if (GET_CODE (p) == CALL_INSN)
823 break;
824 }
825
826 #ifdef HAVE_cc0
827 /* We cannot insert anything between a set of cc and its use
828 so if P uses cc0, we must back up to the previous insn. */
829 q = prev_nonnote_insn (p);
830 if (q && GET_RTX_CLASS (GET_CODE (q)) == 'i'
831 && sets_cc0_p (PATTERN (q)))
832 p = q;
833 #endif
834
835 if (p)
836 p = PREV_INSN (p);
837
838 /* If we found all the uses and there was no data conflict, we
839 can move the assignment unless we can branch into the middle
840 from somewhere. */
841 if (nuses == 0 && p
842 && no_labels_between_p (p, insn)
843 && ! reg_referenced_between_p (temp1, p, NEXT_INSN (temp3))
844 && ! reg_set_between_p (temp1, p, temp3)
845 && (GET_CODE (SET_SRC (temp4)) == CONST_INT
846 || ! reg_set_between_p (SET_SRC (temp4), p, temp2)))
847 {
848 emit_insn_after_with_line_notes (PATTERN (temp2), p, temp2);
849 delete_insn (temp2);
850
851 /* Set NEXT to an insn that we know won't go away. */
852 next = next_active_insn (insn);
853
854 /* Delete the jump around the set. Note that we must do
855 this before we redirect the test jumps so that it won't
856 delete the code immediately following the assignment
857 we moved (which might be a jump). */
858
859 delete_insn (insn);
860
861 /* We either have two consecutive labels or a jump to
862 a jump, so adjust all the JUMP_INSNs to branch to where
863 INSN branches to. */
864 for (p = NEXT_INSN (p); p != next; p = NEXT_INSN (p))
865 if (GET_CODE (p) == JUMP_INSN)
866 redirect_jump (p, target);
867
868 changed = 1;
869 continue;
870 }
871 }
872
873 /* Simplify if (...) { x = a; goto l; } x = b; by converting it
874 to x = a; if (...) goto l; x = b;
875 if A is sufficiently simple, the test doesn't involve X,
876 and nothing in the test modifies A or X.
877
878 If we have small register classes, we also can't do this if X
879 is a hard register.
880
881 If the "x = a;" insn has any REG_NOTES, we don't do this because
882 of the possibility that we are running after CSE and there is a
883 REG_EQUAL note that is only valid if the branch has already been
884 taken. If we move the insn with the REG_EQUAL note, we may
885 fold the comparison to always be false in a later CSE pass.
886 (We could also delete the REG_NOTES when moving the insn, but it
887 seems simpler to not move it.) An exception is that we can move
888 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
889 value is the same as "a".
890
891 INSN is the goto.
892
893 We set:
894
895 TEMP to the jump insn preceding "x = a;"
896 TEMP1 to X
897 TEMP2 to the insn that sets "x = b;"
898 TEMP3 to the insn that sets "x = a;"
899 TEMP4 to the set of "x = a"; */
900
901 if (this_is_simplejump
902 && (temp2 = next_active_insn (insn)) != 0
903 && GET_CODE (temp2) == INSN
904 && (temp4 = single_set (temp2)) != 0
905 && GET_CODE (temp1 = SET_DEST (temp4)) == REG
906 && (! SMALL_REGISTER_CLASSES
907 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
908 && (temp3 = prev_active_insn (insn)) != 0
909 && GET_CODE (temp3) == INSN
910 && (temp4 = single_set (temp3)) != 0
911 && rtx_equal_p (SET_DEST (temp4), temp1)
912 && (GET_CODE (SET_SRC (temp4)) == REG
913 || GET_CODE (SET_SRC (temp4)) == SUBREG
914 || (GET_CODE (SET_SRC (temp4)) == MEM
915 && RTX_UNCHANGING_P (SET_SRC (temp4)))
916 || CONSTANT_P (SET_SRC (temp4)))
917 && (REG_NOTES (temp3) == 0
918 || ((REG_NOTE_KIND (REG_NOTES (temp3)) == REG_EQUAL
919 || REG_NOTE_KIND (REG_NOTES (temp3)) == REG_EQUIV)
920 && XEXP (REG_NOTES (temp3), 1) == 0
921 && rtx_equal_p (XEXP (REG_NOTES (temp3), 0),
922 SET_SRC (temp4))))
923 && (temp = prev_active_insn (temp3)) != 0
924 && condjump_p (temp) && ! simplejump_p (temp)
925 /* TEMP must skip over the "x = a;" insn */
926 && prev_real_insn (JUMP_LABEL (temp)) == insn
927 && no_labels_between_p (temp, insn))
928 {
929 rtx prev_label = JUMP_LABEL (temp);
930 rtx insert_after = prev_nonnote_insn (temp);
931
932 #ifdef HAVE_cc0
933 /* We cannot insert anything between a set of cc and its use. */
934 if (insert_after && GET_RTX_CLASS (GET_CODE (insert_after)) == 'i'
935 && sets_cc0_p (PATTERN (insert_after)))
936 insert_after = prev_nonnote_insn (insert_after);
937 #endif
938 ++LABEL_NUSES (prev_label);
939
940 if (insert_after
941 && no_labels_between_p (insert_after, temp)
942 && ! reg_referenced_between_p (temp1, insert_after, temp3)
943 && ! reg_referenced_between_p (temp1, temp3,
944 NEXT_INSN (temp2))
945 && ! reg_set_between_p (temp1, insert_after, temp)
946 && (GET_CODE (SET_SRC (temp4)) == CONST_INT
947 || ! reg_set_between_p (SET_SRC (temp4),
948 insert_after, temp))
949 && invert_jump (temp, JUMP_LABEL (insn)))
950 {
951 emit_insn_after_with_line_notes (PATTERN (temp3),
952 insert_after, temp3);
953 delete_insn (temp3);
954 delete_insn (insn);
955 /* Set NEXT to an insn that we know won't go away. */
956 next = temp2;
957 changed = 1;
958 }
959 if (prev_label && --LABEL_NUSES (prev_label) == 0)
960 delete_insn (prev_label);
961 if (changed)
962 continue;
963 }
964
965 #ifndef HAVE_cc0
966 /* If we have if (...) x = exp; and branches are expensive,
967 EXP is a single insn, does not have any side effects, cannot
968 trap, and is not too costly, convert this to
969 t = exp; if (...) x = t;
970
971 Don't do this when we have CC0 because it is unlikely to help
972 and we'd need to worry about where to place the new insn and
973 the potential for conflicts. We also can't do this when we have
974 notes on the insn for the same reason as above.
975
976 We set:
977
978 TEMP to the "x = exp;" insn.
979 TEMP1 to the single set in the "x = exp; insn.
980 TEMP2 to "x". */
981
982 if (! reload_completed
983 && this_is_condjump && ! this_is_simplejump
984 && BRANCH_COST >= 3
985 && (temp = next_nonnote_insn (insn)) != 0
986 && GET_CODE (temp) == INSN
987 && REG_NOTES (temp) == 0
988 && (reallabelprev == temp
989 || ((temp2 = next_active_insn (temp)) != 0
990 && simplejump_p (temp2)
991 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
992 && (temp1 = single_set (temp)) != 0
993 && (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
994 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
995 && (! SMALL_REGISTER_CLASSES
996 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
997 && GET_CODE (SET_SRC (temp1)) != REG
998 && GET_CODE (SET_SRC (temp1)) != SUBREG
999 && GET_CODE (SET_SRC (temp1)) != CONST_INT
1000 && ! side_effects_p (SET_SRC (temp1))
1001 && ! may_trap_p (SET_SRC (temp1))
1002 && rtx_cost (SET_SRC (temp1), SET) < 10)
1003 {
1004 rtx new = gen_reg_rtx (GET_MODE (temp2));
1005
1006 if ((temp3 = find_insert_position (insn, temp))
1007 && validate_change (temp, &SET_DEST (temp1), new, 0))
1008 {
1009 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1010 emit_insn_after_with_line_notes (PATTERN (temp),
1011 PREV_INSN (temp3), temp);
1012 delete_insn (temp);
1013 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
1014 }
1015 }
1016
1017 /* Similarly, if it takes two insns to compute EXP but they
1018 have the same destination. Here TEMP3 will be the second
1019 insn and TEMP4 the SET from that insn. */
1020
1021 if (! reload_completed
1022 && this_is_condjump && ! this_is_simplejump
1023 && BRANCH_COST >= 4
1024 && (temp = next_nonnote_insn (insn)) != 0
1025 && GET_CODE (temp) == INSN
1026 && REG_NOTES (temp) == 0
1027 && (temp3 = next_nonnote_insn (temp)) != 0
1028 && GET_CODE (temp3) == INSN
1029 && REG_NOTES (temp3) == 0
1030 && (reallabelprev == temp3
1031 || ((temp2 = next_active_insn (temp3)) != 0
1032 && simplejump_p (temp2)
1033 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
1034 && (temp1 = single_set (temp)) != 0
1035 && (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
1036 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
1037 && (! SMALL_REGISTER_CLASSES
1038 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
1039 && ! side_effects_p (SET_SRC (temp1))
1040 && ! may_trap_p (SET_SRC (temp1))
1041 && rtx_cost (SET_SRC (temp1), SET) < 10
1042 && (temp4 = single_set (temp3)) != 0
1043 && rtx_equal_p (SET_DEST (temp4), temp2)
1044 && ! side_effects_p (SET_SRC (temp4))
1045 && ! may_trap_p (SET_SRC (temp4))
1046 && rtx_cost (SET_SRC (temp4), SET) < 10)
1047 {
1048 rtx new = gen_reg_rtx (GET_MODE (temp2));
1049
1050 if ((temp5 = find_insert_position (insn, temp))
1051 && (temp6 = find_insert_position (insn, temp3))
1052 && validate_change (temp, &SET_DEST (temp1), new, 0))
1053 {
1054 /* Use the earliest of temp5 and temp6. */
1055 if (temp5 != insn)
1056 temp6 = temp5;
1057 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1058 emit_insn_after_with_line_notes (PATTERN (temp),
1059 PREV_INSN (temp6), temp);
1060 emit_insn_after_with_line_notes
1061 (replace_rtx (PATTERN (temp3), temp2, new),
1062 PREV_INSN (temp6), temp3);
1063 delete_insn (temp);
1064 delete_insn (temp3);
1065 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
1066 }
1067 }
1068
1069 /* Finally, handle the case where two insns are used to
1070 compute EXP but a temporary register is used. Here we must
1071 ensure that the temporary register is not used anywhere else. */
1072
1073 if (! reload_completed
1074 && after_regscan
1075 && this_is_condjump && ! this_is_simplejump
1076 && BRANCH_COST >= 4
1077 && (temp = next_nonnote_insn (insn)) != 0
1078 && GET_CODE (temp) == INSN
1079 && REG_NOTES (temp) == 0
1080 && (temp3 = next_nonnote_insn (temp)) != 0
1081 && GET_CODE (temp3) == INSN
1082 && REG_NOTES (temp3) == 0
1083 && (reallabelprev == temp3
1084 || ((temp2 = next_active_insn (temp3)) != 0
1085 && simplejump_p (temp2)
1086 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
1087 && (temp1 = single_set (temp)) != 0
1088 && (temp5 = SET_DEST (temp1),
1089 (GET_CODE (temp5) == REG
1090 || (GET_CODE (temp5) == SUBREG
1091 && (temp5 = SUBREG_REG (temp5),
1092 GET_CODE (temp5) == REG))))
1093 && REGNO (temp5) >= FIRST_PSEUDO_REGISTER
1094 && REGNO_FIRST_UID (REGNO (temp5)) == INSN_UID (temp)
1095 && REGNO_LAST_UID (REGNO (temp5)) == INSN_UID (temp3)
1096 && ! side_effects_p (SET_SRC (temp1))
1097 && ! may_trap_p (SET_SRC (temp1))
1098 && rtx_cost (SET_SRC (temp1), SET) < 10
1099 && (temp4 = single_set (temp3)) != 0
1100 && (temp2 = SET_DEST (temp4), GET_CODE (temp2) == REG)
1101 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
1102 && (! SMALL_REGISTER_CLASSES
1103 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
1104 && rtx_equal_p (SET_DEST (temp4), temp2)
1105 && ! side_effects_p (SET_SRC (temp4))
1106 && ! may_trap_p (SET_SRC (temp4))
1107 && rtx_cost (SET_SRC (temp4), SET) < 10)
1108 {
1109 rtx new = gen_reg_rtx (GET_MODE (temp2));
1110
1111 if ((temp5 = find_insert_position (insn, temp))
1112 && (temp6 = find_insert_position (insn, temp3))
1113 && validate_change (temp3, &SET_DEST (temp4), new, 0))
1114 {
1115 /* Use the earliest of temp5 and temp6. */
1116 if (temp5 != insn)
1117 temp6 = temp5;
1118 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1119 emit_insn_after_with_line_notes (PATTERN (temp),
1120 PREV_INSN (temp6), temp);
1121 emit_insn_after_with_line_notes (PATTERN (temp3),
1122 PREV_INSN (temp6), temp3);
1123 delete_insn (temp);
1124 delete_insn (temp3);
1125 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
1126 }
1127 }
1128 #endif /* HAVE_cc0 */
1129
1130 /* Try to use a conditional move (if the target has them), or a
1131 store-flag insn. The general case is:
1132
1133 1) x = a; if (...) x = b; and
1134 2) if (...) x = b;
1135
1136 If the jump would be faster, the machine should not have defined
1137 the movcc or scc insns!. These cases are often made by the
1138 previous optimization.
1139
1140 The second case is treated as x = x; if (...) x = b;.
1141
1142 INSN here is the jump around the store. We set:
1143
1144 TEMP to the "x = b;" insn.
1145 TEMP1 to X.
1146 TEMP2 to B.
1147 TEMP3 to A (X in the second case).
1148 TEMP4 to the condition being tested.
1149 TEMP5 to the earliest insn used to find the condition. */
1150
1151 if (/* We can't do this after reload has completed. */
1152 ! reload_completed
1153 && this_is_condjump && ! this_is_simplejump
1154 /* Set TEMP to the "x = b;" insn. */
1155 && (temp = next_nonnote_insn (insn)) != 0
1156 && GET_CODE (temp) == INSN
1157 && GET_CODE (PATTERN (temp)) == SET
1158 && GET_CODE (temp1 = SET_DEST (PATTERN (temp))) == REG
1159 && (! SMALL_REGISTER_CLASSES
1160 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
1161 && (GET_CODE (temp2 = SET_SRC (PATTERN (temp))) == REG
1162 || (GET_CODE (temp2) == MEM && RTX_UNCHANGING_P (temp2))
1163 || GET_CODE (temp2) == SUBREG
1164 /* ??? How about floating point constants? */
1165 || CONSTANT_P (temp2))
1166 /* Allow either form, but prefer the former if both apply.
1167 There is no point in using the old value of TEMP1 if
1168 it is a register, since cse will alias them. It can
1169 lose if the old value were a hard register since CSE
1170 won't replace hard registers. Avoid using TEMP3 if
1171 small register classes and it is a hard register. */
1172 && (((temp3 = reg_set_last (temp1, insn)) != 0
1173 && ! (SMALL_REGISTER_CLASSES && GET_CODE (temp3) == REG
1174 && REGNO (temp3) < FIRST_PSEUDO_REGISTER))
1175 /* Make the latter case look like x = x; if (...) x = b; */
1176 || (temp3 = temp1, 1))
1177 /* INSN must either branch to the insn after TEMP or the insn
1178 after TEMP must branch to the same place as INSN. */
1179 && (reallabelprev == temp
1180 || ((temp4 = next_active_insn (temp)) != 0
1181 && simplejump_p (temp4)
1182 && JUMP_LABEL (temp4) == JUMP_LABEL (insn)))
1183 && (temp4 = get_condition (insn, &temp5)) != 0
1184 /* We must be comparing objects whose modes imply the size.
1185 We could handle BLKmode if (1) emit_store_flag could
1186 and (2) we could find the size reliably. */
1187 && GET_MODE (XEXP (temp4, 0)) != BLKmode
1188 /* Even if branches are cheap, the store_flag optimization
1189 can win when the operation to be performed can be
1190 expressed directly. */
1191 #ifdef HAVE_cc0
1192 /* If the previous insn sets CC0 and something else, we can't
1193 do this since we are going to delete that insn. */
1194
1195 && ! ((temp6 = prev_nonnote_insn (insn)) != 0
1196 && GET_CODE (temp6) == INSN
1197 && (sets_cc0_p (PATTERN (temp6)) == -1
1198 || (sets_cc0_p (PATTERN (temp6)) == 1
1199 && FIND_REG_INC_NOTE (temp6, NULL_RTX))))
1200 #endif
1201 )
1202 {
1203 #ifdef HAVE_conditional_move
1204 /* First try a conditional move. */
1205 {
1206 enum rtx_code code = GET_CODE (temp4);
1207 rtx var = temp1;
1208 rtx cond0, cond1, aval, bval;
1209 rtx target;
1210
1211 /* Copy the compared variables into cond0 and cond1, so that
1212 any side effects performed in or after the old comparison,
1213 will not affect our compare which will come later. */
1214 /* ??? Is it possible to just use the comparison in the jump
1215 insn? After all, we're going to delete it. We'd have
1216 to modify emit_conditional_move to take a comparison rtx
1217 instead or write a new function. */
1218 cond0 = gen_reg_rtx (GET_MODE (XEXP (temp4, 0)));
1219 /* We want the target to be able to simplify comparisons with
1220 zero (and maybe other constants as well), so don't create
1221 pseudos for them. There's no need to either. */
1222 if (GET_CODE (XEXP (temp4, 1)) == CONST_INT
1223 || GET_CODE (XEXP (temp4, 1)) == CONST_DOUBLE)
1224 cond1 = XEXP (temp4, 1);
1225 else
1226 cond1 = gen_reg_rtx (GET_MODE (XEXP (temp4, 1)));
1227
1228 aval = temp3;
1229 bval = temp2;
1230
1231 start_sequence ();
1232 target = emit_conditional_move (var, code,
1233 cond0, cond1, VOIDmode,
1234 aval, bval, GET_MODE (var),
1235 (code == LTU || code == GEU
1236 || code == LEU || code == GTU));
1237
1238 if (target)
1239 {
1240 rtx seq1,seq2;
1241
1242 /* Save the conditional move sequence but don't emit it
1243 yet. On some machines, like the alpha, it is possible
1244 that temp5 == insn, so next generate the sequence that
1245 saves the compared values and then emit both
1246 sequences ensuring seq1 occurs before seq2. */
1247 seq2 = get_insns ();
1248 end_sequence ();
1249
1250 /* Now that we can't fail, generate the copy insns that
1251 preserve the compared values. */
1252 start_sequence ();
1253 emit_move_insn (cond0, XEXP (temp4, 0));
1254 if (cond1 != XEXP (temp4, 1))
1255 emit_move_insn (cond1, XEXP (temp4, 1));
1256 seq1 = get_insns ();
1257 end_sequence ();
1258
1259 emit_insns_before (seq1, temp5);
1260 /* Insert conditional move after insn, to be sure that
1261 the jump and a possible compare won't be separated */
1262 emit_insns_after (seq2, insn);
1263
1264 /* ??? We can also delete the insn that sets X to A.
1265 Flow will do it too though. */
1266 delete_insn (temp);
1267 next = NEXT_INSN (insn);
1268 delete_jump (insn);
1269 changed = 1;
1270 continue;
1271 }
1272 else
1273 end_sequence ();
1274 }
1275 #endif
1276
1277 /* That didn't work, try a store-flag insn.
1278
1279 We further divide the cases into:
1280
1281 1) x = a; if (...) x = b; and either A or B is zero,
1282 2) if (...) x = 0; and jumps are expensive,
1283 3) x = a; if (...) x = b; and A and B are constants where all
1284 the set bits in A are also set in B and jumps are expensive,
1285 4) x = a; if (...) x = b; and A and B non-zero, and jumps are
1286 more expensive, and
1287 5) if (...) x = b; if jumps are even more expensive. */
1288
1289 if (GET_MODE_CLASS (GET_MODE (temp1)) == MODE_INT
1290 && ((GET_CODE (temp3) == CONST_INT)
1291 /* Make the latter case look like
1292 x = x; if (...) x = 0; */
1293 || (temp3 = temp1,
1294 ((BRANCH_COST >= 2
1295 && temp2 == const0_rtx)
1296 || BRANCH_COST >= 3)))
1297 /* If B is zero, OK; if A is zero, can only do (1) if we
1298 can reverse the condition. See if (3) applies possibly
1299 by reversing the condition. Prefer reversing to (4) when
1300 branches are very expensive. */
1301 && (((BRANCH_COST >= 2
1302 || STORE_FLAG_VALUE == -1
1303 || (STORE_FLAG_VALUE == 1
1304 /* Check that the mask is a power of two,
1305 so that it can probably be generated
1306 with a shift. */
1307 && exact_log2 (INTVAL (temp3)) >= 0))
1308 && (reversep = 0, temp2 == const0_rtx))
1309 || ((BRANCH_COST >= 2
1310 || STORE_FLAG_VALUE == -1
1311 || (STORE_FLAG_VALUE == 1
1312 && exact_log2 (INTVAL (temp2)) >= 0))
1313 && temp3 == const0_rtx
1314 && (reversep = can_reverse_comparison_p (temp4, insn)))
1315 || (BRANCH_COST >= 2
1316 && GET_CODE (temp2) == CONST_INT
1317 && GET_CODE (temp3) == CONST_INT
1318 && ((INTVAL (temp2) & INTVAL (temp3)) == INTVAL (temp2)
1319 || ((INTVAL (temp2) & INTVAL (temp3)) == INTVAL (temp3)
1320 && (reversep = can_reverse_comparison_p (temp4,
1321 insn)))))
1322 || BRANCH_COST >= 3)
1323 )
1324 {
1325 enum rtx_code code = GET_CODE (temp4);
1326 rtx uval, cval, var = temp1;
1327 int normalizep;
1328 rtx target;
1329
1330 /* If necessary, reverse the condition. */
1331 if (reversep)
1332 code = reverse_condition (code), uval = temp2, cval = temp3;
1333 else
1334 uval = temp3, cval = temp2;
1335
1336 /* If CVAL is non-zero, normalize to -1. Otherwise, if UVAL
1337 is the constant 1, it is best to just compute the result
1338 directly. If UVAL is constant and STORE_FLAG_VALUE
1339 includes all of its bits, it is best to compute the flag
1340 value unnormalized and `and' it with UVAL. Otherwise,
1341 normalize to -1 and `and' with UVAL. */
1342 normalizep = (cval != const0_rtx ? -1
1343 : (uval == const1_rtx ? 1
1344 : (GET_CODE (uval) == CONST_INT
1345 && (INTVAL (uval) & ~STORE_FLAG_VALUE) == 0)
1346 ? 0 : -1));
1347
1348 /* We will be putting the store-flag insn immediately in
1349 front of the comparison that was originally being done,
1350 so we know all the variables in TEMP4 will be valid.
1351 However, this might be in front of the assignment of
1352 A to VAR. If it is, it would clobber the store-flag
1353 we will be emitting.
1354
1355 Therefore, emit into a temporary which will be copied to
1356 VAR immediately after TEMP. */
1357
1358 start_sequence ();
1359 target = emit_store_flag (gen_reg_rtx (GET_MODE (var)), code,
1360 XEXP (temp4, 0), XEXP (temp4, 1),
1361 VOIDmode,
1362 (code == LTU || code == LEU
1363 || code == GEU || code == GTU),
1364 normalizep);
1365 if (target)
1366 {
1367 rtx seq;
1368 rtx before = insn;
1369
1370 seq = get_insns ();
1371 end_sequence ();
1372
1373 /* Put the store-flag insns in front of the first insn
1374 used to compute the condition to ensure that we
1375 use the same values of them as the current
1376 comparison. However, the remainder of the insns we
1377 generate will be placed directly in front of the
1378 jump insn, in case any of the pseudos we use
1379 are modified earlier. */
1380
1381 emit_insns_before (seq, temp5);
1382
1383 start_sequence ();
1384
1385 /* Both CVAL and UVAL are non-zero. */
1386 if (cval != const0_rtx && uval != const0_rtx)
1387 {
1388 rtx tem1, tem2;
1389
1390 tem1 = expand_and (uval, target, NULL_RTX);
1391 if (GET_CODE (cval) == CONST_INT
1392 && GET_CODE (uval) == CONST_INT
1393 && (INTVAL (cval) & INTVAL (uval)) == INTVAL (cval))
1394 tem2 = cval;
1395 else
1396 {
1397 tem2 = expand_unop (GET_MODE (var), one_cmpl_optab,
1398 target, NULL_RTX, 0);
1399 tem2 = expand_and (cval, tem2,
1400 (GET_CODE (tem2) == REG
1401 ? tem2 : 0));
1402 }
1403
1404 /* If we usually make new pseudos, do so here. This
1405 turns out to help machines that have conditional
1406 move insns. */
1407 /* ??? Conditional moves have already been handled.
1408 This may be obsolete. */
1409
1410 if (flag_expensive_optimizations)
1411 target = 0;
1412
1413 target = expand_binop (GET_MODE (var), ior_optab,
1414 tem1, tem2, target,
1415 1, OPTAB_WIDEN);
1416 }
1417 else if (normalizep != 1)
1418 {
1419 /* We know that either CVAL or UVAL is zero. If
1420 UVAL is zero, negate TARGET and `and' with CVAL.
1421 Otherwise, `and' with UVAL. */
1422 if (uval == const0_rtx)
1423 {
1424 target = expand_unop (GET_MODE (var), one_cmpl_optab,
1425 target, NULL_RTX, 0);
1426 uval = cval;
1427 }
1428
1429 target = expand_and (uval, target,
1430 (GET_CODE (target) == REG
1431 && ! preserve_subexpressions_p ()
1432 ? target : NULL_RTX));
1433 }
1434
1435 emit_move_insn (var, target);
1436 seq = get_insns ();
1437 end_sequence ();
1438 #ifdef HAVE_cc0
1439 /* If INSN uses CC0, we must not separate it from the
1440 insn that sets cc0. */
1441 if (reg_mentioned_p (cc0_rtx, PATTERN (before)))
1442 before = prev_nonnote_insn (before);
1443 #endif
1444 emit_insns_before (seq, before);
1445
1446 delete_insn (temp);
1447 next = NEXT_INSN (insn);
1448 delete_jump (insn);
1449 changed = 1;
1450 continue;
1451 }
1452 else
1453 end_sequence ();
1454 }
1455 }
1456
1457 /* If branches are expensive, convert
1458 if (foo) bar++; to bar += (foo != 0);
1459 and similarly for "bar--;"
1460
1461 INSN is the conditional branch around the arithmetic. We set:
1462
1463 TEMP is the arithmetic insn.
1464 TEMP1 is the SET doing the arithmetic.
1465 TEMP2 is the operand being incremented or decremented.
1466 TEMP3 to the condition being tested.
1467 TEMP4 to the earliest insn used to find the condition. */
1468
1469 if ((BRANCH_COST >= 2
1470 #ifdef HAVE_incscc
1471 || HAVE_incscc
1472 #endif
1473 #ifdef HAVE_decscc
1474 || HAVE_decscc
1475 #endif
1476 )
1477 && ! reload_completed
1478 && this_is_condjump && ! this_is_simplejump
1479 && (temp = next_nonnote_insn (insn)) != 0
1480 && (temp1 = single_set (temp)) != 0
1481 && (temp2 = SET_DEST (temp1),
1482 GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT)
1483 && GET_CODE (SET_SRC (temp1)) == PLUS
1484 && (XEXP (SET_SRC (temp1), 1) == const1_rtx
1485 || XEXP (SET_SRC (temp1), 1) == constm1_rtx)
1486 && rtx_equal_p (temp2, XEXP (SET_SRC (temp1), 0))
1487 && ! side_effects_p (temp2)
1488 && ! may_trap_p (temp2)
1489 /* INSN must either branch to the insn after TEMP or the insn
1490 after TEMP must branch to the same place as INSN. */
1491 && (reallabelprev == temp
1492 || ((temp3 = next_active_insn (temp)) != 0
1493 && simplejump_p (temp3)
1494 && JUMP_LABEL (temp3) == JUMP_LABEL (insn)))
1495 && (temp3 = get_condition (insn, &temp4)) != 0
1496 /* We must be comparing objects whose modes imply the size.
1497 We could handle BLKmode if (1) emit_store_flag could
1498 and (2) we could find the size reliably. */
1499 && GET_MODE (XEXP (temp3, 0)) != BLKmode
1500 && can_reverse_comparison_p (temp3, insn))
1501 {
1502 rtx temp6, target = 0, seq, init_insn = 0, init = temp2;
1503 enum rtx_code code = reverse_condition (GET_CODE (temp3));
1504
1505 start_sequence ();
1506
1507 /* It must be the case that TEMP2 is not modified in the range
1508 [TEMP4, INSN). The one exception we make is if the insn
1509 before INSN sets TEMP2 to something which is also unchanged
1510 in that range. In that case, we can move the initialization
1511 into our sequence. */
1512
1513 if ((temp5 = prev_active_insn (insn)) != 0
1514 && no_labels_between_p (temp5, insn)
1515 && GET_CODE (temp5) == INSN
1516 && (temp6 = single_set (temp5)) != 0
1517 && rtx_equal_p (temp2, SET_DEST (temp6))
1518 && (CONSTANT_P (SET_SRC (temp6))
1519 || GET_CODE (SET_SRC (temp6)) == REG
1520 || GET_CODE (SET_SRC (temp6)) == SUBREG))
1521 {
1522 emit_insn (PATTERN (temp5));
1523 init_insn = temp5;
1524 init = SET_SRC (temp6);
1525 }
1526
1527 if (CONSTANT_P (init)
1528 || ! reg_set_between_p (init, PREV_INSN (temp4), insn))
1529 target = emit_store_flag (gen_reg_rtx (GET_MODE (temp2)), code,
1530 XEXP (temp3, 0), XEXP (temp3, 1),
1531 VOIDmode,
1532 (code == LTU || code == LEU
1533 || code == GTU || code == GEU), 1);
1534
1535 /* If we can do the store-flag, do the addition or
1536 subtraction. */
1537
1538 if (target)
1539 target = expand_binop (GET_MODE (temp2),
1540 (XEXP (SET_SRC (temp1), 1) == const1_rtx
1541 ? add_optab : sub_optab),
1542 temp2, target, temp2, 0, OPTAB_WIDEN);
1543
1544 if (target != 0)
1545 {
1546 /* Put the result back in temp2 in case it isn't already.
1547 Then replace the jump, possible a CC0-setting insn in
1548 front of the jump, and TEMP, with the sequence we have
1549 made. */
1550
1551 if (target != temp2)
1552 emit_move_insn (temp2, target);
1553
1554 seq = get_insns ();
1555 end_sequence ();
1556
1557 emit_insns_before (seq, temp4);
1558 delete_insn (temp);
1559
1560 if (init_insn)
1561 delete_insn (init_insn);
1562
1563 next = NEXT_INSN (insn);
1564 #ifdef HAVE_cc0
1565 delete_insn (prev_nonnote_insn (insn));
1566 #endif
1567 delete_insn (insn);
1568 changed = 1;
1569 continue;
1570 }
1571 else
1572 end_sequence ();
1573 }
1574
1575 /* Simplify if (...) x = 1; else {...} if (x) ...
1576 We recognize this case scanning backwards as well.
1577
1578 TEMP is the assignment to x;
1579 TEMP1 is the label at the head of the second if. */
1580 /* ?? This should call get_condition to find the values being
1581 compared, instead of looking for a COMPARE insn when HAVE_cc0
1582 is not defined. This would allow it to work on the m88k. */
1583 /* ?? This optimization is only safe before cse is run if HAVE_cc0
1584 is not defined and the condition is tested by a separate compare
1585 insn. This is because the code below assumes that the result
1586 of the compare dies in the following branch.
1587
1588 Not only that, but there might be other insns between the
1589 compare and branch whose results are live. Those insns need
1590 to be executed.
1591
1592 A way to fix this is to move the insns at JUMP_LABEL (insn)
1593 to before INSN. If we are running before flow, they will
1594 be deleted if they aren't needed. But this doesn't work
1595 well after flow.
1596
1597 This is really a special-case of jump threading, anyway. The
1598 right thing to do is to replace this and jump threading with
1599 much simpler code in cse.
1600
1601 This code has been turned off in the non-cc0 case in the
1602 meantime. */
1603
1604 #ifdef HAVE_cc0
1605 else if (this_is_simplejump
1606 /* Safe to skip USE and CLOBBER insns here
1607 since they will not be deleted. */
1608 && (temp = prev_active_insn (insn))
1609 && no_labels_between_p (temp, insn)
1610 && GET_CODE (temp) == INSN
1611 && GET_CODE (PATTERN (temp)) == SET
1612 && GET_CODE (SET_DEST (PATTERN (temp))) == REG
1613 && CONSTANT_P (SET_SRC (PATTERN (temp)))
1614 && (temp1 = next_active_insn (JUMP_LABEL (insn)))
1615 /* If we find that the next value tested is `x'
1616 (TEMP1 is the insn where this happens), win. */
1617 && GET_CODE (temp1) == INSN
1618 && GET_CODE (PATTERN (temp1)) == SET
1619 #ifdef HAVE_cc0
1620 /* Does temp1 `tst' the value of x? */
1621 && SET_SRC (PATTERN (temp1)) == SET_DEST (PATTERN (temp))
1622 && SET_DEST (PATTERN (temp1)) == cc0_rtx
1623 && (temp1 = next_nonnote_insn (temp1))
1624 #else
1625 /* Does temp1 compare the value of x against zero? */
1626 && GET_CODE (SET_SRC (PATTERN (temp1))) == COMPARE
1627 && XEXP (SET_SRC (PATTERN (temp1)), 1) == const0_rtx
1628 && (XEXP (SET_SRC (PATTERN (temp1)), 0)
1629 == SET_DEST (PATTERN (temp)))
1630 && GET_CODE (SET_DEST (PATTERN (temp1))) == REG
1631 && (temp1 = find_next_ref (SET_DEST (PATTERN (temp1)), temp1))
1632 #endif
1633 && condjump_p (temp1))
1634 {
1635 /* Get the if_then_else from the condjump. */
1636 rtx choice = SET_SRC (PATTERN (temp1));
1637 if (GET_CODE (choice) == IF_THEN_ELSE)
1638 {
1639 enum rtx_code code = GET_CODE (XEXP (choice, 0));
1640 rtx val = SET_SRC (PATTERN (temp));
1641 rtx cond
1642 = simplify_relational_operation (code, GET_MODE (SET_DEST (PATTERN (temp))),
1643 val, const0_rtx);
1644 rtx ultimate;
1645
1646 if (cond == const_true_rtx)
1647 ultimate = XEXP (choice, 1);
1648 else if (cond == const0_rtx)
1649 ultimate = XEXP (choice, 2);
1650 else
1651 ultimate = 0;
1652
1653 if (ultimate == pc_rtx)
1654 ultimate = get_label_after (temp1);
1655 else if (ultimate && GET_CODE (ultimate) != RETURN)
1656 ultimate = XEXP (ultimate, 0);
1657
1658 if (ultimate && JUMP_LABEL(insn) != ultimate)
1659 changed |= redirect_jump (insn, ultimate);
1660 }
1661 }
1662 #endif
1663
1664 #if 0
1665 /* @@ This needs a bit of work before it will be right.
1666
1667 Any type of comparison can be accepted for the first and
1668 second compare. When rewriting the first jump, we must
1669 compute the what conditions can reach label3, and use the
1670 appropriate code. We can not simply reverse/swap the code
1671 of the first jump. In some cases, the second jump must be
1672 rewritten also.
1673
1674 For example,
1675 < == converts to > ==
1676 < != converts to == >
1677 etc.
1678
1679 If the code is written to only accept an '==' test for the second
1680 compare, then all that needs to be done is to swap the condition
1681 of the first branch.
1682
1683 It is questionable whether we want this optimization anyways,
1684 since if the user wrote code like this because he/she knew that
1685 the jump to label1 is taken most of the time, then rewriting
1686 this gives slower code. */
1687 /* @@ This should call get_condition to find the values being
1688 compared, instead of looking for a COMPARE insn when HAVE_cc0
1689 is not defined. This would allow it to work on the m88k. */
1690 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1691 is not defined and the condition is tested by a separate compare
1692 insn. This is because the code below assumes that the result
1693 of the compare dies in the following branch. */
1694
1695 /* Simplify test a ~= b
1696 condjump label1;
1697 test a == b
1698 condjump label2;
1699 jump label3;
1700 label1:
1701
1702 rewriting as
1703 test a ~~= b
1704 condjump label3
1705 test a == b
1706 condjump label2
1707 label1:
1708
1709 where ~= is an inequality, e.g. >, and ~~= is the swapped
1710 inequality, e.g. <.
1711
1712 We recognize this case scanning backwards.
1713
1714 TEMP is the conditional jump to `label2';
1715 TEMP1 is the test for `a == b';
1716 TEMP2 is the conditional jump to `label1';
1717 TEMP3 is the test for `a ~= b'. */
1718 else if (this_is_simplejump
1719 && (temp = prev_active_insn (insn))
1720 && no_labels_between_p (temp, insn)
1721 && condjump_p (temp)
1722 && (temp1 = prev_active_insn (temp))
1723 && no_labels_between_p (temp1, temp)
1724 && GET_CODE (temp1) == INSN
1725 && GET_CODE (PATTERN (temp1)) == SET
1726 #ifdef HAVE_cc0
1727 && sets_cc0_p (PATTERN (temp1)) == 1
1728 #else
1729 && GET_CODE (SET_SRC (PATTERN (temp1))) == COMPARE
1730 && GET_CODE (SET_DEST (PATTERN (temp1))) == REG
1731 && (temp == find_next_ref (SET_DEST (PATTERN (temp1)), temp1))
1732 #endif
1733 && (temp2 = prev_active_insn (temp1))
1734 && no_labels_between_p (temp2, temp1)
1735 && condjump_p (temp2)
1736 && JUMP_LABEL (temp2) == next_nonnote_insn (NEXT_INSN (insn))
1737 && (temp3 = prev_active_insn (temp2))
1738 && no_labels_between_p (temp3, temp2)
1739 && GET_CODE (PATTERN (temp3)) == SET
1740 && rtx_equal_p (SET_DEST (PATTERN (temp3)),
1741 SET_DEST (PATTERN (temp1)))
1742 && rtx_equal_p (SET_SRC (PATTERN (temp1)),
1743 SET_SRC (PATTERN (temp3)))
1744 && ! inequality_comparisons_p (PATTERN (temp))
1745 && inequality_comparisons_p (PATTERN (temp2)))
1746 {
1747 rtx fallthrough_label = JUMP_LABEL (temp2);
1748
1749 ++LABEL_NUSES (fallthrough_label);
1750 if (swap_jump (temp2, JUMP_LABEL (insn)))
1751 {
1752 delete_insn (insn);
1753 changed = 1;
1754 }
1755
1756 if (--LABEL_NUSES (fallthrough_label) == 0)
1757 delete_insn (fallthrough_label);
1758 }
1759 #endif
1760 /* Simplify if (...) {... x = 1;} if (x) ...
1761
1762 We recognize this case backwards.
1763
1764 TEMP is the test of `x';
1765 TEMP1 is the assignment to `x' at the end of the
1766 previous statement. */
1767 /* @@ This should call get_condition to find the values being
1768 compared, instead of looking for a COMPARE insn when HAVE_cc0
1769 is not defined. This would allow it to work on the m88k. */
1770 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1771 is not defined and the condition is tested by a separate compare
1772 insn. This is because the code below assumes that the result
1773 of the compare dies in the following branch. */
1774
1775 /* ??? This has to be turned off. The problem is that the
1776 unconditional jump might indirectly end up branching to the
1777 label between TEMP1 and TEMP. We can't detect this, in general,
1778 since it may become a jump to there after further optimizations.
1779 If that jump is done, it will be deleted, so we will retry
1780 this optimization in the next pass, thus an infinite loop.
1781
1782 The present code prevents this by putting the jump after the
1783 label, but this is not logically correct. */
1784 #if 0
1785 else if (this_is_condjump
1786 /* Safe to skip USE and CLOBBER insns here
1787 since they will not be deleted. */
1788 && (temp = prev_active_insn (insn))
1789 && no_labels_between_p (temp, insn)
1790 && GET_CODE (temp) == INSN
1791 && GET_CODE (PATTERN (temp)) == SET
1792 #ifdef HAVE_cc0
1793 && sets_cc0_p (PATTERN (temp)) == 1
1794 && GET_CODE (SET_SRC (PATTERN (temp))) == REG
1795 #else
1796 /* Temp must be a compare insn, we can not accept a register
1797 to register move here, since it may not be simply a
1798 tst insn. */
1799 && GET_CODE (SET_SRC (PATTERN (temp))) == COMPARE
1800 && XEXP (SET_SRC (PATTERN (temp)), 1) == const0_rtx
1801 && GET_CODE (XEXP (SET_SRC (PATTERN (temp)), 0)) == REG
1802 && GET_CODE (SET_DEST (PATTERN (temp))) == REG
1803 && insn == find_next_ref (SET_DEST (PATTERN (temp)), temp)
1804 #endif
1805 /* May skip USE or CLOBBER insns here
1806 for checking for opportunity, since we
1807 take care of them later. */
1808 && (temp1 = prev_active_insn (temp))
1809 && GET_CODE (temp1) == INSN
1810 && GET_CODE (PATTERN (temp1)) == SET
1811 #ifdef HAVE_cc0
1812 && SET_SRC (PATTERN (temp)) == SET_DEST (PATTERN (temp1))
1813 #else
1814 && (XEXP (SET_SRC (PATTERN (temp)), 0)
1815 == SET_DEST (PATTERN (temp1)))
1816 #endif
1817 && CONSTANT_P (SET_SRC (PATTERN (temp1)))
1818 /* If this isn't true, cse will do the job. */
1819 && ! no_labels_between_p (temp1, temp))
1820 {
1821 /* Get the if_then_else from the condjump. */
1822 rtx choice = SET_SRC (PATTERN (insn));
1823 if (GET_CODE (choice) == IF_THEN_ELSE
1824 && (GET_CODE (XEXP (choice, 0)) == EQ
1825 || GET_CODE (XEXP (choice, 0)) == NE))
1826 {
1827 int want_nonzero = (GET_CODE (XEXP (choice, 0)) == NE);
1828 rtx last_insn;
1829 rtx ultimate;
1830 rtx p;
1831
1832 /* Get the place that condjump will jump to
1833 if it is reached from here. */
1834 if ((SET_SRC (PATTERN (temp1)) != const0_rtx)
1835 == want_nonzero)
1836 ultimate = XEXP (choice, 1);
1837 else
1838 ultimate = XEXP (choice, 2);
1839 /* Get it as a CODE_LABEL. */
1840 if (ultimate == pc_rtx)
1841 ultimate = get_label_after (insn);
1842 else
1843 /* Get the label out of the LABEL_REF. */
1844 ultimate = XEXP (ultimate, 0);
1845
1846 /* Insert the jump immediately before TEMP, specifically
1847 after the label that is between TEMP1 and TEMP. */
1848 last_insn = PREV_INSN (temp);
1849
1850 /* If we would be branching to the next insn, the jump
1851 would immediately be deleted and the re-inserted in
1852 a subsequent pass over the code. So don't do anything
1853 in that case. */
1854 if (next_active_insn (last_insn)
1855 != next_active_insn (ultimate))
1856 {
1857 emit_barrier_after (last_insn);
1858 p = emit_jump_insn_after (gen_jump (ultimate),
1859 last_insn);
1860 JUMP_LABEL (p) = ultimate;
1861 ++LABEL_NUSES (ultimate);
1862 if (INSN_UID (ultimate) < max_jump_chain
1863 && INSN_CODE (p) < max_jump_chain)
1864 {
1865 jump_chain[INSN_UID (p)]
1866 = jump_chain[INSN_UID (ultimate)];
1867 jump_chain[INSN_UID (ultimate)] = p;
1868 }
1869 changed = 1;
1870 continue;
1871 }
1872 }
1873 }
1874 #endif
1875 /* Detect a conditional jump going to the same place
1876 as an immediately following unconditional jump. */
1877 else if (this_is_condjump
1878 && (temp = next_active_insn (insn)) != 0
1879 && simplejump_p (temp)
1880 && (next_active_insn (JUMP_LABEL (insn))
1881 == next_active_insn (JUMP_LABEL (temp))))
1882 {
1883 rtx tem = temp;
1884
1885 /* ??? Optional. Disables some optimizations, but makes
1886 gcov output more accurate with -O. */
1887 if (flag_test_coverage && !reload_completed)
1888 for (tem = insn; tem != temp; tem = NEXT_INSN (tem))
1889 if (GET_CODE (tem) == NOTE && NOTE_LINE_NUMBER (tem) > 0)
1890 break;
1891
1892 if (tem == temp)
1893 {
1894 delete_jump (insn);
1895 changed = 1;
1896 continue;
1897 }
1898 }
1899 /* Detect a conditional jump jumping over an unconditional jump. */
1900
1901 else if ((this_is_condjump || this_is_condjump_in_parallel)
1902 && ! this_is_simplejump
1903 && reallabelprev != 0
1904 && GET_CODE (reallabelprev) == JUMP_INSN
1905 && prev_active_insn (reallabelprev) == insn
1906 && no_labels_between_p (insn, reallabelprev)
1907 && simplejump_p (reallabelprev))
1908 {
1909 /* When we invert the unconditional jump, we will be
1910 decrementing the usage count of its old label.
1911 Make sure that we don't delete it now because that
1912 might cause the following code to be deleted. */
1913 rtx prev_uses = prev_nonnote_insn (reallabelprev);
1914 rtx prev_label = JUMP_LABEL (insn);
1915
1916 if (prev_label)
1917 ++LABEL_NUSES (prev_label);
1918
1919 if (invert_jump (insn, JUMP_LABEL (reallabelprev)))
1920 {
1921 /* It is very likely that if there are USE insns before
1922 this jump, they hold REG_DEAD notes. These REG_DEAD
1923 notes are no longer valid due to this optimization,
1924 and will cause the life-analysis that following passes
1925 (notably delayed-branch scheduling) to think that
1926 these registers are dead when they are not.
1927
1928 To prevent this trouble, we just remove the USE insns
1929 from the insn chain. */
1930
1931 while (prev_uses && GET_CODE (prev_uses) == INSN
1932 && GET_CODE (PATTERN (prev_uses)) == USE)
1933 {
1934 rtx useless = prev_uses;
1935 prev_uses = prev_nonnote_insn (prev_uses);
1936 delete_insn (useless);
1937 }
1938
1939 delete_insn (reallabelprev);
1940 next = insn;
1941 changed = 1;
1942 }
1943
1944 /* We can now safely delete the label if it is unreferenced
1945 since the delete_insn above has deleted the BARRIER. */
1946 if (prev_label && --LABEL_NUSES (prev_label) == 0)
1947 delete_insn (prev_label);
1948 continue;
1949 }
1950 else
1951 {
1952 /* Detect a jump to a jump. */
1953
1954 nlabel = follow_jumps (JUMP_LABEL (insn));
1955 if (nlabel != JUMP_LABEL (insn)
1956 && redirect_jump (insn, nlabel))
1957 {
1958 changed = 1;
1959 next = insn;
1960 }
1961
1962 /* Look for if (foo) bar; else break; */
1963 /* The insns look like this:
1964 insn = condjump label1;
1965 ...range1 (some insns)...
1966 jump label2;
1967 label1:
1968 ...range2 (some insns)...
1969 jump somewhere unconditionally
1970 label2: */
1971 {
1972 rtx label1 = next_label (insn);
1973 rtx range1end = label1 ? prev_active_insn (label1) : 0;
1974 /* Don't do this optimization on the first round, so that
1975 jump-around-a-jump gets simplified before we ask here
1976 whether a jump is unconditional.
1977
1978 Also don't do it when we are called after reload since
1979 it will confuse reorg. */
1980 if (! first
1981 && (reload_completed ? ! flag_delayed_branch : 1)
1982 /* Make sure INSN is something we can invert. */
1983 && condjump_p (insn)
1984 && label1 != 0
1985 && JUMP_LABEL (insn) == label1
1986 && LABEL_NUSES (label1) == 1
1987 && GET_CODE (range1end) == JUMP_INSN
1988 && simplejump_p (range1end))
1989 {
1990 rtx label2 = next_label (label1);
1991 rtx range2end = label2 ? prev_active_insn (label2) : 0;
1992 if (range1end != range2end
1993 && JUMP_LABEL (range1end) == label2
1994 && GET_CODE (range2end) == JUMP_INSN
1995 && GET_CODE (NEXT_INSN (range2end)) == BARRIER
1996 /* Invert the jump condition, so we
1997 still execute the same insns in each case. */
1998 && invert_jump (insn, label1))
1999 {
2000 rtx range1beg = next_active_insn (insn);
2001 rtx range2beg = next_active_insn (label1);
2002 rtx range1after, range2after;
2003 rtx range1before, range2before;
2004 rtx rangenext;
2005
2006 /* Include in each range any notes before it, to be
2007 sure that we get the line number note if any, even
2008 if there are other notes here. */
2009 while (PREV_INSN (range1beg)
2010 && GET_CODE (PREV_INSN (range1beg)) == NOTE)
2011 range1beg = PREV_INSN (range1beg);
2012
2013 while (PREV_INSN (range2beg)
2014 && GET_CODE (PREV_INSN (range2beg)) == NOTE)
2015 range2beg = PREV_INSN (range2beg);
2016
2017 /* Don't move NOTEs for blocks or loops; shift them
2018 outside the ranges, where they'll stay put. */
2019 range1beg = squeeze_notes (range1beg, range1end);
2020 range2beg = squeeze_notes (range2beg, range2end);
2021
2022 /* Get current surrounds of the 2 ranges. */
2023 range1before = PREV_INSN (range1beg);
2024 range2before = PREV_INSN (range2beg);
2025 range1after = NEXT_INSN (range1end);
2026 range2after = NEXT_INSN (range2end);
2027
2028 /* Splice range2 where range1 was. */
2029 NEXT_INSN (range1before) = range2beg;
2030 PREV_INSN (range2beg) = range1before;
2031 NEXT_INSN (range2end) = range1after;
2032 PREV_INSN (range1after) = range2end;
2033 /* Splice range1 where range2 was. */
2034 NEXT_INSN (range2before) = range1beg;
2035 PREV_INSN (range1beg) = range2before;
2036 NEXT_INSN (range1end) = range2after;
2037 PREV_INSN (range2after) = range1end;
2038
2039 /* Check for a loop end note between the end of
2040 range2, and the next code label. If there is one,
2041 then what we have really seen is
2042 if (foo) break; end_of_loop;
2043 and moved the break sequence outside the loop.
2044 We must move the LOOP_END note to where the
2045 loop really ends now, or we will confuse loop
2046 optimization. Stop if we find a LOOP_BEG note
2047 first, since we don't want to move the LOOP_END
2048 note in that case. */
2049 for (;range2after != label2; range2after = rangenext)
2050 {
2051 rangenext = NEXT_INSN (range2after);
2052 if (GET_CODE (range2after) == NOTE)
2053 {
2054 if (NOTE_LINE_NUMBER (range2after)
2055 == NOTE_INSN_LOOP_END)
2056 {
2057 NEXT_INSN (PREV_INSN (range2after))
2058 = rangenext;
2059 PREV_INSN (rangenext)
2060 = PREV_INSN (range2after);
2061 PREV_INSN (range2after)
2062 = PREV_INSN (range1beg);
2063 NEXT_INSN (range2after) = range1beg;
2064 NEXT_INSN (PREV_INSN (range1beg))
2065 = range2after;
2066 PREV_INSN (range1beg) = range2after;
2067 }
2068 else if (NOTE_LINE_NUMBER (range2after)
2069 == NOTE_INSN_LOOP_BEG)
2070 break;
2071 }
2072 }
2073 changed = 1;
2074 continue;
2075 }
2076 }
2077 }
2078
2079 /* Now that the jump has been tensioned,
2080 try cross jumping: check for identical code
2081 before the jump and before its target label. */
2082
2083 /* First, cross jumping of conditional jumps: */
2084
2085 if (cross_jump && condjump_p (insn))
2086 {
2087 rtx newjpos, newlpos;
2088 rtx x = prev_real_insn (JUMP_LABEL (insn));
2089
2090 /* A conditional jump may be crossjumped
2091 only if the place it jumps to follows
2092 an opposing jump that comes back here. */
2093
2094 if (x != 0 && ! jump_back_p (x, insn))
2095 /* We have no opposing jump;
2096 cannot cross jump this insn. */
2097 x = 0;
2098
2099 newjpos = 0;
2100 /* TARGET is nonzero if it is ok to cross jump
2101 to code before TARGET. If so, see if matches. */
2102 if (x != 0)
2103 find_cross_jump (insn, x, 2,
2104 &newjpos, &newlpos);
2105
2106 if (newjpos != 0)
2107 {
2108 do_cross_jump (insn, newjpos, newlpos);
2109 /* Make the old conditional jump
2110 into an unconditional one. */
2111 SET_SRC (PATTERN (insn))
2112 = gen_rtx_LABEL_REF (VOIDmode, JUMP_LABEL (insn));
2113 INSN_CODE (insn) = -1;
2114 emit_barrier_after (insn);
2115 /* Add to jump_chain unless this is a new label
2116 whose UID is too large. */
2117 if (INSN_UID (JUMP_LABEL (insn)) < max_jump_chain)
2118 {
2119 jump_chain[INSN_UID (insn)]
2120 = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2121 jump_chain[INSN_UID (JUMP_LABEL (insn))] = insn;
2122 }
2123 changed = 1;
2124 next = insn;
2125 }
2126 }
2127
2128 /* Cross jumping of unconditional jumps:
2129 a few differences. */
2130
2131 if (cross_jump && simplejump_p (insn))
2132 {
2133 rtx newjpos, newlpos;
2134 rtx target;
2135
2136 newjpos = 0;
2137
2138 /* TARGET is nonzero if it is ok to cross jump
2139 to code before TARGET. If so, see if matches. */
2140 find_cross_jump (insn, JUMP_LABEL (insn), 1,
2141 &newjpos, &newlpos);
2142
2143 /* If cannot cross jump to code before the label,
2144 see if we can cross jump to another jump to
2145 the same label. */
2146 /* Try each other jump to this label. */
2147 if (INSN_UID (JUMP_LABEL (insn)) < max_uid)
2148 for (target = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2149 target != 0 && newjpos == 0;
2150 target = jump_chain[INSN_UID (target)])
2151 if (target != insn
2152 && JUMP_LABEL (target) == JUMP_LABEL (insn)
2153 /* Ignore TARGET if it's deleted. */
2154 && ! INSN_DELETED_P (target))
2155 find_cross_jump (insn, target, 2,
2156 &newjpos, &newlpos);
2157
2158 if (newjpos != 0)
2159 {
2160 do_cross_jump (insn, newjpos, newlpos);
2161 changed = 1;
2162 next = insn;
2163 }
2164 }
2165
2166 /* This code was dead in the previous jump.c! */
2167 if (cross_jump && GET_CODE (PATTERN (insn)) == RETURN)
2168 {
2169 /* Return insns all "jump to the same place"
2170 so we can cross-jump between any two of them. */
2171
2172 rtx newjpos, newlpos, target;
2173
2174 newjpos = 0;
2175
2176 /* If cannot cross jump to code before the label,
2177 see if we can cross jump to another jump to
2178 the same label. */
2179 /* Try each other jump to this label. */
2180 for (target = jump_chain[0];
2181 target != 0 && newjpos == 0;
2182 target = jump_chain[INSN_UID (target)])
2183 if (target != insn
2184 && ! INSN_DELETED_P (target)
2185 && GET_CODE (PATTERN (target)) == RETURN)
2186 find_cross_jump (insn, target, 2,
2187 &newjpos, &newlpos);
2188
2189 if (newjpos != 0)
2190 {
2191 do_cross_jump (insn, newjpos, newlpos);
2192 changed = 1;
2193 next = insn;
2194 }
2195 }
2196 }
2197 }
2198
2199 first = 0;
2200 }
2201
2202 /* Delete extraneous line number notes.
2203 Note that two consecutive notes for different lines are not really
2204 extraneous. There should be some indication where that line belonged,
2205 even if it became empty. */
2206
2207 {
2208 rtx last_note = 0;
2209
2210 for (insn = f; insn; insn = NEXT_INSN (insn))
2211 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0)
2212 {
2213 /* Delete this note if it is identical to previous note. */
2214 if (last_note
2215 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last_note)
2216 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last_note))
2217 {
2218 delete_insn (insn);
2219 continue;
2220 }
2221
2222 last_note = insn;
2223 }
2224 }
2225
2226 #ifdef HAVE_return
2227 if (HAVE_return)
2228 {
2229 /* If we fall through to the epilogue, see if we can insert a RETURN insn
2230 in front of it. If the machine allows it at this point (we might be
2231 after reload for a leaf routine), it will improve optimization for it
2232 to be there. We do this both here and at the start of this pass since
2233 the RETURN might have been deleted by some of our optimizations. */
2234 insn = get_last_insn ();
2235 while (insn && GET_CODE (insn) == NOTE)
2236 insn = PREV_INSN (insn);
2237
2238 if (insn && GET_CODE (insn) != BARRIER)
2239 {
2240 emit_jump_insn (gen_return ());
2241 emit_barrier ();
2242 }
2243 }
2244 #endif
2245
2246 /* See if there is still a NOTE_INSN_FUNCTION_END in this function.
2247 If so, delete it, and record that this function can drop off the end. */
2248
2249 insn = last_insn;
2250 {
2251 int n_labels = 1;
2252 while (insn
2253 /* One label can follow the end-note: the return label. */
2254 && ((GET_CODE (insn) == CODE_LABEL && n_labels-- > 0)
2255 /* Ordinary insns can follow it if returning a structure. */
2256 || GET_CODE (insn) == INSN
2257 /* If machine uses explicit RETURN insns, no epilogue,
2258 then one of them follows the note. */
2259 || (GET_CODE (insn) == JUMP_INSN
2260 && GET_CODE (PATTERN (insn)) == RETURN)
2261 /* A barrier can follow the return insn. */
2262 || GET_CODE (insn) == BARRIER
2263 /* Other kinds of notes can follow also. */
2264 || (GET_CODE (insn) == NOTE
2265 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)))
2266 insn = PREV_INSN (insn);
2267 }
2268
2269 /* Report if control can fall through at the end of the function. */
2270 if (insn && GET_CODE (insn) == NOTE
2271 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_END)
2272 {
2273 can_reach_end = 1;
2274 delete_insn (insn);
2275 }
2276
2277 /* Show JUMP_CHAIN no longer valid. */
2278 jump_chain = 0;
2279 }
2280 \f
2281 /* LOOP_START is a NOTE_INSN_LOOP_BEG note that is followed by an unconditional
2282 jump. Assume that this unconditional jump is to the exit test code. If
2283 the code is sufficiently simple, make a copy of it before INSN,
2284 followed by a jump to the exit of the loop. Then delete the unconditional
2285 jump after INSN.
2286
2287 Return 1 if we made the change, else 0.
2288
2289 This is only safe immediately after a regscan pass because it uses the
2290 values of regno_first_uid and regno_last_uid. */
2291
2292 static int
2293 duplicate_loop_exit_test (loop_start)
2294 rtx loop_start;
2295 {
2296 rtx insn, set, reg, p, link;
2297 rtx copy = 0;
2298 int num_insns = 0;
2299 rtx exitcode = NEXT_INSN (JUMP_LABEL (next_nonnote_insn (loop_start)));
2300 rtx lastexit;
2301 int max_reg = max_reg_num ();
2302 rtx *reg_map = 0;
2303
2304 /* Scan the exit code. We do not perform this optimization if any insn:
2305
2306 is a CALL_INSN
2307 is a CODE_LABEL
2308 has a REG_RETVAL or REG_LIBCALL note (hard to adjust)
2309 is a NOTE_INSN_LOOP_BEG because this means we have a nested loop
2310 is a NOTE_INSN_BLOCK_{BEG,END} because duplicating these notes
2311 are not valid
2312
2313 Also, don't do this if the exit code is more than 20 insns. */
2314
2315 for (insn = exitcode;
2316 insn
2317 && ! (GET_CODE (insn) == NOTE
2318 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
2319 insn = NEXT_INSN (insn))
2320 {
2321 switch (GET_CODE (insn))
2322 {
2323 case CODE_LABEL:
2324 case CALL_INSN:
2325 return 0;
2326 case NOTE:
2327 /* We could be in front of the wrong NOTE_INSN_LOOP_END if there is
2328 a jump immediately after the loop start that branches outside
2329 the loop but within an outer loop, near the exit test.
2330 If we copied this exit test and created a phony
2331 NOTE_INSN_LOOP_VTOP, this could make instructions immediately
2332 before the exit test look like these could be safely moved
2333 out of the loop even if they actually may be never executed.
2334 This can be avoided by checking here for NOTE_INSN_LOOP_CONT. */
2335
2336 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
2337 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2338 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END
2339 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2340 return 0;
2341 break;
2342 case JUMP_INSN:
2343 case INSN:
2344 if (++num_insns > 20
2345 || find_reg_note (insn, REG_RETVAL, NULL_RTX)
2346 || find_reg_note (insn, REG_LIBCALL, NULL_RTX))
2347 return 0;
2348 break;
2349 default:
2350 break;
2351 }
2352 }
2353
2354 /* Unless INSN is zero, we can do the optimization. */
2355 if (insn == 0)
2356 return 0;
2357
2358 lastexit = insn;
2359
2360 /* See if any insn sets a register only used in the loop exit code and
2361 not a user variable. If so, replace it with a new register. */
2362 for (insn = exitcode; insn != lastexit; insn = NEXT_INSN (insn))
2363 if (GET_CODE (insn) == INSN
2364 && (set = single_set (insn)) != 0
2365 && ((reg = SET_DEST (set), GET_CODE (reg) == REG)
2366 || (GET_CODE (reg) == SUBREG
2367 && (reg = SUBREG_REG (reg), GET_CODE (reg) == REG)))
2368 && REGNO (reg) >= FIRST_PSEUDO_REGISTER
2369 && REGNO_FIRST_UID (REGNO (reg)) == INSN_UID (insn))
2370 {
2371 for (p = NEXT_INSN (insn); p != lastexit; p = NEXT_INSN (p))
2372 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (p))
2373 break;
2374
2375 if (p != lastexit)
2376 {
2377 /* We can do the replacement. Allocate reg_map if this is the
2378 first replacement we found. */
2379 if (reg_map == 0)
2380 {
2381 reg_map = (rtx *) alloca (max_reg * sizeof (rtx));
2382 bzero ((char *) reg_map, max_reg * sizeof (rtx));
2383 }
2384
2385 REG_LOOP_TEST_P (reg) = 1;
2386
2387 reg_map[REGNO (reg)] = gen_reg_rtx (GET_MODE (reg));
2388 }
2389 }
2390
2391 /* Now copy each insn. */
2392 for (insn = exitcode; insn != lastexit; insn = NEXT_INSN (insn))
2393 switch (GET_CODE (insn))
2394 {
2395 case BARRIER:
2396 copy = emit_barrier_before (loop_start);
2397 break;
2398 case NOTE:
2399 /* Only copy line-number notes. */
2400 if (NOTE_LINE_NUMBER (insn) >= 0)
2401 {
2402 copy = emit_note_before (NOTE_LINE_NUMBER (insn), loop_start);
2403 NOTE_SOURCE_FILE (copy) = NOTE_SOURCE_FILE (insn);
2404 }
2405 break;
2406
2407 case INSN:
2408 copy = emit_insn_before (copy_rtx (PATTERN (insn)), loop_start);
2409 if (reg_map)
2410 replace_regs (PATTERN (copy), reg_map, max_reg, 1);
2411
2412 mark_jump_label (PATTERN (copy), copy, 0);
2413
2414 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
2415 make them. */
2416 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
2417 if (REG_NOTE_KIND (link) != REG_LABEL)
2418 REG_NOTES (copy)
2419 = copy_rtx (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
2420 XEXP (link, 0),
2421 REG_NOTES (copy)));
2422 if (reg_map && REG_NOTES (copy))
2423 replace_regs (REG_NOTES (copy), reg_map, max_reg, 1);
2424 break;
2425
2426 case JUMP_INSN:
2427 copy = emit_jump_insn_before (copy_rtx (PATTERN (insn)), loop_start);
2428 if (reg_map)
2429 replace_regs (PATTERN (copy), reg_map, max_reg, 1);
2430 mark_jump_label (PATTERN (copy), copy, 0);
2431 if (REG_NOTES (insn))
2432 {
2433 REG_NOTES (copy) = copy_rtx (REG_NOTES (insn));
2434 if (reg_map)
2435 replace_regs (REG_NOTES (copy), reg_map, max_reg, 1);
2436 }
2437
2438 /* If this is a simple jump, add it to the jump chain. */
2439
2440 if (INSN_UID (copy) < max_jump_chain && JUMP_LABEL (copy)
2441 && simplejump_p (copy))
2442 {
2443 jump_chain[INSN_UID (copy)]
2444 = jump_chain[INSN_UID (JUMP_LABEL (copy))];
2445 jump_chain[INSN_UID (JUMP_LABEL (copy))] = copy;
2446 }
2447 break;
2448
2449 default:
2450 abort ();
2451 }
2452
2453 /* Now clean up by emitting a jump to the end label and deleting the jump
2454 at the start of the loop. */
2455 if (! copy || GET_CODE (copy) != BARRIER)
2456 {
2457 copy = emit_jump_insn_before (gen_jump (get_label_after (insn)),
2458 loop_start);
2459 mark_jump_label (PATTERN (copy), copy, 0);
2460 if (INSN_UID (copy) < max_jump_chain
2461 && INSN_UID (JUMP_LABEL (copy)) < max_jump_chain)
2462 {
2463 jump_chain[INSN_UID (copy)]
2464 = jump_chain[INSN_UID (JUMP_LABEL (copy))];
2465 jump_chain[INSN_UID (JUMP_LABEL (copy))] = copy;
2466 }
2467 emit_barrier_before (loop_start);
2468 }
2469
2470 /* Mark the exit code as the virtual top of the converted loop. */
2471 emit_note_before (NOTE_INSN_LOOP_VTOP, exitcode);
2472
2473 delete_insn (next_nonnote_insn (loop_start));
2474
2475 return 1;
2476 }
2477 \f
2478 /* Move all block-beg, block-end, loop-beg, loop-cont, loop-vtop, and
2479 loop-end notes between START and END out before START. Assume that
2480 END is not such a note. START may be such a note. Returns the value
2481 of the new starting insn, which may be different if the original start
2482 was such a note. */
2483
2484 rtx
2485 squeeze_notes (start, end)
2486 rtx start, end;
2487 {
2488 rtx insn;
2489 rtx next;
2490
2491 for (insn = start; insn != end; insn = next)
2492 {
2493 next = NEXT_INSN (insn);
2494 if (GET_CODE (insn) == NOTE
2495 && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END
2496 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2497 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
2498 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END
2499 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT
2500 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP))
2501 {
2502 if (insn == start)
2503 start = next;
2504 else
2505 {
2506 rtx prev = PREV_INSN (insn);
2507 PREV_INSN (insn) = PREV_INSN (start);
2508 NEXT_INSN (insn) = start;
2509 NEXT_INSN (PREV_INSN (insn)) = insn;
2510 PREV_INSN (NEXT_INSN (insn)) = insn;
2511 NEXT_INSN (prev) = next;
2512 PREV_INSN (next) = prev;
2513 }
2514 }
2515 }
2516
2517 return start;
2518 }
2519 \f
2520 /* Compare the instructions before insn E1 with those before E2
2521 to find an opportunity for cross jumping.
2522 (This means detecting identical sequences of insns followed by
2523 jumps to the same place, or followed by a label and a jump
2524 to that label, and replacing one with a jump to the other.)
2525
2526 Assume E1 is a jump that jumps to label E2
2527 (that is not always true but it might as well be).
2528 Find the longest possible equivalent sequences
2529 and store the first insns of those sequences into *F1 and *F2.
2530 Store zero there if no equivalent preceding instructions are found.
2531
2532 We give up if we find a label in stream 1.
2533 Actually we could transfer that label into stream 2. */
2534
2535 static void
2536 find_cross_jump (e1, e2, minimum, f1, f2)
2537 rtx e1, e2;
2538 int minimum;
2539 rtx *f1, *f2;
2540 {
2541 register rtx i1 = e1, i2 = e2;
2542 register rtx p1, p2;
2543 int lose = 0;
2544
2545 rtx last1 = 0, last2 = 0;
2546 rtx afterlast1 = 0, afterlast2 = 0;
2547
2548 *f1 = 0;
2549 *f2 = 0;
2550
2551 while (1)
2552 {
2553 i1 = prev_nonnote_insn (i1);
2554
2555 i2 = PREV_INSN (i2);
2556 while (i2 && (GET_CODE (i2) == NOTE || GET_CODE (i2) == CODE_LABEL))
2557 i2 = PREV_INSN (i2);
2558
2559 if (i1 == 0)
2560 break;
2561
2562 /* Don't allow the range of insns preceding E1 or E2
2563 to include the other (E2 or E1). */
2564 if (i2 == e1 || i1 == e2)
2565 break;
2566
2567 /* If we will get to this code by jumping, those jumps will be
2568 tensioned to go directly to the new label (before I2),
2569 so this cross-jumping won't cost extra. So reduce the minimum. */
2570 if (GET_CODE (i1) == CODE_LABEL)
2571 {
2572 --minimum;
2573 break;
2574 }
2575
2576 if (i2 == 0 || GET_CODE (i1) != GET_CODE (i2))
2577 break;
2578
2579 p1 = PATTERN (i1);
2580 p2 = PATTERN (i2);
2581
2582 /* If this is a CALL_INSN, compare register usage information.
2583 If we don't check this on stack register machines, the two
2584 CALL_INSNs might be merged leaving reg-stack.c with mismatching
2585 numbers of stack registers in the same basic block.
2586 If we don't check this on machines with delay slots, a delay slot may
2587 be filled that clobbers a parameter expected by the subroutine.
2588
2589 ??? We take the simple route for now and assume that if they're
2590 equal, they were constructed identically. */
2591
2592 if (GET_CODE (i1) == CALL_INSN
2593 && ! rtx_equal_p (CALL_INSN_FUNCTION_USAGE (i1),
2594 CALL_INSN_FUNCTION_USAGE (i2)))
2595 lose = 1;
2596
2597 #ifdef STACK_REGS
2598 /* If cross_jump_death_matters is not 0, the insn's mode
2599 indicates whether or not the insn contains any stack-like
2600 regs. */
2601
2602 if (!lose && cross_jump_death_matters && GET_MODE (i1) == QImode)
2603 {
2604 /* If register stack conversion has already been done, then
2605 death notes must also be compared before it is certain that
2606 the two instruction streams match. */
2607
2608 rtx note;
2609 HARD_REG_SET i1_regset, i2_regset;
2610
2611 CLEAR_HARD_REG_SET (i1_regset);
2612 CLEAR_HARD_REG_SET (i2_regset);
2613
2614 for (note = REG_NOTES (i1); note; note = XEXP (note, 1))
2615 if (REG_NOTE_KIND (note) == REG_DEAD
2616 && STACK_REG_P (XEXP (note, 0)))
2617 SET_HARD_REG_BIT (i1_regset, REGNO (XEXP (note, 0)));
2618
2619 for (note = REG_NOTES (i2); note; note = XEXP (note, 1))
2620 if (REG_NOTE_KIND (note) == REG_DEAD
2621 && STACK_REG_P (XEXP (note, 0)))
2622 SET_HARD_REG_BIT (i2_regset, REGNO (XEXP (note, 0)));
2623
2624 GO_IF_HARD_REG_EQUAL (i1_regset, i2_regset, done);
2625
2626 lose = 1;
2627
2628 done:
2629 ;
2630 }
2631 #endif
2632
2633 /* Don't allow old-style asm or volatile extended asms to be accepted
2634 for cross jumping purposes. It is conceptually correct to allow
2635 them, since cross-jumping preserves the dynamic instruction order
2636 even though it is changing the static instruction order. However,
2637 if an asm is being used to emit an assembler pseudo-op, such as
2638 the MIPS `.set reorder' pseudo-op, then the static instruction order
2639 matters and it must be preserved. */
2640 if (GET_CODE (p1) == ASM_INPUT || GET_CODE (p2) == ASM_INPUT
2641 || (GET_CODE (p1) == ASM_OPERANDS && MEM_VOLATILE_P (p1))
2642 || (GET_CODE (p2) == ASM_OPERANDS && MEM_VOLATILE_P (p2)))
2643 lose = 1;
2644
2645 if (lose || GET_CODE (p1) != GET_CODE (p2)
2646 || ! rtx_renumbered_equal_p (p1, p2))
2647 {
2648 /* The following code helps take care of G++ cleanups. */
2649 rtx equiv1;
2650 rtx equiv2;
2651
2652 if (!lose && GET_CODE (p1) == GET_CODE (p2)
2653 && ((equiv1 = find_reg_note (i1, REG_EQUAL, NULL_RTX)) != 0
2654 || (equiv1 = find_reg_note (i1, REG_EQUIV, NULL_RTX)) != 0)
2655 && ((equiv2 = find_reg_note (i2, REG_EQUAL, NULL_RTX)) != 0
2656 || (equiv2 = find_reg_note (i2, REG_EQUIV, NULL_RTX)) != 0)
2657 /* If the equivalences are not to a constant, they may
2658 reference pseudos that no longer exist, so we can't
2659 use them. */
2660 && CONSTANT_P (XEXP (equiv1, 0))
2661 && rtx_equal_p (XEXP (equiv1, 0), XEXP (equiv2, 0)))
2662 {
2663 rtx s1 = single_set (i1);
2664 rtx s2 = single_set (i2);
2665 if (s1 != 0 && s2 != 0
2666 && rtx_renumbered_equal_p (SET_DEST (s1), SET_DEST (s2)))
2667 {
2668 validate_change (i1, &SET_SRC (s1), XEXP (equiv1, 0), 1);
2669 validate_change (i2, &SET_SRC (s2), XEXP (equiv2, 0), 1);
2670 if (! rtx_renumbered_equal_p (p1, p2))
2671 cancel_changes (0);
2672 else if (apply_change_group ())
2673 goto win;
2674 }
2675 }
2676
2677 /* Insns fail to match; cross jumping is limited to the following
2678 insns. */
2679
2680 #ifdef HAVE_cc0
2681 /* Don't allow the insn after a compare to be shared by
2682 cross-jumping unless the compare is also shared.
2683 Here, if either of these non-matching insns is a compare,
2684 exclude the following insn from possible cross-jumping. */
2685 if (sets_cc0_p (p1) || sets_cc0_p (p2))
2686 last1 = afterlast1, last2 = afterlast2, ++minimum;
2687 #endif
2688
2689 /* If cross-jumping here will feed a jump-around-jump
2690 optimization, this jump won't cost extra, so reduce
2691 the minimum. */
2692 if (GET_CODE (i1) == JUMP_INSN
2693 && JUMP_LABEL (i1)
2694 && prev_real_insn (JUMP_LABEL (i1)) == e1)
2695 --minimum;
2696 break;
2697 }
2698
2699 win:
2700 if (GET_CODE (p1) != USE && GET_CODE (p1) != CLOBBER)
2701 {
2702 /* Ok, this insn is potentially includable in a cross-jump here. */
2703 afterlast1 = last1, afterlast2 = last2;
2704 last1 = i1, last2 = i2, --minimum;
2705 }
2706 }
2707
2708 if (minimum <= 0 && last1 != 0 && last1 != e1)
2709 *f1 = last1, *f2 = last2;
2710 }
2711
2712 static void
2713 do_cross_jump (insn, newjpos, newlpos)
2714 rtx insn, newjpos, newlpos;
2715 {
2716 /* Find an existing label at this point
2717 or make a new one if there is none. */
2718 register rtx label = get_label_before (newlpos);
2719
2720 /* Make the same jump insn jump to the new point. */
2721 if (GET_CODE (PATTERN (insn)) == RETURN)
2722 {
2723 /* Remove from jump chain of returns. */
2724 delete_from_jump_chain (insn);
2725 /* Change the insn. */
2726 PATTERN (insn) = gen_jump (label);
2727 INSN_CODE (insn) = -1;
2728 JUMP_LABEL (insn) = label;
2729 LABEL_NUSES (label)++;
2730 /* Add to new the jump chain. */
2731 if (INSN_UID (label) < max_jump_chain
2732 && INSN_UID (insn) < max_jump_chain)
2733 {
2734 jump_chain[INSN_UID (insn)] = jump_chain[INSN_UID (label)];
2735 jump_chain[INSN_UID (label)] = insn;
2736 }
2737 }
2738 else
2739 redirect_jump (insn, label);
2740
2741 /* Delete the matching insns before the jump. Also, remove any REG_EQUAL
2742 or REG_EQUIV note in the NEWLPOS stream that isn't also present in
2743 the NEWJPOS stream. */
2744
2745 while (newjpos != insn)
2746 {
2747 rtx lnote;
2748
2749 for (lnote = REG_NOTES (newlpos); lnote; lnote = XEXP (lnote, 1))
2750 if ((REG_NOTE_KIND (lnote) == REG_EQUAL
2751 || REG_NOTE_KIND (lnote) == REG_EQUIV)
2752 && ! find_reg_note (newjpos, REG_EQUAL, XEXP (lnote, 0))
2753 && ! find_reg_note (newjpos, REG_EQUIV, XEXP (lnote, 0)))
2754 remove_note (newlpos, lnote);
2755
2756 delete_insn (newjpos);
2757 newjpos = next_real_insn (newjpos);
2758 newlpos = next_real_insn (newlpos);
2759 }
2760 }
2761 \f
2762 /* Return the label before INSN, or put a new label there. */
2763
2764 rtx
2765 get_label_before (insn)
2766 rtx insn;
2767 {
2768 rtx label;
2769
2770 /* Find an existing label at this point
2771 or make a new one if there is none. */
2772 label = prev_nonnote_insn (insn);
2773
2774 if (label == 0 || GET_CODE (label) != CODE_LABEL)
2775 {
2776 rtx prev = PREV_INSN (insn);
2777
2778 label = gen_label_rtx ();
2779 emit_label_after (label, prev);
2780 LABEL_NUSES (label) = 0;
2781 }
2782 return label;
2783 }
2784
2785 /* Return the label after INSN, or put a new label there. */
2786
2787 rtx
2788 get_label_after (insn)
2789 rtx insn;
2790 {
2791 rtx label;
2792
2793 /* Find an existing label at this point
2794 or make a new one if there is none. */
2795 label = next_nonnote_insn (insn);
2796
2797 if (label == 0 || GET_CODE (label) != CODE_LABEL)
2798 {
2799 label = gen_label_rtx ();
2800 emit_label_after (label, insn);
2801 LABEL_NUSES (label) = 0;
2802 }
2803 return label;
2804 }
2805 \f
2806 /* Return 1 if INSN is a jump that jumps to right after TARGET
2807 only on the condition that TARGET itself would drop through.
2808 Assumes that TARGET is a conditional jump. */
2809
2810 static int
2811 jump_back_p (insn, target)
2812 rtx insn, target;
2813 {
2814 rtx cinsn, ctarget;
2815 enum rtx_code codei, codet;
2816
2817 if (simplejump_p (insn) || ! condjump_p (insn)
2818 || simplejump_p (target)
2819 || target != prev_real_insn (JUMP_LABEL (insn)))
2820 return 0;
2821
2822 cinsn = XEXP (SET_SRC (PATTERN (insn)), 0);
2823 ctarget = XEXP (SET_SRC (PATTERN (target)), 0);
2824
2825 codei = GET_CODE (cinsn);
2826 codet = GET_CODE (ctarget);
2827
2828 if (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx)
2829 {
2830 if (! can_reverse_comparison_p (cinsn, insn))
2831 return 0;
2832 codei = reverse_condition (codei);
2833 }
2834
2835 if (XEXP (SET_SRC (PATTERN (target)), 2) == pc_rtx)
2836 {
2837 if (! can_reverse_comparison_p (ctarget, target))
2838 return 0;
2839 codet = reverse_condition (codet);
2840 }
2841
2842 return (codei == codet
2843 && rtx_renumbered_equal_p (XEXP (cinsn, 0), XEXP (ctarget, 0))
2844 && rtx_renumbered_equal_p (XEXP (cinsn, 1), XEXP (ctarget, 1)));
2845 }
2846 \f
2847 /* Given a comparison, COMPARISON, inside a conditional jump insn, INSN,
2848 return non-zero if it is safe to reverse this comparison. It is if our
2849 floating-point is not IEEE, if this is an NE or EQ comparison, or if
2850 this is known to be an integer comparison. */
2851
2852 int
2853 can_reverse_comparison_p (comparison, insn)
2854 rtx comparison;
2855 rtx insn;
2856 {
2857 rtx arg0;
2858
2859 /* If this is not actually a comparison, we can't reverse it. */
2860 if (GET_RTX_CLASS (GET_CODE (comparison)) != '<')
2861 return 0;
2862
2863 if (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
2864 /* If this is an NE comparison, it is safe to reverse it to an EQ
2865 comparison and vice versa, even for floating point. If no operands
2866 are NaNs, the reversal is valid. If some operand is a NaN, EQ is
2867 always false and NE is always true, so the reversal is also valid. */
2868 || flag_fast_math
2869 || GET_CODE (comparison) == NE
2870 || GET_CODE (comparison) == EQ)
2871 return 1;
2872
2873 arg0 = XEXP (comparison, 0);
2874
2875 /* Make sure ARG0 is one of the actual objects being compared. If we
2876 can't do this, we can't be sure the comparison can be reversed.
2877
2878 Handle cc0 and a MODE_CC register. */
2879 if ((GET_CODE (arg0) == REG && GET_MODE_CLASS (GET_MODE (arg0)) == MODE_CC)
2880 #ifdef HAVE_cc0
2881 || arg0 == cc0_rtx
2882 #endif
2883 )
2884 {
2885 rtx prev = prev_nonnote_insn (insn);
2886 rtx set = single_set (prev);
2887
2888 if (set == 0 || SET_DEST (set) != arg0)
2889 return 0;
2890
2891 arg0 = SET_SRC (set);
2892
2893 if (GET_CODE (arg0) == COMPARE)
2894 arg0 = XEXP (arg0, 0);
2895 }
2896
2897 /* We can reverse this if ARG0 is a CONST_INT or if its mode is
2898 not VOIDmode and neither a MODE_CC nor MODE_FLOAT type. */
2899 return (GET_CODE (arg0) == CONST_INT
2900 || (GET_MODE (arg0) != VOIDmode
2901 && GET_MODE_CLASS (GET_MODE (arg0)) != MODE_CC
2902 && GET_MODE_CLASS (GET_MODE (arg0)) != MODE_FLOAT));
2903 }
2904
2905 /* Given an rtx-code for a comparison, return the code
2906 for the negated comparison.
2907 WATCH OUT! reverse_condition is not safe to use on a jump
2908 that might be acting on the results of an IEEE floating point comparison,
2909 because of the special treatment of non-signaling nans in comparisons.
2910 Use can_reverse_comparison_p to be sure. */
2911
2912 enum rtx_code
2913 reverse_condition (code)
2914 enum rtx_code code;
2915 {
2916 switch (code)
2917 {
2918 case EQ:
2919 return NE;
2920
2921 case NE:
2922 return EQ;
2923
2924 case GT:
2925 return LE;
2926
2927 case GE:
2928 return LT;
2929
2930 case LT:
2931 return GE;
2932
2933 case LE:
2934 return GT;
2935
2936 case GTU:
2937 return LEU;
2938
2939 case GEU:
2940 return LTU;
2941
2942 case LTU:
2943 return GEU;
2944
2945 case LEU:
2946 return GTU;
2947
2948 default:
2949 abort ();
2950 return UNKNOWN;
2951 }
2952 }
2953
2954 /* Similar, but return the code when two operands of a comparison are swapped.
2955 This IS safe for IEEE floating-point. */
2956
2957 enum rtx_code
2958 swap_condition (code)
2959 enum rtx_code code;
2960 {
2961 switch (code)
2962 {
2963 case EQ:
2964 case NE:
2965 return code;
2966
2967 case GT:
2968 return LT;
2969
2970 case GE:
2971 return LE;
2972
2973 case LT:
2974 return GT;
2975
2976 case LE:
2977 return GE;
2978
2979 case GTU:
2980 return LTU;
2981
2982 case GEU:
2983 return LEU;
2984
2985 case LTU:
2986 return GTU;
2987
2988 case LEU:
2989 return GEU;
2990
2991 default:
2992 abort ();
2993 return UNKNOWN;
2994 }
2995 }
2996
2997 /* Given a comparison CODE, return the corresponding unsigned comparison.
2998 If CODE is an equality comparison or already an unsigned comparison,
2999 CODE is returned. */
3000
3001 enum rtx_code
3002 unsigned_condition (code)
3003 enum rtx_code code;
3004 {
3005 switch (code)
3006 {
3007 case EQ:
3008 case NE:
3009 case GTU:
3010 case GEU:
3011 case LTU:
3012 case LEU:
3013 return code;
3014
3015 case GT:
3016 return GTU;
3017
3018 case GE:
3019 return GEU;
3020
3021 case LT:
3022 return LTU;
3023
3024 case LE:
3025 return LEU;
3026
3027 default:
3028 abort ();
3029 }
3030 }
3031
3032 /* Similarly, return the signed version of a comparison. */
3033
3034 enum rtx_code
3035 signed_condition (code)
3036 enum rtx_code code;
3037 {
3038 switch (code)
3039 {
3040 case EQ:
3041 case NE:
3042 case GT:
3043 case GE:
3044 case LT:
3045 case LE:
3046 return code;
3047
3048 case GTU:
3049 return GT;
3050
3051 case GEU:
3052 return GE;
3053
3054 case LTU:
3055 return LT;
3056
3057 case LEU:
3058 return LE;
3059
3060 default:
3061 abort ();
3062 }
3063 }
3064 \f
3065 /* Return non-zero if CODE1 is more strict than CODE2, i.e., if the
3066 truth of CODE1 implies the truth of CODE2. */
3067
3068 int
3069 comparison_dominates_p (code1, code2)
3070 enum rtx_code code1, code2;
3071 {
3072 if (code1 == code2)
3073 return 1;
3074
3075 switch (code1)
3076 {
3077 case EQ:
3078 if (code2 == LE || code2 == LEU || code2 == GE || code2 == GEU)
3079 return 1;
3080 break;
3081
3082 case LT:
3083 if (code2 == LE || code2 == NE)
3084 return 1;
3085 break;
3086
3087 case GT:
3088 if (code2 == GE || code2 == NE)
3089 return 1;
3090 break;
3091
3092 case LTU:
3093 if (code2 == LEU || code2 == NE)
3094 return 1;
3095 break;
3096
3097 case GTU:
3098 if (code2 == GEU || code2 == NE)
3099 return 1;
3100 break;
3101
3102 default:
3103 break;
3104 }
3105
3106 return 0;
3107 }
3108 \f
3109 /* Return 1 if INSN is an unconditional jump and nothing else. */
3110
3111 int
3112 simplejump_p (insn)
3113 rtx insn;
3114 {
3115 return (GET_CODE (insn) == JUMP_INSN
3116 && GET_CODE (PATTERN (insn)) == SET
3117 && GET_CODE (SET_DEST (PATTERN (insn))) == PC
3118 && GET_CODE (SET_SRC (PATTERN (insn))) == LABEL_REF);
3119 }
3120
3121 /* Return nonzero if INSN is a (possibly) conditional jump
3122 and nothing more. */
3123
3124 int
3125 condjump_p (insn)
3126 rtx insn;
3127 {
3128 register rtx x = PATTERN (insn);
3129 if (GET_CODE (x) != SET)
3130 return 0;
3131 if (GET_CODE (SET_DEST (x)) != PC)
3132 return 0;
3133 if (GET_CODE (SET_SRC (x)) == LABEL_REF)
3134 return 1;
3135 if (GET_CODE (SET_SRC (x)) != IF_THEN_ELSE)
3136 return 0;
3137 if (XEXP (SET_SRC (x), 2) == pc_rtx
3138 && (GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF
3139 || GET_CODE (XEXP (SET_SRC (x), 1)) == RETURN))
3140 return 1;
3141 if (XEXP (SET_SRC (x), 1) == pc_rtx
3142 && (GET_CODE (XEXP (SET_SRC (x), 2)) == LABEL_REF
3143 || GET_CODE (XEXP (SET_SRC (x), 2)) == RETURN))
3144 return 1;
3145 return 0;
3146 }
3147
3148 /* Return nonzero if INSN is a (possibly) conditional jump
3149 and nothing more. */
3150
3151 int
3152 condjump_in_parallel_p (insn)
3153 rtx insn;
3154 {
3155 register rtx x = PATTERN (insn);
3156
3157 if (GET_CODE (x) != PARALLEL)
3158 return 0;
3159 else
3160 x = XVECEXP (x, 0, 0);
3161
3162 if (GET_CODE (x) != SET)
3163 return 0;
3164 if (GET_CODE (SET_DEST (x)) != PC)
3165 return 0;
3166 if (GET_CODE (SET_SRC (x)) == LABEL_REF)
3167 return 1;
3168 if (GET_CODE (SET_SRC (x)) != IF_THEN_ELSE)
3169 return 0;
3170 if (XEXP (SET_SRC (x), 2) == pc_rtx
3171 && (GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF
3172 || GET_CODE (XEXP (SET_SRC (x), 1)) == RETURN))
3173 return 1;
3174 if (XEXP (SET_SRC (x), 1) == pc_rtx
3175 && (GET_CODE (XEXP (SET_SRC (x), 2)) == LABEL_REF
3176 || GET_CODE (XEXP (SET_SRC (x), 2)) == RETURN))
3177 return 1;
3178 return 0;
3179 }
3180
3181 /* Return 1 if X is an RTX that does nothing but set the condition codes
3182 and CLOBBER or USE registers.
3183 Return -1 if X does explicitly set the condition codes,
3184 but also does other things. */
3185
3186 int
3187 sets_cc0_p (x)
3188 rtx x;
3189 {
3190 #ifdef HAVE_cc0
3191 if (GET_CODE (x) == SET && SET_DEST (x) == cc0_rtx)
3192 return 1;
3193 if (GET_CODE (x) == PARALLEL)
3194 {
3195 int i;
3196 int sets_cc0 = 0;
3197 int other_things = 0;
3198 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
3199 {
3200 if (GET_CODE (XVECEXP (x, 0, i)) == SET
3201 && SET_DEST (XVECEXP (x, 0, i)) == cc0_rtx)
3202 sets_cc0 = 1;
3203 else if (GET_CODE (XVECEXP (x, 0, i)) == SET)
3204 other_things = 1;
3205 }
3206 return ! sets_cc0 ? 0 : other_things ? -1 : 1;
3207 }
3208 return 0;
3209 #else
3210 abort ();
3211 #endif
3212 }
3213 \f
3214 /* Follow any unconditional jump at LABEL;
3215 return the ultimate label reached by any such chain of jumps.
3216 If LABEL is not followed by a jump, return LABEL.
3217 If the chain loops or we can't find end, return LABEL,
3218 since that tells caller to avoid changing the insn.
3219
3220 If RELOAD_COMPLETED is 0, we do not chain across a NOTE_INSN_LOOP_BEG or
3221 a USE or CLOBBER. */
3222
3223 rtx
3224 follow_jumps (label)
3225 rtx label;
3226 {
3227 register rtx insn;
3228 register rtx next;
3229 register rtx value = label;
3230 register int depth;
3231
3232 for (depth = 0;
3233 (depth < 10
3234 && (insn = next_active_insn (value)) != 0
3235 && GET_CODE (insn) == JUMP_INSN
3236 && ((JUMP_LABEL (insn) != 0 && simplejump_p (insn))
3237 || GET_CODE (PATTERN (insn)) == RETURN)
3238 && (next = NEXT_INSN (insn))
3239 && GET_CODE (next) == BARRIER);
3240 depth++)
3241 {
3242 /* Don't chain through the insn that jumps into a loop
3243 from outside the loop,
3244 since that would create multiple loop entry jumps
3245 and prevent loop optimization. */
3246 rtx tem;
3247 if (!reload_completed)
3248 for (tem = value; tem != insn; tem = NEXT_INSN (tem))
3249 if (GET_CODE (tem) == NOTE
3250 && (NOTE_LINE_NUMBER (tem) == NOTE_INSN_LOOP_BEG
3251 /* ??? Optional. Disables some optimizations, but makes
3252 gcov output more accurate with -O. */
3253 || (flag_test_coverage && NOTE_LINE_NUMBER (tem) > 0)))
3254 return value;
3255
3256 /* If we have found a cycle, make the insn jump to itself. */
3257 if (JUMP_LABEL (insn) == label)
3258 return label;
3259
3260 tem = next_active_insn (JUMP_LABEL (insn));
3261 if (tem && (GET_CODE (PATTERN (tem)) == ADDR_VEC
3262 || GET_CODE (PATTERN (tem)) == ADDR_DIFF_VEC))
3263 break;
3264
3265 value = JUMP_LABEL (insn);
3266 }
3267 if (depth == 10)
3268 return label;
3269 return value;
3270 }
3271
3272 /* Assuming that field IDX of X is a vector of label_refs,
3273 replace each of them by the ultimate label reached by it.
3274 Return nonzero if a change is made.
3275 If IGNORE_LOOPS is 0, we do not chain across a NOTE_INSN_LOOP_BEG. */
3276
3277 static int
3278 tension_vector_labels (x, idx)
3279 register rtx x;
3280 register int idx;
3281 {
3282 int changed = 0;
3283 register int i;
3284 for (i = XVECLEN (x, idx) - 1; i >= 0; i--)
3285 {
3286 register rtx olabel = XEXP (XVECEXP (x, idx, i), 0);
3287 register rtx nlabel = follow_jumps (olabel);
3288 if (nlabel && nlabel != olabel)
3289 {
3290 XEXP (XVECEXP (x, idx, i), 0) = nlabel;
3291 ++LABEL_NUSES (nlabel);
3292 if (--LABEL_NUSES (olabel) == 0)
3293 delete_insn (olabel);
3294 changed = 1;
3295 }
3296 }
3297 return changed;
3298 }
3299 \f
3300 /* Find all CODE_LABELs referred to in X, and increment their use counts.
3301 If INSN is a JUMP_INSN and there is at least one CODE_LABEL referenced
3302 in INSN, then store one of them in JUMP_LABEL (INSN).
3303 If INSN is an INSN or a CALL_INSN and there is at least one CODE_LABEL
3304 referenced in INSN, add a REG_LABEL note containing that label to INSN.
3305 Also, when there are consecutive labels, canonicalize on the last of them.
3306
3307 Note that two labels separated by a loop-beginning note
3308 must be kept distinct if we have not yet done loop-optimization,
3309 because the gap between them is where loop-optimize
3310 will want to move invariant code to. CROSS_JUMP tells us
3311 that loop-optimization is done with.
3312
3313 Once reload has completed (CROSS_JUMP non-zero), we need not consider
3314 two labels distinct if they are separated by only USE or CLOBBER insns. */
3315
3316 static void
3317 mark_jump_label (x, insn, cross_jump)
3318 register rtx x;
3319 rtx insn;
3320 int cross_jump;
3321 {
3322 register RTX_CODE code = GET_CODE (x);
3323 register int i;
3324 register char *fmt;
3325
3326 switch (code)
3327 {
3328 case PC:
3329 case CC0:
3330 case REG:
3331 case SUBREG:
3332 case CONST_INT:
3333 case SYMBOL_REF:
3334 case CONST_DOUBLE:
3335 case CLOBBER:
3336 case CALL:
3337 return;
3338
3339 case MEM:
3340 /* If this is a constant-pool reference, see if it is a label. */
3341 if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
3342 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)))
3343 mark_jump_label (get_pool_constant (XEXP (x, 0)), insn, cross_jump);
3344 break;
3345
3346 case LABEL_REF:
3347 {
3348 rtx label = XEXP (x, 0);
3349 rtx olabel = label;
3350 rtx note;
3351 rtx next;
3352
3353 if (GET_CODE (label) != CODE_LABEL)
3354 abort ();
3355
3356 /* Ignore references to labels of containing functions. */
3357 if (LABEL_REF_NONLOCAL_P (x))
3358 break;
3359
3360 /* If there are other labels following this one,
3361 replace it with the last of the consecutive labels. */
3362 for (next = NEXT_INSN (label); next; next = NEXT_INSN (next))
3363 {
3364 if (GET_CODE (next) == CODE_LABEL)
3365 label = next;
3366 else if (cross_jump && GET_CODE (next) == INSN
3367 && (GET_CODE (PATTERN (next)) == USE
3368 || GET_CODE (PATTERN (next)) == CLOBBER))
3369 continue;
3370 else if (GET_CODE (next) != NOTE)
3371 break;
3372 else if (! cross_jump
3373 && (NOTE_LINE_NUMBER (next) == NOTE_INSN_LOOP_BEG
3374 || NOTE_LINE_NUMBER (next) == NOTE_INSN_FUNCTION_END
3375 /* ??? Optional. Disables some optimizations, but
3376 makes gcov output more accurate with -O. */
3377 || (flag_test_coverage && NOTE_LINE_NUMBER (next) > 0)))
3378 break;
3379 }
3380
3381 XEXP (x, 0) = label;
3382 if (! insn || ! INSN_DELETED_P (insn))
3383 ++LABEL_NUSES (label);
3384
3385 if (insn)
3386 {
3387 if (GET_CODE (insn) == JUMP_INSN)
3388 JUMP_LABEL (insn) = label;
3389
3390 /* If we've changed OLABEL and we had a REG_LABEL note
3391 for it, update it as well. */
3392 else if (label != olabel
3393 && (note = find_reg_note (insn, REG_LABEL, olabel)) != 0)
3394 XEXP (note, 0) = label;
3395
3396 /* Otherwise, add a REG_LABEL note for LABEL unless there already
3397 is one. */
3398 else if (! find_reg_note (insn, REG_LABEL, label))
3399 {
3400 rtx next = next_real_insn (label);
3401 /* Don't record labels that refer to dispatch tables.
3402 This is not necessary, since the tablejump
3403 references the same label.
3404 And if we did record them, flow.c would make worse code. */
3405 if (next == 0
3406 || ! (GET_CODE (next) == JUMP_INSN
3407 && (GET_CODE (PATTERN (next)) == ADDR_VEC
3408 || GET_CODE (PATTERN (next)) == ADDR_DIFF_VEC)))
3409 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, label,
3410 REG_NOTES (insn));
3411 }
3412 }
3413 return;
3414 }
3415
3416 /* Do walk the labels in a vector, but not the first operand of an
3417 ADDR_DIFF_VEC. Don't set the JUMP_LABEL of a vector. */
3418 case ADDR_VEC:
3419 case ADDR_DIFF_VEC:
3420 if (! INSN_DELETED_P (insn))
3421 {
3422 int eltnum = code == ADDR_DIFF_VEC ? 1 : 0;
3423
3424 for (i = 0; i < XVECLEN (x, eltnum); i++)
3425 mark_jump_label (XVECEXP (x, eltnum, i), NULL_RTX, cross_jump);
3426 }
3427 return;
3428
3429 default:
3430 break;
3431 }
3432
3433 fmt = GET_RTX_FORMAT (code);
3434 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3435 {
3436 if (fmt[i] == 'e')
3437 mark_jump_label (XEXP (x, i), insn, cross_jump);
3438 else if (fmt[i] == 'E')
3439 {
3440 register int j;
3441 for (j = 0; j < XVECLEN (x, i); j++)
3442 mark_jump_label (XVECEXP (x, i, j), insn, cross_jump);
3443 }
3444 }
3445 }
3446
3447 /* If all INSN does is set the pc, delete it,
3448 and delete the insn that set the condition codes for it
3449 if that's what the previous thing was. */
3450
3451 void
3452 delete_jump (insn)
3453 rtx insn;
3454 {
3455 register rtx set = single_set (insn);
3456
3457 if (set && GET_CODE (SET_DEST (set)) == PC)
3458 delete_computation (insn);
3459 }
3460
3461 /* Delete INSN and recursively delete insns that compute values used only
3462 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3463 If we are running before flow.c, we need do nothing since flow.c will
3464 delete dead code. We also can't know if the registers being used are
3465 dead or not at this point.
3466
3467 Otherwise, look at all our REG_DEAD notes. If a previous insn does
3468 nothing other than set a register that dies in this insn, we can delete
3469 that insn as well.
3470
3471 On machines with CC0, if CC0 is used in this insn, we may be able to
3472 delete the insn that set it. */
3473
3474 static void
3475 delete_computation (insn)
3476 rtx insn;
3477 {
3478 rtx note, next;
3479
3480 #ifdef HAVE_cc0
3481 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
3482 {
3483 rtx prev = prev_nonnote_insn (insn);
3484 /* We assume that at this stage
3485 CC's are always set explicitly
3486 and always immediately before the jump that
3487 will use them. So if the previous insn
3488 exists to set the CC's, delete it
3489 (unless it performs auto-increments, etc.). */
3490 if (prev && GET_CODE (prev) == INSN
3491 && sets_cc0_p (PATTERN (prev)))
3492 {
3493 if (sets_cc0_p (PATTERN (prev)) > 0
3494 && !FIND_REG_INC_NOTE (prev, NULL_RTX))
3495 delete_computation (prev);
3496 else
3497 /* Otherwise, show that cc0 won't be used. */
3498 REG_NOTES (prev) = gen_rtx_EXPR_LIST (REG_UNUSED,
3499 cc0_rtx, REG_NOTES (prev));
3500 }
3501 }
3502 #endif
3503
3504 for (note = REG_NOTES (insn); note; note = next)
3505 {
3506 rtx our_prev;
3507
3508 next = XEXP (note, 1);
3509
3510 if (REG_NOTE_KIND (note) != REG_DEAD
3511 /* Verify that the REG_NOTE is legitimate. */
3512 || GET_CODE (XEXP (note, 0)) != REG)
3513 continue;
3514
3515 for (our_prev = prev_nonnote_insn (insn);
3516 our_prev && GET_CODE (our_prev) == INSN;
3517 our_prev = prev_nonnote_insn (our_prev))
3518 {
3519 /* If we reach a SEQUENCE, it is too complex to try to
3520 do anything with it, so give up. */
3521 if (GET_CODE (PATTERN (our_prev)) == SEQUENCE)
3522 break;
3523
3524 if (GET_CODE (PATTERN (our_prev)) == USE
3525 && GET_CODE (XEXP (PATTERN (our_prev), 0)) == INSN)
3526 /* reorg creates USEs that look like this. We leave them
3527 alone because reorg needs them for its own purposes. */
3528 break;
3529
3530 if (reg_set_p (XEXP (note, 0), PATTERN (our_prev)))
3531 {
3532 if (FIND_REG_INC_NOTE (our_prev, NULL_RTX))
3533 break;
3534
3535 if (GET_CODE (PATTERN (our_prev)) == PARALLEL)
3536 {
3537 /* If we find a SET of something else, we can't
3538 delete the insn. */
3539
3540 int i;
3541
3542 for (i = 0; i < XVECLEN (PATTERN (our_prev), 0); i++)
3543 {
3544 rtx part = XVECEXP (PATTERN (our_prev), 0, i);
3545
3546 if (GET_CODE (part) == SET
3547 && SET_DEST (part) != XEXP (note, 0))
3548 break;
3549 }
3550
3551 if (i == XVECLEN (PATTERN (our_prev), 0))
3552 delete_computation (our_prev);
3553 }
3554 else if (GET_CODE (PATTERN (our_prev)) == SET
3555 && SET_DEST (PATTERN (our_prev)) == XEXP (note, 0))
3556 delete_computation (our_prev);
3557
3558 break;
3559 }
3560
3561 /* If OUR_PREV references the register that dies here, it is an
3562 additional use. Hence any prior SET isn't dead. However, this
3563 insn becomes the new place for the REG_DEAD note. */
3564 if (reg_overlap_mentioned_p (XEXP (note, 0),
3565 PATTERN (our_prev)))
3566 {
3567 XEXP (note, 1) = REG_NOTES (our_prev);
3568 REG_NOTES (our_prev) = note;
3569 break;
3570 }
3571 }
3572 }
3573
3574 delete_insn (insn);
3575 }
3576 \f
3577 /* Delete insn INSN from the chain of insns and update label ref counts.
3578 May delete some following insns as a consequence; may even delete
3579 a label elsewhere and insns that follow it.
3580
3581 Returns the first insn after INSN that was not deleted. */
3582
3583 rtx
3584 delete_insn (insn)
3585 register rtx insn;
3586 {
3587 register rtx next = NEXT_INSN (insn);
3588 register rtx prev = PREV_INSN (insn);
3589 register int was_code_label = (GET_CODE (insn) == CODE_LABEL);
3590 register int dont_really_delete = 0;
3591
3592 while (next && INSN_DELETED_P (next))
3593 next = NEXT_INSN (next);
3594
3595 /* This insn is already deleted => return first following nondeleted. */
3596 if (INSN_DELETED_P (insn))
3597 return next;
3598
3599 /* Don't delete user-declared labels. Convert them to special NOTEs
3600 instead. */
3601 if (was_code_label && LABEL_NAME (insn) != 0
3602 && optimize && ! dont_really_delete)
3603 {
3604 PUT_CODE (insn, NOTE);
3605 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED_LABEL;
3606 NOTE_SOURCE_FILE (insn) = 0;
3607 dont_really_delete = 1;
3608 }
3609 else
3610 /* Mark this insn as deleted. */
3611 INSN_DELETED_P (insn) = 1;
3612
3613 /* If this is an unconditional jump, delete it from the jump chain. */
3614 if (simplejump_p (insn))
3615 delete_from_jump_chain (insn);
3616
3617 /* If instruction is followed by a barrier,
3618 delete the barrier too. */
3619
3620 if (next != 0 && GET_CODE (next) == BARRIER)
3621 {
3622 INSN_DELETED_P (next) = 1;
3623 next = NEXT_INSN (next);
3624 }
3625
3626 /* Patch out INSN (and the barrier if any) */
3627
3628 if (optimize && ! dont_really_delete)
3629 {
3630 if (prev)
3631 {
3632 NEXT_INSN (prev) = next;
3633 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3634 NEXT_INSN (XVECEXP (PATTERN (prev), 0,
3635 XVECLEN (PATTERN (prev), 0) - 1)) = next;
3636 }
3637
3638 if (next)
3639 {
3640 PREV_INSN (next) = prev;
3641 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3642 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3643 }
3644
3645 if (prev && NEXT_INSN (prev) == 0)
3646 set_last_insn (prev);
3647 }
3648
3649 /* If deleting a jump, decrement the count of the label,
3650 and delete the label if it is now unused. */
3651
3652 if (GET_CODE (insn) == JUMP_INSN && JUMP_LABEL (insn))
3653 if (--LABEL_NUSES (JUMP_LABEL (insn)) == 0)
3654 {
3655 /* This can delete NEXT or PREV,
3656 either directly if NEXT is JUMP_LABEL (INSN),
3657 or indirectly through more levels of jumps. */
3658 delete_insn (JUMP_LABEL (insn));
3659 /* I feel a little doubtful about this loop,
3660 but I see no clean and sure alternative way
3661 to find the first insn after INSN that is not now deleted.
3662 I hope this works. */
3663 while (next && INSN_DELETED_P (next))
3664 next = NEXT_INSN (next);
3665 return next;
3666 }
3667
3668 /* Likewise if we're deleting a dispatch table. */
3669
3670 if (GET_CODE (insn) == JUMP_INSN
3671 && (GET_CODE (PATTERN (insn)) == ADDR_VEC
3672 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC))
3673 {
3674 rtx pat = PATTERN (insn);
3675 int i, diff_vec_p = GET_CODE (pat) == ADDR_DIFF_VEC;
3676 int len = XVECLEN (pat, diff_vec_p);
3677
3678 for (i = 0; i < len; i++)
3679 if (--LABEL_NUSES (XEXP (XVECEXP (pat, diff_vec_p, i), 0)) == 0)
3680 delete_insn (XEXP (XVECEXP (pat, diff_vec_p, i), 0));
3681 while (next && INSN_DELETED_P (next))
3682 next = NEXT_INSN (next);
3683 return next;
3684 }
3685
3686 while (prev && (INSN_DELETED_P (prev) || GET_CODE (prev) == NOTE))
3687 prev = PREV_INSN (prev);
3688
3689 /* If INSN was a label and a dispatch table follows it,
3690 delete the dispatch table. The tablejump must have gone already.
3691 It isn't useful to fall through into a table. */
3692
3693 if (was_code_label
3694 && NEXT_INSN (insn) != 0
3695 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN
3696 && (GET_CODE (PATTERN (NEXT_INSN (insn))) == ADDR_VEC
3697 || GET_CODE (PATTERN (NEXT_INSN (insn))) == ADDR_DIFF_VEC))
3698 next = delete_insn (NEXT_INSN (insn));
3699
3700 /* If INSN was a label, delete insns following it if now unreachable. */
3701
3702 if (was_code_label && prev && GET_CODE (prev) == BARRIER)
3703 {
3704 register RTX_CODE code;
3705 while (next != 0
3706 && (GET_RTX_CLASS (code = GET_CODE (next)) == 'i'
3707 || code == NOTE || code == BARRIER
3708 || (code == CODE_LABEL && INSN_DELETED_P (next))))
3709 {
3710 if (code == NOTE
3711 && NOTE_LINE_NUMBER (next) != NOTE_INSN_FUNCTION_END)
3712 next = NEXT_INSN (next);
3713 /* Keep going past other deleted labels to delete what follows. */
3714 else if (code == CODE_LABEL && INSN_DELETED_P (next))
3715 next = NEXT_INSN (next);
3716 else
3717 /* Note: if this deletes a jump, it can cause more
3718 deletion of unreachable code, after a different label.
3719 As long as the value from this recursive call is correct,
3720 this invocation functions correctly. */
3721 next = delete_insn (next);
3722 }
3723 }
3724
3725 return next;
3726 }
3727
3728 /* Advance from INSN till reaching something not deleted
3729 then return that. May return INSN itself. */
3730
3731 rtx
3732 next_nondeleted_insn (insn)
3733 rtx insn;
3734 {
3735 while (INSN_DELETED_P (insn))
3736 insn = NEXT_INSN (insn);
3737 return insn;
3738 }
3739 \f
3740 /* Delete a range of insns from FROM to TO, inclusive.
3741 This is for the sake of peephole optimization, so assume
3742 that whatever these insns do will still be done by a new
3743 peephole insn that will replace them. */
3744
3745 void
3746 delete_for_peephole (from, to)
3747 register rtx from, to;
3748 {
3749 register rtx insn = from;
3750
3751 while (1)
3752 {
3753 register rtx next = NEXT_INSN (insn);
3754 register rtx prev = PREV_INSN (insn);
3755
3756 if (GET_CODE (insn) != NOTE)
3757 {
3758 INSN_DELETED_P (insn) = 1;
3759
3760 /* Patch this insn out of the chain. */
3761 /* We don't do this all at once, because we
3762 must preserve all NOTEs. */
3763 if (prev)
3764 NEXT_INSN (prev) = next;
3765
3766 if (next)
3767 PREV_INSN (next) = prev;
3768 }
3769
3770 if (insn == to)
3771 break;
3772 insn = next;
3773 }
3774
3775 /* Note that if TO is an unconditional jump
3776 we *do not* delete the BARRIER that follows,
3777 since the peephole that replaces this sequence
3778 is also an unconditional jump in that case. */
3779 }
3780 \f
3781 /* Invert the condition of the jump JUMP, and make it jump
3782 to label NLABEL instead of where it jumps now. */
3783
3784 int
3785 invert_jump (jump, nlabel)
3786 rtx jump, nlabel;
3787 {
3788 /* We have to either invert the condition and change the label or
3789 do neither. Either operation could fail. We first try to invert
3790 the jump. If that succeeds, we try changing the label. If that fails,
3791 we invert the jump back to what it was. */
3792
3793 if (! invert_exp (PATTERN (jump), jump))
3794 return 0;
3795
3796 if (redirect_jump (jump, nlabel))
3797 {
3798 if (flag_branch_probabilities)
3799 {
3800 rtx note = find_reg_note (jump, REG_BR_PROB, 0);
3801
3802 /* An inverted jump means that a probability taken becomes a
3803 probability not taken. Subtract the branch probability from the
3804 probability base to convert it back to a taken probability.
3805 (We don't flip the probability on a branch that's never taken. */
3806 if (note && XINT (XEXP (note, 0), 0) >= 0)
3807 XINT (XEXP (note, 0), 0) = REG_BR_PROB_BASE - XINT (XEXP (note, 0), 0);
3808 }
3809
3810 return 1;
3811 }
3812
3813 if (! invert_exp (PATTERN (jump), jump))
3814 /* This should just be putting it back the way it was. */
3815 abort ();
3816
3817 return 0;
3818 }
3819
3820 /* Invert the jump condition of rtx X contained in jump insn, INSN.
3821
3822 Return 1 if we can do so, 0 if we cannot find a way to do so that
3823 matches a pattern. */
3824
3825 int
3826 invert_exp (x, insn)
3827 rtx x;
3828 rtx insn;
3829 {
3830 register RTX_CODE code;
3831 register int i;
3832 register char *fmt;
3833
3834 code = GET_CODE (x);
3835
3836 if (code == IF_THEN_ELSE)
3837 {
3838 register rtx comp = XEXP (x, 0);
3839 register rtx tem;
3840
3841 /* We can do this in two ways: The preferable way, which can only
3842 be done if this is not an integer comparison, is to reverse
3843 the comparison code. Otherwise, swap the THEN-part and ELSE-part
3844 of the IF_THEN_ELSE. If we can't do either, fail. */
3845
3846 if (can_reverse_comparison_p (comp, insn)
3847 && validate_change (insn, &XEXP (x, 0),
3848 gen_rtx_fmt_ee (reverse_condition (GET_CODE (comp)),
3849 GET_MODE (comp), XEXP (comp, 0),
3850 XEXP (comp, 1)), 0))
3851 return 1;
3852
3853 tem = XEXP (x, 1);
3854 validate_change (insn, &XEXP (x, 1), XEXP (x, 2), 1);
3855 validate_change (insn, &XEXP (x, 2), tem, 1);
3856 return apply_change_group ();
3857 }
3858
3859 fmt = GET_RTX_FORMAT (code);
3860 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3861 {
3862 if (fmt[i] == 'e')
3863 if (! invert_exp (XEXP (x, i), insn))
3864 return 0;
3865 if (fmt[i] == 'E')
3866 {
3867 register int j;
3868 for (j = 0; j < XVECLEN (x, i); j++)
3869 if (!invert_exp (XVECEXP (x, i, j), insn))
3870 return 0;
3871 }
3872 }
3873
3874 return 1;
3875 }
3876 \f
3877 /* Make jump JUMP jump to label NLABEL instead of where it jumps now.
3878 If the old jump target label is unused as a result,
3879 it and the code following it may be deleted.
3880
3881 If NLABEL is zero, we are to turn the jump into a (possibly conditional)
3882 RETURN insn.
3883
3884 The return value will be 1 if the change was made, 0 if it wasn't (this
3885 can only occur for NLABEL == 0). */
3886
3887 int
3888 redirect_jump (jump, nlabel)
3889 rtx jump, nlabel;
3890 {
3891 register rtx olabel = JUMP_LABEL (jump);
3892
3893 if (nlabel == olabel)
3894 return 1;
3895
3896 if (! redirect_exp (&PATTERN (jump), olabel, nlabel, jump))
3897 return 0;
3898
3899 /* If this is an unconditional branch, delete it from the jump_chain of
3900 OLABEL and add it to the jump_chain of NLABEL (assuming both labels
3901 have UID's in range and JUMP_CHAIN is valid). */
3902 if (jump_chain && (simplejump_p (jump)
3903 || GET_CODE (PATTERN (jump)) == RETURN))
3904 {
3905 int label_index = nlabel ? INSN_UID (nlabel) : 0;
3906
3907 delete_from_jump_chain (jump);
3908 if (label_index < max_jump_chain
3909 && INSN_UID (jump) < max_jump_chain)
3910 {
3911 jump_chain[INSN_UID (jump)] = jump_chain[label_index];
3912 jump_chain[label_index] = jump;
3913 }
3914 }
3915
3916 JUMP_LABEL (jump) = nlabel;
3917 if (nlabel)
3918 ++LABEL_NUSES (nlabel);
3919
3920 if (olabel && --LABEL_NUSES (olabel) == 0)
3921 delete_insn (olabel);
3922
3923 return 1;
3924 }
3925
3926 /* Delete the instruction JUMP from any jump chain it might be on. */
3927
3928 static void
3929 delete_from_jump_chain (jump)
3930 rtx jump;
3931 {
3932 int index;
3933 rtx olabel = JUMP_LABEL (jump);
3934
3935 /* Handle unconditional jumps. */
3936 if (jump_chain && olabel != 0
3937 && INSN_UID (olabel) < max_jump_chain
3938 && simplejump_p (jump))
3939 index = INSN_UID (olabel);
3940 /* Handle return insns. */
3941 else if (jump_chain && GET_CODE (PATTERN (jump)) == RETURN)
3942 index = 0;
3943 else return;
3944
3945 if (jump_chain[index] == jump)
3946 jump_chain[index] = jump_chain[INSN_UID (jump)];
3947 else
3948 {
3949 rtx insn;
3950
3951 for (insn = jump_chain[index];
3952 insn != 0;
3953 insn = jump_chain[INSN_UID (insn)])
3954 if (jump_chain[INSN_UID (insn)] == jump)
3955 {
3956 jump_chain[INSN_UID (insn)] = jump_chain[INSN_UID (jump)];
3957 break;
3958 }
3959 }
3960 }
3961
3962 /* If NLABEL is nonzero, throughout the rtx at LOC,
3963 alter (LABEL_REF OLABEL) to (LABEL_REF NLABEL). If OLABEL is
3964 zero, alter (RETURN) to (LABEL_REF NLABEL).
3965
3966 If NLABEL is zero, alter (LABEL_REF OLABEL) to (RETURN) and check
3967 validity with validate_change. Convert (set (pc) (label_ref olabel))
3968 to (return).
3969
3970 Return 0 if we found a change we would like to make but it is invalid.
3971 Otherwise, return 1. */
3972
3973 int
3974 redirect_exp (loc, olabel, nlabel, insn)
3975 rtx *loc;
3976 rtx olabel, nlabel;
3977 rtx insn;
3978 {
3979 register rtx x = *loc;
3980 register RTX_CODE code = GET_CODE (x);
3981 register int i;
3982 register char *fmt;
3983
3984 if (code == LABEL_REF)
3985 {
3986 if (XEXP (x, 0) == olabel)
3987 {
3988 if (nlabel)
3989 XEXP (x, 0) = nlabel;
3990 else
3991 return validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 0);
3992 return 1;
3993 }
3994 }
3995 else if (code == RETURN && olabel == 0)
3996 {
3997 x = gen_rtx_LABEL_REF (VOIDmode, nlabel);
3998 if (loc == &PATTERN (insn))
3999 x = gen_rtx_SET (VOIDmode, pc_rtx, x);
4000 return validate_change (insn, loc, x, 0);
4001 }
4002
4003 if (code == SET && nlabel == 0 && SET_DEST (x) == pc_rtx
4004 && GET_CODE (SET_SRC (x)) == LABEL_REF
4005 && XEXP (SET_SRC (x), 0) == olabel)
4006 return validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 0);
4007
4008 fmt = GET_RTX_FORMAT (code);
4009 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4010 {
4011 if (fmt[i] == 'e')
4012 if (! redirect_exp (&XEXP (x, i), olabel, nlabel, insn))
4013 return 0;
4014 if (fmt[i] == 'E')
4015 {
4016 register int j;
4017 for (j = 0; j < XVECLEN (x, i); j++)
4018 if (! redirect_exp (&XVECEXP (x, i, j), olabel, nlabel, insn))
4019 return 0;
4020 }
4021 }
4022
4023 return 1;
4024 }
4025 \f
4026 /* Make jump JUMP jump to label NLABEL, assuming it used to be a tablejump.
4027
4028 If the old jump target label (before the dispatch table) becomes unused,
4029 it and the dispatch table may be deleted. In that case, find the insn
4030 before the jump references that label and delete it and logical successors
4031 too. */
4032
4033 static void
4034 redirect_tablejump (jump, nlabel)
4035 rtx jump, nlabel;
4036 {
4037 register rtx olabel = JUMP_LABEL (jump);
4038
4039 /* Add this jump to the jump_chain of NLABEL. */
4040 if (jump_chain && INSN_UID (nlabel) < max_jump_chain
4041 && INSN_UID (jump) < max_jump_chain)
4042 {
4043 jump_chain[INSN_UID (jump)] = jump_chain[INSN_UID (nlabel)];
4044 jump_chain[INSN_UID (nlabel)] = jump;
4045 }
4046
4047 PATTERN (jump) = gen_jump (nlabel);
4048 JUMP_LABEL (jump) = nlabel;
4049 ++LABEL_NUSES (nlabel);
4050 INSN_CODE (jump) = -1;
4051
4052 if (--LABEL_NUSES (olabel) == 0)
4053 {
4054 delete_labelref_insn (jump, olabel, 0);
4055 delete_insn (olabel);
4056 }
4057 }
4058
4059 /* Find the insn referencing LABEL that is a logical predecessor of INSN.
4060 If we found one, delete it and then delete this insn if DELETE_THIS is
4061 non-zero. Return non-zero if INSN or a predecessor references LABEL. */
4062
4063 static int
4064 delete_labelref_insn (insn, label, delete_this)
4065 rtx insn, label;
4066 int delete_this;
4067 {
4068 int deleted = 0;
4069 rtx link;
4070
4071 if (GET_CODE (insn) != NOTE
4072 && reg_mentioned_p (label, PATTERN (insn)))
4073 {
4074 if (delete_this)
4075 {
4076 delete_insn (insn);
4077 deleted = 1;
4078 }
4079 else
4080 return 1;
4081 }
4082
4083 for (link = LOG_LINKS (insn); link; link = XEXP (link, 1))
4084 if (delete_labelref_insn (XEXP (link, 0), label, 1))
4085 {
4086 if (delete_this)
4087 {
4088 delete_insn (insn);
4089 deleted = 1;
4090 }
4091 else
4092 return 1;
4093 }
4094
4095 return deleted;
4096 }
4097 \f
4098 /* Like rtx_equal_p except that it considers two REGs as equal
4099 if they renumber to the same value and considers two commutative
4100 operations to be the same if the order of the operands has been
4101 reversed. */
4102
4103 int
4104 rtx_renumbered_equal_p (x, y)
4105 rtx x, y;
4106 {
4107 register int i;
4108 register RTX_CODE code = GET_CODE (x);
4109 register char *fmt;
4110
4111 if (x == y)
4112 return 1;
4113
4114 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
4115 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
4116 && GET_CODE (SUBREG_REG (y)) == REG)))
4117 {
4118 int reg_x = -1, reg_y = -1;
4119 int word_x = 0, word_y = 0;
4120
4121 if (GET_MODE (x) != GET_MODE (y))
4122 return 0;
4123
4124 /* If we haven't done any renumbering, don't
4125 make any assumptions. */
4126 if (reg_renumber == 0)
4127 return rtx_equal_p (x, y);
4128
4129 if (code == SUBREG)
4130 {
4131 reg_x = REGNO (SUBREG_REG (x));
4132 word_x = SUBREG_WORD (x);
4133
4134 if (reg_renumber[reg_x] >= 0)
4135 {
4136 reg_x = reg_renumber[reg_x] + word_x;
4137 word_x = 0;
4138 }
4139 }
4140
4141 else
4142 {
4143 reg_x = REGNO (x);
4144 if (reg_renumber[reg_x] >= 0)
4145 reg_x = reg_renumber[reg_x];
4146 }
4147
4148 if (GET_CODE (y) == SUBREG)
4149 {
4150 reg_y = REGNO (SUBREG_REG (y));
4151 word_y = SUBREG_WORD (y);
4152
4153 if (reg_renumber[reg_y] >= 0)
4154 {
4155 reg_y = reg_renumber[reg_y];
4156 word_y = 0;
4157 }
4158 }
4159
4160 else
4161 {
4162 reg_y = REGNO (y);
4163 if (reg_renumber[reg_y] >= 0)
4164 reg_y = reg_renumber[reg_y];
4165 }
4166
4167 return reg_x >= 0 && reg_x == reg_y && word_x == word_y;
4168 }
4169
4170 /* Now we have disposed of all the cases
4171 in which different rtx codes can match. */
4172 if (code != GET_CODE (y))
4173 return 0;
4174
4175 switch (code)
4176 {
4177 case PC:
4178 case CC0:
4179 case ADDR_VEC:
4180 case ADDR_DIFF_VEC:
4181 return 0;
4182
4183 case CONST_INT:
4184 return INTVAL (x) == INTVAL (y);
4185
4186 case LABEL_REF:
4187 /* We can't assume nonlocal labels have their following insns yet. */
4188 if (LABEL_REF_NONLOCAL_P (x) || LABEL_REF_NONLOCAL_P (y))
4189 return XEXP (x, 0) == XEXP (y, 0);
4190
4191 /* Two label-refs are equivalent if they point at labels
4192 in the same position in the instruction stream. */
4193 return (next_real_insn (XEXP (x, 0))
4194 == next_real_insn (XEXP (y, 0)));
4195
4196 case SYMBOL_REF:
4197 return XSTR (x, 0) == XSTR (y, 0);
4198
4199 default:
4200 break;
4201 }
4202
4203 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
4204
4205 if (GET_MODE (x) != GET_MODE (y))
4206 return 0;
4207
4208 /* For commutative operations, the RTX match if the operand match in any
4209 order. Also handle the simple binary and unary cases without a loop. */
4210 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
4211 return ((rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
4212 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)))
4213 || (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 1))
4214 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 0))));
4215 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
4216 return (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
4217 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)));
4218 else if (GET_RTX_CLASS (code) == '1')
4219 return rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0));
4220
4221 /* Compare the elements. If any pair of corresponding elements
4222 fail to match, return 0 for the whole things. */
4223
4224 fmt = GET_RTX_FORMAT (code);
4225 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4226 {
4227 register int j;
4228 switch (fmt[i])
4229 {
4230 case 'w':
4231 if (XWINT (x, i) != XWINT (y, i))
4232 return 0;
4233 break;
4234
4235 case 'i':
4236 if (XINT (x, i) != XINT (y, i))
4237 return 0;
4238 break;
4239
4240 case 's':
4241 if (strcmp (XSTR (x, i), XSTR (y, i)))
4242 return 0;
4243 break;
4244
4245 case 'e':
4246 if (! rtx_renumbered_equal_p (XEXP (x, i), XEXP (y, i)))
4247 return 0;
4248 break;
4249
4250 case 'u':
4251 if (XEXP (x, i) != XEXP (y, i))
4252 return 0;
4253 /* fall through. */
4254 case '0':
4255 break;
4256
4257 case 'E':
4258 if (XVECLEN (x, i) != XVECLEN (y, i))
4259 return 0;
4260 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4261 if (!rtx_renumbered_equal_p (XVECEXP (x, i, j), XVECEXP (y, i, j)))
4262 return 0;
4263 break;
4264
4265 default:
4266 abort ();
4267 }
4268 }
4269 return 1;
4270 }
4271 \f
4272 /* If X is a hard register or equivalent to one or a subregister of one,
4273 return the hard register number. If X is a pseudo register that was not
4274 assigned a hard register, return the pseudo register number. Otherwise,
4275 return -1. Any rtx is valid for X. */
4276
4277 int
4278 true_regnum (x)
4279 rtx x;
4280 {
4281 if (GET_CODE (x) == REG)
4282 {
4283 if (REGNO (x) >= FIRST_PSEUDO_REGISTER && reg_renumber[REGNO (x)] >= 0)
4284 return reg_renumber[REGNO (x)];
4285 return REGNO (x);
4286 }
4287 if (GET_CODE (x) == SUBREG)
4288 {
4289 int base = true_regnum (SUBREG_REG (x));
4290 if (base >= 0 && base < FIRST_PSEUDO_REGISTER)
4291 return SUBREG_WORD (x) + base;
4292 }
4293 return -1;
4294 }
4295 \f
4296 /* Optimize code of the form:
4297
4298 for (x = a[i]; x; ...)
4299 ...
4300 for (x = a[i]; x; ...)
4301 ...
4302 foo:
4303
4304 Loop optimize will change the above code into
4305
4306 if (x = a[i])
4307 for (;;)
4308 { ...; if (! (x = ...)) break; }
4309 if (x = a[i])
4310 for (;;)
4311 { ...; if (! (x = ...)) break; }
4312 foo:
4313
4314 In general, if the first test fails, the program can branch
4315 directly to `foo' and skip the second try which is doomed to fail.
4316 We run this after loop optimization and before flow analysis. */
4317
4318 /* When comparing the insn patterns, we track the fact that different
4319 pseudo-register numbers may have been used in each computation.
4320 The following array stores an equivalence -- same_regs[I] == J means
4321 that pseudo register I was used in the first set of tests in a context
4322 where J was used in the second set. We also count the number of such
4323 pending equivalences. If nonzero, the expressions really aren't the
4324 same. */
4325
4326 static int *same_regs;
4327
4328 static int num_same_regs;
4329
4330 /* Track any registers modified between the target of the first jump and
4331 the second jump. They never compare equal. */
4332
4333 static char *modified_regs;
4334
4335 /* Record if memory was modified. */
4336
4337 static int modified_mem;
4338
4339 /* Called via note_stores on each insn between the target of the first
4340 branch and the second branch. It marks any changed registers. */
4341
4342 static void
4343 mark_modified_reg (dest, x)
4344 rtx dest;
4345 rtx x;
4346 {
4347 int regno, i;
4348
4349 if (GET_CODE (dest) == SUBREG)
4350 dest = SUBREG_REG (dest);
4351
4352 if (GET_CODE (dest) == MEM)
4353 modified_mem = 1;
4354
4355 if (GET_CODE (dest) != REG)
4356 return;
4357
4358 regno = REGNO (dest);
4359 if (regno >= FIRST_PSEUDO_REGISTER)
4360 modified_regs[regno] = 1;
4361 else
4362 for (i = 0; i < HARD_REGNO_NREGS (regno, GET_MODE (dest)); i++)
4363 modified_regs[regno + i] = 1;
4364 }
4365
4366 /* F is the first insn in the chain of insns. */
4367
4368 void
4369 thread_jumps (f, max_reg, flag_before_loop)
4370 rtx f;
4371 int max_reg;
4372 int flag_before_loop;
4373 {
4374 /* Basic algorithm is to find a conditional branch,
4375 the label it may branch to, and the branch after
4376 that label. If the two branches test the same condition,
4377 walk back from both branch paths until the insn patterns
4378 differ, or code labels are hit. If we make it back to
4379 the target of the first branch, then we know that the first branch
4380 will either always succeed or always fail depending on the relative
4381 senses of the two branches. So adjust the first branch accordingly
4382 in this case. */
4383
4384 rtx label, b1, b2, t1, t2;
4385 enum rtx_code code1, code2;
4386 rtx b1op0, b1op1, b2op0, b2op1;
4387 int changed = 1;
4388 int i;
4389 int *all_reset;
4390
4391 /* Allocate register tables and quick-reset table. */
4392 modified_regs = (char *) alloca (max_reg * sizeof (char));
4393 same_regs = (int *) alloca (max_reg * sizeof (int));
4394 all_reset = (int *) alloca (max_reg * sizeof (int));
4395 for (i = 0; i < max_reg; i++)
4396 all_reset[i] = -1;
4397
4398 while (changed)
4399 {
4400 changed = 0;
4401
4402 for (b1 = f; b1; b1 = NEXT_INSN (b1))
4403 {
4404 /* Get to a candidate branch insn. */
4405 if (GET_CODE (b1) != JUMP_INSN
4406 || ! condjump_p (b1) || simplejump_p (b1)
4407 || JUMP_LABEL (b1) == 0)
4408 continue;
4409
4410 bzero (modified_regs, max_reg * sizeof (char));
4411 modified_mem = 0;
4412
4413 bcopy ((char *) all_reset, (char *) same_regs,
4414 max_reg * sizeof (int));
4415 num_same_regs = 0;
4416
4417 label = JUMP_LABEL (b1);
4418
4419 /* Look for a branch after the target. Record any registers and
4420 memory modified between the target and the branch. Stop when we
4421 get to a label since we can't know what was changed there. */
4422 for (b2 = NEXT_INSN (label); b2; b2 = NEXT_INSN (b2))
4423 {
4424 if (GET_CODE (b2) == CODE_LABEL)
4425 break;
4426
4427 else if (GET_CODE (b2) == JUMP_INSN)
4428 {
4429 /* If this is an unconditional jump and is the only use of
4430 its target label, we can follow it. */
4431 if (simplejump_p (b2)
4432 && JUMP_LABEL (b2) != 0
4433 && LABEL_NUSES (JUMP_LABEL (b2)) == 1)
4434 {
4435 b2 = JUMP_LABEL (b2);
4436 continue;
4437 }
4438 else
4439 break;
4440 }
4441
4442 if (GET_CODE (b2) != CALL_INSN && GET_CODE (b2) != INSN)
4443 continue;
4444
4445 if (GET_CODE (b2) == CALL_INSN)
4446 {
4447 modified_mem = 1;
4448 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4449 if (call_used_regs[i] && ! fixed_regs[i]
4450 && i != STACK_POINTER_REGNUM
4451 && i != FRAME_POINTER_REGNUM
4452 && i != HARD_FRAME_POINTER_REGNUM
4453 && i != ARG_POINTER_REGNUM)
4454 modified_regs[i] = 1;
4455 }
4456
4457 note_stores (PATTERN (b2), mark_modified_reg);
4458 }
4459
4460 /* Check the next candidate branch insn from the label
4461 of the first. */
4462 if (b2 == 0
4463 || GET_CODE (b2) != JUMP_INSN
4464 || b2 == b1
4465 || ! condjump_p (b2)
4466 || simplejump_p (b2))
4467 continue;
4468
4469 /* Get the comparison codes and operands, reversing the
4470 codes if appropriate. If we don't have comparison codes,
4471 we can't do anything. */
4472 b1op0 = XEXP (XEXP (SET_SRC (PATTERN (b1)), 0), 0);
4473 b1op1 = XEXP (XEXP (SET_SRC (PATTERN (b1)), 0), 1);
4474 code1 = GET_CODE (XEXP (SET_SRC (PATTERN (b1)), 0));
4475 if (XEXP (SET_SRC (PATTERN (b1)), 1) == pc_rtx)
4476 code1 = reverse_condition (code1);
4477
4478 b2op0 = XEXP (XEXP (SET_SRC (PATTERN (b2)), 0), 0);
4479 b2op1 = XEXP (XEXP (SET_SRC (PATTERN (b2)), 0), 1);
4480 code2 = GET_CODE (XEXP (SET_SRC (PATTERN (b2)), 0));
4481 if (XEXP (SET_SRC (PATTERN (b2)), 1) == pc_rtx)
4482 code2 = reverse_condition (code2);
4483
4484 /* If they test the same things and knowing that B1 branches
4485 tells us whether or not B2 branches, check if we
4486 can thread the branch. */
4487 if (rtx_equal_for_thread_p (b1op0, b2op0, b2)
4488 && rtx_equal_for_thread_p (b1op1, b2op1, b2)
4489 && (comparison_dominates_p (code1, code2)
4490 || (comparison_dominates_p (code1, reverse_condition (code2))
4491 && can_reverse_comparison_p (XEXP (SET_SRC (PATTERN (b1)),
4492 0),
4493 b1))))
4494 {
4495 t1 = prev_nonnote_insn (b1);
4496 t2 = prev_nonnote_insn (b2);
4497
4498 while (t1 != 0 && t2 != 0)
4499 {
4500 if (t2 == label)
4501 {
4502 /* We have reached the target of the first branch.
4503 If there are no pending register equivalents,
4504 we know that this branch will either always
4505 succeed (if the senses of the two branches are
4506 the same) or always fail (if not). */
4507 rtx new_label;
4508
4509 if (num_same_regs != 0)
4510 break;
4511
4512 if (comparison_dominates_p (code1, code2))
4513 new_label = JUMP_LABEL (b2);
4514 else
4515 new_label = get_label_after (b2);
4516
4517 if (JUMP_LABEL (b1) != new_label)
4518 {
4519 rtx prev = PREV_INSN (new_label);
4520
4521 if (flag_before_loop
4522 && NOTE_LINE_NUMBER (prev) == NOTE_INSN_LOOP_BEG)
4523 {
4524 /* Don't thread to the loop label. If a loop
4525 label is reused, loop optimization will
4526 be disabled for that loop. */
4527 new_label = gen_label_rtx ();
4528 emit_label_after (new_label, PREV_INSN (prev));
4529 }
4530 changed |= redirect_jump (b1, new_label);
4531 }
4532 break;
4533 }
4534
4535 /* If either of these is not a normal insn (it might be
4536 a JUMP_INSN, CALL_INSN, or CODE_LABEL) we fail. (NOTEs
4537 have already been skipped above.) Similarly, fail
4538 if the insns are different. */
4539 if (GET_CODE (t1) != INSN || GET_CODE (t2) != INSN
4540 || recog_memoized (t1) != recog_memoized (t2)
4541 || ! rtx_equal_for_thread_p (PATTERN (t1),
4542 PATTERN (t2), t2))
4543 break;
4544
4545 t1 = prev_nonnote_insn (t1);
4546 t2 = prev_nonnote_insn (t2);
4547 }
4548 }
4549 }
4550 }
4551 }
4552 \f
4553 /* This is like RTX_EQUAL_P except that it knows about our handling of
4554 possibly equivalent registers and knows to consider volatile and
4555 modified objects as not equal.
4556
4557 YINSN is the insn containing Y. */
4558
4559 int
4560 rtx_equal_for_thread_p (x, y, yinsn)
4561 rtx x, y;
4562 rtx yinsn;
4563 {
4564 register int i;
4565 register int j;
4566 register enum rtx_code code;
4567 register char *fmt;
4568
4569 code = GET_CODE (x);
4570 /* Rtx's of different codes cannot be equal. */
4571 if (code != GET_CODE (y))
4572 return 0;
4573
4574 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
4575 (REG:SI x) and (REG:HI x) are NOT equivalent. */
4576
4577 if (GET_MODE (x) != GET_MODE (y))
4578 return 0;
4579
4580 /* For floating-point, consider everything unequal. This is a bit
4581 pessimistic, but this pass would only rarely do anything for FP
4582 anyway. */
4583 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
4584 && FLOAT_MODE_P (GET_MODE (x)) && ! flag_fast_math)
4585 return 0;
4586
4587 /* For commutative operations, the RTX match if the operand match in any
4588 order. Also handle the simple binary and unary cases without a loop. */
4589 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
4590 return ((rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn)
4591 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 1), yinsn))
4592 || (rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 1), yinsn)
4593 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 0), yinsn)));
4594 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
4595 return (rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn)
4596 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 1), yinsn));
4597 else if (GET_RTX_CLASS (code) == '1')
4598 return rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn);
4599
4600 /* Handle special-cases first. */
4601 switch (code)
4602 {
4603 case REG:
4604 if (REGNO (x) == REGNO (y) && ! modified_regs[REGNO (x)])
4605 return 1;
4606
4607 /* If neither is user variable or hard register, check for possible
4608 equivalence. */
4609 if (REG_USERVAR_P (x) || REG_USERVAR_P (y)
4610 || REGNO (x) < FIRST_PSEUDO_REGISTER
4611 || REGNO (y) < FIRST_PSEUDO_REGISTER)
4612 return 0;
4613
4614 if (same_regs[REGNO (x)] == -1)
4615 {
4616 same_regs[REGNO (x)] = REGNO (y);
4617 num_same_regs++;
4618
4619 /* If this is the first time we are seeing a register on the `Y'
4620 side, see if it is the last use. If not, we can't thread the
4621 jump, so mark it as not equivalent. */
4622 if (REGNO_LAST_UID (REGNO (y)) != INSN_UID (yinsn))
4623 return 0;
4624
4625 return 1;
4626 }
4627 else
4628 return (same_regs[REGNO (x)] == REGNO (y));
4629
4630 break;
4631
4632 case MEM:
4633 /* If memory modified or either volatile, not equivalent.
4634 Else, check address. */
4635 if (modified_mem || MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
4636 return 0;
4637
4638 return rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn);
4639
4640 case ASM_INPUT:
4641 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
4642 return 0;
4643
4644 break;
4645
4646 case SET:
4647 /* Cancel a pending `same_regs' if setting equivalenced registers.
4648 Then process source. */
4649 if (GET_CODE (SET_DEST (x)) == REG
4650 && GET_CODE (SET_DEST (y)) == REG)
4651 {
4652 if (same_regs[REGNO (SET_DEST (x))] == REGNO (SET_DEST (y)))
4653 {
4654 same_regs[REGNO (SET_DEST (x))] = -1;
4655 num_same_regs--;
4656 }
4657 else if (REGNO (SET_DEST (x)) != REGNO (SET_DEST (y)))
4658 return 0;
4659 }
4660 else
4661 if (rtx_equal_for_thread_p (SET_DEST (x), SET_DEST (y), yinsn) == 0)
4662 return 0;
4663
4664 return rtx_equal_for_thread_p (SET_SRC (x), SET_SRC (y), yinsn);
4665
4666 case LABEL_REF:
4667 return XEXP (x, 0) == XEXP (y, 0);
4668
4669 case SYMBOL_REF:
4670 return XSTR (x, 0) == XSTR (y, 0);
4671
4672 default:
4673 break;
4674 }
4675
4676 if (x == y)
4677 return 1;
4678
4679 fmt = GET_RTX_FORMAT (code);
4680 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4681 {
4682 switch (fmt[i])
4683 {
4684 case 'w':
4685 if (XWINT (x, i) != XWINT (y, i))
4686 return 0;
4687 break;
4688
4689 case 'n':
4690 case 'i':
4691 if (XINT (x, i) != XINT (y, i))
4692 return 0;
4693 break;
4694
4695 case 'V':
4696 case 'E':
4697 /* Two vectors must have the same length. */
4698 if (XVECLEN (x, i) != XVECLEN (y, i))
4699 return 0;
4700
4701 /* And the corresponding elements must match. */
4702 for (j = 0; j < XVECLEN (x, i); j++)
4703 if (rtx_equal_for_thread_p (XVECEXP (x, i, j),
4704 XVECEXP (y, i, j), yinsn) == 0)
4705 return 0;
4706 break;
4707
4708 case 'e':
4709 if (rtx_equal_for_thread_p (XEXP (x, i), XEXP (y, i), yinsn) == 0)
4710 return 0;
4711 break;
4712
4713 case 'S':
4714 case 's':
4715 if (strcmp (XSTR (x, i), XSTR (y, i)))
4716 return 0;
4717 break;
4718
4719 case 'u':
4720 /* These are just backpointers, so they don't matter. */
4721 break;
4722
4723 case '0':
4724 break;
4725
4726 /* It is believed that rtx's at this level will never
4727 contain anything but integers and other rtx's,
4728 except for within LABEL_REFs and SYMBOL_REFs. */
4729 default:
4730 abort ();
4731 }
4732 }
4733 return 1;
4734 }
4735 \f
4736
4737 /* Return the insn that NEW can be safely inserted in front of starting at
4738 the jump insn INSN. Return 0 if it is not safe to do this jump
4739 optimization. Note that NEW must contain a single set. */
4740
4741 static rtx
4742 find_insert_position (insn, new)
4743 rtx insn;
4744 rtx new;
4745 {
4746 int i;
4747 rtx prev;
4748
4749 /* If NEW does not clobber, it is safe to insert NEW before INSN. */
4750 if (GET_CODE (PATTERN (new)) != PARALLEL)
4751 return insn;
4752
4753 for (i = XVECLEN (PATTERN (new), 0) - 1; i >= 0; i--)
4754 if (GET_CODE (XVECEXP (PATTERN (new), 0, i)) == CLOBBER
4755 && reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4756 insn))
4757 break;
4758
4759 if (i < 0)
4760 return insn;
4761
4762 /* There is a good chance that the previous insn PREV sets the thing
4763 being clobbered (often the CC in a hard reg). If PREV does not
4764 use what NEW sets, we can insert NEW before PREV. */
4765
4766 prev = prev_active_insn (insn);
4767 for (i = XVECLEN (PATTERN (new), 0) - 1; i >= 0; i--)
4768 if (GET_CODE (XVECEXP (PATTERN (new), 0, i)) == CLOBBER
4769 && reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4770 insn)
4771 && ! modified_in_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4772 prev))
4773 return 0;
4774
4775 return reg_mentioned_p (SET_DEST (single_set (new)), prev) ? 0 : prev;
4776 }
GNU Compiler Collection
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