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1 /* Optimize jump instructions, for GNU compiler.
2 Copyright (C) 1987, 88, 89, 91-97, 1998 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21
22 /* This is the jump-optimization pass of the compiler.
23 It is run two or three times: once before cse, sometimes once after cse,
24 and once after reload (before final).
25
26 jump_optimize deletes unreachable code and labels that are not used.
27 It also deletes jumps that jump to the following insn,
28 and simplifies jumps around unconditional jumps and jumps
29 to unconditional jumps.
30
31 Each CODE_LABEL has a count of the times it is used
32 stored in the LABEL_NUSES internal field, and each JUMP_INSN
33 has one label that it refers to stored in the
34 JUMP_LABEL internal field. With this we can detect labels that
35 become unused because of the deletion of all the jumps that
36 formerly used them. The JUMP_LABEL info is sometimes looked
37 at by later passes.
38
39 Optionally, cross-jumping can be done. Currently it is done
40 only the last time (when after reload and before final).
41 In fact, the code for cross-jumping now assumes that register
42 allocation has been done, since it uses `rtx_renumbered_equal_p'.
43
44 Jump optimization is done after cse when cse's constant-propagation
45 causes jumps to become unconditional or to be deleted.
46
47 Unreachable loops are not detected here, because the labels
48 have references and the insns appear reachable from the labels.
49 find_basic_blocks in flow.c finds and deletes such loops.
50
51 The subroutines delete_insn, redirect_jump, and invert_jump are used
52 from other passes as well. */
53
54 #include "config.h"
55 #include <stdio.h>
56 #include "rtl.h"
57 #include "flags.h"
58 #include "hard-reg-set.h"
59 #include "regs.h"
60 #include "insn-config.h"
61 #include "insn-flags.h"
62 #include "recog.h"
63 #include "expr.h"
64 #include "real.h"
65 #include "except.h"
66
67 /* ??? Eventually must record somehow the labels used by jumps
68 from nested functions. */
69 /* Pre-record the next or previous real insn for each label?
70 No, this pass is very fast anyway. */
71 /* Condense consecutive labels?
72 This would make life analysis faster, maybe. */
73 /* Optimize jump y; x: ... y: jumpif... x?
74 Don't know if it is worth bothering with. */
75 /* Optimize two cases of conditional jump to conditional jump?
76 This can never delete any instruction or make anything dead,
77 or even change what is live at any point.
78 So perhaps let combiner do it. */
79
80 /* Vector indexed by uid.
81 For each CODE_LABEL, index by its uid to get first unconditional jump
82 that jumps to the label.
83 For each JUMP_INSN, index by its uid to get the next unconditional jump
84 that jumps to the same label.
85 Element 0 is the start of a chain of all return insns.
86 (It is safe to use element 0 because insn uid 0 is not used. */
87
88 static rtx *jump_chain;
89
90 /* List of labels referred to from initializers.
91 These can never be deleted. */
92 rtx forced_labels;
93
94 /* Maximum index in jump_chain. */
95
96 static int max_jump_chain;
97
98 /* Set nonzero by jump_optimize if control can fall through
99 to the end of the function. */
100 int can_reach_end;
101
102 /* Indicates whether death notes are significant in cross jump analysis.
103 Normally they are not significant, because of A and B jump to C,
104 and R dies in A, it must die in B. But this might not be true after
105 stack register conversion, and we must compare death notes in that
106 case. */
107
108 static int cross_jump_death_matters = 0;
109
110 static int duplicate_loop_exit_test PROTO((rtx));
111 static void find_cross_jump PROTO((rtx, rtx, int, rtx *, rtx *));
112 static void do_cross_jump PROTO((rtx, rtx, rtx));
113 static int jump_back_p PROTO((rtx, rtx));
114 static int tension_vector_labels PROTO((rtx, int));
115 static void mark_jump_label PROTO((rtx, rtx, int));
116 static void delete_computation PROTO((rtx));
117 static void delete_from_jump_chain PROTO((rtx));
118 static int delete_labelref_insn PROTO((rtx, rtx, int));
119 static void redirect_tablejump PROTO((rtx, rtx));
120 static rtx find_insert_position PROTO((rtx, rtx));
121 \f
122 /* Delete no-op jumps and optimize jumps to jumps
123 and jumps around jumps.
124 Delete unused labels and unreachable code.
125
126 If CROSS_JUMP is 1, detect matching code
127 before a jump and its destination and unify them.
128 If CROSS_JUMP is 2, do cross-jumping, but pay attention to death notes.
129
130 If NOOP_MOVES is nonzero, delete no-op move insns.
131
132 If AFTER_REGSCAN is nonzero, then this jump pass is being run immediately
133 after regscan, and it is safe to use regno_first_uid and regno_last_uid.
134
135 If `optimize' is zero, don't change any code,
136 just determine whether control drops off the end of the function.
137 This case occurs when we have -W and not -O.
138 It works because `delete_insn' checks the value of `optimize'
139 and refrains from actually deleting when that is 0. */
140
141 void
142 jump_optimize (f, cross_jump, noop_moves, after_regscan)
143 rtx f;
144 int cross_jump;
145 int noop_moves;
146 int after_regscan;
147 {
148 register rtx insn, next, note;
149 int changed;
150 int first = 1;
151 int max_uid = 0;
152 rtx last_insn;
153
154 cross_jump_death_matters = (cross_jump == 2);
155
156 /* Initialize LABEL_NUSES and JUMP_LABEL fields. Delete any REG_LABEL
157 notes whose labels don't occur in the insn any more. */
158
159 for (insn = f; insn; insn = NEXT_INSN (insn))
160 {
161 if (GET_CODE (insn) == CODE_LABEL)
162 LABEL_NUSES (insn) = (LABEL_PRESERVE_P (insn) != 0);
163 else if (GET_CODE (insn) == JUMP_INSN)
164 JUMP_LABEL (insn) = 0;
165 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
166 for (note = REG_NOTES (insn); note; note = next)
167 {
168 next = XEXP (note, 1);
169 if (REG_NOTE_KIND (note) == REG_LABEL
170 && ! reg_mentioned_p (XEXP (note, 0), PATTERN (insn)))
171 remove_note (insn, note);
172 }
173
174 if (INSN_UID (insn) > max_uid)
175 max_uid = INSN_UID (insn);
176 }
177
178 max_uid++;
179
180 /* Delete insns following barriers, up to next label. */
181
182 for (insn = f; insn;)
183 {
184 if (GET_CODE (insn) == BARRIER)
185 {
186 insn = NEXT_INSN (insn);
187 while (insn != 0 && GET_CODE (insn) != CODE_LABEL)
188 {
189 if (GET_CODE (insn) == NOTE
190 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)
191 insn = NEXT_INSN (insn);
192 else
193 insn = delete_insn (insn);
194 }
195 /* INSN is now the code_label. */
196 }
197 else
198 insn = NEXT_INSN (insn);
199 }
200
201 /* Leave some extra room for labels and duplicate exit test insns
202 we make. */
203 max_jump_chain = max_uid * 14 / 10;
204 jump_chain = (rtx *) alloca (max_jump_chain * sizeof (rtx));
205 bzero ((char *) jump_chain, max_jump_chain * sizeof (rtx));
206
207 /* Mark the label each jump jumps to.
208 Combine consecutive labels, and count uses of labels.
209
210 For each label, make a chain (using `jump_chain')
211 of all the *unconditional* jumps that jump to it;
212 also make a chain of all returns. */
213
214 for (insn = f; insn; insn = NEXT_INSN (insn))
215 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
216 && ! INSN_DELETED_P (insn))
217 {
218 mark_jump_label (PATTERN (insn), insn, cross_jump);
219 if (GET_CODE (insn) == JUMP_INSN)
220 {
221 if (JUMP_LABEL (insn) != 0 && simplejump_p (insn))
222 {
223 jump_chain[INSN_UID (insn)]
224 = jump_chain[INSN_UID (JUMP_LABEL (insn))];
225 jump_chain[INSN_UID (JUMP_LABEL (insn))] = insn;
226 }
227 if (GET_CODE (PATTERN (insn)) == RETURN)
228 {
229 jump_chain[INSN_UID (insn)] = jump_chain[0];
230 jump_chain[0] = insn;
231 }
232 }
233 }
234
235 /* Keep track of labels used from static data;
236 they cannot ever be deleted. */
237
238 for (insn = forced_labels; insn; insn = XEXP (insn, 1))
239 LABEL_NUSES (XEXP (insn, 0))++;
240
241 check_exception_handler_labels ();
242
243 /* Keep track of labels used for marking handlers for exception
244 regions; they cannot usually be deleted. */
245
246 for (insn = exception_handler_labels; insn; insn = XEXP (insn, 1))
247 LABEL_NUSES (XEXP (insn, 0))++;
248
249 exception_optimize ();
250
251 /* Delete all labels already not referenced.
252 Also find the last insn. */
253
254 last_insn = 0;
255 for (insn = f; insn; )
256 {
257 if (GET_CODE (insn) == CODE_LABEL && LABEL_NUSES (insn) == 0)
258 insn = delete_insn (insn);
259 else
260 {
261 last_insn = insn;
262 insn = NEXT_INSN (insn);
263 }
264 }
265
266 if (!optimize)
267 {
268 /* See if there is still a NOTE_INSN_FUNCTION_END in this function.
269 If so record that this function can drop off the end. */
270
271 insn = last_insn;
272 {
273 int n_labels = 1;
274 while (insn
275 /* One label can follow the end-note: the return label. */
276 && ((GET_CODE (insn) == CODE_LABEL && n_labels-- > 0)
277 /* Ordinary insns can follow it if returning a structure. */
278 || GET_CODE (insn) == INSN
279 /* If machine uses explicit RETURN insns, no epilogue,
280 then one of them follows the note. */
281 || (GET_CODE (insn) == JUMP_INSN
282 && GET_CODE (PATTERN (insn)) == RETURN)
283 /* A barrier can follow the return insn. */
284 || GET_CODE (insn) == BARRIER
285 /* Other kinds of notes can follow also. */
286 || (GET_CODE (insn) == NOTE
287 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)))
288 insn = PREV_INSN (insn);
289 }
290
291 /* Report if control can fall through at the end of the function. */
292 if (insn && GET_CODE (insn) == NOTE
293 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_END
294 && ! INSN_DELETED_P (insn))
295 can_reach_end = 1;
296
297 /* Zero the "deleted" flag of all the "deleted" insns. */
298 for (insn = f; insn; insn = NEXT_INSN (insn))
299 INSN_DELETED_P (insn) = 0;
300 return;
301 }
302
303 #ifdef HAVE_return
304 if (HAVE_return)
305 {
306 /* If we fall through to the epilogue, see if we can insert a RETURN insn
307 in front of it. If the machine allows it at this point (we might be
308 after reload for a leaf routine), it will improve optimization for it
309 to be there. */
310 insn = get_last_insn ();
311 while (insn && GET_CODE (insn) == NOTE)
312 insn = PREV_INSN (insn);
313
314 if (insn && GET_CODE (insn) != BARRIER)
315 {
316 emit_jump_insn (gen_return ());
317 emit_barrier ();
318 }
319 }
320 #endif
321
322 if (noop_moves)
323 for (insn = f; insn; )
324 {
325 next = NEXT_INSN (insn);
326
327 if (GET_CODE (insn) == INSN)
328 {
329 register rtx body = PATTERN (insn);
330
331 /* Combine stack_adjusts with following push_insns. */
332 #ifdef PUSH_ROUNDING
333 if (GET_CODE (body) == SET
334 && SET_DEST (body) == stack_pointer_rtx
335 && GET_CODE (SET_SRC (body)) == PLUS
336 && XEXP (SET_SRC (body), 0) == stack_pointer_rtx
337 && GET_CODE (XEXP (SET_SRC (body), 1)) == CONST_INT
338 && INTVAL (XEXP (SET_SRC (body), 1)) > 0)
339 {
340 rtx p;
341 rtx stack_adjust_insn = insn;
342 int stack_adjust_amount = INTVAL (XEXP (SET_SRC (body), 1));
343 int total_pushed = 0;
344 int pushes = 0;
345
346 /* Find all successive push insns. */
347 p = insn;
348 /* Don't convert more than three pushes;
349 that starts adding too many displaced addresses
350 and the whole thing starts becoming a losing
351 proposition. */
352 while (pushes < 3)
353 {
354 rtx pbody, dest;
355 p = next_nonnote_insn (p);
356 if (p == 0 || GET_CODE (p) != INSN)
357 break;
358 pbody = PATTERN (p);
359 if (GET_CODE (pbody) != SET)
360 break;
361 dest = SET_DEST (pbody);
362 /* Allow a no-op move between the adjust and the push. */
363 if (GET_CODE (dest) == REG
364 && GET_CODE (SET_SRC (pbody)) == REG
365 && REGNO (dest) == REGNO (SET_SRC (pbody)))
366 continue;
367 if (! (GET_CODE (dest) == MEM
368 && GET_CODE (XEXP (dest, 0)) == POST_INC
369 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx))
370 break;
371 pushes++;
372 if (total_pushed + GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)))
373 > stack_adjust_amount)
374 break;
375 total_pushed += GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)));
376 }
377
378 /* Discard the amount pushed from the stack adjust;
379 maybe eliminate it entirely. */
380 if (total_pushed >= stack_adjust_amount)
381 {
382 delete_computation (stack_adjust_insn);
383 total_pushed = stack_adjust_amount;
384 }
385 else
386 XEXP (SET_SRC (PATTERN (stack_adjust_insn)), 1)
387 = GEN_INT (stack_adjust_amount - total_pushed);
388
389 /* Change the appropriate push insns to ordinary stores. */
390 p = insn;
391 while (total_pushed > 0)
392 {
393 rtx pbody, dest;
394 p = next_nonnote_insn (p);
395 if (GET_CODE (p) != INSN)
396 break;
397 pbody = PATTERN (p);
398 if (GET_CODE (pbody) == SET)
399 break;
400 dest = SET_DEST (pbody);
401 if (! (GET_CODE (dest) == MEM
402 && GET_CODE (XEXP (dest, 0)) == POST_INC
403 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx))
404 break;
405 total_pushed -= GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)));
406 /* If this push doesn't fully fit in the space
407 of the stack adjust that we deleted,
408 make another stack adjust here for what we
409 didn't use up. There should be peepholes
410 to recognize the resulting sequence of insns. */
411 if (total_pushed < 0)
412 {
413 emit_insn_before (gen_add2_insn (stack_pointer_rtx,
414 GEN_INT (- total_pushed)),
415 p);
416 break;
417 }
418 XEXP (dest, 0)
419 = plus_constant (stack_pointer_rtx, total_pushed);
420 }
421 }
422 #endif
423
424 /* Detect and delete no-op move instructions
425 resulting from not allocating a parameter in a register. */
426
427 if (GET_CODE (body) == SET
428 && (SET_DEST (body) == SET_SRC (body)
429 || (GET_CODE (SET_DEST (body)) == MEM
430 && GET_CODE (SET_SRC (body)) == MEM
431 && rtx_equal_p (SET_SRC (body), SET_DEST (body))))
432 && ! (GET_CODE (SET_DEST (body)) == MEM
433 && MEM_VOLATILE_P (SET_DEST (body)))
434 && ! (GET_CODE (SET_SRC (body)) == MEM
435 && MEM_VOLATILE_P (SET_SRC (body))))
436 delete_computation (insn);
437
438 /* Detect and ignore no-op move instructions
439 resulting from smart or fortuitous register allocation. */
440
441 else if (GET_CODE (body) == SET)
442 {
443 int sreg = true_regnum (SET_SRC (body));
444 int dreg = true_regnum (SET_DEST (body));
445
446 if (sreg == dreg && sreg >= 0)
447 delete_insn (insn);
448 else if (sreg >= 0 && dreg >= 0)
449 {
450 rtx trial;
451 rtx tem = find_equiv_reg (NULL_RTX, insn, 0,
452 sreg, NULL_PTR, dreg,
453 GET_MODE (SET_SRC (body)));
454
455 if (tem != 0
456 && GET_MODE (tem) == GET_MODE (SET_DEST (body)))
457 {
458 /* DREG may have been the target of a REG_DEAD note in
459 the insn which makes INSN redundant. If so, reorg
460 would still think it is dead. So search for such a
461 note and delete it if we find it. */
462 if (! find_regno_note (insn, REG_UNUSED, dreg))
463 for (trial = prev_nonnote_insn (insn);
464 trial && GET_CODE (trial) != CODE_LABEL;
465 trial = prev_nonnote_insn (trial))
466 if (find_regno_note (trial, REG_DEAD, dreg))
467 {
468 remove_death (dreg, trial);
469 break;
470 }
471 #ifdef PRESERVE_DEATH_INFO_REGNO_P
472 /* Deleting insn could lose a death-note for SREG
473 so don't do it if final needs accurate
474 death-notes. */
475 if (PRESERVE_DEATH_INFO_REGNO_P (sreg)
476 && (trial = find_regno_note (insn, REG_DEAD, sreg)))
477 {
478 /* Change this into a USE so that we won't emit
479 code for it, but still can keep the note. */
480 PATTERN (insn)
481 = gen_rtx_USE (VOIDmode, XEXP (trial, 0));
482 INSN_CODE (insn) = -1;
483 /* Remove all reg notes but the REG_DEAD one. */
484 REG_NOTES (insn) = trial;
485 XEXP (trial, 1) = NULL_RTX;
486 }
487 else
488 #endif
489 delete_insn (insn);
490 }
491 }
492 else if (dreg >= 0 && CONSTANT_P (SET_SRC (body))
493 && find_equiv_reg (SET_SRC (body), insn, 0, dreg,
494 NULL_PTR, 0,
495 GET_MODE (SET_DEST (body))))
496 {
497 /* This handles the case where we have two consecutive
498 assignments of the same constant to pseudos that didn't
499 get a hard reg. Each SET from the constant will be
500 converted into a SET of the spill register and an
501 output reload will be made following it. This produces
502 two loads of the same constant into the same spill
503 register. */
504
505 rtx in_insn = insn;
506
507 /* Look back for a death note for the first reg.
508 If there is one, it is no longer accurate. */
509 while (in_insn && GET_CODE (in_insn) != CODE_LABEL)
510 {
511 if ((GET_CODE (in_insn) == INSN
512 || GET_CODE (in_insn) == JUMP_INSN)
513 && find_regno_note (in_insn, REG_DEAD, dreg))
514 {
515 remove_death (dreg, in_insn);
516 break;
517 }
518 in_insn = PREV_INSN (in_insn);
519 }
520
521 /* Delete the second load of the value. */
522 delete_insn (insn);
523 }
524 }
525 else if (GET_CODE (body) == PARALLEL)
526 {
527 /* If each part is a set between two identical registers or
528 a USE or CLOBBER, delete the insn. */
529 int i, sreg, dreg;
530 rtx tem;
531
532 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
533 {
534 tem = XVECEXP (body, 0, i);
535 if (GET_CODE (tem) == USE || GET_CODE (tem) == CLOBBER)
536 continue;
537
538 if (GET_CODE (tem) != SET
539 || (sreg = true_regnum (SET_SRC (tem))) < 0
540 || (dreg = true_regnum (SET_DEST (tem))) < 0
541 || dreg != sreg)
542 break;
543 }
544
545 if (i < 0)
546 delete_insn (insn);
547 }
548 /* Also delete insns to store bit fields if they are no-ops. */
549 /* Not worth the hair to detect this in the big-endian case. */
550 else if (! BYTES_BIG_ENDIAN
551 && GET_CODE (body) == SET
552 && GET_CODE (SET_DEST (body)) == ZERO_EXTRACT
553 && XEXP (SET_DEST (body), 2) == const0_rtx
554 && XEXP (SET_DEST (body), 0) == SET_SRC (body)
555 && ! (GET_CODE (SET_SRC (body)) == MEM
556 && MEM_VOLATILE_P (SET_SRC (body))))
557 delete_insn (insn);
558 }
559 insn = next;
560 }
561
562 /* If we haven't yet gotten to reload and we have just run regscan,
563 delete any insn that sets a register that isn't used elsewhere.
564 This helps some of the optimizations below by having less insns
565 being jumped around. */
566
567 if (! reload_completed && after_regscan)
568 for (insn = f; insn; insn = next)
569 {
570 rtx set = single_set (insn);
571
572 next = NEXT_INSN (insn);
573
574 if (set && GET_CODE (SET_DEST (set)) == REG
575 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
576 && REGNO_FIRST_UID (REGNO (SET_DEST (set))) == INSN_UID (insn)
577 /* We use regno_last_note_uid so as not to delete the setting
578 of a reg that's used in notes. A subsequent optimization
579 might arrange to use that reg for real. */
580 && REGNO_LAST_NOTE_UID (REGNO (SET_DEST (set))) == INSN_UID (insn)
581 && ! side_effects_p (SET_SRC (set))
582 && ! find_reg_note (insn, REG_RETVAL, 0))
583 delete_insn (insn);
584 }
585
586 /* Now iterate optimizing jumps until nothing changes over one pass. */
587 changed = 1;
588 while (changed)
589 {
590 changed = 0;
591
592 for (insn = f; insn; insn = next)
593 {
594 rtx reallabelprev;
595 rtx temp, temp1, temp2, temp3, temp4, temp5, temp6;
596 rtx nlabel;
597 int this_is_simplejump, this_is_condjump, reversep;
598 int this_is_condjump_in_parallel;
599 #if 0
600 /* If NOT the first iteration, if this is the last jump pass
601 (just before final), do the special peephole optimizations.
602 Avoiding the first iteration gives ordinary jump opts
603 a chance to work before peephole opts. */
604
605 if (reload_completed && !first && !flag_no_peephole)
606 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
607 peephole (insn);
608 #endif
609
610 /* That could have deleted some insns after INSN, so check now
611 what the following insn is. */
612
613 next = NEXT_INSN (insn);
614
615 /* See if this is a NOTE_INSN_LOOP_BEG followed by an unconditional
616 jump. Try to optimize by duplicating the loop exit test if so.
617 This is only safe immediately after regscan, because it uses
618 the values of regno_first_uid and regno_last_uid. */
619 if (after_regscan && GET_CODE (insn) == NOTE
620 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
621 && (temp1 = next_nonnote_insn (insn)) != 0
622 && simplejump_p (temp1))
623 {
624 temp = PREV_INSN (insn);
625 if (duplicate_loop_exit_test (insn))
626 {
627 changed = 1;
628 next = NEXT_INSN (temp);
629 continue;
630 }
631 }
632
633 if (GET_CODE (insn) != JUMP_INSN)
634 continue;
635
636 this_is_simplejump = simplejump_p (insn);
637 this_is_condjump = condjump_p (insn);
638 this_is_condjump_in_parallel = condjump_in_parallel_p (insn);
639
640 /* Tension the labels in dispatch tables. */
641
642 if (GET_CODE (PATTERN (insn)) == ADDR_VEC)
643 changed |= tension_vector_labels (PATTERN (insn), 0);
644 if (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
645 changed |= tension_vector_labels (PATTERN (insn), 1);
646
647 /* If a dispatch table always goes to the same place,
648 get rid of it and replace the insn that uses it. */
649
650 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
651 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
652 {
653 int i;
654 rtx pat = PATTERN (insn);
655 int diff_vec_p = GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC;
656 int len = XVECLEN (pat, diff_vec_p);
657 rtx dispatch = prev_real_insn (insn);
658
659 for (i = 0; i < len; i++)
660 if (XEXP (XVECEXP (pat, diff_vec_p, i), 0)
661 != XEXP (XVECEXP (pat, diff_vec_p, 0), 0))
662 break;
663 if (i == len
664 && dispatch != 0
665 && GET_CODE (dispatch) == JUMP_INSN
666 && JUMP_LABEL (dispatch) != 0
667 /* Don't mess with a casesi insn. */
668 && !(GET_CODE (PATTERN (dispatch)) == SET
669 && (GET_CODE (SET_SRC (PATTERN (dispatch)))
670 == IF_THEN_ELSE))
671 && next_real_insn (JUMP_LABEL (dispatch)) == insn)
672 {
673 redirect_tablejump (dispatch,
674 XEXP (XVECEXP (pat, diff_vec_p, 0), 0));
675 changed = 1;
676 }
677 }
678
679 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
680
681 /* If a jump references the end of the function, try to turn
682 it into a RETURN insn, possibly a conditional one. */
683 if (JUMP_LABEL (insn)
684 && (next_active_insn (JUMP_LABEL (insn)) == 0
685 || GET_CODE (PATTERN (next_active_insn (JUMP_LABEL (insn))))
686 == RETURN))
687 changed |= redirect_jump (insn, NULL_RTX);
688
689 /* Detect jump to following insn. */
690 if (reallabelprev == insn && condjump_p (insn))
691 {
692 next = next_real_insn (JUMP_LABEL (insn));
693 delete_jump (insn);
694 changed = 1;
695 continue;
696 }
697
698 /* If we have an unconditional jump preceded by a USE, try to put
699 the USE before the target and jump there. This simplifies many
700 of the optimizations below since we don't have to worry about
701 dealing with these USE insns. We only do this if the label
702 being branch to already has the identical USE or if code
703 never falls through to that label. */
704
705 if (this_is_simplejump
706 && (temp = prev_nonnote_insn (insn)) != 0
707 && GET_CODE (temp) == INSN && GET_CODE (PATTERN (temp)) == USE
708 && (temp1 = prev_nonnote_insn (JUMP_LABEL (insn))) != 0
709 && (GET_CODE (temp1) == BARRIER
710 || (GET_CODE (temp1) == INSN
711 && rtx_equal_p (PATTERN (temp), PATTERN (temp1))))
712 /* Don't do this optimization if we have a loop containing only
713 the USE instruction, and the loop start label has a usage
714 count of 1. This is because we will redo this optimization
715 everytime through the outer loop, and jump opt will never
716 exit. */
717 && ! ((temp2 = prev_nonnote_insn (temp)) != 0
718 && temp2 == JUMP_LABEL (insn)
719 && LABEL_NUSES (temp2) == 1))
720 {
721 if (GET_CODE (temp1) == BARRIER)
722 {
723 emit_insn_after (PATTERN (temp), temp1);
724 temp1 = NEXT_INSN (temp1);
725 }
726
727 delete_insn (temp);
728 redirect_jump (insn, get_label_before (temp1));
729 reallabelprev = prev_real_insn (temp1);
730 changed = 1;
731 }
732
733 /* Simplify if (...) x = a; else x = b; by converting it
734 to x = b; if (...) x = a;
735 if B is sufficiently simple, the test doesn't involve X,
736 and nothing in the test modifies B or X.
737
738 If we have small register classes, we also can't do this if X
739 is a hard register.
740
741 If the "x = b;" insn has any REG_NOTES, we don't do this because
742 of the possibility that we are running after CSE and there is a
743 REG_EQUAL note that is only valid if the branch has already been
744 taken. If we move the insn with the REG_EQUAL note, we may
745 fold the comparison to always be false in a later CSE pass.
746 (We could also delete the REG_NOTES when moving the insn, but it
747 seems simpler to not move it.) An exception is that we can move
748 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
749 value is the same as "b".
750
751 INSN is the branch over the `else' part.
752
753 We set:
754
755 TEMP to the jump insn preceding "x = a;"
756 TEMP1 to X
757 TEMP2 to the insn that sets "x = b;"
758 TEMP3 to the insn that sets "x = a;"
759 TEMP4 to the set of "x = b"; */
760
761 if (this_is_simplejump
762 && (temp3 = prev_active_insn (insn)) != 0
763 && GET_CODE (temp3) == INSN
764 && (temp4 = single_set (temp3)) != 0
765 && GET_CODE (temp1 = SET_DEST (temp4)) == REG
766 && (! SMALL_REGISTER_CLASSES
767 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
768 && (temp2 = next_active_insn (insn)) != 0
769 && GET_CODE (temp2) == INSN
770 && (temp4 = single_set (temp2)) != 0
771 && rtx_equal_p (SET_DEST (temp4), temp1)
772 && (GET_CODE (SET_SRC (temp4)) == REG
773 || GET_CODE (SET_SRC (temp4)) == SUBREG
774 || (GET_CODE (SET_SRC (temp4)) == MEM
775 && RTX_UNCHANGING_P (SET_SRC (temp4)))
776 || CONSTANT_P (SET_SRC (temp4)))
777 && (REG_NOTES (temp2) == 0
778 || ((REG_NOTE_KIND (REG_NOTES (temp2)) == REG_EQUAL
779 || REG_NOTE_KIND (REG_NOTES (temp2)) == REG_EQUIV)
780 && XEXP (REG_NOTES (temp2), 1) == 0
781 && rtx_equal_p (XEXP (REG_NOTES (temp2), 0),
782 SET_SRC (temp4))))
783 && (temp = prev_active_insn (temp3)) != 0
784 && condjump_p (temp) && ! simplejump_p (temp)
785 /* TEMP must skip over the "x = a;" insn */
786 && prev_real_insn (JUMP_LABEL (temp)) == insn
787 && no_labels_between_p (insn, JUMP_LABEL (temp))
788 /* There must be no other entries to the "x = b;" insn. */
789 && no_labels_between_p (JUMP_LABEL (temp), temp2)
790 /* INSN must either branch to the insn after TEMP2 or the insn
791 after TEMP2 must branch to the same place as INSN. */
792 && (reallabelprev == temp2
793 || ((temp5 = next_active_insn (temp2)) != 0
794 && simplejump_p (temp5)
795 && JUMP_LABEL (temp5) == JUMP_LABEL (insn))))
796 {
797 /* The test expression, X, may be a complicated test with
798 multiple branches. See if we can find all the uses of
799 the label that TEMP branches to without hitting a CALL_INSN
800 or a jump to somewhere else. */
801 rtx target = JUMP_LABEL (temp);
802 int nuses = LABEL_NUSES (target);
803 rtx p, q;
804
805 /* Set P to the first jump insn that goes around "x = a;". */
806 for (p = temp; nuses && p; p = prev_nonnote_insn (p))
807 {
808 if (GET_CODE (p) == JUMP_INSN)
809 {
810 if (condjump_p (p) && ! simplejump_p (p)
811 && JUMP_LABEL (p) == target)
812 {
813 nuses--;
814 if (nuses == 0)
815 break;
816 }
817 else
818 break;
819 }
820 else if (GET_CODE (p) == CALL_INSN)
821 break;
822 }
823
824 #ifdef HAVE_cc0
825 /* We cannot insert anything between a set of cc and its use
826 so if P uses cc0, we must back up to the previous insn. */
827 q = prev_nonnote_insn (p);
828 if (q && GET_RTX_CLASS (GET_CODE (q)) == 'i'
829 && sets_cc0_p (PATTERN (q)))
830 p = q;
831 #endif
832
833 if (p)
834 p = PREV_INSN (p);
835
836 /* If we found all the uses and there was no data conflict, we
837 can move the assignment unless we can branch into the middle
838 from somewhere. */
839 if (nuses == 0 && p
840 && no_labels_between_p (p, insn)
841 && ! reg_referenced_between_p (temp1, p, NEXT_INSN (temp3))
842 && ! reg_set_between_p (temp1, p, temp3)
843 && (GET_CODE (SET_SRC (temp4)) == CONST_INT
844 || ! reg_set_between_p (SET_SRC (temp4), p, temp2)))
845 {
846 emit_insn_after_with_line_notes (PATTERN (temp2), p, temp2);
847 delete_insn (temp2);
848
849 /* Set NEXT to an insn that we know won't go away. */
850 next = next_active_insn (insn);
851
852 /* Delete the jump around the set. Note that we must do
853 this before we redirect the test jumps so that it won't
854 delete the code immediately following the assignment
855 we moved (which might be a jump). */
856
857 delete_insn (insn);
858
859 /* We either have two consecutive labels or a jump to
860 a jump, so adjust all the JUMP_INSNs to branch to where
861 INSN branches to. */
862 for (p = NEXT_INSN (p); p != next; p = NEXT_INSN (p))
863 if (GET_CODE (p) == JUMP_INSN)
864 redirect_jump (p, target);
865
866 changed = 1;
867 continue;
868 }
869 }
870
871 /* Simplify if (...) { x = a; goto l; } x = b; by converting it
872 to x = a; if (...) goto l; x = b;
873 if A is sufficiently simple, the test doesn't involve X,
874 and nothing in the test modifies A or X.
875
876 If we have small register classes, we also can't do this if X
877 is a hard register.
878
879 If the "x = a;" insn has any REG_NOTES, we don't do this because
880 of the possibility that we are running after CSE and there is a
881 REG_EQUAL note that is only valid if the branch has already been
882 taken. If we move the insn with the REG_EQUAL note, we may
883 fold the comparison to always be false in a later CSE pass.
884 (We could also delete the REG_NOTES when moving the insn, but it
885 seems simpler to not move it.) An exception is that we can move
886 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
887 value is the same as "a".
888
889 INSN is the goto.
890
891 We set:
892
893 TEMP to the jump insn preceding "x = a;"
894 TEMP1 to X
895 TEMP2 to the insn that sets "x = b;"
896 TEMP3 to the insn that sets "x = a;"
897 TEMP4 to the set of "x = a"; */
898
899 if (this_is_simplejump
900 && (temp2 = next_active_insn (insn)) != 0
901 && GET_CODE (temp2) == INSN
902 && (temp4 = single_set (temp2)) != 0
903 && GET_CODE (temp1 = SET_DEST (temp4)) == REG
904 && (! SMALL_REGISTER_CLASSES
905 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
906 && (temp3 = prev_active_insn (insn)) != 0
907 && GET_CODE (temp3) == INSN
908 && (temp4 = single_set (temp3)) != 0
909 && rtx_equal_p (SET_DEST (temp4), temp1)
910 && (GET_CODE (SET_SRC (temp4)) == REG
911 || GET_CODE (SET_SRC (temp4)) == SUBREG
912 || (GET_CODE (SET_SRC (temp4)) == MEM
913 && RTX_UNCHANGING_P (SET_SRC (temp4)))
914 || CONSTANT_P (SET_SRC (temp4)))
915 && (REG_NOTES (temp3) == 0
916 || ((REG_NOTE_KIND (REG_NOTES (temp3)) == REG_EQUAL
917 || REG_NOTE_KIND (REG_NOTES (temp3)) == REG_EQUIV)
918 && XEXP (REG_NOTES (temp3), 1) == 0
919 && rtx_equal_p (XEXP (REG_NOTES (temp3), 0),
920 SET_SRC (temp4))))
921 && (temp = prev_active_insn (temp3)) != 0
922 && condjump_p (temp) && ! simplejump_p (temp)
923 /* TEMP must skip over the "x = a;" insn */
924 && prev_real_insn (JUMP_LABEL (temp)) == insn
925 && no_labels_between_p (temp, insn))
926 {
927 rtx prev_label = JUMP_LABEL (temp);
928 rtx insert_after = prev_nonnote_insn (temp);
929
930 #ifdef HAVE_cc0
931 /* We cannot insert anything between a set of cc and its use. */
932 if (insert_after && GET_RTX_CLASS (GET_CODE (insert_after)) == 'i'
933 && sets_cc0_p (PATTERN (insert_after)))
934 insert_after = prev_nonnote_insn (insert_after);
935 #endif
936 ++LABEL_NUSES (prev_label);
937
938 if (insert_after
939 && no_labels_between_p (insert_after, temp)
940 && ! reg_referenced_between_p (temp1, insert_after, temp3)
941 && ! reg_referenced_between_p (temp1, temp3,
942 NEXT_INSN (temp2))
943 && ! reg_set_between_p (temp1, insert_after, temp)
944 && (GET_CODE (SET_SRC (temp4)) == CONST_INT
945 || ! reg_set_between_p (SET_SRC (temp4),
946 insert_after, temp))
947 && invert_jump (temp, JUMP_LABEL (insn)))
948 {
949 emit_insn_after_with_line_notes (PATTERN (temp3),
950 insert_after, temp3);
951 delete_insn (temp3);
952 delete_insn (insn);
953 /* Set NEXT to an insn that we know won't go away. */
954 next = temp2;
955 changed = 1;
956 }
957 if (prev_label && --LABEL_NUSES (prev_label) == 0)
958 delete_insn (prev_label);
959 if (changed)
960 continue;
961 }
962
963 #ifndef HAVE_cc0
964 /* If we have if (...) x = exp; and branches are expensive,
965 EXP is a single insn, does not have any side effects, cannot
966 trap, and is not too costly, convert this to
967 t = exp; if (...) x = t;
968
969 Don't do this when we have CC0 because it is unlikely to help
970 and we'd need to worry about where to place the new insn and
971 the potential for conflicts. We also can't do this when we have
972 notes on the insn for the same reason as above.
973
974 We set:
975
976 TEMP to the "x = exp;" insn.
977 TEMP1 to the single set in the "x = exp; insn.
978 TEMP2 to "x". */
979
980 if (! reload_completed
981 && this_is_condjump && ! this_is_simplejump
982 && BRANCH_COST >= 3
983 && (temp = next_nonnote_insn (insn)) != 0
984 && GET_CODE (temp) == INSN
985 && REG_NOTES (temp) == 0
986 && (reallabelprev == temp
987 || ((temp2 = next_active_insn (temp)) != 0
988 && simplejump_p (temp2)
989 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
990 && (temp1 = single_set (temp)) != 0
991 && (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
992 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
993 && (! SMALL_REGISTER_CLASSES
994 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
995 && GET_CODE (SET_SRC (temp1)) != REG
996 && GET_CODE (SET_SRC (temp1)) != SUBREG
997 && GET_CODE (SET_SRC (temp1)) != CONST_INT
998 && ! modified_in_p (insn, temp)
999 && ! side_effects_p (SET_SRC (temp1))
1000 && ! may_trap_p (SET_SRC (temp1))
1001 && rtx_cost (SET_SRC (temp1), SET) < 10)
1002 {
1003 rtx new = gen_reg_rtx (GET_MODE (temp2));
1004
1005 if ((temp3 = find_insert_position (insn, temp))
1006 && validate_change (temp, &SET_DEST (temp1), new, 0))
1007 {
1008 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1009 emit_insn_after_with_line_notes (PATTERN (temp),
1010 PREV_INSN (temp3), temp);
1011 delete_insn (temp);
1012 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
1013 }
1014 }
1015
1016 /* Similarly, if it takes two insns to compute EXP but they
1017 have the same destination. Here TEMP3 will be the second
1018 insn and TEMP4 the SET from that insn. */
1019
1020 if (! reload_completed
1021 && this_is_condjump && ! this_is_simplejump
1022 && BRANCH_COST >= 4
1023 && (temp = next_nonnote_insn (insn)) != 0
1024 && GET_CODE (temp) == INSN
1025 && REG_NOTES (temp) == 0
1026 && (temp3 = next_nonnote_insn (temp)) != 0
1027 && GET_CODE (temp3) == INSN
1028 && REG_NOTES (temp3) == 0
1029 && (reallabelprev == temp3
1030 || ((temp2 = next_active_insn (temp3)) != 0
1031 && simplejump_p (temp2)
1032 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
1033 && (temp1 = single_set (temp)) != 0
1034 && (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
1035 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
1036 && (! SMALL_REGISTER_CLASSES
1037 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
1038 && ! modified_in_p (insn, temp)
1039 && ! side_effects_p (SET_SRC (temp1))
1040 && ! may_trap_p (SET_SRC (temp1))
1041 && rtx_cost (SET_SRC (temp1), SET) < 10
1042 && (temp4 = single_set (temp3)) != 0
1043 && rtx_equal_p (SET_DEST (temp4), temp2)
1044 && ! modified_in_p (insn, temp3)
1045 && ! side_effects_p (SET_SRC (temp4))
1046 && ! may_trap_p (SET_SRC (temp4))
1047 && rtx_cost (SET_SRC (temp4), SET) < 10)
1048 {
1049 rtx new = gen_reg_rtx (GET_MODE (temp2));
1050
1051 if ((temp5 = find_insert_position (insn, temp))
1052 && (temp6 = find_insert_position (insn, temp3))
1053 && validate_change (temp, &SET_DEST (temp1), new, 0))
1054 {
1055 /* Use the earliest of temp5 and temp6. */
1056 if (temp5 != insn)
1057 temp6 = temp5;
1058 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1059 emit_insn_after_with_line_notes (PATTERN (temp),
1060 PREV_INSN (temp6), temp);
1061 emit_insn_after_with_line_notes
1062 (replace_rtx (PATTERN (temp3), temp2, new),
1063 PREV_INSN (temp6), temp3);
1064 delete_insn (temp);
1065 delete_insn (temp3);
1066 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
1067 }
1068 }
1069
1070 /* Finally, handle the case where two insns are used to
1071 compute EXP but a temporary register is used. Here we must
1072 ensure that the temporary register is not used anywhere else. */
1073
1074 if (! reload_completed
1075 && after_regscan
1076 && this_is_condjump && ! this_is_simplejump
1077 && BRANCH_COST >= 4
1078 && (temp = next_nonnote_insn (insn)) != 0
1079 && GET_CODE (temp) == INSN
1080 && REG_NOTES (temp) == 0
1081 && (temp3 = next_nonnote_insn (temp)) != 0
1082 && GET_CODE (temp3) == INSN
1083 && REG_NOTES (temp3) == 0
1084 && (reallabelprev == temp3
1085 || ((temp2 = next_active_insn (temp3)) != 0
1086 && simplejump_p (temp2)
1087 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
1088 && (temp1 = single_set (temp)) != 0
1089 && (temp5 = SET_DEST (temp1),
1090 (GET_CODE (temp5) == REG
1091 || (GET_CODE (temp5) == SUBREG
1092 && (temp5 = SUBREG_REG (temp5),
1093 GET_CODE (temp5) == REG))))
1094 && REGNO (temp5) >= FIRST_PSEUDO_REGISTER
1095 && REGNO_FIRST_UID (REGNO (temp5)) == INSN_UID (temp)
1096 && REGNO_LAST_UID (REGNO (temp5)) == INSN_UID (temp3)
1097 && ! modified_in_p (insn, temp)
1098 && ! side_effects_p (SET_SRC (temp1))
1099 && ! may_trap_p (SET_SRC (temp1))
1100 && rtx_cost (SET_SRC (temp1), SET) < 10
1101 && (temp4 = single_set (temp3)) != 0
1102 && (temp2 = SET_DEST (temp4), GET_CODE (temp2) == REG)
1103 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
1104 && (! SMALL_REGISTER_CLASSES
1105 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
1106 && rtx_equal_p (SET_DEST (temp4), temp2)
1107 && ! modified_in_p (insn, temp3)
1108 && ! side_effects_p (SET_SRC (temp4))
1109 && ! may_trap_p (SET_SRC (temp4))
1110 && rtx_cost (SET_SRC (temp4), SET) < 10)
1111 {
1112 rtx new = gen_reg_rtx (GET_MODE (temp2));
1113
1114 if ((temp5 = find_insert_position (insn, temp))
1115 && (temp6 = find_insert_position (insn, temp3))
1116 && validate_change (temp3, &SET_DEST (temp4), new, 0))
1117 {
1118 /* Use the earliest of temp5 and temp6. */
1119 if (temp5 != insn)
1120 temp6 = temp5;
1121 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1122 emit_insn_after_with_line_notes (PATTERN (temp),
1123 PREV_INSN (temp6), temp);
1124 emit_insn_after_with_line_notes (PATTERN (temp3),
1125 PREV_INSN (temp6), temp3);
1126 delete_insn (temp);
1127 delete_insn (temp3);
1128 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
1129 }
1130 }
1131 #endif /* HAVE_cc0 */
1132
1133 /* Try to use a conditional move (if the target has them), or a
1134 store-flag insn. The general case is:
1135
1136 1) x = a; if (...) x = b; and
1137 2) if (...) x = b;
1138
1139 If the jump would be faster, the machine should not have defined
1140 the movcc or scc insns!. These cases are often made by the
1141 previous optimization.
1142
1143 The second case is treated as x = x; if (...) x = b;.
1144
1145 INSN here is the jump around the store. We set:
1146
1147 TEMP to the "x = b;" insn.
1148 TEMP1 to X.
1149 TEMP2 to B.
1150 TEMP3 to A (X in the second case).
1151 TEMP4 to the condition being tested.
1152 TEMP5 to the earliest insn used to find the condition. */
1153
1154 if (/* We can't do this after reload has completed. */
1155 ! reload_completed
1156 && this_is_condjump && ! this_is_simplejump
1157 /* Set TEMP to the "x = b;" insn. */
1158 && (temp = next_nonnote_insn (insn)) != 0
1159 && GET_CODE (temp) == INSN
1160 && GET_CODE (PATTERN (temp)) == SET
1161 && GET_CODE (temp1 = SET_DEST (PATTERN (temp))) == REG
1162 && (! SMALL_REGISTER_CLASSES
1163 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
1164 && (GET_CODE (temp2 = SET_SRC (PATTERN (temp))) == REG
1165 || (GET_CODE (temp2) == MEM && RTX_UNCHANGING_P (temp2))
1166 || GET_CODE (temp2) == SUBREG
1167 /* ??? How about floating point constants? */
1168 || CONSTANT_P (temp2))
1169 /* Allow either form, but prefer the former if both apply.
1170 There is no point in using the old value of TEMP1 if
1171 it is a register, since cse will alias them. It can
1172 lose if the old value were a hard register since CSE
1173 won't replace hard registers. Avoid using TEMP3 if
1174 small register classes and it is a hard register. */
1175 && (((temp3 = reg_set_last (temp1, insn)) != 0
1176 && ! (SMALL_REGISTER_CLASSES && GET_CODE (temp3) == REG
1177 && REGNO (temp3) < FIRST_PSEUDO_REGISTER))
1178 /* Make the latter case look like x = x; if (...) x = b; */
1179 || (temp3 = temp1, 1))
1180 /* INSN must either branch to the insn after TEMP or the insn
1181 after TEMP must branch to the same place as INSN. */
1182 && (reallabelprev == temp
1183 || ((temp4 = next_active_insn (temp)) != 0
1184 && simplejump_p (temp4)
1185 && JUMP_LABEL (temp4) == JUMP_LABEL (insn)))
1186 && (temp4 = get_condition (insn, &temp5)) != 0
1187 /* We must be comparing objects whose modes imply the size.
1188 We could handle BLKmode if (1) emit_store_flag could
1189 and (2) we could find the size reliably. */
1190 && GET_MODE (XEXP (temp4, 0)) != BLKmode
1191 /* Even if branches are cheap, the store_flag optimization
1192 can win when the operation to be performed can be
1193 expressed directly. */
1194 #ifdef HAVE_cc0
1195 /* If the previous insn sets CC0 and something else, we can't
1196 do this since we are going to delete that insn. */
1197
1198 && ! ((temp6 = prev_nonnote_insn (insn)) != 0
1199 && GET_CODE (temp6) == INSN
1200 && (sets_cc0_p (PATTERN (temp6)) == -1
1201 || (sets_cc0_p (PATTERN (temp6)) == 1
1202 && FIND_REG_INC_NOTE (temp6, NULL_RTX))))
1203 #endif
1204 )
1205 {
1206 #ifdef HAVE_conditional_move
1207 /* First try a conditional move. */
1208 {
1209 enum rtx_code code = GET_CODE (temp4);
1210 rtx var = temp1;
1211 rtx cond0, cond1, aval, bval;
1212 rtx target;
1213
1214 /* Copy the compared variables into cond0 and cond1, so that
1215 any side effects performed in or after the old comparison,
1216 will not affect our compare which will come later. */
1217 /* ??? Is it possible to just use the comparison in the jump
1218 insn? After all, we're going to delete it. We'd have
1219 to modify emit_conditional_move to take a comparison rtx
1220 instead or write a new function. */
1221 cond0 = gen_reg_rtx (GET_MODE (XEXP (temp4, 0)));
1222 /* We want the target to be able to simplify comparisons with
1223 zero (and maybe other constants as well), so don't create
1224 pseudos for them. There's no need to either. */
1225 if (GET_CODE (XEXP (temp4, 1)) == CONST_INT
1226 || GET_CODE (XEXP (temp4, 1)) == CONST_DOUBLE)
1227 cond1 = XEXP (temp4, 1);
1228 else
1229 cond1 = gen_reg_rtx (GET_MODE (XEXP (temp4, 1)));
1230
1231 aval = temp3;
1232 bval = temp2;
1233
1234 start_sequence ();
1235 target = emit_conditional_move (var, code,
1236 cond0, cond1, VOIDmode,
1237 aval, bval, GET_MODE (var),
1238 (code == LTU || code == GEU
1239 || code == LEU || code == GTU));
1240
1241 if (target)
1242 {
1243 rtx seq1,seq2;
1244
1245 /* Save the conditional move sequence but don't emit it
1246 yet. On some machines, like the alpha, it is possible
1247 that temp5 == insn, so next generate the sequence that
1248 saves the compared values and then emit both
1249 sequences ensuring seq1 occurs before seq2. */
1250 seq2 = get_insns ();
1251 end_sequence ();
1252
1253 /* Now that we can't fail, generate the copy insns that
1254 preserve the compared values. */
1255 start_sequence ();
1256 emit_move_insn (cond0, XEXP (temp4, 0));
1257 if (cond1 != XEXP (temp4, 1))
1258 emit_move_insn (cond1, XEXP (temp4, 1));
1259 seq1 = get_insns ();
1260 end_sequence ();
1261
1262 emit_insns_before (seq1, temp5);
1263 /* Insert conditional move after insn, to be sure that
1264 the jump and a possible compare won't be separated */
1265 emit_insns_after (seq2, insn);
1266
1267 /* ??? We can also delete the insn that sets X to A.
1268 Flow will do it too though. */
1269 delete_insn (temp);
1270 next = NEXT_INSN (insn);
1271 delete_jump (insn);
1272 changed = 1;
1273 continue;
1274 }
1275 else
1276 end_sequence ();
1277 }
1278 #endif
1279
1280 /* That didn't work, try a store-flag insn.
1281
1282 We further divide the cases into:
1283
1284 1) x = a; if (...) x = b; and either A or B is zero,
1285 2) if (...) x = 0; and jumps are expensive,
1286 3) x = a; if (...) x = b; and A and B are constants where all
1287 the set bits in A are also set in B and jumps are expensive,
1288 4) x = a; if (...) x = b; and A and B non-zero, and jumps are
1289 more expensive, and
1290 5) if (...) x = b; if jumps are even more expensive. */
1291
1292 if (GET_MODE_CLASS (GET_MODE (temp1)) == MODE_INT
1293 && ((GET_CODE (temp3) == CONST_INT)
1294 /* Make the latter case look like
1295 x = x; if (...) x = 0; */
1296 || (temp3 = temp1,
1297 ((BRANCH_COST >= 2
1298 && temp2 == const0_rtx)
1299 || BRANCH_COST >= 3)))
1300 /* If B is zero, OK; if A is zero, can only do (1) if we
1301 can reverse the condition. See if (3) applies possibly
1302 by reversing the condition. Prefer reversing to (4) when
1303 branches are very expensive. */
1304 && (((BRANCH_COST >= 2
1305 || STORE_FLAG_VALUE == -1
1306 || (STORE_FLAG_VALUE == 1
1307 /* Check that the mask is a power of two,
1308 so that it can probably be generated
1309 with a shift. */
1310 && exact_log2 (INTVAL (temp3)) >= 0))
1311 && (reversep = 0, temp2 == const0_rtx))
1312 || ((BRANCH_COST >= 2
1313 || STORE_FLAG_VALUE == -1
1314 || (STORE_FLAG_VALUE == 1
1315 && exact_log2 (INTVAL (temp2)) >= 0))
1316 && temp3 == const0_rtx
1317 && (reversep = can_reverse_comparison_p (temp4, insn)))
1318 || (BRANCH_COST >= 2
1319 && GET_CODE (temp2) == CONST_INT
1320 && GET_CODE (temp3) == CONST_INT
1321 && ((INTVAL (temp2) & INTVAL (temp3)) == INTVAL (temp2)
1322 || ((INTVAL (temp2) & INTVAL (temp3)) == INTVAL (temp3)
1323 && (reversep = can_reverse_comparison_p (temp4,
1324 insn)))))
1325 || BRANCH_COST >= 3)
1326 )
1327 {
1328 enum rtx_code code = GET_CODE (temp4);
1329 rtx uval, cval, var = temp1;
1330 int normalizep;
1331 rtx target;
1332
1333 /* If necessary, reverse the condition. */
1334 if (reversep)
1335 code = reverse_condition (code), uval = temp2, cval = temp3;
1336 else
1337 uval = temp3, cval = temp2;
1338
1339 /* If CVAL is non-zero, normalize to -1. Otherwise, if UVAL
1340 is the constant 1, it is best to just compute the result
1341 directly. If UVAL is constant and STORE_FLAG_VALUE
1342 includes all of its bits, it is best to compute the flag
1343 value unnormalized and `and' it with UVAL. Otherwise,
1344 normalize to -1 and `and' with UVAL. */
1345 normalizep = (cval != const0_rtx ? -1
1346 : (uval == const1_rtx ? 1
1347 : (GET_CODE (uval) == CONST_INT
1348 && (INTVAL (uval) & ~STORE_FLAG_VALUE) == 0)
1349 ? 0 : -1));
1350
1351 /* We will be putting the store-flag insn immediately in
1352 front of the comparison that was originally being done,
1353 so we know all the variables in TEMP4 will be valid.
1354 However, this might be in front of the assignment of
1355 A to VAR. If it is, it would clobber the store-flag
1356 we will be emitting.
1357
1358 Therefore, emit into a temporary which will be copied to
1359 VAR immediately after TEMP. */
1360
1361 start_sequence ();
1362 target = emit_store_flag (gen_reg_rtx (GET_MODE (var)), code,
1363 XEXP (temp4, 0), XEXP (temp4, 1),
1364 VOIDmode,
1365 (code == LTU || code == LEU
1366 || code == GEU || code == GTU),
1367 normalizep);
1368 if (target)
1369 {
1370 rtx seq;
1371 rtx before = insn;
1372
1373 seq = get_insns ();
1374 end_sequence ();
1375
1376 /* Put the store-flag insns in front of the first insn
1377 used to compute the condition to ensure that we
1378 use the same values of them as the current
1379 comparison. However, the remainder of the insns we
1380 generate will be placed directly in front of the
1381 jump insn, in case any of the pseudos we use
1382 are modified earlier. */
1383
1384 emit_insns_before (seq, temp5);
1385
1386 start_sequence ();
1387
1388 /* Both CVAL and UVAL are non-zero. */
1389 if (cval != const0_rtx && uval != const0_rtx)
1390 {
1391 rtx tem1, tem2;
1392
1393 tem1 = expand_and (uval, target, NULL_RTX);
1394 if (GET_CODE (cval) == CONST_INT
1395 && GET_CODE (uval) == CONST_INT
1396 && (INTVAL (cval) & INTVAL (uval)) == INTVAL (cval))
1397 tem2 = cval;
1398 else
1399 {
1400 tem2 = expand_unop (GET_MODE (var), one_cmpl_optab,
1401 target, NULL_RTX, 0);
1402 tem2 = expand_and (cval, tem2,
1403 (GET_CODE (tem2) == REG
1404 ? tem2 : 0));
1405 }
1406
1407 /* If we usually make new pseudos, do so here. This
1408 turns out to help machines that have conditional
1409 move insns. */
1410 /* ??? Conditional moves have already been handled.
1411 This may be obsolete. */
1412
1413 if (flag_expensive_optimizations)
1414 target = 0;
1415
1416 target = expand_binop (GET_MODE (var), ior_optab,
1417 tem1, tem2, target,
1418 1, OPTAB_WIDEN);
1419 }
1420 else if (normalizep != 1)
1421 {
1422 /* We know that either CVAL or UVAL is zero. If
1423 UVAL is zero, negate TARGET and `and' with CVAL.
1424 Otherwise, `and' with UVAL. */
1425 if (uval == const0_rtx)
1426 {
1427 target = expand_unop (GET_MODE (var), one_cmpl_optab,
1428 target, NULL_RTX, 0);
1429 uval = cval;
1430 }
1431
1432 target = expand_and (uval, target,
1433 (GET_CODE (target) == REG
1434 && ! preserve_subexpressions_p ()
1435 ? target : NULL_RTX));
1436 }
1437
1438 emit_move_insn (var, target);
1439 seq = get_insns ();
1440 end_sequence ();
1441 #ifdef HAVE_cc0
1442 /* If INSN uses CC0, we must not separate it from the
1443 insn that sets cc0. */
1444 if (reg_mentioned_p (cc0_rtx, PATTERN (before)))
1445 before = prev_nonnote_insn (before);
1446 #endif
1447 emit_insns_before (seq, before);
1448
1449 delete_insn (temp);
1450 next = NEXT_INSN (insn);
1451 delete_jump (insn);
1452 changed = 1;
1453 continue;
1454 }
1455 else
1456 end_sequence ();
1457 }
1458 }
1459
1460 /* If branches are expensive, convert
1461 if (foo) bar++; to bar += (foo != 0);
1462 and similarly for "bar--;"
1463
1464 INSN is the conditional branch around the arithmetic. We set:
1465
1466 TEMP is the arithmetic insn.
1467 TEMP1 is the SET doing the arithmetic.
1468 TEMP2 is the operand being incremented or decremented.
1469 TEMP3 to the condition being tested.
1470 TEMP4 to the earliest insn used to find the condition. */
1471
1472 if ((BRANCH_COST >= 2
1473 #ifdef HAVE_incscc
1474 || HAVE_incscc
1475 #endif
1476 #ifdef HAVE_decscc
1477 || HAVE_decscc
1478 #endif
1479 )
1480 && ! reload_completed
1481 && this_is_condjump && ! this_is_simplejump
1482 && (temp = next_nonnote_insn (insn)) != 0
1483 && (temp1 = single_set (temp)) != 0
1484 && (temp2 = SET_DEST (temp1),
1485 GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT)
1486 && GET_CODE (SET_SRC (temp1)) == PLUS
1487 && (XEXP (SET_SRC (temp1), 1) == const1_rtx
1488 || XEXP (SET_SRC (temp1), 1) == constm1_rtx)
1489 && rtx_equal_p (temp2, XEXP (SET_SRC (temp1), 0))
1490 && ! side_effects_p (temp2)
1491 && ! may_trap_p (temp2)
1492 /* INSN must either branch to the insn after TEMP or the insn
1493 after TEMP must branch to the same place as INSN. */
1494 && (reallabelprev == temp
1495 || ((temp3 = next_active_insn (temp)) != 0
1496 && simplejump_p (temp3)
1497 && JUMP_LABEL (temp3) == JUMP_LABEL (insn)))
1498 && (temp3 = get_condition (insn, &temp4)) != 0
1499 /* We must be comparing objects whose modes imply the size.
1500 We could handle BLKmode if (1) emit_store_flag could
1501 and (2) we could find the size reliably. */
1502 && GET_MODE (XEXP (temp3, 0)) != BLKmode
1503 && can_reverse_comparison_p (temp3, insn))
1504 {
1505 rtx temp6, target = 0, seq, init_insn = 0, init = temp2;
1506 enum rtx_code code = reverse_condition (GET_CODE (temp3));
1507
1508 start_sequence ();
1509
1510 /* It must be the case that TEMP2 is not modified in the range
1511 [TEMP4, INSN). The one exception we make is if the insn
1512 before INSN sets TEMP2 to something which is also unchanged
1513 in that range. In that case, we can move the initialization
1514 into our sequence. */
1515
1516 if ((temp5 = prev_active_insn (insn)) != 0
1517 && no_labels_between_p (temp5, insn)
1518 && GET_CODE (temp5) == INSN
1519 && (temp6 = single_set (temp5)) != 0
1520 && rtx_equal_p (temp2, SET_DEST (temp6))
1521 && (CONSTANT_P (SET_SRC (temp6))
1522 || GET_CODE (SET_SRC (temp6)) == REG
1523 || GET_CODE (SET_SRC (temp6)) == SUBREG))
1524 {
1525 emit_insn (PATTERN (temp5));
1526 init_insn = temp5;
1527 init = SET_SRC (temp6);
1528 }
1529
1530 if (CONSTANT_P (init)
1531 || ! reg_set_between_p (init, PREV_INSN (temp4), insn))
1532 target = emit_store_flag (gen_reg_rtx (GET_MODE (temp2)), code,
1533 XEXP (temp3, 0), XEXP (temp3, 1),
1534 VOIDmode,
1535 (code == LTU || code == LEU
1536 || code == GTU || code == GEU), 1);
1537
1538 /* If we can do the store-flag, do the addition or
1539 subtraction. */
1540
1541 if (target)
1542 target = expand_binop (GET_MODE (temp2),
1543 (XEXP (SET_SRC (temp1), 1) == const1_rtx
1544 ? add_optab : sub_optab),
1545 temp2, target, temp2, 0, OPTAB_WIDEN);
1546
1547 if (target != 0)
1548 {
1549 /* Put the result back in temp2 in case it isn't already.
1550 Then replace the jump, possible a CC0-setting insn in
1551 front of the jump, and TEMP, with the sequence we have
1552 made. */
1553
1554 if (target != temp2)
1555 emit_move_insn (temp2, target);
1556
1557 seq = get_insns ();
1558 end_sequence ();
1559
1560 emit_insns_before (seq, temp4);
1561 delete_insn (temp);
1562
1563 if (init_insn)
1564 delete_insn (init_insn);
1565
1566 next = NEXT_INSN (insn);
1567 #ifdef HAVE_cc0
1568 delete_insn (prev_nonnote_insn (insn));
1569 #endif
1570 delete_insn (insn);
1571 changed = 1;
1572 continue;
1573 }
1574 else
1575 end_sequence ();
1576 }
1577
1578 /* Simplify if (...) x = 1; else {...} if (x) ...
1579 We recognize this case scanning backwards as well.
1580
1581 TEMP is the assignment to x;
1582 TEMP1 is the label at the head of the second if. */
1583 /* ?? This should call get_condition to find the values being
1584 compared, instead of looking for a COMPARE insn when HAVE_cc0
1585 is not defined. This would allow it to work on the m88k. */
1586 /* ?? This optimization is only safe before cse is run if HAVE_cc0
1587 is not defined and the condition is tested by a separate compare
1588 insn. This is because the code below assumes that the result
1589 of the compare dies in the following branch.
1590
1591 Not only that, but there might be other insns between the
1592 compare and branch whose results are live. Those insns need
1593 to be executed.
1594
1595 A way to fix this is to move the insns at JUMP_LABEL (insn)
1596 to before INSN. If we are running before flow, they will
1597 be deleted if they aren't needed. But this doesn't work
1598 well after flow.
1599
1600 This is really a special-case of jump threading, anyway. The
1601 right thing to do is to replace this and jump threading with
1602 much simpler code in cse.
1603
1604 This code has been turned off in the non-cc0 case in the
1605 meantime. */
1606
1607 #ifdef HAVE_cc0
1608 else if (this_is_simplejump
1609 /* Safe to skip USE and CLOBBER insns here
1610 since they will not be deleted. */
1611 && (temp = prev_active_insn (insn))
1612 && no_labels_between_p (temp, insn)
1613 && GET_CODE (temp) == INSN
1614 && GET_CODE (PATTERN (temp)) == SET
1615 && GET_CODE (SET_DEST (PATTERN (temp))) == REG
1616 && CONSTANT_P (SET_SRC (PATTERN (temp)))
1617 && (temp1 = next_active_insn (JUMP_LABEL (insn)))
1618 /* If we find that the next value tested is `x'
1619 (TEMP1 is the insn where this happens), win. */
1620 && GET_CODE (temp1) == INSN
1621 && GET_CODE (PATTERN (temp1)) == SET
1622 #ifdef HAVE_cc0
1623 /* Does temp1 `tst' the value of x? */
1624 && SET_SRC (PATTERN (temp1)) == SET_DEST (PATTERN (temp))
1625 && SET_DEST (PATTERN (temp1)) == cc0_rtx
1626 && (temp1 = next_nonnote_insn (temp1))
1627 #else
1628 /* Does temp1 compare the value of x against zero? */
1629 && GET_CODE (SET_SRC (PATTERN (temp1))) == COMPARE
1630 && XEXP (SET_SRC (PATTERN (temp1)), 1) == const0_rtx
1631 && (XEXP (SET_SRC (PATTERN (temp1)), 0)
1632 == SET_DEST (PATTERN (temp)))
1633 && GET_CODE (SET_DEST (PATTERN (temp1))) == REG
1634 && (temp1 = find_next_ref (SET_DEST (PATTERN (temp1)), temp1))
1635 #endif
1636 && condjump_p (temp1))
1637 {
1638 /* Get the if_then_else from the condjump. */
1639 rtx choice = SET_SRC (PATTERN (temp1));
1640 if (GET_CODE (choice) == IF_THEN_ELSE)
1641 {
1642 enum rtx_code code = GET_CODE (XEXP (choice, 0));
1643 rtx val = SET_SRC (PATTERN (temp));
1644 rtx cond
1645 = simplify_relational_operation (code, GET_MODE (SET_DEST (PATTERN (temp))),
1646 val, const0_rtx);
1647 rtx ultimate;
1648
1649 if (cond == const_true_rtx)
1650 ultimate = XEXP (choice, 1);
1651 else if (cond == const0_rtx)
1652 ultimate = XEXP (choice, 2);
1653 else
1654 ultimate = 0;
1655
1656 if (ultimate == pc_rtx)
1657 ultimate = get_label_after (temp1);
1658 else if (ultimate && GET_CODE (ultimate) != RETURN)
1659 ultimate = XEXP (ultimate, 0);
1660
1661 if (ultimate && JUMP_LABEL(insn) != ultimate)
1662 changed |= redirect_jump (insn, ultimate);
1663 }
1664 }
1665 #endif
1666
1667 #if 0
1668 /* @@ This needs a bit of work before it will be right.
1669
1670 Any type of comparison can be accepted for the first and
1671 second compare. When rewriting the first jump, we must
1672 compute the what conditions can reach label3, and use the
1673 appropriate code. We can not simply reverse/swap the code
1674 of the first jump. In some cases, the second jump must be
1675 rewritten also.
1676
1677 For example,
1678 < == converts to > ==
1679 < != converts to == >
1680 etc.
1681
1682 If the code is written to only accept an '==' test for the second
1683 compare, then all that needs to be done is to swap the condition
1684 of the first branch.
1685
1686 It is questionable whether we want this optimization anyways,
1687 since if the user wrote code like this because he/she knew that
1688 the jump to label1 is taken most of the time, then rewriting
1689 this gives slower code. */
1690 /* @@ This should call get_condition to find the values being
1691 compared, instead of looking for a COMPARE insn when HAVE_cc0
1692 is not defined. This would allow it to work on the m88k. */
1693 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1694 is not defined and the condition is tested by a separate compare
1695 insn. This is because the code below assumes that the result
1696 of the compare dies in the following branch. */
1697
1698 /* Simplify test a ~= b
1699 condjump label1;
1700 test a == b
1701 condjump label2;
1702 jump label3;
1703 label1:
1704
1705 rewriting as
1706 test a ~~= b
1707 condjump label3
1708 test a == b
1709 condjump label2
1710 label1:
1711
1712 where ~= is an inequality, e.g. >, and ~~= is the swapped
1713 inequality, e.g. <.
1714
1715 We recognize this case scanning backwards.
1716
1717 TEMP is the conditional jump to `label2';
1718 TEMP1 is the test for `a == b';
1719 TEMP2 is the conditional jump to `label1';
1720 TEMP3 is the test for `a ~= b'. */
1721 else if (this_is_simplejump
1722 && (temp = prev_active_insn (insn))
1723 && no_labels_between_p (temp, insn)
1724 && condjump_p (temp)
1725 && (temp1 = prev_active_insn (temp))
1726 && no_labels_between_p (temp1, temp)
1727 && GET_CODE (temp1) == INSN
1728 && GET_CODE (PATTERN (temp1)) == SET
1729 #ifdef HAVE_cc0
1730 && sets_cc0_p (PATTERN (temp1)) == 1
1731 #else
1732 && GET_CODE (SET_SRC (PATTERN (temp1))) == COMPARE
1733 && GET_CODE (SET_DEST (PATTERN (temp1))) == REG
1734 && (temp == find_next_ref (SET_DEST (PATTERN (temp1)), temp1))
1735 #endif
1736 && (temp2 = prev_active_insn (temp1))
1737 && no_labels_between_p (temp2, temp1)
1738 && condjump_p (temp2)
1739 && JUMP_LABEL (temp2) == next_nonnote_insn (NEXT_INSN (insn))
1740 && (temp3 = prev_active_insn (temp2))
1741 && no_labels_between_p (temp3, temp2)
1742 && GET_CODE (PATTERN (temp3)) == SET
1743 && rtx_equal_p (SET_DEST (PATTERN (temp3)),
1744 SET_DEST (PATTERN (temp1)))
1745 && rtx_equal_p (SET_SRC (PATTERN (temp1)),
1746 SET_SRC (PATTERN (temp3)))
1747 && ! inequality_comparisons_p (PATTERN (temp))
1748 && inequality_comparisons_p (PATTERN (temp2)))
1749 {
1750 rtx fallthrough_label = JUMP_LABEL (temp2);
1751
1752 ++LABEL_NUSES (fallthrough_label);
1753 if (swap_jump (temp2, JUMP_LABEL (insn)))
1754 {
1755 delete_insn (insn);
1756 changed = 1;
1757 }
1758
1759 if (--LABEL_NUSES (fallthrough_label) == 0)
1760 delete_insn (fallthrough_label);
1761 }
1762 #endif
1763 /* Simplify if (...) {... x = 1;} if (x) ...
1764
1765 We recognize this case backwards.
1766
1767 TEMP is the test of `x';
1768 TEMP1 is the assignment to `x' at the end of the
1769 previous statement. */
1770 /* @@ This should call get_condition to find the values being
1771 compared, instead of looking for a COMPARE insn when HAVE_cc0
1772 is not defined. This would allow it to work on the m88k. */
1773 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1774 is not defined and the condition is tested by a separate compare
1775 insn. This is because the code below assumes that the result
1776 of the compare dies in the following branch. */
1777
1778 /* ??? This has to be turned off. The problem is that the
1779 unconditional jump might indirectly end up branching to the
1780 label between TEMP1 and TEMP. We can't detect this, in general,
1781 since it may become a jump to there after further optimizations.
1782 If that jump is done, it will be deleted, so we will retry
1783 this optimization in the next pass, thus an infinite loop.
1784
1785 The present code prevents this by putting the jump after the
1786 label, but this is not logically correct. */
1787 #if 0
1788 else if (this_is_condjump
1789 /* Safe to skip USE and CLOBBER insns here
1790 since they will not be deleted. */
1791 && (temp = prev_active_insn (insn))
1792 && no_labels_between_p (temp, insn)
1793 && GET_CODE (temp) == INSN
1794 && GET_CODE (PATTERN (temp)) == SET
1795 #ifdef HAVE_cc0
1796 && sets_cc0_p (PATTERN (temp)) == 1
1797 && GET_CODE (SET_SRC (PATTERN (temp))) == REG
1798 #else
1799 /* Temp must be a compare insn, we can not accept a register
1800 to register move here, since it may not be simply a
1801 tst insn. */
1802 && GET_CODE (SET_SRC (PATTERN (temp))) == COMPARE
1803 && XEXP (SET_SRC (PATTERN (temp)), 1) == const0_rtx
1804 && GET_CODE (XEXP (SET_SRC (PATTERN (temp)), 0)) == REG
1805 && GET_CODE (SET_DEST (PATTERN (temp))) == REG
1806 && insn == find_next_ref (SET_DEST (PATTERN (temp)), temp)
1807 #endif
1808 /* May skip USE or CLOBBER insns here
1809 for checking for opportunity, since we
1810 take care of them later. */
1811 && (temp1 = prev_active_insn (temp))
1812 && GET_CODE (temp1) == INSN
1813 && GET_CODE (PATTERN (temp1)) == SET
1814 #ifdef HAVE_cc0
1815 && SET_SRC (PATTERN (temp)) == SET_DEST (PATTERN (temp1))
1816 #else
1817 && (XEXP (SET_SRC (PATTERN (temp)), 0)
1818 == SET_DEST (PATTERN (temp1)))
1819 #endif
1820 && CONSTANT_P (SET_SRC (PATTERN (temp1)))
1821 /* If this isn't true, cse will do the job. */
1822 && ! no_labels_between_p (temp1, temp))
1823 {
1824 /* Get the if_then_else from the condjump. */
1825 rtx choice = SET_SRC (PATTERN (insn));
1826 if (GET_CODE (choice) == IF_THEN_ELSE
1827 && (GET_CODE (XEXP (choice, 0)) == EQ
1828 || GET_CODE (XEXP (choice, 0)) == NE))
1829 {
1830 int want_nonzero = (GET_CODE (XEXP (choice, 0)) == NE);
1831 rtx last_insn;
1832 rtx ultimate;
1833 rtx p;
1834
1835 /* Get the place that condjump will jump to
1836 if it is reached from here. */
1837 if ((SET_SRC (PATTERN (temp1)) != const0_rtx)
1838 == want_nonzero)
1839 ultimate = XEXP (choice, 1);
1840 else
1841 ultimate = XEXP (choice, 2);
1842 /* Get it as a CODE_LABEL. */
1843 if (ultimate == pc_rtx)
1844 ultimate = get_label_after (insn);
1845 else
1846 /* Get the label out of the LABEL_REF. */
1847 ultimate = XEXP (ultimate, 0);
1848
1849 /* Insert the jump immediately before TEMP, specifically
1850 after the label that is between TEMP1 and TEMP. */
1851 last_insn = PREV_INSN (temp);
1852
1853 /* If we would be branching to the next insn, the jump
1854 would immediately be deleted and the re-inserted in
1855 a subsequent pass over the code. So don't do anything
1856 in that case. */
1857 if (next_active_insn (last_insn)
1858 != next_active_insn (ultimate))
1859 {
1860 emit_barrier_after (last_insn);
1861 p = emit_jump_insn_after (gen_jump (ultimate),
1862 last_insn);
1863 JUMP_LABEL (p) = ultimate;
1864 ++LABEL_NUSES (ultimate);
1865 if (INSN_UID (ultimate) < max_jump_chain
1866 && INSN_CODE (p) < max_jump_chain)
1867 {
1868 jump_chain[INSN_UID (p)]
1869 = jump_chain[INSN_UID (ultimate)];
1870 jump_chain[INSN_UID (ultimate)] = p;
1871 }
1872 changed = 1;
1873 continue;
1874 }
1875 }
1876 }
1877 #endif
1878 /* Detect a conditional jump going to the same place
1879 as an immediately following unconditional jump. */
1880 else if (this_is_condjump
1881 && (temp = next_active_insn (insn)) != 0
1882 && simplejump_p (temp)
1883 && (next_active_insn (JUMP_LABEL (insn))
1884 == next_active_insn (JUMP_LABEL (temp))))
1885 {
1886 rtx tem = temp;
1887
1888 /* ??? Optional. Disables some optimizations, but makes
1889 gcov output more accurate with -O. */
1890 if (flag_test_coverage && !reload_completed)
1891 for (tem = insn; tem != temp; tem = NEXT_INSN (tem))
1892 if (GET_CODE (tem) == NOTE && NOTE_LINE_NUMBER (tem) > 0)
1893 break;
1894
1895 if (tem == temp)
1896 {
1897 delete_jump (insn);
1898 changed = 1;
1899 continue;
1900 }
1901 }
1902 /* Detect a conditional jump jumping over an unconditional jump. */
1903
1904 else if ((this_is_condjump || this_is_condjump_in_parallel)
1905 && ! this_is_simplejump
1906 && reallabelprev != 0
1907 && GET_CODE (reallabelprev) == JUMP_INSN
1908 && prev_active_insn (reallabelprev) == insn
1909 && no_labels_between_p (insn, reallabelprev)
1910 && simplejump_p (reallabelprev))
1911 {
1912 /* When we invert the unconditional jump, we will be
1913 decrementing the usage count of its old label.
1914 Make sure that we don't delete it now because that
1915 might cause the following code to be deleted. */
1916 rtx prev_uses = prev_nonnote_insn (reallabelprev);
1917 rtx prev_label = JUMP_LABEL (insn);
1918
1919 if (prev_label)
1920 ++LABEL_NUSES (prev_label);
1921
1922 if (invert_jump (insn, JUMP_LABEL (reallabelprev)))
1923 {
1924 /* It is very likely that if there are USE insns before
1925 this jump, they hold REG_DEAD notes. These REG_DEAD
1926 notes are no longer valid due to this optimization,
1927 and will cause the life-analysis that following passes
1928 (notably delayed-branch scheduling) to think that
1929 these registers are dead when they are not.
1930
1931 To prevent this trouble, we just remove the USE insns
1932 from the insn chain. */
1933
1934 while (prev_uses && GET_CODE (prev_uses) == INSN
1935 && GET_CODE (PATTERN (prev_uses)) == USE)
1936 {
1937 rtx useless = prev_uses;
1938 prev_uses = prev_nonnote_insn (prev_uses);
1939 delete_insn (useless);
1940 }
1941
1942 delete_insn (reallabelprev);
1943 next = insn;
1944 changed = 1;
1945 }
1946
1947 /* We can now safely delete the label if it is unreferenced
1948 since the delete_insn above has deleted the BARRIER. */
1949 if (prev_label && --LABEL_NUSES (prev_label) == 0)
1950 delete_insn (prev_label);
1951 continue;
1952 }
1953 else
1954 {
1955 /* Detect a jump to a jump. */
1956
1957 nlabel = follow_jumps (JUMP_LABEL (insn));
1958 if (nlabel != JUMP_LABEL (insn)
1959 && redirect_jump (insn, nlabel))
1960 {
1961 changed = 1;
1962 next = insn;
1963 }
1964
1965 /* Look for if (foo) bar; else break; */
1966 /* The insns look like this:
1967 insn = condjump label1;
1968 ...range1 (some insns)...
1969 jump label2;
1970 label1:
1971 ...range2 (some insns)...
1972 jump somewhere unconditionally
1973 label2: */
1974 {
1975 rtx label1 = next_label (insn);
1976 rtx range1end = label1 ? prev_active_insn (label1) : 0;
1977 /* Don't do this optimization on the first round, so that
1978 jump-around-a-jump gets simplified before we ask here
1979 whether a jump is unconditional.
1980
1981 Also don't do it when we are called after reload since
1982 it will confuse reorg. */
1983 if (! first
1984 && (reload_completed ? ! flag_delayed_branch : 1)
1985 /* Make sure INSN is something we can invert. */
1986 && condjump_p (insn)
1987 && label1 != 0
1988 && JUMP_LABEL (insn) == label1
1989 && LABEL_NUSES (label1) == 1
1990 && GET_CODE (range1end) == JUMP_INSN
1991 && simplejump_p (range1end))
1992 {
1993 rtx label2 = next_label (label1);
1994 rtx range2end = label2 ? prev_active_insn (label2) : 0;
1995 if (range1end != range2end
1996 && JUMP_LABEL (range1end) == label2
1997 && GET_CODE (range2end) == JUMP_INSN
1998 && GET_CODE (NEXT_INSN (range2end)) == BARRIER
1999 /* Invert the jump condition, so we
2000 still execute the same insns in each case. */
2001 && invert_jump (insn, label1))
2002 {
2003 rtx range1beg = next_active_insn (insn);
2004 rtx range2beg = next_active_insn (label1);
2005 rtx range1after, range2after;
2006 rtx range1before, range2before;
2007 rtx rangenext;
2008
2009 /* Include in each range any notes before it, to be
2010 sure that we get the line number note if any, even
2011 if there are other notes here. */
2012 while (PREV_INSN (range1beg)
2013 && GET_CODE (PREV_INSN (range1beg)) == NOTE)
2014 range1beg = PREV_INSN (range1beg);
2015
2016 while (PREV_INSN (range2beg)
2017 && GET_CODE (PREV_INSN (range2beg)) == NOTE)
2018 range2beg = PREV_INSN (range2beg);
2019
2020 /* Don't move NOTEs for blocks or loops; shift them
2021 outside the ranges, where they'll stay put. */
2022 range1beg = squeeze_notes (range1beg, range1end);
2023 range2beg = squeeze_notes (range2beg, range2end);
2024
2025 /* Get current surrounds of the 2 ranges. */
2026 range1before = PREV_INSN (range1beg);
2027 range2before = PREV_INSN (range2beg);
2028 range1after = NEXT_INSN (range1end);
2029 range2after = NEXT_INSN (range2end);
2030
2031 /* Splice range2 where range1 was. */
2032 NEXT_INSN (range1before) = range2beg;
2033 PREV_INSN (range2beg) = range1before;
2034 NEXT_INSN (range2end) = range1after;
2035 PREV_INSN (range1after) = range2end;
2036 /* Splice range1 where range2 was. */
2037 NEXT_INSN (range2before) = range1beg;
2038 PREV_INSN (range1beg) = range2before;
2039 NEXT_INSN (range1end) = range2after;
2040 PREV_INSN (range2after) = range1end;
2041
2042 /* Check for a loop end note between the end of
2043 range2, and the next code label. If there is one,
2044 then what we have really seen is
2045 if (foo) break; end_of_loop;
2046 and moved the break sequence outside the loop.
2047 We must move the LOOP_END note to where the
2048 loop really ends now, or we will confuse loop
2049 optimization. Stop if we find a LOOP_BEG note
2050 first, since we don't want to move the LOOP_END
2051 note in that case. */
2052 for (;range2after != label2; range2after = rangenext)
2053 {
2054 rangenext = NEXT_INSN (range2after);
2055 if (GET_CODE (range2after) == NOTE)
2056 {
2057 if (NOTE_LINE_NUMBER (range2after)
2058 == NOTE_INSN_LOOP_END)
2059 {
2060 NEXT_INSN (PREV_INSN (range2after))
2061 = rangenext;
2062 PREV_INSN (rangenext)
2063 = PREV_INSN (range2after);
2064 PREV_INSN (range2after)
2065 = PREV_INSN (range1beg);
2066 NEXT_INSN (range2after) = range1beg;
2067 NEXT_INSN (PREV_INSN (range1beg))
2068 = range2after;
2069 PREV_INSN (range1beg) = range2after;
2070 }
2071 else if (NOTE_LINE_NUMBER (range2after)
2072 == NOTE_INSN_LOOP_BEG)
2073 break;
2074 }
2075 }
2076 changed = 1;
2077 continue;
2078 }
2079 }
2080 }
2081
2082 /* Now that the jump has been tensioned,
2083 try cross jumping: check for identical code
2084 before the jump and before its target label. */
2085
2086 /* First, cross jumping of conditional jumps: */
2087
2088 if (cross_jump && condjump_p (insn))
2089 {
2090 rtx newjpos, newlpos;
2091 rtx x = prev_real_insn (JUMP_LABEL (insn));
2092
2093 /* A conditional jump may be crossjumped
2094 only if the place it jumps to follows
2095 an opposing jump that comes back here. */
2096
2097 if (x != 0 && ! jump_back_p (x, insn))
2098 /* We have no opposing jump;
2099 cannot cross jump this insn. */
2100 x = 0;
2101
2102 newjpos = 0;
2103 /* TARGET is nonzero if it is ok to cross jump
2104 to code before TARGET. If so, see if matches. */
2105 if (x != 0)
2106 find_cross_jump (insn, x, 2,
2107 &newjpos, &newlpos);
2108
2109 if (newjpos != 0)
2110 {
2111 do_cross_jump (insn, newjpos, newlpos);
2112 /* Make the old conditional jump
2113 into an unconditional one. */
2114 SET_SRC (PATTERN (insn))
2115 = gen_rtx_LABEL_REF (VOIDmode, JUMP_LABEL (insn));
2116 INSN_CODE (insn) = -1;
2117 emit_barrier_after (insn);
2118 /* Add to jump_chain unless this is a new label
2119 whose UID is too large. */
2120 if (INSN_UID (JUMP_LABEL (insn)) < max_jump_chain)
2121 {
2122 jump_chain[INSN_UID (insn)]
2123 = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2124 jump_chain[INSN_UID (JUMP_LABEL (insn))] = insn;
2125 }
2126 changed = 1;
2127 next = insn;
2128 }
2129 }
2130
2131 /* Cross jumping of unconditional jumps:
2132 a few differences. */
2133
2134 if (cross_jump && simplejump_p (insn))
2135 {
2136 rtx newjpos, newlpos;
2137 rtx target;
2138
2139 newjpos = 0;
2140
2141 /* TARGET is nonzero if it is ok to cross jump
2142 to code before TARGET. If so, see if matches. */
2143 find_cross_jump (insn, JUMP_LABEL (insn), 1,
2144 &newjpos, &newlpos);
2145
2146 /* If cannot cross jump to code before the label,
2147 see if we can cross jump to another jump to
2148 the same label. */
2149 /* Try each other jump to this label. */
2150 if (INSN_UID (JUMP_LABEL (insn)) < max_uid)
2151 for (target = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2152 target != 0 && newjpos == 0;
2153 target = jump_chain[INSN_UID (target)])
2154 if (target != insn
2155 && JUMP_LABEL (target) == JUMP_LABEL (insn)
2156 /* Ignore TARGET if it's deleted. */
2157 && ! INSN_DELETED_P (target))
2158 find_cross_jump (insn, target, 2,
2159 &newjpos, &newlpos);
2160
2161 if (newjpos != 0)
2162 {
2163 do_cross_jump (insn, newjpos, newlpos);
2164 changed = 1;
2165 next = insn;
2166 }
2167 }
2168
2169 /* This code was dead in the previous jump.c! */
2170 if (cross_jump && GET_CODE (PATTERN (insn)) == RETURN)
2171 {
2172 /* Return insns all "jump to the same place"
2173 so we can cross-jump between any two of them. */
2174
2175 rtx newjpos, newlpos, target;
2176
2177 newjpos = 0;
2178
2179 /* If cannot cross jump to code before the label,
2180 see if we can cross jump to another jump to
2181 the same label. */
2182 /* Try each other jump to this label. */
2183 for (target = jump_chain[0];
2184 target != 0 && newjpos == 0;
2185 target = jump_chain[INSN_UID (target)])
2186 if (target != insn
2187 && ! INSN_DELETED_P (target)
2188 && GET_CODE (PATTERN (target)) == RETURN)
2189 find_cross_jump (insn, target, 2,
2190 &newjpos, &newlpos);
2191
2192 if (newjpos != 0)
2193 {
2194 do_cross_jump (insn, newjpos, newlpos);
2195 changed = 1;
2196 next = insn;
2197 }
2198 }
2199 }
2200 }
2201
2202 first = 0;
2203 }
2204
2205 /* Delete extraneous line number notes.
2206 Note that two consecutive notes for different lines are not really
2207 extraneous. There should be some indication where that line belonged,
2208 even if it became empty. */
2209
2210 {
2211 rtx last_note = 0;
2212
2213 for (insn = f; insn; insn = NEXT_INSN (insn))
2214 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0)
2215 {
2216 /* Delete this note if it is identical to previous note. */
2217 if (last_note
2218 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last_note)
2219 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last_note))
2220 {
2221 delete_insn (insn);
2222 continue;
2223 }
2224
2225 last_note = insn;
2226 }
2227 }
2228
2229 #ifdef HAVE_return
2230 if (HAVE_return)
2231 {
2232 /* If we fall through to the epilogue, see if we can insert a RETURN insn
2233 in front of it. If the machine allows it at this point (we might be
2234 after reload for a leaf routine), it will improve optimization for it
2235 to be there. We do this both here and at the start of this pass since
2236 the RETURN might have been deleted by some of our optimizations. */
2237 insn = get_last_insn ();
2238 while (insn && GET_CODE (insn) == NOTE)
2239 insn = PREV_INSN (insn);
2240
2241 if (insn && GET_CODE (insn) != BARRIER)
2242 {
2243 emit_jump_insn (gen_return ());
2244 emit_barrier ();
2245 }
2246 }
2247 #endif
2248
2249 /* See if there is still a NOTE_INSN_FUNCTION_END in this function.
2250 If so, delete it, and record that this function can drop off the end. */
2251
2252 insn = last_insn;
2253 {
2254 int n_labels = 1;
2255 while (insn
2256 /* One label can follow the end-note: the return label. */
2257 && ((GET_CODE (insn) == CODE_LABEL && n_labels-- > 0)
2258 /* Ordinary insns can follow it if returning a structure. */
2259 || GET_CODE (insn) == INSN
2260 /* If machine uses explicit RETURN insns, no epilogue,
2261 then one of them follows the note. */
2262 || (GET_CODE (insn) == JUMP_INSN
2263 && GET_CODE (PATTERN (insn)) == RETURN)
2264 /* A barrier can follow the return insn. */
2265 || GET_CODE (insn) == BARRIER
2266 /* Other kinds of notes can follow also. */
2267 || (GET_CODE (insn) == NOTE
2268 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)))
2269 insn = PREV_INSN (insn);
2270 }
2271
2272 /* Report if control can fall through at the end of the function. */
2273 if (insn && GET_CODE (insn) == NOTE
2274 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_END)
2275 {
2276 can_reach_end = 1;
2277 delete_insn (insn);
2278 }
2279
2280 /* Show JUMP_CHAIN no longer valid. */
2281 jump_chain = 0;
2282 }
2283 \f
2284 /* LOOP_START is a NOTE_INSN_LOOP_BEG note that is followed by an unconditional
2285 jump. Assume that this unconditional jump is to the exit test code. If
2286 the code is sufficiently simple, make a copy of it before INSN,
2287 followed by a jump to the exit of the loop. Then delete the unconditional
2288 jump after INSN.
2289
2290 Return 1 if we made the change, else 0.
2291
2292 This is only safe immediately after a regscan pass because it uses the
2293 values of regno_first_uid and regno_last_uid. */
2294
2295 static int
2296 duplicate_loop_exit_test (loop_start)
2297 rtx loop_start;
2298 {
2299 rtx insn, set, reg, p, link;
2300 rtx copy = 0;
2301 int num_insns = 0;
2302 rtx exitcode = NEXT_INSN (JUMP_LABEL (next_nonnote_insn (loop_start)));
2303 rtx lastexit;
2304 int max_reg = max_reg_num ();
2305 rtx *reg_map = 0;
2306
2307 /* Scan the exit code. We do not perform this optimization if any insn:
2308
2309 is a CALL_INSN
2310 is a CODE_LABEL
2311 has a REG_RETVAL or REG_LIBCALL note (hard to adjust)
2312 is a NOTE_INSN_LOOP_BEG because this means we have a nested loop
2313 is a NOTE_INSN_BLOCK_{BEG,END} because duplicating these notes
2314 are not valid
2315
2316 Also, don't do this if the exit code is more than 20 insns. */
2317
2318 for (insn = exitcode;
2319 insn
2320 && ! (GET_CODE (insn) == NOTE
2321 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
2322 insn = NEXT_INSN (insn))
2323 {
2324 switch (GET_CODE (insn))
2325 {
2326 case CODE_LABEL:
2327 case CALL_INSN:
2328 return 0;
2329 case NOTE:
2330 /* We could be in front of the wrong NOTE_INSN_LOOP_END if there is
2331 a jump immediately after the loop start that branches outside
2332 the loop but within an outer loop, near the exit test.
2333 If we copied this exit test and created a phony
2334 NOTE_INSN_LOOP_VTOP, this could make instructions immediately
2335 before the exit test look like these could be safely moved
2336 out of the loop even if they actually may be never executed.
2337 This can be avoided by checking here for NOTE_INSN_LOOP_CONT. */
2338
2339 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
2340 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2341 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END
2342 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2343 return 0;
2344 break;
2345 case JUMP_INSN:
2346 case INSN:
2347 if (++num_insns > 20
2348 || find_reg_note (insn, REG_RETVAL, NULL_RTX)
2349 || find_reg_note (insn, REG_LIBCALL, NULL_RTX))
2350 return 0;
2351 break;
2352 default:
2353 break;
2354 }
2355 }
2356
2357 /* Unless INSN is zero, we can do the optimization. */
2358 if (insn == 0)
2359 return 0;
2360
2361 lastexit = insn;
2362
2363 /* See if any insn sets a register only used in the loop exit code and
2364 not a user variable. If so, replace it with a new register. */
2365 for (insn = exitcode; insn != lastexit; insn = NEXT_INSN (insn))
2366 if (GET_CODE (insn) == INSN
2367 && (set = single_set (insn)) != 0
2368 && ((reg = SET_DEST (set), GET_CODE (reg) == REG)
2369 || (GET_CODE (reg) == SUBREG
2370 && (reg = SUBREG_REG (reg), GET_CODE (reg) == REG)))
2371 && REGNO (reg) >= FIRST_PSEUDO_REGISTER
2372 && REGNO_FIRST_UID (REGNO (reg)) == INSN_UID (insn))
2373 {
2374 for (p = NEXT_INSN (insn); p != lastexit; p = NEXT_INSN (p))
2375 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (p))
2376 break;
2377
2378 if (p != lastexit)
2379 {
2380 /* We can do the replacement. Allocate reg_map if this is the
2381 first replacement we found. */
2382 if (reg_map == 0)
2383 {
2384 reg_map = (rtx *) alloca (max_reg * sizeof (rtx));
2385 bzero ((char *) reg_map, max_reg * sizeof (rtx));
2386 }
2387
2388 REG_LOOP_TEST_P (reg) = 1;
2389
2390 reg_map[REGNO (reg)] = gen_reg_rtx (GET_MODE (reg));
2391 }
2392 }
2393
2394 /* Now copy each insn. */
2395 for (insn = exitcode; insn != lastexit; insn = NEXT_INSN (insn))
2396 switch (GET_CODE (insn))
2397 {
2398 case BARRIER:
2399 copy = emit_barrier_before (loop_start);
2400 break;
2401 case NOTE:
2402 /* Only copy line-number notes. */
2403 if (NOTE_LINE_NUMBER (insn) >= 0)
2404 {
2405 copy = emit_note_before (NOTE_LINE_NUMBER (insn), loop_start);
2406 NOTE_SOURCE_FILE (copy) = NOTE_SOURCE_FILE (insn);
2407 }
2408 break;
2409
2410 case INSN:
2411 copy = emit_insn_before (copy_rtx (PATTERN (insn)), loop_start);
2412 if (reg_map)
2413 replace_regs (PATTERN (copy), reg_map, max_reg, 1);
2414
2415 mark_jump_label (PATTERN (copy), copy, 0);
2416
2417 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
2418 make them. */
2419 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
2420 if (REG_NOTE_KIND (link) != REG_LABEL)
2421 REG_NOTES (copy)
2422 = copy_rtx (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
2423 XEXP (link, 0),
2424 REG_NOTES (copy)));
2425 if (reg_map && REG_NOTES (copy))
2426 replace_regs (REG_NOTES (copy), reg_map, max_reg, 1);
2427 break;
2428
2429 case JUMP_INSN:
2430 copy = emit_jump_insn_before (copy_rtx (PATTERN (insn)), loop_start);
2431 if (reg_map)
2432 replace_regs (PATTERN (copy), reg_map, max_reg, 1);
2433 mark_jump_label (PATTERN (copy), copy, 0);
2434 if (REG_NOTES (insn))
2435 {
2436 REG_NOTES (copy) = copy_rtx (REG_NOTES (insn));
2437 if (reg_map)
2438 replace_regs (REG_NOTES (copy), reg_map, max_reg, 1);
2439 }
2440
2441 /* If this is a simple jump, add it to the jump chain. */
2442
2443 if (INSN_UID (copy) < max_jump_chain && JUMP_LABEL (copy)
2444 && simplejump_p (copy))
2445 {
2446 jump_chain[INSN_UID (copy)]
2447 = jump_chain[INSN_UID (JUMP_LABEL (copy))];
2448 jump_chain[INSN_UID (JUMP_LABEL (copy))] = copy;
2449 }
2450 break;
2451
2452 default:
2453 abort ();
2454 }
2455
2456 /* Now clean up by emitting a jump to the end label and deleting the jump
2457 at the start of the loop. */
2458 if (! copy || GET_CODE (copy) != BARRIER)
2459 {
2460 copy = emit_jump_insn_before (gen_jump (get_label_after (insn)),
2461 loop_start);
2462 mark_jump_label (PATTERN (copy), copy, 0);
2463 if (INSN_UID (copy) < max_jump_chain
2464 && INSN_UID (JUMP_LABEL (copy)) < max_jump_chain)
2465 {
2466 jump_chain[INSN_UID (copy)]
2467 = jump_chain[INSN_UID (JUMP_LABEL (copy))];
2468 jump_chain[INSN_UID (JUMP_LABEL (copy))] = copy;
2469 }
2470 emit_barrier_before (loop_start);
2471 }
2472
2473 /* Mark the exit code as the virtual top of the converted loop. */
2474 emit_note_before (NOTE_INSN_LOOP_VTOP, exitcode);
2475
2476 delete_insn (next_nonnote_insn (loop_start));
2477
2478 return 1;
2479 }
2480 \f
2481 /* Move all block-beg, block-end, loop-beg, loop-cont, loop-vtop, and
2482 loop-end notes between START and END out before START. Assume that
2483 END is not such a note. START may be such a note. Returns the value
2484 of the new starting insn, which may be different if the original start
2485 was such a note. */
2486
2487 rtx
2488 squeeze_notes (start, end)
2489 rtx start, end;
2490 {
2491 rtx insn;
2492 rtx next;
2493
2494 for (insn = start; insn != end; insn = next)
2495 {
2496 next = NEXT_INSN (insn);
2497 if (GET_CODE (insn) == NOTE
2498 && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END
2499 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2500 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
2501 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END
2502 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT
2503 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP))
2504 {
2505 if (insn == start)
2506 start = next;
2507 else
2508 {
2509 rtx prev = PREV_INSN (insn);
2510 PREV_INSN (insn) = PREV_INSN (start);
2511 NEXT_INSN (insn) = start;
2512 NEXT_INSN (PREV_INSN (insn)) = insn;
2513 PREV_INSN (NEXT_INSN (insn)) = insn;
2514 NEXT_INSN (prev) = next;
2515 PREV_INSN (next) = prev;
2516 }
2517 }
2518 }
2519
2520 return start;
2521 }
2522 \f
2523 /* Compare the instructions before insn E1 with those before E2
2524 to find an opportunity for cross jumping.
2525 (This means detecting identical sequences of insns followed by
2526 jumps to the same place, or followed by a label and a jump
2527 to that label, and replacing one with a jump to the other.)
2528
2529 Assume E1 is a jump that jumps to label E2
2530 (that is not always true but it might as well be).
2531 Find the longest possible equivalent sequences
2532 and store the first insns of those sequences into *F1 and *F2.
2533 Store zero there if no equivalent preceding instructions are found.
2534
2535 We give up if we find a label in stream 1.
2536 Actually we could transfer that label into stream 2. */
2537
2538 static void
2539 find_cross_jump (e1, e2, minimum, f1, f2)
2540 rtx e1, e2;
2541 int minimum;
2542 rtx *f1, *f2;
2543 {
2544 register rtx i1 = e1, i2 = e2;
2545 register rtx p1, p2;
2546 int lose = 0;
2547
2548 rtx last1 = 0, last2 = 0;
2549 rtx afterlast1 = 0, afterlast2 = 0;
2550 rtx prev1;
2551
2552 *f1 = 0;
2553 *f2 = 0;
2554
2555 while (1)
2556 {
2557 i1 = prev_nonnote_insn (i1);
2558
2559 i2 = PREV_INSN (i2);
2560 while (i2 && (GET_CODE (i2) == NOTE || GET_CODE (i2) == CODE_LABEL))
2561 i2 = PREV_INSN (i2);
2562
2563 if (i1 == 0)
2564 break;
2565
2566 /* Don't allow the range of insns preceding E1 or E2
2567 to include the other (E2 or E1). */
2568 if (i2 == e1 || i1 == e2)
2569 break;
2570
2571 /* If we will get to this code by jumping, those jumps will be
2572 tensioned to go directly to the new label (before I2),
2573 so this cross-jumping won't cost extra. So reduce the minimum. */
2574 if (GET_CODE (i1) == CODE_LABEL)
2575 {
2576 --minimum;
2577 break;
2578 }
2579
2580 if (i2 == 0 || GET_CODE (i1) != GET_CODE (i2))
2581 break;
2582
2583 p1 = PATTERN (i1);
2584 p2 = PATTERN (i2);
2585
2586 /* If this is a CALL_INSN, compare register usage information.
2587 If we don't check this on stack register machines, the two
2588 CALL_INSNs might be merged leaving reg-stack.c with mismatching
2589 numbers of stack registers in the same basic block.
2590 If we don't check this on machines with delay slots, a delay slot may
2591 be filled that clobbers a parameter expected by the subroutine.
2592
2593 ??? We take the simple route for now and assume that if they're
2594 equal, they were constructed identically. */
2595
2596 if (GET_CODE (i1) == CALL_INSN
2597 && ! rtx_equal_p (CALL_INSN_FUNCTION_USAGE (i1),
2598 CALL_INSN_FUNCTION_USAGE (i2)))
2599 lose = 1;
2600
2601 #ifdef STACK_REGS
2602 /* If cross_jump_death_matters is not 0, the insn's mode
2603 indicates whether or not the insn contains any stack-like
2604 regs. */
2605
2606 if (!lose && cross_jump_death_matters && GET_MODE (i1) == QImode)
2607 {
2608 /* If register stack conversion has already been done, then
2609 death notes must also be compared before it is certain that
2610 the two instruction streams match. */
2611
2612 rtx note;
2613 HARD_REG_SET i1_regset, i2_regset;
2614
2615 CLEAR_HARD_REG_SET (i1_regset);
2616 CLEAR_HARD_REG_SET (i2_regset);
2617
2618 for (note = REG_NOTES (i1); note; note = XEXP (note, 1))
2619 if (REG_NOTE_KIND (note) == REG_DEAD
2620 && STACK_REG_P (XEXP (note, 0)))
2621 SET_HARD_REG_BIT (i1_regset, REGNO (XEXP (note, 0)));
2622
2623 for (note = REG_NOTES (i2); note; note = XEXP (note, 1))
2624 if (REG_NOTE_KIND (note) == REG_DEAD
2625 && STACK_REG_P (XEXP (note, 0)))
2626 SET_HARD_REG_BIT (i2_regset, REGNO (XEXP (note, 0)));
2627
2628 GO_IF_HARD_REG_EQUAL (i1_regset, i2_regset, done);
2629
2630 lose = 1;
2631
2632 done:
2633 ;
2634 }
2635 #endif
2636
2637 /* Don't allow old-style asm or volatile extended asms to be accepted
2638 for cross jumping purposes. It is conceptually correct to allow
2639 them, since cross-jumping preserves the dynamic instruction order
2640 even though it is changing the static instruction order. However,
2641 if an asm is being used to emit an assembler pseudo-op, such as
2642 the MIPS `.set reorder' pseudo-op, then the static instruction order
2643 matters and it must be preserved. */
2644 if (GET_CODE (p1) == ASM_INPUT || GET_CODE (p2) == ASM_INPUT
2645 || (GET_CODE (p1) == ASM_OPERANDS && MEM_VOLATILE_P (p1))
2646 || (GET_CODE (p2) == ASM_OPERANDS && MEM_VOLATILE_P (p2)))
2647 lose = 1;
2648
2649 if (lose || GET_CODE (p1) != GET_CODE (p2)
2650 || ! rtx_renumbered_equal_p (p1, p2))
2651 {
2652 /* The following code helps take care of G++ cleanups. */
2653 rtx equiv1;
2654 rtx equiv2;
2655
2656 if (!lose && GET_CODE (p1) == GET_CODE (p2)
2657 && ((equiv1 = find_reg_note (i1, REG_EQUAL, NULL_RTX)) != 0
2658 || (equiv1 = find_reg_note (i1, REG_EQUIV, NULL_RTX)) != 0)
2659 && ((equiv2 = find_reg_note (i2, REG_EQUAL, NULL_RTX)) != 0
2660 || (equiv2 = find_reg_note (i2, REG_EQUIV, NULL_RTX)) != 0)
2661 /* If the equivalences are not to a constant, they may
2662 reference pseudos that no longer exist, so we can't
2663 use them. */
2664 && CONSTANT_P (XEXP (equiv1, 0))
2665 && rtx_equal_p (XEXP (equiv1, 0), XEXP (equiv2, 0)))
2666 {
2667 rtx s1 = single_set (i1);
2668 rtx s2 = single_set (i2);
2669 if (s1 != 0 && s2 != 0
2670 && rtx_renumbered_equal_p (SET_DEST (s1), SET_DEST (s2)))
2671 {
2672 validate_change (i1, &SET_SRC (s1), XEXP (equiv1, 0), 1);
2673 validate_change (i2, &SET_SRC (s2), XEXP (equiv2, 0), 1);
2674 if (! rtx_renumbered_equal_p (p1, p2))
2675 cancel_changes (0);
2676 else if (apply_change_group ())
2677 goto win;
2678 }
2679 }
2680
2681 /* Insns fail to match; cross jumping is limited to the following
2682 insns. */
2683
2684 #ifdef HAVE_cc0
2685 /* Don't allow the insn after a compare to be shared by
2686 cross-jumping unless the compare is also shared.
2687 Here, if either of these non-matching insns is a compare,
2688 exclude the following insn from possible cross-jumping. */
2689 if (sets_cc0_p (p1) || sets_cc0_p (p2))
2690 last1 = afterlast1, last2 = afterlast2, ++minimum;
2691 #endif
2692
2693 /* If cross-jumping here will feed a jump-around-jump
2694 optimization, this jump won't cost extra, so reduce
2695 the minimum. */
2696 if (GET_CODE (i1) == JUMP_INSN
2697 && JUMP_LABEL (i1)
2698 && prev_real_insn (JUMP_LABEL (i1)) == e1)
2699 --minimum;
2700 break;
2701 }
2702
2703 win:
2704 if (GET_CODE (p1) != USE && GET_CODE (p1) != CLOBBER)
2705 {
2706 /* Ok, this insn is potentially includable in a cross-jump here. */
2707 afterlast1 = last1, afterlast2 = last2;
2708 last1 = i1, last2 = i2, --minimum;
2709 }
2710 }
2711
2712 if (minimum <= 0 && last1 != 0 && last1 != e1)
2713 *f1 = last1, *f2 = last2;
2714 }
2715
2716 static void
2717 do_cross_jump (insn, newjpos, newlpos)
2718 rtx insn, newjpos, newlpos;
2719 {
2720 /* Find an existing label at this point
2721 or make a new one if there is none. */
2722 register rtx label = get_label_before (newlpos);
2723
2724 /* Make the same jump insn jump to the new point. */
2725 if (GET_CODE (PATTERN (insn)) == RETURN)
2726 {
2727 /* Remove from jump chain of returns. */
2728 delete_from_jump_chain (insn);
2729 /* Change the insn. */
2730 PATTERN (insn) = gen_jump (label);
2731 INSN_CODE (insn) = -1;
2732 JUMP_LABEL (insn) = label;
2733 LABEL_NUSES (label)++;
2734 /* Add to new the jump chain. */
2735 if (INSN_UID (label) < max_jump_chain
2736 && INSN_UID (insn) < max_jump_chain)
2737 {
2738 jump_chain[INSN_UID (insn)] = jump_chain[INSN_UID (label)];
2739 jump_chain[INSN_UID (label)] = insn;
2740 }
2741 }
2742 else
2743 redirect_jump (insn, label);
2744
2745 /* Delete the matching insns before the jump. Also, remove any REG_EQUAL
2746 or REG_EQUIV note in the NEWLPOS stream that isn't also present in
2747 the NEWJPOS stream. */
2748
2749 while (newjpos != insn)
2750 {
2751 rtx lnote;
2752
2753 for (lnote = REG_NOTES (newlpos); lnote; lnote = XEXP (lnote, 1))
2754 if ((REG_NOTE_KIND (lnote) == REG_EQUAL
2755 || REG_NOTE_KIND (lnote) == REG_EQUIV)
2756 && ! find_reg_note (newjpos, REG_EQUAL, XEXP (lnote, 0))
2757 && ! find_reg_note (newjpos, REG_EQUIV, XEXP (lnote, 0)))
2758 remove_note (newlpos, lnote);
2759
2760 delete_insn (newjpos);
2761 newjpos = next_real_insn (newjpos);
2762 newlpos = next_real_insn (newlpos);
2763 }
2764 }
2765 \f
2766 /* Return the label before INSN, or put a new label there. */
2767
2768 rtx
2769 get_label_before (insn)
2770 rtx insn;
2771 {
2772 rtx label;
2773
2774 /* Find an existing label at this point
2775 or make a new one if there is none. */
2776 label = prev_nonnote_insn (insn);
2777
2778 if (label == 0 || GET_CODE (label) != CODE_LABEL)
2779 {
2780 rtx prev = PREV_INSN (insn);
2781
2782 label = gen_label_rtx ();
2783 emit_label_after (label, prev);
2784 LABEL_NUSES (label) = 0;
2785 }
2786 return label;
2787 }
2788
2789 /* Return the label after INSN, or put a new label there. */
2790
2791 rtx
2792 get_label_after (insn)
2793 rtx insn;
2794 {
2795 rtx label;
2796
2797 /* Find an existing label at this point
2798 or make a new one if there is none. */
2799 label = next_nonnote_insn (insn);
2800
2801 if (label == 0 || GET_CODE (label) != CODE_LABEL)
2802 {
2803 label = gen_label_rtx ();
2804 emit_label_after (label, insn);
2805 LABEL_NUSES (label) = 0;
2806 }
2807 return label;
2808 }
2809 \f
2810 /* Return 1 if INSN is a jump that jumps to right after TARGET
2811 only on the condition that TARGET itself would drop through.
2812 Assumes that TARGET is a conditional jump. */
2813
2814 static int
2815 jump_back_p (insn, target)
2816 rtx insn, target;
2817 {
2818 rtx cinsn, ctarget;
2819 enum rtx_code codei, codet;
2820
2821 if (simplejump_p (insn) || ! condjump_p (insn)
2822 || simplejump_p (target)
2823 || target != prev_real_insn (JUMP_LABEL (insn)))
2824 return 0;
2825
2826 cinsn = XEXP (SET_SRC (PATTERN (insn)), 0);
2827 ctarget = XEXP (SET_SRC (PATTERN (target)), 0);
2828
2829 codei = GET_CODE (cinsn);
2830 codet = GET_CODE (ctarget);
2831
2832 if (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx)
2833 {
2834 if (! can_reverse_comparison_p (cinsn, insn))
2835 return 0;
2836 codei = reverse_condition (codei);
2837 }
2838
2839 if (XEXP (SET_SRC (PATTERN (target)), 2) == pc_rtx)
2840 {
2841 if (! can_reverse_comparison_p (ctarget, target))
2842 return 0;
2843 codet = reverse_condition (codet);
2844 }
2845
2846 return (codei == codet
2847 && rtx_renumbered_equal_p (XEXP (cinsn, 0), XEXP (ctarget, 0))
2848 && rtx_renumbered_equal_p (XEXP (cinsn, 1), XEXP (ctarget, 1)));
2849 }
2850 \f
2851 /* Given a comparison, COMPARISON, inside a conditional jump insn, INSN,
2852 return non-zero if it is safe to reverse this comparison. It is if our
2853 floating-point is not IEEE, if this is an NE or EQ comparison, or if
2854 this is known to be an integer comparison. */
2855
2856 int
2857 can_reverse_comparison_p (comparison, insn)
2858 rtx comparison;
2859 rtx insn;
2860 {
2861 rtx arg0;
2862
2863 /* If this is not actually a comparison, we can't reverse it. */
2864 if (GET_RTX_CLASS (GET_CODE (comparison)) != '<')
2865 return 0;
2866
2867 if (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
2868 /* If this is an NE comparison, it is safe to reverse it to an EQ
2869 comparison and vice versa, even for floating point. If no operands
2870 are NaNs, the reversal is valid. If some operand is a NaN, EQ is
2871 always false and NE is always true, so the reversal is also valid. */
2872 || flag_fast_math
2873 || GET_CODE (comparison) == NE
2874 || GET_CODE (comparison) == EQ)
2875 return 1;
2876
2877 arg0 = XEXP (comparison, 0);
2878
2879 /* Make sure ARG0 is one of the actual objects being compared. If we
2880 can't do this, we can't be sure the comparison can be reversed.
2881
2882 Handle cc0 and a MODE_CC register. */
2883 if ((GET_CODE (arg0) == REG && GET_MODE_CLASS (GET_MODE (arg0)) == MODE_CC)
2884 #ifdef HAVE_cc0
2885 || arg0 == cc0_rtx
2886 #endif
2887 )
2888 {
2889 rtx prev = prev_nonnote_insn (insn);
2890 rtx set = single_set (prev);
2891
2892 if (set == 0 || SET_DEST (set) != arg0)
2893 return 0;
2894
2895 arg0 = SET_SRC (set);
2896
2897 if (GET_CODE (arg0) == COMPARE)
2898 arg0 = XEXP (arg0, 0);
2899 }
2900
2901 /* We can reverse this if ARG0 is a CONST_INT or if its mode is
2902 not VOIDmode and neither a MODE_CC nor MODE_FLOAT type. */
2903 return (GET_CODE (arg0) == CONST_INT
2904 || (GET_MODE (arg0) != VOIDmode
2905 && GET_MODE_CLASS (GET_MODE (arg0)) != MODE_CC
2906 && GET_MODE_CLASS (GET_MODE (arg0)) != MODE_FLOAT));
2907 }
2908
2909 /* Given an rtx-code for a comparison, return the code
2910 for the negated comparison.
2911 WATCH OUT! reverse_condition is not safe to use on a jump
2912 that might be acting on the results of an IEEE floating point comparison,
2913 because of the special treatment of non-signaling nans in comparisons.
2914 Use can_reverse_comparison_p to be sure. */
2915
2916 enum rtx_code
2917 reverse_condition (code)
2918 enum rtx_code code;
2919 {
2920 switch (code)
2921 {
2922 case EQ:
2923 return NE;
2924
2925 case NE:
2926 return EQ;
2927
2928 case GT:
2929 return LE;
2930
2931 case GE:
2932 return LT;
2933
2934 case LT:
2935 return GE;
2936
2937 case LE:
2938 return GT;
2939
2940 case GTU:
2941 return LEU;
2942
2943 case GEU:
2944 return LTU;
2945
2946 case LTU:
2947 return GEU;
2948
2949 case LEU:
2950 return GTU;
2951
2952 default:
2953 abort ();
2954 return UNKNOWN;
2955 }
2956 }
2957
2958 /* Similar, but return the code when two operands of a comparison are swapped.
2959 This IS safe for IEEE floating-point. */
2960
2961 enum rtx_code
2962 swap_condition (code)
2963 enum rtx_code code;
2964 {
2965 switch (code)
2966 {
2967 case EQ:
2968 case NE:
2969 return code;
2970
2971 case GT:
2972 return LT;
2973
2974 case GE:
2975 return LE;
2976
2977 case LT:
2978 return GT;
2979
2980 case LE:
2981 return GE;
2982
2983 case GTU:
2984 return LTU;
2985
2986 case GEU:
2987 return LEU;
2988
2989 case LTU:
2990 return GTU;
2991
2992 case LEU:
2993 return GEU;
2994
2995 default:
2996 abort ();
2997 return UNKNOWN;
2998 }
2999 }
3000
3001 /* Given a comparison CODE, return the corresponding unsigned comparison.
3002 If CODE is an equality comparison or already an unsigned comparison,
3003 CODE is returned. */
3004
3005 enum rtx_code
3006 unsigned_condition (code)
3007 enum rtx_code code;
3008 {
3009 switch (code)
3010 {
3011 case EQ:
3012 case NE:
3013 case GTU:
3014 case GEU:
3015 case LTU:
3016 case LEU:
3017 return code;
3018
3019 case GT:
3020 return GTU;
3021
3022 case GE:
3023 return GEU;
3024
3025 case LT:
3026 return LTU;
3027
3028 case LE:
3029 return LEU;
3030
3031 default:
3032 abort ();
3033 }
3034 }
3035
3036 /* Similarly, return the signed version of a comparison. */
3037
3038 enum rtx_code
3039 signed_condition (code)
3040 enum rtx_code code;
3041 {
3042 switch (code)
3043 {
3044 case EQ:
3045 case NE:
3046 case GT:
3047 case GE:
3048 case LT:
3049 case LE:
3050 return code;
3051
3052 case GTU:
3053 return GT;
3054
3055 case GEU:
3056 return GE;
3057
3058 case LTU:
3059 return LT;
3060
3061 case LEU:
3062 return LE;
3063
3064 default:
3065 abort ();
3066 }
3067 }
3068 \f
3069 /* Return non-zero if CODE1 is more strict than CODE2, i.e., if the
3070 truth of CODE1 implies the truth of CODE2. */
3071
3072 int
3073 comparison_dominates_p (code1, code2)
3074 enum rtx_code code1, code2;
3075 {
3076 if (code1 == code2)
3077 return 1;
3078
3079 switch (code1)
3080 {
3081 case EQ:
3082 if (code2 == LE || code2 == LEU || code2 == GE || code2 == GEU)
3083 return 1;
3084 break;
3085
3086 case LT:
3087 if (code2 == LE || code2 == NE)
3088 return 1;
3089 break;
3090
3091 case GT:
3092 if (code2 == GE || code2 == NE)
3093 return 1;
3094 break;
3095
3096 case LTU:
3097 if (code2 == LEU || code2 == NE)
3098 return 1;
3099 break;
3100
3101 case GTU:
3102 if (code2 == GEU || code2 == NE)
3103 return 1;
3104 break;
3105
3106 default:
3107 break;
3108 }
3109
3110 return 0;
3111 }
3112 \f
3113 /* Return 1 if INSN is an unconditional jump and nothing else. */
3114
3115 int
3116 simplejump_p (insn)
3117 rtx insn;
3118 {
3119 return (GET_CODE (insn) == JUMP_INSN
3120 && GET_CODE (PATTERN (insn)) == SET
3121 && GET_CODE (SET_DEST (PATTERN (insn))) == PC
3122 && GET_CODE (SET_SRC (PATTERN (insn))) == LABEL_REF);
3123 }
3124
3125 /* Return nonzero if INSN is a (possibly) conditional jump
3126 and nothing more. */
3127
3128 int
3129 condjump_p (insn)
3130 rtx insn;
3131 {
3132 register rtx x = PATTERN (insn);
3133 if (GET_CODE (x) != SET)
3134 return 0;
3135 if (GET_CODE (SET_DEST (x)) != PC)
3136 return 0;
3137 if (GET_CODE (SET_SRC (x)) == LABEL_REF)
3138 return 1;
3139 if (GET_CODE (SET_SRC (x)) != IF_THEN_ELSE)
3140 return 0;
3141 if (XEXP (SET_SRC (x), 2) == pc_rtx
3142 && (GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF
3143 || GET_CODE (XEXP (SET_SRC (x), 1)) == RETURN))
3144 return 1;
3145 if (XEXP (SET_SRC (x), 1) == pc_rtx
3146 && (GET_CODE (XEXP (SET_SRC (x), 2)) == LABEL_REF
3147 || GET_CODE (XEXP (SET_SRC (x), 2)) == RETURN))
3148 return 1;
3149 return 0;
3150 }
3151
3152 /* Return nonzero if INSN is a (possibly) conditional jump
3153 and nothing more. */
3154
3155 int
3156 condjump_in_parallel_p (insn)
3157 rtx insn;
3158 {
3159 register rtx x = PATTERN (insn);
3160
3161 if (GET_CODE (x) != PARALLEL)
3162 return 0;
3163 else
3164 x = XVECEXP (x, 0, 0);
3165
3166 if (GET_CODE (x) != SET)
3167 return 0;
3168 if (GET_CODE (SET_DEST (x)) != PC)
3169 return 0;
3170 if (GET_CODE (SET_SRC (x)) == LABEL_REF)
3171 return 1;
3172 if (GET_CODE (SET_SRC (x)) != IF_THEN_ELSE)
3173 return 0;
3174 if (XEXP (SET_SRC (x), 2) == pc_rtx
3175 && (GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF
3176 || GET_CODE (XEXP (SET_SRC (x), 1)) == RETURN))
3177 return 1;
3178 if (XEXP (SET_SRC (x), 1) == pc_rtx
3179 && (GET_CODE (XEXP (SET_SRC (x), 2)) == LABEL_REF
3180 || GET_CODE (XEXP (SET_SRC (x), 2)) == RETURN))
3181 return 1;
3182 return 0;
3183 }
3184
3185 /* Return 1 if X is an RTX that does nothing but set the condition codes
3186 and CLOBBER or USE registers.
3187 Return -1 if X does explicitly set the condition codes,
3188 but also does other things. */
3189
3190 int
3191 sets_cc0_p (x)
3192 rtx x;
3193 {
3194 #ifdef HAVE_cc0
3195 if (GET_CODE (x) == SET && SET_DEST (x) == cc0_rtx)
3196 return 1;
3197 if (GET_CODE (x) == PARALLEL)
3198 {
3199 int i;
3200 int sets_cc0 = 0;
3201 int other_things = 0;
3202 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
3203 {
3204 if (GET_CODE (XVECEXP (x, 0, i)) == SET
3205 && SET_DEST (XVECEXP (x, 0, i)) == cc0_rtx)
3206 sets_cc0 = 1;
3207 else if (GET_CODE (XVECEXP (x, 0, i)) == SET)
3208 other_things = 1;
3209 }
3210 return ! sets_cc0 ? 0 : other_things ? -1 : 1;
3211 }
3212 return 0;
3213 #else
3214 abort ();
3215 #endif
3216 }
3217 \f
3218 /* Follow any unconditional jump at LABEL;
3219 return the ultimate label reached by any such chain of jumps.
3220 If LABEL is not followed by a jump, return LABEL.
3221 If the chain loops or we can't find end, return LABEL,
3222 since that tells caller to avoid changing the insn.
3223
3224 If RELOAD_COMPLETED is 0, we do not chain across a NOTE_INSN_LOOP_BEG or
3225 a USE or CLOBBER. */
3226
3227 rtx
3228 follow_jumps (label)
3229 rtx label;
3230 {
3231 register rtx insn;
3232 register rtx next;
3233 register rtx value = label;
3234 register int depth;
3235
3236 for (depth = 0;
3237 (depth < 10
3238 && (insn = next_active_insn (value)) != 0
3239 && GET_CODE (insn) == JUMP_INSN
3240 && ((JUMP_LABEL (insn) != 0 && simplejump_p (insn))
3241 || GET_CODE (PATTERN (insn)) == RETURN)
3242 && (next = NEXT_INSN (insn))
3243 && GET_CODE (next) == BARRIER);
3244 depth++)
3245 {
3246 /* Don't chain through the insn that jumps into a loop
3247 from outside the loop,
3248 since that would create multiple loop entry jumps
3249 and prevent loop optimization. */
3250 rtx tem;
3251 if (!reload_completed)
3252 for (tem = value; tem != insn; tem = NEXT_INSN (tem))
3253 if (GET_CODE (tem) == NOTE
3254 && (NOTE_LINE_NUMBER (tem) == NOTE_INSN_LOOP_BEG
3255 /* ??? Optional. Disables some optimizations, but makes
3256 gcov output more accurate with -O. */
3257 || (flag_test_coverage && NOTE_LINE_NUMBER (tem) > 0)))
3258 return value;
3259
3260 /* If we have found a cycle, make the insn jump to itself. */
3261 if (JUMP_LABEL (insn) == label)
3262 return label;
3263
3264 tem = next_active_insn (JUMP_LABEL (insn));
3265 if (tem && (GET_CODE (PATTERN (tem)) == ADDR_VEC
3266 || GET_CODE (PATTERN (tem)) == ADDR_DIFF_VEC))
3267 break;
3268
3269 value = JUMP_LABEL (insn);
3270 }
3271 if (depth == 10)
3272 return label;
3273 return value;
3274 }
3275
3276 /* Assuming that field IDX of X is a vector of label_refs,
3277 replace each of them by the ultimate label reached by it.
3278 Return nonzero if a change is made.
3279 If IGNORE_LOOPS is 0, we do not chain across a NOTE_INSN_LOOP_BEG. */
3280
3281 static int
3282 tension_vector_labels (x, idx)
3283 register rtx x;
3284 register int idx;
3285 {
3286 int changed = 0;
3287 register int i;
3288 for (i = XVECLEN (x, idx) - 1; i >= 0; i--)
3289 {
3290 register rtx olabel = XEXP (XVECEXP (x, idx, i), 0);
3291 register rtx nlabel = follow_jumps (olabel);
3292 if (nlabel && nlabel != olabel)
3293 {
3294 XEXP (XVECEXP (x, idx, i), 0) = nlabel;
3295 ++LABEL_NUSES (nlabel);
3296 if (--LABEL_NUSES (olabel) == 0)
3297 delete_insn (olabel);
3298 changed = 1;
3299 }
3300 }
3301 return changed;
3302 }
3303 \f
3304 /* Find all CODE_LABELs referred to in X, and increment their use counts.
3305 If INSN is a JUMP_INSN and there is at least one CODE_LABEL referenced
3306 in INSN, then store one of them in JUMP_LABEL (INSN).
3307 If INSN is an INSN or a CALL_INSN and there is at least one CODE_LABEL
3308 referenced in INSN, add a REG_LABEL note containing that label to INSN.
3309 Also, when there are consecutive labels, canonicalize on the last of them.
3310
3311 Note that two labels separated by a loop-beginning note
3312 must be kept distinct if we have not yet done loop-optimization,
3313 because the gap between them is where loop-optimize
3314 will want to move invariant code to. CROSS_JUMP tells us
3315 that loop-optimization is done with.
3316
3317 Once reload has completed (CROSS_JUMP non-zero), we need not consider
3318 two labels distinct if they are separated by only USE or CLOBBER insns. */
3319
3320 static void
3321 mark_jump_label (x, insn, cross_jump)
3322 register rtx x;
3323 rtx insn;
3324 int cross_jump;
3325 {
3326 register RTX_CODE code = GET_CODE (x);
3327 register int i;
3328 register char *fmt;
3329
3330 switch (code)
3331 {
3332 case PC:
3333 case CC0:
3334 case REG:
3335 case SUBREG:
3336 case CONST_INT:
3337 case SYMBOL_REF:
3338 case CONST_DOUBLE:
3339 case CLOBBER:
3340 case CALL:
3341 return;
3342
3343 case MEM:
3344 /* If this is a constant-pool reference, see if it is a label. */
3345 if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
3346 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)))
3347 mark_jump_label (get_pool_constant (XEXP (x, 0)), insn, cross_jump);
3348 break;
3349
3350 case LABEL_REF:
3351 {
3352 rtx label = XEXP (x, 0);
3353 rtx olabel = label;
3354 rtx note;
3355 rtx next;
3356
3357 if (GET_CODE (label) != CODE_LABEL)
3358 abort ();
3359
3360 /* Ignore references to labels of containing functions. */
3361 if (LABEL_REF_NONLOCAL_P (x))
3362 break;
3363
3364 /* If there are other labels following this one,
3365 replace it with the last of the consecutive labels. */
3366 for (next = NEXT_INSN (label); next; next = NEXT_INSN (next))
3367 {
3368 if (GET_CODE (next) == CODE_LABEL)
3369 label = next;
3370 else if (cross_jump && GET_CODE (next) == INSN
3371 && (GET_CODE (PATTERN (next)) == USE
3372 || GET_CODE (PATTERN (next)) == CLOBBER))
3373 continue;
3374 else if (GET_CODE (next) != NOTE)
3375 break;
3376 else if (! cross_jump
3377 && (NOTE_LINE_NUMBER (next) == NOTE_INSN_LOOP_BEG
3378 || NOTE_LINE_NUMBER (next) == NOTE_INSN_FUNCTION_END
3379 /* ??? Optional. Disables some optimizations, but
3380 makes gcov output more accurate with -O. */
3381 || (flag_test_coverage && NOTE_LINE_NUMBER (next) > 0)))
3382 break;
3383 }
3384
3385 XEXP (x, 0) = label;
3386 ++LABEL_NUSES (label);
3387
3388 if (insn)
3389 {
3390 if (GET_CODE (insn) == JUMP_INSN)
3391 JUMP_LABEL (insn) = label;
3392
3393 /* If we've changed OLABEL and we had a REG_LABEL note
3394 for it, update it as well. */
3395 else if (label != olabel
3396 && (note = find_reg_note (insn, REG_LABEL, olabel)) != 0)
3397 XEXP (note, 0) = label;
3398
3399 /* Otherwise, add a REG_LABEL note for LABEL unless there already
3400 is one. */
3401 else if (! find_reg_note (insn, REG_LABEL, label))
3402 {
3403 rtx next = next_real_insn (label);
3404 /* Don't record labels that refer to dispatch tables.
3405 This is not necessary, since the tablejump
3406 references the same label.
3407 And if we did record them, flow.c would make worse code. */
3408 if (next == 0
3409 || ! (GET_CODE (next) == JUMP_INSN
3410 && (GET_CODE (PATTERN (next)) == ADDR_VEC
3411 || GET_CODE (PATTERN (next)) == ADDR_DIFF_VEC)))
3412 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, label,
3413 REG_NOTES (insn));
3414 }
3415 }
3416 return;
3417 }
3418
3419 /* Do walk the labels in a vector, but not the first operand of an
3420 ADDR_DIFF_VEC. Don't set the JUMP_LABEL of a vector. */
3421 case ADDR_VEC:
3422 case ADDR_DIFF_VEC:
3423 {
3424 int eltnum = code == ADDR_DIFF_VEC ? 1 : 0;
3425
3426 for (i = 0; i < XVECLEN (x, eltnum); i++)
3427 mark_jump_label (XVECEXP (x, eltnum, i), NULL_RTX, cross_jump);
3428 }
3429 return;
3430
3431 default:
3432 break;
3433 }
3434
3435 fmt = GET_RTX_FORMAT (code);
3436 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3437 {
3438 if (fmt[i] == 'e')
3439 mark_jump_label (XEXP (x, i), insn, cross_jump);
3440 else if (fmt[i] == 'E')
3441 {
3442 register int j;
3443 for (j = 0; j < XVECLEN (x, i); j++)
3444 mark_jump_label (XVECEXP (x, i, j), insn, cross_jump);
3445 }
3446 }
3447 }
3448
3449 /* If all INSN does is set the pc, delete it,
3450 and delete the insn that set the condition codes for it
3451 if that's what the previous thing was. */
3452
3453 void
3454 delete_jump (insn)
3455 rtx insn;
3456 {
3457 register rtx set = single_set (insn);
3458
3459 if (set && GET_CODE (SET_DEST (set)) == PC)
3460 delete_computation (insn);
3461 }
3462
3463 /* Delete INSN and recursively delete insns that compute values used only
3464 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3465 If we are running before flow.c, we need do nothing since flow.c will
3466 delete dead code. We also can't know if the registers being used are
3467 dead or not at this point.
3468
3469 Otherwise, look at all our REG_DEAD notes. If a previous insn does
3470 nothing other than set a register that dies in this insn, we can delete
3471 that insn as well.
3472
3473 On machines with CC0, if CC0 is used in this insn, we may be able to
3474 delete the insn that set it. */
3475
3476 static void
3477 delete_computation (insn)
3478 rtx insn;
3479 {
3480 rtx note, next;
3481
3482 #ifdef HAVE_cc0
3483 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
3484 {
3485 rtx prev = prev_nonnote_insn (insn);
3486 /* We assume that at this stage
3487 CC's are always set explicitly
3488 and always immediately before the jump that
3489 will use them. So if the previous insn
3490 exists to set the CC's, delete it
3491 (unless it performs auto-increments, etc.). */
3492 if (prev && GET_CODE (prev) == INSN
3493 && sets_cc0_p (PATTERN (prev)))
3494 {
3495 if (sets_cc0_p (PATTERN (prev)) > 0
3496 && !FIND_REG_INC_NOTE (prev, NULL_RTX))
3497 delete_computation (prev);
3498 else
3499 /* Otherwise, show that cc0 won't be used. */
3500 REG_NOTES (prev) = gen_rtx_EXPR_LIST (REG_UNUSED,
3501 cc0_rtx, REG_NOTES (prev));
3502 }
3503 }
3504 #endif
3505
3506 for (note = REG_NOTES (insn); note; note = next)
3507 {
3508 rtx our_prev;
3509
3510 next = XEXP (note, 1);
3511
3512 if (REG_NOTE_KIND (note) != REG_DEAD
3513 /* Verify that the REG_NOTE is legitimate. */
3514 || GET_CODE (XEXP (note, 0)) != REG)
3515 continue;
3516
3517 for (our_prev = prev_nonnote_insn (insn);
3518 our_prev && GET_CODE (our_prev) == INSN;
3519 our_prev = prev_nonnote_insn (our_prev))
3520 {
3521 /* If we reach a SEQUENCE, it is too complex to try to
3522 do anything with it, so give up. */
3523 if (GET_CODE (PATTERN (our_prev)) == SEQUENCE)
3524 break;
3525
3526 if (GET_CODE (PATTERN (our_prev)) == USE
3527 && GET_CODE (XEXP (PATTERN (our_prev), 0)) == INSN)
3528 /* reorg creates USEs that look like this. We leave them
3529 alone because reorg needs them for its own purposes. */
3530 break;
3531
3532 if (reg_set_p (XEXP (note, 0), PATTERN (our_prev)))
3533 {
3534 if (FIND_REG_INC_NOTE (our_prev, NULL_RTX))
3535 break;
3536
3537 if (GET_CODE (PATTERN (our_prev)) == PARALLEL)
3538 {
3539 /* If we find a SET of something else, we can't
3540 delete the insn. */
3541
3542 int i;
3543
3544 for (i = 0; i < XVECLEN (PATTERN (our_prev), 0); i++)
3545 {
3546 rtx part = XVECEXP (PATTERN (our_prev), 0, i);
3547
3548 if (GET_CODE (part) == SET
3549 && SET_DEST (part) != XEXP (note, 0))
3550 break;
3551 }
3552
3553 if (i == XVECLEN (PATTERN (our_prev), 0))
3554 delete_computation (our_prev);
3555 }
3556 else if (GET_CODE (PATTERN (our_prev)) == SET
3557 && SET_DEST (PATTERN (our_prev)) == XEXP (note, 0))
3558 delete_computation (our_prev);
3559
3560 break;
3561 }
3562
3563 /* If OUR_PREV references the register that dies here, it is an
3564 additional use. Hence any prior SET isn't dead. However, this
3565 insn becomes the new place for the REG_DEAD note. */
3566 if (reg_overlap_mentioned_p (XEXP (note, 0),
3567 PATTERN (our_prev)))
3568 {
3569 XEXP (note, 1) = REG_NOTES (our_prev);
3570 REG_NOTES (our_prev) = note;
3571 break;
3572 }
3573 }
3574 }
3575
3576 delete_insn (insn);
3577 }
3578 \f
3579 /* Delete insn INSN from the chain of insns and update label ref counts.
3580 May delete some following insns as a consequence; may even delete
3581 a label elsewhere and insns that follow it.
3582
3583 Returns the first insn after INSN that was not deleted. */
3584
3585 rtx
3586 delete_insn (insn)
3587 register rtx insn;
3588 {
3589 register rtx next = NEXT_INSN (insn);
3590 register rtx prev = PREV_INSN (insn);
3591 register int was_code_label = (GET_CODE (insn) == CODE_LABEL);
3592 register int dont_really_delete = 0;
3593
3594 while (next && INSN_DELETED_P (next))
3595 next = NEXT_INSN (next);
3596
3597 /* This insn is already deleted => return first following nondeleted. */
3598 if (INSN_DELETED_P (insn))
3599 return next;
3600
3601 /* Don't delete user-declared labels. Convert them to special NOTEs
3602 instead. */
3603 if (was_code_label && LABEL_NAME (insn) != 0
3604 && optimize && ! dont_really_delete)
3605 {
3606 PUT_CODE (insn, NOTE);
3607 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED_LABEL;
3608 NOTE_SOURCE_FILE (insn) = 0;
3609 dont_really_delete = 1;
3610 }
3611 else
3612 /* Mark this insn as deleted. */
3613 INSN_DELETED_P (insn) = 1;
3614
3615 /* If this is an unconditional jump, delete it from the jump chain. */
3616 if (simplejump_p (insn))
3617 delete_from_jump_chain (insn);
3618
3619 /* If instruction is followed by a barrier,
3620 delete the barrier too. */
3621
3622 if (next != 0 && GET_CODE (next) == BARRIER)
3623 {
3624 INSN_DELETED_P (next) = 1;
3625 next = NEXT_INSN (next);
3626 }
3627
3628 /* Patch out INSN (and the barrier if any) */
3629
3630 if (optimize && ! dont_really_delete)
3631 {
3632 if (prev)
3633 {
3634 NEXT_INSN (prev) = next;
3635 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3636 NEXT_INSN (XVECEXP (PATTERN (prev), 0,
3637 XVECLEN (PATTERN (prev), 0) - 1)) = next;
3638 }
3639
3640 if (next)
3641 {
3642 PREV_INSN (next) = prev;
3643 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3644 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3645 }
3646
3647 if (prev && NEXT_INSN (prev) == 0)
3648 set_last_insn (prev);
3649 }
3650
3651 /* If deleting a jump, decrement the count of the label,
3652 and delete the label if it is now unused. */
3653
3654 if (GET_CODE (insn) == JUMP_INSN && JUMP_LABEL (insn))
3655 if (--LABEL_NUSES (JUMP_LABEL (insn)) == 0)
3656 {
3657 /* This can delete NEXT or PREV,
3658 either directly if NEXT is JUMP_LABEL (INSN),
3659 or indirectly through more levels of jumps. */
3660 delete_insn (JUMP_LABEL (insn));
3661 /* I feel a little doubtful about this loop,
3662 but I see no clean and sure alternative way
3663 to find the first insn after INSN that is not now deleted.
3664 I hope this works. */
3665 while (next && INSN_DELETED_P (next))
3666 next = NEXT_INSN (next);
3667 return next;
3668 }
3669
3670 /* Likewise if we're deleting a dispatch table. */
3671
3672 if (GET_CODE (insn) == JUMP_INSN
3673 && (GET_CODE (PATTERN (insn)) == ADDR_VEC
3674 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC))
3675 {
3676 rtx pat = PATTERN (insn);
3677 int i, diff_vec_p = GET_CODE (pat) == ADDR_DIFF_VEC;
3678 int len = XVECLEN (pat, diff_vec_p);
3679
3680 for (i = 0; i < len; i++)
3681 if (--LABEL_NUSES (XEXP (XVECEXP (pat, diff_vec_p, i), 0)) == 0)
3682 delete_insn (XEXP (XVECEXP (pat, diff_vec_p, i), 0));
3683 while (next && INSN_DELETED_P (next))
3684 next = NEXT_INSN (next);
3685 return next;
3686 }
3687
3688 while (prev && (INSN_DELETED_P (prev) || GET_CODE (prev) == NOTE))
3689 prev = PREV_INSN (prev);
3690
3691 /* If INSN was a label and a dispatch table follows it,
3692 delete the dispatch table. The tablejump must have gone already.
3693 It isn't useful to fall through into a table. */
3694
3695 if (was_code_label
3696 && NEXT_INSN (insn) != 0
3697 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN
3698 && (GET_CODE (PATTERN (NEXT_INSN (insn))) == ADDR_VEC
3699 || GET_CODE (PATTERN (NEXT_INSN (insn))) == ADDR_DIFF_VEC))
3700 next = delete_insn (NEXT_INSN (insn));
3701
3702 /* If INSN was a label, delete insns following it if now unreachable. */
3703
3704 if (was_code_label && prev && GET_CODE (prev) == BARRIER)
3705 {
3706 register RTX_CODE code;
3707 while (next != 0
3708 && (GET_RTX_CLASS (code = GET_CODE (next)) == 'i'
3709 || code == NOTE || code == BARRIER
3710 || (code == CODE_LABEL && INSN_DELETED_P (next))))
3711 {
3712 if (code == NOTE
3713 && NOTE_LINE_NUMBER (next) != NOTE_INSN_FUNCTION_END)
3714 next = NEXT_INSN (next);
3715 /* Keep going past other deleted labels to delete what follows. */
3716 else if (code == CODE_LABEL && INSN_DELETED_P (next))
3717 next = NEXT_INSN (next);
3718 else
3719 /* Note: if this deletes a jump, it can cause more
3720 deletion of unreachable code, after a different label.
3721 As long as the value from this recursive call is correct,
3722 this invocation functions correctly. */
3723 next = delete_insn (next);
3724 }
3725 }
3726
3727 return next;
3728 }
3729
3730 /* Advance from INSN till reaching something not deleted
3731 then return that. May return INSN itself. */
3732
3733 rtx
3734 next_nondeleted_insn (insn)
3735 rtx insn;
3736 {
3737 while (INSN_DELETED_P (insn))
3738 insn = NEXT_INSN (insn);
3739 return insn;
3740 }
3741 \f
3742 /* Delete a range of insns from FROM to TO, inclusive.
3743 This is for the sake of peephole optimization, so assume
3744 that whatever these insns do will still be done by a new
3745 peephole insn that will replace them. */
3746
3747 void
3748 delete_for_peephole (from, to)
3749 register rtx from, to;
3750 {
3751 register rtx insn = from;
3752
3753 while (1)
3754 {
3755 register rtx next = NEXT_INSN (insn);
3756 register rtx prev = PREV_INSN (insn);
3757
3758 if (GET_CODE (insn) != NOTE)
3759 {
3760 INSN_DELETED_P (insn) = 1;
3761
3762 /* Patch this insn out of the chain. */
3763 /* We don't do this all at once, because we
3764 must preserve all NOTEs. */
3765 if (prev)
3766 NEXT_INSN (prev) = next;
3767
3768 if (next)
3769 PREV_INSN (next) = prev;
3770 }
3771
3772 if (insn == to)
3773 break;
3774 insn = next;
3775 }
3776
3777 /* Note that if TO is an unconditional jump
3778 we *do not* delete the BARRIER that follows,
3779 since the peephole that replaces this sequence
3780 is also an unconditional jump in that case. */
3781 }
3782 \f
3783 /* Invert the condition of the jump JUMP, and make it jump
3784 to label NLABEL instead of where it jumps now. */
3785
3786 int
3787 invert_jump (jump, nlabel)
3788 rtx jump, nlabel;
3789 {
3790 /* We have to either invert the condition and change the label or
3791 do neither. Either operation could fail. We first try to invert
3792 the jump. If that succeeds, we try changing the label. If that fails,
3793 we invert the jump back to what it was. */
3794
3795 if (! invert_exp (PATTERN (jump), jump))
3796 return 0;
3797
3798 if (redirect_jump (jump, nlabel))
3799 {
3800 if (flag_branch_probabilities)
3801 {
3802 rtx note = find_reg_note (jump, REG_BR_PROB, 0);
3803
3804 /* An inverted jump means that a probability taken becomes a
3805 probability not taken. Subtract the branch probability from the
3806 probability base to convert it back to a taken probability.
3807 (We don't flip the probability on a branch that's never taken. */
3808 if (note && XINT (XEXP (note, 0), 0) >= 0)
3809 XINT (XEXP (note, 0), 0) = REG_BR_PROB_BASE - XINT (XEXP (note, 0), 0);
3810 }
3811
3812 return 1;
3813 }
3814
3815 if (! invert_exp (PATTERN (jump), jump))
3816 /* This should just be putting it back the way it was. */
3817 abort ();
3818
3819 return 0;
3820 }
3821
3822 /* Invert the jump condition of rtx X contained in jump insn, INSN.
3823
3824 Return 1 if we can do so, 0 if we cannot find a way to do so that
3825 matches a pattern. */
3826
3827 int
3828 invert_exp (x, insn)
3829 rtx x;
3830 rtx insn;
3831 {
3832 register RTX_CODE code;
3833 register int i;
3834 register char *fmt;
3835
3836 code = GET_CODE (x);
3837
3838 if (code == IF_THEN_ELSE)
3839 {
3840 register rtx comp = XEXP (x, 0);
3841 register rtx tem;
3842
3843 /* We can do this in two ways: The preferable way, which can only
3844 be done if this is not an integer comparison, is to reverse
3845 the comparison code. Otherwise, swap the THEN-part and ELSE-part
3846 of the IF_THEN_ELSE. If we can't do either, fail. */
3847
3848 if (can_reverse_comparison_p (comp, insn)
3849 && validate_change (insn, &XEXP (x, 0),
3850 gen_rtx_fmt_ee (reverse_condition (GET_CODE (comp)),
3851 GET_MODE (comp), XEXP (comp, 0),
3852 XEXP (comp, 1)), 0))
3853 return 1;
3854
3855 tem = XEXP (x, 1);
3856 validate_change (insn, &XEXP (x, 1), XEXP (x, 2), 1);
3857 validate_change (insn, &XEXP (x, 2), tem, 1);
3858 return apply_change_group ();
3859 }
3860
3861 fmt = GET_RTX_FORMAT (code);
3862 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3863 {
3864 if (fmt[i] == 'e')
3865 if (! invert_exp (XEXP (x, i), insn))
3866 return 0;
3867 if (fmt[i] == 'E')
3868 {
3869 register int j;
3870 for (j = 0; j < XVECLEN (x, i); j++)
3871 if (!invert_exp (XVECEXP (x, i, j), insn))
3872 return 0;
3873 }
3874 }
3875
3876 return 1;
3877 }
3878 \f
3879 /* Make jump JUMP jump to label NLABEL instead of where it jumps now.
3880 If the old jump target label is unused as a result,
3881 it and the code following it may be deleted.
3882
3883 If NLABEL is zero, we are to turn the jump into a (possibly conditional)
3884 RETURN insn.
3885
3886 The return value will be 1 if the change was made, 0 if it wasn't (this
3887 can only occur for NLABEL == 0). */
3888
3889 int
3890 redirect_jump (jump, nlabel)
3891 rtx jump, nlabel;
3892 {
3893 register rtx olabel = JUMP_LABEL (jump);
3894
3895 if (nlabel == olabel)
3896 return 1;
3897
3898 if (! redirect_exp (&PATTERN (jump), olabel, nlabel, jump))
3899 return 0;
3900
3901 /* If this is an unconditional branch, delete it from the jump_chain of
3902 OLABEL and add it to the jump_chain of NLABEL (assuming both labels
3903 have UID's in range and JUMP_CHAIN is valid). */
3904 if (jump_chain && (simplejump_p (jump)
3905 || GET_CODE (PATTERN (jump)) == RETURN))
3906 {
3907 int label_index = nlabel ? INSN_UID (nlabel) : 0;
3908
3909 delete_from_jump_chain (jump);
3910 if (label_index < max_jump_chain
3911 && INSN_UID (jump) < max_jump_chain)
3912 {
3913 jump_chain[INSN_UID (jump)] = jump_chain[label_index];
3914 jump_chain[label_index] = jump;
3915 }
3916 }
3917
3918 JUMP_LABEL (jump) = nlabel;
3919 if (nlabel)
3920 ++LABEL_NUSES (nlabel);
3921
3922 if (olabel && --LABEL_NUSES (olabel) == 0)
3923 delete_insn (olabel);
3924
3925 return 1;
3926 }
3927
3928 /* Delete the instruction JUMP from any jump chain it might be on. */
3929
3930 static void
3931 delete_from_jump_chain (jump)
3932 rtx jump;
3933 {
3934 int index;
3935 rtx olabel = JUMP_LABEL (jump);
3936
3937 /* Handle unconditional jumps. */
3938 if (jump_chain && olabel != 0
3939 && INSN_UID (olabel) < max_jump_chain
3940 && simplejump_p (jump))
3941 index = INSN_UID (olabel);
3942 /* Handle return insns. */
3943 else if (jump_chain && GET_CODE (PATTERN (jump)) == RETURN)
3944 index = 0;
3945 else return;
3946
3947 if (jump_chain[index] == jump)
3948 jump_chain[index] = jump_chain[INSN_UID (jump)];
3949 else
3950 {
3951 rtx insn;
3952
3953 for (insn = jump_chain[index];
3954 insn != 0;
3955 insn = jump_chain[INSN_UID (insn)])
3956 if (jump_chain[INSN_UID (insn)] == jump)
3957 {
3958 jump_chain[INSN_UID (insn)] = jump_chain[INSN_UID (jump)];
3959 break;
3960 }
3961 }
3962 }
3963
3964 /* If NLABEL is nonzero, throughout the rtx at LOC,
3965 alter (LABEL_REF OLABEL) to (LABEL_REF NLABEL). If OLABEL is
3966 zero, alter (RETURN) to (LABEL_REF NLABEL).
3967
3968 If NLABEL is zero, alter (LABEL_REF OLABEL) to (RETURN) and check
3969 validity with validate_change. Convert (set (pc) (label_ref olabel))
3970 to (return).
3971
3972 Return 0 if we found a change we would like to make but it is invalid.
3973 Otherwise, return 1. */
3974
3975 int
3976 redirect_exp (loc, olabel, nlabel, insn)
3977 rtx *loc;
3978 rtx olabel, nlabel;
3979 rtx insn;
3980 {
3981 register rtx x = *loc;
3982 register RTX_CODE code = GET_CODE (x);
3983 register int i;
3984 register char *fmt;
3985
3986 if (code == LABEL_REF)
3987 {
3988 if (XEXP (x, 0) == olabel)
3989 {
3990 if (nlabel)
3991 XEXP (x, 0) = nlabel;
3992 else
3993 return validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 0);
3994 return 1;
3995 }
3996 }
3997 else if (code == RETURN && olabel == 0)
3998 {
3999 x = gen_rtx_LABEL_REF (VOIDmode, nlabel);
4000 if (loc == &PATTERN (insn))
4001 x = gen_rtx_SET (VOIDmode, pc_rtx, x);
4002 return validate_change (insn, loc, x, 0);
4003 }
4004
4005 if (code == SET && nlabel == 0 && SET_DEST (x) == pc_rtx
4006 && GET_CODE (SET_SRC (x)) == LABEL_REF
4007 && XEXP (SET_SRC (x), 0) == olabel)
4008 return validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 0);
4009
4010 fmt = GET_RTX_FORMAT (code);
4011 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4012 {
4013 if (fmt[i] == 'e')
4014 if (! redirect_exp (&XEXP (x, i), olabel, nlabel, insn))
4015 return 0;
4016 if (fmt[i] == 'E')
4017 {
4018 register int j;
4019 for (j = 0; j < XVECLEN (x, i); j++)
4020 if (! redirect_exp (&XVECEXP (x, i, j), olabel, nlabel, insn))
4021 return 0;
4022 }
4023 }
4024
4025 return 1;
4026 }
4027 \f
4028 /* Make jump JUMP jump to label NLABEL, assuming it used to be a tablejump.
4029
4030 If the old jump target label (before the dispatch table) becomes unused,
4031 it and the dispatch table may be deleted. In that case, find the insn
4032 before the jump references that label and delete it and logical successors
4033 too. */
4034
4035 static void
4036 redirect_tablejump (jump, nlabel)
4037 rtx jump, nlabel;
4038 {
4039 register rtx olabel = JUMP_LABEL (jump);
4040
4041 /* Add this jump to the jump_chain of NLABEL. */
4042 if (jump_chain && INSN_UID (nlabel) < max_jump_chain
4043 && INSN_UID (jump) < max_jump_chain)
4044 {
4045 jump_chain[INSN_UID (jump)] = jump_chain[INSN_UID (nlabel)];
4046 jump_chain[INSN_UID (nlabel)] = jump;
4047 }
4048
4049 PATTERN (jump) = gen_jump (nlabel);
4050 JUMP_LABEL (jump) = nlabel;
4051 ++LABEL_NUSES (nlabel);
4052 INSN_CODE (jump) = -1;
4053
4054 if (--LABEL_NUSES (olabel) == 0)
4055 {
4056 delete_labelref_insn (jump, olabel, 0);
4057 delete_insn (olabel);
4058 }
4059 }
4060
4061 /* Find the insn referencing LABEL that is a logical predecessor of INSN.
4062 If we found one, delete it and then delete this insn if DELETE_THIS is
4063 non-zero. Return non-zero if INSN or a predecessor references LABEL. */
4064
4065 static int
4066 delete_labelref_insn (insn, label, delete_this)
4067 rtx insn, label;
4068 int delete_this;
4069 {
4070 int deleted = 0;
4071 rtx link;
4072
4073 if (GET_CODE (insn) != NOTE
4074 && reg_mentioned_p (label, PATTERN (insn)))
4075 {
4076 if (delete_this)
4077 {
4078 delete_insn (insn);
4079 deleted = 1;
4080 }
4081 else
4082 return 1;
4083 }
4084
4085 for (link = LOG_LINKS (insn); link; link = XEXP (link, 1))
4086 if (delete_labelref_insn (XEXP (link, 0), label, 1))
4087 {
4088 if (delete_this)
4089 {
4090 delete_insn (insn);
4091 deleted = 1;
4092 }
4093 else
4094 return 1;
4095 }
4096
4097 return deleted;
4098 }
4099 \f
4100 /* Like rtx_equal_p except that it considers two REGs as equal
4101 if they renumber to the same value and considers two commutative
4102 operations to be the same if the order of the operands has been
4103 reversed. */
4104
4105 int
4106 rtx_renumbered_equal_p (x, y)
4107 rtx x, y;
4108 {
4109 register int i;
4110 register RTX_CODE code = GET_CODE (x);
4111 register char *fmt;
4112
4113 if (x == y)
4114 return 1;
4115
4116 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
4117 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
4118 && GET_CODE (SUBREG_REG (y)) == REG)))
4119 {
4120 int reg_x = -1, reg_y = -1;
4121 int word_x = 0, word_y = 0;
4122
4123 if (GET_MODE (x) != GET_MODE (y))
4124 return 0;
4125
4126 /* If we haven't done any renumbering, don't
4127 make any assumptions. */
4128 if (reg_renumber == 0)
4129 return rtx_equal_p (x, y);
4130
4131 if (code == SUBREG)
4132 {
4133 reg_x = REGNO (SUBREG_REG (x));
4134 word_x = SUBREG_WORD (x);
4135
4136 if (reg_renumber[reg_x] >= 0)
4137 {
4138 reg_x = reg_renumber[reg_x] + word_x;
4139 word_x = 0;
4140 }
4141 }
4142
4143 else
4144 {
4145 reg_x = REGNO (x);
4146 if (reg_renumber[reg_x] >= 0)
4147 reg_x = reg_renumber[reg_x];
4148 }
4149
4150 if (GET_CODE (y) == SUBREG)
4151 {
4152 reg_y = REGNO (SUBREG_REG (y));
4153 word_y = SUBREG_WORD (y);
4154
4155 if (reg_renumber[reg_y] >= 0)
4156 {
4157 reg_y = reg_renumber[reg_y];
4158 word_y = 0;
4159 }
4160 }
4161
4162 else
4163 {
4164 reg_y = REGNO (y);
4165 if (reg_renumber[reg_y] >= 0)
4166 reg_y = reg_renumber[reg_y];
4167 }
4168
4169 return reg_x >= 0 && reg_x == reg_y && word_x == word_y;
4170 }
4171
4172 /* Now we have disposed of all the cases
4173 in which different rtx codes can match. */
4174 if (code != GET_CODE (y))
4175 return 0;
4176
4177 switch (code)
4178 {
4179 case PC:
4180 case CC0:
4181 case ADDR_VEC:
4182 case ADDR_DIFF_VEC:
4183 return 0;
4184
4185 case CONST_INT:
4186 return INTVAL (x) == INTVAL (y);
4187
4188 case LABEL_REF:
4189 /* We can't assume nonlocal labels have their following insns yet. */
4190 if (LABEL_REF_NONLOCAL_P (x) || LABEL_REF_NONLOCAL_P (y))
4191 return XEXP (x, 0) == XEXP (y, 0);
4192
4193 /* Two label-refs are equivalent if they point at labels
4194 in the same position in the instruction stream. */
4195 return (next_real_insn (XEXP (x, 0))
4196 == next_real_insn (XEXP (y, 0)));
4197
4198 case SYMBOL_REF:
4199 return XSTR (x, 0) == XSTR (y, 0);
4200
4201 default:
4202 break;
4203 }
4204
4205 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
4206
4207 if (GET_MODE (x) != GET_MODE (y))
4208 return 0;
4209
4210 /* For commutative operations, the RTX match if the operand match in any
4211 order. Also handle the simple binary and unary cases without a loop. */
4212 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
4213 return ((rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
4214 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)))
4215 || (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 1))
4216 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 0))));
4217 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
4218 return (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
4219 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)));
4220 else if (GET_RTX_CLASS (code) == '1')
4221 return rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0));
4222
4223 /* Compare the elements. If any pair of corresponding elements
4224 fail to match, return 0 for the whole things. */
4225
4226 fmt = GET_RTX_FORMAT (code);
4227 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4228 {
4229 register int j;
4230 switch (fmt[i])
4231 {
4232 case 'w':
4233 if (XWINT (x, i) != XWINT (y, i))
4234 return 0;
4235 break;
4236
4237 case 'i':
4238 if (XINT (x, i) != XINT (y, i))
4239 return 0;
4240 break;
4241
4242 case 's':
4243 if (strcmp (XSTR (x, i), XSTR (y, i)))
4244 return 0;
4245 break;
4246
4247 case 'e':
4248 if (! rtx_renumbered_equal_p (XEXP (x, i), XEXP (y, i)))
4249 return 0;
4250 break;
4251
4252 case 'u':
4253 if (XEXP (x, i) != XEXP (y, i))
4254 return 0;
4255 /* fall through. */
4256 case '0':
4257 break;
4258
4259 case 'E':
4260 if (XVECLEN (x, i) != XVECLEN (y, i))
4261 return 0;
4262 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4263 if (!rtx_renumbered_equal_p (XVECEXP (x, i, j), XVECEXP (y, i, j)))
4264 return 0;
4265 break;
4266
4267 default:
4268 abort ();
4269 }
4270 }
4271 return 1;
4272 }
4273 \f
4274 /* If X is a hard register or equivalent to one or a subregister of one,
4275 return the hard register number. If X is a pseudo register that was not
4276 assigned a hard register, return the pseudo register number. Otherwise,
4277 return -1. Any rtx is valid for X. */
4278
4279 int
4280 true_regnum (x)
4281 rtx x;
4282 {
4283 if (GET_CODE (x) == REG)
4284 {
4285 if (REGNO (x) >= FIRST_PSEUDO_REGISTER && reg_renumber[REGNO (x)] >= 0)
4286 return reg_renumber[REGNO (x)];
4287 return REGNO (x);
4288 }
4289 if (GET_CODE (x) == SUBREG)
4290 {
4291 int base = true_regnum (SUBREG_REG (x));
4292 if (base >= 0 && base < FIRST_PSEUDO_REGISTER)
4293 return SUBREG_WORD (x) + base;
4294 }
4295 return -1;
4296 }
4297 \f
4298 /* Optimize code of the form:
4299
4300 for (x = a[i]; x; ...)
4301 ...
4302 for (x = a[i]; x; ...)
4303 ...
4304 foo:
4305
4306 Loop optimize will change the above code into
4307
4308 if (x = a[i])
4309 for (;;)
4310 { ...; if (! (x = ...)) break; }
4311 if (x = a[i])
4312 for (;;)
4313 { ...; if (! (x = ...)) break; }
4314 foo:
4315
4316 In general, if the first test fails, the program can branch
4317 directly to `foo' and skip the second try which is doomed to fail.
4318 We run this after loop optimization and before flow analysis. */
4319
4320 /* When comparing the insn patterns, we track the fact that different
4321 pseudo-register numbers may have been used in each computation.
4322 The following array stores an equivalence -- same_regs[I] == J means
4323 that pseudo register I was used in the first set of tests in a context
4324 where J was used in the second set. We also count the number of such
4325 pending equivalences. If nonzero, the expressions really aren't the
4326 same. */
4327
4328 static int *same_regs;
4329
4330 static int num_same_regs;
4331
4332 /* Track any registers modified between the target of the first jump and
4333 the second jump. They never compare equal. */
4334
4335 static char *modified_regs;
4336
4337 /* Record if memory was modified. */
4338
4339 static int modified_mem;
4340
4341 /* Called via note_stores on each insn between the target of the first
4342 branch and the second branch. It marks any changed registers. */
4343
4344 static void
4345 mark_modified_reg (dest, x)
4346 rtx dest;
4347 rtx x;
4348 {
4349 int regno, i;
4350
4351 if (GET_CODE (dest) == SUBREG)
4352 dest = SUBREG_REG (dest);
4353
4354 if (GET_CODE (dest) == MEM)
4355 modified_mem = 1;
4356
4357 if (GET_CODE (dest) != REG)
4358 return;
4359
4360 regno = REGNO (dest);
4361 if (regno >= FIRST_PSEUDO_REGISTER)
4362 modified_regs[regno] = 1;
4363 else
4364 for (i = 0; i < HARD_REGNO_NREGS (regno, GET_MODE (dest)); i++)
4365 modified_regs[regno + i] = 1;
4366 }
4367
4368 /* F is the first insn in the chain of insns. */
4369
4370 void
4371 thread_jumps (f, max_reg, flag_before_loop)
4372 rtx f;
4373 int max_reg;
4374 int flag_before_loop;
4375 {
4376 /* Basic algorithm is to find a conditional branch,
4377 the label it may branch to, and the branch after
4378 that label. If the two branches test the same condition,
4379 walk back from both branch paths until the insn patterns
4380 differ, or code labels are hit. If we make it back to
4381 the target of the first branch, then we know that the first branch
4382 will either always succeed or always fail depending on the relative
4383 senses of the two branches. So adjust the first branch accordingly
4384 in this case. */
4385
4386 rtx label, b1, b2, t1, t2;
4387 enum rtx_code code1, code2;
4388 rtx b1op0, b1op1, b2op0, b2op1;
4389 int changed = 1;
4390 int i;
4391 int *all_reset;
4392
4393 /* Allocate register tables and quick-reset table. */
4394 modified_regs = (char *) alloca (max_reg * sizeof (char));
4395 same_regs = (int *) alloca (max_reg * sizeof (int));
4396 all_reset = (int *) alloca (max_reg * sizeof (int));
4397 for (i = 0; i < max_reg; i++)
4398 all_reset[i] = -1;
4399
4400 while (changed)
4401 {
4402 changed = 0;
4403
4404 for (b1 = f; b1; b1 = NEXT_INSN (b1))
4405 {
4406 /* Get to a candidate branch insn. */
4407 if (GET_CODE (b1) != JUMP_INSN
4408 || ! condjump_p (b1) || simplejump_p (b1)
4409 || JUMP_LABEL (b1) == 0)
4410 continue;
4411
4412 bzero (modified_regs, max_reg * sizeof (char));
4413 modified_mem = 0;
4414
4415 bcopy ((char *) all_reset, (char *) same_regs,
4416 max_reg * sizeof (int));
4417 num_same_regs = 0;
4418
4419 label = JUMP_LABEL (b1);
4420
4421 /* Look for a branch after the target. Record any registers and
4422 memory modified between the target and the branch. Stop when we
4423 get to a label since we can't know what was changed there. */
4424 for (b2 = NEXT_INSN (label); b2; b2 = NEXT_INSN (b2))
4425 {
4426 if (GET_CODE (b2) == CODE_LABEL)
4427 break;
4428
4429 else if (GET_CODE (b2) == JUMP_INSN)
4430 {
4431 /* If this is an unconditional jump and is the only use of
4432 its target label, we can follow it. */
4433 if (simplejump_p (b2)
4434 && JUMP_LABEL (b2) != 0
4435 && LABEL_NUSES (JUMP_LABEL (b2)) == 1)
4436 {
4437 b2 = JUMP_LABEL (b2);
4438 continue;
4439 }
4440 else
4441 break;
4442 }
4443
4444 if (GET_CODE (b2) != CALL_INSN && GET_CODE (b2) != INSN)
4445 continue;
4446
4447 if (GET_CODE (b2) == CALL_INSN)
4448 {
4449 modified_mem = 1;
4450 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4451 if (call_used_regs[i] && ! fixed_regs[i]
4452 && i != STACK_POINTER_REGNUM
4453 && i != FRAME_POINTER_REGNUM
4454 && i != HARD_FRAME_POINTER_REGNUM
4455 && i != ARG_POINTER_REGNUM)
4456 modified_regs[i] = 1;
4457 }
4458
4459 note_stores (PATTERN (b2), mark_modified_reg);
4460 }
4461
4462 /* Check the next candidate branch insn from the label
4463 of the first. */
4464 if (b2 == 0
4465 || GET_CODE (b2) != JUMP_INSN
4466 || b2 == b1
4467 || ! condjump_p (b2)
4468 || simplejump_p (b2))
4469 continue;
4470
4471 /* Get the comparison codes and operands, reversing the
4472 codes if appropriate. If we don't have comparison codes,
4473 we can't do anything. */
4474 b1op0 = XEXP (XEXP (SET_SRC (PATTERN (b1)), 0), 0);
4475 b1op1 = XEXP (XEXP (SET_SRC (PATTERN (b1)), 0), 1);
4476 code1 = GET_CODE (XEXP (SET_SRC (PATTERN (b1)), 0));
4477 if (XEXP (SET_SRC (PATTERN (b1)), 1) == pc_rtx)
4478 code1 = reverse_condition (code1);
4479
4480 b2op0 = XEXP (XEXP (SET_SRC (PATTERN (b2)), 0), 0);
4481 b2op1 = XEXP (XEXP (SET_SRC (PATTERN (b2)), 0), 1);
4482 code2 = GET_CODE (XEXP (SET_SRC (PATTERN (b2)), 0));
4483 if (XEXP (SET_SRC (PATTERN (b2)), 1) == pc_rtx)
4484 code2 = reverse_condition (code2);
4485
4486 /* If they test the same things and knowing that B1 branches
4487 tells us whether or not B2 branches, check if we
4488 can thread the branch. */
4489 if (rtx_equal_for_thread_p (b1op0, b2op0, b2)
4490 && rtx_equal_for_thread_p (b1op1, b2op1, b2)
4491 && (comparison_dominates_p (code1, code2)
4492 || (comparison_dominates_p (code1, reverse_condition (code2))
4493 && can_reverse_comparison_p (XEXP (SET_SRC (PATTERN (b1)),
4494 0),
4495 b1))))
4496 {
4497 t1 = prev_nonnote_insn (b1);
4498 t2 = prev_nonnote_insn (b2);
4499
4500 while (t1 != 0 && t2 != 0)
4501 {
4502 if (t2 == label)
4503 {
4504 /* We have reached the target of the first branch.
4505 If there are no pending register equivalents,
4506 we know that this branch will either always
4507 succeed (if the senses of the two branches are
4508 the same) or always fail (if not). */
4509 rtx new_label;
4510
4511 if (num_same_regs != 0)
4512 break;
4513
4514 if (comparison_dominates_p (code1, code2))
4515 new_label = JUMP_LABEL (b2);
4516 else
4517 new_label = get_label_after (b2);
4518
4519 if (JUMP_LABEL (b1) != new_label)
4520 {
4521 rtx prev = PREV_INSN (new_label);
4522
4523 if (flag_before_loop
4524 && NOTE_LINE_NUMBER (prev) == NOTE_INSN_LOOP_BEG)
4525 {
4526 /* Don't thread to the loop label. If a loop
4527 label is reused, loop optimization will
4528 be disabled for that loop. */
4529 new_label = gen_label_rtx ();
4530 emit_label_after (new_label, PREV_INSN (prev));
4531 }
4532 changed |= redirect_jump (b1, new_label);
4533 }
4534 break;
4535 }
4536
4537 /* If either of these is not a normal insn (it might be
4538 a JUMP_INSN, CALL_INSN, or CODE_LABEL) we fail. (NOTEs
4539 have already been skipped above.) Similarly, fail
4540 if the insns are different. */
4541 if (GET_CODE (t1) != INSN || GET_CODE (t2) != INSN
4542 || recog_memoized (t1) != recog_memoized (t2)
4543 || ! rtx_equal_for_thread_p (PATTERN (t1),
4544 PATTERN (t2), t2))
4545 break;
4546
4547 t1 = prev_nonnote_insn (t1);
4548 t2 = prev_nonnote_insn (t2);
4549 }
4550 }
4551 }
4552 }
4553 }
4554 \f
4555 /* This is like RTX_EQUAL_P except that it knows about our handling of
4556 possibly equivalent registers and knows to consider volatile and
4557 modified objects as not equal.
4558
4559 YINSN is the insn containing Y. */
4560
4561 int
4562 rtx_equal_for_thread_p (x, y, yinsn)
4563 rtx x, y;
4564 rtx yinsn;
4565 {
4566 register int i;
4567 register int j;
4568 register enum rtx_code code;
4569 register char *fmt;
4570
4571 code = GET_CODE (x);
4572 /* Rtx's of different codes cannot be equal. */
4573 if (code != GET_CODE (y))
4574 return 0;
4575
4576 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
4577 (REG:SI x) and (REG:HI x) are NOT equivalent. */
4578
4579 if (GET_MODE (x) != GET_MODE (y))
4580 return 0;
4581
4582 /* For floating-point, consider everything unequal. This is a bit
4583 pessimistic, but this pass would only rarely do anything for FP
4584 anyway. */
4585 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
4586 && FLOAT_MODE_P (GET_MODE (x)) && ! flag_fast_math)
4587 return 0;
4588
4589 /* For commutative operations, the RTX match if the operand match in any
4590 order. Also handle the simple binary and unary cases without a loop. */
4591 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
4592 return ((rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn)
4593 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 1), yinsn))
4594 || (rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 1), yinsn)
4595 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 0), yinsn)));
4596 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
4597 return (rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn)
4598 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 1), yinsn));
4599 else if (GET_RTX_CLASS (code) == '1')
4600 return rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn);
4601
4602 /* Handle special-cases first. */
4603 switch (code)
4604 {
4605 case REG:
4606 if (REGNO (x) == REGNO (y) && ! modified_regs[REGNO (x)])
4607 return 1;
4608
4609 /* If neither is user variable or hard register, check for possible
4610 equivalence. */
4611 if (REG_USERVAR_P (x) || REG_USERVAR_P (y)
4612 || REGNO (x) < FIRST_PSEUDO_REGISTER
4613 || REGNO (y) < FIRST_PSEUDO_REGISTER)
4614 return 0;
4615
4616 if (same_regs[REGNO (x)] == -1)
4617 {
4618 same_regs[REGNO (x)] = REGNO (y);
4619 num_same_regs++;
4620
4621 /* If this is the first time we are seeing a register on the `Y'
4622 side, see if it is the last use. If not, we can't thread the
4623 jump, so mark it as not equivalent. */
4624 if (REGNO_LAST_UID (REGNO (y)) != INSN_UID (yinsn))
4625 return 0;
4626
4627 return 1;
4628 }
4629 else
4630 return (same_regs[REGNO (x)] == REGNO (y));
4631
4632 break;
4633
4634 case MEM:
4635 /* If memory modified or either volatile, not equivalent.
4636 Else, check address. */
4637 if (modified_mem || MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
4638 return 0;
4639
4640 return rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn);
4641
4642 case ASM_INPUT:
4643 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
4644 return 0;
4645
4646 break;
4647
4648 case SET:
4649 /* Cancel a pending `same_regs' if setting equivalenced registers.
4650 Then process source. */
4651 if (GET_CODE (SET_DEST (x)) == REG
4652 && GET_CODE (SET_DEST (y)) == REG)
4653 {
4654 if (same_regs[REGNO (SET_DEST (x))] == REGNO (SET_DEST (y)))
4655 {
4656 same_regs[REGNO (SET_DEST (x))] = -1;
4657 num_same_regs--;
4658 }
4659 else if (REGNO (SET_DEST (x)) != REGNO (SET_DEST (y)))
4660 return 0;
4661 }
4662 else
4663 if (rtx_equal_for_thread_p (SET_DEST (x), SET_DEST (y), yinsn) == 0)
4664 return 0;
4665
4666 return rtx_equal_for_thread_p (SET_SRC (x), SET_SRC (y), yinsn);
4667
4668 case LABEL_REF:
4669 return XEXP (x, 0) == XEXP (y, 0);
4670
4671 case SYMBOL_REF:
4672 return XSTR (x, 0) == XSTR (y, 0);
4673
4674 default:
4675 break;
4676 }
4677
4678 if (x == y)
4679 return 1;
4680
4681 fmt = GET_RTX_FORMAT (code);
4682 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4683 {
4684 switch (fmt[i])
4685 {
4686 case 'w':
4687 if (XWINT (x, i) != XWINT (y, i))
4688 return 0;
4689 break;
4690
4691 case 'n':
4692 case 'i':
4693 if (XINT (x, i) != XINT (y, i))
4694 return 0;
4695 break;
4696
4697 case 'V':
4698 case 'E':
4699 /* Two vectors must have the same length. */
4700 if (XVECLEN (x, i) != XVECLEN (y, i))
4701 return 0;
4702
4703 /* And the corresponding elements must match. */
4704 for (j = 0; j < XVECLEN (x, i); j++)
4705 if (rtx_equal_for_thread_p (XVECEXP (x, i, j),
4706 XVECEXP (y, i, j), yinsn) == 0)
4707 return 0;
4708 break;
4709
4710 case 'e':
4711 if (rtx_equal_for_thread_p (XEXP (x, i), XEXP (y, i), yinsn) == 0)
4712 return 0;
4713 break;
4714
4715 case 'S':
4716 case 's':
4717 if (strcmp (XSTR (x, i), XSTR (y, i)))
4718 return 0;
4719 break;
4720
4721 case 'u':
4722 /* These are just backpointers, so they don't matter. */
4723 break;
4724
4725 case '0':
4726 break;
4727
4728 /* It is believed that rtx's at this level will never
4729 contain anything but integers and other rtx's,
4730 except for within LABEL_REFs and SYMBOL_REFs. */
4731 default:
4732 abort ();
4733 }
4734 }
4735 return 1;
4736 }
4737 \f
4738
4739 /* Return the insn that NEW can be safely inserted in front of starting at
4740 the jump insn INSN. Return 0 if it is not safe to do this jump
4741 optimization. Note that NEW must contain a single set. */
4742
4743 static rtx
4744 find_insert_position (insn, new)
4745 rtx insn;
4746 rtx new;
4747 {
4748 int i;
4749 rtx prev;
4750
4751 /* If NEW does not clobber, it is safe to insert NEW before INSN. */
4752 if (GET_CODE (PATTERN (new)) != PARALLEL)
4753 return insn;
4754
4755 for (i = XVECLEN (PATTERN (new), 0) - 1; i >= 0; i--)
4756 if (GET_CODE (XVECEXP (PATTERN (new), 0, i)) == CLOBBER
4757 && reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4758 insn))
4759 break;
4760
4761 if (i < 0)
4762 return insn;
4763
4764 /* There is a good chance that the previous insn PREV sets the thing
4765 being clobbered (often the CC in a hard reg). If PREV does not
4766 use what NEW sets, we can insert NEW before PREV. */
4767
4768 prev = prev_active_insn (insn);
4769 for (i = XVECLEN (PATTERN (new), 0) - 1; i >= 0; i--)
4770 if (GET_CODE (XVECEXP (PATTERN (new), 0, i)) == CLOBBER
4771 && reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4772 insn)
4773 && ! modified_in_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4774 prev))
4775 return 0;
4776
4777 return reg_mentioned_p (SET_DEST (single_set (new)), prev) ? 0 : prev;
4778 }
GNU Compiler Collection
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