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1 /* Optimize jump instructions, for GNU compiler.
2 Copyright (C) 1987, 88, 89, 91-97, 1998 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21
22 /* This is the jump-optimization pass of the compiler.
23 It is run two or three times: once before cse, sometimes once after cse,
24 and once after reload (before final).
25
26 jump_optimize deletes unreachable code and labels that are not used.
27 It also deletes jumps that jump to the following insn,
28 and simplifies jumps around unconditional jumps and jumps
29 to unconditional jumps.
30
31 Each CODE_LABEL has a count of the times it is used
32 stored in the LABEL_NUSES internal field, and each JUMP_INSN
33 has one label that it refers to stored in the
34 JUMP_LABEL internal field. With this we can detect labels that
35 become unused because of the deletion of all the jumps that
36 formerly used them. The JUMP_LABEL info is sometimes looked
37 at by later passes.
38
39 Optionally, cross-jumping can be done. Currently it is done
40 only the last time (when after reload and before final).
41 In fact, the code for cross-jumping now assumes that register
42 allocation has been done, since it uses `rtx_renumbered_equal_p'.
43
44 Jump optimization is done after cse when cse's constant-propagation
45 causes jumps to become unconditional or to be deleted.
46
47 Unreachable loops are not detected here, because the labels
48 have references and the insns appear reachable from the labels.
49 find_basic_blocks in flow.c finds and deletes such loops.
50
51 The subroutines delete_insn, redirect_jump, and invert_jump are used
52 from other passes as well. */
53
54 #include "config.h"
55 #include "system.h"
56 #include "rtl.h"
57 #include "flags.h"
58 #include "hard-reg-set.h"
59 #include "regs.h"
60 #include "insn-config.h"
61 #include "insn-flags.h"
62 #include "recog.h"
63 #include "expr.h"
64 #include "real.h"
65 #include "except.h"
66 #include "toplev.h"
67
68 /* ??? Eventually must record somehow the labels used by jumps
69 from nested functions. */
70 /* Pre-record the next or previous real insn for each label?
71 No, this pass is very fast anyway. */
72 /* Condense consecutive labels?
73 This would make life analysis faster, maybe. */
74 /* Optimize jump y; x: ... y: jumpif... x?
75 Don't know if it is worth bothering with. */
76 /* Optimize two cases of conditional jump to conditional jump?
77 This can never delete any instruction or make anything dead,
78 or even change what is live at any point.
79 So perhaps let combiner do it. */
80
81 /* Vector indexed by uid.
82 For each CODE_LABEL, index by its uid to get first unconditional jump
83 that jumps to the label.
84 For each JUMP_INSN, index by its uid to get the next unconditional jump
85 that jumps to the same label.
86 Element 0 is the start of a chain of all return insns.
87 (It is safe to use element 0 because insn uid 0 is not used. */
88
89 static rtx *jump_chain;
90
91 /* List of labels referred to from initializers.
92 These can never be deleted. */
93 rtx forced_labels;
94
95 /* Maximum index in jump_chain. */
96
97 static int max_jump_chain;
98
99 /* Set nonzero by jump_optimize if control can fall through
100 to the end of the function. */
101 int can_reach_end;
102
103 /* Indicates whether death notes are significant in cross jump analysis.
104 Normally they are not significant, because of A and B jump to C,
105 and R dies in A, it must die in B. But this might not be true after
106 stack register conversion, and we must compare death notes in that
107 case. */
108
109 static int cross_jump_death_matters = 0;
110
111 static int duplicate_loop_exit_test PROTO((rtx));
112 static void find_cross_jump PROTO((rtx, rtx, int, rtx *, rtx *));
113 static void do_cross_jump PROTO((rtx, rtx, rtx));
114 static int jump_back_p PROTO((rtx, rtx));
115 static int tension_vector_labels PROTO((rtx, int));
116 static void mark_jump_label PROTO((rtx, rtx, int));
117 static void delete_computation PROTO((rtx));
118 static void delete_from_jump_chain PROTO((rtx));
119 static int delete_labelref_insn PROTO((rtx, rtx, int));
120 static void mark_modified_reg PROTO((rtx, rtx));
121 static void redirect_tablejump PROTO((rtx, rtx));
122 #ifndef HAVE_cc0
123 static rtx find_insert_position PROTO((rtx, rtx));
124 #endif
125 \f
126 /* Delete no-op jumps and optimize jumps to jumps
127 and jumps around jumps.
128 Delete unused labels and unreachable code.
129
130 If CROSS_JUMP is 1, detect matching code
131 before a jump and its destination and unify them.
132 If CROSS_JUMP is 2, do cross-jumping, but pay attention to death notes.
133
134 If NOOP_MOVES is nonzero, delete no-op move insns.
135
136 If AFTER_REGSCAN is nonzero, then this jump pass is being run immediately
137 after regscan, and it is safe to use regno_first_uid and regno_last_uid.
138
139 If `optimize' is zero, don't change any code,
140 just determine whether control drops off the end of the function.
141 This case occurs when we have -W and not -O.
142 It works because `delete_insn' checks the value of `optimize'
143 and refrains from actually deleting when that is 0. */
144
145 void
146 jump_optimize (f, cross_jump, noop_moves, after_regscan)
147 rtx f;
148 int cross_jump;
149 int noop_moves;
150 int after_regscan;
151 {
152 register rtx insn, next, note;
153 int changed;
154 int old_max_reg;
155 int first = 1;
156 int max_uid = 0;
157 rtx last_insn;
158
159 cross_jump_death_matters = (cross_jump == 2);
160
161 /* Initialize LABEL_NUSES and JUMP_LABEL fields. Delete any REG_LABEL
162 notes whose labels don't occur in the insn any more. */
163
164 for (insn = f; insn; insn = NEXT_INSN (insn))
165 {
166 if (GET_CODE (insn) == CODE_LABEL)
167 LABEL_NUSES (insn) = (LABEL_PRESERVE_P (insn) != 0);
168 else if (GET_CODE (insn) == JUMP_INSN)
169 JUMP_LABEL (insn) = 0;
170 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
171 for (note = REG_NOTES (insn); note; note = next)
172 {
173 next = XEXP (note, 1);
174 if (REG_NOTE_KIND (note) == REG_LABEL
175 && ! reg_mentioned_p (XEXP (note, 0), PATTERN (insn)))
176 remove_note (insn, note);
177 }
178
179 if (INSN_UID (insn) > max_uid)
180 max_uid = INSN_UID (insn);
181 }
182
183 max_uid++;
184
185 /* If we are performing cross jump optimizations, then initialize
186 tables mapping UIDs to EH regions to avoid incorrect movement
187 of insns from one EH region to another. */
188 if (flag_exceptions && cross_jump)
189 init_insn_eh_region (f, max_uid);
190
191 /* Delete insns following barriers, up to next label. */
192
193 for (insn = f; insn;)
194 {
195 if (GET_CODE (insn) == BARRIER)
196 {
197 insn = NEXT_INSN (insn);
198 while (insn != 0 && GET_CODE (insn) != CODE_LABEL)
199 {
200 if (GET_CODE (insn) == NOTE
201 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)
202 insn = NEXT_INSN (insn);
203 else
204 insn = delete_insn (insn);
205 }
206 /* INSN is now the code_label. */
207 }
208 else
209 insn = NEXT_INSN (insn);
210 }
211
212 /* Leave some extra room for labels and duplicate exit test insns
213 we make. */
214 max_jump_chain = max_uid * 14 / 10;
215 jump_chain = (rtx *) alloca (max_jump_chain * sizeof (rtx));
216 bzero ((char *) jump_chain, max_jump_chain * sizeof (rtx));
217
218 /* Mark the label each jump jumps to.
219 Combine consecutive labels, and count uses of labels.
220
221 For each label, make a chain (using `jump_chain')
222 of all the *unconditional* jumps that jump to it;
223 also make a chain of all returns. */
224
225 for (insn = f; insn; insn = NEXT_INSN (insn))
226 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
227 {
228 mark_jump_label (PATTERN (insn), insn, cross_jump);
229 if (! INSN_DELETED_P (insn) && GET_CODE (insn) == JUMP_INSN)
230 {
231 if (JUMP_LABEL (insn) != 0 && simplejump_p (insn))
232 {
233 jump_chain[INSN_UID (insn)]
234 = jump_chain[INSN_UID (JUMP_LABEL (insn))];
235 jump_chain[INSN_UID (JUMP_LABEL (insn))] = insn;
236 }
237 if (GET_CODE (PATTERN (insn)) == RETURN)
238 {
239 jump_chain[INSN_UID (insn)] = jump_chain[0];
240 jump_chain[0] = insn;
241 }
242 }
243 }
244
245 /* Keep track of labels used from static data;
246 they cannot ever be deleted. */
247
248 for (insn = forced_labels; insn; insn = XEXP (insn, 1))
249 LABEL_NUSES (XEXP (insn, 0))++;
250
251 check_exception_handler_labels ();
252
253 /* Keep track of labels used for marking handlers for exception
254 regions; they cannot usually be deleted. */
255
256 for (insn = exception_handler_labels; insn; insn = XEXP (insn, 1))
257 LABEL_NUSES (XEXP (insn, 0))++;
258
259 exception_optimize ();
260
261 /* Delete all labels already not referenced.
262 Also find the last insn. */
263
264 last_insn = 0;
265 for (insn = f; insn; )
266 {
267 if (GET_CODE (insn) == CODE_LABEL && LABEL_NUSES (insn) == 0)
268 insn = delete_insn (insn);
269 else
270 {
271 last_insn = insn;
272 insn = NEXT_INSN (insn);
273 }
274 }
275
276 if (!optimize)
277 {
278 /* See if there is still a NOTE_INSN_FUNCTION_END in this function.
279 If so record that this function can drop off the end. */
280
281 insn = last_insn;
282 {
283 int n_labels = 1;
284 while (insn
285 /* One label can follow the end-note: the return label. */
286 && ((GET_CODE (insn) == CODE_LABEL && n_labels-- > 0)
287 /* Ordinary insns can follow it if returning a structure. */
288 || GET_CODE (insn) == INSN
289 /* If machine uses explicit RETURN insns, no epilogue,
290 then one of them follows the note. */
291 || (GET_CODE (insn) == JUMP_INSN
292 && GET_CODE (PATTERN (insn)) == RETURN)
293 /* A barrier can follow the return insn. */
294 || GET_CODE (insn) == BARRIER
295 /* Other kinds of notes can follow also. */
296 || (GET_CODE (insn) == NOTE
297 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)))
298 insn = PREV_INSN (insn);
299 }
300
301 /* Report if control can fall through at the end of the function. */
302 if (insn && GET_CODE (insn) == NOTE
303 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_END
304 && ! INSN_DELETED_P (insn))
305 can_reach_end = 1;
306
307 /* Zero the "deleted" flag of all the "deleted" insns. */
308 for (insn = f; insn; insn = NEXT_INSN (insn))
309 INSN_DELETED_P (insn) = 0;
310
311 /* Show that the jump chain is not valid. */
312 jump_chain = 0;
313 return;
314 }
315
316 #ifdef HAVE_return
317 if (HAVE_return)
318 {
319 /* If we fall through to the epilogue, see if we can insert a RETURN insn
320 in front of it. If the machine allows it at this point (we might be
321 after reload for a leaf routine), it will improve optimization for it
322 to be there. */
323 insn = get_last_insn ();
324 while (insn && GET_CODE (insn) == NOTE)
325 insn = PREV_INSN (insn);
326
327 if (insn && GET_CODE (insn) != BARRIER)
328 {
329 emit_jump_insn (gen_return ());
330 emit_barrier ();
331 }
332 }
333 #endif
334
335 if (noop_moves)
336 for (insn = f; insn; )
337 {
338 next = NEXT_INSN (insn);
339
340 if (GET_CODE (insn) == INSN)
341 {
342 register rtx body = PATTERN (insn);
343
344 /* Combine stack_adjusts with following push_insns. */
345 #ifdef PUSH_ROUNDING
346 if (GET_CODE (body) == SET
347 && SET_DEST (body) == stack_pointer_rtx
348 && GET_CODE (SET_SRC (body)) == PLUS
349 && XEXP (SET_SRC (body), 0) == stack_pointer_rtx
350 && GET_CODE (XEXP (SET_SRC (body), 1)) == CONST_INT
351 && INTVAL (XEXP (SET_SRC (body), 1)) > 0)
352 {
353 rtx p;
354 rtx stack_adjust_insn = insn;
355 int stack_adjust_amount = INTVAL (XEXP (SET_SRC (body), 1));
356 int total_pushed = 0;
357 int pushes = 0;
358
359 /* Find all successive push insns. */
360 p = insn;
361 /* Don't convert more than three pushes;
362 that starts adding too many displaced addresses
363 and the whole thing starts becoming a losing
364 proposition. */
365 while (pushes < 3)
366 {
367 rtx pbody, dest;
368 p = next_nonnote_insn (p);
369 if (p == 0 || GET_CODE (p) != INSN)
370 break;
371 pbody = PATTERN (p);
372 if (GET_CODE (pbody) != SET)
373 break;
374 dest = SET_DEST (pbody);
375 /* Allow a no-op move between the adjust and the push. */
376 if (GET_CODE (dest) == REG
377 && GET_CODE (SET_SRC (pbody)) == REG
378 && REGNO (dest) == REGNO (SET_SRC (pbody)))
379 continue;
380 if (! (GET_CODE (dest) == MEM
381 && GET_CODE (XEXP (dest, 0)) == POST_INC
382 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx))
383 break;
384 pushes++;
385 if (total_pushed + GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)))
386 > stack_adjust_amount)
387 break;
388 total_pushed += GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)));
389 }
390
391 /* Discard the amount pushed from the stack adjust;
392 maybe eliminate it entirely. */
393 if (total_pushed >= stack_adjust_amount)
394 {
395 delete_computation (stack_adjust_insn);
396 total_pushed = stack_adjust_amount;
397 }
398 else
399 XEXP (SET_SRC (PATTERN (stack_adjust_insn)), 1)
400 = GEN_INT (stack_adjust_amount - total_pushed);
401
402 /* Change the appropriate push insns to ordinary stores. */
403 p = insn;
404 while (total_pushed > 0)
405 {
406 rtx pbody, dest;
407 p = next_nonnote_insn (p);
408 if (GET_CODE (p) != INSN)
409 break;
410 pbody = PATTERN (p);
411 if (GET_CODE (pbody) != SET)
412 break;
413 dest = SET_DEST (pbody);
414 /* Allow a no-op move between the adjust and the push. */
415 if (GET_CODE (dest) == REG
416 && GET_CODE (SET_SRC (pbody)) == REG
417 && REGNO (dest) == REGNO (SET_SRC (pbody)))
418 continue;
419 if (! (GET_CODE (dest) == MEM
420 && GET_CODE (XEXP (dest, 0)) == POST_INC
421 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx))
422 break;
423 total_pushed -= GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)));
424 /* If this push doesn't fully fit in the space
425 of the stack adjust that we deleted,
426 make another stack adjust here for what we
427 didn't use up. There should be peepholes
428 to recognize the resulting sequence of insns. */
429 if (total_pushed < 0)
430 {
431 emit_insn_before (gen_add2_insn (stack_pointer_rtx,
432 GEN_INT (- total_pushed)),
433 p);
434 break;
435 }
436 XEXP (dest, 0)
437 = plus_constant (stack_pointer_rtx, total_pushed);
438 }
439 }
440 #endif
441
442 /* Detect and delete no-op move instructions
443 resulting from not allocating a parameter in a register. */
444
445 if (GET_CODE (body) == SET
446 && (SET_DEST (body) == SET_SRC (body)
447 || (GET_CODE (SET_DEST (body)) == MEM
448 && GET_CODE (SET_SRC (body)) == MEM
449 && rtx_equal_p (SET_SRC (body), SET_DEST (body))))
450 && ! (GET_CODE (SET_DEST (body)) == MEM
451 && MEM_VOLATILE_P (SET_DEST (body)))
452 && ! (GET_CODE (SET_SRC (body)) == MEM
453 && MEM_VOLATILE_P (SET_SRC (body))))
454 delete_computation (insn);
455
456 /* Detect and ignore no-op move instructions
457 resulting from smart or fortuitous register allocation. */
458
459 else if (GET_CODE (body) == SET)
460 {
461 int sreg = true_regnum (SET_SRC (body));
462 int dreg = true_regnum (SET_DEST (body));
463
464 if (sreg == dreg && sreg >= 0)
465 delete_insn (insn);
466 else if (sreg >= 0 && dreg >= 0)
467 {
468 rtx trial;
469 rtx tem = find_equiv_reg (NULL_RTX, insn, 0,
470 sreg, NULL_PTR, dreg,
471 GET_MODE (SET_SRC (body)));
472
473 if (tem != 0
474 && GET_MODE (tem) == GET_MODE (SET_DEST (body)))
475 {
476 /* DREG may have been the target of a REG_DEAD note in
477 the insn which makes INSN redundant. If so, reorg
478 would still think it is dead. So search for such a
479 note and delete it if we find it. */
480 if (! find_regno_note (insn, REG_UNUSED, dreg))
481 for (trial = prev_nonnote_insn (insn);
482 trial && GET_CODE (trial) != CODE_LABEL;
483 trial = prev_nonnote_insn (trial))
484 if (find_regno_note (trial, REG_DEAD, dreg))
485 {
486 remove_death (dreg, trial);
487 break;
488 }
489
490 /* Deleting insn could lose a death-note for SREG. */
491 if ((trial = find_regno_note (insn, REG_DEAD, sreg)))
492 {
493 /* Change this into a USE so that we won't emit
494 code for it, but still can keep the note. */
495 PATTERN (insn)
496 = gen_rtx_USE (VOIDmode, XEXP (trial, 0));
497 INSN_CODE (insn) = -1;
498 /* Remove all reg notes but the REG_DEAD one. */
499 REG_NOTES (insn) = trial;
500 XEXP (trial, 1) = NULL_RTX;
501 }
502 else
503 delete_insn (insn);
504 }
505 }
506 else if (dreg >= 0 && CONSTANT_P (SET_SRC (body))
507 && find_equiv_reg (SET_SRC (body), insn, 0, dreg,
508 NULL_PTR, 0,
509 GET_MODE (SET_DEST (body))))
510 {
511 /* This handles the case where we have two consecutive
512 assignments of the same constant to pseudos that didn't
513 get a hard reg. Each SET from the constant will be
514 converted into a SET of the spill register and an
515 output reload will be made following it. This produces
516 two loads of the same constant into the same spill
517 register. */
518
519 rtx in_insn = insn;
520
521 /* Look back for a death note for the first reg.
522 If there is one, it is no longer accurate. */
523 while (in_insn && GET_CODE (in_insn) != CODE_LABEL)
524 {
525 if ((GET_CODE (in_insn) == INSN
526 || GET_CODE (in_insn) == JUMP_INSN)
527 && find_regno_note (in_insn, REG_DEAD, dreg))
528 {
529 remove_death (dreg, in_insn);
530 break;
531 }
532 in_insn = PREV_INSN (in_insn);
533 }
534
535 /* Delete the second load of the value. */
536 delete_insn (insn);
537 }
538 }
539 else if (GET_CODE (body) == PARALLEL)
540 {
541 /* If each part is a set between two identical registers or
542 a USE or CLOBBER, delete the insn. */
543 int i, sreg, dreg;
544 rtx tem;
545
546 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
547 {
548 tem = XVECEXP (body, 0, i);
549 if (GET_CODE (tem) == USE || GET_CODE (tem) == CLOBBER)
550 continue;
551
552 if (GET_CODE (tem) != SET
553 || (sreg = true_regnum (SET_SRC (tem))) < 0
554 || (dreg = true_regnum (SET_DEST (tem))) < 0
555 || dreg != sreg)
556 break;
557 }
558
559 if (i < 0)
560 delete_insn (insn);
561 }
562 /* Also delete insns to store bit fields if they are no-ops. */
563 /* Not worth the hair to detect this in the big-endian case. */
564 else if (! BYTES_BIG_ENDIAN
565 && GET_CODE (body) == SET
566 && GET_CODE (SET_DEST (body)) == ZERO_EXTRACT
567 && XEXP (SET_DEST (body), 2) == const0_rtx
568 && XEXP (SET_DEST (body), 0) == SET_SRC (body)
569 && ! (GET_CODE (SET_SRC (body)) == MEM
570 && MEM_VOLATILE_P (SET_SRC (body))))
571 delete_insn (insn);
572 }
573 insn = next;
574 }
575
576 /* If we haven't yet gotten to reload and we have just run regscan,
577 delete any insn that sets a register that isn't used elsewhere.
578 This helps some of the optimizations below by having less insns
579 being jumped around. */
580
581 if (! reload_completed && after_regscan)
582 for (insn = f; insn; insn = next)
583 {
584 rtx set = single_set (insn);
585
586 next = NEXT_INSN (insn);
587
588 if (set && GET_CODE (SET_DEST (set)) == REG
589 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
590 && REGNO_FIRST_UID (REGNO (SET_DEST (set))) == INSN_UID (insn)
591 /* We use regno_last_note_uid so as not to delete the setting
592 of a reg that's used in notes. A subsequent optimization
593 might arrange to use that reg for real. */
594 && REGNO_LAST_NOTE_UID (REGNO (SET_DEST (set))) == INSN_UID (insn)
595 && ! side_effects_p (SET_SRC (set))
596 && ! find_reg_note (insn, REG_RETVAL, 0))
597 delete_insn (insn);
598 }
599
600 /* Now iterate optimizing jumps until nothing changes over one pass. */
601 changed = 1;
602 old_max_reg = max_reg_num ();
603 while (changed)
604 {
605 changed = 0;
606
607 for (insn = f; insn; insn = next)
608 {
609 rtx reallabelprev;
610 rtx temp, temp1, temp2, temp3, temp4, temp5, temp6;
611 rtx nlabel;
612 int this_is_simplejump, this_is_condjump, reversep = 0;
613 int this_is_condjump_in_parallel;
614
615 #if 0
616 /* If NOT the first iteration, if this is the last jump pass
617 (just before final), do the special peephole optimizations.
618 Avoiding the first iteration gives ordinary jump opts
619 a chance to work before peephole opts. */
620
621 if (reload_completed && !first && !flag_no_peephole)
622 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
623 peephole (insn);
624 #endif
625
626 /* That could have deleted some insns after INSN, so check now
627 what the following insn is. */
628
629 next = NEXT_INSN (insn);
630
631 /* See if this is a NOTE_INSN_LOOP_BEG followed by an unconditional
632 jump. Try to optimize by duplicating the loop exit test if so.
633 This is only safe immediately after regscan, because it uses
634 the values of regno_first_uid and regno_last_uid. */
635 if (after_regscan && GET_CODE (insn) == NOTE
636 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
637 && (temp1 = next_nonnote_insn (insn)) != 0
638 && simplejump_p (temp1))
639 {
640 temp = PREV_INSN (insn);
641 if (duplicate_loop_exit_test (insn))
642 {
643 changed = 1;
644 next = NEXT_INSN (temp);
645 continue;
646 }
647 }
648
649 if (GET_CODE (insn) != JUMP_INSN)
650 continue;
651
652 this_is_simplejump = simplejump_p (insn);
653 this_is_condjump = condjump_p (insn);
654 this_is_condjump_in_parallel = condjump_in_parallel_p (insn);
655
656 /* Tension the labels in dispatch tables. */
657
658 if (GET_CODE (PATTERN (insn)) == ADDR_VEC)
659 changed |= tension_vector_labels (PATTERN (insn), 0);
660 if (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
661 changed |= tension_vector_labels (PATTERN (insn), 1);
662
663 /* If a dispatch table always goes to the same place,
664 get rid of it and replace the insn that uses it. */
665
666 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
667 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
668 {
669 int i;
670 rtx pat = PATTERN (insn);
671 int diff_vec_p = GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC;
672 int len = XVECLEN (pat, diff_vec_p);
673 rtx dispatch = prev_real_insn (insn);
674
675 for (i = 0; i < len; i++)
676 if (XEXP (XVECEXP (pat, diff_vec_p, i), 0)
677 != XEXP (XVECEXP (pat, diff_vec_p, 0), 0))
678 break;
679 if (i == len
680 && dispatch != 0
681 && GET_CODE (dispatch) == JUMP_INSN
682 && JUMP_LABEL (dispatch) != 0
683 /* Don't mess with a casesi insn. */
684 && !(GET_CODE (PATTERN (dispatch)) == SET
685 && (GET_CODE (SET_SRC (PATTERN (dispatch)))
686 == IF_THEN_ELSE))
687 && next_real_insn (JUMP_LABEL (dispatch)) == insn)
688 {
689 redirect_tablejump (dispatch,
690 XEXP (XVECEXP (pat, diff_vec_p, 0), 0));
691 changed = 1;
692 }
693 }
694
695 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
696
697 /* If a jump references the end of the function, try to turn
698 it into a RETURN insn, possibly a conditional one. */
699 if (JUMP_LABEL (insn)
700 && (next_active_insn (JUMP_LABEL (insn)) == 0
701 || GET_CODE (PATTERN (next_active_insn (JUMP_LABEL (insn))))
702 == RETURN))
703 changed |= redirect_jump (insn, NULL_RTX);
704
705 /* Detect jump to following insn. */
706 if (reallabelprev == insn && condjump_p (insn))
707 {
708 next = next_real_insn (JUMP_LABEL (insn));
709 delete_jump (insn);
710 changed = 1;
711 continue;
712 }
713
714 /* If we have an unconditional jump preceded by a USE, try to put
715 the USE before the target and jump there. This simplifies many
716 of the optimizations below since we don't have to worry about
717 dealing with these USE insns. We only do this if the label
718 being branch to already has the identical USE or if code
719 never falls through to that label. */
720
721 if (this_is_simplejump
722 && (temp = prev_nonnote_insn (insn)) != 0
723 && GET_CODE (temp) == INSN && GET_CODE (PATTERN (temp)) == USE
724 && (temp1 = prev_nonnote_insn (JUMP_LABEL (insn))) != 0
725 && (GET_CODE (temp1) == BARRIER
726 || (GET_CODE (temp1) == INSN
727 && rtx_equal_p (PATTERN (temp), PATTERN (temp1))))
728 /* Don't do this optimization if we have a loop containing only
729 the USE instruction, and the loop start label has a usage
730 count of 1. This is because we will redo this optimization
731 everytime through the outer loop, and jump opt will never
732 exit. */
733 && ! ((temp2 = prev_nonnote_insn (temp)) != 0
734 && temp2 == JUMP_LABEL (insn)
735 && LABEL_NUSES (temp2) == 1))
736 {
737 if (GET_CODE (temp1) == BARRIER)
738 {
739 emit_insn_after (PATTERN (temp), temp1);
740 temp1 = NEXT_INSN (temp1);
741 }
742
743 delete_insn (temp);
744 redirect_jump (insn, get_label_before (temp1));
745 reallabelprev = prev_real_insn (temp1);
746 changed = 1;
747 }
748
749 /* Simplify if (...) x = a; else x = b; by converting it
750 to x = b; if (...) x = a;
751 if B is sufficiently simple, the test doesn't involve X,
752 and nothing in the test modifies B or X.
753
754 If we have small register classes, we also can't do this if X
755 is a hard register.
756
757 If the "x = b;" insn has any REG_NOTES, we don't do this because
758 of the possibility that we are running after CSE and there is a
759 REG_EQUAL note that is only valid if the branch has already been
760 taken. If we move the insn with the REG_EQUAL note, we may
761 fold the comparison to always be false in a later CSE pass.
762 (We could also delete the REG_NOTES when moving the insn, but it
763 seems simpler to not move it.) An exception is that we can move
764 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
765 value is the same as "b".
766
767 INSN is the branch over the `else' part.
768
769 We set:
770
771 TEMP to the jump insn preceding "x = a;"
772 TEMP1 to X
773 TEMP2 to the insn that sets "x = b;"
774 TEMP3 to the insn that sets "x = a;"
775 TEMP4 to the set of "x = b"; */
776
777 if (this_is_simplejump
778 && (temp3 = prev_active_insn (insn)) != 0
779 && GET_CODE (temp3) == INSN
780 && (temp4 = single_set (temp3)) != 0
781 && GET_CODE (temp1 = SET_DEST (temp4)) == REG
782 && (! SMALL_REGISTER_CLASSES
783 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
784 && (temp2 = next_active_insn (insn)) != 0
785 && GET_CODE (temp2) == INSN
786 && (temp4 = single_set (temp2)) != 0
787 && rtx_equal_p (SET_DEST (temp4), temp1)
788 && ! side_effects_p (SET_SRC (temp4))
789 && ! may_trap_p (SET_SRC (temp4))
790 && (REG_NOTES (temp2) == 0
791 || ((REG_NOTE_KIND (REG_NOTES (temp2)) == REG_EQUAL
792 || REG_NOTE_KIND (REG_NOTES (temp2)) == REG_EQUIV)
793 && XEXP (REG_NOTES (temp2), 1) == 0
794 && rtx_equal_p (XEXP (REG_NOTES (temp2), 0),
795 SET_SRC (temp4))))
796 && (temp = prev_active_insn (temp3)) != 0
797 && condjump_p (temp) && ! simplejump_p (temp)
798 /* TEMP must skip over the "x = a;" insn */
799 && prev_real_insn (JUMP_LABEL (temp)) == insn
800 && no_labels_between_p (insn, JUMP_LABEL (temp))
801 /* There must be no other entries to the "x = b;" insn. */
802 && no_labels_between_p (JUMP_LABEL (temp), temp2)
803 /* INSN must either branch to the insn after TEMP2 or the insn
804 after TEMP2 must branch to the same place as INSN. */
805 && (reallabelprev == temp2
806 || ((temp5 = next_active_insn (temp2)) != 0
807 && simplejump_p (temp5)
808 && JUMP_LABEL (temp5) == JUMP_LABEL (insn))))
809 {
810 /* The test expression, X, may be a complicated test with
811 multiple branches. See if we can find all the uses of
812 the label that TEMP branches to without hitting a CALL_INSN
813 or a jump to somewhere else. */
814 rtx target = JUMP_LABEL (temp);
815 int nuses = LABEL_NUSES (target);
816 rtx p;
817 #ifdef HAVE_cc0
818 rtx q;
819 #endif
820
821 /* Set P to the first jump insn that goes around "x = a;". */
822 for (p = temp; nuses && p; p = prev_nonnote_insn (p))
823 {
824 if (GET_CODE (p) == JUMP_INSN)
825 {
826 if (condjump_p (p) && ! simplejump_p (p)
827 && JUMP_LABEL (p) == target)
828 {
829 nuses--;
830 if (nuses == 0)
831 break;
832 }
833 else
834 break;
835 }
836 else if (GET_CODE (p) == CALL_INSN)
837 break;
838 }
839
840 #ifdef HAVE_cc0
841 /* We cannot insert anything between a set of cc and its use
842 so if P uses cc0, we must back up to the previous insn. */
843 q = prev_nonnote_insn (p);
844 if (q && GET_RTX_CLASS (GET_CODE (q)) == 'i'
845 && sets_cc0_p (PATTERN (q)))
846 p = q;
847 #endif
848
849 if (p)
850 p = PREV_INSN (p);
851
852 /* If we found all the uses and there was no data conflict, we
853 can move the assignment unless we can branch into the middle
854 from somewhere. */
855 if (nuses == 0 && p
856 && no_labels_between_p (p, insn)
857 && ! reg_referenced_between_p (temp1, p, NEXT_INSN (temp3))
858 && ! reg_set_between_p (temp1, p, temp3)
859 && (GET_CODE (SET_SRC (temp4)) == CONST_INT
860 || ! modified_between_p (SET_SRC (temp4), p, temp2))
861 /* Verify that registers used by the jump are not clobbered
862 by the instruction being moved. */
863 && ! modified_between_p (PATTERN (temp), temp2,
864 NEXT_INSN (temp2)))
865 {
866 emit_insn_after_with_line_notes (PATTERN (temp2), p, temp2);
867 delete_insn (temp2);
868
869 /* Set NEXT to an insn that we know won't go away. */
870 next = next_active_insn (insn);
871
872 /* Delete the jump around the set. Note that we must do
873 this before we redirect the test jumps so that it won't
874 delete the code immediately following the assignment
875 we moved (which might be a jump). */
876
877 delete_insn (insn);
878
879 /* We either have two consecutive labels or a jump to
880 a jump, so adjust all the JUMP_INSNs to branch to where
881 INSN branches to. */
882 for (p = NEXT_INSN (p); p != next; p = NEXT_INSN (p))
883 if (GET_CODE (p) == JUMP_INSN)
884 redirect_jump (p, target);
885
886 changed = 1;
887 continue;
888 }
889 }
890
891 /* Simplify if (...) { x = a; goto l; } x = b; by converting it
892 to x = a; if (...) goto l; x = b;
893 if A is sufficiently simple, the test doesn't involve X,
894 and nothing in the test modifies A or X.
895
896 If we have small register classes, we also can't do this if X
897 is a hard register.
898
899 If the "x = a;" insn has any REG_NOTES, we don't do this because
900 of the possibility that we are running after CSE and there is a
901 REG_EQUAL note that is only valid if the branch has already been
902 taken. If we move the insn with the REG_EQUAL note, we may
903 fold the comparison to always be false in a later CSE pass.
904 (We could also delete the REG_NOTES when moving the insn, but it
905 seems simpler to not move it.) An exception is that we can move
906 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
907 value is the same as "a".
908
909 INSN is the goto.
910
911 We set:
912
913 TEMP to the jump insn preceding "x = a;"
914 TEMP1 to X
915 TEMP2 to the insn that sets "x = b;"
916 TEMP3 to the insn that sets "x = a;"
917 TEMP4 to the set of "x = a"; */
918
919 if (this_is_simplejump
920 && (temp2 = next_active_insn (insn)) != 0
921 && GET_CODE (temp2) == INSN
922 && (temp4 = single_set (temp2)) != 0
923 && GET_CODE (temp1 = SET_DEST (temp4)) == REG
924 && (! SMALL_REGISTER_CLASSES
925 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
926 && (temp3 = prev_active_insn (insn)) != 0
927 && GET_CODE (temp3) == INSN
928 && (temp4 = single_set (temp3)) != 0
929 && rtx_equal_p (SET_DEST (temp4), temp1)
930 && ! side_effects_p (SET_SRC (temp4))
931 && ! may_trap_p (SET_SRC (temp4))
932 && (REG_NOTES (temp3) == 0
933 || ((REG_NOTE_KIND (REG_NOTES (temp3)) == REG_EQUAL
934 || REG_NOTE_KIND (REG_NOTES (temp3)) == REG_EQUIV)
935 && XEXP (REG_NOTES (temp3), 1) == 0
936 && rtx_equal_p (XEXP (REG_NOTES (temp3), 0),
937 SET_SRC (temp4))))
938 && (temp = prev_active_insn (temp3)) != 0
939 && condjump_p (temp) && ! simplejump_p (temp)
940 /* TEMP must skip over the "x = a;" insn */
941 && prev_real_insn (JUMP_LABEL (temp)) == insn
942 && no_labels_between_p (temp, insn))
943 {
944 rtx prev_label = JUMP_LABEL (temp);
945 rtx insert_after = prev_nonnote_insn (temp);
946
947 #ifdef HAVE_cc0
948 /* We cannot insert anything between a set of cc and its use. */
949 if (insert_after && GET_RTX_CLASS (GET_CODE (insert_after)) == 'i'
950 && sets_cc0_p (PATTERN (insert_after)))
951 insert_after = prev_nonnote_insn (insert_after);
952 #endif
953 ++LABEL_NUSES (prev_label);
954
955 if (insert_after
956 && no_labels_between_p (insert_after, temp)
957 && ! reg_referenced_between_p (temp1, insert_after, temp3)
958 && ! reg_referenced_between_p (temp1, temp3,
959 NEXT_INSN (temp2))
960 && ! reg_set_between_p (temp1, insert_after, temp)
961 && ! modified_between_p (SET_SRC (temp4), insert_after, temp)
962 /* Verify that registers used by the jump are not clobbered
963 by the instruction being moved. */
964 && ! modified_between_p (PATTERN (temp), temp3,
965 NEXT_INSN (temp3))
966 && invert_jump (temp, JUMP_LABEL (insn)))
967 {
968 emit_insn_after_with_line_notes (PATTERN (temp3),
969 insert_after, temp3);
970 delete_insn (temp3);
971 delete_insn (insn);
972 /* Set NEXT to an insn that we know won't go away. */
973 next = temp2;
974 changed = 1;
975 }
976 if (prev_label && --LABEL_NUSES (prev_label) == 0)
977 delete_insn (prev_label);
978 if (changed)
979 continue;
980 }
981
982 #ifndef HAVE_cc0
983 /* If we have if (...) x = exp; and branches are expensive,
984 EXP is a single insn, does not have any side effects, cannot
985 trap, and is not too costly, convert this to
986 t = exp; if (...) x = t;
987
988 Don't do this when we have CC0 because it is unlikely to help
989 and we'd need to worry about where to place the new insn and
990 the potential for conflicts. We also can't do this when we have
991 notes on the insn for the same reason as above.
992
993 We set:
994
995 TEMP to the "x = exp;" insn.
996 TEMP1 to the single set in the "x = exp;" insn.
997 TEMP2 to "x". */
998
999 if (! reload_completed
1000 && this_is_condjump && ! this_is_simplejump
1001 && BRANCH_COST >= 3
1002 && (temp = next_nonnote_insn (insn)) != 0
1003 && GET_CODE (temp) == INSN
1004 && REG_NOTES (temp) == 0
1005 && (reallabelprev == temp
1006 || ((temp2 = next_active_insn (temp)) != 0
1007 && simplejump_p (temp2)
1008 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
1009 && (temp1 = single_set (temp)) != 0
1010 && (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
1011 && (! SMALL_REGISTER_CLASSES
1012 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
1013 && GET_CODE (SET_SRC (temp1)) != REG
1014 && GET_CODE (SET_SRC (temp1)) != SUBREG
1015 && GET_CODE (SET_SRC (temp1)) != CONST_INT
1016 && ! side_effects_p (SET_SRC (temp1))
1017 && ! may_trap_p (SET_SRC (temp1))
1018 && rtx_cost (SET_SRC (temp1), SET) < 10)
1019 {
1020 rtx new = gen_reg_rtx (GET_MODE (temp2));
1021
1022 if ((temp3 = find_insert_position (insn, temp))
1023 && validate_change (temp, &SET_DEST (temp1), new, 0))
1024 {
1025 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1026 emit_insn_after_with_line_notes (PATTERN (temp),
1027 PREV_INSN (temp3), temp);
1028 delete_insn (temp);
1029 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
1030
1031 if (after_regscan)
1032 {
1033 reg_scan_update (temp3, NEXT_INSN (next), old_max_reg);
1034 old_max_reg = max_reg_num ();
1035 }
1036 }
1037 }
1038
1039 /* Similarly, if it takes two insns to compute EXP but they
1040 have the same destination. Here TEMP3 will be the second
1041 insn and TEMP4 the SET from that insn. */
1042
1043 if (! reload_completed
1044 && this_is_condjump && ! this_is_simplejump
1045 && BRANCH_COST >= 4
1046 && (temp = next_nonnote_insn (insn)) != 0
1047 && GET_CODE (temp) == INSN
1048 && REG_NOTES (temp) == 0
1049 && (temp3 = next_nonnote_insn (temp)) != 0
1050 && GET_CODE (temp3) == INSN
1051 && REG_NOTES (temp3) == 0
1052 && (reallabelprev == temp3
1053 || ((temp2 = next_active_insn (temp3)) != 0
1054 && simplejump_p (temp2)
1055 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
1056 && (temp1 = single_set (temp)) != 0
1057 && (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
1058 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
1059 && (! SMALL_REGISTER_CLASSES
1060 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
1061 && ! side_effects_p (SET_SRC (temp1))
1062 && ! may_trap_p (SET_SRC (temp1))
1063 && rtx_cost (SET_SRC (temp1), SET) < 10
1064 && (temp4 = single_set (temp3)) != 0
1065 && rtx_equal_p (SET_DEST (temp4), temp2)
1066 && ! side_effects_p (SET_SRC (temp4))
1067 && ! may_trap_p (SET_SRC (temp4))
1068 && rtx_cost (SET_SRC (temp4), SET) < 10)
1069 {
1070 rtx new = gen_reg_rtx (GET_MODE (temp2));
1071
1072 if ((temp5 = find_insert_position (insn, temp))
1073 && (temp6 = find_insert_position (insn, temp3))
1074 && validate_change (temp, &SET_DEST (temp1), new, 0))
1075 {
1076 /* Use the earliest of temp5 and temp6. */
1077 if (temp5 != insn)
1078 temp6 = temp5;
1079 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1080 emit_insn_after_with_line_notes (PATTERN (temp),
1081 PREV_INSN (temp6), temp);
1082 emit_insn_after_with_line_notes
1083 (replace_rtx (PATTERN (temp3), temp2, new),
1084 PREV_INSN (temp6), temp3);
1085 delete_insn (temp);
1086 delete_insn (temp3);
1087 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
1088
1089 if (after_regscan)
1090 {
1091 reg_scan_update (temp6, NEXT_INSN (next), old_max_reg);
1092 old_max_reg = max_reg_num ();
1093 }
1094 }
1095 }
1096
1097 /* Finally, handle the case where two insns are used to
1098 compute EXP but a temporary register is used. Here we must
1099 ensure that the temporary register is not used anywhere else. */
1100
1101 if (! reload_completed
1102 && after_regscan
1103 && this_is_condjump && ! this_is_simplejump
1104 && BRANCH_COST >= 4
1105 && (temp = next_nonnote_insn (insn)) != 0
1106 && GET_CODE (temp) == INSN
1107 && REG_NOTES (temp) == 0
1108 && (temp3 = next_nonnote_insn (temp)) != 0
1109 && GET_CODE (temp3) == INSN
1110 && REG_NOTES (temp3) == 0
1111 && (reallabelprev == temp3
1112 || ((temp2 = next_active_insn (temp3)) != 0
1113 && simplejump_p (temp2)
1114 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
1115 && (temp1 = single_set (temp)) != 0
1116 && (temp5 = SET_DEST (temp1),
1117 (GET_CODE (temp5) == REG
1118 || (GET_CODE (temp5) == SUBREG
1119 && (temp5 = SUBREG_REG (temp5),
1120 GET_CODE (temp5) == REG))))
1121 && REGNO (temp5) >= FIRST_PSEUDO_REGISTER
1122 && REGNO_FIRST_UID (REGNO (temp5)) == INSN_UID (temp)
1123 && REGNO_LAST_UID (REGNO (temp5)) == INSN_UID (temp3)
1124 && ! side_effects_p (SET_SRC (temp1))
1125 && ! may_trap_p (SET_SRC (temp1))
1126 && rtx_cost (SET_SRC (temp1), SET) < 10
1127 && (temp4 = single_set (temp3)) != 0
1128 && (temp2 = SET_DEST (temp4), GET_CODE (temp2) == REG)
1129 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
1130 && (! SMALL_REGISTER_CLASSES
1131 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
1132 && rtx_equal_p (SET_DEST (temp4), temp2)
1133 && ! side_effects_p (SET_SRC (temp4))
1134 && ! may_trap_p (SET_SRC (temp4))
1135 && rtx_cost (SET_SRC (temp4), SET) < 10)
1136 {
1137 rtx new = gen_reg_rtx (GET_MODE (temp2));
1138
1139 if ((temp5 = find_insert_position (insn, temp))
1140 && (temp6 = find_insert_position (insn, temp3))
1141 && validate_change (temp3, &SET_DEST (temp4), new, 0))
1142 {
1143 /* Use the earliest of temp5 and temp6. */
1144 if (temp5 != insn)
1145 temp6 = temp5;
1146 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1147 emit_insn_after_with_line_notes (PATTERN (temp),
1148 PREV_INSN (temp6), temp);
1149 emit_insn_after_with_line_notes (PATTERN (temp3),
1150 PREV_INSN (temp6), temp3);
1151 delete_insn (temp);
1152 delete_insn (temp3);
1153 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
1154
1155 if (after_regscan)
1156 {
1157 reg_scan_update (temp6, NEXT_INSN (next), old_max_reg);
1158 old_max_reg = max_reg_num ();
1159 }
1160 }
1161 }
1162 #endif /* HAVE_cc0 */
1163
1164 /* Try to use a conditional move (if the target has them), or a
1165 store-flag insn. The general case is:
1166
1167 1) x = a; if (...) x = b; and
1168 2) if (...) x = b;
1169
1170 If the jump would be faster, the machine should not have defined
1171 the movcc or scc insns!. These cases are often made by the
1172 previous optimization.
1173
1174 The second case is treated as x = x; if (...) x = b;.
1175
1176 INSN here is the jump around the store. We set:
1177
1178 TEMP to the "x = b;" insn.
1179 TEMP1 to X.
1180 TEMP2 to B.
1181 TEMP3 to A (X in the second case).
1182 TEMP4 to the condition being tested.
1183 TEMP5 to the earliest insn used to find the condition. */
1184
1185 if (/* We can't do this after reload has completed. */
1186 ! reload_completed
1187 && this_is_condjump && ! this_is_simplejump
1188 /* Set TEMP to the "x = b;" insn. */
1189 && (temp = next_nonnote_insn (insn)) != 0
1190 && GET_CODE (temp) == INSN
1191 && GET_CODE (PATTERN (temp)) == SET
1192 && GET_CODE (temp1 = SET_DEST (PATTERN (temp))) == REG
1193 && (! SMALL_REGISTER_CLASSES
1194 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
1195 && ! side_effects_p (temp2 = SET_SRC (PATTERN (temp)))
1196 && ! may_trap_p (temp2)
1197 /* Allow either form, but prefer the former if both apply.
1198 There is no point in using the old value of TEMP1 if
1199 it is a register, since cse will alias them. It can
1200 lose if the old value were a hard register since CSE
1201 won't replace hard registers. Avoid using TEMP3 if
1202 small register classes and it is a hard register. */
1203 && (((temp3 = reg_set_last (temp1, insn)) != 0
1204 && ! (SMALL_REGISTER_CLASSES && GET_CODE (temp3) == REG
1205 && REGNO (temp3) < FIRST_PSEUDO_REGISTER))
1206 /* Make the latter case look like x = x; if (...) x = b; */
1207 || (temp3 = temp1, 1))
1208 /* INSN must either branch to the insn after TEMP or the insn
1209 after TEMP must branch to the same place as INSN. */
1210 && (reallabelprev == temp
1211 || ((temp4 = next_active_insn (temp)) != 0
1212 && simplejump_p (temp4)
1213 && JUMP_LABEL (temp4) == JUMP_LABEL (insn)))
1214 && (temp4 = get_condition (insn, &temp5)) != 0
1215 /* We must be comparing objects whose modes imply the size.
1216 We could handle BLKmode if (1) emit_store_flag could
1217 and (2) we could find the size reliably. */
1218 && GET_MODE (XEXP (temp4, 0)) != BLKmode
1219 /* Even if branches are cheap, the store_flag optimization
1220 can win when the operation to be performed can be
1221 expressed directly. */
1222 #ifdef HAVE_cc0
1223 /* If the previous insn sets CC0 and something else, we can't
1224 do this since we are going to delete that insn. */
1225
1226 && ! ((temp6 = prev_nonnote_insn (insn)) != 0
1227 && GET_CODE (temp6) == INSN
1228 && (sets_cc0_p (PATTERN (temp6)) == -1
1229 || (sets_cc0_p (PATTERN (temp6)) == 1
1230 && FIND_REG_INC_NOTE (temp6, NULL_RTX))))
1231 #endif
1232 )
1233 {
1234 #ifdef HAVE_conditional_move
1235 /* First try a conditional move. */
1236 {
1237 enum rtx_code code = GET_CODE (temp4);
1238 rtx var = temp1;
1239 rtx cond0, cond1, aval, bval;
1240 rtx target;
1241
1242 /* Copy the compared variables into cond0 and cond1, so that
1243 any side effects performed in or after the old comparison,
1244 will not affect our compare which will come later. */
1245 /* ??? Is it possible to just use the comparison in the jump
1246 insn? After all, we're going to delete it. We'd have
1247 to modify emit_conditional_move to take a comparison rtx
1248 instead or write a new function. */
1249 cond0 = gen_reg_rtx (GET_MODE (XEXP (temp4, 0)));
1250 /* We want the target to be able to simplify comparisons with
1251 zero (and maybe other constants as well), so don't create
1252 pseudos for them. There's no need to either. */
1253 if (GET_CODE (XEXP (temp4, 1)) == CONST_INT
1254 || GET_CODE (XEXP (temp4, 1)) == CONST_DOUBLE)
1255 cond1 = XEXP (temp4, 1);
1256 else
1257 cond1 = gen_reg_rtx (GET_MODE (XEXP (temp4, 1)));
1258
1259 aval = temp3;
1260 bval = temp2;
1261
1262 start_sequence ();
1263 target = emit_conditional_move (var, code,
1264 cond0, cond1, VOIDmode,
1265 aval, bval, GET_MODE (var),
1266 (code == LTU || code == GEU
1267 || code == LEU || code == GTU));
1268
1269 if (target)
1270 {
1271 rtx seq1,seq2,last;
1272
1273 /* Save the conditional move sequence but don't emit it
1274 yet. On some machines, like the alpha, it is possible
1275 that temp5 == insn, so next generate the sequence that
1276 saves the compared values and then emit both
1277 sequences ensuring seq1 occurs before seq2. */
1278 seq2 = get_insns ();
1279 end_sequence ();
1280
1281 /* Now that we can't fail, generate the copy insns that
1282 preserve the compared values. */
1283 start_sequence ();
1284 emit_move_insn (cond0, XEXP (temp4, 0));
1285 if (cond1 != XEXP (temp4, 1))
1286 emit_move_insn (cond1, XEXP (temp4, 1));
1287 seq1 = get_insns ();
1288 end_sequence ();
1289
1290 emit_insns_before (seq1, temp5);
1291 /* Insert conditional move after insn, to be sure that
1292 the jump and a possible compare won't be separated */
1293 last = emit_insns_after (seq2, insn);
1294
1295 /* ??? We can also delete the insn that sets X to A.
1296 Flow will do it too though. */
1297 delete_insn (temp);
1298 next = NEXT_INSN (insn);
1299 delete_jump (insn);
1300
1301 if (after_regscan)
1302 {
1303 reg_scan_update (seq1, NEXT_INSN (last), old_max_reg);
1304 old_max_reg = max_reg_num ();
1305 }
1306
1307 changed = 1;
1308 continue;
1309 }
1310 else
1311 end_sequence ();
1312 }
1313 #endif
1314
1315 /* That didn't work, try a store-flag insn.
1316
1317 We further divide the cases into:
1318
1319 1) x = a; if (...) x = b; and either A or B is zero,
1320 2) if (...) x = 0; and jumps are expensive,
1321 3) x = a; if (...) x = b; and A and B are constants where all
1322 the set bits in A are also set in B and jumps are expensive,
1323 4) x = a; if (...) x = b; and A and B non-zero, and jumps are
1324 more expensive, and
1325 5) if (...) x = b; if jumps are even more expensive. */
1326
1327 if (GET_MODE_CLASS (GET_MODE (temp1)) == MODE_INT
1328 && ((GET_CODE (temp3) == CONST_INT)
1329 /* Make the latter case look like
1330 x = x; if (...) x = 0; */
1331 || (temp3 = temp1,
1332 ((BRANCH_COST >= 2
1333 && temp2 == const0_rtx)
1334 || BRANCH_COST >= 3)))
1335 /* If B is zero, OK; if A is zero, can only do (1) if we
1336 can reverse the condition. See if (3) applies possibly
1337 by reversing the condition. Prefer reversing to (4) when
1338 branches are very expensive. */
1339 && (((BRANCH_COST >= 2
1340 || STORE_FLAG_VALUE == -1
1341 || (STORE_FLAG_VALUE == 1
1342 /* Check that the mask is a power of two,
1343 so that it can probably be generated
1344 with a shift. */
1345 && GET_CODE (temp3) == CONST_INT
1346 && exact_log2 (INTVAL (temp3)) >= 0))
1347 && (reversep = 0, temp2 == const0_rtx))
1348 || ((BRANCH_COST >= 2
1349 || STORE_FLAG_VALUE == -1
1350 || (STORE_FLAG_VALUE == 1
1351 && GET_CODE (temp2) == CONST_INT
1352 && exact_log2 (INTVAL (temp2)) >= 0))
1353 && temp3 == const0_rtx
1354 && (reversep = can_reverse_comparison_p (temp4, insn)))
1355 || (BRANCH_COST >= 2
1356 && GET_CODE (temp2) == CONST_INT
1357 && GET_CODE (temp3) == CONST_INT
1358 && ((INTVAL (temp2) & INTVAL (temp3)) == INTVAL (temp2)
1359 || ((INTVAL (temp2) & INTVAL (temp3)) == INTVAL (temp3)
1360 && (reversep = can_reverse_comparison_p (temp4,
1361 insn)))))
1362 || BRANCH_COST >= 3)
1363 )
1364 {
1365 enum rtx_code code = GET_CODE (temp4);
1366 rtx uval, cval, var = temp1;
1367 int normalizep;
1368 rtx target;
1369
1370 /* If necessary, reverse the condition. */
1371 if (reversep)
1372 code = reverse_condition (code), uval = temp2, cval = temp3;
1373 else
1374 uval = temp3, cval = temp2;
1375
1376 /* If CVAL is non-zero, normalize to -1. Otherwise, if UVAL
1377 is the constant 1, it is best to just compute the result
1378 directly. If UVAL is constant and STORE_FLAG_VALUE
1379 includes all of its bits, it is best to compute the flag
1380 value unnormalized and `and' it with UVAL. Otherwise,
1381 normalize to -1 and `and' with UVAL. */
1382 normalizep = (cval != const0_rtx ? -1
1383 : (uval == const1_rtx ? 1
1384 : (GET_CODE (uval) == CONST_INT
1385 && (INTVAL (uval) & ~STORE_FLAG_VALUE) == 0)
1386 ? 0 : -1));
1387
1388 /* We will be putting the store-flag insn immediately in
1389 front of the comparison that was originally being done,
1390 so we know all the variables in TEMP4 will be valid.
1391 However, this might be in front of the assignment of
1392 A to VAR. If it is, it would clobber the store-flag
1393 we will be emitting.
1394
1395 Therefore, emit into a temporary which will be copied to
1396 VAR immediately after TEMP. */
1397
1398 start_sequence ();
1399 target = emit_store_flag (gen_reg_rtx (GET_MODE (var)), code,
1400 XEXP (temp4, 0), XEXP (temp4, 1),
1401 VOIDmode,
1402 (code == LTU || code == LEU
1403 || code == GEU || code == GTU),
1404 normalizep);
1405 if (target)
1406 {
1407 rtx seq;
1408 rtx before = insn;
1409
1410 seq = get_insns ();
1411 end_sequence ();
1412
1413 /* Put the store-flag insns in front of the first insn
1414 used to compute the condition to ensure that we
1415 use the same values of them as the current
1416 comparison. However, the remainder of the insns we
1417 generate will be placed directly in front of the
1418 jump insn, in case any of the pseudos we use
1419 are modified earlier. */
1420
1421 emit_insns_before (seq, temp5);
1422
1423 start_sequence ();
1424
1425 /* Both CVAL and UVAL are non-zero. */
1426 if (cval != const0_rtx && uval != const0_rtx)
1427 {
1428 rtx tem1, tem2;
1429
1430 tem1 = expand_and (uval, target, NULL_RTX);
1431 if (GET_CODE (cval) == CONST_INT
1432 && GET_CODE (uval) == CONST_INT
1433 && (INTVAL (cval) & INTVAL (uval)) == INTVAL (cval))
1434 tem2 = cval;
1435 else
1436 {
1437 tem2 = expand_unop (GET_MODE (var), one_cmpl_optab,
1438 target, NULL_RTX, 0);
1439 tem2 = expand_and (cval, tem2,
1440 (GET_CODE (tem2) == REG
1441 ? tem2 : 0));
1442 }
1443
1444 /* If we usually make new pseudos, do so here. This
1445 turns out to help machines that have conditional
1446 move insns. */
1447 /* ??? Conditional moves have already been handled.
1448 This may be obsolete. */
1449
1450 if (flag_expensive_optimizations)
1451 target = 0;
1452
1453 target = expand_binop (GET_MODE (var), ior_optab,
1454 tem1, tem2, target,
1455 1, OPTAB_WIDEN);
1456 }
1457 else if (normalizep != 1)
1458 {
1459 /* We know that either CVAL or UVAL is zero. If
1460 UVAL is zero, negate TARGET and `and' with CVAL.
1461 Otherwise, `and' with UVAL. */
1462 if (uval == const0_rtx)
1463 {
1464 target = expand_unop (GET_MODE (var), one_cmpl_optab,
1465 target, NULL_RTX, 0);
1466 uval = cval;
1467 }
1468
1469 target = expand_and (uval, target,
1470 (GET_CODE (target) == REG
1471 && ! preserve_subexpressions_p ()
1472 ? target : NULL_RTX));
1473 }
1474
1475 emit_move_insn (var, target);
1476 seq = get_insns ();
1477 end_sequence ();
1478 #ifdef HAVE_cc0
1479 /* If INSN uses CC0, we must not separate it from the
1480 insn that sets cc0. */
1481 if (reg_mentioned_p (cc0_rtx, PATTERN (before)))
1482 before = prev_nonnote_insn (before);
1483 #endif
1484 emit_insns_before (seq, before);
1485
1486 delete_insn (temp);
1487 next = NEXT_INSN (insn);
1488 delete_jump (insn);
1489
1490 if (after_regscan)
1491 {
1492 reg_scan_update (seq, NEXT_INSN (next), old_max_reg);
1493 old_max_reg = max_reg_num ();
1494 }
1495
1496 changed = 1;
1497 continue;
1498 }
1499 else
1500 end_sequence ();
1501 }
1502 }
1503
1504 /* If branches are expensive, convert
1505 if (foo) bar++; to bar += (foo != 0);
1506 and similarly for "bar--;"
1507
1508 INSN is the conditional branch around the arithmetic. We set:
1509
1510 TEMP is the arithmetic insn.
1511 TEMP1 is the SET doing the arithmetic.
1512 TEMP2 is the operand being incremented or decremented.
1513 TEMP3 to the condition being tested.
1514 TEMP4 to the earliest insn used to find the condition. */
1515
1516 if ((BRANCH_COST >= 2
1517 #ifdef HAVE_incscc
1518 || HAVE_incscc
1519 #endif
1520 #ifdef HAVE_decscc
1521 || HAVE_decscc
1522 #endif
1523 )
1524 && ! reload_completed
1525 && this_is_condjump && ! this_is_simplejump
1526 && (temp = next_nonnote_insn (insn)) != 0
1527 && (temp1 = single_set (temp)) != 0
1528 && (temp2 = SET_DEST (temp1),
1529 GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT)
1530 && GET_CODE (SET_SRC (temp1)) == PLUS
1531 && (XEXP (SET_SRC (temp1), 1) == const1_rtx
1532 || XEXP (SET_SRC (temp1), 1) == constm1_rtx)
1533 && rtx_equal_p (temp2, XEXP (SET_SRC (temp1), 0))
1534 && ! side_effects_p (temp2)
1535 && ! may_trap_p (temp2)
1536 /* INSN must either branch to the insn after TEMP or the insn
1537 after TEMP must branch to the same place as INSN. */
1538 && (reallabelprev == temp
1539 || ((temp3 = next_active_insn (temp)) != 0
1540 && simplejump_p (temp3)
1541 && JUMP_LABEL (temp3) == JUMP_LABEL (insn)))
1542 && (temp3 = get_condition (insn, &temp4)) != 0
1543 /* We must be comparing objects whose modes imply the size.
1544 We could handle BLKmode if (1) emit_store_flag could
1545 and (2) we could find the size reliably. */
1546 && GET_MODE (XEXP (temp3, 0)) != BLKmode
1547 && can_reverse_comparison_p (temp3, insn))
1548 {
1549 rtx temp6, target = 0, seq, init_insn = 0, init = temp2;
1550 enum rtx_code code = reverse_condition (GET_CODE (temp3));
1551
1552 start_sequence ();
1553
1554 /* It must be the case that TEMP2 is not modified in the range
1555 [TEMP4, INSN). The one exception we make is if the insn
1556 before INSN sets TEMP2 to something which is also unchanged
1557 in that range. In that case, we can move the initialization
1558 into our sequence. */
1559
1560 if ((temp5 = prev_active_insn (insn)) != 0
1561 && no_labels_between_p (temp5, insn)
1562 && GET_CODE (temp5) == INSN
1563 && (temp6 = single_set (temp5)) != 0
1564 && rtx_equal_p (temp2, SET_DEST (temp6))
1565 && (CONSTANT_P (SET_SRC (temp6))
1566 || GET_CODE (SET_SRC (temp6)) == REG
1567 || GET_CODE (SET_SRC (temp6)) == SUBREG))
1568 {
1569 emit_insn (PATTERN (temp5));
1570 init_insn = temp5;
1571 init = SET_SRC (temp6);
1572 }
1573
1574 if (CONSTANT_P (init)
1575 || ! reg_set_between_p (init, PREV_INSN (temp4), insn))
1576 target = emit_store_flag (gen_reg_rtx (GET_MODE (temp2)), code,
1577 XEXP (temp3, 0), XEXP (temp3, 1),
1578 VOIDmode,
1579 (code == LTU || code == LEU
1580 || code == GTU || code == GEU), 1);
1581
1582 /* If we can do the store-flag, do the addition or
1583 subtraction. */
1584
1585 if (target)
1586 target = expand_binop (GET_MODE (temp2),
1587 (XEXP (SET_SRC (temp1), 1) == const1_rtx
1588 ? add_optab : sub_optab),
1589 temp2, target, temp2, 0, OPTAB_WIDEN);
1590
1591 if (target != 0)
1592 {
1593 /* Put the result back in temp2 in case it isn't already.
1594 Then replace the jump, possible a CC0-setting insn in
1595 front of the jump, and TEMP, with the sequence we have
1596 made. */
1597
1598 if (target != temp2)
1599 emit_move_insn (temp2, target);
1600
1601 seq = get_insns ();
1602 end_sequence ();
1603
1604 emit_insns_before (seq, temp4);
1605 delete_insn (temp);
1606
1607 if (init_insn)
1608 delete_insn (init_insn);
1609
1610 next = NEXT_INSN (insn);
1611 #ifdef HAVE_cc0
1612 delete_insn (prev_nonnote_insn (insn));
1613 #endif
1614 delete_insn (insn);
1615
1616 if (after_regscan)
1617 {
1618 reg_scan_update (seq, NEXT_INSN (next), old_max_reg);
1619 old_max_reg = max_reg_num ();
1620 }
1621
1622 changed = 1;
1623 continue;
1624 }
1625 else
1626 end_sequence ();
1627 }
1628
1629 /* Simplify if (...) x = 1; else {...} if (x) ...
1630 We recognize this case scanning backwards as well.
1631
1632 TEMP is the assignment to x;
1633 TEMP1 is the label at the head of the second if. */
1634 /* ?? This should call get_condition to find the values being
1635 compared, instead of looking for a COMPARE insn when HAVE_cc0
1636 is not defined. This would allow it to work on the m88k. */
1637 /* ?? This optimization is only safe before cse is run if HAVE_cc0
1638 is not defined and the condition is tested by a separate compare
1639 insn. This is because the code below assumes that the result
1640 of the compare dies in the following branch.
1641
1642 Not only that, but there might be other insns between the
1643 compare and branch whose results are live. Those insns need
1644 to be executed.
1645
1646 A way to fix this is to move the insns at JUMP_LABEL (insn)
1647 to before INSN. If we are running before flow, they will
1648 be deleted if they aren't needed. But this doesn't work
1649 well after flow.
1650
1651 This is really a special-case of jump threading, anyway. The
1652 right thing to do is to replace this and jump threading with
1653 much simpler code in cse.
1654
1655 This code has been turned off in the non-cc0 case in the
1656 meantime. */
1657
1658 #ifdef HAVE_cc0
1659 else if (this_is_simplejump
1660 /* Safe to skip USE and CLOBBER insns here
1661 since they will not be deleted. */
1662 && (temp = prev_active_insn (insn))
1663 && no_labels_between_p (temp, insn)
1664 && GET_CODE (temp) == INSN
1665 && GET_CODE (PATTERN (temp)) == SET
1666 && GET_CODE (SET_DEST (PATTERN (temp))) == REG
1667 && CONSTANT_P (SET_SRC (PATTERN (temp)))
1668 && (temp1 = next_active_insn (JUMP_LABEL (insn)))
1669 /* If we find that the next value tested is `x'
1670 (TEMP1 is the insn where this happens), win. */
1671 && GET_CODE (temp1) == INSN
1672 && GET_CODE (PATTERN (temp1)) == SET
1673 #ifdef HAVE_cc0
1674 /* Does temp1 `tst' the value of x? */
1675 && SET_SRC (PATTERN (temp1)) == SET_DEST (PATTERN (temp))
1676 && SET_DEST (PATTERN (temp1)) == cc0_rtx
1677 && (temp1 = next_nonnote_insn (temp1))
1678 #else
1679 /* Does temp1 compare the value of x against zero? */
1680 && GET_CODE (SET_SRC (PATTERN (temp1))) == COMPARE
1681 && XEXP (SET_SRC (PATTERN (temp1)), 1) == const0_rtx
1682 && (XEXP (SET_SRC (PATTERN (temp1)), 0)
1683 == SET_DEST (PATTERN (temp)))
1684 && GET_CODE (SET_DEST (PATTERN (temp1))) == REG
1685 && (temp1 = find_next_ref (SET_DEST (PATTERN (temp1)), temp1))
1686 #endif
1687 && condjump_p (temp1))
1688 {
1689 /* Get the if_then_else from the condjump. */
1690 rtx choice = SET_SRC (PATTERN (temp1));
1691 if (GET_CODE (choice) == IF_THEN_ELSE)
1692 {
1693 enum rtx_code code = GET_CODE (XEXP (choice, 0));
1694 rtx val = SET_SRC (PATTERN (temp));
1695 rtx cond
1696 = simplify_relational_operation (code, GET_MODE (SET_DEST (PATTERN (temp))),
1697 val, const0_rtx);
1698 rtx ultimate;
1699
1700 if (cond == const_true_rtx)
1701 ultimate = XEXP (choice, 1);
1702 else if (cond == const0_rtx)
1703 ultimate = XEXP (choice, 2);
1704 else
1705 ultimate = 0;
1706
1707 if (ultimate == pc_rtx)
1708 ultimate = get_label_after (temp1);
1709 else if (ultimate && GET_CODE (ultimate) != RETURN)
1710 ultimate = XEXP (ultimate, 0);
1711
1712 if (ultimate && JUMP_LABEL(insn) != ultimate)
1713 changed |= redirect_jump (insn, ultimate);
1714 }
1715 }
1716 #endif
1717
1718 #if 0
1719 /* @@ This needs a bit of work before it will be right.
1720
1721 Any type of comparison can be accepted for the first and
1722 second compare. When rewriting the first jump, we must
1723 compute the what conditions can reach label3, and use the
1724 appropriate code. We can not simply reverse/swap the code
1725 of the first jump. In some cases, the second jump must be
1726 rewritten also.
1727
1728 For example,
1729 < == converts to > ==
1730 < != converts to == >
1731 etc.
1732
1733 If the code is written to only accept an '==' test for the second
1734 compare, then all that needs to be done is to swap the condition
1735 of the first branch.
1736
1737 It is questionable whether we want this optimization anyways,
1738 since if the user wrote code like this because he/she knew that
1739 the jump to label1 is taken most of the time, then rewriting
1740 this gives slower code. */
1741 /* @@ This should call get_condition to find the values being
1742 compared, instead of looking for a COMPARE insn when HAVE_cc0
1743 is not defined. This would allow it to work on the m88k. */
1744 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1745 is not defined and the condition is tested by a separate compare
1746 insn. This is because the code below assumes that the result
1747 of the compare dies in the following branch. */
1748
1749 /* Simplify test a ~= b
1750 condjump label1;
1751 test a == b
1752 condjump label2;
1753 jump label3;
1754 label1:
1755
1756 rewriting as
1757 test a ~~= b
1758 condjump label3
1759 test a == b
1760 condjump label2
1761 label1:
1762
1763 where ~= is an inequality, e.g. >, and ~~= is the swapped
1764 inequality, e.g. <.
1765
1766 We recognize this case scanning backwards.
1767
1768 TEMP is the conditional jump to `label2';
1769 TEMP1 is the test for `a == b';
1770 TEMP2 is the conditional jump to `label1';
1771 TEMP3 is the test for `a ~= b'. */
1772 else if (this_is_simplejump
1773 && (temp = prev_active_insn (insn))
1774 && no_labels_between_p (temp, insn)
1775 && condjump_p (temp)
1776 && (temp1 = prev_active_insn (temp))
1777 && no_labels_between_p (temp1, temp)
1778 && GET_CODE (temp1) == INSN
1779 && GET_CODE (PATTERN (temp1)) == SET
1780 #ifdef HAVE_cc0
1781 && sets_cc0_p (PATTERN (temp1)) == 1
1782 #else
1783 && GET_CODE (SET_SRC (PATTERN (temp1))) == COMPARE
1784 && GET_CODE (SET_DEST (PATTERN (temp1))) == REG
1785 && (temp == find_next_ref (SET_DEST (PATTERN (temp1)), temp1))
1786 #endif
1787 && (temp2 = prev_active_insn (temp1))
1788 && no_labels_between_p (temp2, temp1)
1789 && condjump_p (temp2)
1790 && JUMP_LABEL (temp2) == next_nonnote_insn (NEXT_INSN (insn))
1791 && (temp3 = prev_active_insn (temp2))
1792 && no_labels_between_p (temp3, temp2)
1793 && GET_CODE (PATTERN (temp3)) == SET
1794 && rtx_equal_p (SET_DEST (PATTERN (temp3)),
1795 SET_DEST (PATTERN (temp1)))
1796 && rtx_equal_p (SET_SRC (PATTERN (temp1)),
1797 SET_SRC (PATTERN (temp3)))
1798 && ! inequality_comparisons_p (PATTERN (temp))
1799 && inequality_comparisons_p (PATTERN (temp2)))
1800 {
1801 rtx fallthrough_label = JUMP_LABEL (temp2);
1802
1803 ++LABEL_NUSES (fallthrough_label);
1804 if (swap_jump (temp2, JUMP_LABEL (insn)))
1805 {
1806 delete_insn (insn);
1807 changed = 1;
1808 }
1809
1810 if (--LABEL_NUSES (fallthrough_label) == 0)
1811 delete_insn (fallthrough_label);
1812 }
1813 #endif
1814 /* Simplify if (...) {... x = 1;} if (x) ...
1815
1816 We recognize this case backwards.
1817
1818 TEMP is the test of `x';
1819 TEMP1 is the assignment to `x' at the end of the
1820 previous statement. */
1821 /* @@ This should call get_condition to find the values being
1822 compared, instead of looking for a COMPARE insn when HAVE_cc0
1823 is not defined. This would allow it to work on the m88k. */
1824 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1825 is not defined and the condition is tested by a separate compare
1826 insn. This is because the code below assumes that the result
1827 of the compare dies in the following branch. */
1828
1829 /* ??? This has to be turned off. The problem is that the
1830 unconditional jump might indirectly end up branching to the
1831 label between TEMP1 and TEMP. We can't detect this, in general,
1832 since it may become a jump to there after further optimizations.
1833 If that jump is done, it will be deleted, so we will retry
1834 this optimization in the next pass, thus an infinite loop.
1835
1836 The present code prevents this by putting the jump after the
1837 label, but this is not logically correct. */
1838 #if 0
1839 else if (this_is_condjump
1840 /* Safe to skip USE and CLOBBER insns here
1841 since they will not be deleted. */
1842 && (temp = prev_active_insn (insn))
1843 && no_labels_between_p (temp, insn)
1844 && GET_CODE (temp) == INSN
1845 && GET_CODE (PATTERN (temp)) == SET
1846 #ifdef HAVE_cc0
1847 && sets_cc0_p (PATTERN (temp)) == 1
1848 && GET_CODE (SET_SRC (PATTERN (temp))) == REG
1849 #else
1850 /* Temp must be a compare insn, we can not accept a register
1851 to register move here, since it may not be simply a
1852 tst insn. */
1853 && GET_CODE (SET_SRC (PATTERN (temp))) == COMPARE
1854 && XEXP (SET_SRC (PATTERN (temp)), 1) == const0_rtx
1855 && GET_CODE (XEXP (SET_SRC (PATTERN (temp)), 0)) == REG
1856 && GET_CODE (SET_DEST (PATTERN (temp))) == REG
1857 && insn == find_next_ref (SET_DEST (PATTERN (temp)), temp)
1858 #endif
1859 /* May skip USE or CLOBBER insns here
1860 for checking for opportunity, since we
1861 take care of them later. */
1862 && (temp1 = prev_active_insn (temp))
1863 && GET_CODE (temp1) == INSN
1864 && GET_CODE (PATTERN (temp1)) == SET
1865 #ifdef HAVE_cc0
1866 && SET_SRC (PATTERN (temp)) == SET_DEST (PATTERN (temp1))
1867 #else
1868 && (XEXP (SET_SRC (PATTERN (temp)), 0)
1869 == SET_DEST (PATTERN (temp1)))
1870 #endif
1871 && CONSTANT_P (SET_SRC (PATTERN (temp1)))
1872 /* If this isn't true, cse will do the job. */
1873 && ! no_labels_between_p (temp1, temp))
1874 {
1875 /* Get the if_then_else from the condjump. */
1876 rtx choice = SET_SRC (PATTERN (insn));
1877 if (GET_CODE (choice) == IF_THEN_ELSE
1878 && (GET_CODE (XEXP (choice, 0)) == EQ
1879 || GET_CODE (XEXP (choice, 0)) == NE))
1880 {
1881 int want_nonzero = (GET_CODE (XEXP (choice, 0)) == NE);
1882 rtx last_insn;
1883 rtx ultimate;
1884 rtx p;
1885
1886 /* Get the place that condjump will jump to
1887 if it is reached from here. */
1888 if ((SET_SRC (PATTERN (temp1)) != const0_rtx)
1889 == want_nonzero)
1890 ultimate = XEXP (choice, 1);
1891 else
1892 ultimate = XEXP (choice, 2);
1893 /* Get it as a CODE_LABEL. */
1894 if (ultimate == pc_rtx)
1895 ultimate = get_label_after (insn);
1896 else
1897 /* Get the label out of the LABEL_REF. */
1898 ultimate = XEXP (ultimate, 0);
1899
1900 /* Insert the jump immediately before TEMP, specifically
1901 after the label that is between TEMP1 and TEMP. */
1902 last_insn = PREV_INSN (temp);
1903
1904 /* If we would be branching to the next insn, the jump
1905 would immediately be deleted and the re-inserted in
1906 a subsequent pass over the code. So don't do anything
1907 in that case. */
1908 if (next_active_insn (last_insn)
1909 != next_active_insn (ultimate))
1910 {
1911 emit_barrier_after (last_insn);
1912 p = emit_jump_insn_after (gen_jump (ultimate),
1913 last_insn);
1914 JUMP_LABEL (p) = ultimate;
1915 ++LABEL_NUSES (ultimate);
1916 if (INSN_UID (ultimate) < max_jump_chain
1917 && INSN_CODE (p) < max_jump_chain)
1918 {
1919 jump_chain[INSN_UID (p)]
1920 = jump_chain[INSN_UID (ultimate)];
1921 jump_chain[INSN_UID (ultimate)] = p;
1922 }
1923 changed = 1;
1924 continue;
1925 }
1926 }
1927 }
1928 #endif
1929 /* Detect a conditional jump going to the same place
1930 as an immediately following unconditional jump. */
1931 else if (this_is_condjump
1932 && (temp = next_active_insn (insn)) != 0
1933 && simplejump_p (temp)
1934 && (next_active_insn (JUMP_LABEL (insn))
1935 == next_active_insn (JUMP_LABEL (temp))))
1936 {
1937 rtx tem = temp;
1938
1939 /* ??? Optional. Disables some optimizations, but makes
1940 gcov output more accurate with -O. */
1941 if (flag_test_coverage && !reload_completed)
1942 for (tem = insn; tem != temp; tem = NEXT_INSN (tem))
1943 if (GET_CODE (tem) == NOTE && NOTE_LINE_NUMBER (tem) > 0)
1944 break;
1945
1946 if (tem == temp)
1947 {
1948 delete_jump (insn);
1949 changed = 1;
1950 continue;
1951 }
1952 }
1953 #ifdef HAVE_trap
1954 /* Detect a conditional jump jumping over an unconditional trap. */
1955 else if (HAVE_trap
1956 && this_is_condjump && ! this_is_simplejump
1957 && reallabelprev != 0
1958 && GET_CODE (reallabelprev) == INSN
1959 && GET_CODE (PATTERN (reallabelprev)) == TRAP_IF
1960 && TRAP_CONDITION (PATTERN (reallabelprev)) == const_true_rtx
1961 && prev_active_insn (reallabelprev) == insn
1962 && no_labels_between_p (insn, reallabelprev)
1963 && (temp2 = get_condition (insn, &temp4))
1964 && can_reverse_comparison_p (temp2, insn))
1965 {
1966 rtx new = gen_cond_trap (reverse_condition (GET_CODE (temp2)),
1967 XEXP (temp2, 0), XEXP (temp2, 1),
1968 TRAP_CODE (PATTERN (reallabelprev)));
1969
1970 if (new)
1971 {
1972 emit_insn_before (new, temp4);
1973 delete_insn (reallabelprev);
1974 delete_jump (insn);
1975 changed = 1;
1976 continue;
1977 }
1978 }
1979 /* Detect a jump jumping to an unconditional trap. */
1980 else if (HAVE_trap && this_is_condjump
1981 && (temp = next_active_insn (JUMP_LABEL (insn)))
1982 && GET_CODE (temp) == INSN
1983 && GET_CODE (PATTERN (temp)) == TRAP_IF
1984 && (this_is_simplejump
1985 || (temp2 = get_condition (insn, &temp4))))
1986 {
1987 rtx tc = TRAP_CONDITION (PATTERN (temp));
1988
1989 if (tc == const_true_rtx
1990 || (! this_is_simplejump && rtx_equal_p (temp2, tc)))
1991 {
1992 rtx new;
1993 /* Replace an unconditional jump to a trap with a trap. */
1994 if (this_is_simplejump)
1995 {
1996 emit_barrier_after (emit_insn_before (gen_trap (), insn));
1997 delete_jump (insn);
1998 changed = 1;
1999 continue;
2000 }
2001 new = gen_cond_trap (GET_CODE (temp2), XEXP (temp2, 0),
2002 XEXP (temp2, 1),
2003 TRAP_CODE (PATTERN (temp)));
2004 if (new)
2005 {
2006 emit_insn_before (new, temp4);
2007 delete_jump (insn);
2008 changed = 1;
2009 continue;
2010 }
2011 }
2012 /* If the trap condition and jump condition are mutually
2013 exclusive, redirect the jump to the following insn. */
2014 else if (GET_RTX_CLASS (GET_CODE (tc)) == '<'
2015 && ! this_is_simplejump
2016 && swap_condition (GET_CODE (temp2)) == GET_CODE (tc)
2017 && rtx_equal_p (XEXP (tc, 0), XEXP (temp2, 0))
2018 && rtx_equal_p (XEXP (tc, 1), XEXP (temp2, 1))
2019 && redirect_jump (insn, get_label_after (temp)))
2020 {
2021 changed = 1;
2022 continue;
2023 }
2024 }
2025 #endif
2026
2027 /* Detect a conditional jump jumping over an unconditional jump. */
2028
2029 else if ((this_is_condjump || this_is_condjump_in_parallel)
2030 && ! this_is_simplejump
2031 && reallabelprev != 0
2032 && GET_CODE (reallabelprev) == JUMP_INSN
2033 && prev_active_insn (reallabelprev) == insn
2034 && no_labels_between_p (insn, reallabelprev)
2035 && simplejump_p (reallabelprev))
2036 {
2037 /* When we invert the unconditional jump, we will be
2038 decrementing the usage count of its old label.
2039 Make sure that we don't delete it now because that
2040 might cause the following code to be deleted. */
2041 rtx prev_uses = prev_nonnote_insn (reallabelprev);
2042 rtx prev_label = JUMP_LABEL (insn);
2043
2044 if (prev_label)
2045 ++LABEL_NUSES (prev_label);
2046
2047 if (invert_jump (insn, JUMP_LABEL (reallabelprev)))
2048 {
2049 /* It is very likely that if there are USE insns before
2050 this jump, they hold REG_DEAD notes. These REG_DEAD
2051 notes are no longer valid due to this optimization,
2052 and will cause the life-analysis that following passes
2053 (notably delayed-branch scheduling) to think that
2054 these registers are dead when they are not.
2055
2056 To prevent this trouble, we just remove the USE insns
2057 from the insn chain. */
2058
2059 while (prev_uses && GET_CODE (prev_uses) == INSN
2060 && GET_CODE (PATTERN (prev_uses)) == USE)
2061 {
2062 rtx useless = prev_uses;
2063 prev_uses = prev_nonnote_insn (prev_uses);
2064 delete_insn (useless);
2065 }
2066
2067 delete_insn (reallabelprev);
2068 next = insn;
2069 changed = 1;
2070 }
2071
2072 /* We can now safely delete the label if it is unreferenced
2073 since the delete_insn above has deleted the BARRIER. */
2074 if (prev_label && --LABEL_NUSES (prev_label) == 0)
2075 delete_insn (prev_label);
2076 continue;
2077 }
2078 else
2079 {
2080 /* Detect a jump to a jump. */
2081
2082 nlabel = follow_jumps (JUMP_LABEL (insn));
2083 if (nlabel != JUMP_LABEL (insn)
2084 && redirect_jump (insn, nlabel))
2085 {
2086 changed = 1;
2087 next = insn;
2088 }
2089
2090 /* Look for if (foo) bar; else break; */
2091 /* The insns look like this:
2092 insn = condjump label1;
2093 ...range1 (some insns)...
2094 jump label2;
2095 label1:
2096 ...range2 (some insns)...
2097 jump somewhere unconditionally
2098 label2: */
2099 {
2100 rtx label1 = next_label (insn);
2101 rtx range1end = label1 ? prev_active_insn (label1) : 0;
2102 /* Don't do this optimization on the first round, so that
2103 jump-around-a-jump gets simplified before we ask here
2104 whether a jump is unconditional.
2105
2106 Also don't do it when we are called after reload since
2107 it will confuse reorg. */
2108 if (! first
2109 && (reload_completed ? ! flag_delayed_branch : 1)
2110 /* Make sure INSN is something we can invert. */
2111 && condjump_p (insn)
2112 && label1 != 0
2113 && JUMP_LABEL (insn) == label1
2114 && LABEL_NUSES (label1) == 1
2115 && GET_CODE (range1end) == JUMP_INSN
2116 && simplejump_p (range1end))
2117 {
2118 rtx label2 = next_label (label1);
2119 rtx range2end = label2 ? prev_active_insn (label2) : 0;
2120 if (range1end != range2end
2121 && JUMP_LABEL (range1end) == label2
2122 && GET_CODE (range2end) == JUMP_INSN
2123 && GET_CODE (NEXT_INSN (range2end)) == BARRIER
2124 /* Invert the jump condition, so we
2125 still execute the same insns in each case. */
2126 && invert_jump (insn, label1))
2127 {
2128 rtx range1beg = next_active_insn (insn);
2129 rtx range2beg = next_active_insn (label1);
2130 rtx range1after, range2after;
2131 rtx range1before, range2before;
2132 rtx rangenext;
2133
2134 /* Include in each range any notes before it, to be
2135 sure that we get the line number note if any, even
2136 if there are other notes here. */
2137 while (PREV_INSN (range1beg)
2138 && GET_CODE (PREV_INSN (range1beg)) == NOTE)
2139 range1beg = PREV_INSN (range1beg);
2140
2141 while (PREV_INSN (range2beg)
2142 && GET_CODE (PREV_INSN (range2beg)) == NOTE)
2143 range2beg = PREV_INSN (range2beg);
2144
2145 /* Don't move NOTEs for blocks or loops; shift them
2146 outside the ranges, where they'll stay put. */
2147 range1beg = squeeze_notes (range1beg, range1end);
2148 range2beg = squeeze_notes (range2beg, range2end);
2149
2150 /* Get current surrounds of the 2 ranges. */
2151 range1before = PREV_INSN (range1beg);
2152 range2before = PREV_INSN (range2beg);
2153 range1after = NEXT_INSN (range1end);
2154 range2after = NEXT_INSN (range2end);
2155
2156 /* Splice range2 where range1 was. */
2157 NEXT_INSN (range1before) = range2beg;
2158 PREV_INSN (range2beg) = range1before;
2159 NEXT_INSN (range2end) = range1after;
2160 PREV_INSN (range1after) = range2end;
2161 /* Splice range1 where range2 was. */
2162 NEXT_INSN (range2before) = range1beg;
2163 PREV_INSN (range1beg) = range2before;
2164 NEXT_INSN (range1end) = range2after;
2165 PREV_INSN (range2after) = range1end;
2166
2167 /* Check for a loop end note between the end of
2168 range2, and the next code label. If there is one,
2169 then what we have really seen is
2170 if (foo) break; end_of_loop;
2171 and moved the break sequence outside the loop.
2172 We must move the LOOP_END note to where the
2173 loop really ends now, or we will confuse loop
2174 optimization. Stop if we find a LOOP_BEG note
2175 first, since we don't want to move the LOOP_END
2176 note in that case. */
2177 for (;range2after != label2; range2after = rangenext)
2178 {
2179 rangenext = NEXT_INSN (range2after);
2180 if (GET_CODE (range2after) == NOTE)
2181 {
2182 if (NOTE_LINE_NUMBER (range2after)
2183 == NOTE_INSN_LOOP_END)
2184 {
2185 NEXT_INSN (PREV_INSN (range2after))
2186 = rangenext;
2187 PREV_INSN (rangenext)
2188 = PREV_INSN (range2after);
2189 PREV_INSN (range2after)
2190 = PREV_INSN (range1beg);
2191 NEXT_INSN (range2after) = range1beg;
2192 NEXT_INSN (PREV_INSN (range1beg))
2193 = range2after;
2194 PREV_INSN (range1beg) = range2after;
2195 }
2196 else if (NOTE_LINE_NUMBER (range2after)
2197 == NOTE_INSN_LOOP_BEG)
2198 break;
2199 }
2200 }
2201 changed = 1;
2202 continue;
2203 }
2204 }
2205 }
2206
2207 /* Now that the jump has been tensioned,
2208 try cross jumping: check for identical code
2209 before the jump and before its target label. */
2210
2211 /* First, cross jumping of conditional jumps: */
2212
2213 if (cross_jump && condjump_p (insn))
2214 {
2215 rtx newjpos, newlpos;
2216 rtx x = prev_real_insn (JUMP_LABEL (insn));
2217
2218 /* A conditional jump may be crossjumped
2219 only if the place it jumps to follows
2220 an opposing jump that comes back here. */
2221
2222 if (x != 0 && ! jump_back_p (x, insn))
2223 /* We have no opposing jump;
2224 cannot cross jump this insn. */
2225 x = 0;
2226
2227 newjpos = 0;
2228 /* TARGET is nonzero if it is ok to cross jump
2229 to code before TARGET. If so, see if matches. */
2230 if (x != 0)
2231 find_cross_jump (insn, x, 2,
2232 &newjpos, &newlpos);
2233
2234 if (newjpos != 0)
2235 {
2236 do_cross_jump (insn, newjpos, newlpos);
2237 /* Make the old conditional jump
2238 into an unconditional one. */
2239 SET_SRC (PATTERN (insn))
2240 = gen_rtx_LABEL_REF (VOIDmode, JUMP_LABEL (insn));
2241 INSN_CODE (insn) = -1;
2242 emit_barrier_after (insn);
2243 /* Add to jump_chain unless this is a new label
2244 whose UID is too large. */
2245 if (INSN_UID (JUMP_LABEL (insn)) < max_jump_chain)
2246 {
2247 jump_chain[INSN_UID (insn)]
2248 = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2249 jump_chain[INSN_UID (JUMP_LABEL (insn))] = insn;
2250 }
2251 changed = 1;
2252 next = insn;
2253 }
2254 }
2255
2256 /* Cross jumping of unconditional jumps:
2257 a few differences. */
2258
2259 if (cross_jump && simplejump_p (insn))
2260 {
2261 rtx newjpos, newlpos;
2262 rtx target;
2263
2264 newjpos = 0;
2265
2266 /* TARGET is nonzero if it is ok to cross jump
2267 to code before TARGET. If so, see if matches. */
2268 find_cross_jump (insn, JUMP_LABEL (insn), 1,
2269 &newjpos, &newlpos);
2270
2271 /* If cannot cross jump to code before the label,
2272 see if we can cross jump to another jump to
2273 the same label. */
2274 /* Try each other jump to this label. */
2275 if (INSN_UID (JUMP_LABEL (insn)) < max_uid)
2276 for (target = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2277 target != 0 && newjpos == 0;
2278 target = jump_chain[INSN_UID (target)])
2279 if (target != insn
2280 && JUMP_LABEL (target) == JUMP_LABEL (insn)
2281 /* Ignore TARGET if it's deleted. */
2282 && ! INSN_DELETED_P (target))
2283 find_cross_jump (insn, target, 2,
2284 &newjpos, &newlpos);
2285
2286 if (newjpos != 0)
2287 {
2288 do_cross_jump (insn, newjpos, newlpos);
2289 changed = 1;
2290 next = insn;
2291 }
2292 }
2293
2294 /* This code was dead in the previous jump.c! */
2295 if (cross_jump && GET_CODE (PATTERN (insn)) == RETURN)
2296 {
2297 /* Return insns all "jump to the same place"
2298 so we can cross-jump between any two of them. */
2299
2300 rtx newjpos, newlpos, target;
2301
2302 newjpos = 0;
2303
2304 /* If cannot cross jump to code before the label,
2305 see if we can cross jump to another jump to
2306 the same label. */
2307 /* Try each other jump to this label. */
2308 for (target = jump_chain[0];
2309 target != 0 && newjpos == 0;
2310 target = jump_chain[INSN_UID (target)])
2311 if (target != insn
2312 && ! INSN_DELETED_P (target)
2313 && GET_CODE (PATTERN (target)) == RETURN)
2314 find_cross_jump (insn, target, 2,
2315 &newjpos, &newlpos);
2316
2317 if (newjpos != 0)
2318 {
2319 do_cross_jump (insn, newjpos, newlpos);
2320 changed = 1;
2321 next = insn;
2322 }
2323 }
2324 }
2325 }
2326
2327 first = 0;
2328 }
2329
2330 /* Delete extraneous line number notes.
2331 Note that two consecutive notes for different lines are not really
2332 extraneous. There should be some indication where that line belonged,
2333 even if it became empty. */
2334
2335 {
2336 rtx last_note = 0;
2337
2338 for (insn = f; insn; insn = NEXT_INSN (insn))
2339 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0)
2340 {
2341 /* Delete this note if it is identical to previous note. */
2342 if (last_note
2343 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last_note)
2344 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last_note))
2345 {
2346 delete_insn (insn);
2347 continue;
2348 }
2349
2350 last_note = insn;
2351 }
2352 }
2353
2354 #ifdef HAVE_return
2355 if (HAVE_return)
2356 {
2357 /* If we fall through to the epilogue, see if we can insert a RETURN insn
2358 in front of it. If the machine allows it at this point (we might be
2359 after reload for a leaf routine), it will improve optimization for it
2360 to be there. We do this both here and at the start of this pass since
2361 the RETURN might have been deleted by some of our optimizations. */
2362 insn = get_last_insn ();
2363 while (insn && GET_CODE (insn) == NOTE)
2364 insn = PREV_INSN (insn);
2365
2366 if (insn && GET_CODE (insn) != BARRIER)
2367 {
2368 emit_jump_insn (gen_return ());
2369 emit_barrier ();
2370 }
2371 }
2372 #endif
2373
2374 /* See if there is still a NOTE_INSN_FUNCTION_END in this function.
2375 If so, delete it, and record that this function can drop off the end. */
2376
2377 insn = last_insn;
2378 {
2379 int n_labels = 1;
2380 while (insn
2381 /* One label can follow the end-note: the return label. */
2382 && ((GET_CODE (insn) == CODE_LABEL && n_labels-- > 0)
2383 /* Ordinary insns can follow it if returning a structure. */
2384 || GET_CODE (insn) == INSN
2385 /* If machine uses explicit RETURN insns, no epilogue,
2386 then one of them follows the note. */
2387 || (GET_CODE (insn) == JUMP_INSN
2388 && GET_CODE (PATTERN (insn)) == RETURN)
2389 /* A barrier can follow the return insn. */
2390 || GET_CODE (insn) == BARRIER
2391 /* Other kinds of notes can follow also. */
2392 || (GET_CODE (insn) == NOTE
2393 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)))
2394 insn = PREV_INSN (insn);
2395 }
2396
2397 /* Report if control can fall through at the end of the function. */
2398 if (insn && GET_CODE (insn) == NOTE
2399 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_END)
2400 {
2401 can_reach_end = 1;
2402 delete_insn (insn);
2403 }
2404
2405 /* Show JUMP_CHAIN no longer valid. */
2406 jump_chain = 0;
2407 }
2408 \f
2409 /* LOOP_START is a NOTE_INSN_LOOP_BEG note that is followed by an unconditional
2410 jump. Assume that this unconditional jump is to the exit test code. If
2411 the code is sufficiently simple, make a copy of it before INSN,
2412 followed by a jump to the exit of the loop. Then delete the unconditional
2413 jump after INSN.
2414
2415 Return 1 if we made the change, else 0.
2416
2417 This is only safe immediately after a regscan pass because it uses the
2418 values of regno_first_uid and regno_last_uid. */
2419
2420 static int
2421 duplicate_loop_exit_test (loop_start)
2422 rtx loop_start;
2423 {
2424 rtx insn, set, reg, p, link;
2425 rtx copy = 0;
2426 int num_insns = 0;
2427 rtx exitcode = NEXT_INSN (JUMP_LABEL (next_nonnote_insn (loop_start)));
2428 rtx lastexit;
2429 int max_reg = max_reg_num ();
2430 rtx *reg_map = 0;
2431
2432 /* Scan the exit code. We do not perform this optimization if any insn:
2433
2434 is a CALL_INSN
2435 is a CODE_LABEL
2436 has a REG_RETVAL or REG_LIBCALL note (hard to adjust)
2437 is a NOTE_INSN_LOOP_BEG because this means we have a nested loop
2438 is a NOTE_INSN_BLOCK_{BEG,END} because duplicating these notes
2439 is not valid.
2440
2441 We also do not do this if we find an insn with ASM_OPERANDS. While
2442 this restriction should not be necessary, copying an insn with
2443 ASM_OPERANDS can confuse asm_noperands in some cases.
2444
2445 Also, don't do this if the exit code is more than 20 insns. */
2446
2447 for (insn = exitcode;
2448 insn
2449 && ! (GET_CODE (insn) == NOTE
2450 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
2451 insn = NEXT_INSN (insn))
2452 {
2453 switch (GET_CODE (insn))
2454 {
2455 case CODE_LABEL:
2456 case CALL_INSN:
2457 return 0;
2458 case NOTE:
2459 /* We could be in front of the wrong NOTE_INSN_LOOP_END if there is
2460 a jump immediately after the loop start that branches outside
2461 the loop but within an outer loop, near the exit test.
2462 If we copied this exit test and created a phony
2463 NOTE_INSN_LOOP_VTOP, this could make instructions immediately
2464 before the exit test look like these could be safely moved
2465 out of the loop even if they actually may be never executed.
2466 This can be avoided by checking here for NOTE_INSN_LOOP_CONT. */
2467
2468 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
2469 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2470 return 0;
2471
2472 if (optimize < 2
2473 && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2474 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END))
2475 /* If we were to duplicate this code, we would not move
2476 the BLOCK notes, and so debugging the moved code would
2477 be difficult. Thus, we only move the code with -O2 or
2478 higher. */
2479 return 0;
2480
2481 break;
2482 case JUMP_INSN:
2483 case INSN:
2484 /* The code below would grossly mishandle REG_WAS_0 notes,
2485 so get rid of them here. */
2486 while ((p = find_reg_note (insn, REG_WAS_0, NULL_RTX)) != 0)
2487 remove_note (insn, p);
2488 if (++num_insns > 20
2489 || find_reg_note (insn, REG_RETVAL, NULL_RTX)
2490 || find_reg_note (insn, REG_LIBCALL, NULL_RTX)
2491 || asm_noperands (PATTERN (insn)) > 0)
2492 return 0;
2493 break;
2494 default:
2495 break;
2496 }
2497 }
2498
2499 /* Unless INSN is zero, we can do the optimization. */
2500 if (insn == 0)
2501 return 0;
2502
2503 lastexit = insn;
2504
2505 /* See if any insn sets a register only used in the loop exit code and
2506 not a user variable. If so, replace it with a new register. */
2507 for (insn = exitcode; insn != lastexit; insn = NEXT_INSN (insn))
2508 if (GET_CODE (insn) == INSN
2509 && (set = single_set (insn)) != 0
2510 && ((reg = SET_DEST (set), GET_CODE (reg) == REG)
2511 || (GET_CODE (reg) == SUBREG
2512 && (reg = SUBREG_REG (reg), GET_CODE (reg) == REG)))
2513 && REGNO (reg) >= FIRST_PSEUDO_REGISTER
2514 && REGNO_FIRST_UID (REGNO (reg)) == INSN_UID (insn))
2515 {
2516 for (p = NEXT_INSN (insn); p != lastexit; p = NEXT_INSN (p))
2517 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (p))
2518 break;
2519
2520 if (p != lastexit)
2521 {
2522 /* We can do the replacement. Allocate reg_map if this is the
2523 first replacement we found. */
2524 if (reg_map == 0)
2525 {
2526 reg_map = (rtx *) alloca (max_reg * sizeof (rtx));
2527 bzero ((char *) reg_map, max_reg * sizeof (rtx));
2528 }
2529
2530 REG_LOOP_TEST_P (reg) = 1;
2531
2532 reg_map[REGNO (reg)] = gen_reg_rtx (GET_MODE (reg));
2533 }
2534 }
2535
2536 /* Now copy each insn. */
2537 for (insn = exitcode; insn != lastexit; insn = NEXT_INSN (insn))
2538 switch (GET_CODE (insn))
2539 {
2540 case BARRIER:
2541 copy = emit_barrier_before (loop_start);
2542 break;
2543 case NOTE:
2544 /* Only copy line-number notes. */
2545 if (NOTE_LINE_NUMBER (insn) >= 0)
2546 {
2547 copy = emit_note_before (NOTE_LINE_NUMBER (insn), loop_start);
2548 NOTE_SOURCE_FILE (copy) = NOTE_SOURCE_FILE (insn);
2549 }
2550 break;
2551
2552 case INSN:
2553 copy = emit_insn_before (copy_rtx (PATTERN (insn)), loop_start);
2554 if (reg_map)
2555 replace_regs (PATTERN (copy), reg_map, max_reg, 1);
2556
2557 mark_jump_label (PATTERN (copy), copy, 0);
2558
2559 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
2560 make them. */
2561 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
2562 if (REG_NOTE_KIND (link) != REG_LABEL)
2563 REG_NOTES (copy)
2564 = copy_rtx (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
2565 XEXP (link, 0),
2566 REG_NOTES (copy)));
2567 if (reg_map && REG_NOTES (copy))
2568 replace_regs (REG_NOTES (copy), reg_map, max_reg, 1);
2569 break;
2570
2571 case JUMP_INSN:
2572 copy = emit_jump_insn_before (copy_rtx (PATTERN (insn)), loop_start);
2573 if (reg_map)
2574 replace_regs (PATTERN (copy), reg_map, max_reg, 1);
2575 mark_jump_label (PATTERN (copy), copy, 0);
2576 if (REG_NOTES (insn))
2577 {
2578 REG_NOTES (copy) = copy_rtx (REG_NOTES (insn));
2579 if (reg_map)
2580 replace_regs (REG_NOTES (copy), reg_map, max_reg, 1);
2581 }
2582
2583 /* If this is a simple jump, add it to the jump chain. */
2584
2585 if (INSN_UID (copy) < max_jump_chain && JUMP_LABEL (copy)
2586 && simplejump_p (copy))
2587 {
2588 jump_chain[INSN_UID (copy)]
2589 = jump_chain[INSN_UID (JUMP_LABEL (copy))];
2590 jump_chain[INSN_UID (JUMP_LABEL (copy))] = copy;
2591 }
2592 break;
2593
2594 default:
2595 abort ();
2596 }
2597
2598 /* Now clean up by emitting a jump to the end label and deleting the jump
2599 at the start of the loop. */
2600 if (! copy || GET_CODE (copy) != BARRIER)
2601 {
2602 copy = emit_jump_insn_before (gen_jump (get_label_after (insn)),
2603 loop_start);
2604 mark_jump_label (PATTERN (copy), copy, 0);
2605 if (INSN_UID (copy) < max_jump_chain
2606 && INSN_UID (JUMP_LABEL (copy)) < max_jump_chain)
2607 {
2608 jump_chain[INSN_UID (copy)]
2609 = jump_chain[INSN_UID (JUMP_LABEL (copy))];
2610 jump_chain[INSN_UID (JUMP_LABEL (copy))] = copy;
2611 }
2612 emit_barrier_before (loop_start);
2613 }
2614
2615 /* Mark the exit code as the virtual top of the converted loop. */
2616 emit_note_before (NOTE_INSN_LOOP_VTOP, exitcode);
2617
2618 delete_insn (next_nonnote_insn (loop_start));
2619
2620 return 1;
2621 }
2622 \f
2623 /* Move all block-beg, block-end, loop-beg, loop-cont, loop-vtop, and
2624 loop-end notes between START and END out before START. Assume that
2625 END is not such a note. START may be such a note. Returns the value
2626 of the new starting insn, which may be different if the original start
2627 was such a note. */
2628
2629 rtx
2630 squeeze_notes (start, end)
2631 rtx start, end;
2632 {
2633 rtx insn;
2634 rtx next;
2635
2636 for (insn = start; insn != end; insn = next)
2637 {
2638 next = NEXT_INSN (insn);
2639 if (GET_CODE (insn) == NOTE
2640 && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END
2641 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2642 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
2643 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END
2644 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT
2645 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP))
2646 {
2647 if (insn == start)
2648 start = next;
2649 else
2650 {
2651 rtx prev = PREV_INSN (insn);
2652 PREV_INSN (insn) = PREV_INSN (start);
2653 NEXT_INSN (insn) = start;
2654 NEXT_INSN (PREV_INSN (insn)) = insn;
2655 PREV_INSN (NEXT_INSN (insn)) = insn;
2656 NEXT_INSN (prev) = next;
2657 PREV_INSN (next) = prev;
2658 }
2659 }
2660 }
2661
2662 return start;
2663 }
2664 \f
2665 /* Compare the instructions before insn E1 with those before E2
2666 to find an opportunity for cross jumping.
2667 (This means detecting identical sequences of insns followed by
2668 jumps to the same place, or followed by a label and a jump
2669 to that label, and replacing one with a jump to the other.)
2670
2671 Assume E1 is a jump that jumps to label E2
2672 (that is not always true but it might as well be).
2673 Find the longest possible equivalent sequences
2674 and store the first insns of those sequences into *F1 and *F2.
2675 Store zero there if no equivalent preceding instructions are found.
2676
2677 We give up if we find a label in stream 1.
2678 Actually we could transfer that label into stream 2. */
2679
2680 static void
2681 find_cross_jump (e1, e2, minimum, f1, f2)
2682 rtx e1, e2;
2683 int minimum;
2684 rtx *f1, *f2;
2685 {
2686 register rtx i1 = e1, i2 = e2;
2687 register rtx p1, p2;
2688 int lose = 0;
2689
2690 rtx last1 = 0, last2 = 0;
2691 rtx afterlast1 = 0, afterlast2 = 0;
2692
2693 *f1 = 0;
2694 *f2 = 0;
2695
2696 while (1)
2697 {
2698 i1 = prev_nonnote_insn (i1);
2699
2700 i2 = PREV_INSN (i2);
2701 while (i2 && (GET_CODE (i2) == NOTE || GET_CODE (i2) == CODE_LABEL))
2702 i2 = PREV_INSN (i2);
2703
2704 if (i1 == 0)
2705 break;
2706
2707 /* Don't allow the range of insns preceding E1 or E2
2708 to include the other (E2 or E1). */
2709 if (i2 == e1 || i1 == e2)
2710 break;
2711
2712 /* If we will get to this code by jumping, those jumps will be
2713 tensioned to go directly to the new label (before I2),
2714 so this cross-jumping won't cost extra. So reduce the minimum. */
2715 if (GET_CODE (i1) == CODE_LABEL)
2716 {
2717 --minimum;
2718 break;
2719 }
2720
2721 if (i2 == 0 || GET_CODE (i1) != GET_CODE (i2))
2722 break;
2723
2724 /* Avoid moving insns across EH regions if either of the insns
2725 can throw. */
2726 if (flag_exceptions
2727 && (asynchronous_exceptions || GET_CODE (i1) == CALL_INSN)
2728 && !in_same_eh_region (i1, i2))
2729 break;
2730
2731 p1 = PATTERN (i1);
2732 p2 = PATTERN (i2);
2733
2734 /* If this is a CALL_INSN, compare register usage information.
2735 If we don't check this on stack register machines, the two
2736 CALL_INSNs might be merged leaving reg-stack.c with mismatching
2737 numbers of stack registers in the same basic block.
2738 If we don't check this on machines with delay slots, a delay slot may
2739 be filled that clobbers a parameter expected by the subroutine.
2740
2741 ??? We take the simple route for now and assume that if they're
2742 equal, they were constructed identically. */
2743
2744 if (GET_CODE (i1) == CALL_INSN
2745 && ! rtx_equal_p (CALL_INSN_FUNCTION_USAGE (i1),
2746 CALL_INSN_FUNCTION_USAGE (i2)))
2747 lose = 1;
2748
2749 #ifdef STACK_REGS
2750 /* If cross_jump_death_matters is not 0, the insn's mode
2751 indicates whether or not the insn contains any stack-like
2752 regs. */
2753
2754 if (!lose && cross_jump_death_matters && GET_MODE (i1) == QImode)
2755 {
2756 /* If register stack conversion has already been done, then
2757 death notes must also be compared before it is certain that
2758 the two instruction streams match. */
2759
2760 rtx note;
2761 HARD_REG_SET i1_regset, i2_regset;
2762
2763 CLEAR_HARD_REG_SET (i1_regset);
2764 CLEAR_HARD_REG_SET (i2_regset);
2765
2766 for (note = REG_NOTES (i1); note; note = XEXP (note, 1))
2767 if (REG_NOTE_KIND (note) == REG_DEAD
2768 && STACK_REG_P (XEXP (note, 0)))
2769 SET_HARD_REG_BIT (i1_regset, REGNO (XEXP (note, 0)));
2770
2771 for (note = REG_NOTES (i2); note; note = XEXP (note, 1))
2772 if (REG_NOTE_KIND (note) == REG_DEAD
2773 && STACK_REG_P (XEXP (note, 0)))
2774 SET_HARD_REG_BIT (i2_regset, REGNO (XEXP (note, 0)));
2775
2776 GO_IF_HARD_REG_EQUAL (i1_regset, i2_regset, done);
2777
2778 lose = 1;
2779
2780 done:
2781 ;
2782 }
2783 #endif
2784
2785 /* Don't allow old-style asm or volatile extended asms to be accepted
2786 for cross jumping purposes. It is conceptually correct to allow
2787 them, since cross-jumping preserves the dynamic instruction order
2788 even though it is changing the static instruction order. However,
2789 if an asm is being used to emit an assembler pseudo-op, such as
2790 the MIPS `.set reorder' pseudo-op, then the static instruction order
2791 matters and it must be preserved. */
2792 if (GET_CODE (p1) == ASM_INPUT || GET_CODE (p2) == ASM_INPUT
2793 || (GET_CODE (p1) == ASM_OPERANDS && MEM_VOLATILE_P (p1))
2794 || (GET_CODE (p2) == ASM_OPERANDS && MEM_VOLATILE_P (p2)))
2795 lose = 1;
2796
2797 if (lose || GET_CODE (p1) != GET_CODE (p2)
2798 || ! rtx_renumbered_equal_p (p1, p2))
2799 {
2800 /* The following code helps take care of G++ cleanups. */
2801 rtx equiv1;
2802 rtx equiv2;
2803
2804 if (!lose && GET_CODE (p1) == GET_CODE (p2)
2805 && ((equiv1 = find_reg_note (i1, REG_EQUAL, NULL_RTX)) != 0
2806 || (equiv1 = find_reg_note (i1, REG_EQUIV, NULL_RTX)) != 0)
2807 && ((equiv2 = find_reg_note (i2, REG_EQUAL, NULL_RTX)) != 0
2808 || (equiv2 = find_reg_note (i2, REG_EQUIV, NULL_RTX)) != 0)
2809 /* If the equivalences are not to a constant, they may
2810 reference pseudos that no longer exist, so we can't
2811 use them. */
2812 && CONSTANT_P (XEXP (equiv1, 0))
2813 && rtx_equal_p (XEXP (equiv1, 0), XEXP (equiv2, 0)))
2814 {
2815 rtx s1 = single_set (i1);
2816 rtx s2 = single_set (i2);
2817 if (s1 != 0 && s2 != 0
2818 && rtx_renumbered_equal_p (SET_DEST (s1), SET_DEST (s2)))
2819 {
2820 validate_change (i1, &SET_SRC (s1), XEXP (equiv1, 0), 1);
2821 validate_change (i2, &SET_SRC (s2), XEXP (equiv2, 0), 1);
2822 if (! rtx_renumbered_equal_p (p1, p2))
2823 cancel_changes (0);
2824 else if (apply_change_group ())
2825 goto win;
2826 }
2827 }
2828
2829 /* Insns fail to match; cross jumping is limited to the following
2830 insns. */
2831
2832 #ifdef HAVE_cc0
2833 /* Don't allow the insn after a compare to be shared by
2834 cross-jumping unless the compare is also shared.
2835 Here, if either of these non-matching insns is a compare,
2836 exclude the following insn from possible cross-jumping. */
2837 if (sets_cc0_p (p1) || sets_cc0_p (p2))
2838 last1 = afterlast1, last2 = afterlast2, ++minimum;
2839 #endif
2840
2841 /* If cross-jumping here will feed a jump-around-jump
2842 optimization, this jump won't cost extra, so reduce
2843 the minimum. */
2844 if (GET_CODE (i1) == JUMP_INSN
2845 && JUMP_LABEL (i1)
2846 && prev_real_insn (JUMP_LABEL (i1)) == e1)
2847 --minimum;
2848 break;
2849 }
2850
2851 win:
2852 if (GET_CODE (p1) != USE && GET_CODE (p1) != CLOBBER)
2853 {
2854 /* Ok, this insn is potentially includable in a cross-jump here. */
2855 afterlast1 = last1, afterlast2 = last2;
2856 last1 = i1, last2 = i2, --minimum;
2857 }
2858 }
2859
2860 if (minimum <= 0 && last1 != 0 && last1 != e1)
2861 *f1 = last1, *f2 = last2;
2862 }
2863
2864 static void
2865 do_cross_jump (insn, newjpos, newlpos)
2866 rtx insn, newjpos, newlpos;
2867 {
2868 /* Find an existing label at this point
2869 or make a new one if there is none. */
2870 register rtx label = get_label_before (newlpos);
2871
2872 /* Make the same jump insn jump to the new point. */
2873 if (GET_CODE (PATTERN (insn)) == RETURN)
2874 {
2875 /* Remove from jump chain of returns. */
2876 delete_from_jump_chain (insn);
2877 /* Change the insn. */
2878 PATTERN (insn) = gen_jump (label);
2879 INSN_CODE (insn) = -1;
2880 JUMP_LABEL (insn) = label;
2881 LABEL_NUSES (label)++;
2882 /* Add to new the jump chain. */
2883 if (INSN_UID (label) < max_jump_chain
2884 && INSN_UID (insn) < max_jump_chain)
2885 {
2886 jump_chain[INSN_UID (insn)] = jump_chain[INSN_UID (label)];
2887 jump_chain[INSN_UID (label)] = insn;
2888 }
2889 }
2890 else
2891 redirect_jump (insn, label);
2892
2893 /* Delete the matching insns before the jump. Also, remove any REG_EQUAL
2894 or REG_EQUIV note in the NEWLPOS stream that isn't also present in
2895 the NEWJPOS stream. */
2896
2897 while (newjpos != insn)
2898 {
2899 rtx lnote;
2900
2901 for (lnote = REG_NOTES (newlpos); lnote; lnote = XEXP (lnote, 1))
2902 if ((REG_NOTE_KIND (lnote) == REG_EQUAL
2903 || REG_NOTE_KIND (lnote) == REG_EQUIV)
2904 && ! find_reg_note (newjpos, REG_EQUAL, XEXP (lnote, 0))
2905 && ! find_reg_note (newjpos, REG_EQUIV, XEXP (lnote, 0)))
2906 remove_note (newlpos, lnote);
2907
2908 delete_insn (newjpos);
2909 newjpos = next_real_insn (newjpos);
2910 newlpos = next_real_insn (newlpos);
2911 }
2912 }
2913 \f
2914 /* Return the label before INSN, or put a new label there. */
2915
2916 rtx
2917 get_label_before (insn)
2918 rtx insn;
2919 {
2920 rtx label;
2921
2922 /* Find an existing label at this point
2923 or make a new one if there is none. */
2924 label = prev_nonnote_insn (insn);
2925
2926 if (label == 0 || GET_CODE (label) != CODE_LABEL)
2927 {
2928 rtx prev = PREV_INSN (insn);
2929
2930 label = gen_label_rtx ();
2931 emit_label_after (label, prev);
2932 LABEL_NUSES (label) = 0;
2933 }
2934 return label;
2935 }
2936
2937 /* Return the label after INSN, or put a new label there. */
2938
2939 rtx
2940 get_label_after (insn)
2941 rtx insn;
2942 {
2943 rtx label;
2944
2945 /* Find an existing label at this point
2946 or make a new one if there is none. */
2947 label = next_nonnote_insn (insn);
2948
2949 if (label == 0 || GET_CODE (label) != CODE_LABEL)
2950 {
2951 label = gen_label_rtx ();
2952 emit_label_after (label, insn);
2953 LABEL_NUSES (label) = 0;
2954 }
2955 return label;
2956 }
2957 \f
2958 /* Return 1 if INSN is a jump that jumps to right after TARGET
2959 only on the condition that TARGET itself would drop through.
2960 Assumes that TARGET is a conditional jump. */
2961
2962 static int
2963 jump_back_p (insn, target)
2964 rtx insn, target;
2965 {
2966 rtx cinsn, ctarget;
2967 enum rtx_code codei, codet;
2968
2969 if (simplejump_p (insn) || ! condjump_p (insn)
2970 || simplejump_p (target)
2971 || target != prev_real_insn (JUMP_LABEL (insn)))
2972 return 0;
2973
2974 cinsn = XEXP (SET_SRC (PATTERN (insn)), 0);
2975 ctarget = XEXP (SET_SRC (PATTERN (target)), 0);
2976
2977 codei = GET_CODE (cinsn);
2978 codet = GET_CODE (ctarget);
2979
2980 if (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx)
2981 {
2982 if (! can_reverse_comparison_p (cinsn, insn))
2983 return 0;
2984 codei = reverse_condition (codei);
2985 }
2986
2987 if (XEXP (SET_SRC (PATTERN (target)), 2) == pc_rtx)
2988 {
2989 if (! can_reverse_comparison_p (ctarget, target))
2990 return 0;
2991 codet = reverse_condition (codet);
2992 }
2993
2994 return (codei == codet
2995 && rtx_renumbered_equal_p (XEXP (cinsn, 0), XEXP (ctarget, 0))
2996 && rtx_renumbered_equal_p (XEXP (cinsn, 1), XEXP (ctarget, 1)));
2997 }
2998 \f
2999 /* Given a comparison, COMPARISON, inside a conditional jump insn, INSN,
3000 return non-zero if it is safe to reverse this comparison. It is if our
3001 floating-point is not IEEE, if this is an NE or EQ comparison, or if
3002 this is known to be an integer comparison. */
3003
3004 int
3005 can_reverse_comparison_p (comparison, insn)
3006 rtx comparison;
3007 rtx insn;
3008 {
3009 rtx arg0;
3010
3011 /* If this is not actually a comparison, we can't reverse it. */
3012 if (GET_RTX_CLASS (GET_CODE (comparison)) != '<')
3013 return 0;
3014
3015 if (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3016 /* If this is an NE comparison, it is safe to reverse it to an EQ
3017 comparison and vice versa, even for floating point. If no operands
3018 are NaNs, the reversal is valid. If some operand is a NaN, EQ is
3019 always false and NE is always true, so the reversal is also valid. */
3020 || flag_fast_math
3021 || GET_CODE (comparison) == NE
3022 || GET_CODE (comparison) == EQ)
3023 return 1;
3024
3025 arg0 = XEXP (comparison, 0);
3026
3027 /* Make sure ARG0 is one of the actual objects being compared. If we
3028 can't do this, we can't be sure the comparison can be reversed.
3029
3030 Handle cc0 and a MODE_CC register. */
3031 if ((GET_CODE (arg0) == REG && GET_MODE_CLASS (GET_MODE (arg0)) == MODE_CC)
3032 #ifdef HAVE_cc0
3033 || arg0 == cc0_rtx
3034 #endif
3035 )
3036 {
3037 rtx prev = prev_nonnote_insn (insn);
3038 rtx set = single_set (prev);
3039
3040 if (set == 0 || SET_DEST (set) != arg0)
3041 return 0;
3042
3043 arg0 = SET_SRC (set);
3044
3045 if (GET_CODE (arg0) == COMPARE)
3046 arg0 = XEXP (arg0, 0);
3047 }
3048
3049 /* We can reverse this if ARG0 is a CONST_INT or if its mode is
3050 not VOIDmode and neither a MODE_CC nor MODE_FLOAT type. */
3051 return (GET_CODE (arg0) == CONST_INT
3052 || (GET_MODE (arg0) != VOIDmode
3053 && GET_MODE_CLASS (GET_MODE (arg0)) != MODE_CC
3054 && GET_MODE_CLASS (GET_MODE (arg0)) != MODE_FLOAT));
3055 }
3056
3057 /* Given an rtx-code for a comparison, return the code
3058 for the negated comparison.
3059 WATCH OUT! reverse_condition is not safe to use on a jump
3060 that might be acting on the results of an IEEE floating point comparison,
3061 because of the special treatment of non-signaling nans in comparisons.
3062 Use can_reverse_comparison_p to be sure. */
3063
3064 enum rtx_code
3065 reverse_condition (code)
3066 enum rtx_code code;
3067 {
3068 switch (code)
3069 {
3070 case EQ:
3071 return NE;
3072
3073 case NE:
3074 return EQ;
3075
3076 case GT:
3077 return LE;
3078
3079 case GE:
3080 return LT;
3081
3082 case LT:
3083 return GE;
3084
3085 case LE:
3086 return GT;
3087
3088 case GTU:
3089 return LEU;
3090
3091 case GEU:
3092 return LTU;
3093
3094 case LTU:
3095 return GEU;
3096
3097 case LEU:
3098 return GTU;
3099
3100 default:
3101 abort ();
3102 return UNKNOWN;
3103 }
3104 }
3105
3106 /* Similar, but return the code when two operands of a comparison are swapped.
3107 This IS safe for IEEE floating-point. */
3108
3109 enum rtx_code
3110 swap_condition (code)
3111 enum rtx_code code;
3112 {
3113 switch (code)
3114 {
3115 case EQ:
3116 case NE:
3117 return code;
3118
3119 case GT:
3120 return LT;
3121
3122 case GE:
3123 return LE;
3124
3125 case LT:
3126 return GT;
3127
3128 case LE:
3129 return GE;
3130
3131 case GTU:
3132 return LTU;
3133
3134 case GEU:
3135 return LEU;
3136
3137 case LTU:
3138 return GTU;
3139
3140 case LEU:
3141 return GEU;
3142
3143 default:
3144 abort ();
3145 return UNKNOWN;
3146 }
3147 }
3148
3149 /* Given a comparison CODE, return the corresponding unsigned comparison.
3150 If CODE is an equality comparison or already an unsigned comparison,
3151 CODE is returned. */
3152
3153 enum rtx_code
3154 unsigned_condition (code)
3155 enum rtx_code code;
3156 {
3157 switch (code)
3158 {
3159 case EQ:
3160 case NE:
3161 case GTU:
3162 case GEU:
3163 case LTU:
3164 case LEU:
3165 return code;
3166
3167 case GT:
3168 return GTU;
3169
3170 case GE:
3171 return GEU;
3172
3173 case LT:
3174 return LTU;
3175
3176 case LE:
3177 return LEU;
3178
3179 default:
3180 abort ();
3181 }
3182 }
3183
3184 /* Similarly, return the signed version of a comparison. */
3185
3186 enum rtx_code
3187 signed_condition (code)
3188 enum rtx_code code;
3189 {
3190 switch (code)
3191 {
3192 case EQ:
3193 case NE:
3194 case GT:
3195 case GE:
3196 case LT:
3197 case LE:
3198 return code;
3199
3200 case GTU:
3201 return GT;
3202
3203 case GEU:
3204 return GE;
3205
3206 case LTU:
3207 return LT;
3208
3209 case LEU:
3210 return LE;
3211
3212 default:
3213 abort ();
3214 }
3215 }
3216 \f
3217 /* Return non-zero if CODE1 is more strict than CODE2, i.e., if the
3218 truth of CODE1 implies the truth of CODE2. */
3219
3220 int
3221 comparison_dominates_p (code1, code2)
3222 enum rtx_code code1, code2;
3223 {
3224 if (code1 == code2)
3225 return 1;
3226
3227 switch (code1)
3228 {
3229 case EQ:
3230 if (code2 == LE || code2 == LEU || code2 == GE || code2 == GEU)
3231 return 1;
3232 break;
3233
3234 case LT:
3235 if (code2 == LE || code2 == NE)
3236 return 1;
3237 break;
3238
3239 case GT:
3240 if (code2 == GE || code2 == NE)
3241 return 1;
3242 break;
3243
3244 case LTU:
3245 if (code2 == LEU || code2 == NE)
3246 return 1;
3247 break;
3248
3249 case GTU:
3250 if (code2 == GEU || code2 == NE)
3251 return 1;
3252 break;
3253
3254 default:
3255 break;
3256 }
3257
3258 return 0;
3259 }
3260 \f
3261 /* Return 1 if INSN is an unconditional jump and nothing else. */
3262
3263 int
3264 simplejump_p (insn)
3265 rtx insn;
3266 {
3267 return (GET_CODE (insn) == JUMP_INSN
3268 && GET_CODE (PATTERN (insn)) == SET
3269 && GET_CODE (SET_DEST (PATTERN (insn))) == PC
3270 && GET_CODE (SET_SRC (PATTERN (insn))) == LABEL_REF);
3271 }
3272
3273 /* Return nonzero if INSN is a (possibly) conditional jump
3274 and nothing more. */
3275
3276 int
3277 condjump_p (insn)
3278 rtx insn;
3279 {
3280 register rtx x = PATTERN (insn);
3281 if (GET_CODE (x) != SET)
3282 return 0;
3283 if (GET_CODE (SET_DEST (x)) != PC)
3284 return 0;
3285 if (GET_CODE (SET_SRC (x)) == LABEL_REF)
3286 return 1;
3287 if (GET_CODE (SET_SRC (x)) != IF_THEN_ELSE)
3288 return 0;
3289 if (XEXP (SET_SRC (x), 2) == pc_rtx
3290 && (GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF
3291 || GET_CODE (XEXP (SET_SRC (x), 1)) == RETURN))
3292 return 1;
3293 if (XEXP (SET_SRC (x), 1) == pc_rtx
3294 && (GET_CODE (XEXP (SET_SRC (x), 2)) == LABEL_REF
3295 || GET_CODE (XEXP (SET_SRC (x), 2)) == RETURN))
3296 return 1;
3297 return 0;
3298 }
3299
3300 /* Return nonzero if INSN is a (possibly) conditional jump
3301 and nothing more. */
3302
3303 int
3304 condjump_in_parallel_p (insn)
3305 rtx insn;
3306 {
3307 register rtx x = PATTERN (insn);
3308
3309 if (GET_CODE (x) != PARALLEL)
3310 return 0;
3311 else
3312 x = XVECEXP (x, 0, 0);
3313
3314 if (GET_CODE (x) != SET)
3315 return 0;
3316 if (GET_CODE (SET_DEST (x)) != PC)
3317 return 0;
3318 if (GET_CODE (SET_SRC (x)) == LABEL_REF)
3319 return 1;
3320 if (GET_CODE (SET_SRC (x)) != IF_THEN_ELSE)
3321 return 0;
3322 if (XEXP (SET_SRC (x), 2) == pc_rtx
3323 && (GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF
3324 || GET_CODE (XEXP (SET_SRC (x), 1)) == RETURN))
3325 return 1;
3326 if (XEXP (SET_SRC (x), 1) == pc_rtx
3327 && (GET_CODE (XEXP (SET_SRC (x), 2)) == LABEL_REF
3328 || GET_CODE (XEXP (SET_SRC (x), 2)) == RETURN))
3329 return 1;
3330 return 0;
3331 }
3332
3333 #ifdef HAVE_cc0
3334
3335 /* Return 1 if X is an RTX that does nothing but set the condition codes
3336 and CLOBBER or USE registers.
3337 Return -1 if X does explicitly set the condition codes,
3338 but also does other things. */
3339
3340 int
3341 sets_cc0_p (x)
3342 rtx x ATTRIBUTE_UNUSED;
3343 {
3344 if (GET_CODE (x) == SET && SET_DEST (x) == cc0_rtx)
3345 return 1;
3346 if (GET_CODE (x) == PARALLEL)
3347 {
3348 int i;
3349 int sets_cc0 = 0;
3350 int other_things = 0;
3351 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
3352 {
3353 if (GET_CODE (XVECEXP (x, 0, i)) == SET
3354 && SET_DEST (XVECEXP (x, 0, i)) == cc0_rtx)
3355 sets_cc0 = 1;
3356 else if (GET_CODE (XVECEXP (x, 0, i)) == SET)
3357 other_things = 1;
3358 }
3359 return ! sets_cc0 ? 0 : other_things ? -1 : 1;
3360 }
3361 return 0;
3362 }
3363 #endif
3364 \f
3365 /* Follow any unconditional jump at LABEL;
3366 return the ultimate label reached by any such chain of jumps.
3367 If LABEL is not followed by a jump, return LABEL.
3368 If the chain loops or we can't find end, return LABEL,
3369 since that tells caller to avoid changing the insn.
3370
3371 If RELOAD_COMPLETED is 0, we do not chain across a NOTE_INSN_LOOP_BEG or
3372 a USE or CLOBBER. */
3373
3374 rtx
3375 follow_jumps (label)
3376 rtx label;
3377 {
3378 register rtx insn;
3379 register rtx next;
3380 register rtx value = label;
3381 register int depth;
3382
3383 for (depth = 0;
3384 (depth < 10
3385 && (insn = next_active_insn (value)) != 0
3386 && GET_CODE (insn) == JUMP_INSN
3387 && ((JUMP_LABEL (insn) != 0 && simplejump_p (insn))
3388 || GET_CODE (PATTERN (insn)) == RETURN)
3389 && (next = NEXT_INSN (insn))
3390 && GET_CODE (next) == BARRIER);
3391 depth++)
3392 {
3393 /* Don't chain through the insn that jumps into a loop
3394 from outside the loop,
3395 since that would create multiple loop entry jumps
3396 and prevent loop optimization. */
3397 rtx tem;
3398 if (!reload_completed)
3399 for (tem = value; tem != insn; tem = NEXT_INSN (tem))
3400 if (GET_CODE (tem) == NOTE
3401 && (NOTE_LINE_NUMBER (tem) == NOTE_INSN_LOOP_BEG
3402 /* ??? Optional. Disables some optimizations, but makes
3403 gcov output more accurate with -O. */
3404 || (flag_test_coverage && NOTE_LINE_NUMBER (tem) > 0)))
3405 return value;
3406
3407 /* If we have found a cycle, make the insn jump to itself. */
3408 if (JUMP_LABEL (insn) == label)
3409 return label;
3410
3411 tem = next_active_insn (JUMP_LABEL (insn));
3412 if (tem && (GET_CODE (PATTERN (tem)) == ADDR_VEC
3413 || GET_CODE (PATTERN (tem)) == ADDR_DIFF_VEC))
3414 break;
3415
3416 value = JUMP_LABEL (insn);
3417 }
3418 if (depth == 10)
3419 return label;
3420 return value;
3421 }
3422
3423 /* Assuming that field IDX of X is a vector of label_refs,
3424 replace each of them by the ultimate label reached by it.
3425 Return nonzero if a change is made.
3426 If IGNORE_LOOPS is 0, we do not chain across a NOTE_INSN_LOOP_BEG. */
3427
3428 static int
3429 tension_vector_labels (x, idx)
3430 register rtx x;
3431 register int idx;
3432 {
3433 int changed = 0;
3434 register int i;
3435 for (i = XVECLEN (x, idx) - 1; i >= 0; i--)
3436 {
3437 register rtx olabel = XEXP (XVECEXP (x, idx, i), 0);
3438 register rtx nlabel = follow_jumps (olabel);
3439 if (nlabel && nlabel != olabel)
3440 {
3441 XEXP (XVECEXP (x, idx, i), 0) = nlabel;
3442 ++LABEL_NUSES (nlabel);
3443 if (--LABEL_NUSES (olabel) == 0)
3444 delete_insn (olabel);
3445 changed = 1;
3446 }
3447 }
3448 return changed;
3449 }
3450 \f
3451 /* Find all CODE_LABELs referred to in X, and increment their use counts.
3452 If INSN is a JUMP_INSN and there is at least one CODE_LABEL referenced
3453 in INSN, then store one of them in JUMP_LABEL (INSN).
3454 If INSN is an INSN or a CALL_INSN and there is at least one CODE_LABEL
3455 referenced in INSN, add a REG_LABEL note containing that label to INSN.
3456 Also, when there are consecutive labels, canonicalize on the last of them.
3457
3458 Note that two labels separated by a loop-beginning note
3459 must be kept distinct if we have not yet done loop-optimization,
3460 because the gap between them is where loop-optimize
3461 will want to move invariant code to. CROSS_JUMP tells us
3462 that loop-optimization is done with.
3463
3464 Once reload has completed (CROSS_JUMP non-zero), we need not consider
3465 two labels distinct if they are separated by only USE or CLOBBER insns. */
3466
3467 static void
3468 mark_jump_label (x, insn, cross_jump)
3469 register rtx x;
3470 rtx insn;
3471 int cross_jump;
3472 {
3473 register RTX_CODE code = GET_CODE (x);
3474 register int i;
3475 register char *fmt;
3476
3477 switch (code)
3478 {
3479 case PC:
3480 case CC0:
3481 case REG:
3482 case SUBREG:
3483 case CONST_INT:
3484 case SYMBOL_REF:
3485 case CONST_DOUBLE:
3486 case CLOBBER:
3487 case CALL:
3488 return;
3489
3490 case MEM:
3491 /* If this is a constant-pool reference, see if it is a label. */
3492 if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
3493 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)))
3494 mark_jump_label (get_pool_constant (XEXP (x, 0)), insn, cross_jump);
3495 break;
3496
3497 case LABEL_REF:
3498 {
3499 rtx label = XEXP (x, 0);
3500 rtx olabel = label;
3501 rtx note;
3502 rtx next;
3503
3504 if (GET_CODE (label) != CODE_LABEL)
3505 abort ();
3506
3507 /* Ignore references to labels of containing functions. */
3508 if (LABEL_REF_NONLOCAL_P (x))
3509 break;
3510
3511 /* If there are other labels following this one,
3512 replace it with the last of the consecutive labels. */
3513 for (next = NEXT_INSN (label); next; next = NEXT_INSN (next))
3514 {
3515 if (GET_CODE (next) == CODE_LABEL)
3516 label = next;
3517 else if (cross_jump && GET_CODE (next) == INSN
3518 && (GET_CODE (PATTERN (next)) == USE
3519 || GET_CODE (PATTERN (next)) == CLOBBER))
3520 continue;
3521 else if (GET_CODE (next) != NOTE)
3522 break;
3523 else if (! cross_jump
3524 && (NOTE_LINE_NUMBER (next) == NOTE_INSN_LOOP_BEG
3525 || NOTE_LINE_NUMBER (next) == NOTE_INSN_FUNCTION_END
3526 /* ??? Optional. Disables some optimizations, but
3527 makes gcov output more accurate with -O. */
3528 || (flag_test_coverage && NOTE_LINE_NUMBER (next) > 0)))
3529 break;
3530 }
3531
3532 XEXP (x, 0) = label;
3533 if (! insn || ! INSN_DELETED_P (insn))
3534 ++LABEL_NUSES (label);
3535
3536 if (insn)
3537 {
3538 if (GET_CODE (insn) == JUMP_INSN)
3539 JUMP_LABEL (insn) = label;
3540
3541 /* If we've changed OLABEL and we had a REG_LABEL note
3542 for it, update it as well. */
3543 else if (label != olabel
3544 && (note = find_reg_note (insn, REG_LABEL, olabel)) != 0)
3545 XEXP (note, 0) = label;
3546
3547 /* Otherwise, add a REG_LABEL note for LABEL unless there already
3548 is one. */
3549 else if (! find_reg_note (insn, REG_LABEL, label))
3550 {
3551 /* This code used to ignore labels which refered to dispatch
3552 tables to avoid flow.c generating worse code.
3553
3554 However, in the presense of global optimizations like
3555 gcse which call find_basic_blocks without calling
3556 life_analysis, not recording such labels will lead
3557 to compiler aborts because of inconsistencies in the
3558 flow graph. So we go ahead and record the label.
3559
3560 It may also be the case that the optimization argument
3561 is no longer valid because of the more accurate cfg
3562 we build in find_basic_blocks -- it no longer pessimizes
3563 code when it finds a REG_LABEL note. */
3564 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, label,
3565 REG_NOTES (insn));
3566 }
3567 }
3568 return;
3569 }
3570
3571 /* Do walk the labels in a vector, but not the first operand of an
3572 ADDR_DIFF_VEC. Don't set the JUMP_LABEL of a vector. */
3573 case ADDR_VEC:
3574 case ADDR_DIFF_VEC:
3575 if (! INSN_DELETED_P (insn))
3576 {
3577 int eltnum = code == ADDR_DIFF_VEC ? 1 : 0;
3578
3579 for (i = 0; i < XVECLEN (x, eltnum); i++)
3580 mark_jump_label (XVECEXP (x, eltnum, i), NULL_RTX, cross_jump);
3581 }
3582 return;
3583
3584 default:
3585 break;
3586 }
3587
3588 fmt = GET_RTX_FORMAT (code);
3589 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3590 {
3591 if (fmt[i] == 'e')
3592 mark_jump_label (XEXP (x, i), insn, cross_jump);
3593 else if (fmt[i] == 'E')
3594 {
3595 register int j;
3596 for (j = 0; j < XVECLEN (x, i); j++)
3597 mark_jump_label (XVECEXP (x, i, j), insn, cross_jump);
3598 }
3599 }
3600 }
3601
3602 /* If all INSN does is set the pc, delete it,
3603 and delete the insn that set the condition codes for it
3604 if that's what the previous thing was. */
3605
3606 void
3607 delete_jump (insn)
3608 rtx insn;
3609 {
3610 register rtx set = single_set (insn);
3611
3612 if (set && GET_CODE (SET_DEST (set)) == PC)
3613 delete_computation (insn);
3614 }
3615
3616 /* Delete INSN and recursively delete insns that compute values used only
3617 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3618 If we are running before flow.c, we need do nothing since flow.c will
3619 delete dead code. We also can't know if the registers being used are
3620 dead or not at this point.
3621
3622 Otherwise, look at all our REG_DEAD notes. If a previous insn does
3623 nothing other than set a register that dies in this insn, we can delete
3624 that insn as well.
3625
3626 On machines with CC0, if CC0 is used in this insn, we may be able to
3627 delete the insn that set it. */
3628
3629 static void
3630 delete_computation (insn)
3631 rtx insn;
3632 {
3633 rtx note, next;
3634
3635 #ifdef HAVE_cc0
3636 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
3637 {
3638 rtx prev = prev_nonnote_insn (insn);
3639 /* We assume that at this stage
3640 CC's are always set explicitly
3641 and always immediately before the jump that
3642 will use them. So if the previous insn
3643 exists to set the CC's, delete it
3644 (unless it performs auto-increments, etc.). */
3645 if (prev && GET_CODE (prev) == INSN
3646 && sets_cc0_p (PATTERN (prev)))
3647 {
3648 if (sets_cc0_p (PATTERN (prev)) > 0
3649 && !FIND_REG_INC_NOTE (prev, NULL_RTX))
3650 delete_computation (prev);
3651 else
3652 /* Otherwise, show that cc0 won't be used. */
3653 REG_NOTES (prev) = gen_rtx_EXPR_LIST (REG_UNUSED,
3654 cc0_rtx, REG_NOTES (prev));
3655 }
3656 }
3657 #endif
3658
3659 for (note = REG_NOTES (insn); note; note = next)
3660 {
3661 rtx our_prev;
3662
3663 next = XEXP (note, 1);
3664
3665 if (REG_NOTE_KIND (note) != REG_DEAD
3666 /* Verify that the REG_NOTE is legitimate. */
3667 || GET_CODE (XEXP (note, 0)) != REG)
3668 continue;
3669
3670 for (our_prev = prev_nonnote_insn (insn);
3671 our_prev && GET_CODE (our_prev) == INSN;
3672 our_prev = prev_nonnote_insn (our_prev))
3673 {
3674 /* If we reach a SEQUENCE, it is too complex to try to
3675 do anything with it, so give up. */
3676 if (GET_CODE (PATTERN (our_prev)) == SEQUENCE)
3677 break;
3678
3679 if (GET_CODE (PATTERN (our_prev)) == USE
3680 && GET_CODE (XEXP (PATTERN (our_prev), 0)) == INSN)
3681 /* reorg creates USEs that look like this. We leave them
3682 alone because reorg needs them for its own purposes. */
3683 break;
3684
3685 if (reg_set_p (XEXP (note, 0), PATTERN (our_prev)))
3686 {
3687 if (FIND_REG_INC_NOTE (our_prev, NULL_RTX))
3688 break;
3689
3690 if (GET_CODE (PATTERN (our_prev)) == PARALLEL)
3691 {
3692 /* If we find a SET of something else, we can't
3693 delete the insn. */
3694
3695 int i;
3696
3697 for (i = 0; i < XVECLEN (PATTERN (our_prev), 0); i++)
3698 {
3699 rtx part = XVECEXP (PATTERN (our_prev), 0, i);
3700
3701 if (GET_CODE (part) == SET
3702 && SET_DEST (part) != XEXP (note, 0))
3703 break;
3704 }
3705
3706 if (i == XVECLEN (PATTERN (our_prev), 0))
3707 delete_computation (our_prev);
3708 }
3709 else if (GET_CODE (PATTERN (our_prev)) == SET
3710 && SET_DEST (PATTERN (our_prev)) == XEXP (note, 0))
3711 delete_computation (our_prev);
3712
3713 break;
3714 }
3715
3716 /* If OUR_PREV references the register that dies here, it is an
3717 additional use. Hence any prior SET isn't dead. However, this
3718 insn becomes the new place for the REG_DEAD note. */
3719 if (reg_overlap_mentioned_p (XEXP (note, 0),
3720 PATTERN (our_prev)))
3721 {
3722 XEXP (note, 1) = REG_NOTES (our_prev);
3723 REG_NOTES (our_prev) = note;
3724 break;
3725 }
3726 }
3727 }
3728
3729 delete_insn (insn);
3730 }
3731 \f
3732 /* Delete insn INSN from the chain of insns and update label ref counts.
3733 May delete some following insns as a consequence; may even delete
3734 a label elsewhere and insns that follow it.
3735
3736 Returns the first insn after INSN that was not deleted. */
3737
3738 rtx
3739 delete_insn (insn)
3740 register rtx insn;
3741 {
3742 register rtx next = NEXT_INSN (insn);
3743 register rtx prev = PREV_INSN (insn);
3744 register int was_code_label = (GET_CODE (insn) == CODE_LABEL);
3745 register int dont_really_delete = 0;
3746
3747 while (next && INSN_DELETED_P (next))
3748 next = NEXT_INSN (next);
3749
3750 /* This insn is already deleted => return first following nondeleted. */
3751 if (INSN_DELETED_P (insn))
3752 return next;
3753
3754 /* Don't delete user-declared labels. Convert them to special NOTEs
3755 instead. */
3756 if (was_code_label && LABEL_NAME (insn) != 0
3757 && optimize && ! dont_really_delete)
3758 {
3759 PUT_CODE (insn, NOTE);
3760 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED_LABEL;
3761 NOTE_SOURCE_FILE (insn) = 0;
3762 dont_really_delete = 1;
3763 }
3764 else
3765 /* Mark this insn as deleted. */
3766 INSN_DELETED_P (insn) = 1;
3767
3768 /* If this is an unconditional jump, delete it from the jump chain. */
3769 if (simplejump_p (insn))
3770 delete_from_jump_chain (insn);
3771
3772 /* If instruction is followed by a barrier,
3773 delete the barrier too. */
3774
3775 if (next != 0 && GET_CODE (next) == BARRIER)
3776 {
3777 INSN_DELETED_P (next) = 1;
3778 next = NEXT_INSN (next);
3779 }
3780
3781 /* Patch out INSN (and the barrier if any) */
3782
3783 if (optimize && ! dont_really_delete)
3784 {
3785 if (prev)
3786 {
3787 NEXT_INSN (prev) = next;
3788 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3789 NEXT_INSN (XVECEXP (PATTERN (prev), 0,
3790 XVECLEN (PATTERN (prev), 0) - 1)) = next;
3791 }
3792
3793 if (next)
3794 {
3795 PREV_INSN (next) = prev;
3796 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3797 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3798 }
3799
3800 if (prev && NEXT_INSN (prev) == 0)
3801 set_last_insn (prev);
3802 }
3803
3804 /* If deleting a jump, decrement the count of the label,
3805 and delete the label if it is now unused. */
3806
3807 if (GET_CODE (insn) == JUMP_INSN && JUMP_LABEL (insn))
3808 if (--LABEL_NUSES (JUMP_LABEL (insn)) == 0)
3809 {
3810 /* This can delete NEXT or PREV,
3811 either directly if NEXT is JUMP_LABEL (INSN),
3812 or indirectly through more levels of jumps. */
3813 delete_insn (JUMP_LABEL (insn));
3814 /* I feel a little doubtful about this loop,
3815 but I see no clean and sure alternative way
3816 to find the first insn after INSN that is not now deleted.
3817 I hope this works. */
3818 while (next && INSN_DELETED_P (next))
3819 next = NEXT_INSN (next);
3820 return next;
3821 }
3822
3823 /* Likewise if we're deleting a dispatch table. */
3824
3825 if (GET_CODE (insn) == JUMP_INSN
3826 && (GET_CODE (PATTERN (insn)) == ADDR_VEC
3827 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC))
3828 {
3829 rtx pat = PATTERN (insn);
3830 int i, diff_vec_p = GET_CODE (pat) == ADDR_DIFF_VEC;
3831 int len = XVECLEN (pat, diff_vec_p);
3832
3833 for (i = 0; i < len; i++)
3834 if (--LABEL_NUSES (XEXP (XVECEXP (pat, diff_vec_p, i), 0)) == 0)
3835 delete_insn (XEXP (XVECEXP (pat, diff_vec_p, i), 0));
3836 while (next && INSN_DELETED_P (next))
3837 next = NEXT_INSN (next);
3838 return next;
3839 }
3840
3841 while (prev && (INSN_DELETED_P (prev) || GET_CODE (prev) == NOTE))
3842 prev = PREV_INSN (prev);
3843
3844 /* If INSN was a label and a dispatch table follows it,
3845 delete the dispatch table. The tablejump must have gone already.
3846 It isn't useful to fall through into a table. */
3847
3848 if (was_code_label
3849 && NEXT_INSN (insn) != 0
3850 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN
3851 && (GET_CODE (PATTERN (NEXT_INSN (insn))) == ADDR_VEC
3852 || GET_CODE (PATTERN (NEXT_INSN (insn))) == ADDR_DIFF_VEC))
3853 next = delete_insn (NEXT_INSN (insn));
3854
3855 /* If INSN was a label, delete insns following it if now unreachable. */
3856
3857 if (was_code_label && prev && GET_CODE (prev) == BARRIER)
3858 {
3859 register RTX_CODE code;
3860 while (next != 0
3861 && (GET_RTX_CLASS (code = GET_CODE (next)) == 'i'
3862 || code == NOTE || code == BARRIER
3863 || (code == CODE_LABEL && INSN_DELETED_P (next))))
3864 {
3865 if (code == NOTE
3866 && NOTE_LINE_NUMBER (next) != NOTE_INSN_FUNCTION_END)
3867 next = NEXT_INSN (next);
3868 /* Keep going past other deleted labels to delete what follows. */
3869 else if (code == CODE_LABEL && INSN_DELETED_P (next))
3870 next = NEXT_INSN (next);
3871 else
3872 /* Note: if this deletes a jump, it can cause more
3873 deletion of unreachable code, after a different label.
3874 As long as the value from this recursive call is correct,
3875 this invocation functions correctly. */
3876 next = delete_insn (next);
3877 }
3878 }
3879
3880 return next;
3881 }
3882
3883 /* Advance from INSN till reaching something not deleted
3884 then return that. May return INSN itself. */
3885
3886 rtx
3887 next_nondeleted_insn (insn)
3888 rtx insn;
3889 {
3890 while (INSN_DELETED_P (insn))
3891 insn = NEXT_INSN (insn);
3892 return insn;
3893 }
3894 \f
3895 /* Delete a range of insns from FROM to TO, inclusive.
3896 This is for the sake of peephole optimization, so assume
3897 that whatever these insns do will still be done by a new
3898 peephole insn that will replace them. */
3899
3900 void
3901 delete_for_peephole (from, to)
3902 register rtx from, to;
3903 {
3904 register rtx insn = from;
3905
3906 while (1)
3907 {
3908 register rtx next = NEXT_INSN (insn);
3909 register rtx prev = PREV_INSN (insn);
3910
3911 if (GET_CODE (insn) != NOTE)
3912 {
3913 INSN_DELETED_P (insn) = 1;
3914
3915 /* Patch this insn out of the chain. */
3916 /* We don't do this all at once, because we
3917 must preserve all NOTEs. */
3918 if (prev)
3919 NEXT_INSN (prev) = next;
3920
3921 if (next)
3922 PREV_INSN (next) = prev;
3923 }
3924
3925 if (insn == to)
3926 break;
3927 insn = next;
3928 }
3929
3930 /* Note that if TO is an unconditional jump
3931 we *do not* delete the BARRIER that follows,
3932 since the peephole that replaces this sequence
3933 is also an unconditional jump in that case. */
3934 }
3935 \f
3936 /* Invert the condition of the jump JUMP, and make it jump
3937 to label NLABEL instead of where it jumps now. */
3938
3939 int
3940 invert_jump (jump, nlabel)
3941 rtx jump, nlabel;
3942 {
3943 /* We have to either invert the condition and change the label or
3944 do neither. Either operation could fail. We first try to invert
3945 the jump. If that succeeds, we try changing the label. If that fails,
3946 we invert the jump back to what it was. */
3947
3948 if (! invert_exp (PATTERN (jump), jump))
3949 return 0;
3950
3951 if (redirect_jump (jump, nlabel))
3952 {
3953 if (flag_branch_probabilities)
3954 {
3955 rtx note = find_reg_note (jump, REG_BR_PROB, 0);
3956
3957 /* An inverted jump means that a probability taken becomes a
3958 probability not taken. Subtract the branch probability from the
3959 probability base to convert it back to a taken probability.
3960 (We don't flip the probability on a branch that's never taken. */
3961 if (note && XINT (XEXP (note, 0), 0) >= 0)
3962 XINT (XEXP (note, 0), 0) = REG_BR_PROB_BASE - XINT (XEXP (note, 0), 0);
3963 }
3964
3965 return 1;
3966 }
3967
3968 if (! invert_exp (PATTERN (jump), jump))
3969 /* This should just be putting it back the way it was. */
3970 abort ();
3971
3972 return 0;
3973 }
3974
3975 /* Invert the jump condition of rtx X contained in jump insn, INSN.
3976
3977 Return 1 if we can do so, 0 if we cannot find a way to do so that
3978 matches a pattern. */
3979
3980 int
3981 invert_exp (x, insn)
3982 rtx x;
3983 rtx insn;
3984 {
3985 register RTX_CODE code;
3986 register int i;
3987 register char *fmt;
3988
3989 code = GET_CODE (x);
3990
3991 if (code == IF_THEN_ELSE)
3992 {
3993 register rtx comp = XEXP (x, 0);
3994 register rtx tem;
3995
3996 /* We can do this in two ways: The preferable way, which can only
3997 be done if this is not an integer comparison, is to reverse
3998 the comparison code. Otherwise, swap the THEN-part and ELSE-part
3999 of the IF_THEN_ELSE. If we can't do either, fail. */
4000
4001 if (can_reverse_comparison_p (comp, insn)
4002 && validate_change (insn, &XEXP (x, 0),
4003 gen_rtx_fmt_ee (reverse_condition (GET_CODE (comp)),
4004 GET_MODE (comp), XEXP (comp, 0),
4005 XEXP (comp, 1)), 0))
4006 return 1;
4007
4008 tem = XEXP (x, 1);
4009 validate_change (insn, &XEXP (x, 1), XEXP (x, 2), 1);
4010 validate_change (insn, &XEXP (x, 2), tem, 1);
4011 return apply_change_group ();
4012 }
4013
4014 fmt = GET_RTX_FORMAT (code);
4015 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4016 {
4017 if (fmt[i] == 'e')
4018 if (! invert_exp (XEXP (x, i), insn))
4019 return 0;
4020 if (fmt[i] == 'E')
4021 {
4022 register int j;
4023 for (j = 0; j < XVECLEN (x, i); j++)
4024 if (!invert_exp (XVECEXP (x, i, j), insn))
4025 return 0;
4026 }
4027 }
4028
4029 return 1;
4030 }
4031 \f
4032 /* Make jump JUMP jump to label NLABEL instead of where it jumps now.
4033 If the old jump target label is unused as a result,
4034 it and the code following it may be deleted.
4035
4036 If NLABEL is zero, we are to turn the jump into a (possibly conditional)
4037 RETURN insn.
4038
4039 The return value will be 1 if the change was made, 0 if it wasn't (this
4040 can only occur for NLABEL == 0). */
4041
4042 int
4043 redirect_jump (jump, nlabel)
4044 rtx jump, nlabel;
4045 {
4046 register rtx olabel = JUMP_LABEL (jump);
4047
4048 if (nlabel == olabel)
4049 return 1;
4050
4051 if (! redirect_exp (&PATTERN (jump), olabel, nlabel, jump))
4052 return 0;
4053
4054 /* If this is an unconditional branch, delete it from the jump_chain of
4055 OLABEL and add it to the jump_chain of NLABEL (assuming both labels
4056 have UID's in range and JUMP_CHAIN is valid). */
4057 if (jump_chain && (simplejump_p (jump)
4058 || GET_CODE (PATTERN (jump)) == RETURN))
4059 {
4060 int label_index = nlabel ? INSN_UID (nlabel) : 0;
4061
4062 delete_from_jump_chain (jump);
4063 if (label_index < max_jump_chain
4064 && INSN_UID (jump) < max_jump_chain)
4065 {
4066 jump_chain[INSN_UID (jump)] = jump_chain[label_index];
4067 jump_chain[label_index] = jump;
4068 }
4069 }
4070
4071 JUMP_LABEL (jump) = nlabel;
4072 if (nlabel)
4073 ++LABEL_NUSES (nlabel);
4074
4075 if (olabel && --LABEL_NUSES (olabel) == 0)
4076 delete_insn (olabel);
4077
4078 return 1;
4079 }
4080
4081 /* Delete the instruction JUMP from any jump chain it might be on. */
4082
4083 static void
4084 delete_from_jump_chain (jump)
4085 rtx jump;
4086 {
4087 int index;
4088 rtx olabel = JUMP_LABEL (jump);
4089
4090 /* Handle unconditional jumps. */
4091 if (jump_chain && olabel != 0
4092 && INSN_UID (olabel) < max_jump_chain
4093 && simplejump_p (jump))
4094 index = INSN_UID (olabel);
4095 /* Handle return insns. */
4096 else if (jump_chain && GET_CODE (PATTERN (jump)) == RETURN)
4097 index = 0;
4098 else return;
4099
4100 if (jump_chain[index] == jump)
4101 jump_chain[index] = jump_chain[INSN_UID (jump)];
4102 else
4103 {
4104 rtx insn;
4105
4106 for (insn = jump_chain[index];
4107 insn != 0;
4108 insn = jump_chain[INSN_UID (insn)])
4109 if (jump_chain[INSN_UID (insn)] == jump)
4110 {
4111 jump_chain[INSN_UID (insn)] = jump_chain[INSN_UID (jump)];
4112 break;
4113 }
4114 }
4115 }
4116
4117 /* If NLABEL is nonzero, throughout the rtx at LOC,
4118 alter (LABEL_REF OLABEL) to (LABEL_REF NLABEL). If OLABEL is
4119 zero, alter (RETURN) to (LABEL_REF NLABEL).
4120
4121 If NLABEL is zero, alter (LABEL_REF OLABEL) to (RETURN) and check
4122 validity with validate_change. Convert (set (pc) (label_ref olabel))
4123 to (return).
4124
4125 Return 0 if we found a change we would like to make but it is invalid.
4126 Otherwise, return 1. */
4127
4128 int
4129 redirect_exp (loc, olabel, nlabel, insn)
4130 rtx *loc;
4131 rtx olabel, nlabel;
4132 rtx insn;
4133 {
4134 register rtx x = *loc;
4135 register RTX_CODE code = GET_CODE (x);
4136 register int i;
4137 register char *fmt;
4138
4139 if (code == LABEL_REF)
4140 {
4141 if (XEXP (x, 0) == olabel)
4142 {
4143 if (nlabel)
4144 XEXP (x, 0) = nlabel;
4145 else
4146 return validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 0);
4147 return 1;
4148 }
4149 }
4150 else if (code == RETURN && olabel == 0)
4151 {
4152 x = gen_rtx_LABEL_REF (VOIDmode, nlabel);
4153 if (loc == &PATTERN (insn))
4154 x = gen_rtx_SET (VOIDmode, pc_rtx, x);
4155 return validate_change (insn, loc, x, 0);
4156 }
4157
4158 if (code == SET && nlabel == 0 && SET_DEST (x) == pc_rtx
4159 && GET_CODE (SET_SRC (x)) == LABEL_REF
4160 && XEXP (SET_SRC (x), 0) == olabel)
4161 return validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 0);
4162
4163 fmt = GET_RTX_FORMAT (code);
4164 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4165 {
4166 if (fmt[i] == 'e')
4167 if (! redirect_exp (&XEXP (x, i), olabel, nlabel, insn))
4168 return 0;
4169 if (fmt[i] == 'E')
4170 {
4171 register int j;
4172 for (j = 0; j < XVECLEN (x, i); j++)
4173 if (! redirect_exp (&XVECEXP (x, i, j), olabel, nlabel, insn))
4174 return 0;
4175 }
4176 }
4177
4178 return 1;
4179 }
4180 \f
4181 /* Make jump JUMP jump to label NLABEL, assuming it used to be a tablejump.
4182
4183 If the old jump target label (before the dispatch table) becomes unused,
4184 it and the dispatch table may be deleted. In that case, find the insn
4185 before the jump references that label and delete it and logical successors
4186 too. */
4187
4188 static void
4189 redirect_tablejump (jump, nlabel)
4190 rtx jump, nlabel;
4191 {
4192 register rtx olabel = JUMP_LABEL (jump);
4193
4194 /* Add this jump to the jump_chain of NLABEL. */
4195 if (jump_chain && INSN_UID (nlabel) < max_jump_chain
4196 && INSN_UID (jump) < max_jump_chain)
4197 {
4198 jump_chain[INSN_UID (jump)] = jump_chain[INSN_UID (nlabel)];
4199 jump_chain[INSN_UID (nlabel)] = jump;
4200 }
4201
4202 PATTERN (jump) = gen_jump (nlabel);
4203 JUMP_LABEL (jump) = nlabel;
4204 ++LABEL_NUSES (nlabel);
4205 INSN_CODE (jump) = -1;
4206
4207 if (--LABEL_NUSES (olabel) == 0)
4208 {
4209 delete_labelref_insn (jump, olabel, 0);
4210 delete_insn (olabel);
4211 }
4212 }
4213
4214 /* Find the insn referencing LABEL that is a logical predecessor of INSN.
4215 If we found one, delete it and then delete this insn if DELETE_THIS is
4216 non-zero. Return non-zero if INSN or a predecessor references LABEL. */
4217
4218 static int
4219 delete_labelref_insn (insn, label, delete_this)
4220 rtx insn, label;
4221 int delete_this;
4222 {
4223 int deleted = 0;
4224 rtx link;
4225
4226 if (GET_CODE (insn) != NOTE
4227 && reg_mentioned_p (label, PATTERN (insn)))
4228 {
4229 if (delete_this)
4230 {
4231 delete_insn (insn);
4232 deleted = 1;
4233 }
4234 else
4235 return 1;
4236 }
4237
4238 for (link = LOG_LINKS (insn); link; link = XEXP (link, 1))
4239 if (delete_labelref_insn (XEXP (link, 0), label, 1))
4240 {
4241 if (delete_this)
4242 {
4243 delete_insn (insn);
4244 deleted = 1;
4245 }
4246 else
4247 return 1;
4248 }
4249
4250 return deleted;
4251 }
4252 \f
4253 /* Like rtx_equal_p except that it considers two REGs as equal
4254 if they renumber to the same value and considers two commutative
4255 operations to be the same if the order of the operands has been
4256 reversed.
4257
4258 ??? Addition is not commutative on the PA due to the weird implicit
4259 space register selection rules for memory addresses. Therefore, we
4260 don't consider a + b == b + a.
4261
4262 We could/should make this test a little tighter. Possibly only
4263 disabling it on the PA via some backend macro or only disabling this
4264 case when the PLUS is inside a MEM. */
4265
4266 int
4267 rtx_renumbered_equal_p (x, y)
4268 rtx x, y;
4269 {
4270 register int i;
4271 register RTX_CODE code = GET_CODE (x);
4272 register char *fmt;
4273
4274 if (x == y)
4275 return 1;
4276
4277 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
4278 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
4279 && GET_CODE (SUBREG_REG (y)) == REG)))
4280 {
4281 int reg_x = -1, reg_y = -1;
4282 int word_x = 0, word_y = 0;
4283
4284 if (GET_MODE (x) != GET_MODE (y))
4285 return 0;
4286
4287 /* If we haven't done any renumbering, don't
4288 make any assumptions. */
4289 if (reg_renumber == 0)
4290 return rtx_equal_p (x, y);
4291
4292 if (code == SUBREG)
4293 {
4294 reg_x = REGNO (SUBREG_REG (x));
4295 word_x = SUBREG_WORD (x);
4296
4297 if (reg_renumber[reg_x] >= 0)
4298 {
4299 reg_x = reg_renumber[reg_x] + word_x;
4300 word_x = 0;
4301 }
4302 }
4303
4304 else
4305 {
4306 reg_x = REGNO (x);
4307 if (reg_renumber[reg_x] >= 0)
4308 reg_x = reg_renumber[reg_x];
4309 }
4310
4311 if (GET_CODE (y) == SUBREG)
4312 {
4313 reg_y = REGNO (SUBREG_REG (y));
4314 word_y = SUBREG_WORD (y);
4315
4316 if (reg_renumber[reg_y] >= 0)
4317 {
4318 reg_y = reg_renumber[reg_y];
4319 word_y = 0;
4320 }
4321 }
4322
4323 else
4324 {
4325 reg_y = REGNO (y);
4326 if (reg_renumber[reg_y] >= 0)
4327 reg_y = reg_renumber[reg_y];
4328 }
4329
4330 return reg_x >= 0 && reg_x == reg_y && word_x == word_y;
4331 }
4332
4333 /* Now we have disposed of all the cases
4334 in which different rtx codes can match. */
4335 if (code != GET_CODE (y))
4336 return 0;
4337
4338 switch (code)
4339 {
4340 case PC:
4341 case CC0:
4342 case ADDR_VEC:
4343 case ADDR_DIFF_VEC:
4344 return 0;
4345
4346 case CONST_INT:
4347 return INTVAL (x) == INTVAL (y);
4348
4349 case LABEL_REF:
4350 /* We can't assume nonlocal labels have their following insns yet. */
4351 if (LABEL_REF_NONLOCAL_P (x) || LABEL_REF_NONLOCAL_P (y))
4352 return XEXP (x, 0) == XEXP (y, 0);
4353
4354 /* Two label-refs are equivalent if they point at labels
4355 in the same position in the instruction stream. */
4356 return (next_real_insn (XEXP (x, 0))
4357 == next_real_insn (XEXP (y, 0)));
4358
4359 case SYMBOL_REF:
4360 return XSTR (x, 0) == XSTR (y, 0);
4361
4362 default:
4363 break;
4364 }
4365
4366 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
4367
4368 if (GET_MODE (x) != GET_MODE (y))
4369 return 0;
4370
4371 /* For commutative operations, the RTX match if the operand match in any
4372 order. Also handle the simple binary and unary cases without a loop.
4373
4374 ??? Don't consider PLUS a commutative operator; see comments above. */
4375 if ((code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
4376 && code != PLUS)
4377 return ((rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
4378 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)))
4379 || (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 1))
4380 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 0))));
4381 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
4382 return (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
4383 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)));
4384 else if (GET_RTX_CLASS (code) == '1')
4385 return rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0));
4386
4387 /* Compare the elements. If any pair of corresponding elements
4388 fail to match, return 0 for the whole things. */
4389
4390 fmt = GET_RTX_FORMAT (code);
4391 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4392 {
4393 register int j;
4394 switch (fmt[i])
4395 {
4396 case 'w':
4397 if (XWINT (x, i) != XWINT (y, i))
4398 return 0;
4399 break;
4400
4401 case 'i':
4402 if (XINT (x, i) != XINT (y, i))
4403 return 0;
4404 break;
4405
4406 case 's':
4407 if (strcmp (XSTR (x, i), XSTR (y, i)))
4408 return 0;
4409 break;
4410
4411 case 'e':
4412 if (! rtx_renumbered_equal_p (XEXP (x, i), XEXP (y, i)))
4413 return 0;
4414 break;
4415
4416 case 'u':
4417 if (XEXP (x, i) != XEXP (y, i))
4418 return 0;
4419 /* fall through. */
4420 case '0':
4421 break;
4422
4423 case 'E':
4424 if (XVECLEN (x, i) != XVECLEN (y, i))
4425 return 0;
4426 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4427 if (!rtx_renumbered_equal_p (XVECEXP (x, i, j), XVECEXP (y, i, j)))
4428 return 0;
4429 break;
4430
4431 default:
4432 abort ();
4433 }
4434 }
4435 return 1;
4436 }
4437 \f
4438 /* If X is a hard register or equivalent to one or a subregister of one,
4439 return the hard register number. If X is a pseudo register that was not
4440 assigned a hard register, return the pseudo register number. Otherwise,
4441 return -1. Any rtx is valid for X. */
4442
4443 int
4444 true_regnum (x)
4445 rtx x;
4446 {
4447 if (GET_CODE (x) == REG)
4448 {
4449 if (REGNO (x) >= FIRST_PSEUDO_REGISTER && reg_renumber[REGNO (x)] >= 0)
4450 return reg_renumber[REGNO (x)];
4451 return REGNO (x);
4452 }
4453 if (GET_CODE (x) == SUBREG)
4454 {
4455 int base = true_regnum (SUBREG_REG (x));
4456 if (base >= 0 && base < FIRST_PSEUDO_REGISTER)
4457 return SUBREG_WORD (x) + base;
4458 }
4459 return -1;
4460 }
4461 \f
4462 /* Optimize code of the form:
4463
4464 for (x = a[i]; x; ...)
4465 ...
4466 for (x = a[i]; x; ...)
4467 ...
4468 foo:
4469
4470 Loop optimize will change the above code into
4471
4472 if (x = a[i])
4473 for (;;)
4474 { ...; if (! (x = ...)) break; }
4475 if (x = a[i])
4476 for (;;)
4477 { ...; if (! (x = ...)) break; }
4478 foo:
4479
4480 In general, if the first test fails, the program can branch
4481 directly to `foo' and skip the second try which is doomed to fail.
4482 We run this after loop optimization and before flow analysis. */
4483
4484 /* When comparing the insn patterns, we track the fact that different
4485 pseudo-register numbers may have been used in each computation.
4486 The following array stores an equivalence -- same_regs[I] == J means
4487 that pseudo register I was used in the first set of tests in a context
4488 where J was used in the second set. We also count the number of such
4489 pending equivalences. If nonzero, the expressions really aren't the
4490 same. */
4491
4492 static int *same_regs;
4493
4494 static int num_same_regs;
4495
4496 /* Track any registers modified between the target of the first jump and
4497 the second jump. They never compare equal. */
4498
4499 static char *modified_regs;
4500
4501 /* Record if memory was modified. */
4502
4503 static int modified_mem;
4504
4505 /* Called via note_stores on each insn between the target of the first
4506 branch and the second branch. It marks any changed registers. */
4507
4508 static void
4509 mark_modified_reg (dest, x)
4510 rtx dest;
4511 rtx x ATTRIBUTE_UNUSED;
4512 {
4513 int regno, i;
4514
4515 if (GET_CODE (dest) == SUBREG)
4516 dest = SUBREG_REG (dest);
4517
4518 if (GET_CODE (dest) == MEM)
4519 modified_mem = 1;
4520
4521 if (GET_CODE (dest) != REG)
4522 return;
4523
4524 regno = REGNO (dest);
4525 if (regno >= FIRST_PSEUDO_REGISTER)
4526 modified_regs[regno] = 1;
4527 else
4528 for (i = 0; i < HARD_REGNO_NREGS (regno, GET_MODE (dest)); i++)
4529 modified_regs[regno + i] = 1;
4530 }
4531
4532 /* F is the first insn in the chain of insns. */
4533
4534 void
4535 thread_jumps (f, max_reg, flag_before_loop)
4536 rtx f;
4537 int max_reg;
4538 int flag_before_loop;
4539 {
4540 /* Basic algorithm is to find a conditional branch,
4541 the label it may branch to, and the branch after
4542 that label. If the two branches test the same condition,
4543 walk back from both branch paths until the insn patterns
4544 differ, or code labels are hit. If we make it back to
4545 the target of the first branch, then we know that the first branch
4546 will either always succeed or always fail depending on the relative
4547 senses of the two branches. So adjust the first branch accordingly
4548 in this case. */
4549
4550 rtx label, b1, b2, t1, t2;
4551 enum rtx_code code1, code2;
4552 rtx b1op0, b1op1, b2op0, b2op1;
4553 int changed = 1;
4554 int i;
4555 int *all_reset;
4556
4557 /* Allocate register tables and quick-reset table. */
4558 modified_regs = (char *) alloca (max_reg * sizeof (char));
4559 same_regs = (int *) alloca (max_reg * sizeof (int));
4560 all_reset = (int *) alloca (max_reg * sizeof (int));
4561 for (i = 0; i < max_reg; i++)
4562 all_reset[i] = -1;
4563
4564 while (changed)
4565 {
4566 changed = 0;
4567
4568 for (b1 = f; b1; b1 = NEXT_INSN (b1))
4569 {
4570 /* Get to a candidate branch insn. */
4571 if (GET_CODE (b1) != JUMP_INSN
4572 || ! condjump_p (b1) || simplejump_p (b1)
4573 || JUMP_LABEL (b1) == 0)
4574 continue;
4575
4576 bzero (modified_regs, max_reg * sizeof (char));
4577 modified_mem = 0;
4578
4579 bcopy ((char *) all_reset, (char *) same_regs,
4580 max_reg * sizeof (int));
4581 num_same_regs = 0;
4582
4583 label = JUMP_LABEL (b1);
4584
4585 /* Look for a branch after the target. Record any registers and
4586 memory modified between the target and the branch. Stop when we
4587 get to a label since we can't know what was changed there. */
4588 for (b2 = NEXT_INSN (label); b2; b2 = NEXT_INSN (b2))
4589 {
4590 if (GET_CODE (b2) == CODE_LABEL)
4591 break;
4592
4593 else if (GET_CODE (b2) == JUMP_INSN)
4594 {
4595 /* If this is an unconditional jump and is the only use of
4596 its target label, we can follow it. */
4597 if (simplejump_p (b2)
4598 && JUMP_LABEL (b2) != 0
4599 && LABEL_NUSES (JUMP_LABEL (b2)) == 1)
4600 {
4601 b2 = JUMP_LABEL (b2);
4602 continue;
4603 }
4604 else
4605 break;
4606 }
4607
4608 if (GET_CODE (b2) != CALL_INSN && GET_CODE (b2) != INSN)
4609 continue;
4610
4611 if (GET_CODE (b2) == CALL_INSN)
4612 {
4613 modified_mem = 1;
4614 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4615 if (call_used_regs[i] && ! fixed_regs[i]
4616 && i != STACK_POINTER_REGNUM
4617 && i != FRAME_POINTER_REGNUM
4618 && i != HARD_FRAME_POINTER_REGNUM
4619 && i != ARG_POINTER_REGNUM)
4620 modified_regs[i] = 1;
4621 }
4622
4623 note_stores (PATTERN (b2), mark_modified_reg);
4624 }
4625
4626 /* Check the next candidate branch insn from the label
4627 of the first. */
4628 if (b2 == 0
4629 || GET_CODE (b2) != JUMP_INSN
4630 || b2 == b1
4631 || ! condjump_p (b2)
4632 || simplejump_p (b2))
4633 continue;
4634
4635 /* Get the comparison codes and operands, reversing the
4636 codes if appropriate. If we don't have comparison codes,
4637 we can't do anything. */
4638 b1op0 = XEXP (XEXP (SET_SRC (PATTERN (b1)), 0), 0);
4639 b1op1 = XEXP (XEXP (SET_SRC (PATTERN (b1)), 0), 1);
4640 code1 = GET_CODE (XEXP (SET_SRC (PATTERN (b1)), 0));
4641 if (XEXP (SET_SRC (PATTERN (b1)), 1) == pc_rtx)
4642 code1 = reverse_condition (code1);
4643
4644 b2op0 = XEXP (XEXP (SET_SRC (PATTERN (b2)), 0), 0);
4645 b2op1 = XEXP (XEXP (SET_SRC (PATTERN (b2)), 0), 1);
4646 code2 = GET_CODE (XEXP (SET_SRC (PATTERN (b2)), 0));
4647 if (XEXP (SET_SRC (PATTERN (b2)), 1) == pc_rtx)
4648 code2 = reverse_condition (code2);
4649
4650 /* If they test the same things and knowing that B1 branches
4651 tells us whether or not B2 branches, check if we
4652 can thread the branch. */
4653 if (rtx_equal_for_thread_p (b1op0, b2op0, b2)
4654 && rtx_equal_for_thread_p (b1op1, b2op1, b2)
4655 && (comparison_dominates_p (code1, code2)
4656 || (comparison_dominates_p (code1, reverse_condition (code2))
4657 && can_reverse_comparison_p (XEXP (SET_SRC (PATTERN (b1)),
4658 0),
4659 b1))))
4660 {
4661 t1 = prev_nonnote_insn (b1);
4662 t2 = prev_nonnote_insn (b2);
4663
4664 while (t1 != 0 && t2 != 0)
4665 {
4666 if (t2 == label)
4667 {
4668 /* We have reached the target of the first branch.
4669 If there are no pending register equivalents,
4670 we know that this branch will either always
4671 succeed (if the senses of the two branches are
4672 the same) or always fail (if not). */
4673 rtx new_label;
4674
4675 if (num_same_regs != 0)
4676 break;
4677
4678 if (comparison_dominates_p (code1, code2))
4679 new_label = JUMP_LABEL (b2);
4680 else
4681 new_label = get_label_after (b2);
4682
4683 if (JUMP_LABEL (b1) != new_label)
4684 {
4685 rtx prev = PREV_INSN (new_label);
4686
4687 if (flag_before_loop
4688 && GET_CODE (prev) == NOTE
4689 && NOTE_LINE_NUMBER (prev) == NOTE_INSN_LOOP_BEG)
4690 {
4691 /* Don't thread to the loop label. If a loop
4692 label is reused, loop optimization will
4693 be disabled for that loop. */
4694 new_label = gen_label_rtx ();
4695 emit_label_after (new_label, PREV_INSN (prev));
4696 }
4697 changed |= redirect_jump (b1, new_label);
4698 }
4699 break;
4700 }
4701
4702 /* If either of these is not a normal insn (it might be
4703 a JUMP_INSN, CALL_INSN, or CODE_LABEL) we fail. (NOTEs
4704 have already been skipped above.) Similarly, fail
4705 if the insns are different. */
4706 if (GET_CODE (t1) != INSN || GET_CODE (t2) != INSN
4707 || recog_memoized (t1) != recog_memoized (t2)
4708 || ! rtx_equal_for_thread_p (PATTERN (t1),
4709 PATTERN (t2), t2))
4710 break;
4711
4712 t1 = prev_nonnote_insn (t1);
4713 t2 = prev_nonnote_insn (t2);
4714 }
4715 }
4716 }
4717 }
4718 }
4719 \f
4720 /* This is like RTX_EQUAL_P except that it knows about our handling of
4721 possibly equivalent registers and knows to consider volatile and
4722 modified objects as not equal.
4723
4724 YINSN is the insn containing Y. */
4725
4726 int
4727 rtx_equal_for_thread_p (x, y, yinsn)
4728 rtx x, y;
4729 rtx yinsn;
4730 {
4731 register int i;
4732 register int j;
4733 register enum rtx_code code;
4734 register char *fmt;
4735
4736 code = GET_CODE (x);
4737 /* Rtx's of different codes cannot be equal. */
4738 if (code != GET_CODE (y))
4739 return 0;
4740
4741 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
4742 (REG:SI x) and (REG:HI x) are NOT equivalent. */
4743
4744 if (GET_MODE (x) != GET_MODE (y))
4745 return 0;
4746
4747 /* For floating-point, consider everything unequal. This is a bit
4748 pessimistic, but this pass would only rarely do anything for FP
4749 anyway. */
4750 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
4751 && FLOAT_MODE_P (GET_MODE (x)) && ! flag_fast_math)
4752 return 0;
4753
4754 /* For commutative operations, the RTX match if the operand match in any
4755 order. Also handle the simple binary and unary cases without a loop. */
4756 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
4757 return ((rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn)
4758 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 1), yinsn))
4759 || (rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 1), yinsn)
4760 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 0), yinsn)));
4761 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
4762 return (rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn)
4763 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 1), yinsn));
4764 else if (GET_RTX_CLASS (code) == '1')
4765 return rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn);
4766
4767 /* Handle special-cases first. */
4768 switch (code)
4769 {
4770 case REG:
4771 if (REGNO (x) == REGNO (y) && ! modified_regs[REGNO (x)])
4772 return 1;
4773
4774 /* If neither is user variable or hard register, check for possible
4775 equivalence. */
4776 if (REG_USERVAR_P (x) || REG_USERVAR_P (y)
4777 || REGNO (x) < FIRST_PSEUDO_REGISTER
4778 || REGNO (y) < FIRST_PSEUDO_REGISTER)
4779 return 0;
4780
4781 if (same_regs[REGNO (x)] == -1)
4782 {
4783 same_regs[REGNO (x)] = REGNO (y);
4784 num_same_regs++;
4785
4786 /* If this is the first time we are seeing a register on the `Y'
4787 side, see if it is the last use. If not, we can't thread the
4788 jump, so mark it as not equivalent. */
4789 if (REGNO_LAST_UID (REGNO (y)) != INSN_UID (yinsn))
4790 return 0;
4791
4792 return 1;
4793 }
4794 else
4795 return (same_regs[REGNO (x)] == REGNO (y));
4796
4797 break;
4798
4799 case MEM:
4800 /* If memory modified or either volatile, not equivalent.
4801 Else, check address. */
4802 if (modified_mem || MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
4803 return 0;
4804
4805 return rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn);
4806
4807 case ASM_INPUT:
4808 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
4809 return 0;
4810
4811 break;
4812
4813 case SET:
4814 /* Cancel a pending `same_regs' if setting equivalenced registers.
4815 Then process source. */
4816 if (GET_CODE (SET_DEST (x)) == REG
4817 && GET_CODE (SET_DEST (y)) == REG)
4818 {
4819 if (same_regs[REGNO (SET_DEST (x))] == REGNO (SET_DEST (y)))
4820 {
4821 same_regs[REGNO (SET_DEST (x))] = -1;
4822 num_same_regs--;
4823 }
4824 else if (REGNO (SET_DEST (x)) != REGNO (SET_DEST (y)))
4825 return 0;
4826 }
4827 else
4828 if (rtx_equal_for_thread_p (SET_DEST (x), SET_DEST (y), yinsn) == 0)
4829 return 0;
4830
4831 return rtx_equal_for_thread_p (SET_SRC (x), SET_SRC (y), yinsn);
4832
4833 case LABEL_REF:
4834 return XEXP (x, 0) == XEXP (y, 0);
4835
4836 case SYMBOL_REF:
4837 return XSTR (x, 0) == XSTR (y, 0);
4838
4839 default:
4840 break;
4841 }
4842
4843 if (x == y)
4844 return 1;
4845
4846 fmt = GET_RTX_FORMAT (code);
4847 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4848 {
4849 switch (fmt[i])
4850 {
4851 case 'w':
4852 if (XWINT (x, i) != XWINT (y, i))
4853 return 0;
4854 break;
4855
4856 case 'n':
4857 case 'i':
4858 if (XINT (x, i) != XINT (y, i))
4859 return 0;
4860 break;
4861
4862 case 'V':
4863 case 'E':
4864 /* Two vectors must have the same length. */
4865 if (XVECLEN (x, i) != XVECLEN (y, i))
4866 return 0;
4867
4868 /* And the corresponding elements must match. */
4869 for (j = 0; j < XVECLEN (x, i); j++)
4870 if (rtx_equal_for_thread_p (XVECEXP (x, i, j),
4871 XVECEXP (y, i, j), yinsn) == 0)
4872 return 0;
4873 break;
4874
4875 case 'e':
4876 if (rtx_equal_for_thread_p (XEXP (x, i), XEXP (y, i), yinsn) == 0)
4877 return 0;
4878 break;
4879
4880 case 'S':
4881 case 's':
4882 if (strcmp (XSTR (x, i), XSTR (y, i)))
4883 return 0;
4884 break;
4885
4886 case 'u':
4887 /* These are just backpointers, so they don't matter. */
4888 break;
4889
4890 case '0':
4891 break;
4892
4893 /* It is believed that rtx's at this level will never
4894 contain anything but integers and other rtx's,
4895 except for within LABEL_REFs and SYMBOL_REFs. */
4896 default:
4897 abort ();
4898 }
4899 }
4900 return 1;
4901 }
4902 \f
4903
4904 #ifndef HAVE_cc0
4905 /* Return the insn that NEW can be safely inserted in front of starting at
4906 the jump insn INSN. Return 0 if it is not safe to do this jump
4907 optimization. Note that NEW must contain a single set. */
4908
4909 static rtx
4910 find_insert_position (insn, new)
4911 rtx insn;
4912 rtx new;
4913 {
4914 int i;
4915 rtx prev;
4916
4917 /* If NEW does not clobber, it is safe to insert NEW before INSN. */
4918 if (GET_CODE (PATTERN (new)) != PARALLEL)
4919 return insn;
4920
4921 for (i = XVECLEN (PATTERN (new), 0) - 1; i >= 0; i--)
4922 if (GET_CODE (XVECEXP (PATTERN (new), 0, i)) == CLOBBER
4923 && reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4924 insn))
4925 break;
4926
4927 if (i < 0)
4928 return insn;
4929
4930 /* There is a good chance that the previous insn PREV sets the thing
4931 being clobbered (often the CC in a hard reg). If PREV does not
4932 use what NEW sets, we can insert NEW before PREV. */
4933
4934 prev = prev_active_insn (insn);
4935 for (i = XVECLEN (PATTERN (new), 0) - 1; i >= 0; i--)
4936 if (GET_CODE (XVECEXP (PATTERN (new), 0, i)) == CLOBBER
4937 && reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4938 insn)
4939 && ! modified_in_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4940 prev))
4941 return 0;
4942
4943 return reg_mentioned_p (SET_DEST (single_set (new)), prev) ? 0 : prev;
4944 }
4945 #endif /* !HAVE_cc0 */
GNU Compiler Collection
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