1 /* Sets (bit vectors) of hard registers, and operations on them.
2 Copyright (C) 1987, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* Define the type of a set of hard registers. */
23 /* If HARD_REG_SET is a macro, its definition is a scalar type
24 that has enough bits for all the target machine's hard registers.
25 Otherwise, it is a typedef for a suitable array of HOST_WIDE_INTs,
26 and HARD_REG_SET_LONGS is how many.
28 Note that lots of code assumes that the first part of a regset is
29 the same format as a HARD_REG_SET. To help make sure this is true,
30 we only try the widest integer mode (HOST_WIDE_INT) instead of all the
31 smaller types. This only loses if there are a very few registers and
32 then only in the few cases where we have an array of HARD_REG_SETs,
33 so it isn't worth making this as complex as it used to be. */
35 #if FIRST_PSEUDO_REGISTER <= HOST_BITS_PER_WIDE_INT
36 #define HARD_REG_SET HOST_WIDE_INT
40 #define HARD_REG_SET_LONGS \
41 ((FIRST_PSEUDO_REGISTER + HOST_BITS_PER_WIDE_INT - 1) \
42 / HOST_BITS_PER_WIDE_INT)
43 typedef HOST_WIDE_INT HARD_REG_SET
[HARD_REG_SET_LONGS
];
47 /* HARD_CONST is used to cast a constant to a HARD_REG_SET
48 if that is a scalar wider than an integer. */
51 #define HARD_CONST(X) ((HARD_REG_SET) (X))
53 #define HARD_CONST(X) (X)
56 /* Define macros SET_HARD_REG_BIT, CLEAR_HARD_REG_BIT and TEST_HARD_REG_BIT
57 to set, clear or test one bit in a hard reg set of type HARD_REG_SET.
58 All three take two arguments: the set and the register number.
60 In the case where sets are arrays of longs, the first argument
61 is actually a pointer to a long.
63 Define two macros for initializing a set:
64 CLEAR_HARD_REG_SET and SET_HARD_REG_SET.
65 These take just one argument.
67 Also define macros for copying hard reg sets:
68 COPY_HARD_REG_SET and COMPL_HARD_REG_SET.
69 These take two arguments TO and FROM; they read from FROM
70 and store into TO. COMPL_HARD_REG_SET complements each bit.
72 Also define macros for combining hard reg sets:
73 IOR_HARD_REG_SET and AND_HARD_REG_SET.
74 These take two arguments TO and FROM; they read from FROM
75 and combine bitwise into TO. Define also two variants
76 IOR_COMPL_HARD_REG_SET and AND_COMPL_HARD_REG_SET
77 which use the complement of the set FROM.
79 Also define GO_IF_HARD_REG_SUBSET (X, Y, TO):
80 if X is a subset of Y, go to TO.
85 #define SET_HARD_REG_BIT(SET, BIT) \
86 ((SET) |= HARD_CONST (1) << (BIT))
87 #define CLEAR_HARD_REG_BIT(SET, BIT) \
88 ((SET) &= ~(HARD_CONST (1) << (BIT)))
89 #define TEST_HARD_REG_BIT(SET, BIT) \
90 ((SET) & (HARD_CONST (1) << (BIT)))
92 #define CLEAR_HARD_REG_SET(TO) ((TO) = HARD_CONST (0))
93 #define SET_HARD_REG_SET(TO) ((TO) = HARD_CONST (-1))
95 #define COPY_HARD_REG_SET(TO, FROM) ((TO) = (FROM))
96 #define COMPL_HARD_REG_SET(TO, FROM) ((TO) = ~(FROM))
98 #define IOR_HARD_REG_SET(TO, FROM) ((TO) |= (FROM))
99 #define IOR_COMPL_HARD_REG_SET(TO, FROM) ((TO) |= ~ (FROM))
100 #define AND_HARD_REG_SET(TO, FROM) ((TO) &= (FROM))
101 #define AND_COMPL_HARD_REG_SET(TO, FROM) ((TO) &= ~ (FROM))
103 #define GO_IF_HARD_REG_SUBSET(X,Y,TO) if (HARD_CONST (0) == ((X) & ~(Y))) goto TO
105 #define GO_IF_HARD_REG_EQUAL(X,Y,TO) if ((X) == (Y)) goto TO
108 #define UHOST_BITS_PER_WIDE_INT ((unsigned) HOST_BITS_PER_WIDE_INT)
110 #define SET_HARD_REG_BIT(SET, BIT) \
111 ((SET)[(BIT) / UHOST_BITS_PER_WIDE_INT] \
112 |= (HOST_WIDE_INT) 1 << ((BIT) % UHOST_BITS_PER_WIDE_INT))
114 #define CLEAR_HARD_REG_BIT(SET, BIT) \
115 ((SET)[(BIT) / UHOST_BITS_PER_WIDE_INT] \
116 &= ~((HOST_WIDE_INT) 1 << ((BIT) % UHOST_BITS_PER_WIDE_INT)))
118 #define TEST_HARD_REG_BIT(SET, BIT) \
119 ((SET)[(BIT) / UHOST_BITS_PER_WIDE_INT] \
120 & ((HOST_WIDE_INT) 1 << ((BIT) % UHOST_BITS_PER_WIDE_INT)))
122 #define CLEAR_HARD_REG_SET(TO) \
123 do { register HOST_WIDE_INT *scan_tp_ = (TO); \
125 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
126 *scan_tp_++ = 0; } while (0)
128 #define SET_HARD_REG_SET(TO) \
129 do { register HOST_WIDE_INT *scan_tp_ = (TO); \
131 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
132 *scan_tp_++ = -1; } while (0)
134 #define COPY_HARD_REG_SET(TO, FROM) \
135 do { register HOST_WIDE_INT *scan_tp_ = (TO), *scan_fp_ = (FROM); \
137 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
138 *scan_tp_++ = *scan_fp_++; } while (0)
140 #define COMPL_HARD_REG_SET(TO, FROM) \
141 do { register HOST_WIDE_INT *scan_tp_ = (TO), *scan_fp_ = (FROM); \
143 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
144 *scan_tp_++ = ~ *scan_fp_++; } while (0)
146 #define AND_HARD_REG_SET(TO, FROM) \
147 do { register HOST_WIDE_INT *scan_tp_ = (TO), *scan_fp_ = (FROM); \
149 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
150 *scan_tp_++ &= *scan_fp_++; } while (0)
152 #define AND_COMPL_HARD_REG_SET(TO, FROM) \
153 do { register HOST_WIDE_INT *scan_tp_ = (TO), *scan_fp_ = (FROM); \
155 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
156 *scan_tp_++ &= ~ *scan_fp_++; } while (0)
158 #define IOR_HARD_REG_SET(TO, FROM) \
159 do { register HOST_WIDE_INT *scan_tp_ = (TO), *scan_fp_ = (FROM); \
161 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
162 *scan_tp_++ |= *scan_fp_++; } while (0)
164 #define IOR_COMPL_HARD_REG_SET(TO, FROM) \
165 do { register HOST_WIDE_INT *scan_tp_ = (TO), *scan_fp_ = (FROM); \
167 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
168 *scan_tp_++ |= ~ *scan_fp_++; } while (0)
170 #define GO_IF_HARD_REG_SUBSET(X,Y,TO) \
171 do { register HOST_WIDE_INT *scan_xp_ = (X), *scan_yp_ = (Y); \
173 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
174 if (0 != (*scan_xp_++ & ~*scan_yp_++)) break; \
175 if (i == HARD_REG_SET_LONGS) goto TO; } while (0)
177 #define GO_IF_HARD_REG_EQUAL(X,Y,TO) \
178 do { register HOST_WIDE_INT *scan_xp_ = (X), *scan_yp_ = (Y); \
180 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
181 if (*scan_xp_++ != ~*scan_yp_++)) break; \
182 if (i == HARD_REG_SET_LONGS) goto TO; } while (0)
186 /* Define some standard sets of registers. */
188 /* Indexed by hard register number, contains 1 for registers
189 that are fixed use (stack pointer, pc, frame pointer, etc.).
190 These are the registers that cannot be used to allocate
191 a pseudo reg whose life does not cross calls. */
193 extern char fixed_regs
[FIRST_PSEUDO_REGISTER
];
195 /* The same info as a HARD_REG_SET. */
197 extern HARD_REG_SET fixed_reg_set
;
199 /* Indexed by hard register number, contains 1 for registers
200 that are fixed use or are clobbered by function calls.
201 These are the registers that cannot be used to allocate
202 a pseudo reg whose life crosses calls. */
204 extern char call_used_regs
[FIRST_PSEUDO_REGISTER
];
206 /* The same info as a HARD_REG_SET. */
208 extern HARD_REG_SET call_used_reg_set
;
210 /* Indexed by hard register number, contains 1 for registers that are
211 fixed use -- i.e. in fixed_regs -- or a function value return register
212 or STRUCT_VALUE_REGNUM or STATIC_CHAIN_REGNUM. These are the
213 registers that cannot hold quantities across calls even if we are
214 willing to save and restore them. */
216 extern char call_fixed_regs
[FIRST_PSEUDO_REGISTER
];
218 /* The same info as a HARD_REG_SET. */
220 extern HARD_REG_SET call_fixed_reg_set
;
222 /* Indexed by hard register number, contains 1 for registers
223 that are being used for global register decls.
224 These must be exempt from ordinary flow analysis
225 and are also considered fixed. */
227 extern char global_regs
[FIRST_PSEUDO_REGISTER
];
229 /* Table of register numbers in the order in which to try to use them. */
231 #ifdef REG_ALLOC_ORDER /* Avoid undef symbol in certain broken linkers. */
232 extern int reg_alloc_order
[FIRST_PSEUDO_REGISTER
];
235 /* For each reg class, a HARD_REG_SET saying which registers are in it. */
237 extern HARD_REG_SET reg_class_contents
[];
239 /* For each reg class, number of regs it contains. */
241 extern int reg_class_size
[N_REG_CLASSES
];
243 /* For each reg class, table listing all the containing classes. */
245 extern enum reg_class reg_class_superclasses
[N_REG_CLASSES
][N_REG_CLASSES
];
247 /* For each reg class, table listing all the classes contained in it. */
249 extern enum reg_class reg_class_subclasses
[N_REG_CLASSES
][N_REG_CLASSES
];
251 /* For each pair of reg classes,
252 a largest reg class contained in their union. */
254 extern enum reg_class reg_class_subunion
[N_REG_CLASSES
][N_REG_CLASSES
];
256 /* For each pair of reg classes,
257 the smallest reg class that contains their union. */
259 extern enum reg_class reg_class_superunion
[N_REG_CLASSES
][N_REG_CLASSES
];
261 /* Number of non-fixed registers. */
263 extern int n_non_fixed_regs
;
265 /* Vector indexed by hardware reg giving its name. */
267 extern char *reg_names
[FIRST_PSEUDO_REGISTER
];