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1 /* Allocate registers for pseudo-registers that span basic blocks.
2 Copyright (C) 1987-1991 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20
21 #include <stdio.h>
22 #include "config.h"
23 #include "rtl.h"
24 #include "flags.h"
25 #include "basic-block.h"
26 #include "hard-reg-set.h"
27 #include "regs.h"
28 #include "insn-config.h"
29 #include "output.h"
30
31 /* This pass of the compiler performs global register allocation.
32 It assigns hard register numbers to all the pseudo registers
33 that were not handled in local_alloc. Assignments are recorded
34 in the vector reg_renumber, not by changing the rtl code.
35 (Such changes are made by final). The entry point is
36 the function global_alloc.
37
38 After allocation is complete, the reload pass is run as a subroutine
39 of this pass, so that when a pseudo reg loses its hard reg due to
40 spilling it is possible to make a second attempt to find a hard
41 reg for it. The reload pass is independent in other respects
42 and it is run even when stupid register allocation is in use.
43
44 1. count the pseudo-registers still needing allocation
45 and assign allocation-numbers (allocnos) to them.
46 Set up tables reg_allocno and allocno_reg to map
47 reg numbers to allocnos and vice versa.
48 max_allocno gets the number of allocnos in use.
49
50 2. Allocate a max_allocno by max_allocno conflict bit matrix and clear it.
51 Allocate a max_allocno by FIRST_PSEUDO_REGISTER conflict matrix
52 for conflicts between allocnos and explicit hard register use
53 (which includes use of pseudo-registers allocated by local_alloc).
54
55 3. for each basic block
56 walk forward through the block, recording which
57 unallocated registers and which hardware registers are live.
58 Build the conflict matrix between the unallocated registers
59 and another of unallocated registers versus hardware registers.
60 Also record the preferred hardware registers
61 for each unallocated one.
62
63 4. Sort a table of the allocnos into order of
64 desirability of the variables.
65
66 5. Allocate the variables in that order; each if possible into
67 a preferred register, else into another register. */
68 \f
69 /* Number of pseudo-registers still requiring allocation
70 (not allocated by local_allocate). */
71
72 static int max_allocno;
73
74 /* Indexed by (pseudo) reg number, gives the allocno, or -1
75 for pseudo registers already allocated by local_allocate. */
76
77 static int *reg_allocno;
78
79 /* Indexed by allocno, gives the reg number. */
80
81 static int *allocno_reg;
82
83 /* A vector of the integers from 0 to max_allocno-1,
84 sorted in the order of first-to-be-allocated first. */
85
86 static int *allocno_order;
87
88 /* Indexed by an allocno, gives the number of consecutive
89 hard registers needed by that pseudo reg. */
90
91 static int *allocno_size;
92
93 /* Indexed by (pseudo) reg number, gives the number of another
94 lower-numbered pseudo reg which can share a hard reg with this peudo
95 *even if the two pseudos would otherwise appear to conflict*. */
96
97 static int *reg_may_share;
98
99 /* max_allocno by max_allocno array of bits,
100 recording whether two allocno's conflict (can't go in the same
101 hardware register).
102
103 `conflicts' is not symmetric; a conflict between allocno's i and j
104 is recorded either in element i,j or in element j,i. */
105
106 static int *conflicts;
107
108 /* Number of ints require to hold max_allocno bits.
109 This is the length of a row in `conflicts'. */
110
111 static int allocno_row_words;
112
113 /* Two macros to test or store 1 in an element of `conflicts'. */
114
115 #define CONFLICTP(I, J) \
116 (conflicts[(I) * allocno_row_words + (J) / INT_BITS] \
117 & (1 << ((J) % INT_BITS)))
118
119 #define SET_CONFLICT(I, J) \
120 (conflicts[(I) * allocno_row_words + (J) / INT_BITS] \
121 |= (1 << ((J) % INT_BITS)))
122
123 /* Set of hard regs currently live (during scan of all insns). */
124
125 static HARD_REG_SET hard_regs_live;
126
127 /* Indexed by N, set of hard regs conflicting with allocno N. */
128
129 static HARD_REG_SET *hard_reg_conflicts;
130
131 /* Indexed by N, set of hard regs preferred by allocno N.
132 This is used to make allocnos go into regs that are copied to or from them,
133 when possible, to reduce register shuffling. */
134
135 static HARD_REG_SET *hard_reg_preferences;
136
137 /* Similar, but just counts register preferences made in simple copy
138 operations, rather than arithmetic. These are given priority because
139 we can always eliminate an insn by using these, but using a register
140 in the above list won't always eliminate an insn. */
141
142 static HARD_REG_SET *hard_reg_copy_preferences;
143
144 /* Similar to hard_reg_preferences, but includes bits for subsequent
145 registers when an allocno is multi-word. The above variable is used for
146 allocation while this is used to build reg_someone_prefers, below. */
147
148 static HARD_REG_SET *hard_reg_full_preferences;
149
150 /* Indexed by N, set of hard registers that some later allocno has a
151 preference for. */
152
153 static HARD_REG_SET *regs_someone_prefers;
154
155 /* Set of registers that global-alloc isn't supposed to use. */
156
157 static HARD_REG_SET no_global_alloc_regs;
158
159 /* Set of registers used so far. */
160
161 static HARD_REG_SET regs_used_so_far;
162
163 /* Number of calls crossed by each allocno. */
164
165 static int *allocno_calls_crossed;
166
167 /* Number of refs (weighted) to each allocno. */
168
169 static int *allocno_n_refs;
170
171 /* Guess at live length of each allocno.
172 This is actually the max of the live lengths of the regs. */
173
174 static int *allocno_live_length;
175
176 /* Test a bit in TABLE, a vector of HARD_REG_SETs,
177 for vector element I, and hard register number J. */
178
179 #define REGBITP(TABLE, I, J) TEST_HARD_REG_BIT (TABLE[I], J)
180
181 /* Set to 1 a bit in a vector of HARD_REG_SETs. Works like REGBITP. */
182
183 #define SET_REGBIT(TABLE, I, J) SET_HARD_REG_BIT (TABLE[I], J)
184
185 /* Bit mask for allocnos live at current point in the scan. */
186
187 static int *allocnos_live;
188
189 #define INT_BITS HOST_BITS_PER_INT
190
191 /* Test, set or clear bit number I in allocnos_live,
192 a bit vector indexed by allocno. */
193
194 #define ALLOCNO_LIVE_P(I) \
195 (allocnos_live[(I) / INT_BITS] & (1 << ((I) % INT_BITS)))
196
197 #define SET_ALLOCNO_LIVE(I) \
198 (allocnos_live[(I) / INT_BITS] |= (1 << ((I) % INT_BITS)))
199
200 #define CLEAR_ALLOCNO_LIVE(I) \
201 (allocnos_live[(I) / INT_BITS] &= ~(1 << ((I) % INT_BITS)))
202
203 /* This is turned off because it doesn't work right for DImode.
204 (And it is only used for DImode, so the other cases are worthless.)
205 The problem is that it isn't true that there is NO possibility of conflict;
206 only that there is no conflict if the two pseudos get the exact same regs.
207 If they were allocated with a partial overlap, there would be a conflict.
208 We can't safely turn off the conflict unless we have another way to
209 prevent the partial overlap.
210
211 Idea: change hard_reg_conflicts so that instead of recording which
212 hard regs the allocno may not overlap, it records where the allocno
213 may not start. Change both where it is used and where it is updated.
214 Then there is a way to record that (reg:DI 108) may start at 10
215 but not at 9 or 11. There is still the question of how to record
216 this semi-conflict between two pseudos. */
217 #if 0
218 /* Reg pairs for which conflict after the current insn
219 is inhibited by a REG_NO_CONFLICT note.
220 If the table gets full, we ignore any other notes--that is conservative. */
221 #define NUM_NO_CONFLICT_PAIRS 4
222 /* Number of pairs in use in this insn. */
223 int n_no_conflict_pairs;
224 static struct { int allocno1, allocno2;}
225 no_conflict_pairs[NUM_NO_CONFLICT_PAIRS];
226 #endif /* 0 */
227
228 /* Record all regs that are set in any one insn.
229 Communication from mark_reg_{store,clobber} and global_conflicts. */
230
231 static rtx *regs_set;
232 static int n_regs_set;
233
234 /* All register that can be eliminated. */
235
236 static HARD_REG_SET eliminable_regset;
237
238 static int allocno_compare ();
239 static void mark_reg_store ();
240 static void mark_reg_clobber ();
241 static void mark_reg_live_nc ();
242 static void mark_reg_death ();
243 static void dump_conflicts ();
244 void dump_global_regs ();
245 static void find_reg ();
246 static void global_conflicts ();
247 static void expand_preferences ();
248 static void prune_preferences ();
249 static void record_conflicts ();
250 static void set_preference ();
251 \f
252 /* Perform allocation of pseudo-registers not allocated by local_alloc.
253 FILE is a file to output debugging information on,
254 or zero if such output is not desired. */
255
256 void
257 global_alloc (file)
258 FILE *file;
259 {
260 #ifdef ELIMINABLE_REGS
261 static struct {int from, to; } eliminables[] = ELIMINABLE_REGS;
262 #endif
263 register int i;
264 rtx x;
265
266 max_allocno = 0;
267
268 /* A machine may have certain hard registers that
269 are safe to use only within a basic block. */
270
271 CLEAR_HARD_REG_SET (no_global_alloc_regs);
272 #ifdef OVERLAPPING_REGNO_P
273 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
274 if (OVERLAPPING_REGNO_P (i))
275 SET_HARD_REG_BIT (no_global_alloc_regs, i);
276 #endif
277
278 /* Build the regset of all eliminable registers and show we can't use those
279 that we already know won't be eliminated. */
280 #ifdef ELIMINABLE_REGS
281 for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++)
282 {
283 SET_HARD_REG_BIT (eliminable_regset, eliminables[i].from);
284
285 if (! CAN_ELIMINATE (eliminables[i].from, eliminables[i].to)
286 || (eliminables[i].from == FRAME_POINTER_REGNUM
287 && (! flag_omit_frame_pointer || FRAME_POINTER_REQUIRED
288 || caller_save_needed)))
289 SET_HARD_REG_BIT (no_global_alloc_regs, eliminables[i].from);
290 }
291 #else
292 SET_HARD_REG_BIT (eliminable_regset, FRAME_POINTER_REGNUM);
293
294 /* If we know we will definitely not be eliminating the frame pointer,
295 don't allocate it. */
296 if (! flag_omit_frame_pointer || FRAME_POINTER_REQUIRED
297 || caller_save_needed)
298 SET_HARD_REG_BIT (no_global_alloc_regs, FRAME_POINTER_REGNUM);
299 #endif
300
301 /* Track which registers have already been used. Start with registers
302 explicitly in the rtl, then registers allocated by local register
303 allocation.
304
305 We consider registers that do not have to be saved over calls as if
306 they were already used since there is no cost in using them. */
307
308 CLEAR_HARD_REG_SET (regs_used_so_far);
309 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
310 if (regs_ever_live[i] || call_used_regs[i])
311 SET_HARD_REG_BIT (regs_used_so_far, i);
312
313 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
314 if (reg_renumber[i] >= 0)
315 SET_HARD_REG_BIT (regs_used_so_far, reg_renumber[i]);
316
317 /* Establish mappings from register number to allocation number
318 and vice versa. In the process, count the allocnos. */
319
320 reg_allocno = (int *) alloca (max_regno * sizeof (int));
321
322 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
323 reg_allocno[i] = -1;
324
325 /* Initialize the shared-hard-reg mapping
326 from the list of pairs that may share. */
327 reg_may_share = (int *) alloca (max_regno * sizeof (int));
328 bzero (reg_may_share, max_regno * sizeof (int));
329 for (x = regs_may_share; x; x = XEXP (XEXP (x, 1), 1))
330 {
331 int r1 = REGNO (XEXP (x, 0));
332 int r2 = REGNO (XEXP (XEXP (x, 1), 0));
333 if (r1 > r2)
334 reg_may_share[r1] = r2;
335 else
336 reg_may_share[r2] = r1;
337 }
338
339 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
340 /* Note that reg_live_length[i] < 0 indicates a "constant" reg
341 that we are supposed to refrain from putting in a hard reg.
342 -2 means do make an allocno but don't allocate it. */
343 if (reg_n_refs[i] != 0 && reg_renumber[i] < 0 && reg_live_length[i] != -1
344 /* Don't allocate pseudos that cross calls,
345 if this function receives a nonlocal goto. */
346 && (! current_function_has_nonlocal_label
347 || reg_n_calls_crossed[i] == 0))
348 {
349 if (reg_may_share[i] && reg_allocno[reg_may_share[i]] >= 0)
350 reg_allocno[i] = reg_allocno[reg_may_share[i]];
351 else
352 reg_allocno[i] = max_allocno++;
353 if (reg_live_length[i] == 0)
354 abort ();
355 }
356 else
357 reg_allocno[i] = -1;
358
359 allocno_reg = (int *) alloca (max_allocno * sizeof (int));
360 allocno_size = (int *) alloca (max_allocno * sizeof (int));
361 allocno_calls_crossed = (int *) alloca (max_allocno * sizeof (int));
362 allocno_n_refs = (int *) alloca (max_allocno * sizeof (int));
363 allocno_live_length = (int *) alloca (max_allocno * sizeof (int));
364 bzero (allocno_size, max_allocno * sizeof (int));
365 bzero (allocno_calls_crossed, max_allocno * sizeof (int));
366 bzero (allocno_n_refs, max_allocno * sizeof (int));
367 bzero (allocno_live_length, max_allocno * sizeof (int));
368
369 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
370 if (reg_allocno[i] >= 0)
371 {
372 int allocno = reg_allocno[i];
373 allocno_reg[allocno] = i;
374 allocno_size[allocno] = PSEUDO_REGNO_SIZE (i);
375 allocno_calls_crossed[allocno] += reg_n_calls_crossed[i];
376 allocno_n_refs[allocno] += reg_n_refs[i];
377 if (allocno_live_length[allocno] < reg_live_length[i])
378 allocno_live_length[allocno] = reg_live_length[i];
379 }
380
381 /* Allocate the space for the conflict and preference tables and
382 initialize them. */
383
384 hard_reg_conflicts
385 = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET));
386 bzero (hard_reg_conflicts, max_allocno * sizeof (HARD_REG_SET));
387
388 hard_reg_preferences
389 = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET));
390 bzero (hard_reg_preferences, max_allocno * sizeof (HARD_REG_SET));
391
392 hard_reg_copy_preferences
393 = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET));
394 bzero (hard_reg_copy_preferences, max_allocno * sizeof (HARD_REG_SET));
395
396 hard_reg_full_preferences
397 = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET));
398 bzero (hard_reg_full_preferences, max_allocno * sizeof (HARD_REG_SET));
399
400 regs_someone_prefers
401 = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET));
402 bzero (regs_someone_prefers, max_allocno * sizeof (HARD_REG_SET));
403
404 allocno_row_words = (max_allocno + INT_BITS - 1) / INT_BITS;
405
406 conflicts = (int *) alloca (max_allocno * allocno_row_words * sizeof (int));
407 bzero (conflicts, max_allocno * allocno_row_words * sizeof (int));
408
409 allocnos_live = (int *) alloca (allocno_row_words * sizeof (int));
410
411 /* If there is work to be done (at least one reg to allocate),
412 perform global conflict analysis and allocate the regs. */
413
414 if (max_allocno > 0)
415 {
416 /* Scan all the insns and compute the conflicts among allocnos
417 and between allocnos and hard regs. */
418
419 global_conflicts ();
420
421 /* Eliminate conflicts between pseudos and eliminable registers. If
422 the register is not eliminated, the pseudo won't really be able to
423 live in the eliminable register, so the conflict doesn't matter.
424 If we do eliminate the register, the conflict will no longer exist.
425 So in either case, we can ignore the conflict. */
426
427 for (i = 0; i < max_allocno; i++)
428 AND_COMPL_HARD_REG_SET (hard_reg_conflicts[i], eliminable_regset);
429
430 /* Try to expand the preferences by merging them between allocnos. */
431
432 expand_preferences ();
433
434 /* Determine the order to allocate the remaining pseudo registers. */
435
436 allocno_order = (int *) alloca (max_allocno * sizeof (int));
437 for (i = 0; i < max_allocno; i++)
438 allocno_order[i] = i;
439
440 /* Default the size to 1, since allocno_compare uses it to divide by.
441 Also convert allocno_live_length of zero to -1. A length of zero
442 can occur when all the registers for that allocno have reg_live_length
443 equal to -2. In this case, we want to make an allocno, but not
444 allocate it. So avoid the divide-by-zero and set it to a low
445 priority. */
446
447 for (i = 0; i < max_allocno; i++)
448 {
449 if (allocno_size[i] == 0)
450 allocno_size[i] = 1;
451 if (allocno_live_length[i] == 0)
452 allocno_live_length[i] = -1;
453 }
454
455 qsort (allocno_order, max_allocno, sizeof (int), allocno_compare);
456
457 prune_preferences ();
458
459 if (file)
460 dump_conflicts (file);
461
462 /* Try allocating them, one by one, in that order,
463 except for parameters marked with reg_live_length[regno] == -2. */
464
465 for (i = 0; i < max_allocno; i++)
466 if (reg_live_length[allocno_reg[allocno_order[i]]] >= 0)
467 {
468 /* If we have more than one register class,
469 first try allocating in the class that is cheapest
470 for this pseudo-reg. If that fails, try any reg. */
471 if (N_REG_CLASSES > 1)
472 {
473 find_reg (allocno_order[i], HARD_CONST (0), 0, 0);
474 if (reg_renumber[allocno_reg[allocno_order[i]]] >= 0)
475 continue;
476 }
477 if (!reg_preferred_or_nothing (allocno_reg[allocno_order[i]]))
478 find_reg (allocno_order[i], HARD_CONST (0), 1, 0);
479 }
480 }
481
482 /* Do the reloads now while the allocno data still exist, so that we can
483 try to assign new hard regs to any pseudo regs that are spilled. */
484
485 if (n_basic_blocks > 0)
486 reload (basic_block_head[0], 1, file);
487 }
488
489 /* Sort predicate for ordering the allocnos.
490 Returns -1 (1) if *v1 should be allocated before (after) *v2. */
491
492 static int
493 allocno_compare (v1, v2)
494 int *v1, *v2;
495 {
496 /* Note that the quotient will never be bigger than
497 the value of floor_log2 times the maximum number of
498 times a register can occur in one insn (surely less than 100).
499 Multiplying this by 10000 can't overflow. */
500 register int pri1
501 = (((double) (floor_log2 (allocno_n_refs[*v1]) * allocno_n_refs[*v1])
502 / (allocno_live_length[*v1] * allocno_size[*v1]))
503 * 10000);
504 register int pri2
505 = (((double) (floor_log2 (allocno_n_refs[*v2]) * allocno_n_refs[*v2])
506 / (allocno_live_length[*v2] * allocno_size[*v2]))
507 * 10000);
508 if (pri2 - pri1)
509 return pri2 - pri1;
510
511 /* If regs are equally good, sort by allocno,
512 so that the results of qsort leave nothing to chance. */
513 return *v1 - *v2;
514 }
515 \f
516 /* Scan the rtl code and record all conflicts and register preferences in the
517 conflict matrices and preference tables. */
518
519 static void
520 global_conflicts ()
521 {
522 register int b, i;
523 register rtx insn;
524 short *block_start_allocnos;
525
526 /* Make a vector that mark_reg_{store,clobber} will store in. */
527 regs_set = (rtx *) alloca (max_parallel * sizeof (rtx) * 2);
528
529 block_start_allocnos = (short *) alloca (max_allocno * sizeof (short));
530
531 for (b = 0; b < n_basic_blocks; b++)
532 {
533 bzero (allocnos_live, allocno_row_words * sizeof (int));
534
535 /* Initialize table of registers currently live
536 to the state at the beginning of this basic block.
537 This also marks the conflicts among them.
538
539 For pseudo-regs, there is only one bit for each one
540 no matter how many hard regs it occupies.
541 This is ok; we know the size from PSEUDO_REGNO_SIZE.
542 For explicit hard regs, we cannot know the size that way
543 since one hard reg can be used with various sizes.
544 Therefore, we must require that all the hard regs
545 implicitly live as part of a multi-word hard reg
546 are explicitly marked in basic_block_live_at_start. */
547
548 {
549 register int offset, bit;
550 register regset old = basic_block_live_at_start[b];
551 int ax = 0;
552
553 #ifdef HARD_REG_SET
554 hard_regs_live = old[0];
555 #else
556 COPY_HARD_REG_SET (hard_regs_live, old);
557 #endif
558 for (offset = 0, i = 0; offset < regset_size; offset++)
559 if (old[offset] == 0)
560 i += HOST_BITS_PER_INT;
561 else
562 for (bit = 1; bit; bit <<= 1, i++)
563 {
564 if (i >= max_regno)
565 break;
566 if (old[offset] & bit)
567 {
568 register int a = reg_allocno[i];
569 if (a >= 0)
570 {
571 SET_ALLOCNO_LIVE (a);
572 block_start_allocnos[ax++] = a;
573 }
574 else if ((a = reg_renumber[i]) >= 0)
575 mark_reg_live_nc (a, PSEUDO_REGNO_MODE (i));
576 }
577 }
578
579 /* Record that each allocno now live conflicts with each other
580 allocno now live, and with each hard reg now live. */
581
582 record_conflicts (block_start_allocnos, ax);
583 }
584
585 insn = basic_block_head[b];
586
587 /* Scan the code of this basic block, noting which allocnos
588 and hard regs are born or die. When one is born,
589 record a conflict with all others currently live. */
590
591 while (1)
592 {
593 register RTX_CODE code = GET_CODE (insn);
594 register rtx link;
595
596 /* Make regs_set an empty set. */
597
598 n_regs_set = 0;
599
600 if (code == INSN || code == CALL_INSN || code == JUMP_INSN)
601 {
602 int i = 0;
603
604 #if 0
605 for (link = REG_NOTES (insn);
606 link && i < NUM_NO_CONFLICT_PAIRS;
607 link = XEXP (link, 1))
608 if (REG_NOTE_KIND (link) == REG_NO_CONFLICT)
609 {
610 no_conflict_pairs[i].allocno1
611 = reg_allocno[REGNO (SET_DEST (PATTERN (insn)))];
612 no_conflict_pairs[i].allocno2
613 = reg_allocno[REGNO (XEXP (link, 0))];
614 i++;
615 }
616 #endif /* 0 */
617
618 /* Mark any registers clobbered by INSN as live,
619 so they conflict with the inputs. */
620
621 note_stores (PATTERN (insn), mark_reg_clobber);
622
623 /* Mark any registers dead after INSN as dead now. */
624
625 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
626 if (REG_NOTE_KIND (link) == REG_DEAD)
627 mark_reg_death (XEXP (link, 0));
628
629 /* Mark any registers set in INSN as live,
630 and mark them as conflicting with all other live regs.
631 Clobbers are processed again, so they conflict with
632 the registers that are set. */
633
634 note_stores (PATTERN (insn), mark_reg_store);
635
636 #ifdef AUTO_INC_DEC
637 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
638 if (REG_NOTE_KIND (link) == REG_INC)
639 mark_reg_store (XEXP (link, 0), 0);
640 #endif
641
642 /* Mark any registers set in INSN and then never used. */
643
644 while (n_regs_set > 0)
645 if (find_regno_note (insn, REG_UNUSED,
646 REGNO (regs_set[--n_regs_set])))
647 mark_reg_death (regs_set[n_regs_set]);
648 }
649
650 if (insn == basic_block_end[b])
651 break;
652 insn = NEXT_INSN (insn);
653 }
654 }
655 }
656 /* Expand the preference information by looking for cases where one allocno
657 dies in an insn that sets an allocno. If those two allocnos don't conflict,
658 merge any preferences between those allocnos. */
659
660 static void
661 expand_preferences ()
662 {
663 rtx insn;
664 rtx link;
665 rtx set;
666
667 /* We only try to handle the most common cases here. Most of the cases
668 where this wins are reg-reg copies. */
669
670 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
671 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
672 && (set = single_set (insn)) != 0
673 && GET_CODE (SET_DEST (set)) == REG
674 && reg_allocno[REGNO (SET_DEST (set))] >= 0)
675 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
676 if (REG_NOTE_KIND (link) == REG_DEAD
677 && GET_CODE (XEXP (link, 0)) == REG
678 && reg_allocno[REGNO (XEXP (link, 0))] >= 0
679 && ! CONFLICTP (reg_allocno[REGNO (SET_DEST (set))],
680 reg_allocno[REGNO (XEXP (link, 0))])
681 && ! CONFLICTP (reg_allocno[REGNO (XEXP (link, 0))],
682 reg_allocno[REGNO (SET_DEST (set))]))
683 {
684 int a1 = reg_allocno[REGNO (SET_DEST (set))];
685 int a2 = reg_allocno[REGNO (XEXP (link, 0))];
686
687 if (XEXP (link, 0) == SET_SRC (set))
688 {
689 IOR_HARD_REG_SET (hard_reg_copy_preferences[a1],
690 hard_reg_copy_preferences[a2]);
691 IOR_HARD_REG_SET (hard_reg_copy_preferences[a2],
692 hard_reg_copy_preferences[a1]);
693 }
694
695 IOR_HARD_REG_SET (hard_reg_preferences[a1],
696 hard_reg_preferences[a2]);
697 IOR_HARD_REG_SET (hard_reg_preferences[a2],
698 hard_reg_preferences[a1]);
699 IOR_HARD_REG_SET (hard_reg_full_preferences[a1],
700 hard_reg_full_preferences[a2]);
701 IOR_HARD_REG_SET (hard_reg_full_preferences[a2],
702 hard_reg_full_preferences[a1]);
703 }
704 }
705 \f
706 /* Prune the preferences for global registers to exclude registers that cannot
707 be used.
708
709 Compute `regs_someone_prefers', which is a bitmask of the hard registers
710 that are preferred by conflicting registers of lower priority. If possible,
711 we will avoid using these registers. */
712
713 static void
714 prune_preferences ()
715 {
716 int i, j;
717 int allocno;
718
719 /* Scan least most important to most important.
720 For each allocno, remove from preferences registers that cannot be used,
721 either because of conflicts or register type. Then compute all registers
722 prefered by each lower-priority register that conflicts. */
723
724 for (i = max_allocno - 1; i >= 0; i--)
725 {
726 HARD_REG_SET temp;
727
728 allocno = allocno_order[i];
729 COPY_HARD_REG_SET (temp, hard_reg_conflicts[allocno]);
730
731 if (allocno_calls_crossed[allocno] == 0)
732 IOR_HARD_REG_SET (temp, fixed_reg_set);
733 else
734 IOR_HARD_REG_SET (temp, call_used_reg_set);
735
736 IOR_COMPL_HARD_REG_SET
737 (temp,
738 reg_class_contents[(int) reg_preferred_class (allocno_reg[allocno])]);
739
740 AND_COMPL_HARD_REG_SET (hard_reg_preferences[allocno], temp);
741 AND_COMPL_HARD_REG_SET (hard_reg_copy_preferences[allocno], temp);
742 AND_COMPL_HARD_REG_SET (hard_reg_full_preferences[allocno], temp);
743
744 CLEAR_HARD_REG_SET (regs_someone_prefers[allocno]);
745
746 /* Merge in the preferences of lower-priority registers (they have
747 already been pruned). If we also prefer some of those registers,
748 don't exclude them unless we are of a smaller size (in which case
749 we want to give the lower-priority allocno the first chance for
750 these registers). */
751 for (j = i + 1; j < max_allocno; j++)
752 if (CONFLICTP (allocno, allocno_order[j]))
753 {
754 COPY_HARD_REG_SET (temp,
755 hard_reg_full_preferences[allocno_order[j]]);
756 if (allocno_size[allocno_order[j]] <= allocno_size[allocno])
757 AND_COMPL_HARD_REG_SET (temp,
758 hard_reg_full_preferences[allocno]);
759
760 IOR_HARD_REG_SET (regs_someone_prefers[allocno], temp);
761 }
762 }
763 }
764 \f
765 /* Assign a hard register to ALLOCNO; look for one that is the beginning
766 of a long enough stretch of hard regs none of which conflicts with ALLOCNO.
767 The registers marked in PREFREGS are tried first.
768
769 LOSERS, if non-zero, is a HARD_REG_SET indicating registers that cannot
770 be used for this allocation.
771
772 If ALL_REGS_P is zero, consider only the preferred class of ALLOCNO's reg.
773 Otherwise ignore that preferred class.
774
775 If ACCEPT_CALL_CLOBBERED is nonzero, accept a call-clobbered hard reg that
776 will have to be saved and restored at calls.
777
778 If we find one, record it in reg_renumber.
779 If not, do nothing. */
780
781 static void
782 find_reg (allocno, losers, all_regs_p, accept_call_clobbered)
783 int allocno;
784 HARD_REG_SET losers;
785 int all_regs_p;
786 int accept_call_clobbered;
787 {
788 register int i, best_reg, pass;
789 #ifdef HARD_REG_SET
790 register /* Declare it register if it's a scalar. */
791 #endif
792 HARD_REG_SET used, used1;
793
794 enum reg_class class
795 = all_regs_p ? ALL_REGS : reg_preferred_class (allocno_reg[allocno]);
796 enum machine_mode mode = PSEUDO_REGNO_MODE (allocno_reg[allocno]);
797
798 if (accept_call_clobbered)
799 COPY_HARD_REG_SET (used1, call_fixed_reg_set);
800 else if (allocno_calls_crossed[allocno] == 0)
801 COPY_HARD_REG_SET (used1, fixed_reg_set);
802 else
803 COPY_HARD_REG_SET (used1, call_used_reg_set);
804
805 /* Some registers should not be allocated in global-alloc. */
806 IOR_HARD_REG_SET (used1, no_global_alloc_regs);
807 if (losers)
808 IOR_HARD_REG_SET (used1, losers);
809
810 IOR_COMPL_HARD_REG_SET (used1, reg_class_contents[(int) class]);
811 IOR_HARD_REG_SET (used1, hard_reg_conflicts[allocno]);
812
813 /* Try each hard reg to see if it fits. Do this in two passes.
814 In the first pass, skip registers that are prefered by some other pseudo
815 to give it a better chance of getting one of those registers. Only if
816 we can't get a register when excluding those do we take one of them.
817 However, we never allocate a register for the first time in pass 0. */
818
819 COPY_HARD_REG_SET (used, used1);
820 IOR_COMPL_HARD_REG_SET (used, regs_used_so_far);
821 IOR_HARD_REG_SET (used, regs_someone_prefers[allocno]);
822
823 best_reg = -1;
824 for (i = FIRST_PSEUDO_REGISTER, pass = 0;
825 pass <= 1 && i >= FIRST_PSEUDO_REGISTER;
826 pass++)
827 {
828 if (pass == 1)
829 COPY_HARD_REG_SET (used, used1);
830 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
831 {
832 #ifdef REG_ALLOC_ORDER
833 int regno = reg_alloc_order[i];
834 #else
835 int regno = i;
836 #endif
837 if (! TEST_HARD_REG_BIT (used, regno)
838 && HARD_REGNO_MODE_OK (regno, mode))
839 {
840 register int j;
841 register int lim = regno + HARD_REGNO_NREGS (regno, mode);
842 for (j = regno + 1;
843 (j < lim
844 && ! TEST_HARD_REG_BIT (used, j));
845 j++);
846 if (j == lim)
847 {
848 best_reg = regno;
849 break;
850 }
851 #ifndef REG_ALLOC_ORDER
852 i = j; /* Skip starting points we know will lose */
853 #endif
854 }
855 }
856 }
857
858 /* See if there is a preferred register with the same class as the register
859 we allocated above. Making this restriction prevents register
860 preferencing from creating worse register allocation.
861
862 Remove from the preferred registers and conflicting registers. Note that
863 additional conflicts may have been added after `prune_preferences' was
864 called.
865
866 First do this for those register with copy preferences, then all
867 preferred registers. */
868
869 AND_COMPL_HARD_REG_SET (hard_reg_copy_preferences[allocno], used);
870 GO_IF_HARD_REG_SUBSET (hard_reg_copy_preferences[allocno],
871 reg_class_contents[(int) NO_REGS], no_copy_prefs);
872
873 if (best_reg >= 0)
874 {
875 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
876 if (TEST_HARD_REG_BIT (hard_reg_copy_preferences[allocno], i)
877 && HARD_REGNO_MODE_OK (i, mode)
878 && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg)
879 || reg_class_subset_p (REGNO_REG_CLASS (i),
880 REGNO_REG_CLASS (best_reg))
881 || reg_class_subset_p (REGNO_REG_CLASS (best_reg),
882 REGNO_REG_CLASS (i))))
883 {
884 register int j;
885 register int lim = i + HARD_REGNO_NREGS (i, mode);
886 for (j = i + 1;
887 (j < lim
888 && ! TEST_HARD_REG_BIT (used, j)
889 && (REGNO_REG_CLASS (j)
890 == REGNO_REG_CLASS (best_reg + (j - i))
891 || reg_class_subset_p (REGNO_REG_CLASS (j),
892 REGNO_REG_CLASS (best_reg + (j - i)))
893 || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)),
894 REGNO_REG_CLASS (j))));
895 j++);
896 if (j == lim)
897 {
898 best_reg = i;
899 goto no_prefs;
900 }
901 }
902 }
903 no_copy_prefs:
904
905 AND_COMPL_HARD_REG_SET (hard_reg_preferences[allocno], used);
906 GO_IF_HARD_REG_SUBSET (hard_reg_preferences[allocno],
907 reg_class_contents[(int) NO_REGS], no_prefs);
908
909 if (best_reg >= 0)
910 {
911 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
912 if (TEST_HARD_REG_BIT (hard_reg_preferences[allocno], i)
913 && HARD_REGNO_MODE_OK (i, mode)
914 && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg)
915 || reg_class_subset_p (REGNO_REG_CLASS (i),
916 REGNO_REG_CLASS (best_reg))
917 || reg_class_subset_p (REGNO_REG_CLASS (best_reg),
918 REGNO_REG_CLASS (i))))
919 {
920 register int j;
921 register int lim = i + HARD_REGNO_NREGS (i, mode);
922 for (j = i + 1;
923 (j < lim
924 && ! TEST_HARD_REG_BIT (used, j)
925 && (REGNO_REG_CLASS (j)
926 == REGNO_REG_CLASS (best_reg + (j - i))
927 || reg_class_subset_p (REGNO_REG_CLASS (j),
928 REGNO_REG_CLASS (best_reg + (j - i)))
929 || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)),
930 REGNO_REG_CLASS (j))));
931 j++);
932 if (j == lim)
933 {
934 best_reg = i;
935 break;
936 }
937 }
938 }
939 no_prefs:
940
941 /* Did we find a register? */
942
943 if (best_reg >= 0)
944 {
945 register int lim, j;
946 HARD_REG_SET this_reg;
947
948 /* Yes. Record it as the hard register of this pseudo-reg. */
949 reg_renumber[allocno_reg[allocno]] = best_reg;
950 /* Also of any pseudo-regs that share with it. */
951 if (reg_may_share[allocno_reg[allocno]])
952 for (j = FIRST_PSEUDO_REGISTER; j < max_regno; j++)
953 if (reg_allocno[j] == allocno)
954 reg_renumber[j] = best_reg;
955
956 /* Make a set of the hard regs being allocated. */
957 CLEAR_HARD_REG_SET (this_reg);
958 lim = best_reg + HARD_REGNO_NREGS (best_reg, mode);
959 for (j = best_reg; j < lim; j++)
960 {
961 SET_HARD_REG_BIT (this_reg, j);
962 SET_HARD_REG_BIT (regs_used_so_far, j);
963 }
964 /* For each other pseudo-reg conflicting with this one,
965 mark it as conflicting with the hard regs this one occupies. */
966 lim = allocno;
967 for (j = 0; j < max_allocno; j++)
968 if (CONFLICTP (lim, j) || CONFLICTP (j, lim))
969 {
970 IOR_HARD_REG_SET (hard_reg_conflicts[j], this_reg);
971 }
972 }
973 else if (flag_caller_saves)
974 {
975 /* Did not find a register. If it would be profitable to
976 allocate a call-clobbered register and save and restore it
977 around calls, do that. */
978 if (! accept_call_clobbered
979 && allocno_calls_crossed[allocno] != 0
980 && CALLER_SAVE_PROFITABLE (allocno_n_refs[allocno],
981 allocno_calls_crossed[allocno]))
982 {
983 find_reg (allocno, losers, all_regs_p, 1);
984 if (reg_renumber[allocno_reg[allocno]] >= 0)
985 caller_save_needed = 1;
986 }
987 }
988 }
989 \f
990 /* Called from `reload' to look for a hard reg to put pseudo reg REGNO in.
991 Perhaps it had previously seemed not worth a hard reg,
992 or perhaps its old hard reg has been commandeered for reloads.
993 FORBIDDEN_REGS indicates certain hard regs that may not be used, even if
994 they do not appear to be allocated.
995 If FORBIDDEN_REGS is zero, no regs are forbidden. */
996
997 void
998 retry_global_alloc (regno, forbidden_regs)
999 int regno;
1000 HARD_REG_SET forbidden_regs;
1001 {
1002 int allocno = reg_allocno[regno];
1003 if (allocno >= 0)
1004 {
1005 /* If we have more than one register class,
1006 first try allocating in the class that is cheapest
1007 for this pseudo-reg. If that fails, try any reg. */
1008 if (N_REG_CLASSES > 1)
1009 find_reg (allocno, forbidden_regs, 0, 0);
1010 if (reg_renumber[regno] < 0
1011 && !reg_preferred_or_nothing (regno))
1012 find_reg (allocno, forbidden_regs, 1, 0);
1013
1014 /* If we found a register, modify the RTL for the register to
1015 show the hard register, and mark that register live. */
1016 if (reg_renumber[regno] >= 0)
1017 {
1018 REGNO (regno_reg_rtx[regno]) = reg_renumber[regno];
1019 mark_home_live (regno);
1020 }
1021 }
1022 }
1023 \f
1024 /* Record a conflict between register REGNO
1025 and everything currently live.
1026 REGNO must not be a pseudo reg that was allocated
1027 by local_alloc; such numbers must be translated through
1028 reg_renumber before calling here. */
1029
1030 static void
1031 record_one_conflict (regno)
1032 int regno;
1033 {
1034 register int j;
1035
1036 if (regno < FIRST_PSEUDO_REGISTER)
1037 /* When a hard register becomes live,
1038 record conflicts with live pseudo regs. */
1039 for (j = 0; j < max_allocno; j++)
1040 {
1041 if (ALLOCNO_LIVE_P (j))
1042 SET_HARD_REG_BIT (hard_reg_conflicts[j], regno);
1043 }
1044 else
1045 /* When a pseudo-register becomes live,
1046 record conflicts first with hard regs,
1047 then with other pseudo regs. */
1048 {
1049 register int ialloc = reg_allocno[regno];
1050 register int ialloc_prod = ialloc * allocno_row_words;
1051 IOR_HARD_REG_SET (hard_reg_conflicts[ialloc], hard_regs_live);
1052 for (j = allocno_row_words - 1; j >= 0; j--)
1053 {
1054 #if 0
1055 int k;
1056 for (k = 0; k < n_no_conflict_pairs; k++)
1057 if (! ((j == no_conflict_pairs[k].allocno1
1058 && ialloc == no_conflict_pairs[k].allocno2)
1059 ||
1060 (j == no_conflict_pairs[k].allocno2
1061 && ialloc == no_conflict_pairs[k].allocno1)))
1062 #endif /* 0 */
1063 conflicts[ialloc_prod + j] |= allocnos_live[j];
1064 }
1065 }
1066 }
1067
1068 /* Record all allocnos currently live as conflicting
1069 with each other and with all hard regs currently live.
1070 ALLOCNO_VEC is a vector of LEN allocnos, all allocnos that
1071 are currently live. Their bits are also flagged in allocnos_live. */
1072
1073 static void
1074 record_conflicts (allocno_vec, len)
1075 register short *allocno_vec;
1076 register int len;
1077 {
1078 register int allocno;
1079 register int j;
1080 register int ialloc_prod;
1081
1082 while (--len >= 0)
1083 {
1084 allocno = allocno_vec[len];
1085 ialloc_prod = allocno * allocno_row_words;
1086 IOR_HARD_REG_SET (hard_reg_conflicts[allocno], hard_regs_live);
1087 for (j = allocno_row_words - 1; j >= 0; j--)
1088 conflicts[ialloc_prod + j] |= allocnos_live[j];
1089 }
1090 }
1091 \f
1092 /* Handle the case where REG is set by the insn being scanned,
1093 during the forward scan to accumulate conflicts.
1094 Store a 1 in regs_live or allocnos_live for this register, record how many
1095 consecutive hardware registers it actually needs,
1096 and record a conflict with all other registers already live.
1097
1098 Note that even if REG does not remain alive after this insn,
1099 we must mark it here as live, to ensure a conflict between
1100 REG and any other regs set in this insn that really do live.
1101 This is because those other regs could be considered after this.
1102
1103 REG might actually be something other than a register;
1104 if so, we do nothing.
1105
1106 SETTER is 0 if this register was modified by an auto-increment (i.e.,
1107 a REG_INC note was found for it).
1108
1109 CLOBBERs are processed here by calling mark_reg_clobber. */
1110
1111 static void
1112 mark_reg_store (orig_reg, setter)
1113 rtx orig_reg, setter;
1114 {
1115 register int regno;
1116 register rtx reg = orig_reg;
1117
1118 /* WORD is which word of a multi-register group is being stored.
1119 For the case where the store is actually into a SUBREG of REG.
1120 Except we don't use it; I believe the entire REG needs to be
1121 made live. */
1122 int word = 0;
1123
1124 if (GET_CODE (reg) == SUBREG)
1125 {
1126 word = SUBREG_WORD (reg);
1127 reg = SUBREG_REG (reg);
1128 }
1129
1130 if (GET_CODE (reg) != REG)
1131 return;
1132
1133 if (setter && GET_CODE (setter) == CLOBBER)
1134 {
1135 /* A clobber of a register should be processed here too. */
1136 mark_reg_clobber (orig_reg, setter);
1137 return;
1138 }
1139
1140 regs_set[n_regs_set++] = reg;
1141
1142 if (setter)
1143 set_preference (reg, SET_SRC (setter));
1144
1145 regno = REGNO (reg);
1146
1147 if (reg_renumber[regno] >= 0)
1148 regno = reg_renumber[regno] /* + word */;
1149
1150 /* Either this is one of the max_allocno pseudo regs not allocated,
1151 or it is or has a hardware reg. First handle the pseudo-regs. */
1152 if (regno >= FIRST_PSEUDO_REGISTER)
1153 {
1154 if (reg_allocno[regno] >= 0)
1155 {
1156 SET_ALLOCNO_LIVE (reg_allocno[regno]);
1157 record_one_conflict (regno);
1158 }
1159 }
1160 /* Handle hardware regs (and pseudos allocated to hard regs). */
1161 else if (! fixed_regs[regno])
1162 {
1163 register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
1164 while (regno < last)
1165 {
1166 record_one_conflict (regno);
1167 SET_HARD_REG_BIT (hard_regs_live, regno);
1168 regno++;
1169 }
1170 }
1171 }
1172 \f
1173 /* Like mark_reg_set except notice just CLOBBERs; ignore SETs. */
1174
1175 static void
1176 mark_reg_clobber (reg, setter)
1177 rtx reg, setter;
1178 {
1179 register int regno;
1180
1181 /* WORD is which word of a multi-register group is being stored.
1182 For the case where the store is actually into a SUBREG of REG.
1183 Except we don't use it; I believe the entire REG needs to be
1184 made live. */
1185 int word = 0;
1186
1187 if (GET_CODE (setter) != CLOBBER)
1188 return;
1189
1190 if (GET_CODE (reg) == SUBREG)
1191 {
1192 word = SUBREG_WORD (reg);
1193 reg = SUBREG_REG (reg);
1194 }
1195
1196 if (GET_CODE (reg) != REG)
1197 return;
1198
1199 regs_set[n_regs_set++] = reg;
1200
1201 regno = REGNO (reg);
1202
1203 if (reg_renumber[regno] >= 0)
1204 regno = reg_renumber[regno] /* + word */;
1205
1206 /* Either this is one of the max_allocno pseudo regs not allocated,
1207 or it is or has a hardware reg. First handle the pseudo-regs. */
1208 if (regno >= FIRST_PSEUDO_REGISTER)
1209 {
1210 if (reg_allocno[regno] >= 0)
1211 {
1212 SET_ALLOCNO_LIVE (reg_allocno[regno]);
1213 record_one_conflict (regno);
1214 }
1215 }
1216 /* Handle hardware regs (and pseudos allocated to hard regs). */
1217 else if (! fixed_regs[regno])
1218 {
1219 register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
1220 while (regno < last)
1221 {
1222 record_one_conflict (regno);
1223 SET_HARD_REG_BIT (hard_regs_live, regno);
1224 regno++;
1225 }
1226 }
1227 }
1228 \f
1229 /* Mark REG as being dead (following the insn being scanned now).
1230 Store a 0 in regs_live or allocnos_live for this register. */
1231
1232 static void
1233 mark_reg_death (reg)
1234 rtx reg;
1235 {
1236 register int regno = REGNO (reg);
1237
1238 /* For pseudo reg, see if it has been assigned a hardware reg. */
1239 if (reg_renumber[regno] >= 0)
1240 regno = reg_renumber[regno];
1241
1242 /* Either this is one of the max_allocno pseudo regs not allocated,
1243 or it is a hardware reg. First handle the pseudo-regs. */
1244 if (regno >= FIRST_PSEUDO_REGISTER)
1245 {
1246 if (reg_allocno[regno] >= 0)
1247 CLEAR_ALLOCNO_LIVE (reg_allocno[regno]);
1248 }
1249 /* Handle hardware regs (and pseudos allocated to hard regs). */
1250 else if (! fixed_regs[regno])
1251 {
1252 /* Pseudo regs already assigned hardware regs are treated
1253 almost the same as explicit hardware regs. */
1254 register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
1255 while (regno < last)
1256 {
1257 CLEAR_HARD_REG_BIT (hard_regs_live, regno);
1258 regno++;
1259 }
1260 }
1261 }
1262
1263 /* Mark hard reg REGNO as currently live, assuming machine mode MODE
1264 for the value stored in it. MODE determines how many consecutive
1265 registers are actually in use. Do not record conflicts;
1266 it is assumed that the caller will do that. */
1267
1268 static void
1269 mark_reg_live_nc (regno, mode)
1270 register int regno;
1271 enum machine_mode mode;
1272 {
1273 register int last = regno + HARD_REGNO_NREGS (regno, mode);
1274 while (regno < last)
1275 {
1276 SET_HARD_REG_BIT (hard_regs_live, regno);
1277 regno++;
1278 }
1279 }
1280 \f
1281 /* Try to set a preference for an allocno to a hard register.
1282 We are passed DEST and SRC which are the operands of a SET. It is known
1283 that SRC is a register. If SRC or the first operand of SRC is a register,
1284 try to set a preference. If one of the two is a hard register and the other
1285 is a pseudo-register, mark the preference.
1286
1287 Note that we are not as agressive as local-alloc in trying to tie a
1288 pseudo-register to a hard register. */
1289
1290 static void
1291 set_preference (dest, src)
1292 rtx dest, src;
1293 {
1294 int src_regno, dest_regno;
1295 /* Amount to add to the hard regno for SRC, or subtract from that for DEST,
1296 to compensate for subregs in SRC or DEST. */
1297 int offset = 0;
1298 int i;
1299 int copy = 1;
1300
1301 if (GET_RTX_FORMAT (GET_CODE (src))[0] == 'e')
1302 src = XEXP (src, 0), copy = 0;
1303
1304 /* Get the reg number for both SRC and DEST.
1305 If neither is a reg, give up. */
1306
1307 if (GET_CODE (src) == REG)
1308 src_regno = REGNO (src);
1309 else if (GET_CODE (src) == SUBREG && GET_CODE (SUBREG_REG (src)) == REG)
1310 {
1311 src_regno = REGNO (SUBREG_REG (src));
1312 offset += SUBREG_WORD (src);
1313 }
1314 else
1315 return;
1316
1317 if (GET_CODE (dest) == REG)
1318 dest_regno = REGNO (dest);
1319 else if (GET_CODE (dest) == SUBREG && GET_CODE (SUBREG_REG (dest)) == REG)
1320 {
1321 dest_regno = REGNO (SUBREG_REG (dest));
1322 offset -= SUBREG_WORD (dest);
1323 }
1324 else
1325 return;
1326
1327 /* Convert either or both to hard reg numbers. */
1328
1329 if (reg_renumber[src_regno] >= 0)
1330 src_regno = reg_renumber[src_regno];
1331
1332 if (reg_renumber[dest_regno] >= 0)
1333 dest_regno = reg_renumber[dest_regno];
1334
1335 /* Now if one is a hard reg and the other is a global pseudo
1336 then give the other a preference. */
1337
1338 if (dest_regno < FIRST_PSEUDO_REGISTER && src_regno >= FIRST_PSEUDO_REGISTER
1339 && reg_allocno[src_regno] >= 0)
1340 {
1341 dest_regno -= offset;
1342 if (dest_regno >= 0 && dest_regno < FIRST_PSEUDO_REGISTER)
1343 {
1344 if (copy)
1345 SET_REGBIT (hard_reg_copy_preferences,
1346 reg_allocno[src_regno], dest_regno);
1347
1348 SET_REGBIT (hard_reg_preferences,
1349 reg_allocno[src_regno], dest_regno);
1350 for (i = dest_regno;
1351 i < dest_regno + HARD_REGNO_NREGS (dest_regno, GET_MODE (dest));
1352 i++)
1353 SET_REGBIT (hard_reg_full_preferences, reg_allocno[src_regno], i);
1354 }
1355 }
1356
1357 if (src_regno < FIRST_PSEUDO_REGISTER && dest_regno >= FIRST_PSEUDO_REGISTER
1358 && reg_allocno[dest_regno] >= 0)
1359 {
1360 src_regno += offset;
1361 if (src_regno >= 0 && src_regno < FIRST_PSEUDO_REGISTER)
1362 {
1363 if (copy)
1364 SET_REGBIT (hard_reg_copy_preferences,
1365 reg_allocno[dest_regno], src_regno);
1366
1367 SET_REGBIT (hard_reg_preferences,
1368 reg_allocno[dest_regno], src_regno);
1369 for (i = src_regno;
1370 i < src_regno + HARD_REGNO_NREGS (src_regno, GET_MODE (src));
1371 i++)
1372 SET_REGBIT (hard_reg_full_preferences, reg_allocno[dest_regno], i);
1373 }
1374 }
1375 }
1376 \f
1377 /* Indicate that hard register number FROM was eliminated and replaced with
1378 an offset from hard register number TO. The status of hard registers live
1379 at the start of a basic block is updated by replacing a use of FROM with
1380 a use of TO. */
1381
1382 void
1383 mark_elimination (from, to)
1384 int from, to;
1385 {
1386 int i;
1387
1388 for (i = 0; i < n_basic_blocks; i++)
1389 if ((basic_block_live_at_start[i][from / HOST_BITS_PER_INT]
1390 & (1 << (from % HOST_BITS_PER_INT))) != 0)
1391 {
1392 basic_block_live_at_start[i][from / HOST_BITS_PER_INT]
1393 &= ~ (1 << (from % HOST_BITS_PER_INT));
1394 basic_block_live_at_start[i][to / HOST_BITS_PER_INT]
1395 |= (1 << (to % HOST_BITS_PER_INT));
1396 }
1397 }
1398 \f
1399 /* Print debugging trace information if -greg switch is given,
1400 showing the information on which the allocation decisions are based. */
1401
1402 static void
1403 dump_conflicts (file)
1404 FILE *file;
1405 {
1406 register int i;
1407 register int has_preferences;
1408 fprintf (file, ";; %d regs to allocate:", max_allocno);
1409 for (i = 0; i < max_allocno; i++)
1410 {
1411 int j;
1412 fprintf (file, " %d", allocno_reg[allocno_order[i]]);
1413 for (j = 0; j < max_regno; j++)
1414 if (reg_allocno[j] == allocno_order[i]
1415 && j != allocno_reg[allocno_order[i]])
1416 fprintf (file, "+%d", j);
1417 if (allocno_size[allocno_order[i]] != 1)
1418 fprintf (file, " (%d)", allocno_size[allocno_order[i]]);
1419 }
1420 fprintf (file, "\n");
1421
1422 for (i = 0; i < max_allocno; i++)
1423 {
1424 register int j;
1425 fprintf (file, ";; %d conflicts:", allocno_reg[i]);
1426 for (j = 0; j < max_allocno; j++)
1427 if (CONFLICTP (i, j) || CONFLICTP (j, i))
1428 fprintf (file, " %d", allocno_reg[j]);
1429 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1430 if (TEST_HARD_REG_BIT (hard_reg_conflicts[i], j))
1431 fprintf (file, " %d", j);
1432 fprintf (file, "\n");
1433
1434 has_preferences = 0;
1435 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1436 if (TEST_HARD_REG_BIT (hard_reg_preferences[i], j))
1437 has_preferences = 1;
1438
1439 if (! has_preferences)
1440 continue;
1441 fprintf (file, ";; %d preferences:", allocno_reg[i]);
1442 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1443 if (TEST_HARD_REG_BIT (hard_reg_preferences[i], j))
1444 fprintf (file, " %d", j);
1445 fprintf (file, "\n");
1446 }
1447 fprintf (file, "\n");
1448 }
1449
1450 void
1451 dump_global_regs (file)
1452 FILE *file;
1453 {
1454 register int i, j;
1455
1456 fprintf (file, ";; Register dispositions:\n");
1457 for (i = FIRST_PSEUDO_REGISTER, j = 0; i < max_regno; i++)
1458 if (reg_renumber[i] >= 0)
1459 {
1460 fprintf (file, "%d in %d ", i, reg_renumber[i]);
1461 if (++j % 6 == 0)
1462 fprintf (file, "\n");
1463 }
1464
1465 fprintf (file, "\n\n;; Hard regs used: ");
1466 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1467 if (regs_ever_live[i])
1468 fprintf (file, " %d", i);
1469 fprintf (file, "\n\n");
1470 }
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