1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains the functions `gen_rtx', `gen_reg_rtx'
24 and `gen_label_rtx' that are the usual ways of creating rtl
25 expressions for most purposes.
27 It also has the functions for creating insns and linking
28 them in the doubly-linked chain.
30 The patterns of the insns are created by machine-dependent
31 routines in insn-emit.c, which is generated automatically from
32 the machine description. These routines use `gen_rtx' to make
33 the individual rtx's of the pattern; what is machine dependent
34 is the kind of rtx's they make and what arguments they use. */
43 #include "insn-config.h"
47 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
48 After rtl generation, it is 1 plus the largest register number used. */
50 int reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
52 /* This is *not* reset after each function. It gives each CODE_LABEL
53 in the entire compilation a unique label number. */
55 static int label_num
= 1;
57 /* Lowest label number in current function. */
59 static int first_label_num
;
61 /* Highest label number in current function.
62 Zero means use the value of label_num instead.
63 This is nonzero only when belatedly compiling an inline function. */
65 static int last_label_num
;
67 /* Value label_num had when set_new_first_and_last_label_number was called.
68 If label_num has not changed since then, last_label_num is valid. */
70 static int base_label_num
;
72 /* Nonzero means do not generate NOTEs for source line numbers. */
74 static int no_line_numbers
;
76 /* Commonly used rtx's, so that we only need space for one copy.
77 These are initialized once for the entire compilation.
78 All of these except perhaps the floating-point CONST_DOUBLEs
79 are unique; no other rtx-object will be equal to any of these. */
81 rtx pc_rtx
; /* (PC) */
82 rtx cc0_rtx
; /* (CC0) */
83 rtx cc1_rtx
; /* (CC1) (not actually used nowadays) */
84 rtx const0_rtx
; /* (CONST_INT 0) */
85 rtx const1_rtx
; /* (CONST_INT 1) */
86 rtx const2_rtx
; /* (CONST_INT 2) */
87 rtx constm1_rtx
; /* (CONST_INT -1) */
88 rtx const_true_rtx
; /* (CONST_INT STORE_FLAG_VALUE) */
90 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
91 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
92 record a copy of const[012]_rtx. */
94 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
96 REAL_VALUE_TYPE dconst0
;
97 REAL_VALUE_TYPE dconst1
;
98 REAL_VALUE_TYPE dconst2
;
99 REAL_VALUE_TYPE dconstm1
;
101 /* All references to the following fixed hard registers go through
102 these unique rtl objects. On machines where the frame-pointer and
103 arg-pointer are the same register, they use the same unique object.
105 After register allocation, other rtl objects which used to be pseudo-regs
106 may be clobbered to refer to the frame-pointer register.
107 But references that were originally to the frame-pointer can be
108 distinguished from the others because they contain frame_pointer_rtx.
110 In an inline procedure, the stack and frame pointer rtxs may not be
111 used for anything else. */
112 rtx stack_pointer_rtx
; /* (REG:Pmode STACK_POINTER_REGNUM) */
113 rtx frame_pointer_rtx
; /* (REG:Pmode FRAME_POINTER_REGNUM) */
114 rtx arg_pointer_rtx
; /* (REG:Pmode ARG_POINTER_REGNUM) */
115 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
116 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
117 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
118 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
119 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
121 rtx virtual_incoming_args_rtx
; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */
122 rtx virtual_stack_vars_rtx
; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */
123 rtx virtual_stack_dynamic_rtx
; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */
124 rtx virtual_outgoing_args_rtx
; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */
126 /* We make one copy of (const_int C) where C is in
127 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
128 to save space during the compilation and simplify comparisons of
131 #define MAX_SAVED_CONST_INT 64
133 static rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
135 /* The ends of the doubly-linked chain of rtl for the current function.
136 Both are reset to null at the start of rtl generation for the function.
138 start_sequence saves both of these on `sequence_stack' and then
139 starts a new, nested sequence of insns. */
141 static rtx first_insn
= NULL
;
142 static rtx last_insn
= NULL
;
144 /* INSN_UID for next insn emitted.
145 Reset to 1 for each function compiled. */
147 static int cur_insn_uid
= 1;
149 /* Line number and source file of the last line-number NOTE emitted.
150 This is used to avoid generating duplicates. */
152 static int last_linenum
= 0;
153 static char *last_filename
= 0;
155 /* A vector indexed by pseudo reg number. The allocated length
156 of this vector is regno_pointer_flag_length. Since this
157 vector is needed during the expansion phase when the total
158 number of registers in the function is not yet known,
159 it is copied and made bigger when necessary. */
161 char *regno_pointer_flag
;
162 int regno_pointer_flag_length
;
164 /* Indexed by pseudo register number, gives the rtx for that pseudo.
165 Allocated in parallel with regno_pointer_flag. */
169 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
170 Each element describes one pending sequence.
171 The main insn-chain is saved in the last element of the chain,
172 unless the chain is empty. */
174 struct sequence_stack
*sequence_stack
;
176 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
177 shortly thrown away. We use two mechanisms to prevent this waste:
179 First, we keep a list of the expressions used to represent the sequence
180 stack in sequence_element_free_list.
182 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
183 rtvec for use by gen_sequence. One entry for each size is sufficient
184 because most cases are calls to gen_sequence followed by immediately
185 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
186 destructive on the insn in it anyway and hence can't be redone.
188 We do not bother to save this cached data over nested function calls.
189 Instead, we just reinitialize them. */
191 #define SEQUENCE_RESULT_SIZE 5
193 static struct sequence_stack
*sequence_element_free_list
;
194 static rtx sequence_result
[SEQUENCE_RESULT_SIZE
];
196 extern int rtx_equal_function_value_matters
;
198 /* Filename and line number of last line-number note,
199 whether we actually emitted it or not. */
200 extern char *emit_filename
;
201 extern int emit_lineno
;
203 rtx
change_address ();
206 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
208 ** This routine generates an RTX of the size specified by
209 ** <code>, which is an RTX code. The RTX structure is initialized
210 ** from the arguments <element1> through <elementn>, which are
211 ** interpreted according to the specific RTX type's format. The
212 ** special machine mode associated with the rtx (if any) is specified
215 ** gen_rtx can be invoked in a way which resembles the lisp-like
216 ** rtx it will generate. For example, the following rtx structure:
218 ** (plus:QI (mem:QI (reg:SI 1))
219 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
221 ** ...would be generated by the following C code:
223 ** gen_rtx (PLUS, QImode,
224 ** gen_rtx (MEM, QImode,
225 ** gen_rtx (REG, SImode, 1)),
226 ** gen_rtx (MEM, QImode,
227 ** gen_rtx (PLUS, SImode,
228 ** gen_rtx (REG, SImode, 2),
229 ** gen_rtx (REG, SImode, 3)))),
239 enum machine_mode mode
;
240 register int i
; /* Array indices... */
241 register char *fmt
; /* Current rtx's format... */
242 register rtx rt_val
; /* RTX to return to caller... */
245 code
= va_arg (p
, enum rtx_code
);
246 mode
= va_arg (p
, enum machine_mode
);
248 if (code
== CONST_INT
)
250 HOST_WIDE_INT arg
= va_arg (p
, HOST_WIDE_INT
);
252 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
253 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
255 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
256 return const_true_rtx
;
258 rt_val
= rtx_alloc (code
);
259 INTVAL (rt_val
) = arg
;
261 else if (code
== REG
)
263 int regno
= va_arg (p
, int);
265 /* In case the MD file explicitly references the frame pointer, have
266 all such references point to the same frame pointer. This is used
267 during frame pointer elimination to distinguish the explicit
268 references to these registers from pseudos that happened to be
271 If we have eliminated the frame pointer or arg pointer, we will
272 be using it as a normal register, for example as a spill register.
273 In such cases, we might be accessing it in a mode that is not
274 Pmode and therefore cannot use the pre-allocated rtx.
276 Also don't do this when we are making new REGs in reload,
277 since we don't want to get confused with the real pointers. */
279 if (frame_pointer_rtx
&& regno
== FRAME_POINTER_REGNUM
&& mode
== Pmode
280 && ! reload_in_progress
)
281 return frame_pointer_rtx
;
282 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
283 if (arg_pointer_rtx
&& regno
== ARG_POINTER_REGNUM
&& mode
== Pmode
284 && ! reload_in_progress
)
285 return arg_pointer_rtx
;
287 if (stack_pointer_rtx
&& regno
== STACK_POINTER_REGNUM
&& mode
== Pmode
288 && ! reload_in_progress
)
289 return stack_pointer_rtx
;
292 rt_val
= rtx_alloc (code
);
294 REGNO (rt_val
) = regno
;
300 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
301 rt_val
->mode
= mode
; /* Store the machine mode... */
303 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
304 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
308 case '0': /* Unused field. */
311 case 'i': /* An integer? */
312 XINT (rt_val
, i
) = va_arg (p
, int);
315 case 'w': /* A wide integer? */
316 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
319 case 's': /* A string? */
320 XSTR (rt_val
, i
) = va_arg (p
, char *);
323 case 'e': /* An expression? */
324 case 'u': /* An insn? Same except when printing. */
325 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
328 case 'E': /* An RTX vector? */
329 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
338 return rt_val
; /* Return the new RTX... */
341 /* gen_rtvec (n, [rt1, ..., rtn])
343 ** This routine creates an rtvec and stores within it the
344 ** pointers to rtx's which are its arguments.
360 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
362 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
363 for (i
= 0; i
< n
; i
++)
364 vector
[i
] = va_arg (p
, rtx
);
367 return gen_rtvec_v (n
, vector
);
371 gen_rtvec_v (n
, argp
)
376 register rtvec rt_val
;
379 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
381 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
383 for (i
= 0; i
< n
; i
++)
384 rt_val
->elem
[i
].rtx
= *argp
++;
389 /* Generate a REG rtx for a new pseudo register of mode MODE.
390 This pseudo is assigned the next sequential register number. */
394 enum machine_mode mode
;
398 /* Don't let anything called by or after reload create new registers
399 (actually, registers can't be created after flow, but this is a good
402 if (reload_in_progress
|| reload_completed
)
405 /* Make sure regno_pointer_flag and regno_reg_rtx are large
406 enough to have an element for this pseudo reg number. */
408 if (reg_rtx_no
== regno_pointer_flag_length
)
412 (char *) oballoc (regno_pointer_flag_length
* 2);
413 bzero (new, regno_pointer_flag_length
* 2);
414 bcopy (regno_pointer_flag
, new, regno_pointer_flag_length
);
415 regno_pointer_flag
= new;
417 new1
= (rtx
*) oballoc (regno_pointer_flag_length
* 2 * sizeof (rtx
));
418 bzero (new1
, regno_pointer_flag_length
* 2 * sizeof (rtx
));
419 bcopy (regno_reg_rtx
, new1
, regno_pointer_flag_length
* sizeof (rtx
));
420 regno_reg_rtx
= new1
;
422 regno_pointer_flag_length
*= 2;
425 val
= gen_rtx (REG
, mode
, reg_rtx_no
);
426 regno_reg_rtx
[reg_rtx_no
++] = val
;
430 /* Identify REG as a probable pointer register. */
433 mark_reg_pointer (reg
)
436 REGNO_POINTER_FLAG (REGNO (reg
)) = 1;
439 /* Return 1 plus largest pseudo reg number used in the current function. */
447 /* Return 1 + the largest label number used so far in the current function. */
452 if (last_label_num
&& label_num
== base_label_num
)
453 return last_label_num
;
457 /* Return first label number used in this function (if any were used). */
460 get_first_label_num ()
462 return first_label_num
;
465 /* Return a value representing some low-order bits of X, where the number
466 of low-order bits is given by MODE. Note that no conversion is done
467 between floating-point and fixed-point values, rather, the bit
468 representation is returned.
470 This function handles the cases in common between gen_lowpart, below,
471 and two variants in cse.c and combine.c. These are the cases that can
472 be safely handled at all points in the compilation.
474 If this is not a case we can handle, return 0. */
477 gen_lowpart_common (mode
, x
)
478 enum machine_mode mode
;
483 if (GET_MODE (x
) == mode
)
486 /* MODE must occupy no more words than the mode of X. */
487 if (GET_MODE (x
) != VOIDmode
488 && ((GET_MODE_SIZE (mode
) + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
489 > ((GET_MODE_SIZE (GET_MODE (x
)) + (UNITS_PER_WORD
- 1))
493 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
)
494 word
= ((GET_MODE_SIZE (GET_MODE (x
))
495 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
))
498 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
499 && (GET_MODE_CLASS (mode
) == MODE_INT
500 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
502 /* If we are getting the low-order part of something that has been
503 sign- or zero-extended, we can either just use the object being
504 extended or make a narrower extension. If we want an even smaller
505 piece than the size of the object being extended, call ourselves
508 This case is used mostly by combine and cse. */
510 if (GET_MODE (XEXP (x
, 0)) == mode
)
512 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
513 return gen_lowpart_common (mode
, XEXP (x
, 0));
514 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
515 return gen_rtx (GET_CODE (x
), mode
, XEXP (x
, 0));
517 else if (GET_CODE (x
) == SUBREG
518 && (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
519 || GET_MODE_SIZE (mode
) == GET_MODE_UNIT_SIZE (GET_MODE (x
))))
520 return (GET_MODE (SUBREG_REG (x
)) == mode
&& SUBREG_WORD (x
) == 0
522 : gen_rtx (SUBREG
, mode
, SUBREG_REG (x
), SUBREG_WORD (x
)));
523 else if (GET_CODE (x
) == REG
)
525 /* If the register is not valid for MODE, return 0. If we don't
526 do this, there is no way to fix up the resulting REG later. */
527 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
528 && ! HARD_REGNO_MODE_OK (REGNO (x
) + word
, mode
))
530 else if (REGNO (x
) < FIRST_PSEUDO_REGISTER
531 /* integrate.c can't handle parts of a return value register. */
532 && (! REG_FUNCTION_VALUE_P (x
)
533 || ! rtx_equal_function_value_matters
)
534 /* We want to keep the stack, frame, and arg pointers
536 && REGNO (x
) != FRAME_POINTER_REGNUM
537 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
538 && REGNO (x
) != ARG_POINTER_REGNUM
540 && REGNO (x
) != STACK_POINTER_REGNUM
)
541 return gen_rtx (REG
, mode
, REGNO (x
) + word
);
543 return gen_rtx (SUBREG
, mode
, x
, word
);
546 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
547 from the low-order part of the constant. */
548 else if ((GET_MODE_CLASS (mode
) == MODE_INT
549 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
550 && GET_MODE (x
) == VOIDmode
551 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
553 /* If MODE is twice the host word size, X is already the desired
554 representation. Otherwise, if MODE is wider than a word, we can't
555 do this. If MODE is exactly a word, return just one CONST_INT.
556 If MODE is smaller than a word, clear the bits that don't belong
557 in our mode, unless they and our sign bit are all one. So we get
558 either a reasonable negative value or a reasonable unsigned value
561 if (GET_MODE_BITSIZE (mode
) == 2 * HOST_BITS_PER_WIDE_INT
)
563 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
565 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
566 return (GET_CODE (x
) == CONST_INT
? x
567 : GEN_INT (CONST_DOUBLE_LOW (x
)));
570 /* MODE must be narrower than HOST_BITS_PER_INT. */
571 int width
= GET_MODE_BITSIZE (mode
);
572 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
573 : CONST_DOUBLE_LOW (x
));
575 if (((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
576 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
577 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
579 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
584 /* If X is an integral constant but we want it in floating-point, it
585 must be the case that we have a union of an integer and a floating-point
586 value. If the machine-parameters allow it, simulate that union here
587 and return the result. The two-word and single-word cases are
590 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
591 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
592 || flag_pretend_float
)
593 && GET_MODE_CLASS (mode
) == MODE_FLOAT
594 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
595 && GET_CODE (x
) == CONST_INT
596 && sizeof (float) * HOST_BITS_PER_CHAR
== HOST_BITS_PER_WIDE_INT
)
598 union {HOST_WIDE_INT i
; float d
; } u
;
601 return immed_real_const_1 (u
.d
, mode
);
604 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
605 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
606 || flag_pretend_float
)
607 && GET_MODE_CLASS (mode
) == MODE_FLOAT
608 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
609 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
610 && GET_MODE (x
) == VOIDmode
611 && (sizeof (double) * HOST_BITS_PER_CHAR
612 == 2 * HOST_BITS_PER_WIDE_INT
))
614 union {HOST_WIDE_INT i
[2]; double d
; } u
;
615 HOST_WIDE_INT low
, high
;
617 if (GET_CODE (x
) == CONST_INT
)
618 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
620 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
622 #ifdef HOST_WORDS_BIG_ENDIAN
623 u
.i
[0] = high
, u
.i
[1] = low
;
625 u
.i
[0] = low
, u
.i
[1] = high
;
628 return immed_real_const_1 (u
.d
, mode
);
631 /* Similarly, if this is converting a floating-point value into a
632 single-word integer. Only do this is the host and target parameters are
635 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
636 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
637 || flag_pretend_float
)
638 && (GET_MODE_CLASS (mode
) == MODE_INT
639 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
640 && GET_CODE (x
) == CONST_DOUBLE
641 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
642 && GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
)
643 return operand_subword (x
, 0, 0, GET_MODE (x
));
645 /* Similarly, if this is converting a floating-point value into a
646 two-word integer, we can do this one word at a time and make an
647 integer. Only do this is the host and target parameters are
650 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
651 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
652 || flag_pretend_float
)
653 && (GET_MODE_CLASS (mode
) == MODE_INT
654 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
655 && GET_CODE (x
) == CONST_DOUBLE
656 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
657 && GET_MODE_BITSIZE (mode
) == 2 * BITS_PER_WORD
)
659 rtx lowpart
= operand_subword (x
, WORDS_BIG_ENDIAN
, 0, GET_MODE (x
));
660 rtx highpart
= operand_subword (x
, ! WORDS_BIG_ENDIAN
, 0, GET_MODE (x
));
662 if (lowpart
&& GET_CODE (lowpart
) == CONST_INT
663 && highpart
&& GET_CODE (highpart
) == CONST_INT
)
664 return immed_double_const (INTVAL (lowpart
), INTVAL (highpart
), mode
);
667 /* Otherwise, we can't do this. */
671 /* Return the real part (which has mode MODE) of a complex value X.
672 This always comes at the low address in memory. */
675 gen_realpart (mode
, x
)
676 enum machine_mode mode
;
679 if (WORDS_BIG_ENDIAN
)
680 return gen_highpart (mode
, x
);
682 return gen_lowpart (mode
, x
);
685 /* Return the imaginary part (which has mode MODE) of a complex value X.
686 This always comes at the high address in memory. */
689 gen_imagpart (mode
, x
)
690 enum machine_mode mode
;
693 if (WORDS_BIG_ENDIAN
)
694 return gen_lowpart (mode
, x
);
696 return gen_highpart (mode
, x
);
699 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
700 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
701 least-significant part of X.
702 MODE specifies how big a part of X to return;
703 it usually should not be larger than a word.
704 If X is a MEM whose address is a QUEUED, the value may be so also. */
707 gen_lowpart (mode
, x
)
708 enum machine_mode mode
;
711 rtx result
= gen_lowpart_common (mode
, x
);
715 else if (GET_CODE (x
) == MEM
)
717 /* The only additional case we can do is MEM. */
718 register int offset
= 0;
719 if (WORDS_BIG_ENDIAN
)
720 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
721 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
723 if (BYTES_BIG_ENDIAN
)
724 /* Adjust the address so that the address-after-the-data
726 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
727 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
729 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
735 /* Like `gen_lowpart', but refer to the most significant part.
736 This is used to access the imaginary part of a complex number. */
739 gen_highpart (mode
, x
)
740 enum machine_mode mode
;
743 /* This case loses if X is a subreg. To catch bugs early,
744 complain if an invalid MODE is used even in other cases. */
745 if (GET_MODE_SIZE (mode
) > UNITS_PER_WORD
746 && GET_MODE_SIZE (mode
) != GET_MODE_UNIT_SIZE (GET_MODE (x
)))
748 if (GET_CODE (x
) == CONST_DOUBLE
749 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
750 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_FLOAT
753 return gen_rtx (CONST_INT
, VOIDmode
,
754 CONST_DOUBLE_HIGH (x
) & GET_MODE_MASK (mode
));
755 else if (GET_CODE (x
) == CONST_INT
)
757 else if (GET_CODE (x
) == MEM
)
759 register int offset
= 0;
760 #if !WORDS_BIG_ENDIAN
761 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
762 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
764 #if !BYTES_BIG_ENDIAN
765 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
766 offset
-= (GET_MODE_SIZE (mode
)
767 - MIN (UNITS_PER_WORD
,
768 GET_MODE_SIZE (GET_MODE (x
))));
770 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
772 else if (GET_CODE (x
) == SUBREG
)
774 /* The only time this should occur is when we are looking at a
775 multi-word item with a SUBREG whose mode is the same as that of the
776 item. It isn't clear what we would do if it wasn't. */
777 if (SUBREG_WORD (x
) != 0)
779 return gen_highpart (mode
, SUBREG_REG (x
));
781 else if (GET_CODE (x
) == REG
)
785 #if !WORDS_BIG_ENDIAN
786 if (GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
)
787 word
= ((GET_MODE_SIZE (GET_MODE (x
))
788 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
))
791 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
792 /* We want to keep the stack, frame, and arg pointers special. */
793 && REGNO (x
) != FRAME_POINTER_REGNUM
794 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
795 && REGNO (x
) != ARG_POINTER_REGNUM
797 && REGNO (x
) != STACK_POINTER_REGNUM
)
798 return gen_rtx (REG
, mode
, REGNO (x
) + word
);
800 return gen_rtx (SUBREG
, mode
, x
, word
);
806 /* Return 1 iff X, assumed to be a SUBREG,
807 refers to the least significant part of its containing reg.
808 If X is not a SUBREG, always return 1 (it is its own low part!). */
814 if (GET_CODE (x
) != SUBREG
)
818 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))) > UNITS_PER_WORD
)
819 return (SUBREG_WORD (x
)
820 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))
821 - MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
))
824 return SUBREG_WORD (x
) == 0;
827 /* Return subword I of operand OP.
828 The word number, I, is interpreted as the word number starting at the
829 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
830 otherwise it is the high-order word.
832 If we cannot extract the required word, we return zero. Otherwise, an
833 rtx corresponding to the requested word will be returned.
835 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
836 reload has completed, a valid address will always be returned. After
837 reload, if a valid address cannot be returned, we return zero.
839 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
840 it is the responsibility of the caller.
842 MODE is the mode of OP in case it is a CONST_INT. */
845 operand_subword (op
, i
, validate_address
, mode
)
848 int validate_address
;
849 enum machine_mode mode
;
852 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
854 if (mode
== VOIDmode
)
855 mode
= GET_MODE (op
);
857 if (mode
== VOIDmode
)
860 /* If OP is narrower than a word or if we want a word outside OP, fail. */
862 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
863 || (i
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
)))
866 /* If OP is already an integer word, return it. */
867 if (GET_MODE_CLASS (mode
) == MODE_INT
868 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
871 /* If OP is a REG or SUBREG, we can handle it very simply. */
872 if (GET_CODE (op
) == REG
)
874 /* If the register is not valid for MODE, return 0. If we don't
875 do this, there is no way to fix up the resulting REG later. */
876 if (REGNO (op
) < FIRST_PSEUDO_REGISTER
877 && ! HARD_REGNO_MODE_OK (REGNO (op
) + i
, word_mode
))
879 else if (REGNO (op
) >= FIRST_PSEUDO_REGISTER
880 || (REG_FUNCTION_VALUE_P (op
)
881 && rtx_equal_function_value_matters
)
882 /* We want to keep the stack, frame, and arg pointers
884 || REGNO (op
) == FRAME_POINTER_REGNUM
885 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
886 || REGNO (op
) == ARG_POINTER_REGNUM
888 || REGNO (op
) == STACK_POINTER_REGNUM
)
889 return gen_rtx (SUBREG
, word_mode
, op
, i
);
891 return gen_rtx (REG
, word_mode
, REGNO (op
) + i
);
893 else if (GET_CODE (op
) == SUBREG
)
894 return gen_rtx (SUBREG
, word_mode
, SUBREG_REG (op
), i
+ SUBREG_WORD (op
));
896 /* Form a new MEM at the requested address. */
897 if (GET_CODE (op
) == MEM
)
899 rtx addr
= plus_constant (XEXP (op
, 0), i
* UNITS_PER_WORD
);
902 if (validate_address
)
904 if (reload_completed
)
906 if (! strict_memory_address_p (word_mode
, addr
))
910 addr
= memory_address (word_mode
, addr
);
913 new = gen_rtx (MEM
, word_mode
, addr
);
915 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op
);
916 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op
);
917 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op
);
922 /* The only remaining cases are when OP is a constant. If the host and
923 target floating formats are the same, handling two-word floating
924 constants are easy. */
925 #ifdef REAL_ARITHMETIC
926 if ((HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
927 && GET_MODE_CLASS (mode
) == MODE_FLOAT
928 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
929 && GET_CODE (op
) == CONST_DOUBLE
)
934 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
935 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
936 return GEN_INT (k
[i
]);
938 #else /* no REAL_ARITHMETIC */
939 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
940 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
941 || flag_pretend_float
)
942 && GET_MODE_CLASS (mode
) == MODE_FLOAT
943 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
944 && GET_CODE (op
) == CONST_DOUBLE
)
946 /* The constant is stored in the host's word-ordering,
947 but we want to access it in the target's word-ordering. Some
948 compilers don't like a conditional inside macro args, so we have two
949 copies of the return. */
950 #ifdef HOST_WORDS_BIG_ENDIAN
951 return GEN_INT (i
== WORDS_BIG_ENDIAN
952 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
954 return GEN_INT (i
!= WORDS_BIG_ENDIAN
955 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
958 #endif /* no REAL_ARITHMETIC */
960 /* Single word float is a little harder, since single- and double-word
961 values often do not have the same high-order bits. We have already
962 verified that we want the only defined word of the single-word value. */
963 #ifdef REAL_ARITHMETIC
964 if ((HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
965 && GET_MODE_CLASS (mode
) == MODE_FLOAT
966 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
967 && GET_CODE (op
) == CONST_DOUBLE
)
972 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
973 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
977 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
978 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
979 || flag_pretend_float
)
980 && GET_MODE_CLASS (mode
) == MODE_FLOAT
981 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
982 && GET_CODE (op
) == CONST_DOUBLE
)
985 union {float f
; HOST_WIDE_INT i
; } u
;
987 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
990 return GEN_INT (u
.i
);
992 #endif /* no REAL_ARITHMETIC */
994 /* The only remaining cases that we can handle are integers.
995 Convert to proper endianness now since these cases need it.
996 At this point, i == 0 means the low-order word.
998 Note that it must be that BITS_PER_WORD <= HOST_BITS_PER_INT.
999 This is because if it were greater, it could only have been two
1000 times greater since we do not support making wider constants. In
1001 that case, it MODE would have already been the proper size and
1002 it would have been handled above. This means we do not have to
1003 worry about the case where we would be returning a CONST_DOUBLE. */
1005 if (GET_MODE_CLASS (mode
) != MODE_INT
1006 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
))
1009 if (WORDS_BIG_ENDIAN
)
1010 i
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - i
;
1012 /* Find out which word on the host machine this value is in and get
1013 it from the constant. */
1014 val
= (i
/ size_ratio
== 0
1015 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1016 : (GET_CODE (op
) == CONST_INT
1017 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1019 /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */
1020 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1021 val
= ((val
>> ((i
% size_ratio
) * BITS_PER_WORD
))
1022 & (((HOST_WIDE_INT
) 1
1023 << (BITS_PER_WORD
% HOST_BITS_PER_WIDE_INT
)) - 1));
1025 return GEN_INT (val
);
1028 /* Similar to `operand_subword', but never return 0. If we can't extract
1029 the required subword, put OP into a register and try again. If that fails,
1030 abort. We always validate the address in this case. It is not valid
1031 to call this function after reload; it is mostly meant for RTL
1034 MODE is the mode of OP, in case it is CONST_INT. */
1037 operand_subword_force (op
, i
, mode
)
1040 enum machine_mode mode
;
1042 rtx result
= operand_subword (op
, i
, 1, mode
);
1047 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1048 op
= force_reg (mode
, op
);
1050 result
= operand_subword (op
, i
, 1, mode
);
1057 /* Given a compare instruction, swap the operands.
1058 A test instruction is changed into a compare of 0 against the operand. */
1061 reverse_comparison (insn
)
1064 rtx body
= PATTERN (insn
);
1067 if (GET_CODE (body
) == SET
)
1068 comp
= SET_SRC (body
);
1070 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1072 if (GET_CODE (comp
) == COMPARE
)
1074 rtx op0
= XEXP (comp
, 0);
1075 rtx op1
= XEXP (comp
, 1);
1076 XEXP (comp
, 0) = op1
;
1077 XEXP (comp
, 1) = op0
;
1081 rtx
new = gen_rtx (COMPARE
, VOIDmode
,
1082 CONST0_RTX (GET_MODE (comp
)), comp
);
1083 if (GET_CODE (body
) == SET
)
1084 SET_SRC (body
) = new;
1086 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1090 /* Return a memory reference like MEMREF, but with its mode changed
1091 to MODE and its address changed to ADDR.
1092 (VOIDmode means don't change the mode.
1093 NULL for ADDR means don't change the address.) */
1096 change_address (memref
, mode
, addr
)
1098 enum machine_mode mode
;
1103 if (GET_CODE (memref
) != MEM
)
1105 if (mode
== VOIDmode
)
1106 mode
= GET_MODE (memref
);
1108 addr
= XEXP (memref
, 0);
1110 /* If reload is in progress or has completed, ADDR must be valid.
1111 Otherwise, we can call memory_address to make it valid. */
1112 if (reload_completed
|| reload_in_progress
)
1114 if (! memory_address_p (mode
, addr
))
1118 addr
= memory_address (mode
, addr
);
1120 new = gen_rtx (MEM
, mode
, addr
);
1121 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref
);
1122 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref
);
1123 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref
);
1127 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1132 register rtx label
= gen_rtx (CODE_LABEL
, VOIDmode
, 0, 0, 0,
1133 label_num
++, NULL_PTR
);
1134 LABEL_NUSES (label
) = 0;
1138 /* For procedure integration. */
1140 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1141 from a permanent obstack when the opportunity arises. */
1144 gen_inline_header_rtx (first_insn
, first_parm_insn
, first_labelno
,
1145 last_labelno
, max_parm_regnum
, max_regnum
, args_size
,
1146 pops_args
, stack_slots
, function_flags
,
1147 outgoing_args_size
, original_arg_vector
,
1148 original_decl_initial
)
1149 rtx first_insn
, first_parm_insn
;
1150 int first_labelno
, last_labelno
, max_parm_regnum
, max_regnum
, args_size
;
1154 int outgoing_args_size
;
1155 rtvec original_arg_vector
;
1156 rtx original_decl_initial
;
1158 rtx header
= gen_rtx (INLINE_HEADER
, VOIDmode
,
1159 cur_insn_uid
++, NULL_RTX
,
1160 first_insn
, first_parm_insn
,
1161 first_labelno
, last_labelno
,
1162 max_parm_regnum
, max_regnum
, args_size
, pops_args
,
1163 stack_slots
, function_flags
, outgoing_args_size
,
1164 original_arg_vector
, original_decl_initial
);
1168 /* Install new pointers to the first and last insns in the chain.
1169 Used for an inline-procedure after copying the insn chain. */
1172 set_new_first_and_last_insn (first
, last
)
1179 /* Set the range of label numbers found in the current function.
1180 This is used when belatedly compiling an inline function. */
1183 set_new_first_and_last_label_num (first
, last
)
1186 base_label_num
= label_num
;
1187 first_label_num
= first
;
1188 last_label_num
= last
;
1191 /* Save all variables describing the current status into the structure *P.
1192 This is used before starting a nested function. */
1195 save_emit_status (p
)
1198 p
->reg_rtx_no
= reg_rtx_no
;
1199 p
->first_label_num
= first_label_num
;
1200 p
->first_insn
= first_insn
;
1201 p
->last_insn
= last_insn
;
1202 p
->sequence_stack
= sequence_stack
;
1203 p
->cur_insn_uid
= cur_insn_uid
;
1204 p
->last_linenum
= last_linenum
;
1205 p
->last_filename
= last_filename
;
1206 p
->regno_pointer_flag
= regno_pointer_flag
;
1207 p
->regno_pointer_flag_length
= regno_pointer_flag_length
;
1208 p
->regno_reg_rtx
= regno_reg_rtx
;
1211 /* Restore all variables describing the current status from the structure *P.
1212 This is used after a nested function. */
1215 restore_emit_status (p
)
1220 reg_rtx_no
= p
->reg_rtx_no
;
1221 first_label_num
= p
->first_label_num
;
1222 first_insn
= p
->first_insn
;
1223 last_insn
= p
->last_insn
;
1224 sequence_stack
= p
->sequence_stack
;
1225 cur_insn_uid
= p
->cur_insn_uid
;
1226 last_linenum
= p
->last_linenum
;
1227 last_filename
= p
->last_filename
;
1228 regno_pointer_flag
= p
->regno_pointer_flag
;
1229 regno_pointer_flag_length
= p
->regno_pointer_flag_length
;
1230 regno_reg_rtx
= p
->regno_reg_rtx
;
1232 /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */
1233 sequence_element_free_list
= 0;
1234 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
1235 sequence_result
[i
] = 0;
1238 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1239 It does not work to do this twice, because the mark bits set here
1240 are not cleared afterwards. */
1243 unshare_all_rtl (insn
)
1246 for (; insn
; insn
= NEXT_INSN (insn
))
1247 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
1248 || GET_CODE (insn
) == CALL_INSN
)
1250 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
1251 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
1252 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
1255 /* Make sure the addresses of stack slots found outside the insn chain
1256 (such as, in DECL_RTL of a variable) are not shared
1257 with the insn chain.
1259 This special care is necessary when the stack slot MEM does not
1260 actually appear in the insn chain. If it does appear, its address
1261 is unshared from all else at that point. */
1263 copy_rtx_if_shared (stack_slot_list
);
1266 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1267 Recursively does the same for subexpressions. */
1270 copy_rtx_if_shared (orig
)
1273 register rtx x
= orig
;
1275 register enum rtx_code code
;
1276 register char *format_ptr
;
1282 code
= GET_CODE (x
);
1284 /* These types may be freely shared. */
1297 /* SCRATCH must be shared because they represent distinct values. */
1301 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1302 a LABEL_REF, it isn't sharable. */
1303 if (GET_CODE (XEXP (x
, 0)) == PLUS
1304 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
1305 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
1315 /* The chain of insns is not being copied. */
1319 /* A MEM is allowed to be shared if its address is constant
1320 or is a constant plus one of the special registers. */
1321 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
1322 || XEXP (x
, 0) == virtual_stack_vars_rtx
1323 || XEXP (x
, 0) == virtual_incoming_args_rtx
)
1326 if (GET_CODE (XEXP (x
, 0)) == PLUS
1327 && (XEXP (XEXP (x
, 0), 0) == virtual_stack_vars_rtx
1328 || XEXP (XEXP (x
, 0), 0) == virtual_incoming_args_rtx
)
1329 && CONSTANT_ADDRESS_P (XEXP (XEXP (x
, 0), 1)))
1331 /* This MEM can appear in more than one place,
1332 but its address better not be shared with anything else. */
1334 XEXP (x
, 0) = copy_rtx_if_shared (XEXP (x
, 0));
1340 /* This rtx may not be shared. If it has already been seen,
1341 replace it with a copy of itself. */
1347 copy
= rtx_alloc (code
);
1348 bcopy (x
, copy
, (sizeof (*copy
) - sizeof (copy
->fld
)
1349 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
1355 /* Now scan the subexpressions recursively.
1356 We can store any replaced subexpressions directly into X
1357 since we know X is not shared! Any vectors in X
1358 must be copied if X was copied. */
1360 format_ptr
= GET_RTX_FORMAT (code
);
1362 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1364 switch (*format_ptr
++)
1367 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
1371 if (XVEC (x
, i
) != NULL
)
1376 XVEC (x
, i
) = gen_rtvec_v (XVECLEN (x
, i
), &XVECEXP (x
, i
, 0));
1377 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1379 = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
1387 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1388 to look for shared sub-parts. */
1391 reset_used_flags (x
)
1395 register enum rtx_code code
;
1396 register char *format_ptr
;
1402 code
= GET_CODE (x
);
1404 /* These types may be freely shared so we needn't do any reseting
1425 /* The chain of insns is not being copied. */
1431 format_ptr
= GET_RTX_FORMAT (code
);
1432 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1434 switch (*format_ptr
++)
1437 reset_used_flags (XEXP (x
, i
));
1441 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1442 reset_used_flags (XVECEXP (x
, i
, j
));
1448 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1449 Return X or the rtx for the pseudo reg the value of X was copied into.
1450 OTHER must be valid as a SET_DEST. */
1453 make_safe_from (x
, other
)
1457 switch (GET_CODE (other
))
1460 other
= SUBREG_REG (other
);
1462 case STRICT_LOW_PART
:
1465 other
= XEXP (other
, 0);
1471 if ((GET_CODE (other
) == MEM
1473 && GET_CODE (x
) != REG
1474 && GET_CODE (x
) != SUBREG
)
1475 || (GET_CODE (other
) == REG
1476 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
1477 || reg_mentioned_p (other
, x
))))
1479 rtx temp
= gen_reg_rtx (GET_MODE (x
));
1480 emit_move_insn (temp
, x
);
1486 /* Emission of insns (adding them to the doubly-linked list). */
1488 /* Return the first insn of the current sequence or current function. */
1496 /* Return the last insn emitted in current sequence or current function. */
1504 /* Specify a new insn as the last in the chain. */
1507 set_last_insn (insn
)
1510 if (NEXT_INSN (insn
) != 0)
1515 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1518 get_last_insn_anywhere ()
1520 struct sequence_stack
*stack
;
1523 for (stack
= sequence_stack
; stack
; stack
= stack
->next
)
1524 if (stack
->last
!= 0)
1529 /* Return a number larger than any instruction's uid in this function. */
1534 return cur_insn_uid
;
1537 /* Return the next insn. If it is a SEQUENCE, return the first insn
1546 insn
= NEXT_INSN (insn
);
1547 if (insn
&& GET_CODE (insn
) == INSN
1548 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1549 insn
= XVECEXP (PATTERN (insn
), 0, 0);
1555 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1559 previous_insn (insn
)
1564 insn
= PREV_INSN (insn
);
1565 if (insn
&& GET_CODE (insn
) == INSN
1566 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1567 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
1573 /* Return the next insn after INSN that is not a NOTE. This routine does not
1574 look inside SEQUENCEs. */
1577 next_nonnote_insn (insn
)
1582 insn
= NEXT_INSN (insn
);
1583 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
1590 /* Return the previous insn before INSN that is not a NOTE. This routine does
1591 not look inside SEQUENCEs. */
1594 prev_nonnote_insn (insn
)
1599 insn
= PREV_INSN (insn
);
1600 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
1607 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1608 or 0, if there is none. This routine does not look inside
1612 next_real_insn (insn
)
1617 insn
= NEXT_INSN (insn
);
1618 if (insn
== 0 || GET_CODE (insn
) == INSN
1619 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
1626 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1627 or 0, if there is none. This routine does not look inside
1631 prev_real_insn (insn
)
1636 insn
= PREV_INSN (insn
);
1637 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
1638 || GET_CODE (insn
) == JUMP_INSN
)
1645 /* Find the next insn after INSN that really does something. This routine
1646 does not look inside SEQUENCEs. Until reload has completed, this is the
1647 same as next_real_insn. */
1650 next_active_insn (insn
)
1655 insn
= NEXT_INSN (insn
);
1657 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
1658 || (GET_CODE (insn
) == INSN
1659 && (! reload_completed
1660 || (GET_CODE (PATTERN (insn
)) != USE
1661 && GET_CODE (PATTERN (insn
)) != CLOBBER
))))
1668 /* Find the last insn before INSN that really does something. This routine
1669 does not look inside SEQUENCEs. Until reload has completed, this is the
1670 same as prev_real_insn. */
1673 prev_active_insn (insn
)
1678 insn
= PREV_INSN (insn
);
1680 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
1681 || (GET_CODE (insn
) == INSN
1682 && (! reload_completed
1683 || (GET_CODE (PATTERN (insn
)) != USE
1684 && GET_CODE (PATTERN (insn
)) != CLOBBER
))))
1691 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
1699 insn
= NEXT_INSN (insn
);
1700 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
1707 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
1715 insn
= PREV_INSN (insn
);
1716 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
1724 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
1725 and REG_CC_USER notes so we can find it. */
1728 link_cc0_insns (insn
)
1731 rtx user
= next_nonnote_insn (insn
);
1733 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
1734 user
= XVECEXP (PATTERN (user
), 0, 0);
1736 REG_NOTES (user
) = gen_rtx (INSN_LIST
, REG_CC_SETTER
, insn
,
1738 REG_NOTES (insn
) = gen_rtx (INSN_LIST
, REG_CC_USER
, user
, REG_NOTES (insn
));
1741 /* Return the next insn that uses CC0 after INSN, which is assumed to
1742 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
1743 applied to the result of this function should yield INSN).
1745 Normally, this is simply the next insn. However, if a REG_CC_USER note
1746 is present, it contains the insn that uses CC0.
1748 Return 0 if we can't find the insn. */
1751 next_cc0_user (insn
)
1754 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
1757 return XEXP (note
, 0);
1759 insn
= next_nonnote_insn (insn
);
1760 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1761 insn
= XVECEXP (PATTERN (insn
), 0, 0);
1763 if (insn
&& GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
1764 && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
1770 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
1771 note, it is the previous insn. */
1774 prev_cc0_setter (insn
)
1777 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
1781 return XEXP (note
, 0);
1783 insn
= prev_nonnote_insn (insn
);
1784 if (! sets_cc0_p (PATTERN (insn
)))
1791 /* Try splitting insns that can be split for better scheduling.
1792 PAT is the pattern which might split.
1793 TRIAL is the insn providing PAT.
1794 BACKWARDS is non-zero if we are scanning insns from last to first.
1796 If this routine succeeds in splitting, it returns the first or last
1797 replacement insn depending on the value of BACKWARDS. Otherwise, it
1798 returns TRIAL. If the insn to be returned can be split, it will be. */
1801 try_split (pat
, trial
, backwards
)
1805 rtx before
= PREV_INSN (trial
);
1806 rtx after
= NEXT_INSN (trial
);
1807 rtx seq
= split_insns (pat
, trial
);
1808 int has_barrier
= 0;
1811 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
1812 We may need to handle this specially. */
1813 if (after
&& GET_CODE (after
) == BARRIER
)
1816 after
= NEXT_INSN (after
);
1821 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
1822 The latter case will normally arise only when being done so that
1823 it, in turn, will be split (SFmode on the 29k is an example). */
1824 if (GET_CODE (seq
) == SEQUENCE
)
1826 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
1827 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
1828 increment the usage count so we don't delete the label. */
1831 if (GET_CODE (trial
) == JUMP_INSN
)
1832 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
1833 if (GET_CODE (XVECEXP (seq
, 0, i
)) == JUMP_INSN
)
1835 JUMP_LABEL (XVECEXP (seq
, 0, i
)) = JUMP_LABEL (trial
);
1837 if (JUMP_LABEL (trial
))
1838 LABEL_NUSES (JUMP_LABEL (trial
))++;
1841 tem
= emit_insn_after (seq
, before
);
1843 delete_insn (trial
);
1845 emit_barrier_after (tem
);
1847 /* Avoid infinite loop if the result matches the original pattern. */
1848 else if (rtx_equal_p (seq
, pat
))
1852 PATTERN (trial
) = seq
;
1853 INSN_CODE (trial
) = -1;
1856 /* Set TEM to the insn we should return. */
1857 tem
= backwards
? prev_active_insn (after
) : next_active_insn (before
);
1858 return try_split (PATTERN (tem
), tem
, backwards
);
1864 /* Make and return an INSN rtx, initializing all its slots.
1865 Store PATTERN in the pattern slots. */
1868 make_insn_raw (pattern
)
1873 insn
= rtx_alloc (INSN
);
1874 INSN_UID (insn
) = cur_insn_uid
++;
1876 PATTERN (insn
) = pattern
;
1877 INSN_CODE (insn
) = -1;
1878 LOG_LINKS (insn
) = NULL
;
1879 REG_NOTES (insn
) = NULL
;
1884 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
1887 make_jump_insn_raw (pattern
)
1892 insn
= rtx_alloc (JUMP_INSN
);
1893 INSN_UID (insn
) = cur_insn_uid
++;
1895 PATTERN (insn
) = pattern
;
1896 INSN_CODE (insn
) = -1;
1897 LOG_LINKS (insn
) = NULL
;
1898 REG_NOTES (insn
) = NULL
;
1899 JUMP_LABEL (insn
) = NULL
;
1904 /* Add INSN to the end of the doubly-linked list.
1905 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
1911 PREV_INSN (insn
) = last_insn
;
1912 NEXT_INSN (insn
) = 0;
1914 if (NULL
!= last_insn
)
1915 NEXT_INSN (last_insn
) = insn
;
1917 if (NULL
== first_insn
)
1923 /* Add INSN into the doubly-linked list after insn AFTER. This should be the
1924 only function called to insert an insn once delay slots have been filled
1925 since only it knows how to update a SEQUENCE. */
1928 add_insn_after (insn
, after
)
1931 rtx next
= NEXT_INSN (after
);
1933 NEXT_INSN (insn
) = next
;
1934 PREV_INSN (insn
) = after
;
1938 PREV_INSN (next
) = insn
;
1939 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
1940 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
1942 else if (last_insn
== after
)
1946 struct sequence_stack
*stack
= sequence_stack
;
1947 /* Scan all pending sequences too. */
1948 for (; stack
; stack
= stack
->next
)
1949 if (after
== stack
->last
)
1953 NEXT_INSN (after
) = insn
;
1954 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
1956 rtx sequence
= PATTERN (after
);
1957 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
1961 /* Delete all insns made since FROM.
1962 FROM becomes the new last instruction. */
1965 delete_insns_since (from
)
1971 NEXT_INSN (from
) = 0;
1975 /* Move a consecutive bunch of insns to a different place in the chain.
1976 The insns to be moved are those between FROM and TO.
1977 They are moved to a new position after the insn AFTER.
1978 AFTER must not be FROM or TO or any insn in between.
1980 This function does not know about SEQUENCEs and hence should not be
1981 called after delay-slot filling has been done. */
1984 reorder_insns (from
, to
, after
)
1985 rtx from
, to
, after
;
1987 /* Splice this bunch out of where it is now. */
1988 if (PREV_INSN (from
))
1989 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
1991 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
1992 if (last_insn
== to
)
1993 last_insn
= PREV_INSN (from
);
1994 if (first_insn
== from
)
1995 first_insn
= NEXT_INSN (to
);
1997 /* Make the new neighbors point to it and it to them. */
1998 if (NEXT_INSN (after
))
1999 PREV_INSN (NEXT_INSN (after
)) = to
;
2001 NEXT_INSN (to
) = NEXT_INSN (after
);
2002 PREV_INSN (from
) = after
;
2003 NEXT_INSN (after
) = from
;
2004 if (after
== last_insn
)
2008 /* Return the line note insn preceding INSN. */
2011 find_line_note (insn
)
2014 if (no_line_numbers
)
2017 for (; insn
; insn
= PREV_INSN (insn
))
2018 if (GET_CODE (insn
) == NOTE
2019 && NOTE_LINE_NUMBER (insn
) >= 0)
2025 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2026 of the moved insns when debugging. This may insert a note between AFTER
2027 and FROM, and another one after TO. */
2030 reorder_insns_with_line_notes (from
, to
, after
)
2031 rtx from
, to
, after
;
2033 rtx from_line
= find_line_note (from
);
2034 rtx after_line
= find_line_note (after
);
2036 reorder_insns (from
, to
, after
);
2038 if (from_line
== after_line
)
2042 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
2043 NOTE_LINE_NUMBER (from_line
),
2046 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
2047 NOTE_LINE_NUMBER (after_line
),
2051 /* Emit an insn of given code and pattern
2052 at a specified place within the doubly-linked list. */
2054 /* Make an instruction with body PATTERN
2055 and output it before the instruction BEFORE. */
2058 emit_insn_before (pattern
, before
)
2059 register rtx pattern
, before
;
2061 register rtx insn
= before
;
2063 if (GET_CODE (pattern
) == SEQUENCE
)
2067 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2069 insn
= XVECEXP (pattern
, 0, i
);
2070 add_insn_after (insn
, PREV_INSN (before
));
2072 if (XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2073 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2077 insn
= make_insn_raw (pattern
);
2078 add_insn_after (insn
, PREV_INSN (before
));
2084 /* Make an instruction with body PATTERN and code JUMP_INSN
2085 and output it before the instruction BEFORE. */
2088 emit_jump_insn_before (pattern
, before
)
2089 register rtx pattern
, before
;
2093 if (GET_CODE (pattern
) == SEQUENCE
)
2094 insn
= emit_insn_before (pattern
, before
);
2097 insn
= make_jump_insn_raw (pattern
);
2098 add_insn_after (insn
, PREV_INSN (before
));
2104 /* Make an instruction with body PATTERN and code CALL_INSN
2105 and output it before the instruction BEFORE. */
2108 emit_call_insn_before (pattern
, before
)
2109 register rtx pattern
, before
;
2111 rtx insn
= emit_insn_before (pattern
, before
);
2112 PUT_CODE (insn
, CALL_INSN
);
2116 /* Make an insn of code BARRIER
2117 and output it before the insn AFTER. */
2120 emit_barrier_before (before
)
2121 register rtx before
;
2123 register rtx insn
= rtx_alloc (BARRIER
);
2125 INSN_UID (insn
) = cur_insn_uid
++;
2127 add_insn_after (insn
, PREV_INSN (before
));
2131 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2134 emit_note_before (subtype
, before
)
2138 register rtx note
= rtx_alloc (NOTE
);
2139 INSN_UID (note
) = cur_insn_uid
++;
2140 NOTE_SOURCE_FILE (note
) = 0;
2141 NOTE_LINE_NUMBER (note
) = subtype
;
2143 add_insn_after (note
, PREV_INSN (before
));
2147 /* Make an insn of code INSN with body PATTERN
2148 and output it after the insn AFTER. */
2151 emit_insn_after (pattern
, after
)
2152 register rtx pattern
, after
;
2154 register rtx insn
= after
;
2156 if (GET_CODE (pattern
) == SEQUENCE
)
2160 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2162 insn
= XVECEXP (pattern
, 0, i
);
2163 add_insn_after (insn
, after
);
2166 if (XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2167 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2171 insn
= make_insn_raw (pattern
);
2172 add_insn_after (insn
, after
);
2178 /* Similar to emit_insn_after, except that line notes are to be inserted so
2179 as to act as if this insn were at FROM. */
2182 emit_insn_after_with_line_notes (pattern
, after
, from
)
2183 rtx pattern
, after
, from
;
2185 rtx from_line
= find_line_note (from
);
2186 rtx after_line
= find_line_note (after
);
2187 rtx insn
= emit_insn_after (pattern
, after
);
2190 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
2191 NOTE_LINE_NUMBER (from_line
),
2195 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
2196 NOTE_LINE_NUMBER (after_line
),
2200 /* Make an insn of code JUMP_INSN with body PATTERN
2201 and output it after the insn AFTER. */
2204 emit_jump_insn_after (pattern
, after
)
2205 register rtx pattern
, after
;
2209 if (GET_CODE (pattern
) == SEQUENCE
)
2210 insn
= emit_insn_after (pattern
, after
);
2213 insn
= make_jump_insn_raw (pattern
);
2214 add_insn_after (insn
, after
);
2220 /* Make an insn of code BARRIER
2221 and output it after the insn AFTER. */
2224 emit_barrier_after (after
)
2227 register rtx insn
= rtx_alloc (BARRIER
);
2229 INSN_UID (insn
) = cur_insn_uid
++;
2231 add_insn_after (insn
, after
);
2235 /* Emit the label LABEL after the insn AFTER. */
2238 emit_label_after (label
, after
)
2241 /* This can be called twice for the same label
2242 as a result of the confusion that follows a syntax error!
2243 So make it harmless. */
2244 if (INSN_UID (label
) == 0)
2246 INSN_UID (label
) = cur_insn_uid
++;
2247 add_insn_after (label
, after
);
2253 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2256 emit_note_after (subtype
, after
)
2260 register rtx note
= rtx_alloc (NOTE
);
2261 INSN_UID (note
) = cur_insn_uid
++;
2262 NOTE_SOURCE_FILE (note
) = 0;
2263 NOTE_LINE_NUMBER (note
) = subtype
;
2264 add_insn_after (note
, after
);
2268 /* Emit a line note for FILE and LINE after the insn AFTER. */
2271 emit_line_note_after (file
, line
, after
)
2278 if (no_line_numbers
&& line
> 0)
2284 note
= rtx_alloc (NOTE
);
2285 INSN_UID (note
) = cur_insn_uid
++;
2286 NOTE_SOURCE_FILE (note
) = file
;
2287 NOTE_LINE_NUMBER (note
) = line
;
2288 add_insn_after (note
, after
);
2292 /* Make an insn of code INSN with pattern PATTERN
2293 and add it to the end of the doubly-linked list.
2294 If PATTERN is a SEQUENCE, take the elements of it
2295 and emit an insn for each element.
2297 Returns the last insn emitted. */
2303 rtx insn
= last_insn
;
2305 if (GET_CODE (pattern
) == SEQUENCE
)
2309 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2311 insn
= XVECEXP (pattern
, 0, i
);
2314 if (XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2315 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2319 insn
= make_insn_raw (pattern
);
2326 /* Emit the insns in a chain starting with INSN.
2327 Return the last insn emitted. */
2337 rtx next
= NEXT_INSN (insn
);
2346 /* Emit the insns in a chain starting with INSN and place them in front of
2347 the insn BEFORE. Return the last insn emitted. */
2350 emit_insns_before (insn
, before
)
2358 rtx next
= NEXT_INSN (insn
);
2359 add_insn_after (insn
, PREV_INSN (before
));
2367 /* Emit the insns in a chain starting with FIRST and place them in back of
2368 the insn AFTER. Return the last insn emitted. */
2371 emit_insns_after (first
, after
)
2376 register rtx after_after
;
2384 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
2387 after_after
= NEXT_INSN (after
);
2389 NEXT_INSN (after
) = first
;
2390 PREV_INSN (first
) = after
;
2391 NEXT_INSN (last
) = after_after
;
2393 PREV_INSN (after_after
) = last
;
2395 if (after
== last_insn
)
2400 /* Make an insn of code JUMP_INSN with pattern PATTERN
2401 and add it to the end of the doubly-linked list. */
2404 emit_jump_insn (pattern
)
2407 if (GET_CODE (pattern
) == SEQUENCE
)
2408 return emit_insn (pattern
);
2411 register rtx insn
= make_jump_insn_raw (pattern
);
2417 /* Make an insn of code CALL_INSN with pattern PATTERN
2418 and add it to the end of the doubly-linked list. */
2421 emit_call_insn (pattern
)
2424 if (GET_CODE (pattern
) == SEQUENCE
)
2425 return emit_insn (pattern
);
2428 register rtx insn
= make_insn_raw (pattern
);
2430 PUT_CODE (insn
, CALL_INSN
);
2435 /* Add the label LABEL to the end of the doubly-linked list. */
2441 /* This can be called twice for the same label
2442 as a result of the confusion that follows a syntax error!
2443 So make it harmless. */
2444 if (INSN_UID (label
) == 0)
2446 INSN_UID (label
) = cur_insn_uid
++;
2452 /* Make an insn of code BARRIER
2453 and add it to the end of the doubly-linked list. */
2458 register rtx barrier
= rtx_alloc (BARRIER
);
2459 INSN_UID (barrier
) = cur_insn_uid
++;
2464 /* Make an insn of code NOTE
2465 with data-fields specified by FILE and LINE
2466 and add it to the end of the doubly-linked list,
2467 but only if line-numbers are desired for debugging info. */
2470 emit_line_note (file
, line
)
2474 emit_filename
= file
;
2478 if (no_line_numbers
)
2482 return emit_note (file
, line
);
2485 /* Make an insn of code NOTE
2486 with data-fields specified by FILE and LINE
2487 and add it to the end of the doubly-linked list.
2488 If it is a line-number NOTE, omit it if it matches the previous one. */
2491 emit_note (file
, line
)
2499 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
2500 && line
== last_linenum
)
2502 last_filename
= file
;
2503 last_linenum
= line
;
2506 if (no_line_numbers
&& line
> 0)
2512 note
= rtx_alloc (NOTE
);
2513 INSN_UID (note
) = cur_insn_uid
++;
2514 NOTE_SOURCE_FILE (note
) = file
;
2515 NOTE_LINE_NUMBER (note
) = line
;
2520 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
2523 emit_line_note_force (file
, line
)
2528 return emit_line_note (file
, line
);
2531 /* Cause next statement to emit a line note even if the line number
2532 has not changed. This is used at the beginning of a function. */
2535 force_next_line_note ()
2540 /* Return an indication of which type of insn should have X as a body.
2541 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
2547 if (GET_CODE (x
) == CODE_LABEL
)
2549 if (GET_CODE (x
) == CALL
)
2551 if (GET_CODE (x
) == RETURN
)
2553 if (GET_CODE (x
) == SET
)
2555 if (SET_DEST (x
) == pc_rtx
)
2557 else if (GET_CODE (SET_SRC (x
)) == CALL
)
2562 if (GET_CODE (x
) == PARALLEL
)
2565 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
2566 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
2568 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
2569 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
2571 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
2572 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
2578 /* Emit the rtl pattern X as an appropriate kind of insn.
2579 If X is a label, it is simply added into the insn chain. */
2585 enum rtx_code code
= classify_insn (x
);
2587 if (code
== CODE_LABEL
)
2588 return emit_label (x
);
2589 else if (code
== INSN
)
2590 return emit_insn (x
);
2591 else if (code
== JUMP_INSN
)
2593 register rtx insn
= emit_jump_insn (x
);
2594 if (simplejump_p (insn
) || GET_CODE (x
) == RETURN
)
2595 return emit_barrier ();
2598 else if (code
== CALL_INSN
)
2599 return emit_call_insn (x
);
2604 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
2609 struct sequence_stack
*tem
;
2611 if (sequence_element_free_list
)
2613 /* Reuse a previously-saved struct sequence_stack. */
2614 tem
= sequence_element_free_list
;
2615 sequence_element_free_list
= tem
->next
;
2618 tem
= (struct sequence_stack
*) permalloc (sizeof (struct sequence_stack
));
2620 tem
->next
= sequence_stack
;
2621 tem
->first
= first_insn
;
2622 tem
->last
= last_insn
;
2624 sequence_stack
= tem
;
2630 /* Set up the insn chain starting with FIRST
2631 as the current sequence, saving the previously current one. */
2634 push_to_sequence (first
)
2641 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
2647 /* Set up the outer-level insn chain
2648 as the current sequence, saving the previously current one. */
2651 push_topmost_sequence ()
2653 struct sequence_stack
*stack
, *top
;
2657 for (stack
= sequence_stack
; stack
; stack
= stack
->next
)
2660 first_insn
= top
->first
;
2661 last_insn
= top
->last
;
2664 /* After emitting to the outer-level insn chain, update the outer-level
2665 insn chain, and restore the previous saved state. */
2668 pop_topmost_sequence ()
2670 struct sequence_stack
*stack
, *top
;
2672 for (stack
= sequence_stack
; stack
; stack
= stack
->next
)
2675 top
->first
= first_insn
;
2676 top
->last
= last_insn
;
2681 /* After emitting to a sequence, restore previous saved state.
2683 To get the contents of the sequence just made,
2684 you must call `gen_sequence' *before* calling here. */
2689 struct sequence_stack
*tem
= sequence_stack
;
2691 first_insn
= tem
->first
;
2692 last_insn
= tem
->last
;
2693 sequence_stack
= tem
->next
;
2695 tem
->next
= sequence_element_free_list
;
2696 sequence_element_free_list
= tem
;
2699 /* Return 1 if currently emitting into a sequence. */
2704 return sequence_stack
!= 0;
2707 /* Generate a SEQUENCE rtx containing the insns already emitted
2708 to the current sequence.
2710 This is how the gen_... function from a DEFINE_EXPAND
2711 constructs the SEQUENCE that it returns. */
2722 /* Count the insns in the chain. */
2724 for (tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
))
2727 /* If only one insn, return its pattern rather than a SEQUENCE.
2728 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
2729 the case of an empty list.) */
2731 && (GET_CODE (first_insn
) == INSN
2732 || GET_CODE (first_insn
) == JUMP_INSN
2733 || GET_CODE (first_insn
) == CALL_INSN
))
2734 return PATTERN (first_insn
);
2736 /* Put them in a vector. See if we already have a SEQUENCE of the
2737 appropriate length around. */
2738 if (len
< SEQUENCE_RESULT_SIZE
&& (result
= sequence_result
[len
]) != 0)
2739 sequence_result
[len
] = 0;
2742 /* Ensure that this rtl goes in saveable_obstack, since we may be
2744 push_obstacks_nochange ();
2745 rtl_in_saveable_obstack ();
2746 result
= gen_rtx (SEQUENCE
, VOIDmode
, rtvec_alloc (len
));
2750 for (i
= 0, tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
), i
++)
2751 XVECEXP (result
, 0, i
) = tem
;
2756 /* Set up regno_reg_rtx, reg_rtx_no and regno_pointer_flag
2757 according to the chain of insns starting with FIRST.
2759 Also set cur_insn_uid to exceed the largest uid in that chain.
2761 This is used when an inline function's rtl is saved
2762 and passed to rest_of_compilation later. */
2764 static void restore_reg_data_1 ();
2767 restore_reg_data (first
)
2772 register int max_uid
= 0;
2774 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2776 if (INSN_UID (insn
) >= max_uid
)
2777 max_uid
= INSN_UID (insn
);
2779 switch (GET_CODE (insn
))
2789 restore_reg_data_1 (PATTERN (insn
));
2794 /* Don't duplicate the uids already in use. */
2795 cur_insn_uid
= max_uid
+ 1;
2797 /* If any regs are missing, make them up.
2799 ??? word_mode is not necessarily the right mode. Most likely these REGs
2800 are never used. At some point this should be checked. */
2802 for (i
= FIRST_PSEUDO_REGISTER
; i
< reg_rtx_no
; i
++)
2803 if (regno_reg_rtx
[i
] == 0)
2804 regno_reg_rtx
[i
] = gen_rtx (REG
, word_mode
, i
);
2808 restore_reg_data_1 (orig
)
2811 register rtx x
= orig
;
2813 register enum rtx_code code
;
2814 register char *format_ptr
;
2816 code
= GET_CODE (x
);
2831 if (REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
2833 /* Make sure regno_pointer_flag and regno_reg_rtx are large
2834 enough to have an element for this pseudo reg number. */
2835 if (REGNO (x
) >= reg_rtx_no
)
2837 reg_rtx_no
= REGNO (x
);
2839 if (reg_rtx_no
>= regno_pointer_flag_length
)
2841 int newlen
= MAX (regno_pointer_flag_length
* 2,
2844 char *new = (char *) oballoc (newlen
);
2845 bzero (new, newlen
);
2846 bcopy (regno_pointer_flag
, new, regno_pointer_flag_length
);
2848 new1
= (rtx
*) oballoc (newlen
* sizeof (rtx
));
2849 bzero (new1
, newlen
* sizeof (rtx
));
2850 bcopy (regno_reg_rtx
, new1
, regno_pointer_flag_length
* sizeof (rtx
));
2852 regno_pointer_flag
= new;
2853 regno_reg_rtx
= new1
;
2854 regno_pointer_flag_length
= newlen
;
2858 regno_reg_rtx
[REGNO (x
)] = x
;
2863 if (GET_CODE (XEXP (x
, 0)) == REG
)
2864 mark_reg_pointer (XEXP (x
, 0));
2865 restore_reg_data_1 (XEXP (x
, 0));
2869 /* Now scan the subexpressions recursively. */
2871 format_ptr
= GET_RTX_FORMAT (code
);
2873 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2875 switch (*format_ptr
++)
2878 restore_reg_data_1 (XEXP (x
, i
));
2882 if (XVEC (x
, i
) != NULL
)
2886 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2887 restore_reg_data_1 (XVECEXP (x
, i
, j
));
2894 /* Initialize data structures and variables in this file
2895 before generating rtl for each function. */
2905 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
2908 first_label_num
= label_num
;
2910 sequence_stack
= NULL
;
2912 /* Clear the start_sequence/gen_sequence cache. */
2913 sequence_element_free_list
= 0;
2914 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
2915 sequence_result
[i
] = 0;
2917 /* Init the tables that describe all the pseudo regs. */
2919 regno_pointer_flag_length
= LAST_VIRTUAL_REGISTER
+ 101;
2922 = (char *) oballoc (regno_pointer_flag_length
);
2923 bzero (regno_pointer_flag
, regno_pointer_flag_length
);
2926 = (rtx
*) oballoc (regno_pointer_flag_length
* sizeof (rtx
));
2927 bzero (regno_reg_rtx
, regno_pointer_flag_length
* sizeof (rtx
));
2929 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
2930 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
2931 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
2932 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
2933 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
2935 /* Indicate that the virtual registers and stack locations are
2937 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM
) = 1;
2938 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM
) = 1;
2939 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM
) = 1;
2941 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM
) = 1;
2942 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM
) = 1;
2943 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM
) = 1;
2944 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM
) = 1;
2946 #ifdef INIT_EXPANDERS
2951 /* Create some permanent unique rtl objects shared between all functions.
2952 LINE_NUMBERS is nonzero if line numbers are to be generated. */
2955 init_emit_once (line_numbers
)
2959 enum machine_mode mode
;
2961 no_line_numbers
= ! line_numbers
;
2963 sequence_stack
= NULL
;
2965 /* Create the unique rtx's for certain rtx codes and operand values. */
2967 pc_rtx
= gen_rtx (PC
, VOIDmode
);
2968 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
2970 /* Don't use gen_rtx here since gen_rtx in this case
2971 tries to use these variables. */
2972 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
2974 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] = rtx_alloc (CONST_INT
);
2975 PUT_MODE (const_int_rtx
[i
+ MAX_SAVED_CONST_INT
], VOIDmode
);
2976 INTVAL (const_int_rtx
[i
+ MAX_SAVED_CONST_INT
]) = i
;
2979 /* These four calls obtain some of the rtx expressions made above. */
2980 const0_rtx
= GEN_INT (0);
2981 const1_rtx
= GEN_INT (1);
2982 const2_rtx
= GEN_INT (2);
2983 constm1_rtx
= GEN_INT (-1);
2985 /* This will usually be one of the above constants, but may be a new rtx. */
2986 const_true_rtx
= GEN_INT (STORE_FLAG_VALUE
);
2988 dconst0
= REAL_VALUE_ATOF ("0", DFmode
);
2989 dconst1
= REAL_VALUE_ATOF ("1", DFmode
);
2990 dconst2
= REAL_VALUE_ATOF ("2", DFmode
);
2991 dconstm1
= REAL_VALUE_ATOF ("-1", DFmode
);
2993 for (i
= 0; i
<= 2; i
++)
2995 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
2996 mode
= GET_MODE_WIDER_MODE (mode
))
2998 rtx tem
= rtx_alloc (CONST_DOUBLE
);
2999 union real_extract u
;
3001 bzero (&u
, sizeof u
); /* Zero any holes in a structure. */
3002 u
.d
= i
== 0 ? dconst0
: i
== 1 ? dconst1
: dconst2
;
3004 bcopy (&u
, &CONST_DOUBLE_LOW (tem
), sizeof u
);
3005 CONST_DOUBLE_MEM (tem
) = cc0_rtx
;
3006 PUT_MODE (tem
, mode
);
3008 const_tiny_rtx
[i
][(int) mode
] = tem
;
3011 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
3013 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
3014 mode
= GET_MODE_WIDER_MODE (mode
))
3015 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
3017 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
3019 mode
= GET_MODE_WIDER_MODE (mode
))
3020 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
3023 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_CC
); mode
!= VOIDmode
;
3024 mode
= GET_MODE_WIDER_MODE (mode
))
3025 const_tiny_rtx
[0][(int) mode
] = const0_rtx
;
3027 stack_pointer_rtx
= gen_rtx (REG
, Pmode
, STACK_POINTER_REGNUM
);
3028 frame_pointer_rtx
= gen_rtx (REG
, Pmode
, FRAME_POINTER_REGNUM
);
3030 if (FRAME_POINTER_REGNUM
== ARG_POINTER_REGNUM
)
3031 arg_pointer_rtx
= frame_pointer_rtx
;
3032 else if (STACK_POINTER_REGNUM
== ARG_POINTER_REGNUM
)
3033 arg_pointer_rtx
= stack_pointer_rtx
;
3035 arg_pointer_rtx
= gen_rtx (REG
, Pmode
, ARG_POINTER_REGNUM
);
3037 /* Create the virtual registers. Do so here since the following objects
3038 might reference them. */
3040 virtual_incoming_args_rtx
= gen_rtx (REG
, Pmode
,
3041 VIRTUAL_INCOMING_ARGS_REGNUM
);
3042 virtual_stack_vars_rtx
= gen_rtx (REG
, Pmode
,
3043 VIRTUAL_STACK_VARS_REGNUM
);
3044 virtual_stack_dynamic_rtx
= gen_rtx (REG
, Pmode
,
3045 VIRTUAL_STACK_DYNAMIC_REGNUM
);
3046 virtual_outgoing_args_rtx
= gen_rtx (REG
, Pmode
,
3047 VIRTUAL_OUTGOING_ARGS_REGNUM
);
3050 struct_value_rtx
= STRUCT_VALUE
;
3052 struct_value_rtx
= gen_rtx (REG
, Pmode
, STRUCT_VALUE_REGNUM
);
3055 #ifdef STRUCT_VALUE_INCOMING
3056 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
3058 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3059 struct_value_incoming_rtx
3060 = gen_rtx (REG
, Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
3062 struct_value_incoming_rtx
= struct_value_rtx
;
3066 #ifdef STATIC_CHAIN_REGNUM
3067 static_chain_rtx
= gen_rtx (REG
, Pmode
, STATIC_CHAIN_REGNUM
);
3069 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3070 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
3071 static_chain_incoming_rtx
= gen_rtx (REG
, Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
3074 static_chain_incoming_rtx
= static_chain_rtx
;
3078 static_chain_rtx
= STATIC_CHAIN
;
3080 #ifdef STATIC_CHAIN_INCOMING
3081 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
3083 static_chain_incoming_rtx
= static_chain_rtx
;
3087 #ifdef PIC_OFFSET_TABLE_REGNUM
3088 pic_offset_table_rtx
= gen_rtx (REG
, Pmode
, PIC_OFFSET_TABLE_REGNUM
);