1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
46 #include "hard-reg-set.h"
47 #include "insn-config.h"
53 /* Commonly used modes. */
55 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
56 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
57 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
58 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
61 /* This is *not* reset after each function. It gives each CODE_LABEL
62 in the entire compilation a unique label number. */
64 static int label_num
= 1;
66 /* Highest label number in current function.
67 Zero means use the value of label_num instead.
68 This is nonzero only when belatedly compiling an inline function. */
70 static int last_label_num
;
72 /* Value label_num had when set_new_first_and_last_label_number was called.
73 If label_num has not changed since then, last_label_num is valid. */
75 static int base_label_num
;
77 /* Nonzero means do not generate NOTEs for source line numbers. */
79 static int no_line_numbers
;
81 /* Commonly used rtx's, so that we only need space for one copy.
82 These are initialized once for the entire compilation.
83 All of these except perhaps the floating-point CONST_DOUBLEs
84 are unique; no other rtx-object will be equal to any of these. */
86 /* Avoid warnings by initializing the `fld' field. Since its a union,
87 bypass problems with KNR compilers by only doing so when __GNUC__. */
94 struct _global_rtl global_rtl
=
96 {PC
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* pc_rtx */
97 {CC0
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* cc0_rtx */
98 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* stack_pointer_rtx */
99 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* frame_pointer_rtx */
100 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* hard_frame_pointer_rtx */
101 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* arg_pointer_rtx */
102 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* virtual_incoming_args_rtx */
103 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* virtual_stack_vars_rtx */
104 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* virtual_stack_dynamic_rtx */
105 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* virtual_outgoing_args_rtx */
106 {REG
, VOIDmode
, 0, 0, 0, 0, 0, 0, 0, 0 FLDI
}, /* virtual_cfa_rtx */
109 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
110 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
111 record a copy of const[012]_rtx. */
113 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
117 REAL_VALUE_TYPE dconst0
;
118 REAL_VALUE_TYPE dconst1
;
119 REAL_VALUE_TYPE dconst2
;
120 REAL_VALUE_TYPE dconstm1
;
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
141 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
142 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
143 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
144 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
146 /* This is used to implement __builtin_return_address for some machines.
147 See for instance the MIPS port. */
148 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
150 /* We make one copy of (const_int C) where C is in
151 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
152 to save space during the compilation and simplify comparisons of
155 struct rtx_def const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
157 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
158 shortly thrown away. We use two mechanisms to prevent this waste:
160 First, we keep a list of the expressions used to represent the sequence
161 stack in sequence_element_free_list.
163 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
164 rtvec for use by gen_sequence. One entry for each size is sufficient
165 because most cases are calls to gen_sequence followed by immediately
166 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
167 destructive on the insn in it anyway and hence can't be redone.
169 We do not bother to save this cached data over nested function calls.
170 Instead, we just reinitialize them. */
172 #define SEQUENCE_RESULT_SIZE 5
174 static struct sequence_stack
*sequence_element_free_list
;
175 static rtx sequence_result
[SEQUENCE_RESULT_SIZE
];
177 /* During RTL generation, we also keep a list of free INSN rtl codes. */
178 static rtx free_insn
;
180 #define first_insn (current_function->emit->x_first_insn)
181 #define last_insn (current_function->emit->x_last_insn)
182 #define cur_insn_uid (current_function->emit->x_cur_insn_uid)
183 #define last_linenum (current_function->emit->x_last_linenum)
184 #define last_filename (current_function->emit->x_last_filename)
185 #define first_label_num (current_function->emit->x_first_label_num)
187 static rtx make_jump_insn_raw
PROTO((rtx
));
188 static rtx make_call_insn_raw
PROTO((rtx
));
189 static rtx find_line_note
PROTO((rtx
));
192 gen_rtx_CONST_INT (mode
, arg
)
193 enum machine_mode mode
;
196 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
197 return &const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
199 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
200 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
201 return const_true_rtx
;
204 return gen_rtx_raw_CONST_INT (mode
, arg
);
207 /* CONST_DOUBLEs needs special handling because its length is known
210 gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
, arg2
)
211 enum machine_mode mode
;
213 HOST_WIDE_INT arg1
, arg2
;
215 rtx r
= rtx_alloc (CONST_DOUBLE
);
220 XEXP (r
, 1) = NULL_RTX
;
224 for (i
= GET_RTX_LENGTH (CONST_DOUBLE
) - 1; i
> 3; --i
)
231 gen_rtx_REG (mode
, regno
)
232 enum machine_mode mode
;
235 /* In case the MD file explicitly references the frame pointer, have
236 all such references point to the same frame pointer. This is
237 used during frame pointer elimination to distinguish the explicit
238 references to these registers from pseudos that happened to be
241 If we have eliminated the frame pointer or arg pointer, we will
242 be using it as a normal register, for example as a spill
243 register. In such cases, we might be accessing it in a mode that
244 is not Pmode and therefore cannot use the pre-allocated rtx.
246 Also don't do this when we are making new REGs in reload, since
247 we don't want to get confused with the real pointers. */
249 if (mode
== Pmode
&& !reload_in_progress
)
251 if (regno
== FRAME_POINTER_REGNUM
)
252 return frame_pointer_rtx
;
253 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
254 if (regno
== HARD_FRAME_POINTER_REGNUM
)
255 return hard_frame_pointer_rtx
;
257 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
258 if (regno
== ARG_POINTER_REGNUM
)
259 return arg_pointer_rtx
;
261 #ifdef RETURN_ADDRESS_POINTER_REGNUM
262 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
263 return return_address_pointer_rtx
;
265 if (regno
== STACK_POINTER_REGNUM
)
266 return stack_pointer_rtx
;
269 return gen_rtx_raw_REG (mode
, regno
);
273 gen_rtx_MEM (mode
, addr
)
274 enum machine_mode mode
;
277 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
279 /* This field is not cleared by the mere allocation of the rtx, so
281 MEM_ALIAS_SET (rt
) = 0;
286 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
288 ** This routine generates an RTX of the size specified by
289 ** <code>, which is an RTX code. The RTX structure is initialized
290 ** from the arguments <element1> through <elementn>, which are
291 ** interpreted according to the specific RTX type's format. The
292 ** special machine mode associated with the rtx (if any) is specified
295 ** gen_rtx can be invoked in a way which resembles the lisp-like
296 ** rtx it will generate. For example, the following rtx structure:
298 ** (plus:QI (mem:QI (reg:SI 1))
299 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
301 ** ...would be generated by the following C code:
303 ** gen_rtx (PLUS, QImode,
304 ** gen_rtx (MEM, QImode,
305 ** gen_rtx (REG, SImode, 1)),
306 ** gen_rtx (MEM, QImode,
307 ** gen_rtx (PLUS, SImode,
308 ** gen_rtx (REG, SImode, 2),
309 ** gen_rtx (REG, SImode, 3)))),
314 gen_rtx
VPROTO((enum rtx_code code
, enum machine_mode mode
, ...))
316 #ifndef ANSI_PROTOTYPES
318 enum machine_mode mode
;
321 register int i
; /* Array indices... */
322 register const char *fmt
; /* Current rtx's format... */
323 register rtx rt_val
; /* RTX to return to caller... */
327 #ifndef ANSI_PROTOTYPES
328 code
= va_arg (p
, enum rtx_code
);
329 mode
= va_arg (p
, enum machine_mode
);
335 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
340 rtx arg0
= va_arg (p
, rtx
);
341 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
342 HOST_WIDE_INT arg2
= va_arg (p
, HOST_WIDE_INT
);
343 rt_val
= gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
, arg2
);
348 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
352 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
356 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
357 rt_val
->mode
= mode
; /* Store the machine mode... */
359 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
360 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
364 case '0': /* Unused field. */
367 case 'i': /* An integer? */
368 XINT (rt_val
, i
) = va_arg (p
, int);
371 case 'w': /* A wide integer? */
372 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
375 case 's': /* A string? */
376 XSTR (rt_val
, i
) = va_arg (p
, char *);
379 case 'e': /* An expression? */
380 case 'u': /* An insn? Same except when printing. */
381 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
384 case 'E': /* An RTX vector? */
385 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
388 case 'b': /* A bitmap? */
389 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
392 case 't': /* A tree? */
393 XTREE (rt_val
, i
) = va_arg (p
, tree
);
407 /* gen_rtvec (n, [rt1, ..., rtn])
409 ** This routine creates an rtvec and stores within it the
410 ** pointers to rtx's which are its arguments.
415 gen_rtvec
VPROTO((int n
, ...))
417 #ifndef ANSI_PROTOTYPES
426 #ifndef ANSI_PROTOTYPES
431 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
433 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
435 for (i
= 0; i
< n
; i
++)
436 vector
[i
] = va_arg (p
, rtx
);
439 return gen_rtvec_v (n
, vector
);
443 gen_rtvec_v (n
, argp
)
448 register rtvec rt_val
;
451 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
453 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
455 for (i
= 0; i
< n
; i
++)
456 rt_val
->elem
[i
] = *argp
++;
462 /* Generate a REG rtx for a new pseudo register of mode MODE.
463 This pseudo is assigned the next sequential register number. */
467 enum machine_mode mode
;
469 struct function
*f
= current_function
;
472 /* Don't let anything called after initial flow analysis create new
477 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
478 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
)
480 /* For complex modes, don't make a single pseudo.
481 Instead, make a CONCAT of two pseudos.
482 This allows noncontiguous allocation of the real and imaginary parts,
483 which makes much better code. Besides, allocating DCmode
484 pseudos overstrains reload on some machines like the 386. */
485 rtx realpart
, imagpart
;
486 int size
= GET_MODE_UNIT_SIZE (mode
);
487 enum machine_mode partmode
488 = mode_for_size (size
* BITS_PER_UNIT
,
489 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
490 ? MODE_FLOAT
: MODE_INT
),
493 realpart
= gen_reg_rtx (partmode
);
494 imagpart
= gen_reg_rtx (partmode
);
495 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
498 /* Make sure regno_pointer_flag and regno_reg_rtx are large
499 enough to have an element for this pseudo reg number. */
501 if (reg_rtx_no
== f
->emit
->regno_pointer_flag_length
)
503 int old_size
= f
->emit
->regno_pointer_flag_length
;
505 char *new = (char *) savealloc (old_size
* 2);
506 memcpy (new, f
->emit
->regno_pointer_flag
, old_size
);
507 memset (new + old_size
, 0, old_size
);
508 f
->emit
->regno_pointer_flag
= new;
510 new = (char *) savealloc (old_size
* 2);
511 memcpy (new, f
->emit
->regno_pointer_align
, old_size
);
512 memset (new + old_size
, 0, old_size
);
513 f
->emit
->regno_pointer_align
= new;
515 new1
= (rtx
*) savealloc (old_size
* 2 * sizeof (rtx
));
516 memcpy (new1
, regno_reg_rtx
, old_size
* sizeof (rtx
));
517 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
518 regno_reg_rtx
= new1
;
520 f
->emit
->regno_pointer_flag_length
= old_size
* 2;
523 val
= gen_rtx_raw_REG (mode
, reg_rtx_no
);
524 regno_reg_rtx
[reg_rtx_no
++] = val
;
528 /* Identify REG (which may be a CONCAT) as a user register. */
534 if (GET_CODE (reg
) == CONCAT
)
536 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
537 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
539 else if (GET_CODE (reg
) == REG
)
540 REG_USERVAR_P (reg
) = 1;
545 /* Identify REG as a probable pointer register and show its alignment
546 as ALIGN, if nonzero. */
549 mark_reg_pointer (reg
, align
)
553 if (! REGNO_POINTER_FLAG (REGNO (reg
)))
555 REGNO_POINTER_FLAG (REGNO (reg
)) = 1;
558 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
560 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
561 /* We can no-longer be sure just how aligned this pointer is */
562 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
565 /* Return 1 plus largest pseudo reg number used in the current function. */
573 /* Return 1 + the largest label number used so far in the current function. */
578 if (last_label_num
&& label_num
== base_label_num
)
579 return last_label_num
;
583 /* Return first label number used in this function (if any were used). */
586 get_first_label_num ()
588 return first_label_num
;
591 /* Return a value representing some low-order bits of X, where the number
592 of low-order bits is given by MODE. Note that no conversion is done
593 between floating-point and fixed-point values, rather, the bit
594 representation is returned.
596 This function handles the cases in common between gen_lowpart, below,
597 and two variants in cse.c and combine.c. These are the cases that can
598 be safely handled at all points in the compilation.
600 If this is not a case we can handle, return 0. */
603 gen_lowpart_common (mode
, x
)
604 enum machine_mode mode
;
609 if (GET_MODE (x
) == mode
)
612 /* MODE must occupy no more words than the mode of X. */
613 if (GET_MODE (x
) != VOIDmode
614 && ((GET_MODE_SIZE (mode
) + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
615 > ((GET_MODE_SIZE (GET_MODE (x
)) + (UNITS_PER_WORD
- 1))
619 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
)
620 word
= ((GET_MODE_SIZE (GET_MODE (x
))
621 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
))
624 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
625 && (GET_MODE_CLASS (mode
) == MODE_INT
626 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
628 /* If we are getting the low-order part of something that has been
629 sign- or zero-extended, we can either just use the object being
630 extended or make a narrower extension. If we want an even smaller
631 piece than the size of the object being extended, call ourselves
634 This case is used mostly by combine and cse. */
636 if (GET_MODE (XEXP (x
, 0)) == mode
)
638 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
639 return gen_lowpart_common (mode
, XEXP (x
, 0));
640 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
641 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
643 else if (GET_CODE (x
) == SUBREG
644 && (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
645 || GET_MODE_SIZE (mode
) == GET_MODE_UNIT_SIZE (GET_MODE (x
))))
646 return (GET_MODE (SUBREG_REG (x
)) == mode
&& SUBREG_WORD (x
) == 0
648 : gen_rtx_SUBREG (mode
, SUBREG_REG (x
), SUBREG_WORD (x
) + word
));
649 else if (GET_CODE (x
) == REG
)
651 /* Let the backend decide how many registers to skip. This is needed
652 in particular for Sparc64 where fp regs are smaller than a word. */
653 /* ??? Note that subregs are now ambiguous, in that those against
654 pseudos are sized by the Word Size, while those against hard
655 regs are sized by the underlying register size. Better would be
656 to always interpret the subreg offset parameter as bytes or bits. */
658 if (WORDS_BIG_ENDIAN
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
659 word
= (HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
))
660 - HARD_REGNO_NREGS (REGNO (x
), mode
));
662 /* If the register is not valid for MODE, return 0. If we don't
663 do this, there is no way to fix up the resulting REG later.
664 But we do do this if the current REG is not valid for its
665 mode. This latter is a kludge, but is required due to the
666 way that parameters are passed on some machines, most
668 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
669 && ! HARD_REGNO_MODE_OK (REGNO (x
) + word
, mode
)
670 && HARD_REGNO_MODE_OK (REGNO (x
), GET_MODE (x
)))
672 else if (REGNO (x
) < FIRST_PSEUDO_REGISTER
673 /* integrate.c can't handle parts of a return value register. */
674 && (! REG_FUNCTION_VALUE_P (x
)
675 || ! rtx_equal_function_value_matters
)
676 #ifdef CLASS_CANNOT_CHANGE_SIZE
677 && ! (GET_MODE_SIZE (mode
) != GET_MODE_SIZE (GET_MODE (x
))
678 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_COMPLEX_INT
679 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_COMPLEX_FLOAT
680 && (TEST_HARD_REG_BIT
681 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
684 /* We want to keep the stack, frame, and arg pointers
686 && x
!= frame_pointer_rtx
687 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
688 && x
!= arg_pointer_rtx
690 && x
!= stack_pointer_rtx
)
691 return gen_rtx_REG (mode
, REGNO (x
) + word
);
693 return gen_rtx_SUBREG (mode
, x
, word
);
695 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
696 from the low-order part of the constant. */
697 else if ((GET_MODE_CLASS (mode
) == MODE_INT
698 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
699 && GET_MODE (x
) == VOIDmode
700 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
702 /* If MODE is twice the host word size, X is already the desired
703 representation. Otherwise, if MODE is wider than a word, we can't
704 do this. If MODE is exactly a word, return just one CONST_INT.
705 If MODE is smaller than a word, clear the bits that don't belong
706 in our mode, unless they and our sign bit are all one. So we get
707 either a reasonable negative value or a reasonable unsigned value
710 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
712 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
714 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
715 return (GET_CODE (x
) == CONST_INT
? x
716 : GEN_INT (CONST_DOUBLE_LOW (x
)));
719 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
720 int width
= GET_MODE_BITSIZE (mode
);
721 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
722 : CONST_DOUBLE_LOW (x
));
724 /* Sign extend to HOST_WIDE_INT. */
725 val
= val
<< (HOST_BITS_PER_WIDE_INT
- width
) >> (HOST_BITS_PER_WIDE_INT
- width
);
727 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
732 /* If X is an integral constant but we want it in floating-point, it
733 must be the case that we have a union of an integer and a floating-point
734 value. If the machine-parameters allow it, simulate that union here
735 and return the result. The two-word and single-word cases are
738 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
739 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
740 || flag_pretend_float
)
741 && GET_MODE_CLASS (mode
) == MODE_FLOAT
742 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
743 && GET_CODE (x
) == CONST_INT
744 && sizeof (float) * HOST_BITS_PER_CHAR
== HOST_BITS_PER_WIDE_INT
)
745 #ifdef REAL_ARITHMETIC
751 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
752 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
756 union {HOST_WIDE_INT i
; float d
; } u
;
759 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
762 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
763 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
764 || flag_pretend_float
)
765 && GET_MODE_CLASS (mode
) == MODE_FLOAT
766 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
767 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
768 && GET_MODE (x
) == VOIDmode
769 && (sizeof (double) * HOST_BITS_PER_CHAR
770 == 2 * HOST_BITS_PER_WIDE_INT
))
771 #ifdef REAL_ARITHMETIC
775 HOST_WIDE_INT low
, high
;
777 if (GET_CODE (x
) == CONST_INT
)
778 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
780 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
782 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
784 if (WORDS_BIG_ENDIAN
)
785 i
[0] = high
, i
[1] = low
;
787 i
[0] = low
, i
[1] = high
;
789 r
= REAL_VALUE_FROM_TARGET_DOUBLE (i
);
790 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
794 union {HOST_WIDE_INT i
[2]; double d
; } u
;
795 HOST_WIDE_INT low
, high
;
797 if (GET_CODE (x
) == CONST_INT
)
798 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
800 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
802 #ifdef HOST_WORDS_BIG_ENDIAN
803 u
.i
[0] = high
, u
.i
[1] = low
;
805 u
.i
[0] = low
, u
.i
[1] = high
;
808 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
812 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
813 same as sizeof (double) or when sizeof (float) is larger than the
814 size of a word on the target machine. */
815 #ifdef REAL_ARITHMETIC
816 else if (mode
== SFmode
&& GET_CODE (x
) == CONST_INT
)
822 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
823 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
825 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
826 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
827 || flag_pretend_float
)
828 && GET_MODE_CLASS (mode
) == MODE_FLOAT
829 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
830 && GET_CODE (x
) == CONST_INT
831 && (sizeof (double) * HOST_BITS_PER_CHAR
832 == HOST_BITS_PER_WIDE_INT
))
838 r
= REAL_VALUE_FROM_TARGET_DOUBLE (&i
);
839 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
843 /* Similarly, if this is converting a floating-point value into a
844 single-word integer. Only do this is the host and target parameters are
847 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
848 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
849 || flag_pretend_float
)
850 && (GET_MODE_CLASS (mode
) == MODE_INT
851 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
852 && GET_CODE (x
) == CONST_DOUBLE
853 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
854 && GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
)
855 return operand_subword (x
, word
, 0, GET_MODE (x
));
857 /* Similarly, if this is converting a floating-point value into a
858 two-word integer, we can do this one word at a time and make an
859 integer. Only do this is the host and target parameters are
862 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
863 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
864 || flag_pretend_float
)
865 && (GET_MODE_CLASS (mode
) == MODE_INT
866 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
867 && GET_CODE (x
) == CONST_DOUBLE
868 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
869 && GET_MODE_BITSIZE (mode
) == 2 * BITS_PER_WORD
)
872 = operand_subword (x
, word
+ WORDS_BIG_ENDIAN
, 0, GET_MODE (x
));
874 = operand_subword (x
, word
+ ! WORDS_BIG_ENDIAN
, 0, GET_MODE (x
));
876 if (lowpart
&& GET_CODE (lowpart
) == CONST_INT
877 && highpart
&& GET_CODE (highpart
) == CONST_INT
)
878 return immed_double_const (INTVAL (lowpart
), INTVAL (highpart
), mode
);
881 /* Otherwise, we can't do this. */
885 /* Return the real part (which has mode MODE) of a complex value X.
886 This always comes at the low address in memory. */
889 gen_realpart (mode
, x
)
890 enum machine_mode mode
;
893 if (GET_CODE (x
) == CONCAT
&& GET_MODE (XEXP (x
, 0)) == mode
)
895 else if (WORDS_BIG_ENDIAN
896 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
898 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
899 fatal ("Unable to access real part of complex value in a hard register on this target");
900 else if (WORDS_BIG_ENDIAN
)
901 return gen_highpart (mode
, x
);
903 return gen_lowpart (mode
, x
);
906 /* Return the imaginary part (which has mode MODE) of a complex value X.
907 This always comes at the high address in memory. */
910 gen_imagpart (mode
, x
)
911 enum machine_mode mode
;
914 if (GET_CODE (x
) == CONCAT
&& GET_MODE (XEXP (x
, 0)) == mode
)
916 else if (WORDS_BIG_ENDIAN
)
917 return gen_lowpart (mode
, x
);
918 else if (!WORDS_BIG_ENDIAN
919 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
921 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
922 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
924 return gen_highpart (mode
, x
);
927 /* Return 1 iff X, assumed to be a SUBREG,
928 refers to the real part of the complex value in its containing reg.
929 Complex values are always stored with the real part in the first word,
930 regardless of WORDS_BIG_ENDIAN. */
933 subreg_realpart_p (x
)
936 if (GET_CODE (x
) != SUBREG
)
939 return SUBREG_WORD (x
) * UNITS_PER_WORD
< GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
)));
942 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
943 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
944 least-significant part of X.
945 MODE specifies how big a part of X to return;
946 it usually should not be larger than a word.
947 If X is a MEM whose address is a QUEUED, the value may be so also. */
950 gen_lowpart (mode
, x
)
951 enum machine_mode mode
;
954 rtx result
= gen_lowpart_common (mode
, x
);
958 else if (GET_CODE (x
) == REG
)
960 /* Must be a hard reg that's not valid in MODE. */
961 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
966 else if (GET_CODE (x
) == MEM
)
968 /* The only additional case we can do is MEM. */
969 register int offset
= 0;
970 if (WORDS_BIG_ENDIAN
)
971 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
972 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
974 if (BYTES_BIG_ENDIAN
)
975 /* Adjust the address so that the address-after-the-data
977 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
978 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
980 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
982 else if (GET_CODE (x
) == ADDRESSOF
)
983 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
988 /* Like `gen_lowpart', but refer to the most significant part.
989 This is used to access the imaginary part of a complex number. */
992 gen_highpart (mode
, x
)
993 enum machine_mode mode
;
996 /* This case loses if X is a subreg. To catch bugs early,
997 complain if an invalid MODE is used even in other cases. */
998 if (GET_MODE_SIZE (mode
) > UNITS_PER_WORD
999 && GET_MODE_SIZE (mode
) != GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1001 if (GET_CODE (x
) == CONST_DOUBLE
1002 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1003 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_FLOAT
1006 return GEN_INT (CONST_DOUBLE_HIGH (x
) & GET_MODE_MASK (mode
));
1007 else if (GET_CODE (x
) == CONST_INT
)
1009 if (HOST_BITS_PER_WIDE_INT
<= BITS_PER_WORD
)
1011 return GEN_INT (INTVAL (x
) >> (HOST_BITS_PER_WIDE_INT
- BITS_PER_WORD
));
1013 else if (GET_CODE (x
) == MEM
)
1015 register int offset
= 0;
1016 if (! WORDS_BIG_ENDIAN
)
1017 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1018 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1020 if (! BYTES_BIG_ENDIAN
1021 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
1022 offset
-= (GET_MODE_SIZE (mode
)
1023 - MIN (UNITS_PER_WORD
,
1024 GET_MODE_SIZE (GET_MODE (x
))));
1026 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
1028 else if (GET_CODE (x
) == SUBREG
)
1030 /* The only time this should occur is when we are looking at a
1031 multi-word item with a SUBREG whose mode is the same as that of the
1032 item. It isn't clear what we would do if it wasn't. */
1033 if (SUBREG_WORD (x
) != 0)
1035 return gen_highpart (mode
, SUBREG_REG (x
));
1037 else if (GET_CODE (x
) == REG
)
1041 /* Let the backend decide how many registers to skip. This is needed
1042 in particular for sparc64 where fp regs are smaller than a word. */
1043 /* ??? Note that subregs are now ambiguous, in that those against
1044 pseudos are sized by the word size, while those against hard
1045 regs are sized by the underlying register size. Better would be
1046 to always interpret the subreg offset parameter as bytes or bits. */
1048 if (WORDS_BIG_ENDIAN
)
1050 else if (REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1051 word
= (HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
))
1052 - HARD_REGNO_NREGS (REGNO (x
), mode
));
1054 word
= ((GET_MODE_SIZE (GET_MODE (x
))
1055 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
))
1058 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
1059 /* integrate.c can't handle parts of a return value register. */
1060 && (! REG_FUNCTION_VALUE_P (x
)
1061 || ! rtx_equal_function_value_matters
)
1062 /* We want to keep the stack, frame, and arg pointers special. */
1063 && x
!= frame_pointer_rtx
1064 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1065 && x
!= arg_pointer_rtx
1067 && x
!= stack_pointer_rtx
)
1068 return gen_rtx_REG (mode
, REGNO (x
) + word
);
1070 return gen_rtx_SUBREG (mode
, x
, word
);
1076 /* Return 1 iff X, assumed to be a SUBREG,
1077 refers to the least significant part of its containing reg.
1078 If X is not a SUBREG, always return 1 (it is its own low part!). */
1081 subreg_lowpart_p (x
)
1084 if (GET_CODE (x
) != SUBREG
)
1086 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1089 if (WORDS_BIG_ENDIAN
1090 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))) > UNITS_PER_WORD
)
1091 return (SUBREG_WORD (x
)
1092 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))
1093 - MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
))
1096 return SUBREG_WORD (x
) == 0;
1099 /* Return subword I of operand OP.
1100 The word number, I, is interpreted as the word number starting at the
1101 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1102 otherwise it is the high-order word.
1104 If we cannot extract the required word, we return zero. Otherwise, an
1105 rtx corresponding to the requested word will be returned.
1107 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1108 reload has completed, a valid address will always be returned. After
1109 reload, if a valid address cannot be returned, we return zero.
1111 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1112 it is the responsibility of the caller.
1114 MODE is the mode of OP in case it is a CONST_INT. */
1117 operand_subword (op
, i
, validate_address
, mode
)
1120 int validate_address
;
1121 enum machine_mode mode
;
1124 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1126 if (mode
== VOIDmode
)
1127 mode
= GET_MODE (op
);
1129 if (mode
== VOIDmode
)
1132 /* If OP is narrower than a word, fail. */
1134 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1137 /* If we want a word outside OP, return zero. */
1139 && (i
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1142 /* If OP is already an integer word, return it. */
1143 if (GET_MODE_CLASS (mode
) == MODE_INT
1144 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1147 /* If OP is a REG or SUBREG, we can handle it very simply. */
1148 if (GET_CODE (op
) == REG
)
1150 /* ??? There is a potential problem with this code. It does not
1151 properly handle extractions of a subword from a hard register
1152 that is larger than word_mode. Presumably the check for
1153 HARD_REGNO_MODE_OK catches these most of these cases. */
1155 /* If OP is a hard register, but OP + I is not a hard register,
1156 then extracting a subword is impossible.
1158 For example, consider if OP is the last hard register and it is
1159 larger than word_mode. If we wanted word N (for N > 0) because a
1160 part of that hard register was known to contain a useful value,
1161 then OP + I would refer to a pseudo, not the hard register we
1163 if (REGNO (op
) < FIRST_PSEUDO_REGISTER
1164 && REGNO (op
) + i
>= FIRST_PSEUDO_REGISTER
)
1167 /* If the register is not valid for MODE, return 0. Note we
1168 have to check both OP and OP + I since they may refer to
1169 different parts of the register file.
1171 Consider if OP refers to the last 96bit FP register and we want
1172 subword 3 because that subword is known to contain a value we
1174 if (REGNO (op
) < FIRST_PSEUDO_REGISTER
1175 && (! HARD_REGNO_MODE_OK (REGNO (op
), word_mode
)
1176 || ! HARD_REGNO_MODE_OK (REGNO (op
) + i
, word_mode
)))
1178 else if (REGNO (op
) >= FIRST_PSEUDO_REGISTER
1179 || (REG_FUNCTION_VALUE_P (op
)
1180 && rtx_equal_function_value_matters
)
1181 /* We want to keep the stack, frame, and arg pointers
1183 || op
== frame_pointer_rtx
1184 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1185 || op
== arg_pointer_rtx
1187 || op
== stack_pointer_rtx
)
1188 return gen_rtx_SUBREG (word_mode
, op
, i
);
1190 return gen_rtx_REG (word_mode
, REGNO (op
) + i
);
1192 else if (GET_CODE (op
) == SUBREG
)
1193 return gen_rtx_SUBREG (word_mode
, SUBREG_REG (op
), i
+ SUBREG_WORD (op
));
1194 else if (GET_CODE (op
) == CONCAT
)
1196 int partwords
= GET_MODE_UNIT_SIZE (GET_MODE (op
)) / UNITS_PER_WORD
;
1198 return operand_subword (XEXP (op
, 0), i
, validate_address
, mode
);
1199 return operand_subword (XEXP (op
, 1), i
- partwords
,
1200 validate_address
, mode
);
1203 /* Form a new MEM at the requested address. */
1204 if (GET_CODE (op
) == MEM
)
1206 rtx addr
= plus_constant (XEXP (op
, 0), i
* UNITS_PER_WORD
);
1209 if (validate_address
)
1211 if (reload_completed
)
1213 if (! strict_memory_address_p (word_mode
, addr
))
1217 addr
= memory_address (word_mode
, addr
);
1220 new = gen_rtx_MEM (word_mode
, addr
);
1222 MEM_COPY_ATTRIBUTES (new, op
);
1223 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op
);
1224 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (op
);
1229 /* The only remaining cases are when OP is a constant. If the host and
1230 target floating formats are the same, handling two-word floating
1231 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1232 are defined as returning one or two 32 bit values, respectively,
1233 and not values of BITS_PER_WORD bits. */
1234 #ifdef REAL_ARITHMETIC
1235 /* The output is some bits, the width of the target machine's word.
1236 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1238 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1239 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1240 && GET_MODE_BITSIZE (mode
) == 64
1241 && GET_CODE (op
) == CONST_DOUBLE
)
1246 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1247 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1249 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1250 which the words are written depends on the word endianness.
1251 ??? This is a potential portability problem and should
1252 be fixed at some point.
1254 We must excercise caution with the sign bit. By definition there
1255 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1256 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1257 So we explicitly mask and sign-extend as necessary. */
1258 if (BITS_PER_WORD
== 32)
1261 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1262 return GEN_INT (val
);
1264 #if HOST_BITS_PER_WIDE_INT >= 64
1265 else if (BITS_PER_WORD
>= 64 && i
== 0)
1267 val
= k
[! WORDS_BIG_ENDIAN
];
1268 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1269 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1270 return GEN_INT (val
);
1273 else if (BITS_PER_WORD
== 16)
1276 if ((i
& 1) == !WORDS_BIG_ENDIAN
)
1279 return GEN_INT (val
);
1284 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1285 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1286 && GET_MODE_BITSIZE (mode
) > 64
1287 && GET_CODE (op
) == CONST_DOUBLE
)
1292 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1293 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1295 if (BITS_PER_WORD
== 32)
1298 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1299 return GEN_INT (val
);
1304 #else /* no REAL_ARITHMETIC */
1305 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1306 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1307 || flag_pretend_float
)
1308 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1309 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1310 && GET_CODE (op
) == CONST_DOUBLE
)
1312 /* The constant is stored in the host's word-ordering,
1313 but we want to access it in the target's word-ordering. Some
1314 compilers don't like a conditional inside macro args, so we have two
1315 copies of the return. */
1316 #ifdef HOST_WORDS_BIG_ENDIAN
1317 return GEN_INT (i
== WORDS_BIG_ENDIAN
1318 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1320 return GEN_INT (i
!= WORDS_BIG_ENDIAN
1321 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1324 #endif /* no REAL_ARITHMETIC */
1326 /* Single word float is a little harder, since single- and double-word
1327 values often do not have the same high-order bits. We have already
1328 verified that we want the only defined word of the single-word value. */
1329 #ifdef REAL_ARITHMETIC
1330 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1331 && GET_MODE_BITSIZE (mode
) == 32
1332 && GET_CODE (op
) == CONST_DOUBLE
)
1337 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1338 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1340 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1342 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1344 if (BITS_PER_WORD
== 16)
1346 if ((i
& 1) == !WORDS_BIG_ENDIAN
)
1351 return GEN_INT (val
);
1354 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1355 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1356 || flag_pretend_float
)
1357 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1358 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1359 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1360 && GET_CODE (op
) == CONST_DOUBLE
)
1363 union {float f
; HOST_WIDE_INT i
; } u
;
1365 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1368 return GEN_INT (u
.i
);
1370 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1371 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1372 || flag_pretend_float
)
1373 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1374 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1375 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1376 && GET_CODE (op
) == CONST_DOUBLE
)
1379 union {double d
; HOST_WIDE_INT i
; } u
;
1381 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1384 return GEN_INT (u
.i
);
1386 #endif /* no REAL_ARITHMETIC */
1388 /* The only remaining cases that we can handle are integers.
1389 Convert to proper endianness now since these cases need it.
1390 At this point, i == 0 means the low-order word.
1392 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1393 in general. However, if OP is (const_int 0), we can just return
1396 if (op
== const0_rtx
)
1399 if (GET_MODE_CLASS (mode
) != MODE_INT
1400 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1401 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1404 if (WORDS_BIG_ENDIAN
)
1405 i
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - i
;
1407 /* Find out which word on the host machine this value is in and get
1408 it from the constant. */
1409 val
= (i
/ size_ratio
== 0
1410 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1411 : (GET_CODE (op
) == CONST_INT
1412 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1414 /* Get the value we want into the low bits of val. */
1415 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1416 val
= ((val
>> ((i
% size_ratio
) * BITS_PER_WORD
)));
1418 val
= trunc_int_for_mode (val
, word_mode
);
1420 return GEN_INT (val
);
1423 /* Similar to `operand_subword', but never return 0. If we can't extract
1424 the required subword, put OP into a register and try again. If that fails,
1425 abort. We always validate the address in this case. It is not valid
1426 to call this function after reload; it is mostly meant for RTL
1429 MODE is the mode of OP, in case it is CONST_INT. */
1432 operand_subword_force (op
, i
, mode
)
1435 enum machine_mode mode
;
1437 rtx result
= operand_subword (op
, i
, 1, mode
);
1442 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1444 /* If this is a register which can not be accessed by words, copy it
1445 to a pseudo register. */
1446 if (GET_CODE (op
) == REG
)
1447 op
= copy_to_reg (op
);
1449 op
= force_reg (mode
, op
);
1452 result
= operand_subword (op
, i
, 1, mode
);
1459 /* Given a compare instruction, swap the operands.
1460 A test instruction is changed into a compare of 0 against the operand. */
1463 reverse_comparison (insn
)
1466 rtx body
= PATTERN (insn
);
1469 if (GET_CODE (body
) == SET
)
1470 comp
= SET_SRC (body
);
1472 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1474 if (GET_CODE (comp
) == COMPARE
)
1476 rtx op0
= XEXP (comp
, 0);
1477 rtx op1
= XEXP (comp
, 1);
1478 XEXP (comp
, 0) = op1
;
1479 XEXP (comp
, 1) = op0
;
1483 rtx
new = gen_rtx_COMPARE (VOIDmode
, CONST0_RTX (GET_MODE (comp
)), comp
);
1484 if (GET_CODE (body
) == SET
)
1485 SET_SRC (body
) = new;
1487 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1491 /* Return a memory reference like MEMREF, but with its mode changed
1492 to MODE and its address changed to ADDR.
1493 (VOIDmode means don't change the mode.
1494 NULL for ADDR means don't change the address.) */
1497 change_address (memref
, mode
, addr
)
1499 enum machine_mode mode
;
1504 if (GET_CODE (memref
) != MEM
)
1506 if (mode
== VOIDmode
)
1507 mode
= GET_MODE (memref
);
1509 addr
= XEXP (memref
, 0);
1511 /* If reload is in progress or has completed, ADDR must be valid.
1512 Otherwise, we can call memory_address to make it valid. */
1513 if (reload_completed
|| reload_in_progress
)
1515 if (! memory_address_p (mode
, addr
))
1519 addr
= memory_address (mode
, addr
);
1521 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1524 new = gen_rtx_MEM (mode
, addr
);
1525 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref
);
1526 MEM_COPY_ATTRIBUTES (new, memref
);
1527 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (memref
);
1531 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1538 label
= gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
,
1539 NULL_RTX
, label_num
++, NULL_PTR
);
1541 LABEL_NUSES (label
) = 0;
1545 /* For procedure integration. */
1547 /* Install new pointers to the first and last insns in the chain.
1548 Also, set cur_insn_uid to one higher than the last in use.
1549 Used for an inline-procedure after copying the insn chain. */
1552 set_new_first_and_last_insn (first
, last
)
1561 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1562 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
1567 /* Set the range of label numbers found in the current function.
1568 This is used when belatedly compiling an inline function. */
1571 set_new_first_and_last_label_num (first
, last
)
1574 base_label_num
= label_num
;
1575 first_label_num
= first
;
1576 last_label_num
= last
;
1579 /* Set the last label number found in the current function.
1580 This is used when belatedly compiling an inline function. */
1583 set_new_last_label_num (last
)
1586 base_label_num
= label_num
;
1587 last_label_num
= last
;
1590 /* Restore all variables describing the current status from the structure *P.
1591 This is used after a nested function. */
1594 restore_emit_status (p
)
1598 clear_emit_caches ();
1601 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1602 It does not work to do this twice, because the mark bits set here
1603 are not cleared afterwards. */
1606 unshare_all_rtl (insn
)
1609 for (; insn
; insn
= NEXT_INSN (insn
))
1610 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
1611 || GET_CODE (insn
) == CALL_INSN
)
1613 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
1614 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
1615 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
1618 /* Make sure the addresses of stack slots found outside the insn chain
1619 (such as, in DECL_RTL of a variable) are not shared
1620 with the insn chain.
1622 This special care is necessary when the stack slot MEM does not
1623 actually appear in the insn chain. If it does appear, its address
1624 is unshared from all else at that point. */
1626 copy_rtx_if_shared (stack_slot_list
);
1629 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1630 Recursively does the same for subexpressions. */
1633 copy_rtx_if_shared (orig
)
1636 register rtx x
= orig
;
1638 register enum rtx_code code
;
1639 register const char *format_ptr
;
1645 code
= GET_CODE (x
);
1647 /* These types may be freely shared. */
1660 /* SCRATCH must be shared because they represent distinct values. */
1664 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1665 a LABEL_REF, it isn't sharable. */
1666 if (GET_CODE (XEXP (x
, 0)) == PLUS
1667 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
1668 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
1677 /* The chain of insns is not being copied. */
1681 /* A MEM is allowed to be shared if its address is constant
1682 or is a constant plus one of the special registers. */
1683 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
1684 || XEXP (x
, 0) == virtual_stack_vars_rtx
1685 || XEXP (x
, 0) == virtual_incoming_args_rtx
)
1688 if (GET_CODE (XEXP (x
, 0)) == PLUS
1689 && (XEXP (XEXP (x
, 0), 0) == virtual_stack_vars_rtx
1690 || XEXP (XEXP (x
, 0), 0) == virtual_incoming_args_rtx
)
1691 && CONSTANT_ADDRESS_P (XEXP (XEXP (x
, 0), 1)))
1693 /* This MEM can appear in more than one place,
1694 but its address better not be shared with anything else. */
1696 XEXP (x
, 0) = copy_rtx_if_shared (XEXP (x
, 0));
1706 /* This rtx may not be shared. If it has already been seen,
1707 replace it with a copy of itself. */
1713 copy
= rtx_alloc (code
);
1714 bcopy ((char *) x
, (char *) copy
,
1715 (sizeof (*copy
) - sizeof (copy
->fld
)
1716 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
1722 /* Now scan the subexpressions recursively.
1723 We can store any replaced subexpressions directly into X
1724 since we know X is not shared! Any vectors in X
1725 must be copied if X was copied. */
1727 format_ptr
= GET_RTX_FORMAT (code
);
1729 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1731 switch (*format_ptr
++)
1734 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
1738 if (XVEC (x
, i
) != NULL
)
1741 int len
= XVECLEN (x
, i
);
1743 if (copied
&& len
> 0)
1744 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
1745 for (j
= 0; j
< len
; j
++)
1746 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
1754 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1755 to look for shared sub-parts. */
1758 reset_used_flags (x
)
1762 register enum rtx_code code
;
1763 register const char *format_ptr
;
1768 code
= GET_CODE (x
);
1770 /* These types may be freely shared so we needn't do any resetting
1791 /* The chain of insns is not being copied. */
1800 format_ptr
= GET_RTX_FORMAT (code
);
1801 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1803 switch (*format_ptr
++)
1806 reset_used_flags (XEXP (x
, i
));
1810 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1811 reset_used_flags (XVECEXP (x
, i
, j
));
1817 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1818 Return X or the rtx for the pseudo reg the value of X was copied into.
1819 OTHER must be valid as a SET_DEST. */
1822 make_safe_from (x
, other
)
1826 switch (GET_CODE (other
))
1829 other
= SUBREG_REG (other
);
1831 case STRICT_LOW_PART
:
1834 other
= XEXP (other
, 0);
1840 if ((GET_CODE (other
) == MEM
1842 && GET_CODE (x
) != REG
1843 && GET_CODE (x
) != SUBREG
)
1844 || (GET_CODE (other
) == REG
1845 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
1846 || reg_mentioned_p (other
, x
))))
1848 rtx temp
= gen_reg_rtx (GET_MODE (x
));
1849 emit_move_insn (temp
, x
);
1855 /* Emission of insns (adding them to the doubly-linked list). */
1857 /* Return the first insn of the current sequence or current function. */
1865 /* Return the last insn emitted in current sequence or current function. */
1873 /* Specify a new insn as the last in the chain. */
1876 set_last_insn (insn
)
1879 if (NEXT_INSN (insn
) != 0)
1884 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1887 get_last_insn_anywhere ()
1889 struct sequence_stack
*stack
;
1892 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
1893 if (stack
->last
!= 0)
1898 /* Return a number larger than any instruction's uid in this function. */
1903 return cur_insn_uid
;
1906 /* Return the next insn. If it is a SEQUENCE, return the first insn
1915 insn
= NEXT_INSN (insn
);
1916 if (insn
&& GET_CODE (insn
) == INSN
1917 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1918 insn
= XVECEXP (PATTERN (insn
), 0, 0);
1924 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1928 previous_insn (insn
)
1933 insn
= PREV_INSN (insn
);
1934 if (insn
&& GET_CODE (insn
) == INSN
1935 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1936 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
1942 /* Return the next insn after INSN that is not a NOTE. This routine does not
1943 look inside SEQUENCEs. */
1946 next_nonnote_insn (insn
)
1951 insn
= NEXT_INSN (insn
);
1952 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
1959 /* Return the previous insn before INSN that is not a NOTE. This routine does
1960 not look inside SEQUENCEs. */
1963 prev_nonnote_insn (insn
)
1968 insn
= PREV_INSN (insn
);
1969 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
1976 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1977 or 0, if there is none. This routine does not look inside
1981 next_real_insn (insn
)
1986 insn
= NEXT_INSN (insn
);
1987 if (insn
== 0 || GET_CODE (insn
) == INSN
1988 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
1995 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1996 or 0, if there is none. This routine does not look inside
2000 prev_real_insn (insn
)
2005 insn
= PREV_INSN (insn
);
2006 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2007 || GET_CODE (insn
) == JUMP_INSN
)
2014 /* Find the next insn after INSN that really does something. This routine
2015 does not look inside SEQUENCEs. Until reload has completed, this is the
2016 same as next_real_insn. */
2019 next_active_insn (insn
)
2024 insn
= NEXT_INSN (insn
);
2026 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2027 || (GET_CODE (insn
) == INSN
2028 && (! reload_completed
2029 || (GET_CODE (PATTERN (insn
)) != USE
2030 && GET_CODE (PATTERN (insn
)) != CLOBBER
))))
2037 /* Find the last insn before INSN that really does something. This routine
2038 does not look inside SEQUENCEs. Until reload has completed, this is the
2039 same as prev_real_insn. */
2042 prev_active_insn (insn
)
2047 insn
= PREV_INSN (insn
);
2049 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2050 || (GET_CODE (insn
) == INSN
2051 && (! reload_completed
2052 || (GET_CODE (PATTERN (insn
)) != USE
2053 && GET_CODE (PATTERN (insn
)) != CLOBBER
))))
2060 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2068 insn
= NEXT_INSN (insn
);
2069 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2076 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2084 insn
= PREV_INSN (insn
);
2085 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2093 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2094 and REG_CC_USER notes so we can find it. */
2097 link_cc0_insns (insn
)
2100 rtx user
= next_nonnote_insn (insn
);
2102 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
2103 user
= XVECEXP (PATTERN (user
), 0, 0);
2105 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
, REG_NOTES (user
));
2106 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
2109 /* Return the next insn that uses CC0 after INSN, which is assumed to
2110 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2111 applied to the result of this function should yield INSN).
2113 Normally, this is simply the next insn. However, if a REG_CC_USER note
2114 is present, it contains the insn that uses CC0.
2116 Return 0 if we can't find the insn. */
2119 next_cc0_user (insn
)
2122 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
2125 return XEXP (note
, 0);
2127 insn
= next_nonnote_insn (insn
);
2128 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2129 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2131 if (insn
&& GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
2132 && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
2138 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2139 note, it is the previous insn. */
2142 prev_cc0_setter (insn
)
2145 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2148 return XEXP (note
, 0);
2150 insn
= prev_nonnote_insn (insn
);
2151 if (! sets_cc0_p (PATTERN (insn
)))
2158 /* Try splitting insns that can be split for better scheduling.
2159 PAT is the pattern which might split.
2160 TRIAL is the insn providing PAT.
2161 LAST is non-zero if we should return the last insn of the sequence produced.
2163 If this routine succeeds in splitting, it returns the first or last
2164 replacement insn depending on the value of LAST. Otherwise, it
2165 returns TRIAL. If the insn to be returned can be split, it will be. */
2168 try_split (pat
, trial
, last
)
2172 rtx before
= PREV_INSN (trial
);
2173 rtx after
= NEXT_INSN (trial
);
2174 rtx seq
= split_insns (pat
, trial
);
2175 int has_barrier
= 0;
2178 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2179 We may need to handle this specially. */
2180 if (after
&& GET_CODE (after
) == BARRIER
)
2183 after
= NEXT_INSN (after
);
2188 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2189 The latter case will normally arise only when being done so that
2190 it, in turn, will be split (SFmode on the 29k is an example). */
2191 if (GET_CODE (seq
) == SEQUENCE
)
2193 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2194 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2195 increment the usage count so we don't delete the label. */
2198 if (GET_CODE (trial
) == JUMP_INSN
)
2199 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2200 if (GET_CODE (XVECEXP (seq
, 0, i
)) == JUMP_INSN
)
2202 JUMP_LABEL (XVECEXP (seq
, 0, i
)) = JUMP_LABEL (trial
);
2204 if (JUMP_LABEL (trial
))
2205 LABEL_NUSES (JUMP_LABEL (trial
))++;
2208 tem
= emit_insn_after (seq
, before
);
2210 delete_insn (trial
);
2212 emit_barrier_after (tem
);
2214 /* Recursively call try_split for each new insn created; by the
2215 time control returns here that insn will be fully split, so
2216 set LAST and continue from the insn after the one returned.
2217 We can't use next_active_insn here since AFTER may be a note.
2218 Ignore deleted insns, which can be occur if not optimizing. */
2219 for (tem
= NEXT_INSN (before
); tem
!= after
;
2220 tem
= NEXT_INSN (tem
))
2221 if (! INSN_DELETED_P (tem
)
2222 && GET_RTX_CLASS (GET_CODE (tem
)) == 'i')
2223 tem
= try_split (PATTERN (tem
), tem
, 1);
2225 /* Avoid infinite loop if the result matches the original pattern. */
2226 else if (rtx_equal_p (seq
, pat
))
2230 PATTERN (trial
) = seq
;
2231 INSN_CODE (trial
) = -1;
2232 try_split (seq
, trial
, last
);
2235 /* Return either the first or the last insn, depending on which was
2237 return last
? prev_active_insn (after
) : next_active_insn (before
);
2243 /* Make and return an INSN rtx, initializing all its slots.
2244 Store PATTERN in the pattern slots. */
2247 make_insn_raw (pattern
)
2252 /* If in RTL generation phase, see if FREE_INSN can be used. */
2253 if (free_insn
!= 0 && rtx_equal_function_value_matters
)
2256 free_insn
= NEXT_INSN (free_insn
);
2257 PUT_CODE (insn
, INSN
);
2260 insn
= rtx_alloc (INSN
);
2262 INSN_UID (insn
) = cur_insn_uid
++;
2263 PATTERN (insn
) = pattern
;
2264 INSN_CODE (insn
) = -1;
2265 LOG_LINKS (insn
) = NULL
;
2266 REG_NOTES (insn
) = NULL
;
2271 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2274 make_jump_insn_raw (pattern
)
2279 insn
= rtx_alloc (JUMP_INSN
);
2280 INSN_UID (insn
) = cur_insn_uid
++;
2282 PATTERN (insn
) = pattern
;
2283 INSN_CODE (insn
) = -1;
2284 LOG_LINKS (insn
) = NULL
;
2285 REG_NOTES (insn
) = NULL
;
2286 JUMP_LABEL (insn
) = NULL
;
2291 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2294 make_call_insn_raw (pattern
)
2299 insn
= rtx_alloc (CALL_INSN
);
2300 INSN_UID (insn
) = cur_insn_uid
++;
2302 PATTERN (insn
) = pattern
;
2303 INSN_CODE (insn
) = -1;
2304 LOG_LINKS (insn
) = NULL
;
2305 REG_NOTES (insn
) = NULL
;
2306 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
2311 /* Add INSN to the end of the doubly-linked list.
2312 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2318 PREV_INSN (insn
) = last_insn
;
2319 NEXT_INSN (insn
) = 0;
2321 if (NULL
!= last_insn
)
2322 NEXT_INSN (last_insn
) = insn
;
2324 if (NULL
== first_insn
)
2330 /* Add INSN into the doubly-linked list after insn AFTER. This and
2331 the next should be the only functions called to insert an insn once
2332 delay slots have been filled since only they know how to update a
2336 add_insn_after (insn
, after
)
2339 rtx next
= NEXT_INSN (after
);
2341 if (optimize
&& INSN_DELETED_P (after
))
2344 NEXT_INSN (insn
) = next
;
2345 PREV_INSN (insn
) = after
;
2349 PREV_INSN (next
) = insn
;
2350 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
2351 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
2353 else if (last_insn
== after
)
2357 struct sequence_stack
*stack
= seq_stack
;
2358 /* Scan all pending sequences too. */
2359 for (; stack
; stack
= stack
->next
)
2360 if (after
== stack
->last
)
2370 NEXT_INSN (after
) = insn
;
2371 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
2373 rtx sequence
= PATTERN (after
);
2374 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2378 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2379 the previous should be the only functions called to insert an insn once
2380 delay slots have been filled since only they know how to update a
2384 add_insn_before (insn
, before
)
2387 rtx prev
= PREV_INSN (before
);
2389 if (optimize
&& INSN_DELETED_P (before
))
2392 PREV_INSN (insn
) = prev
;
2393 NEXT_INSN (insn
) = before
;
2397 NEXT_INSN (prev
) = insn
;
2398 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
2400 rtx sequence
= PATTERN (prev
);
2401 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2404 else if (first_insn
== before
)
2408 struct sequence_stack
*stack
= seq_stack
;
2409 /* Scan all pending sequences too. */
2410 for (; stack
; stack
= stack
->next
)
2411 if (before
== stack
->first
)
2413 stack
->first
= insn
;
2421 PREV_INSN (before
) = insn
;
2422 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
2423 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
2426 /* Remove an insn from its doubly-linked list. This function knows how
2427 to handle sequences. */
2432 rtx next
= NEXT_INSN (insn
);
2433 rtx prev
= PREV_INSN (insn
);
2436 NEXT_INSN (prev
) = next
;
2437 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
2439 rtx sequence
= PATTERN (prev
);
2440 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
2443 else if (first_insn
== insn
)
2447 struct sequence_stack
*stack
= seq_stack
;
2448 /* Scan all pending sequences too. */
2449 for (; stack
; stack
= stack
->next
)
2450 if (insn
== stack
->first
)
2452 stack
->first
= next
;
2462 PREV_INSN (next
) = prev
;
2463 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
2464 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
2466 else if (last_insn
== insn
)
2470 struct sequence_stack
*stack
= seq_stack
;
2471 /* Scan all pending sequences too. */
2472 for (; stack
; stack
= stack
->next
)
2473 if (insn
== stack
->last
)
2484 /* Delete all insns made since FROM.
2485 FROM becomes the new last instruction. */
2488 delete_insns_since (from
)
2494 NEXT_INSN (from
) = 0;
2498 /* This function is deprecated, please use sequences instead.
2500 Move a consecutive bunch of insns to a different place in the chain.
2501 The insns to be moved are those between FROM and TO.
2502 They are moved to a new position after the insn AFTER.
2503 AFTER must not be FROM or TO or any insn in between.
2505 This function does not know about SEQUENCEs and hence should not be
2506 called after delay-slot filling has been done. */
2509 reorder_insns (from
, to
, after
)
2510 rtx from
, to
, after
;
2512 /* Splice this bunch out of where it is now. */
2513 if (PREV_INSN (from
))
2514 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
2516 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
2517 if (last_insn
== to
)
2518 last_insn
= PREV_INSN (from
);
2519 if (first_insn
== from
)
2520 first_insn
= NEXT_INSN (to
);
2522 /* Make the new neighbors point to it and it to them. */
2523 if (NEXT_INSN (after
))
2524 PREV_INSN (NEXT_INSN (after
)) = to
;
2526 NEXT_INSN (to
) = NEXT_INSN (after
);
2527 PREV_INSN (from
) = after
;
2528 NEXT_INSN (after
) = from
;
2529 if (after
== last_insn
)
2533 /* Return the line note insn preceding INSN. */
2536 find_line_note (insn
)
2539 if (no_line_numbers
)
2542 for (; insn
; insn
= PREV_INSN (insn
))
2543 if (GET_CODE (insn
) == NOTE
2544 && NOTE_LINE_NUMBER (insn
) >= 0)
2550 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2551 of the moved insns when debugging. This may insert a note between AFTER
2552 and FROM, and another one after TO. */
2555 reorder_insns_with_line_notes (from
, to
, after
)
2556 rtx from
, to
, after
;
2558 rtx from_line
= find_line_note (from
);
2559 rtx after_line
= find_line_note (after
);
2561 reorder_insns (from
, to
, after
);
2563 if (from_line
== after_line
)
2567 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
2568 NOTE_LINE_NUMBER (from_line
),
2571 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
2572 NOTE_LINE_NUMBER (after_line
),
2576 /* Emit an insn of given code and pattern
2577 at a specified place within the doubly-linked list. */
2579 /* Make an instruction with body PATTERN
2580 and output it before the instruction BEFORE. */
2583 emit_insn_before (pattern
, before
)
2584 register rtx pattern
, before
;
2586 register rtx insn
= before
;
2588 if (GET_CODE (pattern
) == SEQUENCE
)
2592 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2594 insn
= XVECEXP (pattern
, 0, i
);
2595 add_insn_before (insn
, before
);
2597 if (XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2598 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2602 insn
= make_insn_raw (pattern
);
2603 add_insn_before (insn
, before
);
2609 /* Make an instruction with body PATTERN and code JUMP_INSN
2610 and output it before the instruction BEFORE. */
2613 emit_jump_insn_before (pattern
, before
)
2614 register rtx pattern
, before
;
2618 if (GET_CODE (pattern
) == SEQUENCE
)
2619 insn
= emit_insn_before (pattern
, before
);
2622 insn
= make_jump_insn_raw (pattern
);
2623 add_insn_before (insn
, before
);
2629 /* Make an instruction with body PATTERN and code CALL_INSN
2630 and output it before the instruction BEFORE. */
2633 emit_call_insn_before (pattern
, before
)
2634 register rtx pattern
, before
;
2638 if (GET_CODE (pattern
) == SEQUENCE
)
2639 insn
= emit_insn_before (pattern
, before
);
2642 insn
= make_call_insn_raw (pattern
);
2643 add_insn_before (insn
, before
);
2644 PUT_CODE (insn
, CALL_INSN
);
2650 /* Make an insn of code BARRIER
2651 and output it before the insn BEFORE. */
2654 emit_barrier_before (before
)
2655 register rtx before
;
2657 register rtx insn
= rtx_alloc (BARRIER
);
2659 INSN_UID (insn
) = cur_insn_uid
++;
2661 add_insn_before (insn
, before
);
2665 /* Emit the label LABEL before the insn BEFORE. */
2668 emit_label_before (label
, before
)
2671 /* This can be called twice for the same label as a result of the
2672 confusion that follows a syntax error! So make it harmless. */
2673 if (INSN_UID (label
) == 0)
2675 INSN_UID (label
) = cur_insn_uid
++;
2676 add_insn_before (label
, before
);
2682 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2685 emit_note_before (subtype
, before
)
2689 register rtx note
= rtx_alloc (NOTE
);
2690 INSN_UID (note
) = cur_insn_uid
++;
2691 NOTE_SOURCE_FILE (note
) = 0;
2692 NOTE_LINE_NUMBER (note
) = subtype
;
2694 add_insn_before (note
, before
);
2698 /* Make an insn of code INSN with body PATTERN
2699 and output it after the insn AFTER. */
2702 emit_insn_after (pattern
, after
)
2703 register rtx pattern
, after
;
2705 register rtx insn
= after
;
2707 if (GET_CODE (pattern
) == SEQUENCE
)
2711 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2713 insn
= XVECEXP (pattern
, 0, i
);
2714 add_insn_after (insn
, after
);
2717 if (XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2718 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2722 insn
= make_insn_raw (pattern
);
2723 add_insn_after (insn
, after
);
2729 /* Similar to emit_insn_after, except that line notes are to be inserted so
2730 as to act as if this insn were at FROM. */
2733 emit_insn_after_with_line_notes (pattern
, after
, from
)
2734 rtx pattern
, after
, from
;
2736 rtx from_line
= find_line_note (from
);
2737 rtx after_line
= find_line_note (after
);
2738 rtx insn
= emit_insn_after (pattern
, after
);
2741 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
2742 NOTE_LINE_NUMBER (from_line
),
2746 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
2747 NOTE_LINE_NUMBER (after_line
),
2751 /* Make an insn of code JUMP_INSN with body PATTERN
2752 and output it after the insn AFTER. */
2755 emit_jump_insn_after (pattern
, after
)
2756 register rtx pattern
, after
;
2760 if (GET_CODE (pattern
) == SEQUENCE
)
2761 insn
= emit_insn_after (pattern
, after
);
2764 insn
= make_jump_insn_raw (pattern
);
2765 add_insn_after (insn
, after
);
2771 /* Make an insn of code BARRIER
2772 and output it after the insn AFTER. */
2775 emit_barrier_after (after
)
2778 register rtx insn
= rtx_alloc (BARRIER
);
2780 INSN_UID (insn
) = cur_insn_uid
++;
2782 add_insn_after (insn
, after
);
2786 /* Emit the label LABEL after the insn AFTER. */
2789 emit_label_after (label
, after
)
2792 /* This can be called twice for the same label
2793 as a result of the confusion that follows a syntax error!
2794 So make it harmless. */
2795 if (INSN_UID (label
) == 0)
2797 INSN_UID (label
) = cur_insn_uid
++;
2798 add_insn_after (label
, after
);
2804 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2807 emit_note_after (subtype
, after
)
2811 register rtx note
= rtx_alloc (NOTE
);
2812 INSN_UID (note
) = cur_insn_uid
++;
2813 NOTE_SOURCE_FILE (note
) = 0;
2814 NOTE_LINE_NUMBER (note
) = subtype
;
2815 add_insn_after (note
, after
);
2819 /* Emit a line note for FILE and LINE after the insn AFTER. */
2822 emit_line_note_after (file
, line
, after
)
2829 if (no_line_numbers
&& line
> 0)
2835 note
= rtx_alloc (NOTE
);
2836 INSN_UID (note
) = cur_insn_uid
++;
2837 NOTE_SOURCE_FILE (note
) = file
;
2838 NOTE_LINE_NUMBER (note
) = line
;
2839 add_insn_after (note
, after
);
2843 /* Make an insn of code INSN with pattern PATTERN
2844 and add it to the end of the doubly-linked list.
2845 If PATTERN is a SEQUENCE, take the elements of it
2846 and emit an insn for each element.
2848 Returns the last insn emitted. */
2854 rtx insn
= last_insn
;
2856 if (GET_CODE (pattern
) == SEQUENCE
)
2860 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2862 insn
= XVECEXP (pattern
, 0, i
);
2865 if (XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2866 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2870 insn
= make_insn_raw (pattern
);
2877 /* Emit the insns in a chain starting with INSN.
2878 Return the last insn emitted. */
2888 rtx next
= NEXT_INSN (insn
);
2897 /* Emit the insns in a chain starting with INSN and place them in front of
2898 the insn BEFORE. Return the last insn emitted. */
2901 emit_insns_before (insn
, before
)
2909 rtx next
= NEXT_INSN (insn
);
2910 add_insn_before (insn
, before
);
2918 /* Emit the insns in a chain starting with FIRST and place them in back of
2919 the insn AFTER. Return the last insn emitted. */
2922 emit_insns_after (first
, after
)
2927 register rtx after_after
;
2935 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
2938 after_after
= NEXT_INSN (after
);
2940 NEXT_INSN (after
) = first
;
2941 PREV_INSN (first
) = after
;
2942 NEXT_INSN (last
) = after_after
;
2944 PREV_INSN (after_after
) = last
;
2946 if (after
== last_insn
)
2951 /* Make an insn of code JUMP_INSN with pattern PATTERN
2952 and add it to the end of the doubly-linked list. */
2955 emit_jump_insn (pattern
)
2958 if (GET_CODE (pattern
) == SEQUENCE
)
2959 return emit_insn (pattern
);
2962 register rtx insn
= make_jump_insn_raw (pattern
);
2968 /* Make an insn of code CALL_INSN with pattern PATTERN
2969 and add it to the end of the doubly-linked list. */
2972 emit_call_insn (pattern
)
2975 if (GET_CODE (pattern
) == SEQUENCE
)
2976 return emit_insn (pattern
);
2979 register rtx insn
= make_call_insn_raw (pattern
);
2981 PUT_CODE (insn
, CALL_INSN
);
2986 /* Add the label LABEL to the end of the doubly-linked list. */
2992 /* This can be called twice for the same label
2993 as a result of the confusion that follows a syntax error!
2994 So make it harmless. */
2995 if (INSN_UID (label
) == 0)
2997 INSN_UID (label
) = cur_insn_uid
++;
3003 /* Make an insn of code BARRIER
3004 and add it to the end of the doubly-linked list. */
3009 register rtx barrier
= rtx_alloc (BARRIER
);
3010 INSN_UID (barrier
) = cur_insn_uid
++;
3015 /* Make an insn of code NOTE
3016 with data-fields specified by FILE and LINE
3017 and add it to the end of the doubly-linked list,
3018 but only if line-numbers are desired for debugging info. */
3021 emit_line_note (file
, line
)
3025 set_file_and_line_for_stmt (file
, line
);
3028 if (no_line_numbers
)
3032 return emit_note (file
, line
);
3035 /* Make an insn of code NOTE
3036 with data-fields specified by FILE and LINE
3037 and add it to the end of the doubly-linked list.
3038 If it is a line-number NOTE, omit it if it matches the previous one. */
3041 emit_note (file
, line
)
3049 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
3050 && line
== last_linenum
)
3052 last_filename
= file
;
3053 last_linenum
= line
;
3056 if (no_line_numbers
&& line
> 0)
3062 note
= rtx_alloc (NOTE
);
3063 INSN_UID (note
) = cur_insn_uid
++;
3064 NOTE_SOURCE_FILE (note
) = file
;
3065 NOTE_LINE_NUMBER (note
) = line
;
3070 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3073 emit_line_note_force (file
, line
)
3078 return emit_line_note (file
, line
);
3081 /* Cause next statement to emit a line note even if the line number
3082 has not changed. This is used at the beginning of a function. */
3085 force_next_line_note ()
3090 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3091 note of this type already exists, remove it first. */
3094 set_unique_reg_note (insn
, kind
, datum
)
3099 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
3101 /* First remove the note if there already is one. */
3103 remove_note (insn
, note
);
3105 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
3108 /* Return an indication of which type of insn should have X as a body.
3109 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3115 if (GET_CODE (x
) == CODE_LABEL
)
3117 if (GET_CODE (x
) == CALL
)
3119 if (GET_CODE (x
) == RETURN
)
3121 if (GET_CODE (x
) == SET
)
3123 if (SET_DEST (x
) == pc_rtx
)
3125 else if (GET_CODE (SET_SRC (x
)) == CALL
)
3130 if (GET_CODE (x
) == PARALLEL
)
3133 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
3134 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
3136 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3137 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
3139 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3140 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
3146 /* Emit the rtl pattern X as an appropriate kind of insn.
3147 If X is a label, it is simply added into the insn chain. */
3153 enum rtx_code code
= classify_insn (x
);
3155 if (code
== CODE_LABEL
)
3156 return emit_label (x
);
3157 else if (code
== INSN
)
3158 return emit_insn (x
);
3159 else if (code
== JUMP_INSN
)
3161 register rtx insn
= emit_jump_insn (x
);
3162 if (simplejump_p (insn
) || GET_CODE (x
) == RETURN
)
3163 return emit_barrier ();
3166 else if (code
== CALL_INSN
)
3167 return emit_call_insn (x
);
3172 /* Begin emitting insns to a sequence which can be packaged in an
3173 RTL_EXPR. If this sequence will contain something that might cause
3174 the compiler to pop arguments to function calls (because those
3175 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3176 details), use do_pending_stack_adjust before calling this function.
3177 That will ensure that the deferred pops are not accidentally
3178 emitted in the middel of this sequence. */
3183 struct sequence_stack
*tem
;
3185 if (sequence_element_free_list
)
3187 /* Reuse a previously-saved struct sequence_stack. */
3188 tem
= sequence_element_free_list
;
3189 sequence_element_free_list
= tem
->next
;
3192 tem
= (struct sequence_stack
*) permalloc (sizeof (struct sequence_stack
));
3194 tem
->next
= seq_stack
;
3195 tem
->first
= first_insn
;
3196 tem
->last
= last_insn
;
3197 tem
->sequence_rtl_expr
= seq_rtl_expr
;
3205 /* Similarly, but indicate that this sequence will be placed in T, an
3206 RTL_EXPR. See the documentation for start_sequence for more
3207 information about how to use this function. */
3210 start_sequence_for_rtl_expr (t
)
3218 /* Set up the insn chain starting with FIRST as the current sequence,
3219 saving the previously current one. See the documentation for
3220 start_sequence for more information about how to use this function. */
3223 push_to_sequence (first
)
3230 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
3236 /* Set up the outer-level insn chain
3237 as the current sequence, saving the previously current one. */
3240 push_topmost_sequence ()
3242 struct sequence_stack
*stack
, *top
= NULL
;
3246 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3249 first_insn
= top
->first
;
3250 last_insn
= top
->last
;
3251 seq_rtl_expr
= top
->sequence_rtl_expr
;
3254 /* After emitting to the outer-level insn chain, update the outer-level
3255 insn chain, and restore the previous saved state. */
3258 pop_topmost_sequence ()
3260 struct sequence_stack
*stack
, *top
= NULL
;
3262 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3265 top
->first
= first_insn
;
3266 top
->last
= last_insn
;
3267 /* ??? Why don't we save seq_rtl_expr here? */
3272 /* After emitting to a sequence, restore previous saved state.
3274 To get the contents of the sequence just made, you must call
3275 `gen_sequence' *before* calling here.
3277 If the compiler might have deferred popping arguments while
3278 generating this sequence, and this sequence will not be immediately
3279 inserted into the instruction stream, use do_pending_stack_adjust
3280 before calling gen_sequence. That will ensure that the deferred
3281 pops are inserted into this sequence, and not into some random
3282 location in the instruction stream. See INHIBIT_DEFER_POP for more
3283 information about deferred popping of arguments. */
3288 struct sequence_stack
*tem
= seq_stack
;
3290 first_insn
= tem
->first
;
3291 last_insn
= tem
->last
;
3292 seq_rtl_expr
= tem
->sequence_rtl_expr
;
3293 seq_stack
= tem
->next
;
3295 tem
->next
= sequence_element_free_list
;
3296 sequence_element_free_list
= tem
;
3299 /* Return 1 if currently emitting into a sequence. */
3304 return seq_stack
!= 0;
3307 /* Generate a SEQUENCE rtx containing the insns already emitted
3308 to the current sequence.
3310 This is how the gen_... function from a DEFINE_EXPAND
3311 constructs the SEQUENCE that it returns. */
3321 /* Count the insns in the chain. */
3323 for (tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
))
3326 /* If only one insn, return its pattern rather than a SEQUENCE.
3327 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3328 the case of an empty list.) */
3330 && ! RTX_FRAME_RELATED_P (first_insn
)
3331 && (GET_CODE (first_insn
) == INSN
3332 || GET_CODE (first_insn
) == JUMP_INSN
3333 /* Don't discard the call usage field. */
3334 || (GET_CODE (first_insn
) == CALL_INSN
3335 && CALL_INSN_FUNCTION_USAGE (first_insn
) == NULL_RTX
)))
3337 NEXT_INSN (first_insn
) = free_insn
;
3338 free_insn
= first_insn
;
3339 return PATTERN (first_insn
);
3342 /* Put them in a vector. See if we already have a SEQUENCE of the
3343 appropriate length around. */
3344 if (len
< SEQUENCE_RESULT_SIZE
&& (result
= sequence_result
[len
]) != 0)
3345 sequence_result
[len
] = 0;
3348 /* Ensure that this rtl goes in saveable_obstack, since we may
3350 push_obstacks_nochange ();
3351 rtl_in_saveable_obstack ();
3352 result
= gen_rtx_SEQUENCE (VOIDmode
, rtvec_alloc (len
));
3356 for (i
= 0, tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
), i
++)
3357 XVECEXP (result
, 0, i
) = tem
;
3362 /* Put the various virtual registers into REGNO_REG_RTX. */
3365 init_virtual_regs (es
)
3366 struct emit_status
*es
;
3368 rtx
*ptr
= es
->x_regno_reg_rtx
;
3369 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
3370 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
3371 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
3372 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
3373 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
3377 clear_emit_caches ()
3381 /* Clear the start_sequence/gen_sequence cache. */
3382 sequence_element_free_list
= 0;
3383 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
3384 sequence_result
[i
] = 0;
3388 /* Initialize data structures and variables in this file
3389 before generating rtl for each function. */
3394 struct function
*f
= current_function
;
3396 f
->emit
= (struct emit_status
*) xmalloc (sizeof (struct emit_status
));
3399 seq_rtl_expr
= NULL
;
3401 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
3404 first_label_num
= label_num
;
3408 clear_emit_caches ();
3410 /* Init the tables that describe all the pseudo regs. */
3412 f
->emit
->regno_pointer_flag_length
= LAST_VIRTUAL_REGISTER
+ 101;
3414 f
->emit
->regno_pointer_flag
3415 = (char *) savealloc (f
->emit
->regno_pointer_flag_length
);
3416 bzero (f
->emit
->regno_pointer_flag
, f
->emit
->regno_pointer_flag_length
);
3418 f
->emit
->regno_pointer_align
3419 = (char *) savealloc (f
->emit
->regno_pointer_flag_length
);
3420 bzero (f
->emit
->regno_pointer_align
, f
->emit
->regno_pointer_flag_length
);
3423 = (rtx
*) savealloc (f
->emit
->regno_pointer_flag_length
* sizeof (rtx
));
3424 bzero ((char *) regno_reg_rtx
,
3425 f
->emit
->regno_pointer_flag_length
* sizeof (rtx
));
3427 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3428 init_virtual_regs (f
->emit
);
3430 /* Indicate that the virtual registers and stack locations are
3432 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM
) = 1;
3433 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM
) = 1;
3434 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM
) = 1;
3435 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM
) = 1;
3437 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM
) = 1;
3438 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM
) = 1;
3439 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM
) = 1;
3440 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM
) = 1;
3441 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM
) = 1;
3443 #ifdef STACK_BOUNDARY
3444 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3445 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3446 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
)
3447 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3448 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3450 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
)
3451 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3452 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
)
3453 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3454 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
)
3455 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3456 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
)
3457 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3458 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = UNITS_PER_WORD
;
3461 #ifdef INIT_EXPANDERS
3466 /* Create some permanent unique rtl objects shared between all functions.
3467 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3470 init_emit_once (line_numbers
)
3474 enum machine_mode mode
;
3475 enum machine_mode double_mode
;
3477 no_line_numbers
= ! line_numbers
;
3479 /* Compute the word and byte modes. */
3481 byte_mode
= VOIDmode
;
3482 word_mode
= VOIDmode
;
3483 double_mode
= VOIDmode
;
3485 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
3486 mode
= GET_MODE_WIDER_MODE (mode
))
3488 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
3489 && byte_mode
== VOIDmode
)
3492 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
3493 && word_mode
== VOIDmode
)
3497 #ifndef DOUBLE_TYPE_SIZE
3498 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
3501 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
3502 mode
= GET_MODE_WIDER_MODE (mode
))
3504 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
3505 && double_mode
== VOIDmode
)
3509 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
3511 /* Create the unique rtx's for certain rtx codes and operand values. */
3513 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
3515 PUT_CODE (&const_int_rtx
[i
+ MAX_SAVED_CONST_INT
], CONST_INT
);
3516 PUT_MODE (&const_int_rtx
[i
+ MAX_SAVED_CONST_INT
], VOIDmode
);
3517 INTVAL (&const_int_rtx
[i
+ MAX_SAVED_CONST_INT
]) = i
;
3520 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
3521 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
3522 const_true_rtx
= &const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
3524 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
3526 dconst0
= REAL_VALUE_ATOF ("0", double_mode
);
3527 dconst1
= REAL_VALUE_ATOF ("1", double_mode
);
3528 dconst2
= REAL_VALUE_ATOF ("2", double_mode
);
3529 dconstm1
= REAL_VALUE_ATOF ("-1", double_mode
);
3531 for (i
= 0; i
<= 2; i
++)
3533 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
3534 mode
= GET_MODE_WIDER_MODE (mode
))
3536 rtx tem
= rtx_alloc (CONST_DOUBLE
);
3537 union real_extract u
;
3539 bzero ((char *) &u
, sizeof u
); /* Zero any holes in a structure. */
3540 u
.d
= i
== 0 ? dconst0
: i
== 1 ? dconst1
: dconst2
;
3542 bcopy ((char *) &u
, (char *) &CONST_DOUBLE_LOW (tem
), sizeof u
);
3543 CONST_DOUBLE_MEM (tem
) = cc0_rtx
;
3544 PUT_MODE (tem
, mode
);
3546 const_tiny_rtx
[i
][(int) mode
] = tem
;
3549 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
3551 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
3552 mode
= GET_MODE_WIDER_MODE (mode
))
3553 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
3555 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
3557 mode
= GET_MODE_WIDER_MODE (mode
))
3558 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
3561 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_CC
); mode
!= VOIDmode
;
3562 mode
= GET_MODE_WIDER_MODE (mode
))
3563 const_tiny_rtx
[0][(int) mode
] = const0_rtx
;
3566 /* Assign register numbers to the globally defined register rtx.
3567 This must be done at runtime because the register number field
3568 is in a union and some compilers can't initialize unions. */
3570 REGNO (stack_pointer_rtx
) = STACK_POINTER_REGNUM
;
3571 PUT_MODE (stack_pointer_rtx
, Pmode
);
3572 REGNO (frame_pointer_rtx
) = FRAME_POINTER_REGNUM
;
3573 PUT_MODE (frame_pointer_rtx
, Pmode
);
3574 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3575 REGNO (hard_frame_pointer_rtx
) = HARD_FRAME_POINTER_REGNUM
;
3576 PUT_MODE (hard_frame_pointer_rtx
, Pmode
);
3578 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3579 REGNO (arg_pointer_rtx
) = ARG_POINTER_REGNUM
;
3580 PUT_MODE (arg_pointer_rtx
, Pmode
);
3583 REGNO (virtual_incoming_args_rtx
) = VIRTUAL_INCOMING_ARGS_REGNUM
;
3584 PUT_MODE (virtual_incoming_args_rtx
, Pmode
);
3585 REGNO (virtual_stack_vars_rtx
) = VIRTUAL_STACK_VARS_REGNUM
;
3586 PUT_MODE (virtual_stack_vars_rtx
, Pmode
);
3587 REGNO (virtual_stack_dynamic_rtx
) = VIRTUAL_STACK_DYNAMIC_REGNUM
;
3588 PUT_MODE (virtual_stack_dynamic_rtx
, Pmode
);
3589 REGNO (virtual_outgoing_args_rtx
) = VIRTUAL_OUTGOING_ARGS_REGNUM
;
3590 PUT_MODE (virtual_outgoing_args_rtx
, Pmode
);
3591 REGNO (virtual_cfa_rtx
) = VIRTUAL_CFA_REGNUM
;
3592 PUT_MODE (virtual_cfa_rtx
, Pmode
);
3594 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3595 return_address_pointer_rtx
3596 = gen_rtx_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
3600 struct_value_rtx
= STRUCT_VALUE
;
3602 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
3605 #ifdef STRUCT_VALUE_INCOMING
3606 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
3608 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3609 struct_value_incoming_rtx
3610 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
3612 struct_value_incoming_rtx
= struct_value_rtx
;
3616 #ifdef STATIC_CHAIN_REGNUM
3617 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
3619 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3620 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
3621 static_chain_incoming_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
3624 static_chain_incoming_rtx
= static_chain_rtx
;
3628 static_chain_rtx
= STATIC_CHAIN
;
3630 #ifdef STATIC_CHAIN_INCOMING
3631 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
3633 static_chain_incoming_rtx
= static_chain_rtx
;
3637 #ifdef PIC_OFFSET_TABLE_REGNUM
3638 pic_offset_table_rtx
= gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
3641 #ifdef INIT_EXPANDERS
3642 /* This is to initialize save_machine_status and restore_machine_status before
3643 the first call to push_function_context_to. This is needed by the Chill
3644 front end which calls push_function_context_to before the first cal to
3645 init_function_start. */
3650 /* Query and clear/ restore no_line_numbers. This is used by the
3651 switch / case handling in stmt.c to give proper line numbers in
3652 warnings about unreachable code. */
3655 force_line_numbers ()
3657 int old
= no_line_numbers
;
3659 no_line_numbers
= 0;
3661 force_next_line_note ();
3666 restore_line_number_status (old_value
)
3669 no_line_numbers
= old_value
;