1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num
= 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num
;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num
;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers
;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these except perhaps the floating-point CONST_DOUBLEs
90 are unique; no other rtx-object will be equal to any of these. */
92 rtx global_rtl
[GR_MAX
];
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
102 REAL_VALUE_TYPE dconst0
;
103 REAL_VALUE_TYPE dconst1
;
104 REAL_VALUE_TYPE dconst2
;
105 REAL_VALUE_TYPE dconstm1
;
107 /* All references to the following fixed hard registers go through
108 these unique rtl objects. On machines where the frame-pointer and
109 arg-pointer are the same register, they use the same unique object.
111 After register allocation, other rtl objects which used to be pseudo-regs
112 may be clobbered to refer to the frame-pointer register.
113 But references that were originally to the frame-pointer can be
114 distinguished from the others because they contain frame_pointer_rtx.
116 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
117 tricky: until register elimination has taken place hard_frame_pointer_rtx
118 should be used if it is being set, and frame_pointer_rtx otherwise. After
119 register elimination hard_frame_pointer_rtx should always be used.
120 On machines where the two registers are same (most) then these are the
123 In an inline procedure, the stack and frame pointer rtxs may not be
124 used for anything else. */
125 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
126 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
127 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
140 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static htab_t const_int_htab
;
147 /* A hash table storing memory attribute structures. */
148 static htab_t mem_attrs_htab
;
150 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
151 shortly thrown away. We use two mechanisms to prevent this waste:
153 For sizes up to 5 elements, we keep a SEQUENCE and its associated
154 rtvec for use by gen_sequence. One entry for each size is
155 sufficient because most cases are calls to gen_sequence followed by
156 immediately emitting the SEQUENCE. Reuse is safe since emitting a
157 sequence is destructive on the insn in it anyway and hence can't be
160 We do not bother to save this cached data over nested function calls.
161 Instead, we just reinitialize them. */
163 #define SEQUENCE_RESULT_SIZE 5
165 static rtx sequence_result
[SEQUENCE_RESULT_SIZE
];
167 /* During RTL generation, we also keep a list of free INSN rtl codes. */
168 static rtx free_insn
;
170 #define first_insn (cfun->emit->x_first_insn)
171 #define last_insn (cfun->emit->x_last_insn)
172 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
173 #define last_linenum (cfun->emit->x_last_linenum)
174 #define last_filename (cfun->emit->x_last_filename)
175 #define first_label_num (cfun->emit->x_first_label_num)
177 static rtx make_jump_insn_raw
PARAMS ((rtx
));
178 static rtx make_call_insn_raw
PARAMS ((rtx
));
179 static rtx find_line_note
PARAMS ((rtx
));
180 static void mark_sequence_stack
PARAMS ((struct sequence_stack
*));
181 static rtx change_address_1
PARAMS ((rtx
, enum machine_mode
, rtx
,
183 static void unshare_all_rtl_1
PARAMS ((rtx
));
184 static void unshare_all_decls
PARAMS ((tree
));
185 static void reset_used_decls
PARAMS ((tree
));
186 static void mark_label_nuses
PARAMS ((rtx
));
187 static hashval_t const_int_htab_hash
PARAMS ((const void *));
188 static int const_int_htab_eq
PARAMS ((const void *,
190 static hashval_t mem_attrs_htab_hash
PARAMS ((const void *));
191 static int mem_attrs_htab_eq
PARAMS ((const void *,
193 static void mem_attrs_mark
PARAMS ((const void *));
194 static mem_attrs
*get_mem_attrs
PARAMS ((HOST_WIDE_INT
, tree
, rtx
,
197 /* Probability of the conditional branch currently proceeded by try_split.
198 Set to -1 otherwise. */
199 int split_branch_probability
= -1;
201 /* Returns a hash code for X (which is a really a CONST_INT). */
204 const_int_htab_hash (x
)
207 return (hashval_t
) INTVAL ((const struct rtx_def
*) x
);
210 /* Returns non-zero if the value represented by X (which is really a
211 CONST_INT) is the same as that given by Y (which is really a
215 const_int_htab_eq (x
, y
)
219 return (INTVAL ((const struct rtx_def
*) x
) == *((const HOST_WIDE_INT
*) y
));
222 /* Returns a hash code for X (which is a really a mem_attrs *). */
225 mem_attrs_htab_hash (x
)
228 mem_attrs
*p
= (mem_attrs
*) x
;
230 return (p
->alias
^ (p
->align
* 1000)
231 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
232 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
236 /* Returns non-zero if the value represented by X (which is really a
237 mem_attrs *) is the same as that given by Y (which is also really a
241 mem_attrs_htab_eq (x
, y
)
245 mem_attrs
*p
= (mem_attrs
*) x
;
246 mem_attrs
*q
= (mem_attrs
*) y
;
248 return (p
->alias
== q
->alias
&& p
->decl
== q
->decl
&& p
->offset
== q
->offset
249 && p
->size
== q
->size
&& p
->align
== q
->align
);
252 /* This routine is called when we determine that we need a mem_attrs entry.
253 It marks the associated decl and RTL as being used, if present. */
259 mem_attrs
*p
= (mem_attrs
*) x
;
262 ggc_mark_tree (p
->decl
);
265 ggc_mark_rtx (p
->offset
);
268 ggc_mark_rtx (p
->size
);
271 /* Allocate a new mem_attrs structure and insert it into the hash table if
272 one identical to it is not already in the table. */
275 get_mem_attrs (alias
, decl
, offset
, size
, align
)
287 attrs
.offset
= offset
;
291 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
294 *slot
= ggc_alloc (sizeof (mem_attrs
));
295 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
301 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
302 don't attempt to share with the various global pieces of rtl (such as
303 frame_pointer_rtx). */
306 gen_raw_REG (mode
, regno
)
307 enum machine_mode mode
;
310 rtx x
= gen_rtx_raw_REG (mode
, regno
);
311 ORIGINAL_REGNO (x
) = regno
;
315 /* There are some RTL codes that require special attention; the generation
316 functions do the raw handling. If you add to this list, modify
317 special_rtx in gengenrtl.c as well. */
320 gen_rtx_CONST_INT (mode
, arg
)
321 enum machine_mode mode ATTRIBUTE_UNUSED
;
326 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
327 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
329 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
330 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
331 return const_true_rtx
;
334 /* Look up the CONST_INT in the hash table. */
335 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
336 (hashval_t
) arg
, INSERT
);
338 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
343 /* CONST_DOUBLEs needs special handling because their length is known
347 gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
, arg2
)
348 enum machine_mode mode
;
350 HOST_WIDE_INT arg1
, arg2
;
352 rtx r
= rtx_alloc (CONST_DOUBLE
);
357 X0EXP (r
, 1) = NULL_RTX
;
361 for (i
= GET_RTX_LENGTH (CONST_DOUBLE
) - 1; i
> 3; --i
)
368 gen_rtx_REG (mode
, regno
)
369 enum machine_mode mode
;
372 /* In case the MD file explicitly references the frame pointer, have
373 all such references point to the same frame pointer. This is
374 used during frame pointer elimination to distinguish the explicit
375 references to these registers from pseudos that happened to be
378 If we have eliminated the frame pointer or arg pointer, we will
379 be using it as a normal register, for example as a spill
380 register. In such cases, we might be accessing it in a mode that
381 is not Pmode and therefore cannot use the pre-allocated rtx.
383 Also don't do this when we are making new REGs in reload, since
384 we don't want to get confused with the real pointers. */
386 if (mode
== Pmode
&& !reload_in_progress
)
388 if (regno
== FRAME_POINTER_REGNUM
)
389 return frame_pointer_rtx
;
390 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
391 if (regno
== HARD_FRAME_POINTER_REGNUM
)
392 return hard_frame_pointer_rtx
;
394 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
395 if (regno
== ARG_POINTER_REGNUM
)
396 return arg_pointer_rtx
;
398 #ifdef RETURN_ADDRESS_POINTER_REGNUM
399 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
400 return return_address_pointer_rtx
;
402 if (regno
== STACK_POINTER_REGNUM
)
403 return stack_pointer_rtx
;
406 return gen_raw_REG (mode
, regno
);
410 gen_rtx_MEM (mode
, addr
)
411 enum machine_mode mode
;
414 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
416 /* This field is not cleared by the mere allocation of the rtx, so
424 gen_rtx_SUBREG (mode
, reg
, offset
)
425 enum machine_mode mode
;
429 /* This is the most common failure type.
430 Catch it early so we can see who does it. */
431 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
434 /* This check isn't usable right now because combine will
435 throw arbitrary crap like a CALL into a SUBREG in
436 gen_lowpart_for_combine so we must just eat it. */
438 /* Check for this too. */
439 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
442 return gen_rtx_fmt_ei (SUBREG
, mode
, reg
, offset
);
445 /* Generate a SUBREG representing the least-significant part of REG if MODE
446 is smaller than mode of REG, otherwise paradoxical SUBREG. */
449 gen_lowpart_SUBREG (mode
, reg
)
450 enum machine_mode mode
;
453 enum machine_mode inmode
;
455 inmode
= GET_MODE (reg
);
456 if (inmode
== VOIDmode
)
458 return gen_rtx_SUBREG (mode
, reg
,
459 subreg_lowpart_offset (mode
, inmode
));
462 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
464 ** This routine generates an RTX of the size specified by
465 ** <code>, which is an RTX code. The RTX structure is initialized
466 ** from the arguments <element1> through <elementn>, which are
467 ** interpreted according to the specific RTX type's format. The
468 ** special machine mode associated with the rtx (if any) is specified
471 ** gen_rtx can be invoked in a way which resembles the lisp-like
472 ** rtx it will generate. For example, the following rtx structure:
474 ** (plus:QI (mem:QI (reg:SI 1))
475 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
477 ** ...would be generated by the following C code:
479 ** gen_rtx (PLUS, QImode,
480 ** gen_rtx (MEM, QImode,
481 ** gen_rtx (REG, SImode, 1)),
482 ** gen_rtx (MEM, QImode,
483 ** gen_rtx (PLUS, SImode,
484 ** gen_rtx (REG, SImode, 2),
485 ** gen_rtx (REG, SImode, 3)))),
490 gen_rtx
VPARAMS ((enum rtx_code code
, enum machine_mode mode
, ...))
492 int i
; /* Array indices... */
493 const char *fmt
; /* Current rtx's format... */
494 rtx rt_val
; /* RTX to return to caller... */
497 VA_FIXEDARG (p
, enum rtx_code
, code
);
498 VA_FIXEDARG (p
, enum machine_mode
, mode
);
503 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
508 rtx arg0
= va_arg (p
, rtx
);
509 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
510 HOST_WIDE_INT arg2
= va_arg (p
, HOST_WIDE_INT
);
511 rt_val
= gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
, arg2
);
516 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
520 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
524 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
525 rt_val
->mode
= mode
; /* Store the machine mode... */
527 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
528 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
532 case '0': /* Unused field. */
535 case 'i': /* An integer? */
536 XINT (rt_val
, i
) = va_arg (p
, int);
539 case 'w': /* A wide integer? */
540 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
543 case 's': /* A string? */
544 XSTR (rt_val
, i
) = va_arg (p
, char *);
547 case 'e': /* An expression? */
548 case 'u': /* An insn? Same except when printing. */
549 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
552 case 'E': /* An RTX vector? */
553 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
556 case 'b': /* A bitmap? */
557 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
560 case 't': /* A tree? */
561 XTREE (rt_val
, i
) = va_arg (p
, tree
);
575 /* gen_rtvec (n, [rt1, ..., rtn])
577 ** This routine creates an rtvec and stores within it the
578 ** pointers to rtx's which are its arguments.
583 gen_rtvec
VPARAMS ((int n
, ...))
589 VA_FIXEDARG (p
, int, n
);
592 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
594 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
596 for (i
= 0; i
< n
; i
++)
597 vector
[i
] = va_arg (p
, rtx
);
599 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
603 return gen_rtvec_v (save_n
, vector
);
607 gen_rtvec_v (n
, argp
)
615 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
617 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
619 for (i
= 0; i
< n
; i
++)
620 rt_val
->elem
[i
] = *argp
++;
625 /* Generate a REG rtx for a new pseudo register of mode MODE.
626 This pseudo is assigned the next sequential register number. */
630 enum machine_mode mode
;
632 struct function
*f
= cfun
;
635 /* Don't let anything called after initial flow analysis create new
640 if (generating_concat_p
641 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
642 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
644 /* For complex modes, don't make a single pseudo.
645 Instead, make a CONCAT of two pseudos.
646 This allows noncontiguous allocation of the real and imaginary parts,
647 which makes much better code. Besides, allocating DCmode
648 pseudos overstrains reload on some machines like the 386. */
649 rtx realpart
, imagpart
;
650 int size
= GET_MODE_UNIT_SIZE (mode
);
651 enum machine_mode partmode
652 = mode_for_size (size
* BITS_PER_UNIT
,
653 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
654 ? MODE_FLOAT
: MODE_INT
),
657 realpart
= gen_reg_rtx (partmode
);
658 imagpart
= gen_reg_rtx (partmode
);
659 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
662 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
663 enough to have an element for this pseudo reg number. */
665 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
667 int old_size
= f
->emit
->regno_pointer_align_length
;
672 new = xrealloc (f
->emit
->regno_pointer_align
, old_size
* 2);
673 memset (new + old_size
, 0, old_size
);
674 f
->emit
->regno_pointer_align
= (unsigned char *) new;
676 new1
= (rtx
*) xrealloc (f
->emit
->x_regno_reg_rtx
,
677 old_size
* 2 * sizeof (rtx
));
678 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
679 regno_reg_rtx
= new1
;
681 new2
= (tree
*) xrealloc (f
->emit
->regno_decl
,
682 old_size
* 2 * sizeof (tree
));
683 memset (new2
+ old_size
, 0, old_size
* sizeof (tree
));
684 f
->emit
->regno_decl
= new2
;
686 f
->emit
->regno_pointer_align_length
= old_size
* 2;
689 val
= gen_raw_REG (mode
, reg_rtx_no
);
690 regno_reg_rtx
[reg_rtx_no
++] = val
;
694 /* Identify REG (which may be a CONCAT) as a user register. */
700 if (GET_CODE (reg
) == CONCAT
)
702 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
703 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
705 else if (GET_CODE (reg
) == REG
)
706 REG_USERVAR_P (reg
) = 1;
711 /* Identify REG as a probable pointer register and show its alignment
712 as ALIGN, if nonzero. */
715 mark_reg_pointer (reg
, align
)
719 if (! REG_POINTER (reg
))
721 REG_POINTER (reg
) = 1;
724 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
726 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
727 /* We can no-longer be sure just how aligned this pointer is */
728 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
731 /* Return 1 plus largest pseudo reg number used in the current function. */
739 /* Return 1 + the largest label number used so far in the current function. */
744 if (last_label_num
&& label_num
== base_label_num
)
745 return last_label_num
;
749 /* Return first label number used in this function (if any were used). */
752 get_first_label_num ()
754 return first_label_num
;
757 /* Return the final regno of X, which is a SUBREG of a hard
760 subreg_hard_regno (x
, check_mode
)
764 enum machine_mode mode
= GET_MODE (x
);
765 unsigned int byte_offset
, base_regno
, final_regno
;
766 rtx reg
= SUBREG_REG (x
);
768 /* This is where we attempt to catch illegal subregs
769 created by the compiler. */
770 if (GET_CODE (x
) != SUBREG
771 || GET_CODE (reg
) != REG
)
773 base_regno
= REGNO (reg
);
774 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
776 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
779 /* Catch non-congruent offsets too. */
780 byte_offset
= SUBREG_BYTE (x
);
781 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
784 final_regno
= subreg_regno (x
);
789 /* Return a value representing some low-order bits of X, where the number
790 of low-order bits is given by MODE. Note that no conversion is done
791 between floating-point and fixed-point values, rather, the bit
792 representation is returned.
794 This function handles the cases in common between gen_lowpart, below,
795 and two variants in cse.c and combine.c. These are the cases that can
796 be safely handled at all points in the compilation.
798 If this is not a case we can handle, return 0. */
801 gen_lowpart_common (mode
, x
)
802 enum machine_mode mode
;
805 int msize
= GET_MODE_SIZE (mode
);
806 int xsize
= GET_MODE_SIZE (GET_MODE (x
));
809 if (GET_MODE (x
) == mode
)
812 /* MODE must occupy no more words than the mode of X. */
813 if (GET_MODE (x
) != VOIDmode
814 && ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
815 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
818 offset
= subreg_lowpart_offset (mode
, GET_MODE (x
));
820 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
821 && (GET_MODE_CLASS (mode
) == MODE_INT
822 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
824 /* If we are getting the low-order part of something that has been
825 sign- or zero-extended, we can either just use the object being
826 extended or make a narrower extension. If we want an even smaller
827 piece than the size of the object being extended, call ourselves
830 This case is used mostly by combine and cse. */
832 if (GET_MODE (XEXP (x
, 0)) == mode
)
834 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
835 return gen_lowpart_common (mode
, XEXP (x
, 0));
836 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
837 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
839 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
840 || GET_CODE (x
) == CONCAT
)
841 return simplify_gen_subreg (mode
, x
, GET_MODE (x
), offset
);
842 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
843 from the low-order part of the constant. */
844 else if ((GET_MODE_CLASS (mode
) == MODE_INT
845 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
846 && GET_MODE (x
) == VOIDmode
847 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
849 /* If MODE is twice the host word size, X is already the desired
850 representation. Otherwise, if MODE is wider than a word, we can't
851 do this. If MODE is exactly a word, return just one CONST_INT. */
853 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
855 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
857 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
858 return (GET_CODE (x
) == CONST_INT
? x
859 : GEN_INT (CONST_DOUBLE_LOW (x
)));
862 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
863 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
864 : CONST_DOUBLE_LOW (x
));
866 /* Sign extend to HOST_WIDE_INT. */
867 val
= trunc_int_for_mode (val
, mode
);
869 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
874 #ifndef REAL_ARITHMETIC
875 /* If X is an integral constant but we want it in floating-point, it
876 must be the case that we have a union of an integer and a floating-point
877 value. If the machine-parameters allow it, simulate that union here
878 and return the result. The two-word and single-word cases are
881 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
882 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
883 || flag_pretend_float
)
884 && GET_MODE_CLASS (mode
) == MODE_FLOAT
885 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
886 && GET_CODE (x
) == CONST_INT
887 && sizeof (float) * HOST_BITS_PER_CHAR
== HOST_BITS_PER_WIDE_INT
)
889 union {HOST_WIDE_INT i
; float d
; } u
;
892 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
894 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
895 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
896 || flag_pretend_float
)
897 && GET_MODE_CLASS (mode
) == MODE_FLOAT
898 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
899 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
900 && GET_MODE (x
) == VOIDmode
901 && (sizeof (double) * HOST_BITS_PER_CHAR
902 == 2 * HOST_BITS_PER_WIDE_INT
))
904 union {HOST_WIDE_INT i
[2]; double d
; } u
;
905 HOST_WIDE_INT low
, high
;
907 if (GET_CODE (x
) == CONST_INT
)
908 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
910 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
912 #ifdef HOST_WORDS_BIG_ENDIAN
913 u
.i
[0] = high
, u
.i
[1] = low
;
915 u
.i
[0] = low
, u
.i
[1] = high
;
918 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
921 /* Similarly, if this is converting a floating-point value into a
922 single-word integer. Only do this is the host and target parameters are
925 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
926 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
927 || flag_pretend_float
)
928 && (GET_MODE_CLASS (mode
) == MODE_INT
929 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
930 && GET_CODE (x
) == CONST_DOUBLE
931 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
932 && GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
)
933 return constant_subword (x
, (offset
/ UNITS_PER_WORD
), GET_MODE (x
));
935 /* Similarly, if this is converting a floating-point value into a
936 two-word integer, we can do this one word at a time and make an
937 integer. Only do this is the host and target parameters are
940 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
941 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
942 || flag_pretend_float
)
943 && (GET_MODE_CLASS (mode
) == MODE_INT
944 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
945 && GET_CODE (x
) == CONST_DOUBLE
946 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
947 && GET_MODE_BITSIZE (mode
) == 2 * BITS_PER_WORD
)
949 rtx lowpart
, highpart
;
951 lowpart
= constant_subword (x
,
952 (offset
/ UNITS_PER_WORD
) + WORDS_BIG_ENDIAN
,
954 highpart
= constant_subword (x
,
955 (offset
/ UNITS_PER_WORD
) + (! WORDS_BIG_ENDIAN
),
957 if (lowpart
&& GET_CODE (lowpart
) == CONST_INT
958 && highpart
&& GET_CODE (highpart
) == CONST_INT
)
959 return immed_double_const (INTVAL (lowpart
), INTVAL (highpart
), mode
);
961 #else /* ifndef REAL_ARITHMETIC */
963 /* When we have a FP emulator, we can handle all conversions between
964 FP and integer operands. This simplifies reload because it
965 doesn't have to deal with constructs like (subreg:DI
966 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
967 /* Single-precision floats are always 32-bits and double-precision
968 floats are always 64-bits. */
970 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
971 && GET_MODE_BITSIZE (mode
) == 32
972 && GET_CODE (x
) == CONST_INT
)
978 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
979 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
981 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
982 && GET_MODE_BITSIZE (mode
) == 64
983 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
984 && GET_MODE (x
) == VOIDmode
)
988 HOST_WIDE_INT low
, high
;
990 if (GET_CODE (x
) == CONST_INT
)
993 high
= low
>> (HOST_BITS_PER_WIDE_INT
- 1);
997 low
= CONST_DOUBLE_LOW (x
);
998 high
= CONST_DOUBLE_HIGH (x
);
1001 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1003 if (WORDS_BIG_ENDIAN
)
1004 i
[0] = high
, i
[1] = low
;
1006 i
[0] = low
, i
[1] = high
;
1008 r
= REAL_VALUE_FROM_TARGET_DOUBLE (i
);
1009 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1011 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1012 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1013 && GET_CODE (x
) == CONST_DOUBLE
1014 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
1017 long i
[4]; /* Only the low 32 bits of each 'long' are used. */
1018 int endian
= WORDS_BIG_ENDIAN
? 1 : 0;
1020 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
1021 switch (GET_MODE_BITSIZE (GET_MODE (x
)))
1024 REAL_VALUE_TO_TARGET_SINGLE (r
, i
[endian
]);
1028 REAL_VALUE_TO_TARGET_DOUBLE (r
, i
);
1031 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
+ endian
);
1035 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
);
1041 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1043 #if HOST_BITS_PER_WIDE_INT == 32
1044 return immed_double_const (i
[endian
], i
[1 - endian
], mode
);
1049 if (HOST_BITS_PER_WIDE_INT
!= 64)
1052 for (c
= 0; c
< 4; c
++)
1055 switch (GET_MODE_BITSIZE (GET_MODE (x
)))
1059 return immed_double_const (((unsigned long) i
[endian
]) |
1060 (((HOST_WIDE_INT
) i
[1-endian
]) << 32),
1064 return immed_double_const (((unsigned long) i
[endian
*3]) |
1065 (((HOST_WIDE_INT
) i
[1+endian
]) << 32),
1066 ((unsigned long) i
[2-endian
]) |
1067 (((HOST_WIDE_INT
) i
[3-endian
*3]) << 32),
1075 #endif /* ifndef REAL_ARITHMETIC */
1077 /* Otherwise, we can't do this. */
1081 /* Return the real part (which has mode MODE) of a complex value X.
1082 This always comes at the low address in memory. */
1085 gen_realpart (mode
, x
)
1086 enum machine_mode mode
;
1089 if (WORDS_BIG_ENDIAN
1090 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1092 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1094 ("Can't access real part of complex value in hard register");
1095 else if (WORDS_BIG_ENDIAN
)
1096 return gen_highpart (mode
, x
);
1098 return gen_lowpart (mode
, x
);
1101 /* Return the imaginary part (which has mode MODE) of a complex value X.
1102 This always comes at the high address in memory. */
1105 gen_imagpart (mode
, x
)
1106 enum machine_mode mode
;
1109 if (WORDS_BIG_ENDIAN
)
1110 return gen_lowpart (mode
, x
);
1111 else if (! WORDS_BIG_ENDIAN
1112 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1114 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1116 ("can't access imaginary part of complex value in hard register");
1118 return gen_highpart (mode
, x
);
1121 /* Return 1 iff X, assumed to be a SUBREG,
1122 refers to the real part of the complex value in its containing reg.
1123 Complex values are always stored with the real part in the first word,
1124 regardless of WORDS_BIG_ENDIAN. */
1127 subreg_realpart_p (x
)
1130 if (GET_CODE (x
) != SUBREG
)
1133 return ((unsigned int) SUBREG_BYTE (x
)
1134 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1137 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1138 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1139 least-significant part of X.
1140 MODE specifies how big a part of X to return;
1141 it usually should not be larger than a word.
1142 If X is a MEM whose address is a QUEUED, the value may be so also. */
1145 gen_lowpart (mode
, x
)
1146 enum machine_mode mode
;
1149 rtx result
= gen_lowpart_common (mode
, x
);
1153 else if (GET_CODE (x
) == REG
)
1155 /* Must be a hard reg that's not valid in MODE. */
1156 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1161 else if (GET_CODE (x
) == MEM
)
1163 /* The only additional case we can do is MEM. */
1165 if (WORDS_BIG_ENDIAN
)
1166 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1167 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1169 if (BYTES_BIG_ENDIAN
)
1170 /* Adjust the address so that the address-after-the-data
1172 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1173 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1175 return adjust_address (x
, mode
, offset
);
1177 else if (GET_CODE (x
) == ADDRESSOF
)
1178 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1183 /* Like `gen_lowpart', but refer to the most significant part.
1184 This is used to access the imaginary part of a complex number. */
1187 gen_highpart (mode
, x
)
1188 enum machine_mode mode
;
1191 unsigned int msize
= GET_MODE_SIZE (mode
);
1194 /* This case loses if X is a subreg. To catch bugs early,
1195 complain if an invalid MODE is used even in other cases. */
1196 if (msize
> UNITS_PER_WORD
1197 && msize
!= GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1200 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1201 subreg_highpart_offset (mode
, GET_MODE (x
)));
1203 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1204 the target if we have a MEM. gen_highpart must return a valid operand,
1205 emitting code if necessary to do so. */
1206 if (GET_CODE (result
) == MEM
)
1207 result
= validize_mem (result
);
1214 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1215 be VOIDmode constant. */
1217 gen_highpart_mode (outermode
, innermode
, exp
)
1218 enum machine_mode outermode
, innermode
;
1221 if (GET_MODE (exp
) != VOIDmode
)
1223 if (GET_MODE (exp
) != innermode
)
1225 return gen_highpart (outermode
, exp
);
1227 return simplify_gen_subreg (outermode
, exp
, innermode
,
1228 subreg_highpart_offset (outermode
, innermode
));
1230 /* Return offset in bytes to get OUTERMODE low part
1231 of the value in mode INNERMODE stored in memory in target format. */
1234 subreg_lowpart_offset (outermode
, innermode
)
1235 enum machine_mode outermode
, innermode
;
1237 unsigned int offset
= 0;
1238 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1242 if (WORDS_BIG_ENDIAN
)
1243 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1244 if (BYTES_BIG_ENDIAN
)
1245 offset
+= difference
% UNITS_PER_WORD
;
1251 /* Return offset in bytes to get OUTERMODE high part
1252 of the value in mode INNERMODE stored in memory in target format. */
1254 subreg_highpart_offset (outermode
, innermode
)
1255 enum machine_mode outermode
, innermode
;
1257 unsigned int offset
= 0;
1258 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1260 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1265 if (! WORDS_BIG_ENDIAN
)
1266 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1267 if (! BYTES_BIG_ENDIAN
)
1268 offset
+= difference
% UNITS_PER_WORD
;
1274 /* Return 1 iff X, assumed to be a SUBREG,
1275 refers to the least significant part of its containing reg.
1276 If X is not a SUBREG, always return 1 (it is its own low part!). */
1279 subreg_lowpart_p (x
)
1282 if (GET_CODE (x
) != SUBREG
)
1284 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1287 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1288 == SUBREG_BYTE (x
));
1292 /* Helper routine for all the constant cases of operand_subword.
1293 Some places invoke this directly. */
1296 constant_subword (op
, offset
, mode
)
1299 enum machine_mode mode
;
1301 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1304 /* If OP is already an integer word, return it. */
1305 if (GET_MODE_CLASS (mode
) == MODE_INT
1306 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1309 #ifdef REAL_ARITHMETIC
1310 /* The output is some bits, the width of the target machine's word.
1311 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1313 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1314 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1315 && GET_MODE_BITSIZE (mode
) == 64
1316 && GET_CODE (op
) == CONST_DOUBLE
)
1321 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1322 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1324 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1325 which the words are written depends on the word endianness.
1326 ??? This is a potential portability problem and should
1327 be fixed at some point.
1329 We must excercise caution with the sign bit. By definition there
1330 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1331 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1332 So we explicitly mask and sign-extend as necessary. */
1333 if (BITS_PER_WORD
== 32)
1336 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1337 return GEN_INT (val
);
1339 #if HOST_BITS_PER_WIDE_INT >= 64
1340 else if (BITS_PER_WORD
>= 64 && offset
== 0)
1342 val
= k
[! WORDS_BIG_ENDIAN
];
1343 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1344 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1345 return GEN_INT (val
);
1348 else if (BITS_PER_WORD
== 16)
1350 val
= k
[offset
>> 1];
1351 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1353 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1354 return GEN_INT (val
);
1359 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1360 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1361 && GET_MODE_BITSIZE (mode
) > 64
1362 && GET_CODE (op
) == CONST_DOUBLE
)
1367 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1368 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1370 if (BITS_PER_WORD
== 32)
1373 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1374 return GEN_INT (val
);
1376 #if HOST_BITS_PER_WIDE_INT >= 64
1377 else if (BITS_PER_WORD
>= 64 && offset
<= 1)
1379 val
= k
[offset
* 2 + ! WORDS_BIG_ENDIAN
];
1380 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1381 val
|= (HOST_WIDE_INT
) k
[offset
* 2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1382 return GEN_INT (val
);
1388 #else /* no REAL_ARITHMETIC */
1389 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1390 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1391 || flag_pretend_float
)
1392 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1393 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1394 && GET_CODE (op
) == CONST_DOUBLE
)
1396 /* The constant is stored in the host's word-ordering,
1397 but we want to access it in the target's word-ordering. Some
1398 compilers don't like a conditional inside macro args, so we have two
1399 copies of the return. */
1400 #ifdef HOST_WORDS_BIG_ENDIAN
1401 return GEN_INT (offset
== WORDS_BIG_ENDIAN
1402 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1404 return GEN_INT (offset
!= WORDS_BIG_ENDIAN
1405 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1408 #endif /* no REAL_ARITHMETIC */
1410 /* Single word float is a little harder, since single- and double-word
1411 values often do not have the same high-order bits. We have already
1412 verified that we want the only defined word of the single-word value. */
1413 #ifdef REAL_ARITHMETIC
1414 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1415 && GET_MODE_BITSIZE (mode
) == 32
1416 && GET_CODE (op
) == CONST_DOUBLE
)
1421 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1422 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1424 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1426 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1428 if (BITS_PER_WORD
== 16)
1430 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1432 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1435 return GEN_INT (val
);
1438 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1439 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1440 || flag_pretend_float
)
1441 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1442 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1443 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1444 && GET_CODE (op
) == CONST_DOUBLE
)
1447 union {float f
; HOST_WIDE_INT i
; } u
;
1449 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1452 return GEN_INT (u
.i
);
1454 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1455 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1456 || flag_pretend_float
)
1457 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1458 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1459 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1460 && GET_CODE (op
) == CONST_DOUBLE
)
1463 union {double d
; HOST_WIDE_INT i
; } u
;
1465 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1468 return GEN_INT (u
.i
);
1470 #endif /* no REAL_ARITHMETIC */
1472 /* The only remaining cases that we can handle are integers.
1473 Convert to proper endianness now since these cases need it.
1474 At this point, offset == 0 means the low-order word.
1476 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1477 in general. However, if OP is (const_int 0), we can just return
1480 if (op
== const0_rtx
)
1483 if (GET_MODE_CLASS (mode
) != MODE_INT
1484 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1485 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1488 if (WORDS_BIG_ENDIAN
)
1489 offset
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - offset
;
1491 /* Find out which word on the host machine this value is in and get
1492 it from the constant. */
1493 val
= (offset
/ size_ratio
== 0
1494 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1495 : (GET_CODE (op
) == CONST_INT
1496 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1498 /* Get the value we want into the low bits of val. */
1499 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1500 val
= ((val
>> ((offset
% size_ratio
) * BITS_PER_WORD
)));
1502 val
= trunc_int_for_mode (val
, word_mode
);
1504 return GEN_INT (val
);
1507 /* Return subword OFFSET of operand OP.
1508 The word number, OFFSET, is interpreted as the word number starting
1509 at the low-order address. OFFSET 0 is the low-order word if not
1510 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1512 If we cannot extract the required word, we return zero. Otherwise,
1513 an rtx corresponding to the requested word will be returned.
1515 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1516 reload has completed, a valid address will always be returned. After
1517 reload, if a valid address cannot be returned, we return zero.
1519 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1520 it is the responsibility of the caller.
1522 MODE is the mode of OP in case it is a CONST_INT.
1524 ??? This is still rather broken for some cases. The problem for the
1525 moment is that all callers of this thing provide no 'goal mode' to
1526 tell us to work with. This exists because all callers were written
1527 in a word based SUBREG world.
1528 Now use of this function can be deprecated by simplify_subreg in most
1533 operand_subword (op
, offset
, validate_address
, mode
)
1535 unsigned int offset
;
1536 int validate_address
;
1537 enum machine_mode mode
;
1539 if (mode
== VOIDmode
)
1540 mode
= GET_MODE (op
);
1542 if (mode
== VOIDmode
)
1545 /* If OP is narrower than a word, fail. */
1547 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1550 /* If we want a word outside OP, return zero. */
1552 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1555 /* Form a new MEM at the requested address. */
1556 if (GET_CODE (op
) == MEM
)
1558 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1560 if (! validate_address
)
1563 else if (reload_completed
)
1565 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1569 return replace_equiv_address (new, XEXP (new, 0));
1572 /* Rest can be handled by simplify_subreg. */
1573 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1576 /* Similar to `operand_subword', but never return 0. If we can't extract
1577 the required subword, put OP into a register and try again. If that fails,
1578 abort. We always validate the address in this case.
1580 MODE is the mode of OP, in case it is CONST_INT. */
1583 operand_subword_force (op
, offset
, mode
)
1585 unsigned int offset
;
1586 enum machine_mode mode
;
1588 rtx result
= operand_subword (op
, offset
, 1, mode
);
1593 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1595 /* If this is a register which can not be accessed by words, copy it
1596 to a pseudo register. */
1597 if (GET_CODE (op
) == REG
)
1598 op
= copy_to_reg (op
);
1600 op
= force_reg (mode
, op
);
1603 result
= operand_subword (op
, offset
, 1, mode
);
1610 /* Given a compare instruction, swap the operands.
1611 A test instruction is changed into a compare of 0 against the operand. */
1614 reverse_comparison (insn
)
1617 rtx body
= PATTERN (insn
);
1620 if (GET_CODE (body
) == SET
)
1621 comp
= SET_SRC (body
);
1623 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1625 if (GET_CODE (comp
) == COMPARE
)
1627 rtx op0
= XEXP (comp
, 0);
1628 rtx op1
= XEXP (comp
, 1);
1629 XEXP (comp
, 0) = op1
;
1630 XEXP (comp
, 1) = op0
;
1634 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1635 CONST0_RTX (GET_MODE (comp
)), comp
);
1636 if (GET_CODE (body
) == SET
)
1637 SET_SRC (body
) = new;
1639 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1644 /* Given REF, a MEM, and T, either the type of X or the expression
1645 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1646 if we are making a new object of this type. */
1649 set_mem_attributes (ref
, t
, objectp
)
1654 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1655 tree decl
= MEM_DECL (ref
);
1656 rtx offset
= MEM_OFFSET (ref
);
1657 rtx size
= MEM_SIZE (ref
);
1658 unsigned int align
= MEM_ALIGN (ref
);
1661 /* It can happen that type_for_mode was given a mode for which there
1662 is no language-level type. In which case it returns NULL, which
1667 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1669 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1670 wrong answer, as it assumes that DECL_RTL already has the right alias
1671 info. Callers should not set DECL_RTL until after the call to
1672 set_mem_attributes. */
1673 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1676 /* Get the alias set from the expression or type (perhaps using a
1677 front-end routine) and use it. */
1678 alias
= get_alias_set (t
);
1680 MEM_VOLATILE_P (ref
) = TYPE_VOLATILE (type
);
1681 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1682 RTX_UNCHANGING_P (ref
)
1683 |= (lang_hooks
.honor_readonly
1684 && (TYPE_READONLY (type
) || TREE_READONLY (t
)));
1686 /* If we are making an object of this type, or if this is a DECL, we know
1687 that it is a scalar if the type is not an aggregate. */
1688 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1689 MEM_SCALAR_P (ref
) = 1;
1691 /* If the size is known, we can set that. */
1692 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1693 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1695 /* If T is not a type. Otherwise, we may be able to deduce some more
1696 information about the expression. */
1699 maybe_set_unchanging (ref
, t
);
1700 if (TREE_THIS_VOLATILE (t
))
1701 MEM_VOLATILE_P (ref
) = 1;
1703 /* Now remove any NOPs: they don't change what the underlying object is.
1704 Likewise for SAVE_EXPR. */
1705 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1706 || TREE_CODE (t
) == NON_LVALUE_EXPR
|| TREE_CODE (t
) == SAVE_EXPR
)
1707 t
= TREE_OPERAND (t
, 0);
1709 /* If this is a decl, set the attributes of the MEM from it. */
1713 offset
= GEN_INT (0);
1714 size
= (DECL_SIZE_UNIT (t
)
1715 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1716 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1717 align
= DECL_ALIGN (t
);
1720 /* If this is an INDIRECT_REF, we know its alignment. */
1721 else if (TREE_CODE (t
) == INDIRECT_REF
)
1722 align
= TYPE_ALIGN (type
);
1725 /* Now set the attributes we computed above. */
1726 MEM_ATTRS (ref
) = get_mem_attrs (alias
, decl
, offset
, size
, align
);
1728 /* If this is already known to be a scalar or aggregate, we are done. */
1729 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1732 /* If it is a reference into an aggregate, this is part of an aggregate.
1733 Otherwise we don't know. */
1734 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1735 || TREE_CODE (t
) == ARRAY_RANGE_REF
1736 || TREE_CODE (t
) == BIT_FIELD_REF
)
1737 MEM_IN_STRUCT_P (ref
) = 1;
1740 /* Set the alias set of MEM to SET. */
1743 set_mem_alias_set (mem
, set
)
1747 #ifdef ENABLE_CHECKING
1748 /* If the new and old alias sets don't conflict, something is wrong. */
1749 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
1753 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_DECL (mem
), MEM_OFFSET (mem
),
1754 MEM_SIZE (mem
), MEM_ALIGN (mem
));
1757 /* Set the alignment of MEM to ALIGN bits. */
1760 set_mem_align (mem
, align
)
1764 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_DECL (mem
),
1765 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
);
1768 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1769 and its address changed to ADDR. (VOIDmode means don't change the mode.
1770 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1771 returned memory location is required to be valid. The memory
1772 attributes are not changed. */
1775 change_address_1 (memref
, mode
, addr
, validate
)
1777 enum machine_mode mode
;
1783 if (GET_CODE (memref
) != MEM
)
1785 if (mode
== VOIDmode
)
1786 mode
= GET_MODE (memref
);
1788 addr
= XEXP (memref
, 0);
1792 if (reload_in_progress
|| reload_completed
)
1794 if (! memory_address_p (mode
, addr
))
1798 addr
= memory_address (mode
, addr
);
1801 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1804 new = gen_rtx_MEM (mode
, addr
);
1805 MEM_COPY_ATTRIBUTES (new, memref
);
1809 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1810 way we are changing MEMREF, so we only preserve the alias set. */
1813 change_address (memref
, mode
, addr
)
1815 enum machine_mode mode
;
1818 rtx
new = change_address_1 (memref
, mode
, addr
, 1);
1819 enum machine_mode mmode
= GET_MODE (new);
1822 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0,
1823 mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
)),
1824 (mmode
== BLKmode
? 1
1825 : GET_MODE_ALIGNMENT (mmode
) / BITS_PER_UNIT
));
1830 /* Return a memory reference like MEMREF, but with its mode changed
1831 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1832 nonzero, the memory address is forced to be valid. */
1835 adjust_address_1 (memref
, mode
, offset
, validate
)
1837 enum machine_mode mode
;
1838 HOST_WIDE_INT offset
;
1841 rtx addr
= XEXP (memref
, 0);
1843 rtx memoffset
= MEM_OFFSET (memref
);
1844 unsigned int memalign
= MEM_ALIGN (memref
);
1846 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1847 object, we can merge it into the LO_SUM. */
1848 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1850 && (unsigned HOST_WIDE_INT
) offset
1851 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1852 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1853 plus_constant (XEXP (addr
, 1), offset
));
1854 else if (offset
== 0)
1855 /* ??? Prefer to create garbage instead of creating shared rtl. */
1856 addr
= copy_rtx (addr
);
1858 addr
= plus_constant (addr
, offset
);
1860 new = change_address_1 (memref
, mode
, addr
, validate
);
1862 /* Compute the new values of the memory attributes due to this adjustment.
1863 We add the offsets and update the alignment. */
1865 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1867 /* Compute the new alignment by taking the MIN of the alignment and the
1868 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1871 memalign
= MIN (memalign
, (offset
& -offset
) * BITS_PER_UNIT
);
1874 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_DECL (memref
), memoffset
,
1876 ? 0 : GEN_INT (GET_MODE_SIZE (mode
)), memalign
);
1878 /* At some point, we should validate that this offset is within the object,
1879 if all the appropriate values are known. */
1883 /* Return a memory reference like MEMREF, but whose address is changed by
1884 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1885 known to be in OFFSET (possibly 1). */
1888 offset_address (memref
, offset
, pow2
)
1893 rtx
new = change_address_1 (memref
, VOIDmode
,
1894 gen_rtx_PLUS (Pmode
, XEXP (memref
, 0),
1895 force_reg (Pmode
, offset
)), 1);
1897 /* Update the alignment to reflect the offset. Reset the offset, which
1899 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_DECL (memref
),
1900 0, 0, MIN (MEM_ALIGN (memref
),
1901 pow2
* BITS_PER_UNIT
));
1905 /* Return a memory reference like MEMREF, but with its address changed to
1906 ADDR. The caller is asserting that the actual piece of memory pointed
1907 to is the same, just the form of the address is being changed, such as
1908 by putting something into a register. */
1911 replace_equiv_address (memref
, addr
)
1915 /* change_address_1 copies the memory attribute structure without change
1916 and that's exactly what we want here. */
1917 return change_address_1 (memref
, VOIDmode
, addr
, 1);
1920 /* Likewise, but the reference is not required to be valid. */
1923 replace_equiv_address_nv (memref
, addr
)
1927 return change_address_1 (memref
, VOIDmode
, addr
, 0);
1930 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1937 label
= gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
,
1938 NULL_RTX
, label_num
++, NULL
, NULL
);
1940 LABEL_NUSES (label
) = 0;
1941 LABEL_ALTERNATE_NAME (label
) = NULL
;
1945 /* For procedure integration. */
1947 /* Install new pointers to the first and last insns in the chain.
1948 Also, set cur_insn_uid to one higher than the last in use.
1949 Used for an inline-procedure after copying the insn chain. */
1952 set_new_first_and_last_insn (first
, last
)
1961 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1962 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
1967 /* Set the range of label numbers found in the current function.
1968 This is used when belatedly compiling an inline function. */
1971 set_new_first_and_last_label_num (first
, last
)
1974 base_label_num
= label_num
;
1975 first_label_num
= first
;
1976 last_label_num
= last
;
1979 /* Set the last label number found in the current function.
1980 This is used when belatedly compiling an inline function. */
1983 set_new_last_label_num (last
)
1986 base_label_num
= label_num
;
1987 last_label_num
= last
;
1990 /* Restore all variables describing the current status from the structure *P.
1991 This is used after a nested function. */
1994 restore_emit_status (p
)
1995 struct function
*p ATTRIBUTE_UNUSED
;
1998 clear_emit_caches ();
2001 /* Clear out all parts of the state in F that can safely be discarded
2002 after the function has been compiled, to let garbage collection
2003 reclaim the memory. */
2006 free_emit_status (f
)
2009 free (f
->emit
->x_regno_reg_rtx
);
2010 free (f
->emit
->regno_pointer_align
);
2011 free (f
->emit
->regno_decl
);
2016 /* Go through all the RTL insn bodies and copy any invalid shared
2017 structure. This routine should only be called once. */
2020 unshare_all_rtl (fndecl
, insn
)
2026 /* Make sure that virtual parameters are not shared. */
2027 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2028 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2030 /* Make sure that virtual stack slots are not shared. */
2031 unshare_all_decls (DECL_INITIAL (fndecl
));
2033 /* Unshare just about everything else. */
2034 unshare_all_rtl_1 (insn
);
2036 /* Make sure the addresses of stack slots found outside the insn chain
2037 (such as, in DECL_RTL of a variable) are not shared
2038 with the insn chain.
2040 This special care is necessary when the stack slot MEM does not
2041 actually appear in the insn chain. If it does appear, its address
2042 is unshared from all else at that point. */
2043 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2046 /* Go through all the RTL insn bodies and copy any invalid shared
2047 structure, again. This is a fairly expensive thing to do so it
2048 should be done sparingly. */
2051 unshare_all_rtl_again (insn
)
2057 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2060 reset_used_flags (PATTERN (p
));
2061 reset_used_flags (REG_NOTES (p
));
2062 reset_used_flags (LOG_LINKS (p
));
2065 /* Make sure that virtual stack slots are not shared. */
2066 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2068 /* Make sure that virtual parameters are not shared. */
2069 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2070 reset_used_flags (DECL_RTL (decl
));
2072 reset_used_flags (stack_slot_list
);
2074 unshare_all_rtl (cfun
->decl
, insn
);
2077 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2078 Assumes the mark bits are cleared at entry. */
2081 unshare_all_rtl_1 (insn
)
2084 for (; insn
; insn
= NEXT_INSN (insn
))
2087 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2088 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2089 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2093 /* Go through all virtual stack slots of a function and copy any
2094 shared structure. */
2096 unshare_all_decls (blk
)
2101 /* Copy shared decls. */
2102 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2103 if (DECL_RTL_SET_P (t
))
2104 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2106 /* Now process sub-blocks. */
2107 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2108 unshare_all_decls (t
);
2111 /* Go through all virtual stack slots of a function and mark them as
2114 reset_used_decls (blk
)
2120 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2121 if (DECL_RTL_SET_P (t
))
2122 reset_used_flags (DECL_RTL (t
));
2124 /* Now process sub-blocks. */
2125 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2126 reset_used_decls (t
);
2129 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2130 Recursively does the same for subexpressions. */
2133 copy_rtx_if_shared (orig
)
2139 const char *format_ptr
;
2145 code
= GET_CODE (x
);
2147 /* These types may be freely shared. */
2160 /* SCRATCH must be shared because they represent distinct values. */
2164 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2165 a LABEL_REF, it isn't sharable. */
2166 if (GET_CODE (XEXP (x
, 0)) == PLUS
2167 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2168 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2177 /* The chain of insns is not being copied. */
2181 /* A MEM is allowed to be shared if its address is constant.
2183 We used to allow sharing of MEMs which referenced
2184 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2185 that can lose. instantiate_virtual_regs will not unshare
2186 the MEMs, and combine may change the structure of the address
2187 because it looks safe and profitable in one context, but
2188 in some other context it creates unrecognizable RTL. */
2189 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
2198 /* This rtx may not be shared. If it has already been seen,
2199 replace it with a copy of itself. */
2205 copy
= rtx_alloc (code
);
2207 (sizeof (*copy
) - sizeof (copy
->fld
)
2208 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
2214 /* Now scan the subexpressions recursively.
2215 We can store any replaced subexpressions directly into X
2216 since we know X is not shared! Any vectors in X
2217 must be copied if X was copied. */
2219 format_ptr
= GET_RTX_FORMAT (code
);
2221 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2223 switch (*format_ptr
++)
2226 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
2230 if (XVEC (x
, i
) != NULL
)
2233 int len
= XVECLEN (x
, i
);
2235 if (copied
&& len
> 0)
2236 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2237 for (j
= 0; j
< len
; j
++)
2238 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
2246 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2247 to look for shared sub-parts. */
2250 reset_used_flags (x
)
2255 const char *format_ptr
;
2260 code
= GET_CODE (x
);
2262 /* These types may be freely shared so we needn't do any resetting
2283 /* The chain of insns is not being copied. */
2292 format_ptr
= GET_RTX_FORMAT (code
);
2293 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2295 switch (*format_ptr
++)
2298 reset_used_flags (XEXP (x
, i
));
2302 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2303 reset_used_flags (XVECEXP (x
, i
, j
));
2309 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2310 Return X or the rtx for the pseudo reg the value of X was copied into.
2311 OTHER must be valid as a SET_DEST. */
2314 make_safe_from (x
, other
)
2318 switch (GET_CODE (other
))
2321 other
= SUBREG_REG (other
);
2323 case STRICT_LOW_PART
:
2326 other
= XEXP (other
, 0);
2332 if ((GET_CODE (other
) == MEM
2334 && GET_CODE (x
) != REG
2335 && GET_CODE (x
) != SUBREG
)
2336 || (GET_CODE (other
) == REG
2337 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2338 || reg_mentioned_p (other
, x
))))
2340 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2341 emit_move_insn (temp
, x
);
2347 /* Emission of insns (adding them to the doubly-linked list). */
2349 /* Return the first insn of the current sequence or current function. */
2357 /* Return the last insn emitted in current sequence or current function. */
2365 /* Specify a new insn as the last in the chain. */
2368 set_last_insn (insn
)
2371 if (NEXT_INSN (insn
) != 0)
2376 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2379 get_last_insn_anywhere ()
2381 struct sequence_stack
*stack
;
2384 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2385 if (stack
->last
!= 0)
2390 /* Return a number larger than any instruction's uid in this function. */
2395 return cur_insn_uid
;
2398 /* Renumber instructions so that no instruction UIDs are wasted. */
2401 renumber_insns (stream
)
2406 /* If we're not supposed to renumber instructions, don't. */
2407 if (!flag_renumber_insns
)
2410 /* If there aren't that many instructions, then it's not really
2411 worth renumbering them. */
2412 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2417 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2420 fprintf (stream
, "Renumbering insn %d to %d\n",
2421 INSN_UID (insn
), cur_insn_uid
);
2422 INSN_UID (insn
) = cur_insn_uid
++;
2426 /* Return the next insn. If it is a SEQUENCE, return the first insn
2435 insn
= NEXT_INSN (insn
);
2436 if (insn
&& GET_CODE (insn
) == INSN
2437 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2438 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2444 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2448 previous_insn (insn
)
2453 insn
= PREV_INSN (insn
);
2454 if (insn
&& GET_CODE (insn
) == INSN
2455 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2456 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2462 /* Return the next insn after INSN that is not a NOTE. This routine does not
2463 look inside SEQUENCEs. */
2466 next_nonnote_insn (insn
)
2471 insn
= NEXT_INSN (insn
);
2472 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2479 /* Return the previous insn before INSN that is not a NOTE. This routine does
2480 not look inside SEQUENCEs. */
2483 prev_nonnote_insn (insn
)
2488 insn
= PREV_INSN (insn
);
2489 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2496 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2497 or 0, if there is none. This routine does not look inside
2501 next_real_insn (insn
)
2506 insn
= NEXT_INSN (insn
);
2507 if (insn
== 0 || GET_CODE (insn
) == INSN
2508 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2515 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2516 or 0, if there is none. This routine does not look inside
2520 prev_real_insn (insn
)
2525 insn
= PREV_INSN (insn
);
2526 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2527 || GET_CODE (insn
) == JUMP_INSN
)
2534 /* Find the next insn after INSN that really does something. This routine
2535 does not look inside SEQUENCEs. Until reload has completed, this is the
2536 same as next_real_insn. */
2539 active_insn_p (insn
)
2542 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2543 || (GET_CODE (insn
) == INSN
2544 && (! reload_completed
2545 || (GET_CODE (PATTERN (insn
)) != USE
2546 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
2550 next_active_insn (insn
)
2555 insn
= NEXT_INSN (insn
);
2556 if (insn
== 0 || active_insn_p (insn
))
2563 /* Find the last insn before INSN that really does something. This routine
2564 does not look inside SEQUENCEs. Until reload has completed, this is the
2565 same as prev_real_insn. */
2568 prev_active_insn (insn
)
2573 insn
= PREV_INSN (insn
);
2574 if (insn
== 0 || active_insn_p (insn
))
2581 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2589 insn
= NEXT_INSN (insn
);
2590 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2597 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2605 insn
= PREV_INSN (insn
);
2606 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2614 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2615 and REG_CC_USER notes so we can find it. */
2618 link_cc0_insns (insn
)
2621 rtx user
= next_nonnote_insn (insn
);
2623 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
2624 user
= XVECEXP (PATTERN (user
), 0, 0);
2626 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
2628 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
2631 /* Return the next insn that uses CC0 after INSN, which is assumed to
2632 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2633 applied to the result of this function should yield INSN).
2635 Normally, this is simply the next insn. However, if a REG_CC_USER note
2636 is present, it contains the insn that uses CC0.
2638 Return 0 if we can't find the insn. */
2641 next_cc0_user (insn
)
2644 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
2647 return XEXP (note
, 0);
2649 insn
= next_nonnote_insn (insn
);
2650 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2651 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2653 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
2659 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2660 note, it is the previous insn. */
2663 prev_cc0_setter (insn
)
2666 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2669 return XEXP (note
, 0);
2671 insn
= prev_nonnote_insn (insn
);
2672 if (! sets_cc0_p (PATTERN (insn
)))
2679 /* Increment the label uses for all labels present in rtx. */
2689 code
= GET_CODE (x
);
2690 if (code
== LABEL_REF
)
2691 LABEL_NUSES (XEXP (x
, 0))++;
2693 fmt
= GET_RTX_FORMAT (code
);
2694 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2697 mark_label_nuses (XEXP (x
, i
));
2698 else if (fmt
[i
] == 'E')
2699 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2700 mark_label_nuses (XVECEXP (x
, i
, j
));
2705 /* Try splitting insns that can be split for better scheduling.
2706 PAT is the pattern which might split.
2707 TRIAL is the insn providing PAT.
2708 LAST is non-zero if we should return the last insn of the sequence produced.
2710 If this routine succeeds in splitting, it returns the first or last
2711 replacement insn depending on the value of LAST. Otherwise, it
2712 returns TRIAL. If the insn to be returned can be split, it will be. */
2715 try_split (pat
, trial
, last
)
2719 rtx before
= PREV_INSN (trial
);
2720 rtx after
= NEXT_INSN (trial
);
2721 int has_barrier
= 0;
2726 if (any_condjump_p (trial
)
2727 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
2728 split_branch_probability
= INTVAL (XEXP (note
, 0));
2729 probability
= split_branch_probability
;
2731 seq
= split_insns (pat
, trial
);
2733 split_branch_probability
= -1;
2735 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2736 We may need to handle this specially. */
2737 if (after
&& GET_CODE (after
) == BARRIER
)
2740 after
= NEXT_INSN (after
);
2745 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2746 The latter case will normally arise only when being done so that
2747 it, in turn, will be split (SFmode on the 29k is an example). */
2748 if (GET_CODE (seq
) == SEQUENCE
)
2752 /* Avoid infinite loop if any insn of the result matches
2753 the original pattern. */
2754 for (i
= 0; i
< XVECLEN (seq
, 0); i
++)
2755 if (GET_CODE (XVECEXP (seq
, 0, i
)) == INSN
2756 && rtx_equal_p (PATTERN (XVECEXP (seq
, 0, i
)), pat
))
2760 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2761 if (GET_CODE (XVECEXP (seq
, 0, i
)) == JUMP_INSN
)
2763 rtx insn
= XVECEXP (seq
, 0, i
);
2764 mark_jump_label (PATTERN (insn
),
2765 XVECEXP (seq
, 0, i
), 0);
2767 if (probability
!= -1
2768 && any_condjump_p (insn
)
2769 && !find_reg_note (insn
, REG_BR_PROB
, 0))
2771 /* We can preserve the REG_BR_PROB notes only if exactly
2772 one jump is created, otherwise the machinde description
2773 is responsible for this step using
2774 split_branch_probability variable. */
2778 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
2779 GEN_INT (probability
),
2784 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2785 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2786 if (GET_CODE (trial
) == CALL_INSN
)
2787 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2788 if (GET_CODE (XVECEXP (seq
, 0, i
)) == CALL_INSN
)
2789 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq
, 0, i
))
2790 = CALL_INSN_FUNCTION_USAGE (trial
);
2792 /* Copy notes, particularly those related to the CFG. */
2793 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
2795 switch (REG_NOTE_KIND (note
))
2798 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2800 rtx insn
= XVECEXP (seq
, 0, i
);
2801 if (GET_CODE (insn
) == CALL_INSN
2802 || (flag_non_call_exceptions
2803 && may_trap_p (PATTERN (insn
))))
2805 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
2813 case REG_ALWAYS_RETURN
:
2814 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2816 rtx insn
= XVECEXP (seq
, 0, i
);
2817 if (GET_CODE (insn
) == CALL_INSN
)
2819 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
2825 case REG_NON_LOCAL_GOTO
:
2826 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2828 rtx insn
= XVECEXP (seq
, 0, i
);
2829 if (GET_CODE (insn
) == JUMP_INSN
)
2831 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
2842 /* If there are LABELS inside the split insns increment the
2843 usage count so we don't delete the label. */
2844 if (GET_CODE (trial
) == INSN
)
2845 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2846 if (GET_CODE (XVECEXP (seq
, 0, i
)) == INSN
)
2847 mark_label_nuses (PATTERN (XVECEXP (seq
, 0, i
)));
2849 tem
= emit_insn_after (seq
, trial
);
2851 delete_related_insns (trial
);
2853 emit_barrier_after (tem
);
2855 /* Recursively call try_split for each new insn created; by the
2856 time control returns here that insn will be fully split, so
2857 set LAST and continue from the insn after the one returned.
2858 We can't use next_active_insn here since AFTER may be a note.
2859 Ignore deleted insns, which can be occur if not optimizing. */
2860 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
2861 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
2862 tem
= try_split (PATTERN (tem
), tem
, 1);
2864 /* Avoid infinite loop if the result matches the original pattern. */
2865 else if (rtx_equal_p (seq
, pat
))
2869 PATTERN (trial
) = seq
;
2870 INSN_CODE (trial
) = -1;
2871 try_split (seq
, trial
, last
);
2874 /* Return either the first or the last insn, depending on which was
2877 ? (after
? PREV_INSN (after
) : last_insn
)
2878 : NEXT_INSN (before
);
2884 /* Make and return an INSN rtx, initializing all its slots.
2885 Store PATTERN in the pattern slots. */
2888 make_insn_raw (pattern
)
2893 insn
= rtx_alloc (INSN
);
2895 INSN_UID (insn
) = cur_insn_uid
++;
2896 PATTERN (insn
) = pattern
;
2897 INSN_CODE (insn
) = -1;
2898 LOG_LINKS (insn
) = NULL
;
2899 REG_NOTES (insn
) = NULL
;
2901 #ifdef ENABLE_RTL_CHECKING
2904 && (returnjump_p (insn
)
2905 || (GET_CODE (insn
) == SET
2906 && SET_DEST (insn
) == pc_rtx
)))
2908 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2916 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2919 make_jump_insn_raw (pattern
)
2924 insn
= rtx_alloc (JUMP_INSN
);
2925 INSN_UID (insn
) = cur_insn_uid
++;
2927 PATTERN (insn
) = pattern
;
2928 INSN_CODE (insn
) = -1;
2929 LOG_LINKS (insn
) = NULL
;
2930 REG_NOTES (insn
) = NULL
;
2931 JUMP_LABEL (insn
) = NULL
;
2936 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2939 make_call_insn_raw (pattern
)
2944 insn
= rtx_alloc (CALL_INSN
);
2945 INSN_UID (insn
) = cur_insn_uid
++;
2947 PATTERN (insn
) = pattern
;
2948 INSN_CODE (insn
) = -1;
2949 LOG_LINKS (insn
) = NULL
;
2950 REG_NOTES (insn
) = NULL
;
2951 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
2956 /* Add INSN to the end of the doubly-linked list.
2957 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2963 PREV_INSN (insn
) = last_insn
;
2964 NEXT_INSN (insn
) = 0;
2966 if (NULL
!= last_insn
)
2967 NEXT_INSN (last_insn
) = insn
;
2969 if (NULL
== first_insn
)
2975 /* Add INSN into the doubly-linked list after insn AFTER. This and
2976 the next should be the only functions called to insert an insn once
2977 delay slots have been filled since only they know how to update a
2981 add_insn_after (insn
, after
)
2984 rtx next
= NEXT_INSN (after
);
2987 if (optimize
&& INSN_DELETED_P (after
))
2990 NEXT_INSN (insn
) = next
;
2991 PREV_INSN (insn
) = after
;
2995 PREV_INSN (next
) = insn
;
2996 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
2997 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
2999 else if (last_insn
== after
)
3003 struct sequence_stack
*stack
= seq_stack
;
3004 /* Scan all pending sequences too. */
3005 for (; stack
; stack
= stack
->next
)
3006 if (after
== stack
->last
)
3016 if (basic_block_for_insn
3017 && (unsigned int)INSN_UID (after
) < basic_block_for_insn
->num_elements
3018 && (bb
= BLOCK_FOR_INSN (after
)))
3020 set_block_for_insn (insn
, bb
);
3021 /* Should not happen as first in the BB is always
3022 eigther NOTE or LABEL. */
3023 if (bb
->end
== after
3024 /* Avoid clobbering of structure when creating new BB. */
3025 && GET_CODE (insn
) != BARRIER
3026 && (GET_CODE (insn
) != NOTE
3027 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3031 NEXT_INSN (after
) = insn
;
3032 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3034 rtx sequence
= PATTERN (after
);
3035 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3039 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3040 the previous should be the only functions called to insert an insn once
3041 delay slots have been filled since only they know how to update a
3045 add_insn_before (insn
, before
)
3048 rtx prev
= PREV_INSN (before
);
3051 if (optimize
&& INSN_DELETED_P (before
))
3054 PREV_INSN (insn
) = prev
;
3055 NEXT_INSN (insn
) = before
;
3059 NEXT_INSN (prev
) = insn
;
3060 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3062 rtx sequence
= PATTERN (prev
);
3063 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3066 else if (first_insn
== before
)
3070 struct sequence_stack
*stack
= seq_stack
;
3071 /* Scan all pending sequences too. */
3072 for (; stack
; stack
= stack
->next
)
3073 if (before
== stack
->first
)
3075 stack
->first
= insn
;
3083 if (basic_block_for_insn
3084 && (unsigned int)INSN_UID (before
) < basic_block_for_insn
->num_elements
3085 && (bb
= BLOCK_FOR_INSN (before
)))
3087 set_block_for_insn (insn
, bb
);
3088 /* Should not happen as first in the BB is always
3089 eigther NOTE or LABEl. */
3090 if (bb
->head
== insn
3091 /* Avoid clobbering of structure when creating new BB. */
3092 && GET_CODE (insn
) != BARRIER
3093 && (GET_CODE (insn
) != NOTE
3094 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3098 PREV_INSN (before
) = insn
;
3099 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3100 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3103 /* Remove an insn from its doubly-linked list. This function knows how
3104 to handle sequences. */
3109 rtx next
= NEXT_INSN (insn
);
3110 rtx prev
= PREV_INSN (insn
);
3115 NEXT_INSN (prev
) = next
;
3116 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3118 rtx sequence
= PATTERN (prev
);
3119 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3122 else if (first_insn
== insn
)
3126 struct sequence_stack
*stack
= seq_stack
;
3127 /* Scan all pending sequences too. */
3128 for (; stack
; stack
= stack
->next
)
3129 if (insn
== stack
->first
)
3131 stack
->first
= next
;
3141 PREV_INSN (next
) = prev
;
3142 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3143 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3145 else if (last_insn
== insn
)
3149 struct sequence_stack
*stack
= seq_stack
;
3150 /* Scan all pending sequences too. */
3151 for (; stack
; stack
= stack
->next
)
3152 if (insn
== stack
->last
)
3161 if (basic_block_for_insn
3162 && (unsigned int)INSN_UID (insn
) < basic_block_for_insn
->num_elements
3163 && (bb
= BLOCK_FOR_INSN (insn
)))
3165 if (bb
->head
== insn
)
3167 /* Never ever delete the basic block note without deleting whole basic
3169 if (GET_CODE (insn
) == NOTE
)
3173 if (bb
->end
== insn
)
3178 /* Delete all insns made since FROM.
3179 FROM becomes the new last instruction. */
3182 delete_insns_since (from
)
3188 NEXT_INSN (from
) = 0;
3192 /* This function is deprecated, please use sequences instead.
3194 Move a consecutive bunch of insns to a different place in the chain.
3195 The insns to be moved are those between FROM and TO.
3196 They are moved to a new position after the insn AFTER.
3197 AFTER must not be FROM or TO or any insn in between.
3199 This function does not know about SEQUENCEs and hence should not be
3200 called after delay-slot filling has been done. */
3203 reorder_insns_nobb (from
, to
, after
)
3204 rtx from
, to
, after
;
3206 /* Splice this bunch out of where it is now. */
3207 if (PREV_INSN (from
))
3208 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3210 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3211 if (last_insn
== to
)
3212 last_insn
= PREV_INSN (from
);
3213 if (first_insn
== from
)
3214 first_insn
= NEXT_INSN (to
);
3216 /* Make the new neighbors point to it and it to them. */
3217 if (NEXT_INSN (after
))
3218 PREV_INSN (NEXT_INSN (after
)) = to
;
3220 NEXT_INSN (to
) = NEXT_INSN (after
);
3221 PREV_INSN (from
) = after
;
3222 NEXT_INSN (after
) = from
;
3223 if (after
== last_insn
)
3227 /* Same as function above, but take care to update BB boundaries. */
3229 reorder_insns (from
, to
, after
)
3230 rtx from
, to
, after
;
3232 rtx prev
= PREV_INSN (from
);
3233 basic_block bb
, bb2
;
3235 reorder_insns_nobb (from
, to
, after
);
3237 if (basic_block_for_insn
3238 && (unsigned int)INSN_UID (after
) < basic_block_for_insn
->num_elements
3239 && (bb
= BLOCK_FOR_INSN (after
)))
3243 if (basic_block_for_insn
3244 && (unsigned int)INSN_UID (from
) < basic_block_for_insn
->num_elements
3245 && (bb2
= BLOCK_FOR_INSN (from
)))
3251 if (bb
->end
== after
)
3254 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3255 set_block_for_insn (x
, bb
);
3259 /* Return the line note insn preceding INSN. */
3262 find_line_note (insn
)
3265 if (no_line_numbers
)
3268 for (; insn
; insn
= PREV_INSN (insn
))
3269 if (GET_CODE (insn
) == NOTE
3270 && NOTE_LINE_NUMBER (insn
) >= 0)
3276 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3277 of the moved insns when debugging. This may insert a note between AFTER
3278 and FROM, and another one after TO. */
3281 reorder_insns_with_line_notes (from
, to
, after
)
3282 rtx from
, to
, after
;
3284 rtx from_line
= find_line_note (from
);
3285 rtx after_line
= find_line_note (after
);
3287 reorder_insns (from
, to
, after
);
3289 if (from_line
== after_line
)
3293 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3294 NOTE_LINE_NUMBER (from_line
),
3297 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3298 NOTE_LINE_NUMBER (after_line
),
3302 /* Remove unnecessary notes from the instruction stream. */
3305 remove_unnecessary_notes ()
3307 rtx block_stack
= NULL_RTX
;
3308 rtx eh_stack
= NULL_RTX
;
3313 /* We must not remove the first instruction in the function because
3314 the compiler depends on the first instruction being a note. */
3315 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3317 /* Remember what's next. */
3318 next
= NEXT_INSN (insn
);
3320 /* We're only interested in notes. */
3321 if (GET_CODE (insn
) != NOTE
)
3324 switch (NOTE_LINE_NUMBER (insn
))
3326 case NOTE_INSN_DELETED
:
3330 case NOTE_INSN_EH_REGION_BEG
:
3331 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3334 case NOTE_INSN_EH_REGION_END
:
3335 /* Too many end notes. */
3336 if (eh_stack
== NULL_RTX
)
3338 /* Mismatched nesting. */
3339 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
3342 eh_stack
= XEXP (eh_stack
, 1);
3343 free_INSN_LIST_node (tmp
);
3346 case NOTE_INSN_BLOCK_BEG
:
3347 /* By now, all notes indicating lexical blocks should have
3348 NOTE_BLOCK filled in. */
3349 if (NOTE_BLOCK (insn
) == NULL_TREE
)
3351 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
3354 case NOTE_INSN_BLOCK_END
:
3355 /* Too many end notes. */
3356 if (block_stack
== NULL_RTX
)
3358 /* Mismatched nesting. */
3359 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
3362 block_stack
= XEXP (block_stack
, 1);
3363 free_INSN_LIST_node (tmp
);
3365 /* Scan back to see if there are any non-note instructions
3366 between INSN and the beginning of this block. If not,
3367 then there is no PC range in the generated code that will
3368 actually be in this block, so there's no point in
3369 remembering the existence of the block. */
3370 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
3372 /* This block contains a real instruction. Note that we
3373 don't include labels; if the only thing in the block
3374 is a label, then there are still no PC values that
3375 lie within the block. */
3379 /* We're only interested in NOTEs. */
3380 if (GET_CODE (tmp
) != NOTE
)
3383 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
3385 /* We just verified that this BLOCK matches us with
3386 the block_stack check above. Never delete the
3387 BLOCK for the outermost scope of the function; we
3388 can refer to names from that scope even if the
3389 block notes are messed up. */
3390 if (! is_body_block (NOTE_BLOCK (insn
))
3391 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
3398 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
3399 /* There's a nested block. We need to leave the
3400 current block in place since otherwise the debugger
3401 wouldn't be able to show symbols from our block in
3402 the nested block. */
3408 /* Too many begin notes. */
3409 if (block_stack
|| eh_stack
)
3414 /* Emit an insn of given code and pattern
3415 at a specified place within the doubly-linked list. */
3417 /* Make an instruction with body PATTERN
3418 and output it before the instruction BEFORE. */
3421 emit_insn_before (pattern
, before
)
3422 rtx pattern
, before
;
3426 if (GET_CODE (pattern
) == SEQUENCE
)
3430 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3432 insn
= XVECEXP (pattern
, 0, i
);
3433 add_insn_before (insn
, before
);
3438 insn
= make_insn_raw (pattern
);
3439 add_insn_before (insn
, before
);
3445 /* Make an instruction with body PATTERN and code JUMP_INSN
3446 and output it before the instruction BEFORE. */
3449 emit_jump_insn_before (pattern
, before
)
3450 rtx pattern
, before
;
3454 if (GET_CODE (pattern
) == SEQUENCE
)
3455 insn
= emit_insn_before (pattern
, before
);
3458 insn
= make_jump_insn_raw (pattern
);
3459 add_insn_before (insn
, before
);
3465 /* Make an instruction with body PATTERN and code CALL_INSN
3466 and output it before the instruction BEFORE. */
3469 emit_call_insn_before (pattern
, before
)
3470 rtx pattern
, before
;
3474 if (GET_CODE (pattern
) == SEQUENCE
)
3475 insn
= emit_insn_before (pattern
, before
);
3478 insn
= make_call_insn_raw (pattern
);
3479 add_insn_before (insn
, before
);
3480 PUT_CODE (insn
, CALL_INSN
);
3486 /* Make an insn of code BARRIER
3487 and output it before the insn BEFORE. */
3490 emit_barrier_before (before
)
3493 rtx insn
= rtx_alloc (BARRIER
);
3495 INSN_UID (insn
) = cur_insn_uid
++;
3497 add_insn_before (insn
, before
);
3501 /* Emit the label LABEL before the insn BEFORE. */
3504 emit_label_before (label
, before
)
3507 /* This can be called twice for the same label as a result of the
3508 confusion that follows a syntax error! So make it harmless. */
3509 if (INSN_UID (label
) == 0)
3511 INSN_UID (label
) = cur_insn_uid
++;
3512 add_insn_before (label
, before
);
3518 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3521 emit_note_before (subtype
, before
)
3525 rtx note
= rtx_alloc (NOTE
);
3526 INSN_UID (note
) = cur_insn_uid
++;
3527 NOTE_SOURCE_FILE (note
) = 0;
3528 NOTE_LINE_NUMBER (note
) = subtype
;
3530 add_insn_before (note
, before
);
3534 /* Make an insn of code INSN with body PATTERN
3535 and output it after the insn AFTER. */
3538 emit_insn_after (pattern
, after
)
3543 if (GET_CODE (pattern
) == SEQUENCE
)
3547 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3549 insn
= XVECEXP (pattern
, 0, i
);
3550 add_insn_after (insn
, after
);
3556 insn
= make_insn_raw (pattern
);
3557 add_insn_after (insn
, after
);
3563 /* Similar to emit_insn_after, except that line notes are to be inserted so
3564 as to act as if this insn were at FROM. */
3567 emit_insn_after_with_line_notes (pattern
, after
, from
)
3568 rtx pattern
, after
, from
;
3570 rtx from_line
= find_line_note (from
);
3571 rtx after_line
= find_line_note (after
);
3572 rtx insn
= emit_insn_after (pattern
, after
);
3575 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3576 NOTE_LINE_NUMBER (from_line
),
3580 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3581 NOTE_LINE_NUMBER (after_line
),
3585 /* Make an insn of code JUMP_INSN with body PATTERN
3586 and output it after the insn AFTER. */
3589 emit_jump_insn_after (pattern
, after
)
3594 if (GET_CODE (pattern
) == SEQUENCE
)
3595 insn
= emit_insn_after (pattern
, after
);
3598 insn
= make_jump_insn_raw (pattern
);
3599 add_insn_after (insn
, after
);
3605 /* Make an insn of code BARRIER
3606 and output it after the insn AFTER. */
3609 emit_barrier_after (after
)
3612 rtx insn
= rtx_alloc (BARRIER
);
3614 INSN_UID (insn
) = cur_insn_uid
++;
3616 add_insn_after (insn
, after
);
3620 /* Emit the label LABEL after the insn AFTER. */
3623 emit_label_after (label
, after
)
3626 /* This can be called twice for the same label
3627 as a result of the confusion that follows a syntax error!
3628 So make it harmless. */
3629 if (INSN_UID (label
) == 0)
3631 INSN_UID (label
) = cur_insn_uid
++;
3632 add_insn_after (label
, after
);
3638 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3641 emit_note_after (subtype
, after
)
3645 rtx note
= rtx_alloc (NOTE
);
3646 INSN_UID (note
) = cur_insn_uid
++;
3647 NOTE_SOURCE_FILE (note
) = 0;
3648 NOTE_LINE_NUMBER (note
) = subtype
;
3649 add_insn_after (note
, after
);
3653 /* Emit a line note for FILE and LINE after the insn AFTER. */
3656 emit_line_note_after (file
, line
, after
)
3663 if (no_line_numbers
&& line
> 0)
3669 note
= rtx_alloc (NOTE
);
3670 INSN_UID (note
) = cur_insn_uid
++;
3671 NOTE_SOURCE_FILE (note
) = file
;
3672 NOTE_LINE_NUMBER (note
) = line
;
3673 add_insn_after (note
, after
);
3677 /* Make an insn of code INSN with pattern PATTERN
3678 and add it to the end of the doubly-linked list.
3679 If PATTERN is a SEQUENCE, take the elements of it
3680 and emit an insn for each element.
3682 Returns the last insn emitted. */
3688 rtx insn
= last_insn
;
3690 if (GET_CODE (pattern
) == SEQUENCE
)
3694 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3696 insn
= XVECEXP (pattern
, 0, i
);
3702 insn
= make_insn_raw (pattern
);
3709 /* Emit the insns in a chain starting with INSN.
3710 Return the last insn emitted. */
3720 rtx next
= NEXT_INSN (insn
);
3729 /* Emit the insns in a chain starting with INSN and place them in front of
3730 the insn BEFORE. Return the last insn emitted. */
3733 emit_insns_before (insn
, before
)
3741 rtx next
= NEXT_INSN (insn
);
3742 add_insn_before (insn
, before
);
3750 /* Emit the insns in a chain starting with FIRST and place them in back of
3751 the insn AFTER. Return the last insn emitted. */
3754 emit_insns_after (first
, after
)
3768 if (basic_block_for_insn
3769 && (unsigned int)INSN_UID (after
) < basic_block_for_insn
->num_elements
3770 && (bb
= BLOCK_FOR_INSN (after
)))
3772 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
3773 set_block_for_insn (last
, bb
);
3774 set_block_for_insn (last
, bb
);
3775 if (bb
->end
== after
)
3779 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
3782 after_after
= NEXT_INSN (after
);
3784 NEXT_INSN (after
) = first
;
3785 PREV_INSN (first
) = after
;
3786 NEXT_INSN (last
) = after_after
;
3788 PREV_INSN (after_after
) = last
;
3790 if (after
== last_insn
)
3795 /* Make an insn of code JUMP_INSN with pattern PATTERN
3796 and add it to the end of the doubly-linked list. */
3799 emit_jump_insn (pattern
)
3802 if (GET_CODE (pattern
) == SEQUENCE
)
3803 return emit_insn (pattern
);
3806 rtx insn
= make_jump_insn_raw (pattern
);
3812 /* Make an insn of code CALL_INSN with pattern PATTERN
3813 and add it to the end of the doubly-linked list. */
3816 emit_call_insn (pattern
)
3819 if (GET_CODE (pattern
) == SEQUENCE
)
3820 return emit_insn (pattern
);
3823 rtx insn
= make_call_insn_raw (pattern
);
3825 PUT_CODE (insn
, CALL_INSN
);
3830 /* Add the label LABEL to the end of the doubly-linked list. */
3836 /* This can be called twice for the same label
3837 as a result of the confusion that follows a syntax error!
3838 So make it harmless. */
3839 if (INSN_UID (label
) == 0)
3841 INSN_UID (label
) = cur_insn_uid
++;
3847 /* Make an insn of code BARRIER
3848 and add it to the end of the doubly-linked list. */
3853 rtx barrier
= rtx_alloc (BARRIER
);
3854 INSN_UID (barrier
) = cur_insn_uid
++;
3859 /* Make an insn of code NOTE
3860 with data-fields specified by FILE and LINE
3861 and add it to the end of the doubly-linked list,
3862 but only if line-numbers are desired for debugging info. */
3865 emit_line_note (file
, line
)
3869 set_file_and_line_for_stmt (file
, line
);
3872 if (no_line_numbers
)
3876 return emit_note (file
, line
);
3879 /* Make an insn of code NOTE
3880 with data-fields specified by FILE and LINE
3881 and add it to the end of the doubly-linked list.
3882 If it is a line-number NOTE, omit it if it matches the previous one. */
3885 emit_note (file
, line
)
3893 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
3894 && line
== last_linenum
)
3896 last_filename
= file
;
3897 last_linenum
= line
;
3900 if (no_line_numbers
&& line
> 0)
3906 note
= rtx_alloc (NOTE
);
3907 INSN_UID (note
) = cur_insn_uid
++;
3908 NOTE_SOURCE_FILE (note
) = file
;
3909 NOTE_LINE_NUMBER (note
) = line
;
3914 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3917 emit_line_note_force (file
, line
)
3922 return emit_line_note (file
, line
);
3925 /* Cause next statement to emit a line note even if the line number
3926 has not changed. This is used at the beginning of a function. */
3929 force_next_line_note ()
3934 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3935 note of this type already exists, remove it first. */
3938 set_unique_reg_note (insn
, kind
, datum
)
3943 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
3945 /* First remove the note if there already is one. */
3947 remove_note (insn
, note
);
3949 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
3952 /* Return an indication of which type of insn should have X as a body.
3953 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3959 if (GET_CODE (x
) == CODE_LABEL
)
3961 if (GET_CODE (x
) == CALL
)
3963 if (GET_CODE (x
) == RETURN
)
3965 if (GET_CODE (x
) == SET
)
3967 if (SET_DEST (x
) == pc_rtx
)
3969 else if (GET_CODE (SET_SRC (x
)) == CALL
)
3974 if (GET_CODE (x
) == PARALLEL
)
3977 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
3978 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
3980 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3981 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
3983 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3984 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
3990 /* Emit the rtl pattern X as an appropriate kind of insn.
3991 If X is a label, it is simply added into the insn chain. */
3997 enum rtx_code code
= classify_insn (x
);
3999 if (code
== CODE_LABEL
)
4000 return emit_label (x
);
4001 else if (code
== INSN
)
4002 return emit_insn (x
);
4003 else if (code
== JUMP_INSN
)
4005 rtx insn
= emit_jump_insn (x
);
4006 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4007 return emit_barrier ();
4010 else if (code
== CALL_INSN
)
4011 return emit_call_insn (x
);
4016 /* Begin emitting insns to a sequence which can be packaged in an
4017 RTL_EXPR. If this sequence will contain something that might cause
4018 the compiler to pop arguments to function calls (because those
4019 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4020 details), use do_pending_stack_adjust before calling this function.
4021 That will ensure that the deferred pops are not accidentally
4022 emitted in the middle of this sequence. */
4027 struct sequence_stack
*tem
;
4029 tem
= (struct sequence_stack
*) xmalloc (sizeof (struct sequence_stack
));
4031 tem
->next
= seq_stack
;
4032 tem
->first
= first_insn
;
4033 tem
->last
= last_insn
;
4034 tem
->sequence_rtl_expr
= seq_rtl_expr
;
4042 /* Similarly, but indicate that this sequence will be placed in T, an
4043 RTL_EXPR. See the documentation for start_sequence for more
4044 information about how to use this function. */
4047 start_sequence_for_rtl_expr (t
)
4055 /* Set up the insn chain starting with FIRST as the current sequence,
4056 saving the previously current one. See the documentation for
4057 start_sequence for more information about how to use this function. */
4060 push_to_sequence (first
)
4067 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4073 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4076 push_to_full_sequence (first
, last
)
4082 /* We really should have the end of the insn chain here. */
4083 if (last
&& NEXT_INSN (last
))
4087 /* Set up the outer-level insn chain
4088 as the current sequence, saving the previously current one. */
4091 push_topmost_sequence ()
4093 struct sequence_stack
*stack
, *top
= NULL
;
4097 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4100 first_insn
= top
->first
;
4101 last_insn
= top
->last
;
4102 seq_rtl_expr
= top
->sequence_rtl_expr
;
4105 /* After emitting to the outer-level insn chain, update the outer-level
4106 insn chain, and restore the previous saved state. */
4109 pop_topmost_sequence ()
4111 struct sequence_stack
*stack
, *top
= NULL
;
4113 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4116 top
->first
= first_insn
;
4117 top
->last
= last_insn
;
4118 /* ??? Why don't we save seq_rtl_expr here? */
4123 /* After emitting to a sequence, restore previous saved state.
4125 To get the contents of the sequence just made, you must call
4126 `gen_sequence' *before* calling here.
4128 If the compiler might have deferred popping arguments while
4129 generating this sequence, and this sequence will not be immediately
4130 inserted into the instruction stream, use do_pending_stack_adjust
4131 before calling gen_sequence. That will ensure that the deferred
4132 pops are inserted into this sequence, and not into some random
4133 location in the instruction stream. See INHIBIT_DEFER_POP for more
4134 information about deferred popping of arguments. */
4139 struct sequence_stack
*tem
= seq_stack
;
4141 first_insn
= tem
->first
;
4142 last_insn
= tem
->last
;
4143 seq_rtl_expr
= tem
->sequence_rtl_expr
;
4144 seq_stack
= tem
->next
;
4149 /* This works like end_sequence, but records the old sequence in FIRST
4153 end_full_sequence (first
, last
)
4156 *first
= first_insn
;
4161 /* Return 1 if currently emitting into a sequence. */
4166 return seq_stack
!= 0;
4169 /* Generate a SEQUENCE rtx containing the insns already emitted
4170 to the current sequence.
4172 This is how the gen_... function from a DEFINE_EXPAND
4173 constructs the SEQUENCE that it returns. */
4183 /* Count the insns in the chain. */
4185 for (tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
))
4188 /* If only one insn, return it rather than a SEQUENCE.
4189 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
4190 the case of an empty list.)
4191 We only return the pattern of an insn if its code is INSN and it
4192 has no notes. This ensures that no information gets lost. */
4194 && ! RTX_FRAME_RELATED_P (first_insn
)
4195 && GET_CODE (first_insn
) == INSN
4196 /* Don't throw away any reg notes. */
4197 && REG_NOTES (first_insn
) == 0)
4198 return PATTERN (first_insn
);
4200 result
= gen_rtx_SEQUENCE (VOIDmode
, rtvec_alloc (len
));
4202 for (i
= 0, tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
), i
++)
4203 XVECEXP (result
, 0, i
) = tem
;
4208 /* Put the various virtual registers into REGNO_REG_RTX. */
4211 init_virtual_regs (es
)
4212 struct emit_status
*es
;
4214 rtx
*ptr
= es
->x_regno_reg_rtx
;
4215 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4216 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4217 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4218 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4219 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
4223 clear_emit_caches ()
4227 /* Clear the start_sequence/gen_sequence cache. */
4228 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
4229 sequence_result
[i
] = 0;
4233 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4234 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
4235 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
4236 static int copy_insn_n_scratches
;
4238 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4239 copied an ASM_OPERANDS.
4240 In that case, it is the original input-operand vector. */
4241 static rtvec orig_asm_operands_vector
;
4243 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4244 copied an ASM_OPERANDS.
4245 In that case, it is the copied input-operand vector. */
4246 static rtvec copy_asm_operands_vector
;
4248 /* Likewise for the constraints vector. */
4249 static rtvec orig_asm_constraints_vector
;
4250 static rtvec copy_asm_constraints_vector
;
4252 /* Recursively create a new copy of an rtx for copy_insn.
4253 This function differs from copy_rtx in that it handles SCRATCHes and
4254 ASM_OPERANDs properly.
4255 Normally, this function is not used directly; use copy_insn as front end.
4256 However, you could first copy an insn pattern with copy_insn and then use
4257 this function afterwards to properly copy any REG_NOTEs containing
4267 const char *format_ptr
;
4269 code
= GET_CODE (orig
);
4285 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
4286 if (copy_insn_scratch_in
[i
] == orig
)
4287 return copy_insn_scratch_out
[i
];
4291 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4292 a LABEL_REF, it isn't sharable. */
4293 if (GET_CODE (XEXP (orig
, 0)) == PLUS
4294 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
4295 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
4299 /* A MEM with a constant address is not sharable. The problem is that
4300 the constant address may need to be reloaded. If the mem is shared,
4301 then reloading one copy of this mem will cause all copies to appear
4302 to have been reloaded. */
4308 copy
= rtx_alloc (code
);
4310 /* Copy the various flags, and other information. We assume that
4311 all fields need copying, and then clear the fields that should
4312 not be copied. That is the sensible default behavior, and forces
4313 us to explicitly document why we are *not* copying a flag. */
4314 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
4316 /* We do not copy the USED flag, which is used as a mark bit during
4317 walks over the RTL. */
4320 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4321 if (GET_RTX_CLASS (code
) == 'i')
4325 copy
->frame_related
= 0;
4328 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
4330 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
4332 copy
->fld
[i
] = orig
->fld
[i
];
4333 switch (*format_ptr
++)
4336 if (XEXP (orig
, i
) != NULL
)
4337 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
4342 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
4343 XVEC (copy
, i
) = copy_asm_constraints_vector
;
4344 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
4345 XVEC (copy
, i
) = copy_asm_operands_vector
;
4346 else if (XVEC (orig
, i
) != NULL
)
4348 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
4349 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
4350 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
4361 /* These are left unchanged. */
4369 if (code
== SCRATCH
)
4371 i
= copy_insn_n_scratches
++;
4372 if (i
>= MAX_RECOG_OPERANDS
)
4374 copy_insn_scratch_in
[i
] = orig
;
4375 copy_insn_scratch_out
[i
] = copy
;
4377 else if (code
== ASM_OPERANDS
)
4379 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
4380 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
4381 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
4382 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
4388 /* Create a new copy of an rtx.
4389 This function differs from copy_rtx in that it handles SCRATCHes and
4390 ASM_OPERANDs properly.
4391 INSN doesn't really have to be a full INSN; it could be just the
4397 copy_insn_n_scratches
= 0;
4398 orig_asm_operands_vector
= 0;
4399 orig_asm_constraints_vector
= 0;
4400 copy_asm_operands_vector
= 0;
4401 copy_asm_constraints_vector
= 0;
4402 return copy_insn_1 (insn
);
4405 /* Initialize data structures and variables in this file
4406 before generating rtl for each function. */
4411 struct function
*f
= cfun
;
4413 f
->emit
= (struct emit_status
*) xmalloc (sizeof (struct emit_status
));
4416 seq_rtl_expr
= NULL
;
4418 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
4421 first_label_num
= label_num
;
4425 clear_emit_caches ();
4427 /* Init the tables that describe all the pseudo regs. */
4429 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
4431 f
->emit
->regno_pointer_align
4432 = (unsigned char *) xcalloc (f
->emit
->regno_pointer_align_length
,
4433 sizeof (unsigned char));
4436 = (rtx
*) xcalloc (f
->emit
->regno_pointer_align_length
, sizeof (rtx
));
4439 = (tree
*) xcalloc (f
->emit
->regno_pointer_align_length
, sizeof (tree
));
4441 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4442 init_virtual_regs (f
->emit
);
4444 /* Indicate that the virtual registers and stack locations are
4446 REG_POINTER (stack_pointer_rtx
) = 1;
4447 REG_POINTER (frame_pointer_rtx
) = 1;
4448 REG_POINTER (hard_frame_pointer_rtx
) = 1;
4449 REG_POINTER (arg_pointer_rtx
) = 1;
4451 REG_POINTER (virtual_incoming_args_rtx
) = 1;
4452 REG_POINTER (virtual_stack_vars_rtx
) = 1;
4453 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
4454 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
4455 REG_POINTER (virtual_cfa_rtx
) = 1;
4457 #ifdef STACK_BOUNDARY
4458 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
4459 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
4460 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
4461 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
4463 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
4464 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
4465 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
4466 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
4467 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
4470 #ifdef INIT_EXPANDERS
4475 /* Mark SS for GC. */
4478 mark_sequence_stack (ss
)
4479 struct sequence_stack
*ss
;
4483 ggc_mark_rtx (ss
->first
);
4484 ggc_mark_tree (ss
->sequence_rtl_expr
);
4489 /* Mark ES for GC. */
4492 mark_emit_status (es
)
4493 struct emit_status
*es
;
4502 for (i
= es
->regno_pointer_align_length
, r
= es
->x_regno_reg_rtx
,
4504 i
> 0; --i
, ++r
, ++t
)
4510 mark_sequence_stack (es
->sequence_stack
);
4511 ggc_mark_tree (es
->sequence_rtl_expr
);
4512 ggc_mark_rtx (es
->x_first_insn
);
4515 /* Create some permanent unique rtl objects shared between all functions.
4516 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4519 init_emit_once (line_numbers
)
4523 enum machine_mode mode
;
4524 enum machine_mode double_mode
;
4526 /* Initialize the CONST_INT and memory attribute hash tables. */
4527 const_int_htab
= htab_create (37, const_int_htab_hash
,
4528 const_int_htab_eq
, NULL
);
4529 ggc_add_deletable_htab (const_int_htab
, 0, 0);
4531 mem_attrs_htab
= htab_create (37, mem_attrs_htab_hash
,
4532 mem_attrs_htab_eq
, NULL
);
4533 ggc_add_deletable_htab (mem_attrs_htab
, 0, mem_attrs_mark
);
4535 no_line_numbers
= ! line_numbers
;
4537 /* Compute the word and byte modes. */
4539 byte_mode
= VOIDmode
;
4540 word_mode
= VOIDmode
;
4541 double_mode
= VOIDmode
;
4543 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
4544 mode
= GET_MODE_WIDER_MODE (mode
))
4546 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
4547 && byte_mode
== VOIDmode
)
4550 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
4551 && word_mode
== VOIDmode
)
4555 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
4556 mode
= GET_MODE_WIDER_MODE (mode
))
4558 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
4559 && double_mode
== VOIDmode
)
4563 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
4565 /* Assign register numbers to the globally defined register rtx.
4566 This must be done at runtime because the register number field
4567 is in a union and some compilers can't initialize unions. */
4569 pc_rtx
= gen_rtx (PC
, VOIDmode
);
4570 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
4571 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
4572 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
4573 if (hard_frame_pointer_rtx
== 0)
4574 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
4575 HARD_FRAME_POINTER_REGNUM
);
4576 if (arg_pointer_rtx
== 0)
4577 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
4578 virtual_incoming_args_rtx
=
4579 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
4580 virtual_stack_vars_rtx
=
4581 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
4582 virtual_stack_dynamic_rtx
=
4583 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
4584 virtual_outgoing_args_rtx
=
4585 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
4586 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
4588 /* These rtx must be roots if GC is enabled. */
4589 ggc_add_rtx_root (global_rtl
, GR_MAX
);
4591 #ifdef INIT_EXPANDERS
4592 /* This is to initialize {init|mark|free}_machine_status before the first
4593 call to push_function_context_to. This is needed by the Chill front
4594 end which calls push_function_context_to before the first cal to
4595 init_function_start. */
4599 /* Create the unique rtx's for certain rtx codes and operand values. */
4601 /* Don't use gen_rtx here since gen_rtx in this case
4602 tries to use these variables. */
4603 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
4604 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
4605 gen_rtx_raw_CONST_INT (VOIDmode
, i
);
4606 ggc_add_rtx_root (const_int_rtx
, 2 * MAX_SAVED_CONST_INT
+ 1);
4608 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
4609 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
4610 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
4612 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
4614 dconst0
= REAL_VALUE_ATOF ("0", double_mode
);
4615 dconst1
= REAL_VALUE_ATOF ("1", double_mode
);
4616 dconst2
= REAL_VALUE_ATOF ("2", double_mode
);
4617 dconstm1
= REAL_VALUE_ATOF ("-1", double_mode
);
4619 for (i
= 0; i
<= 2; i
++)
4621 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
4622 mode
= GET_MODE_WIDER_MODE (mode
))
4624 rtx tem
= rtx_alloc (CONST_DOUBLE
);
4625 union real_extract u
;
4627 /* Zero any holes in a structure. */
4628 memset ((char *) &u
, 0, sizeof u
);
4629 u
.d
= i
== 0 ? dconst0
: i
== 1 ? dconst1
: dconst2
;
4631 /* Avoid trailing garbage in the rtx. */
4632 if (sizeof (u
) < sizeof (HOST_WIDE_INT
))
4633 CONST_DOUBLE_LOW (tem
) = 0;
4634 if (sizeof (u
) < 2 * sizeof (HOST_WIDE_INT
))
4635 CONST_DOUBLE_HIGH (tem
) = 0;
4637 memcpy (&CONST_DOUBLE_LOW (tem
), &u
, sizeof u
);
4638 CONST_DOUBLE_MEM (tem
) = cc0_rtx
;
4639 CONST_DOUBLE_CHAIN (tem
) = NULL_RTX
;
4640 PUT_MODE (tem
, mode
);
4642 const_tiny_rtx
[i
][(int) mode
] = tem
;
4645 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
4647 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
4648 mode
= GET_MODE_WIDER_MODE (mode
))
4649 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
4651 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
4653 mode
= GET_MODE_WIDER_MODE (mode
))
4654 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
4657 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
4658 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
4659 const_tiny_rtx
[0][i
] = const0_rtx
;
4661 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
4662 if (STORE_FLAG_VALUE
== 1)
4663 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
4665 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4666 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4667 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4668 ggc_add_rtx_root ((rtx
*) const_tiny_rtx
, sizeof const_tiny_rtx
/ sizeof (rtx
));
4669 ggc_add_rtx_root (&const_true_rtx
, 1);
4671 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4672 return_address_pointer_rtx
4673 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
4677 struct_value_rtx
= STRUCT_VALUE
;
4679 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
4682 #ifdef STRUCT_VALUE_INCOMING
4683 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
4685 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4686 struct_value_incoming_rtx
4687 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
4689 struct_value_incoming_rtx
= struct_value_rtx
;
4693 #ifdef STATIC_CHAIN_REGNUM
4694 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
4696 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4697 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
4698 static_chain_incoming_rtx
4699 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
4702 static_chain_incoming_rtx
= static_chain_rtx
;
4706 static_chain_rtx
= STATIC_CHAIN
;
4708 #ifdef STATIC_CHAIN_INCOMING
4709 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
4711 static_chain_incoming_rtx
= static_chain_rtx
;
4715 if (PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
4716 pic_offset_table_rtx
= gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
4718 ggc_add_rtx_root (&pic_offset_table_rtx
, 1);
4719 ggc_add_rtx_root (&struct_value_rtx
, 1);
4720 ggc_add_rtx_root (&struct_value_incoming_rtx
, 1);
4721 ggc_add_rtx_root (&static_chain_rtx
, 1);
4722 ggc_add_rtx_root (&static_chain_incoming_rtx
, 1);
4723 ggc_add_rtx_root (&return_address_pointer_rtx
, 1);
4726 /* Query and clear/ restore no_line_numbers. This is used by the
4727 switch / case handling in stmt.c to give proper line numbers in
4728 warnings about unreachable code. */
4731 force_line_numbers ()
4733 int old
= no_line_numbers
;
4735 no_line_numbers
= 0;
4737 force_next_line_note ();
4742 restore_line_number_status (old_value
)
4745 no_line_numbers
= old_value
;