1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
60 /* Commonly used modes. */
62 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
63 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
64 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
65 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num
= 1;
73 /* Highest label number in current function.
74 Zero means use the value of label_num instead.
75 This is nonzero only when belatedly compiling an inline function. */
77 static int last_label_num
;
79 /* Value label_num had when set_new_first_and_last_label_number was called.
80 If label_num has not changed since then, last_label_num is valid. */
82 static int base_label_num
;
84 /* Nonzero means do not generate NOTEs for source line numbers. */
86 static int no_line_numbers
;
88 /* Commonly used rtx's, so that we only need space for one copy.
89 These are initialized once for the entire compilation.
90 All of these are unique; no other rtx-object will be equal to any
93 rtx global_rtl
[GR_MAX
];
95 /* Commonly used RTL for hard registers. These objects are not necessarily
96 unique, so we allocate them separately from global_rtl. They are
97 initialized once per compilation unit, then copied into regno_reg_rtx
98 at the beginning of each function. */
99 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
101 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
102 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
103 record a copy of const[012]_rtx. */
105 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
109 REAL_VALUE_TYPE dconst0
;
110 REAL_VALUE_TYPE dconst1
;
111 REAL_VALUE_TYPE dconst2
;
112 REAL_VALUE_TYPE dconstm1
;
114 /* All references to the following fixed hard registers go through
115 these unique rtl objects. On machines where the frame-pointer and
116 arg-pointer are the same register, they use the same unique object.
118 After register allocation, other rtl objects which used to be pseudo-regs
119 may be clobbered to refer to the frame-pointer register.
120 But references that were originally to the frame-pointer can be
121 distinguished from the others because they contain frame_pointer_rtx.
123 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
124 tricky: until register elimination has taken place hard_frame_pointer_rtx
125 should be used if it is being set, and frame_pointer_rtx otherwise. After
126 register elimination hard_frame_pointer_rtx should always be used.
127 On machines where the two registers are same (most) then these are the
130 In an inline procedure, the stack and frame pointer rtxs may not be
131 used for anything else. */
132 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
133 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
134 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
135 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
136 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
138 /* This is used to implement __builtin_return_address for some machines.
139 See for instance the MIPS port. */
140 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
142 /* We make one copy of (const_int C) where C is in
143 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
144 to save space during the compilation and simplify comparisons of
147 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
149 /* A hash table storing CONST_INTs whose absolute value is greater
150 than MAX_SAVED_CONST_INT. */
152 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
153 htab_t const_int_htab
;
155 /* A hash table storing memory attribute structures. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
157 htab_t mem_attrs_htab
;
159 /* A hash table storing all CONST_DOUBLEs. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
161 htab_t const_double_htab
;
163 #define first_insn (cfun->emit->x_first_insn)
164 #define last_insn (cfun->emit->x_last_insn)
165 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
166 #define last_linenum (cfun->emit->x_last_linenum)
167 #define last_filename (cfun->emit->x_last_filename)
168 #define first_label_num (cfun->emit->x_first_label_num)
170 static rtx make_jump_insn_raw
PARAMS ((rtx
));
171 static rtx make_call_insn_raw
PARAMS ((rtx
));
172 static rtx find_line_note
PARAMS ((rtx
));
173 static rtx change_address_1
PARAMS ((rtx
, enum machine_mode
, rtx
,
175 static void unshare_all_rtl_1
PARAMS ((rtx
));
176 static void unshare_all_decls
PARAMS ((tree
));
177 static void reset_used_decls
PARAMS ((tree
));
178 static void mark_label_nuses
PARAMS ((rtx
));
179 static hashval_t const_int_htab_hash
PARAMS ((const void *));
180 static int const_int_htab_eq
PARAMS ((const void *,
182 static hashval_t const_double_htab_hash
PARAMS ((const void *));
183 static int const_double_htab_eq
PARAMS ((const void *,
185 static rtx lookup_const_double
PARAMS ((rtx
));
186 static hashval_t mem_attrs_htab_hash
PARAMS ((const void *));
187 static int mem_attrs_htab_eq
PARAMS ((const void *,
189 static mem_attrs
*get_mem_attrs
PARAMS ((HOST_WIDE_INT
, tree
, rtx
,
192 static tree component_ref_for_mem_expr
PARAMS ((tree
));
193 static rtx gen_const_vector_0
PARAMS ((enum machine_mode
));
195 /* Probability of the conditional branch currently proceeded by try_split.
196 Set to -1 otherwise. */
197 int split_branch_probability
= -1;
199 /* Returns a hash code for X (which is a really a CONST_INT). */
202 const_int_htab_hash (x
)
205 return (hashval_t
) INTVAL ((struct rtx_def
*) x
);
208 /* Returns non-zero if the value represented by X (which is really a
209 CONST_INT) is the same as that given by Y (which is really a
213 const_int_htab_eq (x
, y
)
217 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
220 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
222 const_double_htab_hash (x
)
229 for (i
= 0; i
< sizeof(CONST_DOUBLE_FORMAT
)-1; i
++)
230 h
^= XWINT (value
, i
);
234 /* Returns non-zero if the value represented by X (really a ...)
235 is the same as that represented by Y (really a ...) */
237 const_double_htab_eq (x
, y
)
241 rtx a
= (rtx
)x
, b
= (rtx
)y
;
244 if (GET_MODE (a
) != GET_MODE (b
))
246 for (i
= 0; i
< sizeof(CONST_DOUBLE_FORMAT
)-1; i
++)
247 if (XWINT (a
, i
) != XWINT (b
, i
))
253 /* Returns a hash code for X (which is a really a mem_attrs *). */
256 mem_attrs_htab_hash (x
)
259 mem_attrs
*p
= (mem_attrs
*) x
;
261 return (p
->alias
^ (p
->align
* 1000)
262 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
263 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
267 /* Returns non-zero if the value represented by X (which is really a
268 mem_attrs *) is the same as that given by Y (which is also really a
272 mem_attrs_htab_eq (x
, y
)
276 mem_attrs
*p
= (mem_attrs
*) x
;
277 mem_attrs
*q
= (mem_attrs
*) y
;
279 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
280 && p
->size
== q
->size
&& p
->align
== q
->align
);
283 /* Allocate a new mem_attrs structure and insert it into the hash table if
284 one identical to it is not already in the table. We are doing this for
288 get_mem_attrs (alias
, expr
, offset
, size
, align
, mode
)
294 enum machine_mode mode
;
299 /* If everything is the default, we can just return zero. */
300 if (alias
== 0 && expr
== 0 && offset
== 0
302 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
303 && (align
== BITS_PER_UNIT
305 && mode
!= BLKmode
&& align
== GET_MODE_ALIGNMENT (mode
))))
310 attrs
.offset
= offset
;
314 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
317 *slot
= ggc_alloc (sizeof (mem_attrs
));
318 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
324 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
325 don't attempt to share with the various global pieces of rtl (such as
326 frame_pointer_rtx). */
329 gen_raw_REG (mode
, regno
)
330 enum machine_mode mode
;
333 rtx x
= gen_rtx_raw_REG (mode
, regno
);
334 ORIGINAL_REGNO (x
) = regno
;
338 /* There are some RTL codes that require special attention; the generation
339 functions do the raw handling. If you add to this list, modify
340 special_rtx in gengenrtl.c as well. */
343 gen_rtx_CONST_INT (mode
, arg
)
344 enum machine_mode mode ATTRIBUTE_UNUSED
;
349 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
350 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
352 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
353 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
354 return const_true_rtx
;
357 /* Look up the CONST_INT in the hash table. */
358 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
359 (hashval_t
) arg
, INSERT
);
361 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
367 gen_int_mode (c
, mode
)
369 enum machine_mode mode
;
371 return GEN_INT (trunc_int_for_mode (c
, mode
));
374 /* CONST_DOUBLEs might be created from pairs of integers, or from
375 REAL_VALUE_TYPEs. Also, their length is known only at run time,
376 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
378 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
379 hash table. If so, return its counterpart; otherwise add it
380 to the hash table and return it. */
382 lookup_const_double (real
)
385 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
392 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
393 VALUE in mode MODE. */
395 const_double_from_real_value (value
, mode
)
396 REAL_VALUE_TYPE value
;
397 enum machine_mode mode
;
399 rtx real
= rtx_alloc (CONST_DOUBLE
);
400 PUT_MODE (real
, mode
);
402 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
404 return lookup_const_double (real
);
407 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
408 of ints: I0 is the low-order word and I1 is the high-order word.
409 Do not use this routine for non-integer modes; convert to
410 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
413 immed_double_const (i0
, i1
, mode
)
414 HOST_WIDE_INT i0
, i1
;
415 enum machine_mode mode
;
420 if (mode
!= VOIDmode
)
423 if (GET_MODE_CLASS (mode
) != MODE_INT
424 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
425 /* We can get a 0 for an error mark. */
426 && GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
427 && GET_MODE_CLASS (mode
) != MODE_VECTOR_FLOAT
)
430 /* We clear out all bits that don't belong in MODE, unless they and
431 our sign bit are all one. So we get either a reasonable negative
432 value or a reasonable unsigned value for this mode. */
433 width
= GET_MODE_BITSIZE (mode
);
434 if (width
< HOST_BITS_PER_WIDE_INT
435 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
436 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
437 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
438 else if (width
== HOST_BITS_PER_WIDE_INT
439 && ! (i1
== ~0 && i0
< 0))
441 else if (width
> 2 * HOST_BITS_PER_WIDE_INT
)
442 /* We cannot represent this value as a constant. */
445 /* If this would be an entire word for the target, but is not for
446 the host, then sign-extend on the host so that the number will
447 look the same way on the host that it would on the target.
449 For example, when building a 64 bit alpha hosted 32 bit sparc
450 targeted compiler, then we want the 32 bit unsigned value -1 to be
451 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
452 The latter confuses the sparc backend. */
454 if (width
< HOST_BITS_PER_WIDE_INT
455 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
456 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
458 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
461 ??? Strictly speaking, this is wrong if we create a CONST_INT for
462 a large unsigned constant with the size of MODE being
463 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
464 in a wider mode. In that case we will mis-interpret it as a
467 Unfortunately, the only alternative is to make a CONST_DOUBLE for
468 any constant in any mode if it is an unsigned constant larger
469 than the maximum signed integer in an int on the host. However,
470 doing this will break everyone that always expects to see a
471 CONST_INT for SImode and smaller.
473 We have always been making CONST_INTs in this case, so nothing
474 new is being broken. */
476 if (width
<= HOST_BITS_PER_WIDE_INT
)
477 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
480 /* If this integer fits in one word, return a CONST_INT. */
481 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
484 /* We use VOIDmode for integers. */
485 value
= rtx_alloc (CONST_DOUBLE
);
486 PUT_MODE (value
, VOIDmode
);
488 CONST_DOUBLE_LOW (value
) = i0
;
489 CONST_DOUBLE_HIGH (value
) = i1
;
491 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
492 XWINT (value
, i
) = 0;
494 return lookup_const_double (value
);
498 gen_rtx_REG (mode
, regno
)
499 enum machine_mode mode
;
502 /* In case the MD file explicitly references the frame pointer, have
503 all such references point to the same frame pointer. This is
504 used during frame pointer elimination to distinguish the explicit
505 references to these registers from pseudos that happened to be
508 If we have eliminated the frame pointer or arg pointer, we will
509 be using it as a normal register, for example as a spill
510 register. In such cases, we might be accessing it in a mode that
511 is not Pmode and therefore cannot use the pre-allocated rtx.
513 Also don't do this when we are making new REGs in reload, since
514 we don't want to get confused with the real pointers. */
516 if (mode
== Pmode
&& !reload_in_progress
)
518 if (regno
== FRAME_POINTER_REGNUM
)
519 return frame_pointer_rtx
;
520 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
521 if (regno
== HARD_FRAME_POINTER_REGNUM
)
522 return hard_frame_pointer_rtx
;
524 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
525 if (regno
== ARG_POINTER_REGNUM
)
526 return arg_pointer_rtx
;
528 #ifdef RETURN_ADDRESS_POINTER_REGNUM
529 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
530 return return_address_pointer_rtx
;
532 if (regno
== PIC_OFFSET_TABLE_REGNUM
533 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
534 return pic_offset_table_rtx
;
535 if (regno
== STACK_POINTER_REGNUM
)
536 return stack_pointer_rtx
;
540 /* If the per-function register table has been set up, try to re-use
541 an existing entry in that table to avoid useless generation of RTL.
543 This code is disabled for now until we can fix the various backends
544 which depend on having non-shared hard registers in some cases. Long
545 term we want to re-enable this code as it can significantly cut down
546 on the amount of useless RTL that gets generated. */
550 && regno
< FIRST_PSEUDO_REGISTER
551 && reg_raw_mode
[regno
] == mode
)
552 return regno_reg_rtx
[regno
];
555 return gen_raw_REG (mode
, regno
);
559 gen_rtx_MEM (mode
, addr
)
560 enum machine_mode mode
;
563 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
565 /* This field is not cleared by the mere allocation of the rtx, so
573 gen_rtx_SUBREG (mode
, reg
, offset
)
574 enum machine_mode mode
;
578 /* This is the most common failure type.
579 Catch it early so we can see who does it. */
580 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
583 /* This check isn't usable right now because combine will
584 throw arbitrary crap like a CALL into a SUBREG in
585 gen_lowpart_for_combine so we must just eat it. */
587 /* Check for this too. */
588 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
591 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
594 /* Generate a SUBREG representing the least-significant part of REG if MODE
595 is smaller than mode of REG, otherwise paradoxical SUBREG. */
598 gen_lowpart_SUBREG (mode
, reg
)
599 enum machine_mode mode
;
602 enum machine_mode inmode
;
604 inmode
= GET_MODE (reg
);
605 if (inmode
== VOIDmode
)
607 return gen_rtx_SUBREG (mode
, reg
,
608 subreg_lowpart_offset (mode
, inmode
));
611 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
613 ** This routine generates an RTX of the size specified by
614 ** <code>, which is an RTX code. The RTX structure is initialized
615 ** from the arguments <element1> through <elementn>, which are
616 ** interpreted according to the specific RTX type's format. The
617 ** special machine mode associated with the rtx (if any) is specified
620 ** gen_rtx can be invoked in a way which resembles the lisp-like
621 ** rtx it will generate. For example, the following rtx structure:
623 ** (plus:QI (mem:QI (reg:SI 1))
624 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
626 ** ...would be generated by the following C code:
628 ** gen_rtx (PLUS, QImode,
629 ** gen_rtx (MEM, QImode,
630 ** gen_rtx (REG, SImode, 1)),
631 ** gen_rtx (MEM, QImode,
632 ** gen_rtx (PLUS, SImode,
633 ** gen_rtx (REG, SImode, 2),
634 ** gen_rtx (REG, SImode, 3)))),
639 gen_rtx
VPARAMS ((enum rtx_code code
, enum machine_mode mode
, ...))
641 int i
; /* Array indices... */
642 const char *fmt
; /* Current rtx's format... */
643 rtx rt_val
; /* RTX to return to caller... */
646 VA_FIXEDARG (p
, enum rtx_code
, code
);
647 VA_FIXEDARG (p
, enum machine_mode
, mode
);
652 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
657 HOST_WIDE_INT arg0
= va_arg (p
, HOST_WIDE_INT
);
658 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
660 rt_val
= immed_double_const (arg0
, arg1
, mode
);
665 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
669 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
673 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
674 rt_val
->mode
= mode
; /* Store the machine mode... */
676 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
677 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
681 case '0': /* Unused field. */
684 case 'i': /* An integer? */
685 XINT (rt_val
, i
) = va_arg (p
, int);
688 case 'w': /* A wide integer? */
689 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
692 case 's': /* A string? */
693 XSTR (rt_val
, i
) = va_arg (p
, char *);
696 case 'e': /* An expression? */
697 case 'u': /* An insn? Same except when printing. */
698 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
701 case 'E': /* An RTX vector? */
702 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
705 case 'b': /* A bitmap? */
706 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
709 case 't': /* A tree? */
710 XTREE (rt_val
, i
) = va_arg (p
, tree
);
724 /* gen_rtvec (n, [rt1, ..., rtn])
726 ** This routine creates an rtvec and stores within it the
727 ** pointers to rtx's which are its arguments.
732 gen_rtvec
VPARAMS ((int n
, ...))
738 VA_FIXEDARG (p
, int, n
);
741 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
743 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
745 for (i
= 0; i
< n
; i
++)
746 vector
[i
] = va_arg (p
, rtx
);
748 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
752 return gen_rtvec_v (save_n
, vector
);
756 gen_rtvec_v (n
, argp
)
764 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
766 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
768 for (i
= 0; i
< n
; i
++)
769 rt_val
->elem
[i
] = *argp
++;
774 /* Generate a REG rtx for a new pseudo register of mode MODE.
775 This pseudo is assigned the next sequential register number. */
779 enum machine_mode mode
;
781 struct function
*f
= cfun
;
784 /* Don't let anything called after initial flow analysis create new
789 if (generating_concat_p
790 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
791 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
793 /* For complex modes, don't make a single pseudo.
794 Instead, make a CONCAT of two pseudos.
795 This allows noncontiguous allocation of the real and imaginary parts,
796 which makes much better code. Besides, allocating DCmode
797 pseudos overstrains reload on some machines like the 386. */
798 rtx realpart
, imagpart
;
799 int size
= GET_MODE_UNIT_SIZE (mode
);
800 enum machine_mode partmode
801 = mode_for_size (size
* BITS_PER_UNIT
,
802 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
803 ? MODE_FLOAT
: MODE_INT
),
806 realpart
= gen_reg_rtx (partmode
);
807 imagpart
= gen_reg_rtx (partmode
);
808 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
811 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
812 enough to have an element for this pseudo reg number. */
814 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
816 int old_size
= f
->emit
->regno_pointer_align_length
;
821 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
822 memset (new + old_size
, 0, old_size
);
823 f
->emit
->regno_pointer_align
= (unsigned char *) new;
825 new1
= (rtx
*) ggc_realloc (f
->emit
->x_regno_reg_rtx
,
826 old_size
* 2 * sizeof (rtx
));
827 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
828 regno_reg_rtx
= new1
;
830 new2
= (tree
*) ggc_realloc (f
->emit
->regno_decl
,
831 old_size
* 2 * sizeof (tree
));
832 memset (new2
+ old_size
, 0, old_size
* sizeof (tree
));
833 f
->emit
->regno_decl
= new2
;
835 f
->emit
->regno_pointer_align_length
= old_size
* 2;
838 val
= gen_raw_REG (mode
, reg_rtx_no
);
839 regno_reg_rtx
[reg_rtx_no
++] = val
;
843 /* Identify REG (which may be a CONCAT) as a user register. */
849 if (GET_CODE (reg
) == CONCAT
)
851 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
852 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
854 else if (GET_CODE (reg
) == REG
)
855 REG_USERVAR_P (reg
) = 1;
860 /* Identify REG as a probable pointer register and show its alignment
861 as ALIGN, if nonzero. */
864 mark_reg_pointer (reg
, align
)
868 if (! REG_POINTER (reg
))
870 REG_POINTER (reg
) = 1;
873 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
875 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
876 /* We can no-longer be sure just how aligned this pointer is */
877 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
880 /* Return 1 plus largest pseudo reg number used in the current function. */
888 /* Return 1 + the largest label number used so far in the current function. */
893 if (last_label_num
&& label_num
== base_label_num
)
894 return last_label_num
;
898 /* Return first label number used in this function (if any were used). */
901 get_first_label_num ()
903 return first_label_num
;
906 /* Return the final regno of X, which is a SUBREG of a hard
909 subreg_hard_regno (x
, check_mode
)
913 enum machine_mode mode
= GET_MODE (x
);
914 unsigned int byte_offset
, base_regno
, final_regno
;
915 rtx reg
= SUBREG_REG (x
);
917 /* This is where we attempt to catch illegal subregs
918 created by the compiler. */
919 if (GET_CODE (x
) != SUBREG
920 || GET_CODE (reg
) != REG
)
922 base_regno
= REGNO (reg
);
923 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
925 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
928 /* Catch non-congruent offsets too. */
929 byte_offset
= SUBREG_BYTE (x
);
930 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
933 final_regno
= subreg_regno (x
);
938 /* Return a value representing some low-order bits of X, where the number
939 of low-order bits is given by MODE. Note that no conversion is done
940 between floating-point and fixed-point values, rather, the bit
941 representation is returned.
943 This function handles the cases in common between gen_lowpart, below,
944 and two variants in cse.c and combine.c. These are the cases that can
945 be safely handled at all points in the compilation.
947 If this is not a case we can handle, return 0. */
950 gen_lowpart_common (mode
, x
)
951 enum machine_mode mode
;
954 int msize
= GET_MODE_SIZE (mode
);
955 int xsize
= GET_MODE_SIZE (GET_MODE (x
));
958 if (GET_MODE (x
) == mode
)
961 /* MODE must occupy no more words than the mode of X. */
962 if (GET_MODE (x
) != VOIDmode
963 && ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
964 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
967 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
968 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
969 && GET_MODE (x
) != VOIDmode
&& msize
> xsize
)
972 offset
= subreg_lowpart_offset (mode
, GET_MODE (x
));
974 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
975 && (GET_MODE_CLASS (mode
) == MODE_INT
976 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
978 /* If we are getting the low-order part of something that has been
979 sign- or zero-extended, we can either just use the object being
980 extended or make a narrower extension. If we want an even smaller
981 piece than the size of the object being extended, call ourselves
984 This case is used mostly by combine and cse. */
986 if (GET_MODE (XEXP (x
, 0)) == mode
)
988 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
989 return gen_lowpart_common (mode
, XEXP (x
, 0));
990 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
991 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
993 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
994 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
)
995 return simplify_gen_subreg (mode
, x
, GET_MODE (x
), offset
);
996 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
997 from the low-order part of the constant. */
998 else if ((GET_MODE_CLASS (mode
) == MODE_INT
999 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1000 && GET_MODE (x
) == VOIDmode
1001 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
1003 /* If MODE is twice the host word size, X is already the desired
1004 representation. Otherwise, if MODE is wider than a word, we can't
1005 do this. If MODE is exactly a word, return just one CONST_INT. */
1007 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
1009 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
1011 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
1012 return (GET_CODE (x
) == CONST_INT
? x
1013 : GEN_INT (CONST_DOUBLE_LOW (x
)));
1016 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1017 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
1018 : CONST_DOUBLE_LOW (x
));
1020 /* Sign extend to HOST_WIDE_INT. */
1021 val
= trunc_int_for_mode (val
, mode
);
1023 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
1028 /* The floating-point emulator can handle all conversions between
1029 FP and integer operands. This simplifies reload because it
1030 doesn't have to deal with constructs like (subreg:DI
1031 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1032 /* Single-precision floats are always 32-bits and double-precision
1033 floats are always 64-bits. */
1035 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1036 && GET_MODE_BITSIZE (mode
) == 32
1037 && GET_CODE (x
) == CONST_INT
)
1043 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
1044 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1046 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1047 && GET_MODE_BITSIZE (mode
) == 64
1048 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
1049 && GET_MODE (x
) == VOIDmode
)
1053 HOST_WIDE_INT low
, high
;
1055 if (GET_CODE (x
) == CONST_INT
)
1058 high
= low
>> (HOST_BITS_PER_WIDE_INT
- 1);
1062 low
= CONST_DOUBLE_LOW (x
);
1063 high
= CONST_DOUBLE_HIGH (x
);
1066 #if HOST_BITS_PER_WIDE_INT == 32
1067 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1069 if (WORDS_BIG_ENDIAN
)
1070 i
[0] = high
, i
[1] = low
;
1072 i
[0] = low
, i
[1] = high
;
1077 r
= REAL_VALUE_FROM_TARGET_DOUBLE (i
);
1078 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1080 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1081 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1082 && GET_CODE (x
) == CONST_DOUBLE
1083 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
1086 long i
[4]; /* Only the low 32 bits of each 'long' are used. */
1087 int endian
= WORDS_BIG_ENDIAN
? 1 : 0;
1089 /* Convert 'r' into an array of four 32-bit words in target word
1091 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
1092 switch (GET_MODE_BITSIZE (GET_MODE (x
)))
1095 REAL_VALUE_TO_TARGET_SINGLE (r
, i
[3 * endian
]);
1098 i
[3 - 3 * endian
] = 0;
1101 REAL_VALUE_TO_TARGET_DOUBLE (r
, i
+ 2 * endian
);
1102 i
[2 - 2 * endian
] = 0;
1103 i
[3 - 2 * endian
] = 0;
1106 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
+ endian
);
1107 i
[3 - 3 * endian
] = 0;
1110 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
);
1115 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1117 #if HOST_BITS_PER_WIDE_INT == 32
1118 return immed_double_const (i
[3 * endian
], i
[1 + endian
], mode
);
1120 if (HOST_BITS_PER_WIDE_INT
!= 64)
1123 return immed_double_const ((((unsigned long) i
[3 * endian
])
1124 | ((HOST_WIDE_INT
) i
[1 + endian
] << 32)),
1125 (((unsigned long) i
[2 - endian
])
1126 | ((HOST_WIDE_INT
) i
[3 - 3 * endian
] << 32)),
1131 /* Otherwise, we can't do this. */
1135 /* Return the real part (which has mode MODE) of a complex value X.
1136 This always comes at the low address in memory. */
1139 gen_realpart (mode
, x
)
1140 enum machine_mode mode
;
1143 if (WORDS_BIG_ENDIAN
1144 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1146 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1148 ("can't access real part of complex value in hard register");
1149 else if (WORDS_BIG_ENDIAN
)
1150 return gen_highpart (mode
, x
);
1152 return gen_lowpart (mode
, x
);
1155 /* Return the imaginary part (which has mode MODE) of a complex value X.
1156 This always comes at the high address in memory. */
1159 gen_imagpart (mode
, x
)
1160 enum machine_mode mode
;
1163 if (WORDS_BIG_ENDIAN
)
1164 return gen_lowpart (mode
, x
);
1165 else if (! WORDS_BIG_ENDIAN
1166 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1168 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1170 ("can't access imaginary part of complex value in hard register");
1172 return gen_highpart (mode
, x
);
1175 /* Return 1 iff X, assumed to be a SUBREG,
1176 refers to the real part of the complex value in its containing reg.
1177 Complex values are always stored with the real part in the first word,
1178 regardless of WORDS_BIG_ENDIAN. */
1181 subreg_realpart_p (x
)
1184 if (GET_CODE (x
) != SUBREG
)
1187 return ((unsigned int) SUBREG_BYTE (x
)
1188 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1191 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1192 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1193 least-significant part of X.
1194 MODE specifies how big a part of X to return;
1195 it usually should not be larger than a word.
1196 If X is a MEM whose address is a QUEUED, the value may be so also. */
1199 gen_lowpart (mode
, x
)
1200 enum machine_mode mode
;
1203 rtx result
= gen_lowpart_common (mode
, x
);
1207 else if (GET_CODE (x
) == REG
)
1209 /* Must be a hard reg that's not valid in MODE. */
1210 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1215 else if (GET_CODE (x
) == MEM
)
1217 /* The only additional case we can do is MEM. */
1219 if (WORDS_BIG_ENDIAN
)
1220 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1221 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1223 if (BYTES_BIG_ENDIAN
)
1224 /* Adjust the address so that the address-after-the-data
1226 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1227 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1229 return adjust_address (x
, mode
, offset
);
1231 else if (GET_CODE (x
) == ADDRESSOF
)
1232 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1237 /* Like `gen_lowpart', but refer to the most significant part.
1238 This is used to access the imaginary part of a complex number. */
1241 gen_highpart (mode
, x
)
1242 enum machine_mode mode
;
1245 unsigned int msize
= GET_MODE_SIZE (mode
);
1248 /* This case loses if X is a subreg. To catch bugs early,
1249 complain if an invalid MODE is used even in other cases. */
1250 if (msize
> UNITS_PER_WORD
1251 && msize
!= GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1254 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1255 subreg_highpart_offset (mode
, GET_MODE (x
)));
1257 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1258 the target if we have a MEM. gen_highpart must return a valid operand,
1259 emitting code if necessary to do so. */
1260 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1261 result
= validize_mem (result
);
1268 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1269 be VOIDmode constant. */
1271 gen_highpart_mode (outermode
, innermode
, exp
)
1272 enum machine_mode outermode
, innermode
;
1275 if (GET_MODE (exp
) != VOIDmode
)
1277 if (GET_MODE (exp
) != innermode
)
1279 return gen_highpart (outermode
, exp
);
1281 return simplify_gen_subreg (outermode
, exp
, innermode
,
1282 subreg_highpart_offset (outermode
, innermode
));
1285 /* Return offset in bytes to get OUTERMODE low part
1286 of the value in mode INNERMODE stored in memory in target format. */
1289 subreg_lowpart_offset (outermode
, innermode
)
1290 enum machine_mode outermode
, innermode
;
1292 unsigned int offset
= 0;
1293 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1297 if (WORDS_BIG_ENDIAN
)
1298 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1299 if (BYTES_BIG_ENDIAN
)
1300 offset
+= difference
% UNITS_PER_WORD
;
1306 /* Return offset in bytes to get OUTERMODE high part
1307 of the value in mode INNERMODE stored in memory in target format. */
1309 subreg_highpart_offset (outermode
, innermode
)
1310 enum machine_mode outermode
, innermode
;
1312 unsigned int offset
= 0;
1313 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1315 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1320 if (! WORDS_BIG_ENDIAN
)
1321 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1322 if (! BYTES_BIG_ENDIAN
)
1323 offset
+= difference
% UNITS_PER_WORD
;
1329 /* Return 1 iff X, assumed to be a SUBREG,
1330 refers to the least significant part of its containing reg.
1331 If X is not a SUBREG, always return 1 (it is its own low part!). */
1334 subreg_lowpart_p (x
)
1337 if (GET_CODE (x
) != SUBREG
)
1339 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1342 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1343 == SUBREG_BYTE (x
));
1347 /* Helper routine for all the constant cases of operand_subword.
1348 Some places invoke this directly. */
1351 constant_subword (op
, offset
, mode
)
1354 enum machine_mode mode
;
1356 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1359 /* If OP is already an integer word, return it. */
1360 if (GET_MODE_CLASS (mode
) == MODE_INT
1361 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1364 /* The output is some bits, the width of the target machine's word.
1365 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1367 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1368 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1369 && GET_MODE_BITSIZE (mode
) == 64
1370 && GET_CODE (op
) == CONST_DOUBLE
)
1375 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1376 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1378 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1379 which the words are written depends on the word endianness.
1380 ??? This is a potential portability problem and should
1381 be fixed at some point.
1383 We must exercise caution with the sign bit. By definition there
1384 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1385 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1386 So we explicitly mask and sign-extend as necessary. */
1387 if (BITS_PER_WORD
== 32)
1390 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1391 return GEN_INT (val
);
1393 #if HOST_BITS_PER_WIDE_INT >= 64
1394 else if (BITS_PER_WORD
>= 64 && offset
== 0)
1396 val
= k
[! WORDS_BIG_ENDIAN
];
1397 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1398 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1399 return GEN_INT (val
);
1402 else if (BITS_PER_WORD
== 16)
1404 val
= k
[offset
>> 1];
1405 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1407 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1408 return GEN_INT (val
);
1413 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1414 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1415 && GET_MODE_BITSIZE (mode
) > 64
1416 && GET_CODE (op
) == CONST_DOUBLE
)
1421 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1422 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1424 if (BITS_PER_WORD
== 32)
1427 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1428 return GEN_INT (val
);
1430 #if HOST_BITS_PER_WIDE_INT >= 64
1431 else if (BITS_PER_WORD
>= 64 && offset
<= 1)
1433 val
= k
[offset
* 2 + ! WORDS_BIG_ENDIAN
];
1434 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1435 val
|= (HOST_WIDE_INT
) k
[offset
* 2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1436 return GEN_INT (val
);
1443 /* Single word float is a little harder, since single- and double-word
1444 values often do not have the same high-order bits. We have already
1445 verified that we want the only defined word of the single-word value. */
1446 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1447 && GET_MODE_BITSIZE (mode
) == 32
1448 && GET_CODE (op
) == CONST_DOUBLE
)
1453 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1454 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1456 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1458 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1460 if (BITS_PER_WORD
== 16)
1462 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1464 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1467 return GEN_INT (val
);
1470 /* The only remaining cases that we can handle are integers.
1471 Convert to proper endianness now since these cases need it.
1472 At this point, offset == 0 means the low-order word.
1474 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1475 in general. However, if OP is (const_int 0), we can just return
1478 if (op
== const0_rtx
)
1481 if (GET_MODE_CLASS (mode
) != MODE_INT
1482 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1483 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1486 if (WORDS_BIG_ENDIAN
)
1487 offset
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - offset
;
1489 /* Find out which word on the host machine this value is in and get
1490 it from the constant. */
1491 val
= (offset
/ size_ratio
== 0
1492 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1493 : (GET_CODE (op
) == CONST_INT
1494 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1496 /* Get the value we want into the low bits of val. */
1497 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1498 val
= ((val
>> ((offset
% size_ratio
) * BITS_PER_WORD
)));
1500 val
= trunc_int_for_mode (val
, word_mode
);
1502 return GEN_INT (val
);
1505 /* Return subword OFFSET of operand OP.
1506 The word number, OFFSET, is interpreted as the word number starting
1507 at the low-order address. OFFSET 0 is the low-order word if not
1508 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1510 If we cannot extract the required word, we return zero. Otherwise,
1511 an rtx corresponding to the requested word will be returned.
1513 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1514 reload has completed, a valid address will always be returned. After
1515 reload, if a valid address cannot be returned, we return zero.
1517 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1518 it is the responsibility of the caller.
1520 MODE is the mode of OP in case it is a CONST_INT.
1522 ??? This is still rather broken for some cases. The problem for the
1523 moment is that all callers of this thing provide no 'goal mode' to
1524 tell us to work with. This exists because all callers were written
1525 in a word based SUBREG world.
1526 Now use of this function can be deprecated by simplify_subreg in most
1531 operand_subword (op
, offset
, validate_address
, mode
)
1533 unsigned int offset
;
1534 int validate_address
;
1535 enum machine_mode mode
;
1537 if (mode
== VOIDmode
)
1538 mode
= GET_MODE (op
);
1540 if (mode
== VOIDmode
)
1543 /* If OP is narrower than a word, fail. */
1545 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1548 /* If we want a word outside OP, return zero. */
1550 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1553 /* Form a new MEM at the requested address. */
1554 if (GET_CODE (op
) == MEM
)
1556 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1558 if (! validate_address
)
1561 else if (reload_completed
)
1563 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1567 return replace_equiv_address (new, XEXP (new, 0));
1570 /* Rest can be handled by simplify_subreg. */
1571 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1574 /* Similar to `operand_subword', but never return 0. If we can't extract
1575 the required subword, put OP into a register and try again. If that fails,
1576 abort. We always validate the address in this case.
1578 MODE is the mode of OP, in case it is CONST_INT. */
1581 operand_subword_force (op
, offset
, mode
)
1583 unsigned int offset
;
1584 enum machine_mode mode
;
1586 rtx result
= operand_subword (op
, offset
, 1, mode
);
1591 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1593 /* If this is a register which can not be accessed by words, copy it
1594 to a pseudo register. */
1595 if (GET_CODE (op
) == REG
)
1596 op
= copy_to_reg (op
);
1598 op
= force_reg (mode
, op
);
1601 result
= operand_subword (op
, offset
, 1, mode
);
1608 /* Given a compare instruction, swap the operands.
1609 A test instruction is changed into a compare of 0 against the operand. */
1612 reverse_comparison (insn
)
1615 rtx body
= PATTERN (insn
);
1618 if (GET_CODE (body
) == SET
)
1619 comp
= SET_SRC (body
);
1621 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1623 if (GET_CODE (comp
) == COMPARE
)
1625 rtx op0
= XEXP (comp
, 0);
1626 rtx op1
= XEXP (comp
, 1);
1627 XEXP (comp
, 0) = op1
;
1628 XEXP (comp
, 1) = op0
;
1632 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1633 CONST0_RTX (GET_MODE (comp
)), comp
);
1634 if (GET_CODE (body
) == SET
)
1635 SET_SRC (body
) = new;
1637 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1641 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1642 or (2) a component ref of something variable. Represent the later with
1643 a NULL expression. */
1646 component_ref_for_mem_expr (ref
)
1649 tree inner
= TREE_OPERAND (ref
, 0);
1651 if (TREE_CODE (inner
) == COMPONENT_REF
)
1652 inner
= component_ref_for_mem_expr (inner
);
1655 tree placeholder_ptr
= 0;
1657 /* Now remove any conversions: they don't change what the underlying
1658 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1659 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1660 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1661 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1662 || TREE_CODE (inner
) == SAVE_EXPR
1663 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1664 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1665 inner
= find_placeholder (inner
, &placeholder_ptr
);
1667 inner
= TREE_OPERAND (inner
, 0);
1669 if (! DECL_P (inner
))
1673 if (inner
== TREE_OPERAND (ref
, 0))
1676 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1677 TREE_OPERAND (ref
, 1));
1680 /* Given REF, a MEM, and T, either the type of X or the expression
1681 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1682 if we are making a new object of this type. BITPOS is nonzero if
1683 there is an offset outstanding on T that will be applied later. */
1686 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, bitpos
)
1690 HOST_WIDE_INT bitpos
;
1692 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1693 tree expr
= MEM_EXPR (ref
);
1694 rtx offset
= MEM_OFFSET (ref
);
1695 rtx size
= MEM_SIZE (ref
);
1696 unsigned int align
= MEM_ALIGN (ref
);
1697 HOST_WIDE_INT apply_bitpos
= 0;
1700 /* It can happen that type_for_mode was given a mode for which there
1701 is no language-level type. In which case it returns NULL, which
1706 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1708 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1709 wrong answer, as it assumes that DECL_RTL already has the right alias
1710 info. Callers should not set DECL_RTL until after the call to
1711 set_mem_attributes. */
1712 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1715 /* Get the alias set from the expression or type (perhaps using a
1716 front-end routine) and use it. */
1717 alias
= get_alias_set (t
);
1719 MEM_VOLATILE_P (ref
) = TYPE_VOLATILE (type
);
1720 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1721 RTX_UNCHANGING_P (ref
)
1722 |= ((lang_hooks
.honor_readonly
1723 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1724 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1726 /* If we are making an object of this type, or if this is a DECL, we know
1727 that it is a scalar if the type is not an aggregate. */
1728 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1729 MEM_SCALAR_P (ref
) = 1;
1731 /* We can set the alignment from the type if we are making an object,
1732 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1733 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1734 align
= MAX (align
, TYPE_ALIGN (type
));
1736 /* If the size is known, we can set that. */
1737 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1738 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1740 /* If T is not a type, we may be able to deduce some more information about
1744 maybe_set_unchanging (ref
, t
);
1745 if (TREE_THIS_VOLATILE (t
))
1746 MEM_VOLATILE_P (ref
) = 1;
1748 /* Now remove any conversions: they don't change what the underlying
1749 object is. Likewise for SAVE_EXPR. */
1750 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1751 || TREE_CODE (t
) == NON_LVALUE_EXPR
1752 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1753 || TREE_CODE (t
) == SAVE_EXPR
)
1754 t
= TREE_OPERAND (t
, 0);
1756 /* If this expression can't be addressed (e.g., it contains a reference
1757 to a non-addressable field), show we don't change its alias set. */
1758 if (! can_address_p (t
))
1759 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1761 /* If this is a decl, set the attributes of the MEM from it. */
1765 offset
= const0_rtx
;
1766 apply_bitpos
= bitpos
;
1767 size
= (DECL_SIZE_UNIT (t
)
1768 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1769 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1770 align
= DECL_ALIGN (t
);
1773 /* If this is a constant, we know the alignment. */
1774 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1776 align
= TYPE_ALIGN (type
);
1777 #ifdef CONSTANT_ALIGNMENT
1778 align
= CONSTANT_ALIGNMENT (t
, align
);
1782 /* If this is a field reference and not a bit-field, record it. */
1783 /* ??? There is some information that can be gleened from bit-fields,
1784 such as the word offset in the structure that might be modified.
1785 But skip it for now. */
1786 else if (TREE_CODE (t
) == COMPONENT_REF
1787 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1789 expr
= component_ref_for_mem_expr (t
);
1790 offset
= const0_rtx
;
1791 apply_bitpos
= bitpos
;
1792 /* ??? Any reason the field size would be different than
1793 the size we got from the type? */
1796 /* If this is an array reference, look for an outer field reference. */
1797 else if (TREE_CODE (t
) == ARRAY_REF
)
1799 tree off_tree
= size_zero_node
;
1804 = fold (build (PLUS_EXPR
, sizetype
,
1805 fold (build (MULT_EXPR
, sizetype
,
1806 TREE_OPERAND (t
, 1),
1807 TYPE_SIZE_UNIT (TREE_TYPE (t
)))),
1809 t
= TREE_OPERAND (t
, 0);
1811 while (TREE_CODE (t
) == ARRAY_REF
);
1817 if (host_integerp (off_tree
, 1))
1819 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1820 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1821 align
= DECL_ALIGN (t
);
1822 if (aoff
&& aoff
< align
)
1824 offset
= GEN_INT (ioff
);
1825 apply_bitpos
= bitpos
;
1828 else if (TREE_CODE (t
) == COMPONENT_REF
)
1830 expr
= component_ref_for_mem_expr (t
);
1831 if (host_integerp (off_tree
, 1))
1833 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1834 apply_bitpos
= bitpos
;
1836 /* ??? Any reason the field size would be different than
1837 the size we got from the type? */
1839 else if (flag_argument_noalias
> 1
1840 && TREE_CODE (t
) == INDIRECT_REF
1841 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1848 /* If this is a Fortran indirect argument reference, record the
1850 else if (flag_argument_noalias
> 1
1851 && TREE_CODE (t
) == INDIRECT_REF
1852 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1859 /* If we modified OFFSET based on T, then subtract the outstanding
1860 bit position offset. */
1862 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1864 /* Now set the attributes we computed above. */
1866 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1868 /* If this is already known to be a scalar or aggregate, we are done. */
1869 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1872 /* If it is a reference into an aggregate, this is part of an aggregate.
1873 Otherwise we don't know. */
1874 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1875 || TREE_CODE (t
) == ARRAY_RANGE_REF
1876 || TREE_CODE (t
) == BIT_FIELD_REF
)
1877 MEM_IN_STRUCT_P (ref
) = 1;
1881 set_mem_attributes (ref
, t
, objectp
)
1886 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1889 /* Set the alias set of MEM to SET. */
1892 set_mem_alias_set (mem
, set
)
1896 #ifdef ENABLE_CHECKING
1897 /* If the new and old alias sets don't conflict, something is wrong. */
1898 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
1902 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1903 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1907 /* Set the alignment of MEM to ALIGN bits. */
1910 set_mem_align (mem
, align
)
1914 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1915 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1919 /* Set the expr for MEM to EXPR. */
1922 set_mem_expr (mem
, expr
)
1927 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1928 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1931 /* Set the offset of MEM to OFFSET. */
1934 set_mem_offset (mem
, offset
)
1937 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1938 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1942 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1943 and its address changed to ADDR. (VOIDmode means don't change the mode.
1944 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1945 returned memory location is required to be valid. The memory
1946 attributes are not changed. */
1949 change_address_1 (memref
, mode
, addr
, validate
)
1951 enum machine_mode mode
;
1957 if (GET_CODE (memref
) != MEM
)
1959 if (mode
== VOIDmode
)
1960 mode
= GET_MODE (memref
);
1962 addr
= XEXP (memref
, 0);
1966 if (reload_in_progress
|| reload_completed
)
1968 if (! memory_address_p (mode
, addr
))
1972 addr
= memory_address (mode
, addr
);
1975 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1978 new = gen_rtx_MEM (mode
, addr
);
1979 MEM_COPY_ATTRIBUTES (new, memref
);
1983 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1984 way we are changing MEMREF, so we only preserve the alias set. */
1987 change_address (memref
, mode
, addr
)
1989 enum machine_mode mode
;
1992 rtx
new = change_address_1 (memref
, mode
, addr
, 1);
1993 enum machine_mode mmode
= GET_MODE (new);
1996 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0,
1997 mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
)),
1998 (mmode
== BLKmode
? BITS_PER_UNIT
1999 : GET_MODE_ALIGNMENT (mmode
)),
2005 /* Return a memory reference like MEMREF, but with its mode changed
2006 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2007 nonzero, the memory address is forced to be valid.
2008 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2009 and caller is responsible for adjusting MEMREF base register. */
2012 adjust_address_1 (memref
, mode
, offset
, validate
, adjust
)
2014 enum machine_mode mode
;
2015 HOST_WIDE_INT offset
;
2016 int validate
, adjust
;
2018 rtx addr
= XEXP (memref
, 0);
2020 rtx memoffset
= MEM_OFFSET (memref
);
2022 unsigned int memalign
= MEM_ALIGN (memref
);
2024 /* ??? Prefer to create garbage instead of creating shared rtl.
2025 This may happen even if offset is non-zero -- consider
2026 (plus (plus reg reg) const_int) -- so do this always. */
2027 addr
= copy_rtx (addr
);
2031 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2032 object, we can merge it into the LO_SUM. */
2033 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2035 && (unsigned HOST_WIDE_INT
) offset
2036 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2037 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
2038 plus_constant (XEXP (addr
, 1), offset
));
2040 addr
= plus_constant (addr
, offset
);
2043 new = change_address_1 (memref
, mode
, addr
, validate
);
2045 /* Compute the new values of the memory attributes due to this adjustment.
2046 We add the offsets and update the alignment. */
2048 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
2050 /* Compute the new alignment by taking the MIN of the alignment and the
2051 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2056 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
2058 /* We can compute the size in a number of ways. */
2059 if (GET_MODE (new) != BLKmode
)
2060 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2061 else if (MEM_SIZE (memref
))
2062 size
= plus_constant (MEM_SIZE (memref
), -offset
);
2064 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
2065 memoffset
, size
, memalign
, GET_MODE (new));
2067 /* At some point, we should validate that this offset is within the object,
2068 if all the appropriate values are known. */
2072 /* Return a memory reference like MEMREF, but with its mode changed
2073 to MODE and its address changed to ADDR, which is assumed to be
2074 MEMREF offseted by OFFSET bytes. If VALIDATE is
2075 nonzero, the memory address is forced to be valid. */
2078 adjust_automodify_address_1 (memref
, mode
, addr
, offset
, validate
)
2080 enum machine_mode mode
;
2082 HOST_WIDE_INT offset
;
2085 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2086 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
2089 /* Return a memory reference like MEMREF, but whose address is changed by
2090 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2091 known to be in OFFSET (possibly 1). */
2094 offset_address (memref
, offset
, pow2
)
2099 rtx
new, addr
= XEXP (memref
, 0);
2101 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2103 /* At this point we don't know _why_ the address is invalid. It
2104 could have secondary memory refereces, multiplies or anything.
2106 However, if we did go and rearrange things, we can wind up not
2107 being able to recognize the magic around pic_offset_table_rtx.
2108 This stuff is fragile, and is yet another example of why it is
2109 bad to expose PIC machinery too early. */
2110 if (! memory_address_p (GET_MODE (memref
), new)
2111 && GET_CODE (addr
) == PLUS
2112 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2114 addr
= force_reg (GET_MODE (addr
), addr
);
2115 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2118 update_temp_slot_address (XEXP (memref
, 0), new);
2119 new = change_address_1 (memref
, VOIDmode
, new, 1);
2121 /* Update the alignment to reflect the offset. Reset the offset, which
2124 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2125 MIN (MEM_ALIGN (memref
),
2126 (unsigned HOST_WIDE_INT
) pow2
* BITS_PER_UNIT
),
2131 /* Return a memory reference like MEMREF, but with its address changed to
2132 ADDR. The caller is asserting that the actual piece of memory pointed
2133 to is the same, just the form of the address is being changed, such as
2134 by putting something into a register. */
2137 replace_equiv_address (memref
, addr
)
2141 /* change_address_1 copies the memory attribute structure without change
2142 and that's exactly what we want here. */
2143 update_temp_slot_address (XEXP (memref
, 0), addr
);
2144 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2147 /* Likewise, but the reference is not required to be valid. */
2150 replace_equiv_address_nv (memref
, addr
)
2154 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2157 /* Return a memory reference like MEMREF, but with its mode widened to
2158 MODE and offset by OFFSET. This would be used by targets that e.g.
2159 cannot issue QImode memory operations and have to use SImode memory
2160 operations plus masking logic. */
2163 widen_memory_access (memref
, mode
, offset
)
2165 enum machine_mode mode
;
2166 HOST_WIDE_INT offset
;
2168 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2169 tree expr
= MEM_EXPR (new);
2170 rtx memoffset
= MEM_OFFSET (new);
2171 unsigned int size
= GET_MODE_SIZE (mode
);
2173 /* If we don't know what offset we were at within the expression, then
2174 we can't know if we've overstepped the bounds. */
2180 if (TREE_CODE (expr
) == COMPONENT_REF
)
2182 tree field
= TREE_OPERAND (expr
, 1);
2184 if (! DECL_SIZE_UNIT (field
))
2190 /* Is the field at least as large as the access? If so, ok,
2191 otherwise strip back to the containing structure. */
2192 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2193 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2194 && INTVAL (memoffset
) >= 0)
2197 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
2203 expr
= TREE_OPERAND (expr
, 0);
2204 memoffset
= (GEN_INT (INTVAL (memoffset
)
2205 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
2206 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2209 /* Similarly for the decl. */
2210 else if (DECL_P (expr
)
2211 && DECL_SIZE_UNIT (expr
)
2212 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2213 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2214 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2218 /* The widened memory access overflows the expression, which means
2219 that it could alias another expression. Zap it. */
2226 memoffset
= NULL_RTX
;
2228 /* The widened memory may alias other stuff, so zap the alias set. */
2229 /* ??? Maybe use get_alias_set on any remaining expression. */
2231 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2232 MEM_ALIGN (new), mode
);
2237 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2242 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2243 NULL
, label_num
++, NULL
);
2246 /* For procedure integration. */
2248 /* Install new pointers to the first and last insns in the chain.
2249 Also, set cur_insn_uid to one higher than the last in use.
2250 Used for an inline-procedure after copying the insn chain. */
2253 set_new_first_and_last_insn (first
, last
)
2262 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2263 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2268 /* Set the range of label numbers found in the current function.
2269 This is used when belatedly compiling an inline function. */
2272 set_new_first_and_last_label_num (first
, last
)
2275 base_label_num
= label_num
;
2276 first_label_num
= first
;
2277 last_label_num
= last
;
2280 /* Set the last label number found in the current function.
2281 This is used when belatedly compiling an inline function. */
2284 set_new_last_label_num (last
)
2287 base_label_num
= label_num
;
2288 last_label_num
= last
;
2291 /* Restore all variables describing the current status from the structure *P.
2292 This is used after a nested function. */
2295 restore_emit_status (p
)
2296 struct function
*p ATTRIBUTE_UNUSED
;
2301 /* Go through all the RTL insn bodies and copy any invalid shared
2302 structure. This routine should only be called once. */
2305 unshare_all_rtl (fndecl
, insn
)
2311 /* Make sure that virtual parameters are not shared. */
2312 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2313 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2315 /* Make sure that virtual stack slots are not shared. */
2316 unshare_all_decls (DECL_INITIAL (fndecl
));
2318 /* Unshare just about everything else. */
2319 unshare_all_rtl_1 (insn
);
2321 /* Make sure the addresses of stack slots found outside the insn chain
2322 (such as, in DECL_RTL of a variable) are not shared
2323 with the insn chain.
2325 This special care is necessary when the stack slot MEM does not
2326 actually appear in the insn chain. If it does appear, its address
2327 is unshared from all else at that point. */
2328 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2331 /* Go through all the RTL insn bodies and copy any invalid shared
2332 structure, again. This is a fairly expensive thing to do so it
2333 should be done sparingly. */
2336 unshare_all_rtl_again (insn
)
2342 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2345 reset_used_flags (PATTERN (p
));
2346 reset_used_flags (REG_NOTES (p
));
2347 reset_used_flags (LOG_LINKS (p
));
2350 /* Make sure that virtual stack slots are not shared. */
2351 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2353 /* Make sure that virtual parameters are not shared. */
2354 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2355 reset_used_flags (DECL_RTL (decl
));
2357 reset_used_flags (stack_slot_list
);
2359 unshare_all_rtl (cfun
->decl
, insn
);
2362 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2363 Assumes the mark bits are cleared at entry. */
2366 unshare_all_rtl_1 (insn
)
2369 for (; insn
; insn
= NEXT_INSN (insn
))
2372 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2373 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2374 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2378 /* Go through all virtual stack slots of a function and copy any
2379 shared structure. */
2381 unshare_all_decls (blk
)
2386 /* Copy shared decls. */
2387 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2388 if (DECL_RTL_SET_P (t
))
2389 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2391 /* Now process sub-blocks. */
2392 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2393 unshare_all_decls (t
);
2396 /* Go through all virtual stack slots of a function and mark them as
2399 reset_used_decls (blk
)
2405 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2406 if (DECL_RTL_SET_P (t
))
2407 reset_used_flags (DECL_RTL (t
));
2409 /* Now process sub-blocks. */
2410 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2411 reset_used_decls (t
);
2414 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2415 placed in the result directly, rather than being copied. MAY_SHARE is
2416 either a MEM of an EXPR_LIST of MEMs. */
2419 copy_most_rtx (orig
, may_share
)
2426 const char *format_ptr
;
2428 if (orig
== may_share
2429 || (GET_CODE (may_share
) == EXPR_LIST
2430 && in_expr_list_p (may_share
, orig
)))
2433 code
= GET_CODE (orig
);
2451 copy
= rtx_alloc (code
);
2452 PUT_MODE (copy
, GET_MODE (orig
));
2453 RTX_FLAG (copy
, in_struct
) = RTX_FLAG (orig
, in_struct
);
2454 RTX_FLAG (copy
, volatil
) = RTX_FLAG (orig
, volatil
);
2455 RTX_FLAG (copy
, unchanging
) = RTX_FLAG (orig
, unchanging
);
2456 RTX_FLAG (copy
, integrated
) = RTX_FLAG (orig
, integrated
);
2457 RTX_FLAG (copy
, frame_related
) = RTX_FLAG (orig
, frame_related
);
2459 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2461 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2463 switch (*format_ptr
++)
2466 XEXP (copy
, i
) = XEXP (orig
, i
);
2467 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2468 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2472 XEXP (copy
, i
) = XEXP (orig
, i
);
2477 XVEC (copy
, i
) = XVEC (orig
, i
);
2478 if (XVEC (orig
, i
) != NULL
)
2480 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2481 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2482 XVECEXP (copy
, i
, j
)
2483 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2488 XWINT (copy
, i
) = XWINT (orig
, i
);
2493 XINT (copy
, i
) = XINT (orig
, i
);
2497 XTREE (copy
, i
) = XTREE (orig
, i
);
2502 XSTR (copy
, i
) = XSTR (orig
, i
);
2506 /* Copy this through the wide int field; that's safest. */
2507 X0WINT (copy
, i
) = X0WINT (orig
, i
);
2517 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2518 Recursively does the same for subexpressions. */
2521 copy_rtx_if_shared (orig
)
2527 const char *format_ptr
;
2533 code
= GET_CODE (x
);
2535 /* These types may be freely shared. */
2549 /* SCRATCH must be shared because they represent distinct values. */
2553 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2554 a LABEL_REF, it isn't sharable. */
2555 if (GET_CODE (XEXP (x
, 0)) == PLUS
2556 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2557 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2566 /* The chain of insns is not being copied. */
2570 /* A MEM is allowed to be shared if its address is constant.
2572 We used to allow sharing of MEMs which referenced
2573 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2574 that can lose. instantiate_virtual_regs will not unshare
2575 the MEMs, and combine may change the structure of the address
2576 because it looks safe and profitable in one context, but
2577 in some other context it creates unrecognizable RTL. */
2578 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
2587 /* This rtx may not be shared. If it has already been seen,
2588 replace it with a copy of itself. */
2590 if (RTX_FLAG (x
, used
))
2594 copy
= rtx_alloc (code
);
2596 (sizeof (*copy
) - sizeof (copy
->fld
)
2597 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
2601 RTX_FLAG (x
, used
) = 1;
2603 /* Now scan the subexpressions recursively.
2604 We can store any replaced subexpressions directly into X
2605 since we know X is not shared! Any vectors in X
2606 must be copied if X was copied. */
2608 format_ptr
= GET_RTX_FORMAT (code
);
2610 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2612 switch (*format_ptr
++)
2615 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
2619 if (XVEC (x
, i
) != NULL
)
2622 int len
= XVECLEN (x
, i
);
2624 if (copied
&& len
> 0)
2625 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2626 for (j
= 0; j
< len
; j
++)
2627 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
2635 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2636 to look for shared sub-parts. */
2639 reset_used_flags (x
)
2644 const char *format_ptr
;
2649 code
= GET_CODE (x
);
2651 /* These types may be freely shared so we needn't do any resetting
2673 /* The chain of insns is not being copied. */
2680 RTX_FLAG (x
, used
) = 0;
2682 format_ptr
= GET_RTX_FORMAT (code
);
2683 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2685 switch (*format_ptr
++)
2688 reset_used_flags (XEXP (x
, i
));
2692 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2693 reset_used_flags (XVECEXP (x
, i
, j
));
2699 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2700 Return X or the rtx for the pseudo reg the value of X was copied into.
2701 OTHER must be valid as a SET_DEST. */
2704 make_safe_from (x
, other
)
2708 switch (GET_CODE (other
))
2711 other
= SUBREG_REG (other
);
2713 case STRICT_LOW_PART
:
2716 other
= XEXP (other
, 0);
2722 if ((GET_CODE (other
) == MEM
2724 && GET_CODE (x
) != REG
2725 && GET_CODE (x
) != SUBREG
)
2726 || (GET_CODE (other
) == REG
2727 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2728 || reg_mentioned_p (other
, x
))))
2730 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2731 emit_move_insn (temp
, x
);
2737 /* Emission of insns (adding them to the doubly-linked list). */
2739 /* Return the first insn of the current sequence or current function. */
2747 /* Specify a new insn as the first in the chain. */
2750 set_first_insn (insn
)
2753 if (PREV_INSN (insn
) != 0)
2758 /* Return the last insn emitted in current sequence or current function. */
2766 /* Specify a new insn as the last in the chain. */
2769 set_last_insn (insn
)
2772 if (NEXT_INSN (insn
) != 0)
2777 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2780 get_last_insn_anywhere ()
2782 struct sequence_stack
*stack
;
2785 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2786 if (stack
->last
!= 0)
2791 /* Return the first nonnote insn emitted in current sequence or current
2792 function. This routine looks inside SEQUENCEs. */
2795 get_first_nonnote_insn ()
2797 rtx insn
= first_insn
;
2801 insn
= next_insn (insn
);
2802 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2809 /* Return the last nonnote insn emitted in current sequence or current
2810 function. This routine looks inside SEQUENCEs. */
2813 get_last_nonnote_insn ()
2815 rtx insn
= last_insn
;
2819 insn
= previous_insn (insn
);
2820 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2827 /* Return a number larger than any instruction's uid in this function. */
2832 return cur_insn_uid
;
2835 /* Renumber instructions so that no instruction UIDs are wasted. */
2838 renumber_insns (stream
)
2843 /* If we're not supposed to renumber instructions, don't. */
2844 if (!flag_renumber_insns
)
2847 /* If there aren't that many instructions, then it's not really
2848 worth renumbering them. */
2849 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2854 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2857 fprintf (stream
, "Renumbering insn %d to %d\n",
2858 INSN_UID (insn
), cur_insn_uid
);
2859 INSN_UID (insn
) = cur_insn_uid
++;
2863 /* Return the next insn. If it is a SEQUENCE, return the first insn
2872 insn
= NEXT_INSN (insn
);
2873 if (insn
&& GET_CODE (insn
) == INSN
2874 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2875 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2881 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2885 previous_insn (insn
)
2890 insn
= PREV_INSN (insn
);
2891 if (insn
&& GET_CODE (insn
) == INSN
2892 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2893 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2899 /* Return the next insn after INSN that is not a NOTE. This routine does not
2900 look inside SEQUENCEs. */
2903 next_nonnote_insn (insn
)
2908 insn
= NEXT_INSN (insn
);
2909 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2916 /* Return the previous insn before INSN that is not a NOTE. This routine does
2917 not look inside SEQUENCEs. */
2920 prev_nonnote_insn (insn
)
2925 insn
= PREV_INSN (insn
);
2926 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2933 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2934 or 0, if there is none. This routine does not look inside
2938 next_real_insn (insn
)
2943 insn
= NEXT_INSN (insn
);
2944 if (insn
== 0 || GET_CODE (insn
) == INSN
2945 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2952 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2953 or 0, if there is none. This routine does not look inside
2957 prev_real_insn (insn
)
2962 insn
= PREV_INSN (insn
);
2963 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2964 || GET_CODE (insn
) == JUMP_INSN
)
2971 /* Find the next insn after INSN that really does something. This routine
2972 does not look inside SEQUENCEs. Until reload has completed, this is the
2973 same as next_real_insn. */
2976 active_insn_p (insn
)
2979 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2980 || (GET_CODE (insn
) == INSN
2981 && (! reload_completed
2982 || (GET_CODE (PATTERN (insn
)) != USE
2983 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
2987 next_active_insn (insn
)
2992 insn
= NEXT_INSN (insn
);
2993 if (insn
== 0 || active_insn_p (insn
))
3000 /* Find the last insn before INSN that really does something. This routine
3001 does not look inside SEQUENCEs. Until reload has completed, this is the
3002 same as prev_real_insn. */
3005 prev_active_insn (insn
)
3010 insn
= PREV_INSN (insn
);
3011 if (insn
== 0 || active_insn_p (insn
))
3018 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3026 insn
= NEXT_INSN (insn
);
3027 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3034 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3042 insn
= PREV_INSN (insn
);
3043 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3051 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3052 and REG_CC_USER notes so we can find it. */
3055 link_cc0_insns (insn
)
3058 rtx user
= next_nonnote_insn (insn
);
3060 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
3061 user
= XVECEXP (PATTERN (user
), 0, 0);
3063 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3065 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3068 /* Return the next insn that uses CC0 after INSN, which is assumed to
3069 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3070 applied to the result of this function should yield INSN).
3072 Normally, this is simply the next insn. However, if a REG_CC_USER note
3073 is present, it contains the insn that uses CC0.
3075 Return 0 if we can't find the insn. */
3078 next_cc0_user (insn
)
3081 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3084 return XEXP (note
, 0);
3086 insn
= next_nonnote_insn (insn
);
3087 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3088 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3090 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3096 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3097 note, it is the previous insn. */
3100 prev_cc0_setter (insn
)
3103 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3106 return XEXP (note
, 0);
3108 insn
= prev_nonnote_insn (insn
);
3109 if (! sets_cc0_p (PATTERN (insn
)))
3116 /* Increment the label uses for all labels present in rtx. */
3119 mark_label_nuses (x
)
3126 code
= GET_CODE (x
);
3127 if (code
== LABEL_REF
)
3128 LABEL_NUSES (XEXP (x
, 0))++;
3130 fmt
= GET_RTX_FORMAT (code
);
3131 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3134 mark_label_nuses (XEXP (x
, i
));
3135 else if (fmt
[i
] == 'E')
3136 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3137 mark_label_nuses (XVECEXP (x
, i
, j
));
3142 /* Try splitting insns that can be split for better scheduling.
3143 PAT is the pattern which might split.
3144 TRIAL is the insn providing PAT.
3145 LAST is non-zero if we should return the last insn of the sequence produced.
3147 If this routine succeeds in splitting, it returns the first or last
3148 replacement insn depending on the value of LAST. Otherwise, it
3149 returns TRIAL. If the insn to be returned can be split, it will be. */
3152 try_split (pat
, trial
, last
)
3156 rtx before
= PREV_INSN (trial
);
3157 rtx after
= NEXT_INSN (trial
);
3158 int has_barrier
= 0;
3163 if (any_condjump_p (trial
)
3164 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3165 split_branch_probability
= INTVAL (XEXP (note
, 0));
3166 probability
= split_branch_probability
;
3168 seq
= split_insns (pat
, trial
);
3170 split_branch_probability
= -1;
3172 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3173 We may need to handle this specially. */
3174 if (after
&& GET_CODE (after
) == BARRIER
)
3177 after
= NEXT_INSN (after
);
3182 /* Sometimes there will be only one insn in that list, this case will
3183 normally arise only when we want it in turn to be split (SFmode on
3184 the 29k is an example). */
3185 if (NEXT_INSN (seq
) != NULL_RTX
)
3187 rtx insn_last
, insn
;
3190 /* Avoid infinite loop if any insn of the result matches
3191 the original pattern. */
3195 if (INSN_P (insn_last
)
3196 && rtx_equal_p (PATTERN (insn_last
), pat
))
3198 if (NEXT_INSN (insn_last
) == NULL_RTX
)
3200 insn_last
= NEXT_INSN (insn_last
);
3205 while (insn
!= NULL_RTX
)
3207 if (GET_CODE (insn
) == JUMP_INSN
)
3209 mark_jump_label (PATTERN (insn
), insn
, 0);
3211 if (probability
!= -1
3212 && any_condjump_p (insn
)
3213 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3215 /* We can preserve the REG_BR_PROB notes only if exactly
3216 one jump is created, otherwise the machine description
3217 is responsible for this step using
3218 split_branch_probability variable. */
3222 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3223 GEN_INT (probability
),
3228 insn
= PREV_INSN (insn
);
3231 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3232 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3233 if (GET_CODE (trial
) == CALL_INSN
)
3236 while (insn
!= NULL_RTX
)
3238 if (GET_CODE (insn
) == CALL_INSN
)
3239 CALL_INSN_FUNCTION_USAGE (insn
)
3240 = CALL_INSN_FUNCTION_USAGE (trial
);
3242 insn
= PREV_INSN (insn
);
3246 /* Copy notes, particularly those related to the CFG. */
3247 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3249 switch (REG_NOTE_KIND (note
))
3253 while (insn
!= NULL_RTX
)
3255 if (GET_CODE (insn
) == CALL_INSN
3256 || (flag_non_call_exceptions
3257 && may_trap_p (PATTERN (insn
))))
3259 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3262 insn
= PREV_INSN (insn
);
3268 case REG_ALWAYS_RETURN
:
3270 while (insn
!= NULL_RTX
)
3272 if (GET_CODE (insn
) == CALL_INSN
)
3274 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3277 insn
= PREV_INSN (insn
);
3281 case REG_NON_LOCAL_GOTO
:
3283 while (insn
!= NULL_RTX
)
3285 if (GET_CODE (insn
) == JUMP_INSN
)
3287 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3290 insn
= PREV_INSN (insn
);
3299 /* If there are LABELS inside the split insns increment the
3300 usage count so we don't delete the label. */
3301 if (GET_CODE (trial
) == INSN
)
3304 while (insn
!= NULL_RTX
)
3306 if (GET_CODE (insn
) == INSN
)
3307 mark_label_nuses (PATTERN (insn
));
3309 insn
= PREV_INSN (insn
);
3313 tem
= emit_insn_after_scope (seq
, trial
, INSN_SCOPE (trial
));
3315 delete_insn (trial
);
3317 emit_barrier_after (tem
);
3319 /* Recursively call try_split for each new insn created; by the
3320 time control returns here that insn will be fully split, so
3321 set LAST and continue from the insn after the one returned.
3322 We can't use next_active_insn here since AFTER may be a note.
3323 Ignore deleted insns, which can be occur if not optimizing. */
3324 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3325 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3326 tem
= try_split (PATTERN (tem
), tem
, 1);
3328 /* Avoid infinite loop if the result matches the original pattern. */
3329 else if (rtx_equal_p (PATTERN (seq
), pat
))
3333 PATTERN (trial
) = PATTERN (seq
);
3334 INSN_CODE (trial
) = -1;
3335 try_split (PATTERN (trial
), trial
, last
);
3338 /* Return either the first or the last insn, depending on which was
3341 ? (after
? PREV_INSN (after
) : last_insn
)
3342 : NEXT_INSN (before
);
3348 /* Make and return an INSN rtx, initializing all its slots.
3349 Store PATTERN in the pattern slots. */
3352 make_insn_raw (pattern
)
3357 insn
= rtx_alloc (INSN
);
3359 INSN_UID (insn
) = cur_insn_uid
++;
3360 PATTERN (insn
) = pattern
;
3361 INSN_CODE (insn
) = -1;
3362 LOG_LINKS (insn
) = NULL
;
3363 REG_NOTES (insn
) = NULL
;
3364 INSN_SCOPE (insn
) = NULL
;
3365 BLOCK_FOR_INSN (insn
) = NULL
;
3367 #ifdef ENABLE_RTL_CHECKING
3370 && (returnjump_p (insn
)
3371 || (GET_CODE (insn
) == SET
3372 && SET_DEST (insn
) == pc_rtx
)))
3374 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3382 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3385 make_jump_insn_raw (pattern
)
3390 insn
= rtx_alloc (JUMP_INSN
);
3391 INSN_UID (insn
) = cur_insn_uid
++;
3393 PATTERN (insn
) = pattern
;
3394 INSN_CODE (insn
) = -1;
3395 LOG_LINKS (insn
) = NULL
;
3396 REG_NOTES (insn
) = NULL
;
3397 JUMP_LABEL (insn
) = NULL
;
3398 INSN_SCOPE (insn
) = NULL
;
3399 BLOCK_FOR_INSN (insn
) = NULL
;
3404 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3407 make_call_insn_raw (pattern
)
3412 insn
= rtx_alloc (CALL_INSN
);
3413 INSN_UID (insn
) = cur_insn_uid
++;
3415 PATTERN (insn
) = pattern
;
3416 INSN_CODE (insn
) = -1;
3417 LOG_LINKS (insn
) = NULL
;
3418 REG_NOTES (insn
) = NULL
;
3419 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3420 INSN_SCOPE (insn
) = NULL
;
3421 BLOCK_FOR_INSN (insn
) = NULL
;
3426 /* Add INSN to the end of the doubly-linked list.
3427 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3433 PREV_INSN (insn
) = last_insn
;
3434 NEXT_INSN (insn
) = 0;
3436 if (NULL
!= last_insn
)
3437 NEXT_INSN (last_insn
) = insn
;
3439 if (NULL
== first_insn
)
3445 /* Add INSN into the doubly-linked list after insn AFTER. This and
3446 the next should be the only functions called to insert an insn once
3447 delay slots have been filled since only they know how to update a
3451 add_insn_after (insn
, after
)
3454 rtx next
= NEXT_INSN (after
);
3457 if (optimize
&& INSN_DELETED_P (after
))
3460 NEXT_INSN (insn
) = next
;
3461 PREV_INSN (insn
) = after
;
3465 PREV_INSN (next
) = insn
;
3466 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3467 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3469 else if (last_insn
== after
)
3473 struct sequence_stack
*stack
= seq_stack
;
3474 /* Scan all pending sequences too. */
3475 for (; stack
; stack
= stack
->next
)
3476 if (after
== stack
->last
)
3486 if (GET_CODE (after
) != BARRIER
3487 && GET_CODE (insn
) != BARRIER
3488 && (bb
= BLOCK_FOR_INSN (after
)))
3490 set_block_for_insn (insn
, bb
);
3492 bb
->flags
|= BB_DIRTY
;
3493 /* Should not happen as first in the BB is always
3494 either NOTE or LABEL. */
3495 if (bb
->end
== after
3496 /* Avoid clobbering of structure when creating new BB. */
3497 && GET_CODE (insn
) != BARRIER
3498 && (GET_CODE (insn
) != NOTE
3499 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3503 NEXT_INSN (after
) = insn
;
3504 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3506 rtx sequence
= PATTERN (after
);
3507 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3511 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3512 the previous should be the only functions called to insert an insn once
3513 delay slots have been filled since only they know how to update a
3517 add_insn_before (insn
, before
)
3520 rtx prev
= PREV_INSN (before
);
3523 if (optimize
&& INSN_DELETED_P (before
))
3526 PREV_INSN (insn
) = prev
;
3527 NEXT_INSN (insn
) = before
;
3531 NEXT_INSN (prev
) = insn
;
3532 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3534 rtx sequence
= PATTERN (prev
);
3535 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3538 else if (first_insn
== before
)
3542 struct sequence_stack
*stack
= seq_stack
;
3543 /* Scan all pending sequences too. */
3544 for (; stack
; stack
= stack
->next
)
3545 if (before
== stack
->first
)
3547 stack
->first
= insn
;
3555 if (GET_CODE (before
) != BARRIER
3556 && GET_CODE (insn
) != BARRIER
3557 && (bb
= BLOCK_FOR_INSN (before
)))
3559 set_block_for_insn (insn
, bb
);
3561 bb
->flags
|= BB_DIRTY
;
3562 /* Should not happen as first in the BB is always
3563 either NOTE or LABEl. */
3564 if (bb
->head
== insn
3565 /* Avoid clobbering of structure when creating new BB. */
3566 && GET_CODE (insn
) != BARRIER
3567 && (GET_CODE (insn
) != NOTE
3568 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3572 PREV_INSN (before
) = insn
;
3573 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3574 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3577 /* Remove an insn from its doubly-linked list. This function knows how
3578 to handle sequences. */
3583 rtx next
= NEXT_INSN (insn
);
3584 rtx prev
= PREV_INSN (insn
);
3589 NEXT_INSN (prev
) = next
;
3590 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3592 rtx sequence
= PATTERN (prev
);
3593 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3596 else if (first_insn
== insn
)
3600 struct sequence_stack
*stack
= seq_stack
;
3601 /* Scan all pending sequences too. */
3602 for (; stack
; stack
= stack
->next
)
3603 if (insn
== stack
->first
)
3605 stack
->first
= next
;
3615 PREV_INSN (next
) = prev
;
3616 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3617 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3619 else if (last_insn
== insn
)
3623 struct sequence_stack
*stack
= seq_stack
;
3624 /* Scan all pending sequences too. */
3625 for (; stack
; stack
= stack
->next
)
3626 if (insn
== stack
->last
)
3635 if (GET_CODE (insn
) != BARRIER
3636 && (bb
= BLOCK_FOR_INSN (insn
)))
3639 bb
->flags
|= BB_DIRTY
;
3640 if (bb
->head
== insn
)
3642 /* Never ever delete the basic block note without deleting whole
3644 if (GET_CODE (insn
) == NOTE
)
3648 if (bb
->end
== insn
)
3653 /* Delete all insns made since FROM.
3654 FROM becomes the new last instruction. */
3657 delete_insns_since (from
)
3663 NEXT_INSN (from
) = 0;
3667 /* This function is deprecated, please use sequences instead.
3669 Move a consecutive bunch of insns to a different place in the chain.
3670 The insns to be moved are those between FROM and TO.
3671 They are moved to a new position after the insn AFTER.
3672 AFTER must not be FROM or TO or any insn in between.
3674 This function does not know about SEQUENCEs and hence should not be
3675 called after delay-slot filling has been done. */
3678 reorder_insns_nobb (from
, to
, after
)
3679 rtx from
, to
, after
;
3681 /* Splice this bunch out of where it is now. */
3682 if (PREV_INSN (from
))
3683 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3685 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3686 if (last_insn
== to
)
3687 last_insn
= PREV_INSN (from
);
3688 if (first_insn
== from
)
3689 first_insn
= NEXT_INSN (to
);
3691 /* Make the new neighbors point to it and it to them. */
3692 if (NEXT_INSN (after
))
3693 PREV_INSN (NEXT_INSN (after
)) = to
;
3695 NEXT_INSN (to
) = NEXT_INSN (after
);
3696 PREV_INSN (from
) = after
;
3697 NEXT_INSN (after
) = from
;
3698 if (after
== last_insn
)
3702 /* Same as function above, but take care to update BB boundaries. */
3704 reorder_insns (from
, to
, after
)
3705 rtx from
, to
, after
;
3707 rtx prev
= PREV_INSN (from
);
3708 basic_block bb
, bb2
;
3710 reorder_insns_nobb (from
, to
, after
);
3712 if (GET_CODE (after
) != BARRIER
3713 && (bb
= BLOCK_FOR_INSN (after
)))
3716 bb
->flags
|= BB_DIRTY
;
3718 if (GET_CODE (from
) != BARRIER
3719 && (bb2
= BLOCK_FOR_INSN (from
)))
3723 bb2
->flags
|= BB_DIRTY
;
3726 if (bb
->end
== after
)
3729 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3730 set_block_for_insn (x
, bb
);
3734 /* Return the line note insn preceding INSN. */
3737 find_line_note (insn
)
3740 if (no_line_numbers
)
3743 for (; insn
; insn
= PREV_INSN (insn
))
3744 if (GET_CODE (insn
) == NOTE
3745 && NOTE_LINE_NUMBER (insn
) >= 0)
3751 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3752 of the moved insns when debugging. This may insert a note between AFTER
3753 and FROM, and another one after TO. */
3756 reorder_insns_with_line_notes (from
, to
, after
)
3757 rtx from
, to
, after
;
3759 rtx from_line
= find_line_note (from
);
3760 rtx after_line
= find_line_note (after
);
3762 reorder_insns (from
, to
, after
);
3764 if (from_line
== after_line
)
3768 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3769 NOTE_LINE_NUMBER (from_line
),
3772 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3773 NOTE_LINE_NUMBER (after_line
),
3777 /* Remove unnecessary notes from the instruction stream. */
3780 remove_unnecessary_notes ()
3782 rtx block_stack
= NULL_RTX
;
3783 rtx eh_stack
= NULL_RTX
;
3788 /* We must not remove the first instruction in the function because
3789 the compiler depends on the first instruction being a note. */
3790 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3792 /* Remember what's next. */
3793 next
= NEXT_INSN (insn
);
3795 /* We're only interested in notes. */
3796 if (GET_CODE (insn
) != NOTE
)
3799 switch (NOTE_LINE_NUMBER (insn
))
3801 case NOTE_INSN_DELETED
:
3802 case NOTE_INSN_LOOP_END_TOP_COND
:
3806 case NOTE_INSN_EH_REGION_BEG
:
3807 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3810 case NOTE_INSN_EH_REGION_END
:
3811 /* Too many end notes. */
3812 if (eh_stack
== NULL_RTX
)
3814 /* Mismatched nesting. */
3815 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
3818 eh_stack
= XEXP (eh_stack
, 1);
3819 free_INSN_LIST_node (tmp
);
3822 case NOTE_INSN_BLOCK_BEG
:
3823 /* By now, all notes indicating lexical blocks should have
3824 NOTE_BLOCK filled in. */
3825 if (NOTE_BLOCK (insn
) == NULL_TREE
)
3827 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
3830 case NOTE_INSN_BLOCK_END
:
3831 /* Too many end notes. */
3832 if (block_stack
== NULL_RTX
)
3834 /* Mismatched nesting. */
3835 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
3838 block_stack
= XEXP (block_stack
, 1);
3839 free_INSN_LIST_node (tmp
);
3841 /* Scan back to see if there are any non-note instructions
3842 between INSN and the beginning of this block. If not,
3843 then there is no PC range in the generated code that will
3844 actually be in this block, so there's no point in
3845 remembering the existence of the block. */
3846 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
3848 /* This block contains a real instruction. Note that we
3849 don't include labels; if the only thing in the block
3850 is a label, then there are still no PC values that
3851 lie within the block. */
3855 /* We're only interested in NOTEs. */
3856 if (GET_CODE (tmp
) != NOTE
)
3859 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
3861 /* We just verified that this BLOCK matches us with
3862 the block_stack check above. Never delete the
3863 BLOCK for the outermost scope of the function; we
3864 can refer to names from that scope even if the
3865 block notes are messed up. */
3866 if (! is_body_block (NOTE_BLOCK (insn
))
3867 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
3874 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
3875 /* There's a nested block. We need to leave the
3876 current block in place since otherwise the debugger
3877 wouldn't be able to show symbols from our block in
3878 the nested block. */
3884 /* Too many begin notes. */
3885 if (block_stack
|| eh_stack
)
3890 /* Emit insn(s) of given code and pattern
3891 at a specified place within the doubly-linked list.
3893 All of the emit_foo global entry points accept an object
3894 X which is either an insn list or a PATTERN of a single
3897 There are thus a few canonical ways to generate code and
3898 emit it at a specific place in the instruction stream. For
3899 example, consider the instruction named SPOT and the fact that
3900 we would like to emit some instructions before SPOT. We might
3904 ... emit the new instructions ...
3905 insns_head = get_insns ();
3908 emit_insn_before (insns_head, SPOT);
3910 It used to be common to generate SEQUENCE rtl instead, but that
3911 is a relic of the past which no longer occurs. The reason is that
3912 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3913 generated would almost certainly die right after it was created. */
3915 /* Make X be output before the instruction BEFORE. */
3918 emit_insn_before (x
, before
)
3924 #ifdef ENABLE_RTL_CHECKING
3925 if (before
== NULL_RTX
)
3932 switch (GET_CODE (x
))
3943 rtx next
= NEXT_INSN (insn
);
3944 add_insn_before (insn
, before
);
3950 #ifdef ENABLE_RTL_CHECKING
3957 last
= make_insn_raw (x
);
3958 add_insn_before (last
, before
);
3965 /* Make an instruction with body X and code JUMP_INSN
3966 and output it before the instruction BEFORE. */
3969 emit_jump_insn_before (x
, before
)
3974 #ifdef ENABLE_RTL_CHECKING
3975 if (before
== NULL_RTX
)
3979 switch (GET_CODE (x
))
3990 rtx next
= NEXT_INSN (insn
);
3991 add_insn_before (insn
, before
);
3997 #ifdef ENABLE_RTL_CHECKING
4004 last
= make_jump_insn_raw (x
);
4005 add_insn_before (last
, before
);
4012 /* Make an instruction with body X and code CALL_INSN
4013 and output it before the instruction BEFORE. */
4016 emit_call_insn_before (x
, before
)
4021 #ifdef ENABLE_RTL_CHECKING
4022 if (before
== NULL_RTX
)
4026 switch (GET_CODE (x
))
4037 rtx next
= NEXT_INSN (insn
);
4038 add_insn_before (insn
, before
);
4044 #ifdef ENABLE_RTL_CHECKING
4051 last
= make_call_insn_raw (x
);
4052 add_insn_before (last
, before
);
4059 /* Make an insn of code BARRIER
4060 and output it before the insn BEFORE. */
4063 emit_barrier_before (before
)
4066 rtx insn
= rtx_alloc (BARRIER
);
4068 INSN_UID (insn
) = cur_insn_uid
++;
4070 add_insn_before (insn
, before
);
4074 /* Emit the label LABEL before the insn BEFORE. */
4077 emit_label_before (label
, before
)
4080 /* This can be called twice for the same label as a result of the
4081 confusion that follows a syntax error! So make it harmless. */
4082 if (INSN_UID (label
) == 0)
4084 INSN_UID (label
) = cur_insn_uid
++;
4085 add_insn_before (label
, before
);
4091 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4094 emit_note_before (subtype
, before
)
4098 rtx note
= rtx_alloc (NOTE
);
4099 INSN_UID (note
) = cur_insn_uid
++;
4100 NOTE_SOURCE_FILE (note
) = 0;
4101 NOTE_LINE_NUMBER (note
) = subtype
;
4102 BLOCK_FOR_INSN (note
) = NULL
;
4104 add_insn_before (note
, before
);
4108 /* Helper for emit_insn_after, handles lists of instructions
4111 static rtx emit_insn_after_1
PARAMS ((rtx
, rtx
));
4114 emit_insn_after_1 (first
, after
)
4121 if (GET_CODE (after
) != BARRIER
4122 && (bb
= BLOCK_FOR_INSN (after
)))
4124 bb
->flags
|= BB_DIRTY
;
4125 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4126 if (GET_CODE (last
) != BARRIER
)
4127 set_block_for_insn (last
, bb
);
4128 if (GET_CODE (last
) != BARRIER
)
4129 set_block_for_insn (last
, bb
);
4130 if (bb
->end
== after
)
4134 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4137 after_after
= NEXT_INSN (after
);
4139 NEXT_INSN (after
) = first
;
4140 PREV_INSN (first
) = after
;
4141 NEXT_INSN (last
) = after_after
;
4143 PREV_INSN (after_after
) = last
;
4145 if (after
== last_insn
)
4150 /* Make X be output after the insn AFTER. */
4153 emit_insn_after (x
, after
)
4158 #ifdef ENABLE_RTL_CHECKING
4159 if (after
== NULL_RTX
)
4166 switch (GET_CODE (x
))
4174 last
= emit_insn_after_1 (x
, after
);
4177 #ifdef ENABLE_RTL_CHECKING
4184 last
= make_insn_raw (x
);
4185 add_insn_after (last
, after
);
4192 /* Similar to emit_insn_after, except that line notes are to be inserted so
4193 as to act as if this insn were at FROM. */
4196 emit_insn_after_with_line_notes (x
, after
, from
)
4199 rtx from_line
= find_line_note (from
);
4200 rtx after_line
= find_line_note (after
);
4201 rtx insn
= emit_insn_after (x
, after
);
4204 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
4205 NOTE_LINE_NUMBER (from_line
),
4209 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
4210 NOTE_LINE_NUMBER (after_line
),
4214 /* Make an insn of code JUMP_INSN with body X
4215 and output it after the insn AFTER. */
4218 emit_jump_insn_after (x
, after
)
4223 #ifdef ENABLE_RTL_CHECKING
4224 if (after
== NULL_RTX
)
4228 switch (GET_CODE (x
))
4236 last
= emit_insn_after_1 (x
, after
);
4239 #ifdef ENABLE_RTL_CHECKING
4246 last
= make_jump_insn_raw (x
);
4247 add_insn_after (last
, after
);
4254 /* Make an instruction with body X and code CALL_INSN
4255 and output it after the instruction AFTER. */
4258 emit_call_insn_after (x
, after
)
4263 #ifdef ENABLE_RTL_CHECKING
4264 if (after
== NULL_RTX
)
4268 switch (GET_CODE (x
))
4276 last
= emit_insn_after_1 (x
, after
);
4279 #ifdef ENABLE_RTL_CHECKING
4286 last
= make_call_insn_raw (x
);
4287 add_insn_after (last
, after
);
4294 /* Make an insn of code BARRIER
4295 and output it after the insn AFTER. */
4298 emit_barrier_after (after
)
4301 rtx insn
= rtx_alloc (BARRIER
);
4303 INSN_UID (insn
) = cur_insn_uid
++;
4305 add_insn_after (insn
, after
);
4309 /* Emit the label LABEL after the insn AFTER. */
4312 emit_label_after (label
, after
)
4315 /* This can be called twice for the same label
4316 as a result of the confusion that follows a syntax error!
4317 So make it harmless. */
4318 if (INSN_UID (label
) == 0)
4320 INSN_UID (label
) = cur_insn_uid
++;
4321 add_insn_after (label
, after
);
4327 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4330 emit_note_after (subtype
, after
)
4334 rtx note
= rtx_alloc (NOTE
);
4335 INSN_UID (note
) = cur_insn_uid
++;
4336 NOTE_SOURCE_FILE (note
) = 0;
4337 NOTE_LINE_NUMBER (note
) = subtype
;
4338 BLOCK_FOR_INSN (note
) = NULL
;
4339 add_insn_after (note
, after
);
4343 /* Emit a line note for FILE and LINE after the insn AFTER. */
4346 emit_line_note_after (file
, line
, after
)
4353 if (no_line_numbers
&& line
> 0)
4359 note
= rtx_alloc (NOTE
);
4360 INSN_UID (note
) = cur_insn_uid
++;
4361 NOTE_SOURCE_FILE (note
) = file
;
4362 NOTE_LINE_NUMBER (note
) = line
;
4363 BLOCK_FOR_INSN (note
) = NULL
;
4364 add_insn_after (note
, after
);
4368 /* Like emit_insn_after, but set INSN_SCOPE according to SCOPE. */
4370 emit_insn_after_scope (pattern
, after
, scope
)
4374 rtx last
= emit_insn_after (pattern
, after
);
4376 after
= NEXT_INSN (after
);
4379 if (active_insn_p (after
))
4380 INSN_SCOPE (after
) = scope
;
4383 after
= NEXT_INSN (after
);
4388 /* Like emit_jump_insn_after, but set INSN_SCOPE according to SCOPE. */
4390 emit_jump_insn_after_scope (pattern
, after
, scope
)
4394 rtx last
= emit_jump_insn_after (pattern
, after
);
4396 after
= NEXT_INSN (after
);
4399 if (active_insn_p (after
))
4400 INSN_SCOPE (after
) = scope
;
4403 after
= NEXT_INSN (after
);
4408 /* Like emit_call_insn_after, but set INSN_SCOPE according to SCOPE. */
4410 emit_call_insn_after_scope (pattern
, after
, scope
)
4414 rtx last
= emit_call_insn_after (pattern
, after
);
4416 after
= NEXT_INSN (after
);
4419 if (active_insn_p (after
))
4420 INSN_SCOPE (after
) = scope
;
4423 after
= NEXT_INSN (after
);
4428 /* Like emit_insn_before, but set INSN_SCOPE according to SCOPE. */
4430 emit_insn_before_scope (pattern
, before
, scope
)
4431 rtx pattern
, before
;
4434 rtx first
= PREV_INSN (before
);
4435 rtx last
= emit_insn_before (pattern
, before
);
4437 first
= NEXT_INSN (first
);
4440 if (active_insn_p (first
))
4441 INSN_SCOPE (first
) = scope
;
4444 first
= NEXT_INSN (first
);
4449 /* Take X and emit it at the end of the doubly-linked
4452 Returns the last insn emitted. */
4458 rtx last
= last_insn
;
4464 switch (GET_CODE (x
))
4475 rtx next
= NEXT_INSN (insn
);
4482 #ifdef ENABLE_RTL_CHECKING
4489 last
= make_insn_raw (x
);
4497 /* Make an insn of code JUMP_INSN with pattern X
4498 and add it to the end of the doubly-linked list. */
4506 switch (GET_CODE (x
))
4517 rtx next
= NEXT_INSN (insn
);
4524 #ifdef ENABLE_RTL_CHECKING
4531 last
= make_jump_insn_raw (x
);
4539 /* Make an insn of code CALL_INSN with pattern X
4540 and add it to the end of the doubly-linked list. */
4548 switch (GET_CODE (x
))
4556 insn
= emit_insn (x
);
4559 #ifdef ENABLE_RTL_CHECKING
4566 insn
= make_call_insn_raw (x
);
4574 /* Add the label LABEL to the end of the doubly-linked list. */
4580 /* This can be called twice for the same label
4581 as a result of the confusion that follows a syntax error!
4582 So make it harmless. */
4583 if (INSN_UID (label
) == 0)
4585 INSN_UID (label
) = cur_insn_uid
++;
4591 /* Make an insn of code BARRIER
4592 and add it to the end of the doubly-linked list. */
4597 rtx barrier
= rtx_alloc (BARRIER
);
4598 INSN_UID (barrier
) = cur_insn_uid
++;
4603 /* Make an insn of code NOTE
4604 with data-fields specified by FILE and LINE
4605 and add it to the end of the doubly-linked list,
4606 but only if line-numbers are desired for debugging info. */
4609 emit_line_note (file
, line
)
4613 set_file_and_line_for_stmt (file
, line
);
4616 if (no_line_numbers
)
4620 return emit_note (file
, line
);
4623 /* Make an insn of code NOTE
4624 with data-fields specified by FILE and LINE
4625 and add it to the end of the doubly-linked list.
4626 If it is a line-number NOTE, omit it if it matches the previous one. */
4629 emit_note (file
, line
)
4637 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
4638 && line
== last_linenum
)
4640 last_filename
= file
;
4641 last_linenum
= line
;
4644 if (no_line_numbers
&& line
> 0)
4650 note
= rtx_alloc (NOTE
);
4651 INSN_UID (note
) = cur_insn_uid
++;
4652 NOTE_SOURCE_FILE (note
) = file
;
4653 NOTE_LINE_NUMBER (note
) = line
;
4654 BLOCK_FOR_INSN (note
) = NULL
;
4659 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4662 emit_line_note_force (file
, line
)
4667 return emit_line_note (file
, line
);
4670 /* Cause next statement to emit a line note even if the line number
4671 has not changed. This is used at the beginning of a function. */
4674 force_next_line_note ()
4679 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4680 note of this type already exists, remove it first. */
4683 set_unique_reg_note (insn
, kind
, datum
)
4688 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4694 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4695 has multiple sets (some callers assume single_set
4696 means the insn only has one set, when in fact it
4697 means the insn only has one * useful * set). */
4698 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4705 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4706 It serves no useful purpose and breaks eliminate_regs. */
4707 if (GET_CODE (datum
) == ASM_OPERANDS
)
4717 XEXP (note
, 0) = datum
;
4721 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4722 return REG_NOTES (insn
);
4725 /* Return an indication of which type of insn should have X as a body.
4726 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4732 if (GET_CODE (x
) == CODE_LABEL
)
4734 if (GET_CODE (x
) == CALL
)
4736 if (GET_CODE (x
) == RETURN
)
4738 if (GET_CODE (x
) == SET
)
4740 if (SET_DEST (x
) == pc_rtx
)
4742 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4747 if (GET_CODE (x
) == PARALLEL
)
4750 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4751 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4753 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4754 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4756 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4757 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4763 /* Emit the rtl pattern X as an appropriate kind of insn.
4764 If X is a label, it is simply added into the insn chain. */
4770 enum rtx_code code
= classify_insn (x
);
4772 if (code
== CODE_LABEL
)
4773 return emit_label (x
);
4774 else if (code
== INSN
)
4775 return emit_insn (x
);
4776 else if (code
== JUMP_INSN
)
4778 rtx insn
= emit_jump_insn (x
);
4779 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4780 return emit_barrier ();
4783 else if (code
== CALL_INSN
)
4784 return emit_call_insn (x
);
4789 /* Space for free sequence stack entries. */
4790 static GTY ((deletable (""))) struct sequence_stack
*free_sequence_stack
;
4792 /* Begin emitting insns to a sequence which can be packaged in an
4793 RTL_EXPR. If this sequence will contain something that might cause
4794 the compiler to pop arguments to function calls (because those
4795 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4796 details), use do_pending_stack_adjust before calling this function.
4797 That will ensure that the deferred pops are not accidentally
4798 emitted in the middle of this sequence. */
4803 struct sequence_stack
*tem
;
4805 if (free_sequence_stack
!= NULL
)
4807 tem
= free_sequence_stack
;
4808 free_sequence_stack
= tem
->next
;
4811 tem
= (struct sequence_stack
*) ggc_alloc (sizeof (struct sequence_stack
));
4813 tem
->next
= seq_stack
;
4814 tem
->first
= first_insn
;
4815 tem
->last
= last_insn
;
4816 tem
->sequence_rtl_expr
= seq_rtl_expr
;
4824 /* Similarly, but indicate that this sequence will be placed in T, an
4825 RTL_EXPR. See the documentation for start_sequence for more
4826 information about how to use this function. */
4829 start_sequence_for_rtl_expr (t
)
4837 /* Set up the insn chain starting with FIRST as the current sequence,
4838 saving the previously current one. See the documentation for
4839 start_sequence for more information about how to use this function. */
4842 push_to_sequence (first
)
4849 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4855 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4858 push_to_full_sequence (first
, last
)
4864 /* We really should have the end of the insn chain here. */
4865 if (last
&& NEXT_INSN (last
))
4869 /* Set up the outer-level insn chain
4870 as the current sequence, saving the previously current one. */
4873 push_topmost_sequence ()
4875 struct sequence_stack
*stack
, *top
= NULL
;
4879 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4882 first_insn
= top
->first
;
4883 last_insn
= top
->last
;
4884 seq_rtl_expr
= top
->sequence_rtl_expr
;
4887 /* After emitting to the outer-level insn chain, update the outer-level
4888 insn chain, and restore the previous saved state. */
4891 pop_topmost_sequence ()
4893 struct sequence_stack
*stack
, *top
= NULL
;
4895 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4898 top
->first
= first_insn
;
4899 top
->last
= last_insn
;
4900 /* ??? Why don't we save seq_rtl_expr here? */
4905 /* After emitting to a sequence, restore previous saved state.
4907 To get the contents of the sequence just made, you must call
4908 `get_insns' *before* calling here.
4910 If the compiler might have deferred popping arguments while
4911 generating this sequence, and this sequence will not be immediately
4912 inserted into the instruction stream, use do_pending_stack_adjust
4913 before calling get_insns. That will ensure that the deferred
4914 pops are inserted into this sequence, and not into some random
4915 location in the instruction stream. See INHIBIT_DEFER_POP for more
4916 information about deferred popping of arguments. */
4921 struct sequence_stack
*tem
= seq_stack
;
4923 first_insn
= tem
->first
;
4924 last_insn
= tem
->last
;
4925 seq_rtl_expr
= tem
->sequence_rtl_expr
;
4926 seq_stack
= tem
->next
;
4928 memset (tem
, 0, sizeof (*tem
));
4929 tem
->next
= free_sequence_stack
;
4930 free_sequence_stack
= tem
;
4933 /* This works like end_sequence, but records the old sequence in FIRST
4937 end_full_sequence (first
, last
)
4940 *first
= first_insn
;
4945 /* Return 1 if currently emitting into a sequence. */
4950 return seq_stack
!= 0;
4953 /* Put the various virtual registers into REGNO_REG_RTX. */
4956 init_virtual_regs (es
)
4957 struct emit_status
*es
;
4959 rtx
*ptr
= es
->x_regno_reg_rtx
;
4960 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4961 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4962 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4963 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4964 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
4968 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4969 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
4970 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
4971 static int copy_insn_n_scratches
;
4973 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4974 copied an ASM_OPERANDS.
4975 In that case, it is the original input-operand vector. */
4976 static rtvec orig_asm_operands_vector
;
4978 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4979 copied an ASM_OPERANDS.
4980 In that case, it is the copied input-operand vector. */
4981 static rtvec copy_asm_operands_vector
;
4983 /* Likewise for the constraints vector. */
4984 static rtvec orig_asm_constraints_vector
;
4985 static rtvec copy_asm_constraints_vector
;
4987 /* Recursively create a new copy of an rtx for copy_insn.
4988 This function differs from copy_rtx in that it handles SCRATCHes and
4989 ASM_OPERANDs properly.
4990 Normally, this function is not used directly; use copy_insn as front end.
4991 However, you could first copy an insn pattern with copy_insn and then use
4992 this function afterwards to properly copy any REG_NOTEs containing
5002 const char *format_ptr
;
5004 code
= GET_CODE (orig
);
5021 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5022 if (copy_insn_scratch_in
[i
] == orig
)
5023 return copy_insn_scratch_out
[i
];
5027 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5028 a LABEL_REF, it isn't sharable. */
5029 if (GET_CODE (XEXP (orig
, 0)) == PLUS
5030 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
5031 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
5035 /* A MEM with a constant address is not sharable. The problem is that
5036 the constant address may need to be reloaded. If the mem is shared,
5037 then reloading one copy of this mem will cause all copies to appear
5038 to have been reloaded. */
5044 copy
= rtx_alloc (code
);
5046 /* Copy the various flags, and other information. We assume that
5047 all fields need copying, and then clear the fields that should
5048 not be copied. That is the sensible default behavior, and forces
5049 us to explicitly document why we are *not* copying a flag. */
5050 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
5052 /* We do not copy the USED flag, which is used as a mark bit during
5053 walks over the RTL. */
5054 RTX_FLAG (copy
, used
) = 0;
5056 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5057 if (GET_RTX_CLASS (code
) == 'i')
5059 RTX_FLAG (copy
, jump
) = 0;
5060 RTX_FLAG (copy
, call
) = 0;
5061 RTX_FLAG (copy
, frame_related
) = 0;
5064 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5066 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5068 copy
->fld
[i
] = orig
->fld
[i
];
5069 switch (*format_ptr
++)
5072 if (XEXP (orig
, i
) != NULL
)
5073 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5078 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5079 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5080 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5081 XVEC (copy
, i
) = copy_asm_operands_vector
;
5082 else if (XVEC (orig
, i
) != NULL
)
5084 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5085 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5086 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5097 /* These are left unchanged. */
5105 if (code
== SCRATCH
)
5107 i
= copy_insn_n_scratches
++;
5108 if (i
>= MAX_RECOG_OPERANDS
)
5110 copy_insn_scratch_in
[i
] = orig
;
5111 copy_insn_scratch_out
[i
] = copy
;
5113 else if (code
== ASM_OPERANDS
)
5115 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5116 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5117 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5118 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5124 /* Create a new copy of an rtx.
5125 This function differs from copy_rtx in that it handles SCRATCHes and
5126 ASM_OPERANDs properly.
5127 INSN doesn't really have to be a full INSN; it could be just the
5133 copy_insn_n_scratches
= 0;
5134 orig_asm_operands_vector
= 0;
5135 orig_asm_constraints_vector
= 0;
5136 copy_asm_operands_vector
= 0;
5137 copy_asm_constraints_vector
= 0;
5138 return copy_insn_1 (insn
);
5141 /* Initialize data structures and variables in this file
5142 before generating rtl for each function. */
5147 struct function
*f
= cfun
;
5149 f
->emit
= (struct emit_status
*) ggc_alloc (sizeof (struct emit_status
));
5152 seq_rtl_expr
= NULL
;
5154 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5157 first_label_num
= label_num
;
5161 /* Init the tables that describe all the pseudo regs. */
5163 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5165 f
->emit
->regno_pointer_align
5166 = (unsigned char *) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5167 * sizeof (unsigned char));
5170 = (rtx
*) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5174 = (tree
*) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5177 /* Put copies of all the hard registers into regno_reg_rtx. */
5178 memcpy (regno_reg_rtx
,
5179 static_regno_reg_rtx
,
5180 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5182 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5183 init_virtual_regs (f
->emit
);
5185 /* Indicate that the virtual registers and stack locations are
5187 REG_POINTER (stack_pointer_rtx
) = 1;
5188 REG_POINTER (frame_pointer_rtx
) = 1;
5189 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5190 REG_POINTER (arg_pointer_rtx
) = 1;
5192 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5193 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5194 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5195 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5196 REG_POINTER (virtual_cfa_rtx
) = 1;
5198 #ifdef STACK_BOUNDARY
5199 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5200 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5201 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5202 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5204 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5205 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5206 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5207 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5208 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5211 #ifdef INIT_EXPANDERS
5216 /* Generate the constant 0. */
5219 gen_const_vector_0 (mode
)
5220 enum machine_mode mode
;
5225 enum machine_mode inner
;
5227 units
= GET_MODE_NUNITS (mode
);
5228 inner
= GET_MODE_INNER (mode
);
5230 v
= rtvec_alloc (units
);
5232 /* We need to call this function after we to set CONST0_RTX first. */
5233 if (!CONST0_RTX (inner
))
5236 for (i
= 0; i
< units
; ++i
)
5237 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
5239 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5243 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5244 all elements are zero. */
5246 gen_rtx_CONST_VECTOR (mode
, v
)
5247 enum machine_mode mode
;
5250 rtx inner_zero
= CONST0_RTX (GET_MODE_INNER (mode
));
5253 for (i
= GET_MODE_NUNITS (mode
) - 1; i
>= 0; i
--)
5254 if (RTVEC_ELT (v
, i
) != inner_zero
)
5255 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5256 return CONST0_RTX (mode
);
5259 /* Create some permanent unique rtl objects shared between all functions.
5260 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5263 init_emit_once (line_numbers
)
5267 enum machine_mode mode
;
5268 enum machine_mode double_mode
;
5270 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5272 const_int_htab
= htab_create (37, const_int_htab_hash
,
5273 const_int_htab_eq
, NULL
);
5275 const_double_htab
= htab_create (37, const_double_htab_hash
,
5276 const_double_htab_eq
, NULL
);
5278 mem_attrs_htab
= htab_create (37, mem_attrs_htab_hash
,
5279 mem_attrs_htab_eq
, NULL
);
5281 no_line_numbers
= ! line_numbers
;
5283 /* Compute the word and byte modes. */
5285 byte_mode
= VOIDmode
;
5286 word_mode
= VOIDmode
;
5287 double_mode
= VOIDmode
;
5289 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5290 mode
= GET_MODE_WIDER_MODE (mode
))
5292 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5293 && byte_mode
== VOIDmode
)
5296 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5297 && word_mode
== VOIDmode
)
5301 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5302 mode
= GET_MODE_WIDER_MODE (mode
))
5304 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5305 && double_mode
== VOIDmode
)
5309 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5311 /* Assign register numbers to the globally defined register rtx.
5312 This must be done at runtime because the register number field
5313 is in a union and some compilers can't initialize unions. */
5315 pc_rtx
= gen_rtx (PC
, VOIDmode
);
5316 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
5317 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5318 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5319 if (hard_frame_pointer_rtx
== 0)
5320 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5321 HARD_FRAME_POINTER_REGNUM
);
5322 if (arg_pointer_rtx
== 0)
5323 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5324 virtual_incoming_args_rtx
=
5325 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5326 virtual_stack_vars_rtx
=
5327 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5328 virtual_stack_dynamic_rtx
=
5329 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5330 virtual_outgoing_args_rtx
=
5331 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5332 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5334 /* Initialize RTL for commonly used hard registers. These are
5335 copied into regno_reg_rtx as we begin to compile each function. */
5336 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5337 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5339 #ifdef INIT_EXPANDERS
5340 /* This is to initialize {init|mark|free}_machine_status before the first
5341 call to push_function_context_to. This is needed by the Chill front
5342 end which calls push_function_context_to before the first call to
5343 init_function_start. */
5347 /* Create the unique rtx's for certain rtx codes and operand values. */
5349 /* Don't use gen_rtx here since gen_rtx in this case
5350 tries to use these variables. */
5351 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5352 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5353 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5355 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5356 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5357 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5359 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5361 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5362 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5363 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5364 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5366 for (i
= 0; i
<= 2; i
++)
5368 REAL_VALUE_TYPE
*r
=
5369 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5371 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5372 mode
= GET_MODE_WIDER_MODE (mode
))
5373 const_tiny_rtx
[i
][(int) mode
] =
5374 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5376 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5378 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5379 mode
= GET_MODE_WIDER_MODE (mode
))
5380 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5382 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5384 mode
= GET_MODE_WIDER_MODE (mode
))
5385 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5388 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5390 mode
= GET_MODE_WIDER_MODE (mode
))
5391 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5393 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5395 mode
= GET_MODE_WIDER_MODE (mode
))
5396 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5398 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5399 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5400 const_tiny_rtx
[0][i
] = const0_rtx
;
5402 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5403 if (STORE_FLAG_VALUE
== 1)
5404 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5406 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5407 return_address_pointer_rtx
5408 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5412 struct_value_rtx
= STRUCT_VALUE
;
5414 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
5417 #ifdef STRUCT_VALUE_INCOMING
5418 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
5420 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5421 struct_value_incoming_rtx
5422 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
5424 struct_value_incoming_rtx
= struct_value_rtx
;
5428 #ifdef STATIC_CHAIN_REGNUM
5429 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5431 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5432 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5433 static_chain_incoming_rtx
5434 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5437 static_chain_incoming_rtx
= static_chain_rtx
;
5441 static_chain_rtx
= STATIC_CHAIN
;
5443 #ifdef STATIC_CHAIN_INCOMING
5444 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5446 static_chain_incoming_rtx
= static_chain_rtx
;
5450 if (PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5451 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5454 /* Query and clear/ restore no_line_numbers. This is used by the
5455 switch / case handling in stmt.c to give proper line numbers in
5456 warnings about unreachable code. */
5459 force_line_numbers ()
5461 int old
= no_line_numbers
;
5463 no_line_numbers
= 0;
5465 force_next_line_note ();
5470 restore_line_number_status (old_value
)
5473 no_line_numbers
= old_value
;
5476 /* Produce exact duplicate of insn INSN after AFTER.
5477 Care updating of libcall regions if present. */
5480 emit_copy_of_insn_after (insn
, after
)
5484 rtx note1
, note2
, link
;
5486 switch (GET_CODE (insn
))
5489 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5493 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5497 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5498 if (CALL_INSN_FUNCTION_USAGE (insn
))
5499 CALL_INSN_FUNCTION_USAGE (new)
5500 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5501 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5502 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5509 /* Update LABEL_NUSES. */
5510 mark_jump_label (PATTERN (new), new, 0);
5512 INSN_SCOPE (new) = INSN_SCOPE (insn
);
5514 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5516 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5517 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5519 if (GET_CODE (link
) == EXPR_LIST
)
5521 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5526 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5531 /* Fix the libcall sequences. */
5532 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5535 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5537 XEXP (note1
, 0) = p
;
5538 XEXP (note2
, 0) = new;
5543 #include "gt-emit-rtl.h"