1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
24 #include "hard-reg-set.h"
27 #include "insn-config.h"
33 /* The basic idea of common subexpression elimination is to go
34 through the code, keeping a record of expressions that would
35 have the same value at the current scan point, and replacing
36 expressions encountered with the cheapest equivalent expression.
38 It is too complicated to keep track of the different possibilities
39 when control paths merge; so, at each label, we forget all that is
40 known and start fresh. This can be described as processing each
41 basic block separately. Note, however, that these are not quite
42 the same as the basic blocks found by a later pass and used for
43 data flow analysis and register packing. We do not need to start fresh
44 after a conditional jump instruction if there is no label there.
46 We use two data structures to record the equivalent expressions:
47 a hash table for most expressions, and several vectors together
48 with "quantity numbers" to record equivalent (pseudo) registers.
50 The use of the special data structure for registers is desirable
51 because it is faster. It is possible because registers references
52 contain a fairly small number, the register number, taken from
53 a contiguously allocated series, and two register references are
54 identical if they have the same number. General expressions
55 do not have any such thing, so the only way to retrieve the
56 information recorded on an expression other than a register
57 is to keep it in a hash table.
59 Registers and "quantity numbers":
61 At the start of each basic block, all of the (hardware and pseudo)
62 registers used in the function are given distinct quantity
63 numbers to indicate their contents. During scan, when the code
64 copies one register into another, we copy the quantity number.
65 When a register is loaded in any other way, we allocate a new
66 quantity number to describe the value generated by this operation.
67 `reg_qty' records what quantity a register is currently thought
70 All real quantity numbers are greater than or equal to `max_reg'.
71 If register N has not been assigned a quantity, reg_qty[N] will equal N.
73 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
74 variables should be referenced with an index below `max_reg'.
76 We also maintain a bidirectional chain of registers for each
77 quantity number. `qty_first_reg', `qty_last_reg',
78 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
80 The first register in a chain is the one whose lifespan is least local.
81 Among equals, it is the one that was seen first.
82 We replace any equivalent register with that one.
84 If two registers have the same quantity number, it must be true that
85 REG expressions with `qty_mode' must be in the hash table for both
86 registers and must be in the same class.
88 The converse is not true. Since hard registers may be referenced in
89 any mode, two REG expressions might be equivalent in the hash table
90 but not have the same quantity number if the quantity number of one
91 of the registers is not the same mode as those expressions.
93 Constants and quantity numbers
95 When a quantity has a known constant value, that value is stored
96 in the appropriate element of qty_const. This is in addition to
97 putting the constant in the hash table as is usual for non-regs.
99 Whether a reg or a constant is preferred is determined by the configuration
100 macro CONST_COSTS and will often depend on the constant value. In any
101 event, expressions containing constants can be simplified, by fold_rtx.
103 When a quantity has a known nearly constant value (such as an address
104 of a stack slot), that value is stored in the appropriate element
107 Integer constants don't have a machine mode. However, cse
108 determines the intended machine mode from the destination
109 of the instruction that moves the constant. The machine mode
110 is recorded in the hash table along with the actual RTL
111 constant expression so that different modes are kept separate.
115 To record known equivalences among expressions in general
116 we use a hash table called `table'. It has a fixed number of buckets
117 that contain chains of `struct table_elt' elements for expressions.
118 These chains connect the elements whose expressions have the same
121 Other chains through the same elements connect the elements which
122 currently have equivalent values.
124 Register references in an expression are canonicalized before hashing
125 the expression. This is done using `reg_qty' and `qty_first_reg'.
126 The hash code of a register reference is computed using the quantity
127 number, not the register number.
129 When the value of an expression changes, it is necessary to remove from the
130 hash table not just that expression but all expressions whose values
131 could be different as a result.
133 1. If the value changing is in memory, except in special cases
134 ANYTHING referring to memory could be changed. That is because
135 nobody knows where a pointer does not point.
136 The function `invalidate_memory' removes what is necessary.
138 The special cases are when the address is constant or is
139 a constant plus a fixed register such as the frame pointer
140 or a static chain pointer. When such addresses are stored in,
141 we can tell exactly which other such addresses must be invalidated
142 due to overlap. `invalidate' does this.
143 All expressions that refer to non-constant
144 memory addresses are also invalidated. `invalidate_memory' does this.
146 2. If the value changing is a register, all expressions
147 containing references to that register, and only those,
150 Because searching the entire hash table for expressions that contain
151 a register is very slow, we try to figure out when it isn't necessary.
152 Precisely, this is necessary only when expressions have been
153 entered in the hash table using this register, and then the value has
154 changed, and then another expression wants to be added to refer to
155 the register's new value. This sequence of circumstances is rare
156 within any one basic block.
158 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
159 reg_tick[i] is incremented whenever a value is stored in register i.
160 reg_in_table[i] holds -1 if no references to register i have been
161 entered in the table; otherwise, it contains the value reg_tick[i] had
162 when the references were entered. If we want to enter a reference
163 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
164 Until we want to enter a new entry, the mere fact that the two vectors
165 don't match makes the entries be ignored if anyone tries to match them.
167 Registers themselves are entered in the hash table as well as in
168 the equivalent-register chains. However, the vectors `reg_tick'
169 and `reg_in_table' do not apply to expressions which are simple
170 register references. These expressions are removed from the table
171 immediately when they become invalid, and this can be done even if
172 we do not immediately search for all the expressions that refer to
175 A CLOBBER rtx in an instruction invalidates its operand for further
176 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
177 invalidates everything that resides in memory.
181 Constant expressions that differ only by an additive integer
182 are called related. When a constant expression is put in
183 the table, the related expression with no constant term
184 is also entered. These are made to point at each other
185 so that it is possible to find out if there exists any
186 register equivalent to an expression related to a given expression. */
188 /* One plus largest register number used in this function. */
192 /* Length of vectors indexed by quantity number.
193 We know in advance we will not need a quantity number this big. */
197 /* Next quantity number to be allocated.
198 This is 1 + the largest number needed so far. */
202 /* Indexed by quantity number, gives the first (or last) (pseudo) register
203 in the chain of registers that currently contain this quantity. */
205 static int *qty_first_reg
;
206 static int *qty_last_reg
;
208 /* Index by quantity number, gives the mode of the quantity. */
210 static enum machine_mode
*qty_mode
;
212 /* Indexed by quantity number, gives the rtx of the constant value of the
213 quantity, or zero if it does not have a known value.
214 A sum of the frame pointer (or arg pointer) plus a constant
215 can also be entered here. */
217 static rtx
*qty_const
;
219 /* Indexed by qty number, gives the insn that stored the constant value
220 recorded in `qty_const'. */
222 static rtx
*qty_const_insn
;
224 /* The next three variables are used to track when a comparison between a
225 quantity and some constant or register has been passed. In that case, we
226 know the results of the comparison in case we see it again. These variables
227 record a comparison that is known to be true. */
229 /* Indexed by qty number, gives the rtx code of a comparison with a known
230 result involving this quantity. If none, it is UNKNOWN. */
231 static enum rtx_code
*qty_comparison_code
;
233 /* Indexed by qty number, gives the constant being compared against in a
234 comparison of known result. If no such comparison, it is undefined.
235 If the comparison is not with a constant, it is zero. */
237 static rtx
*qty_comparison_const
;
239 /* Indexed by qty number, gives the quantity being compared against in a
240 comparison of known result. If no such comparison, if it undefined.
241 If the comparison is not with a register, it is -1. */
243 static int *qty_comparison_qty
;
246 /* For machines that have a CC0, we do not record its value in the hash
247 table since its use is guaranteed to be the insn immediately following
248 its definition and any other insn is presumed to invalidate it.
250 Instead, we store below the value last assigned to CC0. If it should
251 happen to be a constant, it is stored in preference to the actual
252 assigned value. In case it is a constant, we store the mode in which
253 the constant should be interpreted. */
255 static rtx prev_insn_cc0
;
256 static enum machine_mode prev_insn_cc0_mode
;
259 /* Previous actual insn. 0 if at first insn of basic block. */
261 static rtx prev_insn
;
263 /* Insn being scanned. */
265 static rtx this_insn
;
267 /* Index by (pseudo) register number, gives the quantity number
268 of the register's current contents. */
272 /* Index by (pseudo) register number, gives the number of the next (or
273 previous) (pseudo) register in the chain of registers sharing the same
276 Or -1 if this register is at the end of the chain.
278 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
280 static int *reg_next_eqv
;
281 static int *reg_prev_eqv
;
283 /* Index by (pseudo) register number, gives the number of times
284 that register has been altered in the current basic block. */
286 static int *reg_tick
;
288 /* Index by (pseudo) register number, gives the reg_tick value at which
289 rtx's containing this register are valid in the hash table.
290 If this does not equal the current reg_tick value, such expressions
291 existing in the hash table are invalid.
292 If this is -1, no expressions containing this register have been
293 entered in the table. */
295 static int *reg_in_table
;
297 /* A HARD_REG_SET containing all the hard registers for which there is
298 currently a REG expression in the hash table. Note the difference
299 from the above variables, which indicate if the REG is mentioned in some
300 expression in the table. */
302 static HARD_REG_SET hard_regs_in_table
;
304 /* A HARD_REG_SET containing all the hard registers that are invalidated
307 static HARD_REG_SET regs_invalidated_by_call
;
309 /* Two vectors of ints:
310 one containing max_reg -1's; the other max_reg + 500 (an approximation
311 for max_qty) elements where element i contains i.
312 These are used to initialize various other vectors fast. */
314 static int *all_minus_one
;
315 static int *consec_ints
;
317 /* CUID of insn that starts the basic block currently being cse-processed. */
319 static int cse_basic_block_start
;
321 /* CUID of insn that ends the basic block currently being cse-processed. */
323 static int cse_basic_block_end
;
325 /* Vector mapping INSN_UIDs to cuids.
326 The cuids are like uids but increase monotonically always.
327 We use them to see whether a reg is used outside a given basic block. */
329 static short *uid_cuid
;
331 /* Get the cuid of an insn. */
333 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
335 /* Nonzero if cse has altered conditional jump insns
336 in such a way that jump optimization should be redone. */
338 static int cse_jumps_altered
;
340 /* canon_hash stores 1 in do_not_record
341 if it notices a reference to CC0, PC, or some other volatile
344 static int do_not_record
;
346 /* canon_hash stores 1 in hash_arg_in_memory
347 if it notices a reference to memory within the expression being hashed. */
349 static int hash_arg_in_memory
;
351 /* canon_hash stores 1 in hash_arg_in_struct
352 if it notices a reference to memory that's part of a structure. */
354 static int hash_arg_in_struct
;
356 /* The hash table contains buckets which are chains of `struct table_elt's,
357 each recording one expression's information.
358 That expression is in the `exp' field.
360 Those elements with the same hash code are chained in both directions
361 through the `next_same_hash' and `prev_same_hash' fields.
363 Each set of expressions with equivalent values
364 are on a two-way chain through the `next_same_value'
365 and `prev_same_value' fields, and all point with
366 the `first_same_value' field at the first element in
367 that chain. The chain is in order of increasing cost.
368 Each element's cost value is in its `cost' field.
370 The `in_memory' field is nonzero for elements that
371 involve any reference to memory. These elements are removed
372 whenever a write is done to an unidentified location in memory.
373 To be safe, we assume that a memory address is unidentified unless
374 the address is either a symbol constant or a constant plus
375 the frame pointer or argument pointer.
377 The `in_struct' field is nonzero for elements that
378 involve any reference to memory inside a structure or array.
380 The `related_value' field is used to connect related expressions
381 (that differ by adding an integer).
382 The related expressions are chained in a circular fashion.
383 `related_value' is zero for expressions for which this
386 The `cost' field stores the cost of this element's expression.
388 The `is_const' flag is set if the element is a constant (including
391 The `flag' field is used as a temporary during some search routines.
393 The `mode' field is usually the same as GET_MODE (`exp'), but
394 if `exp' is a CONST_INT and has no machine mode then the `mode'
395 field is the mode it was being used as. Each constant is
396 recorded separately for each mode it is used with. */
402 struct table_elt
*next_same_hash
;
403 struct table_elt
*prev_same_hash
;
404 struct table_elt
*next_same_value
;
405 struct table_elt
*prev_same_value
;
406 struct table_elt
*first_same_value
;
407 struct table_elt
*related_value
;
409 enum machine_mode mode
;
418 /* We don't want a lot of buckets, because we rarely have very many
419 things stored in the hash table, and a lot of buckets slows
420 down a lot of loops that happen frequently. */
423 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
424 register (hard registers may require `do_not_record' to be set). */
427 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
428 ? ((((int) REG << 7) + reg_qty[REGNO (X)]) % NBUCKETS) \
429 : canon_hash (X, M) % NBUCKETS)
431 /* Determine whether register number N is considered a fixed register for CSE.
432 It is desirable to replace other regs with fixed regs, to reduce need for
434 A reg wins if it is either the frame pointer or designated as fixed,
435 but not if it is an overlapping register. */
436 #ifdef OVERLAPPING_REGNO_P
437 #define FIXED_REGNO_P(N) \
438 (((N) == FRAME_POINTER_REGNUM || fixed_regs[N]) \
439 && ! OVERLAPPING_REGNO_P ((N)))
441 #define FIXED_REGNO_P(N) \
442 ((N) == FRAME_POINTER_REGNUM || fixed_regs[N])
445 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
446 hard registers are the cheapest with a cost of 0. Next come pseudos
447 with a cost of one and other hard registers with a cost of 2. Aside
448 from these special cases, call `rtx_cost'. */
451 (GET_CODE (X) == REG \
452 ? (REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
453 : (FIXED_REGNO_P (REGNO (X)) \
454 && REGNO_REG_CLASS (REGNO (X)) != NO_REGS) ? 0 \
456 : rtx_cost (X, SET) * 2)
458 /* Determine if the quantity number for register X represents a valid index
459 into the `qty_...' variables. */
461 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
463 static struct table_elt
*table
[NBUCKETS
];
465 /* Chain of `struct table_elt's made so far for this function
466 but currently removed from the table. */
468 static struct table_elt
*free_element_chain
;
470 /* Number of `struct table_elt' structures made so far for this function. */
472 static int n_elements_made
;
474 /* Maximum value `n_elements_made' has had so far in this compilation
475 for functions previously processed. */
477 static int max_elements_made
;
479 /* Surviving equivalence class when two equivalence classes are merged
480 by recording the effects of a jump in the last insn. Zero if the
481 last insn was not a conditional jump. */
483 static struct table_elt
*last_jump_equiv_class
;
485 /* Set to the cost of a constant pool reference if one was found for a
486 symbolic constant. If this was found, it means we should try to
487 convert constants into constant pool entries if they don't fit in
490 static int constant_pool_entries_cost
;
492 /* Bits describing what kind of values in memory must be invalidated
493 for a particular instruction. If all three bits are zero,
494 no memory refs need to be invalidated. Each bit is more powerful
495 than the preceding ones, and if a bit is set then the preceding
498 Here is how the bits are set:
499 Pushing onto the stack invalidates only the stack pointer,
500 writing at a fixed address invalidates only variable addresses,
501 writing in a structure element at variable address
502 invalidates all but scalar variables,
503 and writing in anything else at variable address invalidates everything. */
507 int sp
: 1; /* Invalidate stack pointer. */
508 int var
: 1; /* Invalidate variable addresses. */
509 int nonscalar
: 1; /* Invalidate all but scalar variables. */
510 int all
: 1; /* Invalidate all memory refs. */
513 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
514 virtual regs here because the simplify_*_operation routines are called
515 by integrate.c, which is called before virtual register instantiation. */
517 #define FIXED_BASE_PLUS_P(X) \
518 ((X) == frame_pointer_rtx || (X) == arg_pointer_rtx \
519 || (X) == virtual_stack_vars_rtx \
520 || (X) == virtual_incoming_args_rtx \
521 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
522 && (XEXP (X, 0) == frame_pointer_rtx \
523 || XEXP (X, 0) == arg_pointer_rtx \
524 || XEXP (X, 0) == virtual_stack_vars_rtx \
525 || XEXP (X, 0) == virtual_incoming_args_rtx)))
527 /* Similar, but also allows reference to the stack pointer.
529 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
530 arg_pointer_rtx by itself is nonzero, because on at least one machine,
531 the i960, the arg pointer is zero when it is unused. */
533 #define NONZERO_BASE_PLUS_P(X) \
534 ((X) == frame_pointer_rtx \
535 || (X) == virtual_stack_vars_rtx \
536 || (X) == virtual_incoming_args_rtx \
537 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
538 && (XEXP (X, 0) == frame_pointer_rtx \
539 || XEXP (X, 0) == arg_pointer_rtx \
540 || XEXP (X, 0) == virtual_stack_vars_rtx \
541 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
542 || (X) == stack_pointer_rtx \
543 || (X) == virtual_stack_dynamic_rtx \
544 || (X) == virtual_outgoing_args_rtx \
545 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
546 && (XEXP (X, 0) == stack_pointer_rtx \
547 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
548 || XEXP (X, 0) == virtual_outgoing_args_rtx)))
550 static struct table_elt
*lookup ();
551 static void free_element ();
553 static int insert_regs ();
554 static void rehash_using_reg ();
555 static void remove_invalid_refs ();
556 static int exp_equiv_p ();
558 int refers_to_mem_p ();
559 static void invalidate_from_clobbers ();
560 static int safe_hash ();
561 static int canon_hash ();
562 static rtx
fold_rtx ();
563 static rtx
equiv_constant ();
564 static void record_jump_cond ();
565 static void note_mem_written ();
566 static int cse_rtx_addr_varies_p ();
567 static enum rtx_code
find_comparison_args ();
568 static void cse_insn ();
569 static void cse_set_around_loop ();
571 /* Return an estimate of the cost of computing rtx X.
572 One use is in cse, to decide which expression to keep in the hash table.
573 Another is in rtl generation, to pick the cheapest way to multiply.
574 Other uses like the latter are expected in the future. */
576 /* Return the right cost to give to an operation
577 to make the cost of the corresponding register-to-register instruction
578 N times that of a fast register-to-register instruction. */
580 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
583 rtx_cost (x
, outer_code
)
585 enum rtx_code outer_code
;
588 register enum rtx_code code
;
595 /* Compute the default costs of certain things.
596 Note that RTX_COSTS can override the defaults. */
602 /* Count multiplication by 2**n as a shift,
603 because if we are considering it, we would output it as a shift. */
604 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
605 && exact_log2 (INTVAL (XEXP (x
, 1))) >= 0)
608 total
= COSTS_N_INSNS (5);
614 total
= COSTS_N_INSNS (7);
617 /* Used in loop.c and combine.c as a marker. */
621 /* We don't want these to be used in substitutions because
622 we have no way of validating the resulting insn. So assign
623 anything containing an ASM_OPERANDS a very high cost. */
635 /* If we can't tie these modes, make this expensive. The larger
636 the mode, the more expensive it is. */
637 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
638 return COSTS_N_INSNS (2
639 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
642 RTX_COSTS (x
, code
, outer_code
);
644 CONST_COSTS (x
, code
, outer_code
);
647 /* Sum the costs of the sub-rtx's, plus cost of this operation,
648 which is already in total. */
650 fmt
= GET_RTX_FORMAT (code
);
651 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
653 total
+= rtx_cost (XEXP (x
, i
), code
);
654 else if (fmt
[i
] == 'E')
655 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
656 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
661 /* Clear the hash table and initialize each register with its own quantity,
662 for a new basic block. */
671 bzero (reg_tick
, max_reg
* sizeof (int));
673 bcopy (all_minus_one
, reg_in_table
, max_reg
* sizeof (int));
674 bcopy (consec_ints
, reg_qty
, max_reg
* sizeof (int));
675 CLEAR_HARD_REG_SET (hard_regs_in_table
);
677 /* The per-quantity values used to be initialized here, but it is
678 much faster to initialize each as it is made in `make_new_qty'. */
680 for (i
= 0; i
< NBUCKETS
; i
++)
682 register struct table_elt
*this, *next
;
683 for (this = table
[i
]; this; this = next
)
685 next
= this->next_same_hash
;
690 bzero (table
, sizeof table
);
699 /* Say that register REG contains a quantity not in any register before
700 and initialize that quantity. */
708 if (next_qty
>= max_qty
)
711 q
= reg_qty
[reg
] = next_qty
++;
712 qty_first_reg
[q
] = reg
;
713 qty_last_reg
[q
] = reg
;
714 qty_const
[q
] = qty_const_insn
[q
] = 0;
715 qty_comparison_code
[q
] = UNKNOWN
;
717 reg_next_eqv
[reg
] = reg_prev_eqv
[reg
] = -1;
720 /* Make reg NEW equivalent to reg OLD.
721 OLD is not changing; NEW is. */
724 make_regs_eqv (new, old
)
725 register int new, old
;
727 register int lastr
, firstr
;
728 register int q
= reg_qty
[old
];
730 /* Nothing should become eqv until it has a "non-invalid" qty number. */
731 if (! REGNO_QTY_VALID_P (old
))
735 firstr
= qty_first_reg
[q
];
736 lastr
= qty_last_reg
[q
];
738 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
739 hard regs. Among pseudos, if NEW will live longer than any other reg
740 of the same qty, and that is beyond the current basic block,
741 make it the new canonical replacement for this qty. */
742 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
743 /* Certain fixed registers might be of the class NO_REGS. This means
744 that not only can they not be allocated by the compiler, but
745 they cannot be used in substitutions or canonicalizations
747 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
748 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
749 || (new >= FIRST_PSEUDO_REGISTER
750 && (firstr
< FIRST_PSEUDO_REGISTER
751 || ((uid_cuid
[regno_last_uid
[new]] > cse_basic_block_end
752 || (uid_cuid
[regno_first_uid
[new]]
753 < cse_basic_block_start
))
754 && (uid_cuid
[regno_last_uid
[new]]
755 > uid_cuid
[regno_last_uid
[firstr
]]))))))
757 reg_prev_eqv
[firstr
] = new;
758 reg_next_eqv
[new] = firstr
;
759 reg_prev_eqv
[new] = -1;
760 qty_first_reg
[q
] = new;
764 /* If NEW is a hard reg (known to be non-fixed), insert at end.
765 Otherwise, insert before any non-fixed hard regs that are at the
766 end. Registers of class NO_REGS cannot be used as an
767 equivalent for anything. */
768 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_prev_eqv
[lastr
] >= 0
769 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
770 && new >= FIRST_PSEUDO_REGISTER
)
771 lastr
= reg_prev_eqv
[lastr
];
772 reg_next_eqv
[new] = reg_next_eqv
[lastr
];
773 if (reg_next_eqv
[lastr
] >= 0)
774 reg_prev_eqv
[reg_next_eqv
[lastr
]] = new;
776 qty_last_reg
[q
] = new;
777 reg_next_eqv
[lastr
] = new;
778 reg_prev_eqv
[new] = lastr
;
782 /* Remove REG from its equivalence class. */
785 delete_reg_equiv (reg
)
788 register int n
= reg_next_eqv
[reg
];
789 register int p
= reg_prev_eqv
[reg
];
790 register int q
= reg_qty
[reg
];
792 /* If invalid, do nothing. N and P above are undefined in that case. */
803 qty_first_reg
[q
] = n
;
808 /* Remove any invalid expressions from the hash table
809 that refer to any of the registers contained in expression X.
811 Make sure that newly inserted references to those registers
812 as subexpressions will be considered valid.
814 mention_regs is not called when a register itself
815 is being stored in the table.
817 Return 1 if we have done something that may have changed the hash code
824 register enum rtx_code code
;
827 register int changed
= 0;
835 register int regno
= REGNO (x
);
836 register int endregno
837 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
838 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
841 for (i
= regno
; i
< endregno
; i
++)
843 if (reg_in_table
[i
] >= 0 && reg_in_table
[i
] != reg_tick
[i
])
844 remove_invalid_refs (i
);
846 reg_in_table
[i
] = reg_tick
[i
];
852 /* If X is a comparison or a COMPARE and either operand is a register
853 that does not have a quantity, give it one. This is so that a later
854 call to record_jump_equiv won't cause X to be assigned a different
855 hash code and not found in the table after that call.
857 It is not necessary to do this here, since rehash_using_reg can
858 fix up the table later, but doing this here eliminates the need to
859 call that expensive function in the most common case where the only
860 use of the register is in the comparison. */
862 if (code
== COMPARE
|| GET_RTX_CLASS (code
) == '<')
864 if (GET_CODE (XEXP (x
, 0)) == REG
865 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
866 if (insert_regs (XEXP (x
, 0), 0, 0))
868 rehash_using_reg (XEXP (x
, 0));
872 if (GET_CODE (XEXP (x
, 1)) == REG
873 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
874 if (insert_regs (XEXP (x
, 1), 0, 0))
876 rehash_using_reg (XEXP (x
, 1));
881 fmt
= GET_RTX_FORMAT (code
);
882 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
884 changed
|= mention_regs (XEXP (x
, i
));
885 else if (fmt
[i
] == 'E')
886 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
887 changed
|= mention_regs (XVECEXP (x
, i
, j
));
892 /* Update the register quantities for inserting X into the hash table
893 with a value equivalent to CLASSP.
894 (If the class does not contain a REG, it is irrelevant.)
895 If MODIFIED is nonzero, X is a destination; it is being modified.
896 Note that delete_reg_equiv should be called on a register
897 before insert_regs is done on that register with MODIFIED != 0.
899 Nonzero value means that elements of reg_qty have changed
900 so X's hash code may be different. */
903 insert_regs (x
, classp
, modified
)
905 struct table_elt
*classp
;
908 if (GET_CODE (x
) == REG
)
910 register int regno
= REGNO (x
);
913 || ! (REGNO_QTY_VALID_P (regno
)
914 && qty_mode
[reg_qty
[regno
]] == GET_MODE (x
)))
917 for (classp
= classp
->first_same_value
;
919 classp
= classp
->next_same_value
)
920 if (GET_CODE (classp
->exp
) == REG
921 && GET_MODE (classp
->exp
) == GET_MODE (x
))
923 make_regs_eqv (regno
, REGNO (classp
->exp
));
927 make_new_qty (regno
);
928 qty_mode
[reg_qty
[regno
]] = GET_MODE (x
);
933 /* If X is a SUBREG, we will likely be inserting the inner register in the
934 table. If that register doesn't have an assigned quantity number at
935 this point but does later, the insertion that we will be doing now will
936 not be accessible because its hash code will have changed. So assign
937 a quantity number now. */
939 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
940 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
942 insert_regs (SUBREG_REG (x
), 0, 0);
943 mention_regs (SUBREG_REG (x
));
947 return mention_regs (x
);
950 /* Look in or update the hash table. */
952 /* Put the element ELT on the list of free elements. */
956 struct table_elt
*elt
;
958 elt
->next_same_hash
= free_element_chain
;
959 free_element_chain
= elt
;
962 /* Return an element that is free for use. */
964 static struct table_elt
*
967 struct table_elt
*elt
= free_element_chain
;
970 free_element_chain
= elt
->next_same_hash
;
974 return (struct table_elt
*) oballoc (sizeof (struct table_elt
));
977 /* Remove table element ELT from use in the table.
978 HASH is its hash code, made using the HASH macro.
979 It's an argument because often that is known in advance
980 and we save much time not recomputing it. */
983 remove_from_table (elt
, hash
)
984 register struct table_elt
*elt
;
990 /* Mark this element as removed. See cse_insn. */
991 elt
->first_same_value
= 0;
993 /* Remove the table element from its equivalence class. */
996 register struct table_elt
*prev
= elt
->prev_same_value
;
997 register struct table_elt
*next
= elt
->next_same_value
;
999 if (next
) next
->prev_same_value
= prev
;
1002 prev
->next_same_value
= next
;
1005 register struct table_elt
*newfirst
= next
;
1008 next
->first_same_value
= newfirst
;
1009 next
= next
->next_same_value
;
1014 /* Remove the table element from its hash bucket. */
1017 register struct table_elt
*prev
= elt
->prev_same_hash
;
1018 register struct table_elt
*next
= elt
->next_same_hash
;
1020 if (next
) next
->prev_same_hash
= prev
;
1023 prev
->next_same_hash
= next
;
1024 else if (table
[hash
] == elt
)
1028 /* This entry is not in the proper hash bucket. This can happen
1029 when two classes were merged by `merge_equiv_classes'. Search
1030 for the hash bucket that it heads. This happens only very
1031 rarely, so the cost is acceptable. */
1032 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1033 if (table
[hash
] == elt
)
1038 /* Remove the table element from its related-value circular chain. */
1040 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1042 register struct table_elt
*p
= elt
->related_value
;
1043 while (p
->related_value
!= elt
)
1044 p
= p
->related_value
;
1045 p
->related_value
= elt
->related_value
;
1046 if (p
->related_value
== p
)
1047 p
->related_value
= 0;
1053 /* Look up X in the hash table and return its table element,
1054 or 0 if X is not in the table.
1056 MODE is the machine-mode of X, or if X is an integer constant
1057 with VOIDmode then MODE is the mode with which X will be used.
1059 Here we are satisfied to find an expression whose tree structure
1062 static struct table_elt
*
1063 lookup (x
, hash
, mode
)
1066 enum machine_mode mode
;
1068 register struct table_elt
*p
;
1070 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1071 if (mode
== p
->mode
&& ((x
== p
->exp
&& GET_CODE (x
) == REG
)
1072 || exp_equiv_p (x
, p
->exp
, GET_CODE (x
) != REG
, 0)))
1078 /* Like `lookup' but don't care whether the table element uses invalid regs.
1079 Also ignore discrepancies in the machine mode of a register. */
1081 static struct table_elt
*
1082 lookup_for_remove (x
, hash
, mode
)
1085 enum machine_mode mode
;
1087 register struct table_elt
*p
;
1089 if (GET_CODE (x
) == REG
)
1091 int regno
= REGNO (x
);
1092 /* Don't check the machine mode when comparing registers;
1093 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1094 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1095 if (GET_CODE (p
->exp
) == REG
1096 && REGNO (p
->exp
) == regno
)
1101 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1102 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1109 /* Look for an expression equivalent to X and with code CODE.
1110 If one is found, return that expression. */
1113 lookup_as_function (x
, code
)
1117 register struct table_elt
*p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
,
1122 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1124 if (GET_CODE (p
->exp
) == code
1125 /* Make sure this is a valid entry in the table. */
1126 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1133 /* Insert X in the hash table, assuming HASH is its hash code
1134 and CLASSP is an element of the class it should go in
1135 (or 0 if a new class should be made).
1136 It is inserted at the proper position to keep the class in
1137 the order cheapest first.
1139 MODE is the machine-mode of X, or if X is an integer constant
1140 with VOIDmode then MODE is the mode with which X will be used.
1142 For elements of equal cheapness, the most recent one
1143 goes in front, except that the first element in the list
1144 remains first unless a cheaper element is added. The order of
1145 pseudo-registers does not matter, as canon_reg will be called to
1146 find the cheapest when a register is retrieved from the table.
1148 The in_memory field in the hash table element is set to 0.
1149 The caller must set it nonzero if appropriate.
1151 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1152 and if insert_regs returns a nonzero value
1153 you must then recompute its hash code before calling here.
1155 If necessary, update table showing constant values of quantities. */
1157 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1159 static struct table_elt
*
1160 insert (x
, classp
, hash
, mode
)
1162 register struct table_elt
*classp
;
1164 enum machine_mode mode
;
1166 register struct table_elt
*elt
;
1168 /* If X is a register and we haven't made a quantity for it,
1169 something is wrong. */
1170 if (GET_CODE (x
) == REG
&& ! REGNO_QTY_VALID_P (REGNO (x
)))
1173 /* If X is a hard register, show it is being put in the table. */
1174 if (GET_CODE (x
) == REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1176 int regno
= REGNO (x
);
1177 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1180 for (i
= regno
; i
< endregno
; i
++)
1181 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1185 /* Put an element for X into the right hash bucket. */
1187 elt
= get_element ();
1189 elt
->cost
= COST (x
);
1190 elt
->next_same_value
= 0;
1191 elt
->prev_same_value
= 0;
1192 elt
->next_same_hash
= table
[hash
];
1193 elt
->prev_same_hash
= 0;
1194 elt
->related_value
= 0;
1197 elt
->is_const
= (CONSTANT_P (x
)
1198 /* GNU C++ takes advantage of this for `this'
1199 (and other const values). */
1200 || (RTX_UNCHANGING_P (x
)
1201 && GET_CODE (x
) == REG
1202 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1203 || FIXED_BASE_PLUS_P (x
));
1206 table
[hash
]->prev_same_hash
= elt
;
1209 /* Put it into the proper value-class. */
1212 classp
= classp
->first_same_value
;
1213 if (CHEAPER (elt
, classp
))
1214 /* Insert at the head of the class */
1216 register struct table_elt
*p
;
1217 elt
->next_same_value
= classp
;
1218 classp
->prev_same_value
= elt
;
1219 elt
->first_same_value
= elt
;
1221 for (p
= classp
; p
; p
= p
->next_same_value
)
1222 p
->first_same_value
= elt
;
1226 /* Insert not at head of the class. */
1227 /* Put it after the last element cheaper than X. */
1228 register struct table_elt
*p
, *next
;
1229 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1231 /* Put it after P and before NEXT. */
1232 elt
->next_same_value
= next
;
1234 next
->prev_same_value
= elt
;
1235 elt
->prev_same_value
= p
;
1236 p
->next_same_value
= elt
;
1237 elt
->first_same_value
= classp
;
1241 elt
->first_same_value
= elt
;
1243 /* If this is a constant being set equivalent to a register or a register
1244 being set equivalent to a constant, note the constant equivalence.
1246 If this is a constant, it cannot be equivalent to a different constant,
1247 and a constant is the only thing that can be cheaper than a register. So
1248 we know the register is the head of the class (before the constant was
1251 If this is a register that is not already known equivalent to a
1252 constant, we must check the entire class.
1254 If this is a register that is already known equivalent to an insn,
1255 update `qty_const_insn' to show that `this_insn' is the latest
1256 insn making that quantity equivalent to the constant. */
1258 if (elt
->is_const
&& classp
&& GET_CODE (classp
->exp
) == REG
)
1260 qty_const
[reg_qty
[REGNO (classp
->exp
)]]
1261 = gen_lowpart_if_possible (qty_mode
[reg_qty
[REGNO (classp
->exp
)]], x
);
1262 qty_const_insn
[reg_qty
[REGNO (classp
->exp
)]] = this_insn
;
1265 else if (GET_CODE (x
) == REG
&& classp
&& ! qty_const
[reg_qty
[REGNO (x
)]])
1267 register struct table_elt
*p
;
1269 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1273 qty_const
[reg_qty
[REGNO (x
)]]
1274 = gen_lowpart_if_possible (GET_MODE (x
), p
->exp
);
1275 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1281 else if (GET_CODE (x
) == REG
&& qty_const
[reg_qty
[REGNO (x
)]]
1282 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]])
1283 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1285 /* If this is a constant with symbolic value,
1286 and it has a term with an explicit integer value,
1287 link it up with related expressions. */
1288 if (GET_CODE (x
) == CONST
)
1290 rtx subexp
= get_related_value (x
);
1292 struct table_elt
*subelt
, *subelt_prev
;
1296 /* Get the integer-free subexpression in the hash table. */
1297 subhash
= safe_hash (subexp
, mode
) % NBUCKETS
;
1298 subelt
= lookup (subexp
, subhash
, mode
);
1300 subelt
= insert (subexp
, 0, subhash
, mode
);
1301 /* Initialize SUBELT's circular chain if it has none. */
1302 if (subelt
->related_value
== 0)
1303 subelt
->related_value
= subelt
;
1304 /* Find the element in the circular chain that precedes SUBELT. */
1305 subelt_prev
= subelt
;
1306 while (subelt_prev
->related_value
!= subelt
)
1307 subelt_prev
= subelt_prev
->related_value
;
1308 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1309 This way the element that follows SUBELT is the oldest one. */
1310 elt
->related_value
= subelt_prev
->related_value
;
1311 subelt_prev
->related_value
= elt
;
1318 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1319 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1320 the two classes equivalent.
1322 CLASS1 will be the surviving class; CLASS2 should not be used after this
1325 Any invalid entries in CLASS2 will not be copied. */
1328 merge_equiv_classes (class1
, class2
)
1329 struct table_elt
*class1
, *class2
;
1331 struct table_elt
*elt
, *next
, *new;
1333 /* Ensure we start with the head of the classes. */
1334 class1
= class1
->first_same_value
;
1335 class2
= class2
->first_same_value
;
1337 /* If they were already equal, forget it. */
1338 if (class1
== class2
)
1341 for (elt
= class2
; elt
; elt
= next
)
1345 enum machine_mode mode
= elt
->mode
;
1347 next
= elt
->next_same_value
;
1349 /* Remove old entry, make a new one in CLASS1's class.
1350 Don't do this for invalid entries as we cannot find their
1351 hash code (it also isn't necessary). */
1352 if (GET_CODE (exp
) == REG
|| exp_equiv_p (exp
, exp
, 1, 0))
1354 hash_arg_in_memory
= 0;
1355 hash_arg_in_struct
= 0;
1356 hash
= HASH (exp
, mode
);
1358 if (GET_CODE (exp
) == REG
)
1359 delete_reg_equiv (REGNO (exp
));
1361 remove_from_table (elt
, hash
);
1363 if (insert_regs (exp
, class1
, 0))
1364 hash
= HASH (exp
, mode
);
1365 new = insert (exp
, class1
, hash
, mode
);
1366 new->in_memory
= hash_arg_in_memory
;
1367 new->in_struct
= hash_arg_in_struct
;
1372 /* Remove from the hash table, or mark as invalid,
1373 all expressions whose values could be altered by storing in X.
1374 X is a register, a subreg, or a memory reference with nonvarying address
1375 (because, when a memory reference with a varying address is stored in,
1376 all memory references are removed by invalidate_memory
1377 so specific invalidation is superfluous).
1379 A nonvarying address may be just a register or just
1380 a symbol reference, or it may be either of those plus
1381 a numeric offset. */
1388 register struct table_elt
*p
;
1390 register int start
, end
;
1392 /* If X is a register, dependencies on its contents
1393 are recorded through the qty number mechanism.
1394 Just change the qty number of the register,
1395 mark it as invalid for expressions that refer to it,
1396 and remove it itself. */
1398 if (GET_CODE (x
) == REG
)
1400 register int regno
= REGNO (x
);
1401 register int hash
= HASH (x
, GET_MODE (x
));
1403 /* Remove REGNO from any quantity list it might be on and indicate
1404 that it's value might have changed. If it is a pseudo, remove its
1405 entry from the hash table.
1407 For a hard register, we do the first two actions above for any
1408 additional hard registers corresponding to X. Then, if any of these
1409 registers are in the table, we must remove any REG entries that
1410 overlap these registers. */
1412 delete_reg_equiv (regno
);
1415 if (regno
>= FIRST_PSEUDO_REGISTER
)
1416 remove_from_table (lookup_for_remove (x
, hash
, GET_MODE (x
)), hash
);
1419 int in_table
= TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1420 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1421 int tregno
, tendregno
;
1422 register struct table_elt
*p
, *next
;
1424 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1426 for (i
= regno
+ 1; i
< endregno
; i
++)
1428 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, i
);
1429 CLEAR_HARD_REG_BIT (hard_regs_in_table
, i
);
1430 delete_reg_equiv (i
);
1435 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1436 for (p
= table
[hash
]; p
; p
= next
)
1438 next
= p
->next_same_hash
;
1440 if (GET_CODE (p
->exp
) != REG
1441 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1444 tregno
= REGNO (p
->exp
);
1446 = tregno
+ HARD_REGNO_NREGS (tregno
, GET_MODE (p
->exp
));
1447 if (tendregno
> regno
&& tregno
< endregno
)
1448 remove_from_table (p
, hash
);
1455 if (GET_CODE (x
) == SUBREG
)
1457 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1459 invalidate (SUBREG_REG (x
));
1463 /* X is not a register; it must be a memory reference with
1464 a nonvarying address. Remove all hash table elements
1465 that refer to overlapping pieces of memory. */
1467 if (GET_CODE (x
) != MEM
)
1472 /* Registers with nonvarying addresses usually have constant equivalents;
1473 but the frame pointer register is also possible. */
1474 if (GET_CODE (base
) == REG
1475 && REGNO_QTY_VALID_P (REGNO (base
))
1476 && qty_mode
[reg_qty
[REGNO (base
)]] == GET_MODE (base
)
1477 && qty_const
[reg_qty
[REGNO (base
)]] != 0)
1478 base
= qty_const
[reg_qty
[REGNO (base
)]];
1479 else if (GET_CODE (base
) == PLUS
1480 && GET_CODE (XEXP (base
, 1)) == CONST_INT
1481 && GET_CODE (XEXP (base
, 0)) == REG
1482 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
1483 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
1484 == GET_MODE (XEXP (base
, 0)))
1485 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]])
1487 start
= INTVAL (XEXP (base
, 1));
1488 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
1491 if (GET_CODE (base
) == CONST
)
1492 base
= XEXP (base
, 0);
1493 if (GET_CODE (base
) == PLUS
1494 && GET_CODE (XEXP (base
, 1)) == CONST_INT
)
1496 start
+= INTVAL (XEXP (base
, 1));
1497 base
= XEXP (base
, 0);
1500 end
= start
+ GET_MODE_SIZE (GET_MODE (x
));
1501 for (i
= 0; i
< NBUCKETS
; i
++)
1503 register struct table_elt
*next
;
1504 for (p
= table
[i
]; p
; p
= next
)
1506 next
= p
->next_same_hash
;
1507 if (refers_to_mem_p (p
->exp
, base
, start
, end
))
1508 remove_from_table (p
, i
);
1513 /* Remove all expressions that refer to register REGNO,
1514 since they are already invalid, and we are about to
1515 mark that register valid again and don't want the old
1516 expressions to reappear as valid. */
1519 remove_invalid_refs (regno
)
1523 register struct table_elt
*p
, *next
;
1525 for (i
= 0; i
< NBUCKETS
; i
++)
1526 for (p
= table
[i
]; p
; p
= next
)
1528 next
= p
->next_same_hash
;
1529 if (GET_CODE (p
->exp
) != REG
1530 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, 0))
1531 remove_from_table (p
, i
);
1535 /* Recompute the hash codes of any valid entries in the hash table that
1536 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1538 This is called when we make a jump equivalence. */
1541 rehash_using_reg (x
)
1545 struct table_elt
*p
, *next
;
1548 if (GET_CODE (x
) == SUBREG
)
1551 /* If X is not a register or if the register is known not to be in any
1552 valid entries in the table, we have no work to do. */
1554 if (GET_CODE (x
) != REG
1555 || reg_in_table
[REGNO (x
)] < 0
1556 || reg_in_table
[REGNO (x
)] != reg_tick
[REGNO (x
)])
1559 /* Scan all hash chains looking for valid entries that mention X.
1560 If we find one and it is in the wrong hash chain, move it. We can skip
1561 objects that are registers, since they are handled specially. */
1563 for (i
= 0; i
< NBUCKETS
; i
++)
1564 for (p
= table
[i
]; p
; p
= next
)
1566 next
= p
->next_same_hash
;
1567 if (GET_CODE (p
->exp
) != REG
&& reg_mentioned_p (x
, p
->exp
)
1568 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
1569 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) % NBUCKETS
))
1571 if (p
->next_same_hash
)
1572 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1574 if (p
->prev_same_hash
)
1575 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1577 table
[i
] = p
->next_same_hash
;
1579 p
->next_same_hash
= table
[hash
];
1580 p
->prev_same_hash
= 0;
1582 table
[hash
]->prev_same_hash
= p
;
1588 /* Remove from the hash table all expressions that reference memory,
1589 or some of them as specified by *WRITES. */
1592 invalidate_memory (writes
)
1593 struct write_data
*writes
;
1596 register struct table_elt
*p
, *next
;
1597 int all
= writes
->all
;
1598 int nonscalar
= writes
->nonscalar
;
1600 for (i
= 0; i
< NBUCKETS
; i
++)
1601 for (p
= table
[i
]; p
; p
= next
)
1603 next
= p
->next_same_hash
;
1606 || (nonscalar
&& p
->in_struct
)
1607 || cse_rtx_addr_varies_p (p
->exp
)))
1608 remove_from_table (p
, i
);
1612 /* Remove from the hash table any expression that is a call-clobbered
1613 register. Also update their TICK values. */
1616 invalidate_for_call ()
1618 int regno
, endregno
;
1621 struct table_elt
*p
, *next
;
1624 /* Go through all the hard registers. For each that is clobbered in
1625 a CALL_INSN, remove the register from quantity chains and update
1626 reg_tick if defined. Also see if any of these registers is currently
1629 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1630 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1632 delete_reg_equiv (regno
);
1633 if (reg_tick
[regno
] >= 0)
1636 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1639 /* In the case where we have no call-clobbered hard registers in the
1640 table, we are done. Otherwise, scan the table and remove any
1641 entry that overlaps a call-clobbered register. */
1644 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1645 for (p
= table
[hash
]; p
; p
= next
)
1647 next
= p
->next_same_hash
;
1649 if (GET_CODE (p
->exp
) != REG
1650 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1653 regno
= REGNO (p
->exp
);
1654 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (p
->exp
));
1656 for (i
= regno
; i
< endregno
; i
++)
1657 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1659 remove_from_table (p
, hash
);
1665 /* Given an expression X of type CONST,
1666 and ELT which is its table entry (or 0 if it
1667 is not in the hash table),
1668 return an alternate expression for X as a register plus integer.
1669 If none can be found, return 0. */
1672 use_related_value (x
, elt
)
1674 struct table_elt
*elt
;
1676 register struct table_elt
*relt
= 0;
1677 register struct table_elt
*p
, *q
;
1680 /* First, is there anything related known?
1681 If we have a table element, we can tell from that.
1682 Otherwise, must look it up. */
1684 if (elt
!= 0 && elt
->related_value
!= 0)
1686 else if (elt
== 0 && GET_CODE (x
) == CONST
)
1688 rtx subexp
= get_related_value (x
);
1690 relt
= lookup (subexp
,
1691 safe_hash (subexp
, GET_MODE (subexp
)) % NBUCKETS
,
1698 /* Search all related table entries for one that has an
1699 equivalent register. */
1704 /* This loop is strange in that it is executed in two different cases.
1705 The first is when X is already in the table. Then it is searching
1706 the RELATED_VALUE list of X's class (RELT). The second case is when
1707 X is not in the table. Then RELT points to a class for the related
1710 Ensure that, whatever case we are in, that we ignore classes that have
1711 the same value as X. */
1713 if (rtx_equal_p (x
, p
->exp
))
1716 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
1717 if (GET_CODE (q
->exp
) == REG
)
1723 p
= p
->related_value
;
1725 /* We went all the way around, so there is nothing to be found.
1726 Alternatively, perhaps RELT was in the table for some other reason
1727 and it has no related values recorded. */
1728 if (p
== relt
|| p
== 0)
1735 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
1736 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1737 return plus_constant (q
->exp
, offset
);
1740 /* Hash an rtx. We are careful to make sure the value is never negative.
1741 Equivalent registers hash identically.
1742 MODE is used in hashing for CONST_INTs only;
1743 otherwise the mode of X is used.
1745 Store 1 in do_not_record if any subexpression is volatile.
1747 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1748 which does not have the RTX_UNCHANGING_P bit set.
1749 In this case, also store 1 in hash_arg_in_struct
1750 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1752 Note that cse_insn knows that the hash code of a MEM expression
1753 is just (int) MEM plus the hash code of the address. */
1756 canon_hash (x
, mode
)
1758 enum machine_mode mode
;
1761 register int hash
= 0;
1762 register enum rtx_code code
;
1765 /* repeat is used to turn tail-recursion into iteration. */
1770 code
= GET_CODE (x
);
1775 register int regno
= REGNO (x
);
1777 /* On some machines, we can't record any non-fixed hard register,
1778 because extending its life will cause reload problems. We
1779 consider ap, fp, and sp to be fixed for this purpose.
1780 On all machines, we can't record any global registers. */
1782 if (regno
< FIRST_PSEUDO_REGISTER
1783 && (global_regs
[regno
]
1784 #ifdef SMALL_REGISTER_CLASSES
1785 || (! fixed_regs
[regno
]
1786 && regno
!= FRAME_POINTER_REGNUM
1787 && regno
!= ARG_POINTER_REGNUM
1788 && regno
!= STACK_POINTER_REGNUM
)
1795 return hash
+ ((int) REG
<< 7) + reg_qty
[regno
];
1799 hash
+= ((int) mode
+ ((int) CONST_INT
<< 7)
1800 + INTVAL (x
) + (INTVAL (x
) >> HASHBITS
));
1801 return ((1 << HASHBITS
) - 1) & hash
;
1804 /* This is like the general case, except that it only counts
1805 the integers representing the constant. */
1806 hash
+= (int) code
+ (int) GET_MODE (x
);
1809 for (i
= 2; i
< GET_RTX_LENGTH (CONST_DOUBLE
); i
++)
1811 int tem
= XINT (x
, i
);
1812 hash
+= ((1 << HASHBITS
) - 1) & (tem
+ (tem
>> HASHBITS
));
1817 /* Assume there is only one rtx object for any given label. */
1819 /* Use `and' to ensure a positive number. */
1820 return (hash
+ ((int) LABEL_REF
<< 7)
1821 + ((int) XEXP (x
, 0) & ((1 << HASHBITS
) - 1)));
1824 return (hash
+ ((int) SYMBOL_REF
<< 7)
1825 + ((int) XEXP (x
, 0) & ((1 << HASHBITS
) - 1)));
1828 if (MEM_VOLATILE_P (x
))
1833 if (! RTX_UNCHANGING_P (x
))
1835 hash_arg_in_memory
= 1;
1836 if (MEM_IN_STRUCT_P (x
)) hash_arg_in_struct
= 1;
1838 /* Now that we have already found this special case,
1839 might as well speed it up as much as possible. */
1851 case UNSPEC_VOLATILE
:
1856 if (MEM_VOLATILE_P (x
))
1863 i
= GET_RTX_LENGTH (code
) - 1;
1864 hash
+= (int) code
+ (int) GET_MODE (x
);
1865 fmt
= GET_RTX_FORMAT (code
);
1870 rtx tem
= XEXP (x
, i
);
1873 /* If the operand is a REG that is equivalent to a constant, hash
1874 as if we were hashing the constant, since we will be comparing
1876 if (tem
!= 0 && GET_CODE (tem
) == REG
1877 && REGNO_QTY_VALID_P (REGNO (tem
))
1878 && qty_mode
[reg_qty
[REGNO (tem
)]] == GET_MODE (tem
)
1879 && (tem1
= qty_const
[reg_qty
[REGNO (tem
)]]) != 0
1880 && CONSTANT_P (tem1
))
1883 /* If we are about to do the last recursive call
1884 needed at this level, change it into iteration.
1885 This function is called enough to be worth it. */
1891 hash
+= canon_hash (tem
, 0);
1893 else if (fmt
[i
] == 'E')
1894 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1895 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
1896 else if (fmt
[i
] == 's')
1898 register char *p
= XSTR (x
, i
);
1902 register int tem
= *p
++;
1903 hash
+= ((1 << HASHBITS
) - 1) & (tem
+ (tem
>> HASHBITS
));
1906 else if (fmt
[i
] == 'i')
1908 register int tem
= XINT (x
, i
);
1909 hash
+= ((1 << HASHBITS
) - 1) & (tem
+ (tem
>> HASHBITS
));
1917 /* Like canon_hash but with no side effects. */
1922 enum machine_mode mode
;
1924 int save_do_not_record
= do_not_record
;
1925 int save_hash_arg_in_memory
= hash_arg_in_memory
;
1926 int save_hash_arg_in_struct
= hash_arg_in_struct
;
1927 int hash
= canon_hash (x
, mode
);
1928 hash_arg_in_memory
= save_hash_arg_in_memory
;
1929 hash_arg_in_struct
= save_hash_arg_in_struct
;
1930 do_not_record
= save_do_not_record
;
1934 /* Return 1 iff X and Y would canonicalize into the same thing,
1935 without actually constructing the canonicalization of either one.
1936 If VALIDATE is nonzero,
1937 we assume X is an expression being processed from the rtl
1938 and Y was found in the hash table. We check register refs
1939 in Y for being marked as valid.
1941 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
1942 that is known to be in the register. Ordinarily, we don't allow them
1943 to match, because letting them match would cause unpredictable results
1944 in all the places that search a hash table chain for an equivalent
1945 for a given value. A possible equivalent that has different structure
1946 has its hash code computed from different data. Whether the hash code
1947 is the same as that of the the given value is pure luck. */
1950 exp_equiv_p (x
, y
, validate
, equal_values
)
1956 register enum rtx_code code
;
1959 /* Note: it is incorrect to assume an expression is equivalent to itself
1960 if VALIDATE is nonzero. */
1961 if (x
== y
&& !validate
)
1963 if (x
== 0 || y
== 0)
1966 code
= GET_CODE (x
);
1967 if (code
!= GET_CODE (y
))
1972 /* If X is a constant and Y is a register or vice versa, they may be
1973 equivalent. We only have to validate if Y is a register. */
1974 if (CONSTANT_P (x
) && GET_CODE (y
) == REG
1975 && REGNO_QTY_VALID_P (REGNO (y
))
1976 && GET_MODE (y
) == qty_mode
[reg_qty
[REGNO (y
)]]
1977 && rtx_equal_p (x
, qty_const
[reg_qty
[REGNO (y
)]])
1978 && (! validate
|| reg_in_table
[REGNO (y
)] == reg_tick
[REGNO (y
)]))
1981 if (CONSTANT_P (y
) && code
== REG
1982 && REGNO_QTY_VALID_P (REGNO (x
))
1983 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
1984 && rtx_equal_p (y
, qty_const
[reg_qty
[REGNO (x
)]]))
1990 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1991 if (GET_MODE (x
) != GET_MODE (y
))
2001 return XINT (x
, 0) == XINT (y
, 0);
2005 return XEXP (x
, 0) == XEXP (y
, 0);
2009 int regno
= REGNO (y
);
2011 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2012 : HARD_REGNO_NREGS (regno
, GET_MODE (y
)));
2015 /* If the quantities are not the same, the expressions are not
2016 equivalent. If there are and we are not to validate, they
2017 are equivalent. Otherwise, ensure all regs are up-to-date. */
2019 if (reg_qty
[REGNO (x
)] != reg_qty
[regno
])
2025 for (i
= regno
; i
< endregno
; i
++)
2026 if (reg_in_table
[i
] != reg_tick
[i
])
2032 /* For commutative operations, check both orders. */
2040 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2041 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2042 validate
, equal_values
))
2043 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2044 validate
, equal_values
)
2045 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2046 validate
, equal_values
)));
2049 /* Compare the elements. If any pair of corresponding elements
2050 fail to match, return 0 for the whole things. */
2052 fmt
= GET_RTX_FORMAT (code
);
2053 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2057 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2060 else if (fmt
[i
] == 'E')
2063 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2065 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2066 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2067 validate
, equal_values
))
2070 else if (fmt
[i
] == 's')
2072 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2075 else if (fmt
[i
] == 'i')
2077 if (XINT (x
, i
) != XINT (y
, i
))
2080 else if (fmt
[i
] != '0')
2086 /* Return 1 iff any subexpression of X matches Y.
2087 Here we do not require that X or Y be valid (for registers referred to)
2088 for being in the hash table. */
2095 register enum rtx_code code
;
2101 if (x
== 0 || y
== 0)
2104 code
= GET_CODE (x
);
2105 /* If X as a whole has the same code as Y, they may match.
2107 if (code
== GET_CODE (y
))
2109 if (exp_equiv_p (x
, y
, 0, 1))
2113 /* X does not match, so try its subexpressions. */
2115 fmt
= GET_RTX_FORMAT (code
);
2116 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2125 if (refers_to_p (XEXP (x
, i
), y
))
2128 else if (fmt
[i
] == 'E')
2131 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2132 if (refers_to_p (XVECEXP (x
, i
, j
), y
))
2139 /* Return 1 iff any subexpression of X refers to memory
2140 at an address of BASE plus some offset
2141 such that any of the bytes' offsets fall between START (inclusive)
2142 and END (exclusive).
2144 The value is undefined if X is a varying address.
2145 This function is not used in such cases.
2147 When used in the cse pass, `qty_const' is nonzero, and it is used
2148 to treat an address that is a register with a known constant value
2149 as if it were that constant value.
2150 In the loop pass, `qty_const' is zero, so this is not done. */
2153 refers_to_mem_p (x
, base
, start
, end
)
2158 register enum rtx_code code
;
2161 if (GET_CODE (base
) == CONST_INT
)
2163 start
+= INTVAL (base
);
2164 end
+= INTVAL (base
);
2172 code
= GET_CODE (x
);
2175 register rtx addr
= XEXP (x
, 0); /* Get the address. */
2179 if (GET_CODE (addr
) == REG
2180 /* qty_const is 0 when outside the cse pass;
2181 at such times, this info is not available. */
2183 && REGNO_QTY_VALID_P (REGNO (addr
))
2184 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
2185 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
2186 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
2187 else if (GET_CODE (addr
) == PLUS
2188 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2189 && GET_CODE (XEXP (addr
, 0)) == REG
2191 && REGNO_QTY_VALID_P (REGNO (XEXP (addr
, 0)))
2192 && (GET_MODE (XEXP (addr
, 0))
2193 == qty_mode
[reg_qty
[REGNO (XEXP (addr
, 0))]])
2194 && qty_const
[reg_qty
[REGNO (XEXP (addr
, 0))]])
2196 i
= INTVAL (XEXP (addr
, 1));
2197 addr
= qty_const
[reg_qty
[REGNO (XEXP (addr
, 0))]];
2201 if (GET_CODE (addr
) == CONST
)
2202 addr
= XEXP (addr
, 0);
2204 /* If ADDR is BASE, or BASE plus an integer, put
2205 the integer in I. */
2206 if (GET_CODE (addr
) == PLUS
2207 && XEXP (addr
, 0) == base
2208 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
)
2209 i
+= INTVAL (XEXP (addr
, 1));
2210 else if (GET_CODE (addr
) == LO_SUM
)
2212 if (GET_CODE (base
) != LO_SUM
)
2214 /* The REG component of the LO_SUM is known by the
2215 const value in the XEXP part. */
2216 addr
= XEXP (addr
, 1);
2217 base
= XEXP (base
, 1);
2219 if (GET_CODE (base
) == CONST
)
2220 base
= XEXP (base
, 0);
2221 if (GET_CODE (base
) == PLUS
2222 && GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2224 int tem
= INTVAL (XEXP (base
, 1));
2227 base
= XEXP (base
, 0);
2231 else if (GET_CODE (base
) == LO_SUM
)
2233 base
= XEXP (base
, 1);
2234 if (GET_CODE (base
) == CONST
)
2235 base
= XEXP (base
, 0);
2236 if (GET_CODE (base
) == PLUS
2237 && GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2239 int tem
= INTVAL (XEXP (base
, 1));
2242 base
= XEXP (base
, 0);
2246 else if (GET_CODE (addr
) == CONST_INT
&& base
== const0_rtx
)
2248 else if (addr
!= base
)
2251 myend
= i
+ GET_MODE_SIZE (GET_MODE (x
));
2252 return myend
> start
&& i
< end
;
2255 /* X does not match, so try its subexpressions. */
2257 fmt
= GET_RTX_FORMAT (code
);
2258 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2267 if (refers_to_mem_p (XEXP (x
, i
), base
, start
, end
))
2270 else if (fmt
[i
] == 'E')
2273 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2274 if (refers_to_mem_p (XVECEXP (x
, i
, j
), base
, start
, end
))
2281 /* Nonzero if X refers to memory at a varying address;
2282 except that a register which has at the moment a known constant value
2283 isn't considered variable. */
2286 cse_rtx_addr_varies_p (x
)
2289 /* We need not check for X and the equivalence class being of the same
2290 mode because if X is equivalent to a constant in some mode, it
2291 doesn't vary in any mode. */
2293 if (GET_CODE (x
) == MEM
2294 && GET_CODE (XEXP (x
, 0)) == REG
2295 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2296 && GET_MODE (XEXP (x
, 0)) == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]]
2297 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]] != 0)
2300 if (GET_CODE (x
) == MEM
2301 && GET_CODE (XEXP (x
, 0)) == PLUS
2302 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
2303 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == REG
2304 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x
, 0), 0)))
2305 && (GET_MODE (XEXP (XEXP (x
, 0), 0))
2306 == qty_mode
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2307 && qty_const
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2310 return rtx_addr_varies_p (x
);
2313 /* Canonicalize an expression:
2314 replace each register reference inside it
2315 with the "oldest" equivalent register.
2317 If INSN is non-zero and we are replacing a pseudo with a hard register
2318 or vice versa, verify that INSN remains valid after we make our
2327 register enum rtx_code code
;
2333 code
= GET_CODE (x
);
2351 /* Never replace a hard reg, because hard regs can appear
2352 in more than one machine mode, and we must preserve the mode
2353 of each occurrence. Also, some hard regs appear in
2354 MEMs that are shared and mustn't be altered. Don't try to
2355 replace any reg that maps to a reg of class NO_REGS. */
2356 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2357 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2360 first
= qty_first_reg
[reg_qty
[REGNO (x
)]];
2361 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2362 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2363 : gen_rtx (REG
, qty_mode
[reg_qty
[REGNO (x
)]], first
));
2367 fmt
= GET_RTX_FORMAT (code
);
2368 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2374 rtx
new = canon_reg (XEXP (x
, i
), insn
);
2376 /* If replacing pseudo with hard reg or vice versa, ensure the
2377 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2378 if (new && GET_CODE (new) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
2379 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2380 != (REGNO (XEXP (x
, i
)) < FIRST_PSEUDO_REGISTER
))
2381 || (insn
!= 0 && insn_n_dups
[recog_memoized (insn
)] > 0)))
2382 validate_change (insn
, &XEXP (x
, i
), new, 1);
2386 else if (fmt
[i
] == 'E')
2387 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2388 XVECEXP (x
, i
, j
) = canon_reg (XVECEXP (x
, i
, j
), insn
);
2394 /* LOC is a location with INSN that is an operand address (the contents of
2395 a MEM). Find the best equivalent address to use that is valid for this
2398 On most CISC machines, complicated address modes are costly, and rtx_cost
2399 is a good approximation for that cost. However, most RISC machines have
2400 only a few (usually only one) memory reference formats. If an address is
2401 valid at all, it is often just as cheap as any other address. Hence, for
2402 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2403 costs of various addresses. For two addresses of equal cost, choose the one
2404 with the highest `rtx_cost' value as that has the potential of eliminating
2405 the most insns. For equal costs, we choose the first in the equivalence
2406 class. Note that we ignore the fact that pseudo registers are cheaper
2407 than hard registers here because we would also prefer the pseudo registers.
2411 find_best_addr (insn
, loc
)
2415 struct table_elt
*elt
, *p
;
2418 int found_better
= 1;
2419 int save_do_not_record
= do_not_record
;
2420 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2421 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2426 /* Do not try to replace constant addresses or addresses of local and
2427 argument slots. These MEM expressions are made only once and inserted
2428 in many instructions, as well as being used to control symbol table
2429 output. It is not safe to clobber them.
2431 There are some uncommon cases where the address is already in a register
2432 for some reason, but we cannot take advantage of that because we have
2433 no easy way to unshare the MEM. In addition, looking up all stack
2434 addresses is costly. */
2435 if ((GET_CODE (addr
) == PLUS
2436 && GET_CODE (XEXP (addr
, 0)) == REG
2437 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2438 && (regno
= REGNO (XEXP (addr
, 0)),
2439 regno
== FRAME_POINTER_REGNUM
|| regno
== ARG_POINTER_REGNUM
))
2440 || (GET_CODE (addr
) == REG
2441 && (regno
= REGNO (addr
),
2442 regno
== FRAME_POINTER_REGNUM
|| regno
== ARG_POINTER_REGNUM
))
2443 || CONSTANT_ADDRESS_P (addr
))
2446 /* If this address is not simply a register, try to fold it. This will
2447 sometimes simplify the expression. Many simplifications
2448 will not be valid, but some, usually applying the associative rule, will
2449 be valid and produce better code. */
2450 if (GET_CODE (addr
) != REG
2451 && validate_change (insn
, loc
, fold_rtx (addr
, insn
), 0))
2454 /* If this address is not in the hash table, we can't look for equivalences
2455 of the whole address. Also, ignore if volatile. */
2458 hash_code
= HASH (addr
, Pmode
);
2459 addr_volatile
= do_not_record
;
2460 do_not_record
= save_do_not_record
;
2461 hash_arg_in_memory
= save_hash_arg_in_memory
;
2462 hash_arg_in_struct
= save_hash_arg_in_struct
;
2467 elt
= lookup (addr
, hash_code
, Pmode
);
2469 #ifndef ADDRESS_COST
2472 our_cost
= elt
->cost
;
2474 /* Find the lowest cost below ours that works. */
2475 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
2476 if (elt
->cost
< our_cost
2477 && (GET_CODE (elt
->exp
) == REG
2478 || exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
2479 && validate_change (insn
, loc
,
2480 canon_reg (copy_rtx (elt
->exp
), 0), 0))
2487 /* We need to find the best (under the criteria documented above) entry
2488 in the class that is valid. We use the `flag' field to indicate
2489 choices that were invalid and iterate until we can't find a better
2490 one that hasn't already been tried. */
2492 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2495 while (found_better
)
2497 int best_addr_cost
= ADDRESS_COST (*loc
);
2498 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2499 struct table_elt
*best_elt
= elt
;
2502 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2504 && (GET_CODE (p
->exp
) == REG
2505 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2506 && (ADDRESS_COST (p
->exp
) < best_addr_cost
2507 || (ADDRESS_COST (p
->exp
) == best_addr_cost
2508 && (p
->cost
+ 1) >> 1 > best_rtx_cost
)))
2511 best_addr_cost
= ADDRESS_COST (p
->exp
);
2512 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2518 if (validate_change (insn
, loc
,
2519 canon_reg (copy_rtx (best_elt
->exp
), 0), 0))
2527 /* If the address is a binary operation with the first operand a register
2528 and the second a constant, do the same as above, but looking for
2529 equivalences of the register. Then try to simplify before checking for
2530 the best address to use. This catches a few cases: First is when we
2531 have REG+const and the register is another REG+const. We can often merge
2532 the constants and eliminate one insn and one register. It may also be
2533 that a machine has a cheap REG+REG+const. Finally, this improves the
2534 code on the Alpha for unaligned byte stores. */
2536 if (flag_expensive_optimizations
2537 && (GET_RTX_CLASS (GET_CODE (*loc
)) == '2'
2538 || GET_RTX_CLASS (GET_CODE (*loc
)) == 'c')
2539 && GET_CODE (XEXP (*loc
, 0)) == REG
2540 && GET_CODE (XEXP (*loc
, 1)) == CONST_INT
)
2542 rtx c
= XEXP (*loc
, 1);
2545 hash_code
= HASH (XEXP (*loc
, 0), Pmode
);
2546 do_not_record
= save_do_not_record
;
2547 hash_arg_in_memory
= save_hash_arg_in_memory
;
2548 hash_arg_in_struct
= save_hash_arg_in_struct
;
2550 elt
= lookup (XEXP (*loc
, 0), hash_code
, Pmode
);
2554 /* We need to find the best (under the criteria documented above) entry
2555 in the class that is valid. We use the `flag' field to indicate
2556 choices that were invalid and iterate until we can't find a better
2557 one that hasn't already been tried. */
2559 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2562 while (found_better
)
2564 int best_addr_cost
= ADDRESS_COST (*loc
);
2565 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2566 struct table_elt
*best_elt
= elt
;
2567 rtx best_rtx
= *loc
;
2570 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2572 && (GET_CODE (p
->exp
) == REG
2573 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0)))
2575 rtx
new = simplify_binary_operation (GET_CODE (*loc
), Pmode
,
2579 new = gen_rtx (GET_CODE (*loc
), Pmode
, p
->exp
, c
);
2581 if ((ADDRESS_COST (new) < best_addr_cost
2582 || (ADDRESS_COST (new) == best_addr_cost
2583 && (COST (new) + 1) >> 1 > best_rtx_cost
)))
2586 best_addr_cost
= ADDRESS_COST (new);
2587 best_rtx_cost
= (COST (new) + 1) >> 1;
2595 if (validate_change (insn
, loc
,
2596 canon_reg (copy_rtx (best_rtx
), 0), 0))
2606 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2607 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2608 what values are being compared.
2610 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2611 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2612 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2613 compared to produce cc0.
2615 The return value is the comparison operator and is either the code of
2616 A or the code corresponding to the inverse of the comparison. */
2618 static enum rtx_code
2619 find_comparison_args (code
, parg1
, parg2
)
2625 arg1
= *parg1
, arg2
= *parg2
;
2627 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2629 while (arg2
== const0_rtx
)
2631 /* Set non-zero when we find something of interest. */
2633 int reverse_code
= 0;
2634 struct table_elt
*p
= 0;
2636 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2637 On machines with CC0, this is the only case that can occur, since
2638 fold_rtx will return the COMPARE or item being compared with zero
2641 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2644 /* If ARG1 is a comparison operator and CODE is testing for
2645 STORE_FLAG_VALUE, get the inner arguments. */
2647 else if (GET_RTX_CLASS (GET_CODE (arg1
)) == '<')
2650 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2651 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2652 #ifdef FLOAT_STORE_FLAG_VALUE
2653 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2654 && FLOAT_STORE_FLAG_VALUE
< 0)
2659 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2660 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2661 #ifdef FLOAT_STORE_FLAG_VALUE
2662 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2663 && FLOAT_STORE_FLAG_VALUE
< 0)
2666 x
= arg1
, reverse_code
= 1;
2669 /* ??? We could also check for
2671 (ne (and (eq (...) (const_int 1))) (const_int 0))
2673 and related forms, but let's wait until we see them occurring. */
2676 /* Look up ARG1 in the hash table and see if it has an equivalence
2677 that lets us see what is being compared. */
2678 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) % NBUCKETS
,
2680 if (p
) p
= p
->first_same_value
;
2682 for (; p
; p
= p
->next_same_value
)
2684 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2686 /* If the entry isn't valid, skip it. */
2687 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2690 if (GET_CODE (p
->exp
) == COMPARE
2691 /* Another possibility is that this machine has a compare insn
2692 that includes the comparison code. In that case, ARG1 would
2693 be equivalent to a comparison operation that would set ARG1 to
2694 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2695 ORIG_CODE is the actual comparison being done; if it is an EQ,
2696 we must reverse ORIG_CODE. On machine with a negative value
2697 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2700 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2701 && GET_MODE_BITSIZE (inner_mode
) <= HOST_BITS_PER_INT
2702 && (STORE_FLAG_VALUE
2703 & (1 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2704 #ifdef FLOAT_STORE_FLAG_VALUE
2706 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2707 && FLOAT_STORE_FLAG_VALUE
< 0)
2710 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<'))
2715 else if ((code
== EQ
2717 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2718 && GET_MODE_BITSIZE (inner_mode
) <= HOST_BITS_PER_INT
2719 && (STORE_FLAG_VALUE
2720 & (1 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2721 #ifdef FLOAT_STORE_FLAG_VALUE
2723 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2724 && FLOAT_STORE_FLAG_VALUE
< 0)
2727 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<')
2734 /* If this is fp + constant, the equivalent is a better operand since
2735 it may let us predict the value of the comparison. */
2736 else if (NONZERO_BASE_PLUS_P (p
->exp
))
2743 /* If we didn't find a useful equivalence for ARG1, we are done.
2744 Otherwise, set up for the next iteration. */
2748 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
2749 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
2750 code
= GET_CODE (x
);
2753 code
= reverse_condition (code
);
2756 /* Return our results. */
2757 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
2762 /* Try to simplify a unary operation CODE whose output mode is to be
2763 MODE with input operand OP whose mode was originally OP_MODE.
2764 Return zero if no simplification can be made. */
2767 simplify_unary_operation (code
, mode
, op
, op_mode
)
2769 enum machine_mode mode
;
2771 enum machine_mode op_mode
;
2773 register int width
= GET_MODE_BITSIZE (mode
);
2775 /* The order of these tests is critical so that, for example, we don't
2776 check the wrong mode (input vs. output) for a conversion operation,
2777 such as FIX. At some point, this should be simplified. */
2779 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
2780 if (code
== FLOAT
&& GET_CODE (op
) == CONST_INT
)
2784 #ifdef REAL_ARITHMETIC
2785 REAL_VALUE_FROM_INT (d
, INTVAL (op
), INTVAL (op
) < 0 ? ~0 : 0);
2787 d
= (double) INTVAL (op
);
2789 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2791 else if (code
== UNSIGNED_FLOAT
&& GET_CODE (op
) == CONST_INT
)
2795 #ifdef REAL_ARITHMETIC
2796 REAL_VALUE_FROM_INT (d
, INTVAL (op
), 0);
2798 d
= (double) (unsigned int) INTVAL (op
);
2800 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2803 else if (code
== FLOAT
&& GET_CODE (op
) == CONST_DOUBLE
2804 && GET_MODE (op
) == VOIDmode
)
2808 #ifdef REAL_ARITHMETIC
2809 REAL_VALUE_FROM_INT (d
, CONST_DOUBLE_LOW (op
), CONST_DOUBLE_HIGH (op
));
2811 if (CONST_DOUBLE_HIGH (op
) < 0)
2813 d
= (double) (~ CONST_DOUBLE_HIGH (op
));
2814 d
*= ((double) (1 << (HOST_BITS_PER_INT
/ 2))
2815 * (double) (1 << (HOST_BITS_PER_INT
/ 2)));
2816 d
+= (double) (unsigned) (~ CONST_DOUBLE_LOW (op
));
2821 d
= (double) CONST_DOUBLE_HIGH (op
);
2822 d
*= ((double) (1 << (HOST_BITS_PER_INT
/ 2))
2823 * (double) (1 << (HOST_BITS_PER_INT
/ 2)));
2824 d
+= (double) (unsigned) CONST_DOUBLE_LOW (op
);
2826 #endif /* REAL_ARITHMETIC */
2827 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2829 else if (code
== UNSIGNED_FLOAT
&& GET_CODE (op
) == CONST_DOUBLE
2830 && GET_MODE (op
) == VOIDmode
)
2834 #ifdef REAL_ARITHMETIC
2835 REAL_VALUE_FROM_UNSIGNED_INT (d
, CONST_DOUBLE_LOW (op
),
2836 CONST_DOUBLE_HIGH (op
));
2838 d
= (double) CONST_DOUBLE_HIGH (op
);
2839 d
*= ((double) (1 << (HOST_BITS_PER_INT
/ 2))
2840 * (double) (1 << (HOST_BITS_PER_INT
/ 2)));
2841 d
+= (double) (unsigned) CONST_DOUBLE_LOW (op
);
2842 #endif /* REAL_ARITHMETIC */
2843 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2847 else if (GET_CODE (op
) == CONST_INT
2848 && width
<= HOST_BITS_PER_INT
&& width
> 0)
2850 register int arg0
= INTVAL (op
);
2864 val
= (arg0
>= 0 ? arg0
: - arg0
);
2868 /* Don't use ffs here. Instead, get low order bit and then its
2869 number. If arg0 is zero, this will return 0, as desired. */
2870 arg0
&= GET_MODE_MASK (mode
);
2871 val
= exact_log2 (arg0
& (- arg0
)) + 1;
2879 if (op_mode
== VOIDmode
)
2881 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_INT
)
2883 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_INT
)
2884 val
= arg0
& ~((-1) << GET_MODE_BITSIZE (op_mode
));
2890 if (op_mode
== VOIDmode
)
2892 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_INT
)
2894 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_INT
)
2896 val
= arg0
& ~((-1) << GET_MODE_BITSIZE (op_mode
));
2897 if (val
& (1 << (GET_MODE_BITSIZE (op_mode
) - 1)))
2898 val
-= 1 << GET_MODE_BITSIZE (op_mode
);
2911 /* Clear the bits that don't belong in our mode,
2912 unless they and our sign bit are all one.
2913 So we get either a reasonable negative value or a reasonable
2914 unsigned value for this mode. */
2915 if (width
< HOST_BITS_PER_INT
2916 && ((val
& ((-1) << (width
- 1))) != ((-1) << (width
- 1))))
2917 val
&= (1 << width
) - 1;
2919 return gen_rtx (CONST_INT
, VOIDmode
, val
);
2922 /* We can do some operations on integer CONST_DOUBLEs. Also allow
2923 for a DImode operation on a CONST_INT. */
2924 else if (GET_MODE (op
) == VOIDmode
2925 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
2929 if (GET_CODE (op
) == CONST_DOUBLE
)
2930 l1
= CONST_DOUBLE_LOW (op
), h1
= CONST_DOUBLE_HIGH (op
);
2932 l1
= INTVAL (op
), h1
= l1
< 0 ? -1 : 0;
2942 neg_double (l1
, h1
, &lv
, &hv
);
2947 neg_double (l1
, h1
, &lv
, &hv
);
2955 lv
= HOST_BITS_PER_INT
+ exact_log2 (h1
& (-h1
)) + 1;
2957 lv
= exact_log2 (l1
& (-l1
)) + 1;
2961 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_INT
)
2962 return gen_rtx (CONST_INT
, VOIDmode
, l1
& GET_MODE_MASK (mode
));
2968 if (op_mode
== VOIDmode
2969 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_INT
)
2973 lv
= l1
& GET_MODE_MASK (op_mode
);
2977 if (op_mode
== VOIDmode
2978 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_INT
)
2982 lv
= l1
& GET_MODE_MASK (op_mode
);
2983 if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_INT
2984 && (lv
& (1 << (GET_MODE_BITSIZE (op_mode
) - 1))) != 0)
2985 lv
-= 1 << GET_MODE_BITSIZE (op_mode
);
2987 hv
= (lv
< 0) ? ~0 : 0;
2998 return immed_double_const (lv
, hv
, mode
);
3001 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3002 else if (GET_CODE (op
) == CONST_DOUBLE
3003 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3009 if (setjmp (handler
))
3010 /* There used to be a warning here, but that is inadvisable.
3011 People may want to cause traps, and the natural way
3012 to do it should not get a warning. */
3015 set_float_handler (handler
);
3017 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3022 d
= REAL_VALUE_NEGATE (d
);
3026 if (REAL_VALUE_NEGATIVE (d
))
3027 d
= REAL_VALUE_NEGATE (d
);
3030 case FLOAT_TRUNCATE
:
3031 d
= (double) real_value_truncate (mode
, d
);
3035 /* All this does is change the mode. */
3039 d
= (double) REAL_VALUE_FIX_TRUNCATE (d
);
3043 d
= (double) REAL_VALUE_UNSIGNED_FIX_TRUNCATE (d
);
3053 x
= immed_real_const_1 (d
, mode
);
3054 set_float_handler (0);
3057 else if (GET_CODE (op
) == CONST_DOUBLE
&& GET_MODE_CLASS (mode
) == MODE_INT
3058 && width
<= HOST_BITS_PER_INT
&& width
> 0)
3065 if (setjmp (handler
))
3068 set_float_handler (handler
);
3070 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3075 val
= REAL_VALUE_FIX (d
);
3079 val
= REAL_VALUE_UNSIGNED_FIX (d
);
3086 set_float_handler (0);
3088 /* Clear the bits that don't belong in our mode,
3089 unless they and our sign bit are all one.
3090 So we get either a reasonable negative value or a reasonable
3091 unsigned value for this mode. */
3092 if (width
< HOST_BITS_PER_INT
3093 && ((val
& ((-1) << (width
- 1))) != ((-1) << (width
- 1))))
3094 val
&= (1 << width
) - 1;
3096 return gen_rtx (CONST_INT
, VOIDmode
, val
);
3099 /* This was formerly used only for non-IEEE float.
3100 eggert@twinsun.com says it is safe for IEEE also. */
3103 /* There are some simplifications we can do even if the operands
3109 /* (not (not X)) == X, similarly for NEG. */
3110 if (GET_CODE (op
) == code
)
3111 return XEXP (op
, 0);
3115 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3116 becomes just the MINUS if its mode is MODE. This allows
3117 folding switch statements on machines using casesi (such as
3119 if (GET_CODE (op
) == TRUNCATE
3120 && GET_MODE (XEXP (op
, 0)) == mode
3121 && GET_CODE (XEXP (op
, 0)) == MINUS
3122 && GET_CODE (XEXP (XEXP (op
, 0), 0)) == LABEL_REF
3123 && GET_CODE (XEXP (XEXP (op
, 0), 1)) == LABEL_REF
)
3124 return XEXP (op
, 0);
3132 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3133 and OP1. Return 0 if no simplification is possible.
3135 Don't use this for relational operations such as EQ or LT.
3136 Use simplify_relational_operation instead. */
3139 simplify_binary_operation (code
, mode
, op0
, op1
)
3141 enum machine_mode mode
;
3144 register int arg0
, arg1
, arg0s
, arg1s
;
3146 int width
= GET_MODE_BITSIZE (mode
);
3148 /* Relational operations don't work here. We must know the mode
3149 of the operands in order to do the comparison correctly.
3150 Assuming a full word can give incorrect results.
3151 Consider comparing 128 with -128 in QImode. */
3153 if (GET_RTX_CLASS (code
) == '<')
3156 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3157 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
3158 && GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
3159 && mode
== GET_MODE (op0
) && mode
== GET_MODE (op1
))
3161 REAL_VALUE_TYPE f0
, f1
, value
;
3164 if (setjmp (handler
))
3167 set_float_handler (handler
);
3169 REAL_VALUE_FROM_CONST_DOUBLE (f0
, op0
);
3170 REAL_VALUE_FROM_CONST_DOUBLE (f1
, op1
);
3171 f0
= real_value_truncate (mode
, f0
);
3172 f1
= real_value_truncate (mode
, f1
);
3174 #ifdef REAL_ARITHMETIC
3175 REAL_ARITHMETIC (value
, code
, f0
, f1
);
3189 #ifndef REAL_INFINITY
3196 value
= MIN (f0
, f1
);
3199 value
= MAX (f0
, f1
);
3206 set_float_handler (0);
3207 value
= real_value_truncate (mode
, value
);
3208 return immed_real_const_1 (value
, mode
);
3211 /* We can fold some multi-word operations. */
3212 else if (GET_MODE_CLASS (mode
) == MODE_INT
3213 && GET_CODE (op0
) == CONST_DOUBLE
3214 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
3216 int l1
, l2
, h1
, h2
, lv
, hv
;
3218 l1
= CONST_DOUBLE_LOW (op0
), h1
= CONST_DOUBLE_HIGH (op0
);
3220 if (GET_CODE (op1
) == CONST_DOUBLE
)
3221 l2
= CONST_DOUBLE_LOW (op1
), h2
= CONST_DOUBLE_HIGH (op1
);
3223 l2
= INTVAL (op1
), h2
= l2
< 0 ? -1 : 0;
3228 /* A - B == A + (-B). */
3229 neg_double (l2
, h2
, &lv
, &hv
);
3232 /* .. fall through ... */
3235 add_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3239 mul_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3242 case DIV
: case MOD
: case UDIV
: case UMOD
:
3243 /* We'd need to include tree.h to do this and it doesn't seem worth
3248 lv
= l1
& l2
, hv
= h1
& h2
;
3252 lv
= l1
| l2
, hv
= h1
| h2
;
3256 lv
= l1
^ l2
, hv
= h1
^ h2
;
3260 if (h1
< h2
|| (h1
== h2
&& (unsigned) l1
< (unsigned) l2
))
3267 if (h1
> h2
|| (h1
== h2
&& (unsigned) l1
> (unsigned) l2
))
3274 if ((unsigned) h1
< (unsigned) h2
3275 || (h1
== h2
&& (unsigned) l1
< (unsigned) l2
))
3282 if ((unsigned) h1
> (unsigned) h2
3283 || (h1
== h2
&& (unsigned) l1
> (unsigned) l2
))
3289 case LSHIFTRT
: case ASHIFTRT
:
3290 case ASHIFT
: case LSHIFT
:
3291 case ROTATE
: case ROTATERT
:
3292 #ifdef SHIFT_COUNT_TRUNCATED
3293 l2
&= (GET_MODE_BITSIZE (mode
) - 1), h2
= 0;
3296 if (h2
!= 0 || l2
< 0 || l2
>= GET_MODE_BITSIZE (mode
))
3299 if (code
== LSHIFTRT
|| code
== ASHIFTRT
)
3300 rshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3302 else if (code
== ASHIFT
|| code
== LSHIFT
)
3303 lshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3305 else if (code
== ROTATE
)
3306 lrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3307 else /* code == ROTATERT */
3308 rrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3315 return immed_double_const (lv
, hv
, mode
);
3317 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3319 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3320 || width
> HOST_BITS_PER_INT
|| width
== 0)
3322 /* Even if we can't compute a constant result,
3323 there are some cases worth simplifying. */
3328 /* In IEEE floating point, x+0 is not the same as x. Similarly
3329 for the other optimizations below. */
3330 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3331 && GET_MODE_CLASS (mode
) != MODE_INT
)
3334 if (op1
== CONST0_RTX (mode
))
3337 /* Strip off any surrounding CONSTs. They don't matter in any of
3339 if (GET_CODE (op0
) == CONST
)
3340 op0
= XEXP (op0
, 0);
3341 if (GET_CODE (op1
) == CONST
)
3342 op1
= XEXP (op1
, 0);
3344 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3345 if (GET_CODE (op0
) == NEG
)
3347 rtx tem
= simplify_binary_operation (MINUS
, mode
,
3348 op1
, XEXP (op0
, 0));
3349 return tem
? tem
: gen_rtx (MINUS
, mode
, op1
, XEXP (op0
, 0));
3351 else if (GET_CODE (op1
) == NEG
)
3353 rtx tem
= simplify_binary_operation (MINUS
, mode
,
3354 op0
, XEXP (op1
, 0));
3355 return tem
? tem
: gen_rtx (MINUS
, mode
, op0
, XEXP (op1
, 0));
3358 /* Don't use the associative law for floating point.
3359 The inaccuracy makes it nonassociative,
3360 and subtle programs can break if operations are associated. */
3361 if (GET_MODE_CLASS (mode
) != MODE_INT
)
3364 /* (a - b) + b -> a, similarly a + (b - a) -> a */
3365 if (GET_CODE (op0
) == MINUS
3366 && rtx_equal_p (XEXP (op0
, 1), op1
) && ! side_effects_p (op1
))
3367 return XEXP (op0
, 0);
3369 if (GET_CODE (op1
) == MINUS
3370 && rtx_equal_p (XEXP (op1
, 1), op0
) && ! side_effects_p (op0
))
3371 return XEXP (op1
, 0);
3373 /* (c1 - a) + c2 becomes (c1 + c2) - a. */
3374 if (GET_CODE (op1
) == CONST_INT
&& GET_CODE (op0
) == MINUS
3375 && GET_CODE (XEXP (op0
, 0)) == CONST_INT
)
3377 rtx tem
= simplify_binary_operation (PLUS
, mode
, op1
,
3380 return tem
? gen_rtx (MINUS
, mode
, tem
, XEXP (op0
, 1)) : 0;
3383 /* Handle both-operands-constant cases. */
3384 if (CONSTANT_P (op0
) && CONSTANT_P (op1
)
3385 && GET_CODE (op0
) != CONST_DOUBLE
3386 && GET_CODE (op1
) != CONST_DOUBLE
3387 && GET_MODE_CLASS (mode
) == MODE_INT
)
3389 if (GET_CODE (op1
) == CONST_INT
)
3390 return plus_constant (op0
, INTVAL (op1
));
3391 else if (GET_CODE (op0
) == CONST_INT
)
3392 return plus_constant (op1
, INTVAL (op0
));
3394 return gen_rtx (CONST
, mode
,
3395 gen_rtx (PLUS
, mode
,
3396 GET_CODE (op0
) == CONST
3397 ? XEXP (op0
, 0) : op0
,
3398 GET_CODE (op1
) == CONST
3399 ? XEXP (op1
, 0) : op1
));
3401 else if (GET_CODE (op1
) == CONST_INT
3402 && GET_CODE (op0
) == PLUS
3403 && (CONSTANT_P (XEXP (op0
, 0))
3404 || CONSTANT_P (XEXP (op0
, 1))))
3405 /* constant + (variable + constant)
3406 can result if an index register is made constant.
3407 We simplify this by adding the constants.
3408 If we did not, it would become an invalid address. */
3409 return plus_constant (op0
, INTVAL (op1
));
3414 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3415 using cc0, in which case we want to leave it as a COMPARE
3416 so we can distinguish it from a register-register-copy.
3418 In IEEE floating point, x-0 is not the same as x. */
3420 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3421 || GET_MODE_CLASS (mode
) == MODE_INT
)
3422 && op1
== CONST0_RTX (mode
))
3425 /* Do nothing here. */
3430 /* None of these optimizations can be done for IEEE
3432 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3433 && GET_MODE_CLASS (mode
) != MODE_INT
)
3436 /* We can't assume x-x is 0 even with non-IEEE floating point. */
3437 if (rtx_equal_p (op0
, op1
)
3438 && ! side_effects_p (op0
)
3439 && GET_MODE_CLASS (mode
) != MODE_FLOAT
)
3442 /* Change subtraction from zero into negation. */
3443 if (op0
== CONST0_RTX (mode
))
3444 return gen_rtx (NEG
, mode
, op1
);
3446 /* Subtracting 0 has no effect. */
3447 if (op1
== CONST0_RTX (mode
))
3450 /* Strip off any surrounding CONSTs. They don't matter in any of
3452 if (GET_CODE (op0
) == CONST
)
3453 op0
= XEXP (op0
, 0);
3454 if (GET_CODE (op1
) == CONST
)
3455 op1
= XEXP (op1
, 0);
3457 /* (a - (-b)) -> (a + b). */
3458 if (GET_CODE (op1
) == NEG
)
3460 rtx tem
= simplify_binary_operation (PLUS
, mode
,
3461 op0
, XEXP (op1
, 0));
3462 return tem
? tem
: gen_rtx (PLUS
, mode
, op0
, XEXP (op1
, 0));
3465 /* Don't use the associative law for floating point.
3466 The inaccuracy makes it nonassociative,
3467 and subtle programs can break if operations are associated. */
3468 if (GET_MODE_CLASS (mode
) != MODE_INT
)
3471 /* (a + b) - a -> b, and (b - (a + b)) -> -a */
3472 if (GET_CODE (op0
) == PLUS
3473 && rtx_equal_p (XEXP (op0
, 0), op1
)
3474 && ! side_effects_p (op1
))
3475 return XEXP (op0
, 1);
3476 else if (GET_CODE (op0
) == PLUS
3477 && rtx_equal_p (XEXP (op0
, 1), op1
)
3478 && ! side_effects_p (op1
))
3479 return XEXP (op0
, 0);
3481 if (GET_CODE (op1
) == PLUS
3482 && rtx_equal_p (XEXP (op1
, 0), op0
)
3483 && ! side_effects_p (op0
))
3485 rtx tem
= simplify_unary_operation (NEG
, mode
, XEXP (op1
, 1),
3488 return tem
? tem
: gen_rtx (NEG
, mode
, XEXP (op1
, 1));
3490 else if (GET_CODE (op1
) == PLUS
3491 && rtx_equal_p (XEXP (op1
, 1), op0
)
3492 && ! side_effects_p (op0
))
3494 rtx tem
= simplify_unary_operation (NEG
, mode
, XEXP (op1
, 0),
3497 return tem
? tem
: gen_rtx (NEG
, mode
, XEXP (op1
, 0));
3500 /* a - (a - b) -> b */
3501 if (GET_CODE (op1
) == MINUS
&& rtx_equal_p (op0
, XEXP (op1
, 0))
3502 && ! side_effects_p (op0
))
3503 return XEXP (op1
, 1);
3505 /* (a +/- b) - (a +/- c) can be simplified. Do variants of
3506 this involving commutativity. The most common case is
3507 (a + C1) - (a + C2), but it's not hard to do all the cases. */
3508 if ((GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
)
3509 && (GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
))
3511 rtx lhs0
= XEXP (op0
, 0), lhs1
= XEXP (op0
, 1);
3512 rtx rhs0
= XEXP (op1
, 0), rhs1
= XEXP (op1
, 1);
3513 int lhs_neg
= GET_CODE (op0
) == MINUS
;
3514 int rhs_neg
= GET_CODE (op1
) == MINUS
;
3515 rtx lhs
= 0, rhs
= 0;
3517 /* Set LHS and RHS to the two different terms. */
3518 if (rtx_equal_p (lhs0
, rhs0
) && ! side_effects_p (lhs0
))
3519 lhs
= lhs1
, rhs
= rhs1
;
3520 else if (! rhs_neg
&& rtx_equal_p (lhs0
, rhs1
)
3521 && ! side_effects_p (lhs0
))
3522 lhs
= lhs1
, rhs
= rhs0
;
3523 else if (! lhs_neg
&& rtx_equal_p (lhs1
, rhs0
)
3524 && ! side_effects_p (lhs1
))
3525 lhs
= lhs0
, rhs
= rhs1
;
3526 else if (! lhs_neg
&& ! rhs_neg
&& rtx_equal_p (lhs1
, rhs1
)
3527 && ! side_effects_p (lhs1
))
3528 lhs
= lhs0
, rhs
= rhs0
;
3530 /* The RHS is the operand of a MINUS, so its negation
3531 status should be complemented. */
3532 rhs_neg
= ! rhs_neg
;
3534 /* If we found two values equal, form the sum or difference
3535 of the remaining two terms. */
3538 rtx tem
= simplify_binary_operation (lhs_neg
== rhs_neg
3541 lhs_neg
? rhs
: lhs
,
3542 lhs_neg
? lhs
: rhs
);
3544 tem
= gen_rtx (lhs_neg
== rhs_neg
3546 mode
, lhs_neg
? rhs
: lhs
,
3547 lhs_neg
? lhs
: rhs
);
3549 /* If both sides negated, negate result. */
3550 if (lhs_neg
&& rhs_neg
)
3553 = simplify_unary_operation (NEG
, mode
, tem
, mode
);
3555 tem1
= gen_rtx (NEG
, mode
, tem
);
3565 /* c1 - (a + c2) becomes (c1 - c2) - a. */
3566 if (GET_CODE (op0
) == CONST_INT
&& GET_CODE (op1
) == PLUS
3567 && GET_CODE (XEXP (op1
, 1)) == CONST_INT
)
3569 rtx tem
= simplify_binary_operation (MINUS
, mode
, op0
,
3572 return tem
? gen_rtx (MINUS
, mode
, tem
, XEXP (op1
, 0)) : 0;
3575 /* c1 - (c2 - a) becomes (c1 - c2) + a. */
3576 if (GET_CODE (op0
) == CONST_INT
&& GET_CODE (op1
) == MINUS
3577 && GET_CODE (XEXP (op1
, 0)) == CONST_INT
)
3579 rtx tem
= simplify_binary_operation (MINUS
, mode
, op0
,
3582 return (tem
&& GET_CODE (tem
) == CONST_INT
3583 ? plus_constant (XEXP (op1
, 1), INTVAL (tem
))
3587 /* Don't let a relocatable value get a negative coeff. */
3588 if (GET_CODE (op1
) == CONST_INT
)
3589 return plus_constant (op0
, - INTVAL (op1
));
3593 if (op1
== constm1_rtx
)
3595 rtx tem
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3597 return tem
? tem
: gen_rtx (NEG
, mode
, op0
);
3600 /* In IEEE floating point, x*0 is not always 0. */
3601 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3602 || GET_MODE_CLASS (mode
) == MODE_INT
)
3603 && op1
== CONST0_RTX (mode
)
3604 && ! side_effects_p (op0
))
3607 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3608 However, ANSI says we can drop signals,
3609 so we can do this anyway. */
3610 if (op1
== CONST1_RTX (mode
))
3613 /* Convert multiply by constant power of two into shift. */
3614 if (GET_CODE (op1
) == CONST_INT
3615 && (val
= exact_log2 (INTVAL (op1
))) >= 0)
3616 return gen_rtx (ASHIFT
, mode
, op0
,
3617 gen_rtx (CONST_INT
, VOIDmode
, val
));
3619 if (GET_CODE (op1
) == CONST_DOUBLE
3620 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
)
3623 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3625 /* x*2 is x+x and x*(-1) is -x */
3626 if (REAL_VALUES_EQUAL (d
, dconst2
)
3627 && GET_MODE (op0
) == mode
)
3628 return gen_rtx (PLUS
, mode
, op0
, copy_rtx (op0
));
3630 else if (REAL_VALUES_EQUAL (d
, dconstm1
)
3631 && GET_MODE (op0
) == mode
)
3632 return gen_rtx (NEG
, mode
, op0
);
3637 if (op1
== const0_rtx
)
3639 if (GET_CODE (op1
) == CONST_INT
3640 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3642 if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3644 /* A | (~A) -> -1 */
3645 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3646 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3647 && ! side_effects_p (op0
))
3652 if (op1
== const0_rtx
)
3654 if (GET_CODE (op1
) == CONST_INT
3655 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3656 return gen_rtx (NOT
, mode
, op0
);
3657 if (op0
== op1
&& ! side_effects_p (op0
))
3662 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3664 if (GET_CODE (op1
) == CONST_INT
3665 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3667 if (op0
== op1
&& ! side_effects_p (op0
))
3670 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3671 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3672 && ! side_effects_p (op0
))
3677 /* Convert divide by power of two into shift (divide by 1 handled
3679 if (GET_CODE (op1
) == CONST_INT
3680 && (arg1
= exact_log2 (INTVAL (op1
))) > 0)
3681 return gen_rtx (LSHIFTRT
, mode
, op0
,
3682 gen_rtx (CONST_INT
, VOIDmode
, arg1
));
3684 /* ... fall through ... */
3687 if (op1
== CONST1_RTX (mode
))
3689 else if (op0
== CONST0_RTX (mode
)
3690 && ! side_effects_p (op1
))
3692 #if 0 /* Turned off till an expert says this is a safe thing to do. */
3693 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3694 /* Change division by a constant into multiplication. */
3695 else if (GET_CODE (op1
) == CONST_DOUBLE
3696 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
3697 && op1
!= CONST0_RTX (mode
))
3700 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3701 if (REAL_VALUES_EQUAL (d
, dconst0
))
3703 #if defined (REAL_ARITHMETIC)
3704 REAL_ARITHMETIC (d
, RDIV_EXPR
, dconst1
, d
);
3705 return gen_rtx (MULT
, mode
, op0
,
3706 CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
));
3708 return gen_rtx (MULT
, mode
, op0
,
3709 CONST_DOUBLE_FROM_REAL_VALUE (1./d
, mode
));
3717 /* Handle modulus by power of two (mod with 1 handled below). */
3718 if (GET_CODE (op1
) == CONST_INT
3719 && exact_log2 (INTVAL (op1
)) > 0)
3720 return gen_rtx (AND
, mode
, op0
,
3721 gen_rtx (CONST_INT
, VOIDmode
, INTVAL (op1
) - 1));
3723 /* ... fall through ... */
3726 if ((op0
== const0_rtx
|| op1
== const1_rtx
)
3727 && ! side_effects_p (op0
) && ! side_effects_p (op1
))
3733 /* Rotating ~0 always results in ~0. */
3734 if (GET_CODE (op0
) == CONST_INT
&& width
<= HOST_BITS_PER_INT
3735 && INTVAL (op0
) == GET_MODE_MASK (mode
)
3736 && ! side_effects_p (op1
))
3739 /* ... fall through ... */
3745 if (op1
== const0_rtx
)
3747 if (op0
== const0_rtx
&& ! side_effects_p (op1
))
3752 if (width
<= HOST_BITS_PER_INT
&& GET_CODE (op1
) == CONST_INT
3753 && INTVAL (op1
) == 1 << (width
-1)
3754 && ! side_effects_p (op0
))
3756 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3761 if (width
<= HOST_BITS_PER_INT
&& GET_CODE (op1
) == CONST_INT
3762 && INTVAL (op1
) == GET_MODE_MASK (mode
) >> 1
3763 && ! side_effects_p (op0
))
3765 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3770 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3772 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3777 if (op1
== constm1_rtx
&& ! side_effects_p (op0
))
3779 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3790 /* Get the integer argument values in two forms:
3791 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
3793 arg0
= INTVAL (op0
);
3794 arg1
= INTVAL (op1
);
3796 if (width
< HOST_BITS_PER_INT
)
3798 arg0
&= (1 << width
) - 1;
3799 arg1
&= (1 << width
) - 1;
3802 if (arg0s
& (1 << (width
- 1)))
3803 arg0s
|= ((-1) << width
);
3806 if (arg1s
& (1 << (width
- 1)))
3807 arg1s
|= ((-1) << width
);
3815 /* Compute the value of the arithmetic. */
3820 val
= arg0s
+ arg1s
;
3824 val
= arg0s
- arg1s
;
3828 val
= arg0s
* arg1s
;
3834 val
= arg0s
/ arg1s
;
3840 val
= arg0s
% arg1s
;
3846 val
= (unsigned) arg0
/ arg1
;
3852 val
= (unsigned) arg0
% arg1
;
3868 /* If shift count is undefined, don't fold it; let the machine do
3869 what it wants. But truncate it if the machine will do that. */
3873 #ifdef SHIFT_COUNT_TRUNCATED
3874 arg1
&= (BITS_PER_WORD
- 1);
3880 val
= ((unsigned) arg0
) >> arg1
;
3888 #ifdef SHIFT_COUNT_TRUNCATED
3889 arg1
&= (BITS_PER_WORD
- 1);
3895 val
= ((unsigned) arg0
) << arg1
;
3902 #ifdef SHIFT_COUNT_TRUNCATED
3903 arg1
&= (BITS_PER_WORD
- 1);
3909 val
= arg0s
>> arg1
;
3917 val
= ((((unsigned) arg0
) << (width
- arg1
))
3918 | (((unsigned) arg0
) >> arg1
));
3926 val
= ((((unsigned) arg0
) << arg1
)
3927 | (((unsigned) arg0
) >> (width
- arg1
)));
3931 /* Do nothing here. */
3935 val
= arg0s
<= arg1s
? arg0s
: arg1s
;
3939 val
= (unsigned int)arg0
<= (unsigned int)arg1
? arg0
: arg1
;
3943 val
= arg0s
> arg1s
? arg0s
: arg1s
;
3947 val
= (unsigned int)arg0
> (unsigned int)arg1
? arg0
: arg1
;
3954 /* Clear the bits that don't belong in our mode, unless they and our sign
3955 bit are all one. So we get either a reasonable negative value or a
3956 reasonable unsigned value for this mode. */
3957 if (width
< HOST_BITS_PER_INT
3958 && ((val
& ((-1) << (width
- 1))) != ((-1) << (width
- 1))))
3959 val
&= (1 << width
) - 1;
3961 return gen_rtx (CONST_INT
, VOIDmode
, val
);
3964 /* Like simplify_binary_operation except used for relational operators.
3965 MODE is the mode of the operands, not that of the result. */
3968 simplify_relational_operation (code
, mode
, op0
, op1
)
3970 enum machine_mode mode
;
3973 register int arg0
, arg1
, arg0s
, arg1s
;
3975 int width
= GET_MODE_BITSIZE (mode
);
3977 /* If op0 is a compare, extract the comparison arguments from it. */
3978 if (GET_CODE (op0
) == COMPARE
&& op1
== const0_rtx
)
3979 op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
3981 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3982 || width
> HOST_BITS_PER_INT
|| width
== 0)
3984 /* Even if we can't compute a constant result,
3985 there are some cases worth simplifying. */
3987 /* For non-IEEE floating-point, if the two operands are equal, we know
3989 if (rtx_equal_p (op0
, op1
)
3990 && (TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3991 || GET_MODE_CLASS (GET_MODE (op0
)) != MODE_FLOAT
))
3992 return (code
== EQ
|| code
== GE
|| code
== LE
|| code
== LEU
3993 || code
== GEU
) ? const_true_rtx
: const0_rtx
;
3994 else if (GET_CODE (op0
) == CONST_DOUBLE
3995 && GET_CODE (op1
) == CONST_DOUBLE
3996 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
3998 REAL_VALUE_TYPE d0
, d1
;
4001 int op0lt
, op1lt
, equal
;
4003 if (setjmp (handler
))
4006 set_float_handler (handler
);
4007 REAL_VALUE_FROM_CONST_DOUBLE (d0
, op0
);
4008 REAL_VALUE_FROM_CONST_DOUBLE (d1
, op1
);
4009 equal
= REAL_VALUES_EQUAL (d0
, d1
);
4010 op0lt
= REAL_VALUES_LESS (d0
, d1
);
4011 op1lt
= REAL_VALUES_LESS (d1
, d0
);
4012 set_float_handler (0);
4017 return equal
? const_true_rtx
: const0_rtx
;
4019 return !equal
? const_true_rtx
: const0_rtx
;
4021 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4023 return op0lt
? const_true_rtx
: const0_rtx
;
4025 return equal
|| op1lt
? const_true_rtx
: const0_rtx
;
4027 return op1lt
? const_true_rtx
: const0_rtx
;
4036 /* We can't make this assumption due to #pragma weak */
4037 if (CONSTANT_P (op0
) && op1
== const0_rtx
)
4040 if (NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
4041 /* On some machines, the ap reg can be 0 sometimes. */
4042 && op0
!= arg_pointer_rtx
)
4049 /* We can't make this assumption due to #pragma weak */
4050 if (CONSTANT_P (op0
) && op1
== const0_rtx
)
4051 return const_true_rtx
;
4053 if (NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
4054 /* On some machines, the ap reg can be 0 sometimes. */
4055 && op0
!= arg_pointer_rtx
)
4056 return const_true_rtx
;
4060 /* Unsigned values are never negative, but we must be sure we are
4061 actually comparing a value, not a CC operand. */
4062 if (op1
== const0_rtx
4063 && GET_MODE_CLASS (mode
) == MODE_INT
)
4064 return const_true_rtx
;
4068 if (op1
== const0_rtx
4069 && GET_MODE_CLASS (mode
) == MODE_INT
)
4074 /* Unsigned values are never greater than the largest
4076 if (GET_CODE (op1
) == CONST_INT
4077 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4078 && GET_MODE_CLASS (mode
) == MODE_INT
)
4079 return const_true_rtx
;
4083 if (GET_CODE (op1
) == CONST_INT
4084 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4085 && GET_MODE_CLASS (mode
) == MODE_INT
)
4093 /* Get the integer argument values in two forms:
4094 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4096 arg0
= INTVAL (op0
);
4097 arg1
= INTVAL (op1
);
4099 if (width
< HOST_BITS_PER_INT
)
4101 arg0
&= (1 << width
) - 1;
4102 arg1
&= (1 << width
) - 1;
4105 if (arg0s
& (1 << (width
- 1)))
4106 arg0s
|= ((-1) << width
);
4109 if (arg1s
& (1 << (width
- 1)))
4110 arg1s
|= ((-1) << width
);
4118 /* Compute the value of the arithmetic. */
4123 val
= arg0
!= arg1
? STORE_FLAG_VALUE
: 0;
4127 val
= arg0
== arg1
? STORE_FLAG_VALUE
: 0;
4131 val
= arg0s
<= arg1s
? STORE_FLAG_VALUE
: 0;
4135 val
= arg0s
< arg1s
? STORE_FLAG_VALUE
: 0;
4139 val
= arg0s
>= arg1s
? STORE_FLAG_VALUE
: 0;
4143 val
= arg0s
> arg1s
? STORE_FLAG_VALUE
: 0;
4147 val
= ((unsigned) arg0
) <= ((unsigned) arg1
) ? STORE_FLAG_VALUE
: 0;
4151 val
= ((unsigned) arg0
) < ((unsigned) arg1
) ? STORE_FLAG_VALUE
: 0;
4155 val
= ((unsigned) arg0
) >= ((unsigned) arg1
) ? STORE_FLAG_VALUE
: 0;
4159 val
= ((unsigned) arg0
) > ((unsigned) arg1
) ? STORE_FLAG_VALUE
: 0;
4166 /* Clear the bits that don't belong in our mode, unless they and our sign
4167 bit are all one. So we get either a reasonable negative value or a
4168 reasonable unsigned value for this mode. */
4169 if (width
< HOST_BITS_PER_INT
4170 && ((val
& ((-1) << (width
- 1))) != ((-1) << (width
- 1))))
4171 val
&= (1 << width
) - 1;
4173 return gen_rtx (CONST_INT
, VOIDmode
, val
);
4176 /* Simplify CODE, an operation with result mode MODE and three operands,
4177 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4178 a constant. Return 0 if no simplifications is possible. */
4181 simplify_ternary_operation (code
, mode
, op0_mode
, op0
, op1
, op2
)
4183 enum machine_mode mode
, op0_mode
;
4186 int width
= GET_MODE_BITSIZE (mode
);
4188 /* VOIDmode means "infinite" precision. */
4190 width
= HOST_BITS_PER_INT
;
4196 if (GET_CODE (op0
) == CONST_INT
4197 && GET_CODE (op1
) == CONST_INT
4198 && GET_CODE (op2
) == CONST_INT
4199 && INTVAL (op1
) + INTVAL (op2
) <= GET_MODE_BITSIZE (op0_mode
)
4200 && width
<= HOST_BITS_PER_INT
)
4202 /* Extracting a bit-field from a constant */
4203 int val
= INTVAL (op0
);
4206 val
>>= (GET_MODE_BITSIZE (op0_mode
) - INTVAL (op2
) - INTVAL (op1
));
4208 val
>>= INTVAL (op2
);
4210 if (HOST_BITS_PER_INT
!= INTVAL (op1
))
4212 /* First zero-extend. */
4213 val
&= (1 << INTVAL (op1
)) - 1;
4214 /* If desired, propagate sign bit. */
4215 if (code
== SIGN_EXTRACT
&& (val
& (1 << (INTVAL (op1
) - 1))))
4216 val
|= ~ ((1 << INTVAL (op1
)) - 1);
4219 /* Clear the bits that don't belong in our mode,
4220 unless they and our sign bit are all one.
4221 So we get either a reasonable negative value or a reasonable
4222 unsigned value for this mode. */
4223 if (width
< HOST_BITS_PER_INT
4224 && ((val
& ((-1) << (width
- 1))) != ((-1) << (width
- 1))))
4225 val
&= (1 << width
) - 1;
4227 return gen_rtx (CONST_INT
, VOIDmode
, val
);
4232 if (GET_CODE (op0
) == CONST_INT
)
4233 return op0
!= const0_rtx
? op1
: op2
;
4243 /* If X is a nontrivial arithmetic operation on an argument
4244 for which a constant value can be determined, return
4245 the result of operating on that value, as a constant.
4246 Otherwise, return X, possibly with one or more operands
4247 modified by recursive calls to this function.
4249 If X is a register whose contents are known, we do NOT
4250 return those contents. This is because an instruction that
4251 uses a register is usually faster than one that uses a constant.
4253 INSN is the insn that we may be modifying. If it is 0, make a copy
4254 of X before modifying it. */
4261 register enum rtx_code code
;
4262 register enum machine_mode mode
;
4264 register int i
, val
;
4269 /* Folded equivalents of first two operands of X. */
4273 /* Constant equivalents of first three operands of X;
4274 0 when no such equivalent is known. */
4279 /* The mode of the first operand of X. We need this for sign and zero
4281 enum machine_mode mode_arg0
;
4286 mode
= GET_MODE (x
);
4287 code
= GET_CODE (x
);
4296 /* No use simplifying an EXPR_LIST
4297 since they are used only for lists of args
4298 in a function call's REG_EQUAL note. */
4304 return prev_insn_cc0
;
4308 /* If the next insn is a CODE_LABEL followed by a jump table,
4309 PC's value is a LABEL_REF pointing to that label. That
4310 lets us fold switch statements on the Vax. */
4311 if (insn
&& GET_CODE (insn
) == JUMP_INSN
)
4313 rtx next
= next_nonnote_insn (insn
);
4315 if (next
&& GET_CODE (next
) == CODE_LABEL
4316 && NEXT_INSN (next
) != 0
4317 && GET_CODE (NEXT_INSN (next
)) == JUMP_INSN
4318 && (GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_VEC
4319 || GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_DIFF_VEC
))
4320 return gen_rtx (LABEL_REF
, Pmode
, next
);
4325 /* See if we previously assigned a constant value to this SUBREG. */
4326 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
4327 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
4330 /* If this is a paradoxical SUBREG, we can't do anything with
4331 it because we have no idea what value the extra bits would have. */
4332 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4335 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4336 We might be able to if the SUBREG is extracting a single word in an
4337 integral mode or extracting the low part. */
4339 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
4340 const_arg0
= equiv_constant (folded_arg0
);
4342 folded_arg0
= const_arg0
;
4344 if (folded_arg0
!= SUBREG_REG (x
))
4348 if (GET_MODE_CLASS (mode
) == MODE_INT
4349 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4350 && GET_MODE (SUBREG_REG (x
)) != VOIDmode
)
4351 new = operand_subword (folded_arg0
, SUBREG_WORD (x
), 0,
4352 GET_MODE (SUBREG_REG (x
)));
4353 if (new == 0 && subreg_lowpart_p (x
))
4354 new = gen_lowpart_if_possible (mode
, folded_arg0
);
4359 /* If this is a narrowing SUBREG and our operand is a REG, see if
4360 we can find an equivalence for REG that is a arithmetic operation
4361 in a wider mode where both operands are paradoxical SUBREGs
4362 from objects of our result mode. In that case, we couldn't report
4363 an equivalent value for that operation, since we don't know what the
4364 extra bits will be. But we can find an equivalence for this SUBREG
4365 by folding that operation is the narrow mode. This allows us to
4366 fold arithmetic in narrow modes when the machine only supports
4367 word-sized arithmetic. */
4369 if (GET_CODE (folded_arg0
) == REG
4370 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
)))
4372 struct table_elt
*elt
;
4374 /* We can use HASH here since we know that canon_hash won't be
4376 elt
= lookup (folded_arg0
,
4377 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
4378 GET_MODE (folded_arg0
));
4381 elt
= elt
->first_same_value
;
4383 for (; elt
; elt
= elt
->next_same_value
)
4385 /* Just check for unary and binary operations. */
4386 if (GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '1'
4387 && GET_CODE (elt
->exp
) != SIGN_EXTEND
4388 && GET_CODE (elt
->exp
) != ZERO_EXTEND
4389 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4390 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
)
4392 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
4394 if (GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4395 op0
= fold_rtx (op0
, 0);
4397 op0
= equiv_constant (op0
);
4399 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
4402 else if ((GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '2'
4403 || GET_RTX_CLASS (GET_CODE (elt
->exp
)) == 'c')
4404 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4405 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
4407 || CONSTANT_P (XEXP (elt
->exp
, 0)))
4408 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
4409 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
4411 || CONSTANT_P (XEXP (elt
->exp
, 1))))
4413 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
4414 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
4416 if (op0
&& GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4417 op0
= fold_rtx (op0
, 0);
4420 op0
= equiv_constant (op0
);
4422 if (op1
&& GET_CODE (op1
) != REG
&& ! CONSTANT_P (op1
))
4423 op1
= fold_rtx (op1
, 0);
4426 op1
= equiv_constant (op1
);
4429 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
,
4442 /* If we have (NOT Y), see if Y is known to be (NOT Z).
4443 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
4444 new = lookup_as_function (XEXP (x
, 0), code
);
4446 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
4450 /* If we are not actually processing an insn, don't try to find the
4451 best address. Not only don't we care, but we could modify the
4452 MEM in an invalid way since we have no insn to validate against. */
4454 find_best_addr (insn
, &XEXP (x
, 0));
4457 /* Even if we don't fold in the insn itself,
4458 we can safely do so here, in hopes of getting a constant. */
4459 rtx addr
= fold_rtx (XEXP (x
, 0), 0);
4463 if (GET_CODE (addr
) == REG
4464 && REGNO_QTY_VALID_P (REGNO (addr
))
4465 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
4466 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
4467 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
4469 /* If address is constant, split it into a base and integer offset. */
4470 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
4472 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
4473 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
4475 base
= XEXP (XEXP (addr
, 0), 0);
4476 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
4478 else if (GET_CODE (addr
) == LO_SUM
4479 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
4480 base
= XEXP (addr
, 1);
4482 /* If this is a constant pool reference, we can fold it into its
4483 constant to allow better value tracking. */
4484 if (base
&& GET_CODE (base
) == SYMBOL_REF
4485 && CONSTANT_POOL_ADDRESS_P (base
))
4487 rtx constant
= get_pool_constant (base
);
4488 enum machine_mode const_mode
= get_pool_mode (base
);
4491 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
4492 constant_pool_entries_cost
= COST (constant
);
4494 /* If we are loading the full constant, we have an equivalence. */
4495 if (offset
== 0 && mode
== const_mode
)
4498 /* If this actually isn't a constant (wierd!), we can't do
4499 anything. Otherwise, handle the two most common cases:
4500 extracting a word from a multi-word constant, and extracting
4501 the low-order bits. Other cases don't seem common enough to
4503 if (! CONSTANT_P (constant
))
4506 if (GET_MODE_CLASS (mode
) == MODE_INT
4507 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4508 && offset
% UNITS_PER_WORD
== 0
4509 && (new = operand_subword (constant
,
4510 offset
/ UNITS_PER_WORD
,
4511 0, const_mode
)) != 0)
4514 if (((BYTES_BIG_ENDIAN
4515 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
4516 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
4517 && (new = gen_lowpart_if_possible (mode
, constant
)) != 0)
4521 /* If this is a reference to a label at a known position in a jump
4522 table, we also know its value. */
4523 if (base
&& GET_CODE (base
) == LABEL_REF
)
4525 rtx label
= XEXP (base
, 0);
4526 rtx table_insn
= NEXT_INSN (label
);
4528 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
4529 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
4531 rtx table
= PATTERN (table_insn
);
4534 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
4535 < XVECLEN (table
, 0)))
4536 return XVECEXP (table
, 0,
4537 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
4539 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
4540 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
4542 rtx table
= PATTERN (table_insn
);
4545 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
4546 < XVECLEN (table
, 1)))
4548 offset
/= GET_MODE_SIZE (GET_MODE (table
));
4549 new = gen_rtx (MINUS
, Pmode
, XVECEXP (table
, 1, offset
),
4552 if (GET_MODE (table
) != Pmode
)
4553 new = gen_rtx (TRUNCATE
, GET_MODE (table
), new);
4567 mode_arg0
= VOIDmode
;
4569 /* Try folding our operands.
4570 Then see which ones have constant values known. */
4572 fmt
= GET_RTX_FORMAT (code
);
4573 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4576 rtx arg
= XEXP (x
, i
);
4577 rtx folded_arg
= arg
, const_arg
= 0;
4578 enum machine_mode mode_arg
= GET_MODE (arg
);
4579 rtx cheap_arg
, expensive_arg
;
4580 rtx replacements
[2];
4583 /* Most arguments are cheap, so handle them specially. */
4584 switch (GET_CODE (arg
))
4587 /* This is the same as calling equiv_constant; it is duplicated
4589 if (REGNO_QTY_VALID_P (REGNO (arg
))
4590 && qty_const
[reg_qty
[REGNO (arg
)]] != 0
4591 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != REG
4592 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != PLUS
)
4594 = gen_lowpart_if_possible (GET_MODE (arg
),
4595 qty_const
[reg_qty
[REGNO (arg
)]]);
4608 folded_arg
= prev_insn_cc0
;
4609 mode_arg
= prev_insn_cc0_mode
;
4610 const_arg
= equiv_constant (folded_arg
);
4615 folded_arg
= fold_rtx (arg
, insn
);
4616 const_arg
= equiv_constant (folded_arg
);
4619 /* For the first three operands, see if the operand
4620 is constant or equivalent to a constant. */
4624 folded_arg0
= folded_arg
;
4625 const_arg0
= const_arg
;
4626 mode_arg0
= mode_arg
;
4629 folded_arg1
= folded_arg
;
4630 const_arg1
= const_arg
;
4633 const_arg2
= const_arg
;
4637 /* Pick the least expensive of the folded argument and an
4638 equivalent constant argument. */
4639 if (const_arg
== 0 || const_arg
== folded_arg
4640 || COST (const_arg
) > COST (folded_arg
))
4641 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
4643 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
4645 /* Try to replace the operand with the cheapest of the two
4646 possibilities. If it doesn't work and this is either of the first
4647 two operands of a commutative operation, try swapping them.
4648 If THAT fails, try the more expensive, provided it is cheaper
4649 than what is already there. */
4651 if (cheap_arg
== XEXP (x
, i
))
4654 if (insn
== 0 && ! copied
)
4660 replacements
[0] = cheap_arg
, replacements
[1] = expensive_arg
;
4662 j
< 2 && replacements
[j
]
4663 && COST (replacements
[j
]) < COST (XEXP (x
, i
));
4666 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
4669 if (code
== NE
|| code
== EQ
|| GET_RTX_CLASS (code
) == 'c')
4671 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
4672 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
4674 if (apply_change_group ())
4676 /* Swap them back to be invalid so that this loop can
4677 continue and flag them to be swapped back later. */
4680 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
4689 else if (fmt
[i
] == 'E')
4690 /* Don't try to fold inside of a vector of expressions.
4691 Doing nothing is harmless. */
4694 /* If a commutative operation, place a constant integer as the second
4695 operand unless the first operand is also a constant integer. Otherwise,
4696 place any constant second unless the first operand is also a constant. */
4698 if (code
== EQ
|| code
== NE
|| GET_RTX_CLASS (code
) == 'c')
4700 if (must_swap
|| (const_arg0
4702 || (GET_CODE (const_arg0
) == CONST_INT
4703 && GET_CODE (const_arg1
) != CONST_INT
))))
4705 register rtx tem
= XEXP (x
, 0);
4707 if (insn
== 0 && ! copied
)
4713 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
4714 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
4715 if (apply_change_group ())
4717 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
4718 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
4723 /* If X is an arithmetic operation, see if we can simplify it. */
4725 switch (GET_RTX_CLASS (code
))
4728 /* We can't simplify extension ops unless we know the original mode. */
4729 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
4730 && mode_arg0
== VOIDmode
)
4732 new = simplify_unary_operation (code
, mode
,
4733 const_arg0
? const_arg0
: folded_arg0
,
4738 /* See what items are actually being compared and set FOLDED_ARG[01]
4739 to those values and CODE to the actual comparison code. If any are
4740 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
4741 do anything if both operands are already known to be constant. */
4743 if (const_arg0
== 0 || const_arg1
== 0)
4745 struct table_elt
*p0
, *p1
;
4746 rtx
true = const_true_rtx
, false = const0_rtx
;
4748 #ifdef FLOAT_STORE_FLAG_VALUE
4749 if (GET_MODE_CLASS (mode
))
4751 true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
);
4752 false = CONST0_RTX (mode
);
4756 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
);
4757 const_arg0
= equiv_constant (folded_arg0
);
4758 const_arg1
= equiv_constant (folded_arg1
);
4760 /* Get a mode from the values actually being compared, or from the
4761 old value of MODE_ARG0 if both are constants. If the resulting
4762 mode is VOIDmode or a MODE_CC mode, we don't know what kinds
4763 of things are being compared, so we can't do anything with this
4766 if (GET_MODE (folded_arg0
) != VOIDmode
4767 && GET_MODE_CLASS (GET_MODE (folded_arg0
)) != MODE_CC
)
4768 mode_arg0
= GET_MODE (folded_arg0
);
4770 else if (GET_MODE (folded_arg1
) != VOIDmode
4771 && GET_MODE_CLASS (GET_MODE (folded_arg1
)) != MODE_CC
)
4772 mode_arg0
= GET_MODE (folded_arg1
);
4774 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
4777 /* If we do not now have two constants being compared, see if we
4778 can nevertheless deduce some things about the comparison. */
4779 if (const_arg0
== 0 || const_arg1
== 0)
4781 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit
4782 constant? These aren't zero, but we don't know their sign. */
4783 if (const_arg1
== const0_rtx
4784 && (NONZERO_BASE_PLUS_P (folded_arg0
)
4785 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
4787 || GET_CODE (folded_arg0
) == SYMBOL_REF
4789 || GET_CODE (folded_arg0
) == LABEL_REF
4790 || GET_CODE (folded_arg0
) == CONST
))
4794 else if (code
== NE
)
4798 /* See if the two operands are the same. We don't do this
4799 for IEEE floating-point since we can't assume x == x
4800 since x might be a NaN. */
4802 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4803 || GET_MODE_CLASS (mode_arg0
) != MODE_FLOAT
)
4804 && (folded_arg0
== folded_arg1
4805 || (GET_CODE (folded_arg0
) == REG
4806 && GET_CODE (folded_arg1
) == REG
4807 && (reg_qty
[REGNO (folded_arg0
)]
4808 == reg_qty
[REGNO (folded_arg1
)]))
4809 || ((p0
= lookup (folded_arg0
,
4810 (safe_hash (folded_arg0
, mode_arg0
)
4811 % NBUCKETS
), mode_arg0
))
4812 && (p1
= lookup (folded_arg1
,
4813 (safe_hash (folded_arg1
, mode_arg0
)
4814 % NBUCKETS
), mode_arg0
))
4815 && p0
->first_same_value
== p1
->first_same_value
)))
4816 return ((code
== EQ
|| code
== LE
|| code
== GE
4817 || code
== LEU
|| code
== GEU
)
4820 /* If FOLDED_ARG0 is a register, see if the comparison we are
4821 doing now is either the same as we did before or the reverse
4822 (we only check the reverse if not floating-point). */
4823 else if (GET_CODE (folded_arg0
) == REG
)
4825 int qty
= reg_qty
[REGNO (folded_arg0
)];
4827 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
))
4828 && (comparison_dominates_p (qty_comparison_code
[qty
], code
)
4829 || (comparison_dominates_p (qty_comparison_code
[qty
],
4830 reverse_condition (code
))
4831 && GET_MODE_CLASS (mode_arg0
) == MODE_INT
))
4832 && (rtx_equal_p (qty_comparison_const
[qty
], folded_arg1
)
4834 && rtx_equal_p (qty_comparison_const
[qty
],
4836 || (GET_CODE (folded_arg1
) == REG
4837 && (reg_qty
[REGNO (folded_arg1
)]
4838 == qty_comparison_qty
[qty
]))))
4839 return (comparison_dominates_p (qty_comparison_code
[qty
],
4846 /* If we are comparing against zero, see if the first operand is
4847 equivalent to an IOR with a constant. If so, we may be able to
4848 determine the result of this comparison. */
4850 if (const_arg1
== const0_rtx
)
4852 rtx y
= lookup_as_function (folded_arg0
, IOR
);
4856 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
4857 && GET_CODE (inner_const
) == CONST_INT
4858 && INTVAL (inner_const
) != 0)
4860 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
4861 int has_sign
= (HOST_BITS_PER_INT
>= sign_bitnum
4862 && (INTVAL (inner_const
) & (1 << sign_bitnum
)));
4863 rtx
true = const_true_rtx
, false = const0_rtx
;
4865 #ifdef FLOAT_STORE_FLAG_VALUE
4866 if (GET_MODE_CLASS (mode
))
4868 true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
);
4869 false = CONST0_RTX (mode
);
4891 new = simplify_relational_operation (code
, mode_arg0
,
4892 const_arg0
? const_arg0
: folded_arg0
,
4893 const_arg1
? const_arg1
: folded_arg1
);
4894 #ifdef FLOAT_STORE_FLAG_VALUE
4895 if (new != 0 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
4896 new = ((new == const0_rtx
) ? CONST0_RTX (mode
)
4897 : immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
));
4906 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4907 with that LABEL_REF as its second operand. If so, the result is
4908 the first operand of that MINUS. This handles switches with an
4909 ADDR_DIFF_VEC table. */
4910 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
4912 rtx y
= lookup_as_function (folded_arg0
, MINUS
);
4914 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
4915 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
4919 /* ... fall through ... */
4922 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4923 case IOR
: case AND
: case XOR
:
4924 case MULT
: case DIV
: case UDIV
:
4925 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
4926 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4927 is known to be of similar form, we may be able to replace the
4928 operation with a combined operation. This may eliminate the
4929 intermediate operation if every use is simplified in this way.
4930 Note that the similar optimization done by combine.c only works
4931 if the intermediate operation's result has only one reference. */
4933 if (GET_CODE (folded_arg0
) == REG
4934 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
4937 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
4938 rtx y
= lookup_as_function (folded_arg0
, code
);
4940 enum rtx_code associate_code
;
4944 || 0 == (inner_const
4945 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
4946 || GET_CODE (inner_const
) != CONST_INT
4947 /* If we have compiled a statement like
4948 "if (x == (x & mask1))", and now are looking at
4949 "x & mask2", we will have a case where the first operand
4950 of Y is the same as our first operand. Unless we detect
4951 this case, an infinite loop will result. */
4952 || XEXP (y
, 0) == folded_arg0
)
4955 /* Don't associate these operations if they are a PLUS with the
4956 same constant and it is a power of two. These might be doable
4957 with a pre- or post-increment. Similarly for two subtracts of
4958 identical powers of two with post decrement. */
4960 if (code
== PLUS
&& INTVAL (const_arg1
) == INTVAL (inner_const
)
4962 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
4963 || exact_log2 (INTVAL (const_arg1
)) >= 0
4965 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
4966 || exact_log2 (- INTVAL (const_arg1
)) >= 0
4971 /* Compute the code used to compose the constants. For example,
4972 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
4975 = (code
== MULT
|| code
== DIV
|| code
== UDIV
? MULT
4976 : is_shift
|| code
== PLUS
|| code
== MINUS
? PLUS
: code
);
4978 new_const
= simplify_binary_operation (associate_code
, mode
,
4979 const_arg1
, inner_const
);
4984 /* If we are associating shift operations, don't let this
4985 produce a shift of larger than the object. This could
4986 occur when we following a sign-extend by a right shift on
4987 a machine that does a sign-extend as a pair of shifts. */
4989 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
4990 && INTVAL (new_const
) > GET_MODE_BITSIZE (mode
))
4993 y
= copy_rtx (XEXP (y
, 0));
4995 /* If Y contains our first operand (the most common way this
4996 can happen is if Y is a MEM), we would do into an infinite
4997 loop if we tried to fold it. So don't in that case. */
4999 if (! reg_mentioned_p (folded_arg0
, y
))
5000 y
= fold_rtx (y
, insn
);
5002 new = simplify_binary_operation (code
, mode
, y
, new_const
);
5006 return gen_rtx (code
, mode
, y
, new_const
);
5010 new = simplify_binary_operation (code
, mode
,
5011 const_arg0
? const_arg0
: folded_arg0
,
5012 const_arg1
? const_arg1
: folded_arg1
);
5016 /* (lo_sum (high X) X) is simply X. */
5017 if (code
== LO_SUM
&& const_arg0
!= 0
5018 && GET_CODE (const_arg0
) == HIGH
5019 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
5025 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
5026 const_arg0
? const_arg0
: folded_arg0
,
5027 const_arg1
? const_arg1
: folded_arg1
,
5028 const_arg2
? const_arg2
: XEXP (x
, 2));
5032 return new ? new : x
;
5035 /* Return a constant value currently equivalent to X.
5036 Return 0 if we don't know one. */
5042 if (GET_CODE (x
) == REG
5043 && REGNO_QTY_VALID_P (REGNO (x
))
5044 && qty_const
[reg_qty
[REGNO (x
)]])
5045 x
= gen_lowpart_if_possible (GET_MODE (x
), qty_const
[reg_qty
[REGNO (x
)]]);
5047 if (x
!= 0 && CONSTANT_P (x
))
5050 /* If X is a MEM, try to fold it outside the context of any insn to see if
5051 it might be equivalent to a constant. That handles the case where it
5052 is a constant-pool reference. Then try to look it up in the hash table
5053 in case it is something whose value we have seen before. */
5055 if (GET_CODE (x
) == MEM
)
5057 struct table_elt
*elt
;
5059 x
= fold_rtx (x
, 0);
5063 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) % NBUCKETS
, GET_MODE (x
));
5067 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
5068 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
5075 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5076 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5077 least-significant part of X.
5078 MODE specifies how big a part of X to return.
5080 If the requested operation cannot be done, 0 is returned.
5082 This is similar to gen_lowpart in emit-rtl.c. */
5085 gen_lowpart_if_possible (mode
, x
)
5086 enum machine_mode mode
;
5089 rtx result
= gen_lowpart_common (mode
, x
);
5093 else if (GET_CODE (x
) == MEM
)
5095 /* This is the only other case we handle. */
5096 register int offset
= 0;
5099 #if WORDS_BIG_ENDIAN
5100 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
5101 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
5103 #if BYTES_BIG_ENDIAN
5104 /* Adjust the address so that the address-after-the-data
5106 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
5107 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
5109 new = gen_rtx (MEM
, mode
, plus_constant (XEXP (x
, 0), offset
));
5110 if (! memory_address_p (mode
, XEXP (new, 0)))
5112 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x
);
5113 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x
);
5114 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x
);
5121 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5122 branch. It will be zero if not.
5124 In certain cases, this can cause us to add an equivalence. For example,
5125 if we are following the taken case of
5127 we can add the fact that `i' and '2' are now equivalent.
5129 In any case, we can record that this comparison was passed. If the same
5130 comparison is seen later, we will know its value. */
5133 record_jump_equiv (insn
, taken
)
5137 int cond_known_true
;
5139 enum machine_mode mode
;
5140 int reversed_nonequality
= 0;
5143 /* Ensure this is the right kind of insn. */
5144 if (! condjump_p (insn
) || simplejump_p (insn
))
5147 /* See if this jump condition is known true or false. */
5149 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 2) == pc_rtx
);
5151 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 1) == pc_rtx
);
5153 /* Get the type of comparison being done and the operands being compared.
5154 If we had to reverse a non-equality condition, record that fact so we
5155 know that it isn't valid for floating-point. */
5156 code
= GET_CODE (XEXP (SET_SRC (PATTERN (insn
)), 0));
5157 op0
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 0), insn
);
5158 op1
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 1), insn
);
5160 code
= find_comparison_args (code
, &op0
, &op1
);
5161 if (! cond_known_true
)
5163 reversed_nonequality
= (code
!= EQ
&& code
!= NE
);
5164 code
= reverse_condition (code
);
5167 /* The mode is the mode of the non-constant. */
5168 mode
= GET_MODE (op0
);
5169 if (mode
== VOIDmode
) mode
= GET_MODE (op1
);
5171 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
5174 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5175 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5176 Make any useful entries we can with that information. Called from
5177 above function and called recursively. */
5180 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
)
5182 enum machine_mode mode
;
5184 int reversed_nonequality
;
5186 int op0_hash_code
, op1_hash_code
;
5187 int op0_in_memory
, op0_in_struct
, op1_in_memory
, op1_in_struct
;
5188 struct table_elt
*op0_elt
, *op1_elt
;
5190 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5191 we know that they are also equal in the smaller mode (this is also
5192 true for all smaller modes whether or not there is a SUBREG, but
5193 is not worth testing for with no SUBREG. */
5195 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
5196 && GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
))))
5198 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5199 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5201 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5202 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5203 reversed_nonequality
);
5206 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
5207 && GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
))))
5209 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5210 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5212 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5213 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5214 reversed_nonequality
);
5217 /* Similarly, if this is an NE comparison, and either is a SUBREG
5218 making a smaller mode, we know the whole thing is also NE. */
5220 if (code
== NE
&& GET_CODE (op0
) == SUBREG
5221 && subreg_lowpart_p (op0
)
5222 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
))))
5224 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5225 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5227 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5228 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5229 reversed_nonequality
);
5232 if (code
== NE
&& GET_CODE (op1
) == SUBREG
5233 && subreg_lowpart_p (op1
)
5234 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
))))
5236 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5237 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5239 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5240 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5241 reversed_nonequality
);
5244 /* Hash both operands. */
5247 hash_arg_in_memory
= 0;
5248 hash_arg_in_struct
= 0;
5249 op0_hash_code
= HASH (op0
, mode
);
5250 op0_in_memory
= hash_arg_in_memory
;
5251 op0_in_struct
= hash_arg_in_struct
;
5257 hash_arg_in_memory
= 0;
5258 hash_arg_in_struct
= 0;
5259 op1_hash_code
= HASH (op1
, mode
);
5260 op1_in_memory
= hash_arg_in_memory
;
5261 op1_in_struct
= hash_arg_in_struct
;
5266 /* Look up both operands. */
5267 op0_elt
= lookup (op0
, op0_hash_code
, mode
);
5268 op1_elt
= lookup (op1
, op1_hash_code
, mode
);
5270 /* If we aren't setting two things equal all we can do is save this
5274 /* If we reversed a floating-point comparison, if OP0 is not a
5275 register, or if OP1 is neither a register or constant, we can't
5278 if (GET_CODE (op1
) != REG
)
5279 op1
= equiv_constant (op1
);
5281 if ((reversed_nonequality
&& GET_MODE_CLASS (mode
) != MODE_INT
)
5282 || GET_CODE (op0
) != REG
|| op1
== 0)
5285 /* Put OP0 in the hash table if it isn't already. This gives it a
5286 new quantity number. */
5289 if (insert_regs (op0
, 0, 0))
5291 rehash_using_reg (op0
);
5292 op0_hash_code
= HASH (op0
, mode
);
5295 op0_elt
= insert (op0
, 0, op0_hash_code
, mode
);
5296 op0_elt
->in_memory
= op0_in_memory
;
5297 op0_elt
->in_struct
= op0_in_struct
;
5300 qty_comparison_code
[reg_qty
[REGNO (op0
)]] = code
;
5301 if (GET_CODE (op1
) == REG
)
5303 /* Put OP1 in the hash table so it gets a new quantity number. */
5306 if (insert_regs (op1
, 0, 0))
5308 rehash_using_reg (op1
);
5309 op1_hash_code
= HASH (op1
, mode
);
5312 op1_elt
= insert (op1
, 0, op1_hash_code
, mode
);
5313 op1_elt
->in_memory
= op1_in_memory
;
5314 op1_elt
->in_struct
= op1_in_struct
;
5317 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = reg_qty
[REGNO (op1
)];
5318 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = 0;
5322 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = -1;
5323 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = op1
;
5329 /* If both are equivalent, merge the two classes. Save this class for
5330 `cse_set_around_loop'. */
5331 if (op0_elt
&& op1_elt
)
5333 merge_equiv_classes (op0_elt
, op1_elt
);
5334 last_jump_equiv_class
= op0_elt
;
5337 /* For whichever side doesn't have an equivalence, make one. */
5340 if (insert_regs (op0
, op1_elt
, 0))
5342 rehash_using_reg (op0
);
5343 op0_hash_code
= HASH (op0
, mode
);
5346 op0_elt
= insert (op0
, op1_elt
, op0_hash_code
, mode
);
5347 op0_elt
->in_memory
= op0_in_memory
;
5348 op0_elt
->in_struct
= op0_in_struct
;
5349 last_jump_equiv_class
= op0_elt
;
5354 if (insert_regs (op1
, op0_elt
, 0))
5356 rehash_using_reg (op1
);
5357 op1_hash_code
= HASH (op1
, mode
);
5360 op1_elt
= insert (op1
, op0_elt
, op1_hash_code
, mode
);
5361 op1_elt
->in_memory
= op1_in_memory
;
5362 op1_elt
->in_struct
= op1_in_struct
;
5363 last_jump_equiv_class
= op1_elt
;
5367 /* CSE processing for one instruction.
5368 First simplify sources and addresses of all assignments
5369 in the instruction, using previously-computed equivalents values.
5370 Then install the new sources and destinations in the table
5371 of available values.
5373 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
5376 /* Data on one SET contained in the instruction. */
5380 /* The SET rtx itself. */
5382 /* The SET_SRC of the rtx (the original value, if it is changing). */
5384 /* The hash-table element for the SET_SRC of the SET. */
5385 struct table_elt
*src_elt
;
5386 /* Hash code for the SET_SRC. */
5388 /* Hash code for the SET_DEST. */
5390 /* The SET_DEST, with SUBREG, etc., stripped. */
5392 /* Place where the pointer to the INNER_DEST was found. */
5393 rtx
*inner_dest_loc
;
5394 /* Nonzero if the SET_SRC is in memory. */
5396 /* Nonzero if the SET_SRC is in a structure. */
5398 /* Nonzero if the SET_SRC contains something
5399 whose value cannot be predicted and understood. */
5401 /* Original machine mode, in case it becomes a CONST_INT. */
5402 enum machine_mode mode
;
5403 /* A constant equivalent for SET_SRC, if any. */
5405 /* Hash code of constant equivalent for SET_SRC. */
5406 int src_const_hash_code
;
5407 /* Table entry for constant equivalent for SET_SRC, if any. */
5408 struct table_elt
*src_const_elt
;
5412 cse_insn (insn
, in_libcall_block
)
5414 int in_libcall_block
;
5416 register rtx x
= PATTERN (insn
);
5419 register int n_sets
= 0;
5421 /* Records what this insn does to set CC0. */
5422 rtx this_insn_cc0
= 0;
5423 enum machine_mode this_insn_cc0_mode
;
5424 struct write_data writes_memory
;
5425 static struct write_data init
= {0, 0, 0, 0};
5428 struct table_elt
*src_eqv_elt
= 0;
5429 int src_eqv_volatile
;
5430 int src_eqv_in_memory
;
5431 int src_eqv_in_struct
;
5432 int src_eqv_hash_code
;
5437 writes_memory
= init
;
5439 /* Find all the SETs and CLOBBERs in this instruction.
5440 Record all the SETs in the array `set' and count them.
5441 Also determine whether there is a CLOBBER that invalidates
5442 all memory references, or all references at varying addresses. */
5444 if (GET_CODE (x
) == SET
)
5446 sets
= (struct set
*) alloca (sizeof (struct set
));
5449 /* Ignore SETs that are unconditional jumps.
5450 They never need cse processing, so this does not hurt.
5451 The reason is not efficiency but rather
5452 so that we can test at the end for instructions
5453 that have been simplified to unconditional jumps
5454 and not be misled by unchanged instructions
5455 that were unconditional jumps to begin with. */
5456 if (SET_DEST (x
) == pc_rtx
5457 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
5460 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
5461 The hard function value register is used only once, to copy to
5462 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
5463 Ensure we invalidate the destination register. On the 80386 no
5464 other code would invalidate it since it is a fixed_reg. */
5466 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5468 canon_reg (SET_SRC (x
), insn
);
5469 apply_change_group ();
5470 fold_rtx (SET_SRC (x
), insn
);
5471 invalidate (SET_DEST (x
));
5476 else if (GET_CODE (x
) == PARALLEL
)
5478 register int lim
= XVECLEN (x
, 0);
5480 sets
= (struct set
*) alloca (lim
* sizeof (struct set
));
5482 /* Find all regs explicitly clobbered in this insn,
5483 and ensure they are not replaced with any other regs
5484 elsewhere in this insn.
5485 When a reg that is clobbered is also used for input,
5486 we should presume that that is for a reason,
5487 and we should not substitute some other register
5488 which is not supposed to be clobbered.
5489 Therefore, this loop cannot be merged into the one below
5490 because a CALL may precede a CLOBBER and refer to the
5491 value clobbered. We must not let a canonicalization do
5492 anything in that case. */
5493 for (i
= 0; i
< lim
; i
++)
5495 register rtx y
= XVECEXP (x
, 0, i
);
5496 if (GET_CODE (y
) == CLOBBER
5497 && (GET_CODE (XEXP (y
, 0)) == REG
5498 || GET_CODE (XEXP (y
, 0)) == SUBREG
))
5499 invalidate (XEXP (y
, 0));
5502 for (i
= 0; i
< lim
; i
++)
5504 register rtx y
= XVECEXP (x
, 0, i
);
5505 if (GET_CODE (y
) == SET
)
5507 /* As above, we ignore unconditional jumps and call-insns. */
5508 if (GET_CODE (SET_SRC (y
)) == CALL
)
5510 canon_reg (SET_SRC (y
), insn
);
5511 apply_change_group ();
5512 fold_rtx (SET_SRC (y
), insn
);
5513 invalidate (SET_DEST (y
));
5515 else if (SET_DEST (y
) == pc_rtx
5516 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
5519 sets
[n_sets
++].rtl
= y
;
5521 else if (GET_CODE (y
) == CLOBBER
)
5523 /* If we clobber memory, take note of that,
5524 and canon the address.
5525 This does nothing when a register is clobbered
5526 because we have already invalidated the reg. */
5527 if (GET_CODE (XEXP (y
, 0)) == MEM
)
5529 canon_reg (XEXP (y
, 0), 0);
5530 note_mem_written (XEXP (y
, 0), &writes_memory
);
5533 else if (GET_CODE (y
) == USE
5534 && ! (GET_CODE (XEXP (y
, 0)) == REG
5535 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
5537 else if (GET_CODE (y
) == CALL
)
5539 canon_reg (y
, insn
);
5540 apply_change_group ();
5545 else if (GET_CODE (x
) == CLOBBER
)
5547 if (GET_CODE (XEXP (x
, 0)) == MEM
)
5549 canon_reg (XEXP (x
, 0), 0);
5550 note_mem_written (XEXP (x
, 0), &writes_memory
);
5554 /* Canonicalize a USE of a pseudo register or memory location. */
5555 else if (GET_CODE (x
) == USE
5556 && ! (GET_CODE (XEXP (x
, 0)) == REG
5557 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
5558 canon_reg (XEXP (x
, 0), 0);
5559 else if (GET_CODE (x
) == CALL
)
5561 canon_reg (x
, insn
);
5562 apply_change_group ();
5566 if (n_sets
== 1 && REG_NOTES (insn
) != 0)
5568 /* Store the equivalent value in SRC_EQV, if different. */
5569 rtx tem
= find_reg_note (insn
, REG_EQUAL
, 0);
5571 if (tem
&& ! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
)))
5572 src_eqv
= canon_reg (XEXP (tem
, 0), 0);
5575 /* Canonicalize sources and addresses of destinations.
5576 We do this in a separate pass to avoid problems when a MATCH_DUP is
5577 present in the insn pattern. In that case, we want to ensure that
5578 we don't break the duplicate nature of the pattern. So we will replace
5579 both operands at the same time. Otherwise, we would fail to find an
5580 equivalent substitution in the loop calling validate_change below.
5582 We used to suppress canonicalization of DEST if it appears in SRC,
5583 but we don't do this any more. */
5585 for (i
= 0; i
< n_sets
; i
++)
5587 rtx dest
= SET_DEST (sets
[i
].rtl
);
5588 rtx src
= SET_SRC (sets
[i
].rtl
);
5589 rtx
new = canon_reg (src
, insn
);
5591 if ((GET_CODE (new) == REG
&& GET_CODE (src
) == REG
5592 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
5593 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
5594 || insn_n_dups
[recog_memoized (insn
)] > 0)
5595 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
5597 SET_SRC (sets
[i
].rtl
) = new;
5599 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
5601 validate_change (insn
, &XEXP (dest
, 1),
5602 canon_reg (XEXP (dest
, 1), insn
), 1);
5603 validate_change (insn
, &XEXP (dest
, 2),
5604 canon_reg (XEXP (dest
, 2), insn
), 1);
5607 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
5608 || GET_CODE (dest
) == ZERO_EXTRACT
5609 || GET_CODE (dest
) == SIGN_EXTRACT
)
5610 dest
= XEXP (dest
, 0);
5612 if (GET_CODE (dest
) == MEM
)
5613 canon_reg (dest
, insn
);
5616 /* Now that we have done all the replacements, we can apply the change
5617 group and see if they all work. Note that this will cause some
5618 canonicalizations that would have worked individually not to be applied
5619 because some other canonicalization didn't work, but this should not
5622 apply_change_group ();
5624 /* Set sets[i].src_elt to the class each source belongs to.
5625 Detect assignments from or to volatile things
5626 and set set[i] to zero so they will be ignored
5627 in the rest of this function.
5629 Nothing in this loop changes the hash table or the register chains. */
5631 for (i
= 0; i
< n_sets
; i
++)
5633 register rtx src
, dest
;
5634 register rtx src_folded
;
5635 register struct table_elt
*elt
= 0, *p
;
5636 enum machine_mode mode
;
5639 rtx src_related
= 0;
5640 struct table_elt
*src_const_elt
= 0;
5641 int src_cost
= 10000, src_eqv_cost
= 10000, src_folded_cost
= 10000;
5642 int src_related_cost
= 10000, src_elt_cost
= 10000;
5643 /* Set non-zero if we need to call force_const_mem on with the
5644 contents of src_folded before using it. */
5645 int src_folded_force_flag
= 0;
5647 dest
= SET_DEST (sets
[i
].rtl
);
5648 src
= SET_SRC (sets
[i
].rtl
);
5650 /* If SRC is a constant that has no machine mode,
5651 hash it with the destination's machine mode.
5652 This way we can keep different modes separate. */
5654 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5655 sets
[i
].mode
= mode
;
5659 enum machine_mode eqvmode
= mode
;
5660 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5661 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5663 hash_arg_in_memory
= 0;
5664 hash_arg_in_struct
= 0;
5665 src_eqv
= fold_rtx (src_eqv
, insn
);
5666 src_eqv_hash_code
= HASH (src_eqv
, eqvmode
);
5668 /* Find the equivalence class for the equivalent expression. */
5671 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash_code
, eqvmode
);
5673 src_eqv_volatile
= do_not_record
;
5674 src_eqv_in_memory
= hash_arg_in_memory
;
5675 src_eqv_in_struct
= hash_arg_in_struct
;
5678 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5679 value of the INNER register, not the destination. So it is not
5680 a legal substitution for the source. But save it for later. */
5681 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5684 src_eqv_here
= src_eqv
;
5686 /* Simplify and foldable subexpressions in SRC. Then get the fully-
5687 simplified result, which may not necessarily be valid. */
5688 src_folded
= fold_rtx (src
, insn
);
5690 /* If storing a constant in a bitfield, pre-truncate the constant
5691 so we will be able to record it later. */
5692 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5693 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
5695 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5697 if (GET_CODE (src
) == CONST_INT
5698 && GET_CODE (width
) == CONST_INT
5699 && INTVAL (width
) < HOST_BITS_PER_INT
5700 && (INTVAL (src
) & ((-1) << INTVAL (width
))))
5701 src_folded
= gen_rtx (CONST_INT
, VOIDmode
,
5702 INTVAL (src
) & ((1 << INTVAL (width
)) - 1));
5705 /* Compute SRC's hash code, and also notice if it
5706 should not be recorded at all. In that case,
5707 prevent any further processing of this assignment. */
5709 hash_arg_in_memory
= 0;
5710 hash_arg_in_struct
= 0;
5713 sets
[i
].src_hash_code
= HASH (src
, mode
);
5714 sets
[i
].src_volatile
= do_not_record
;
5715 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5716 sets
[i
].src_in_struct
= hash_arg_in_struct
;
5718 /* If source is a perverse subreg (such as QI treated as an SI),
5719 treat it as volatile. It may do the work of an SI in one context
5720 where the extra bits are not being used, but cannot replace an SI
5722 if (GET_CODE (src
) == SUBREG
5723 && (GET_MODE_SIZE (GET_MODE (src
))
5724 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
5725 sets
[i
].src_volatile
= 1;
5727 /* Locate all possible equivalent forms for SRC. Try to replace
5728 SRC in the insn with each cheaper equivalent.
5730 We have the following types of equivalents: SRC itself, a folded
5731 version, a value given in a REG_EQUAL note, or a value related
5734 Each of these equivalents may be part of an additional class
5735 of equivalents (if more than one is in the table, they must be in
5736 the same class; we check for this).
5738 If the source is volatile, we don't do any table lookups.
5740 We note any constant equivalent for possible later use in a
5743 if (!sets
[i
].src_volatile
)
5744 elt
= lookup (src
, sets
[i
].src_hash_code
, mode
);
5746 sets
[i
].src_elt
= elt
;
5748 if (elt
&& src_eqv_here
&& src_eqv_elt
)
5750 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
5752 /* The REG_EQUAL is indicating that two formerly distinct
5753 classes are now equivalent. So merge them. */
5754 merge_equiv_classes (elt
, src_eqv_elt
);
5755 src_eqv_hash_code
= HASH (src_eqv
, elt
->mode
);
5756 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash_code
, elt
->mode
);
5762 else if (src_eqv_elt
)
5765 /* Try to find a constant somewhere and record it in `src_const'.
5766 Record its table element, if any, in `src_const_elt'. Look in
5767 any known equivalences first. (If the constant is not in the
5768 table, also set `sets[i].src_const_hash_code'). */
5770 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
5774 src_const_elt
= elt
;
5779 && (CONSTANT_P (src_folded
)
5780 /* Consider (minus (label_ref L1) (label_ref L2)) as
5781 "constant" here so we will record it. This allows us
5782 to fold switch statements when an ADDR_DIFF_VEC is used. */
5783 || (GET_CODE (src_folded
) == MINUS
5784 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
5785 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
5786 src_const
= src_folded
, src_const_elt
= elt
;
5787 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
5788 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
5790 /* If we don't know if the constant is in the table, get its
5791 hash code and look it up. */
5792 if (src_const
&& src_const_elt
== 0)
5794 sets
[i
].src_const_hash_code
= HASH (src_const
, mode
);
5795 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash_code
,
5799 sets
[i
].src_const
= src_const
;
5800 sets
[i
].src_const_elt
= src_const_elt
;
5802 /* If the constant and our source are both in the table, mark them as
5803 equivalent. Otherwise, if a constant is in the table but the source
5804 isn't, set ELT to it. */
5805 if (src_const_elt
&& elt
5806 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
5807 merge_equiv_classes (elt
, src_const_elt
);
5808 else if (src_const_elt
&& elt
== 0)
5809 elt
= src_const_elt
;
5811 /* See if there is a register linearly related to a constant
5812 equivalent of SRC. */
5814 && (GET_CODE (src_const
) == CONST
5815 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
5817 src_related
= use_related_value (src_const
, src_const_elt
);
5820 struct table_elt
*src_related_elt
5821 = lookup (src_related
, HASH (src_related
, mode
), mode
);
5822 if (src_related_elt
&& elt
)
5824 if (elt
->first_same_value
5825 != src_related_elt
->first_same_value
)
5826 /* This can occur when we previously saw a CONST
5827 involving a SYMBOL_REF and then see the SYMBOL_REF
5828 twice. Merge the involved classes. */
5829 merge_equiv_classes (elt
, src_related_elt
);
5832 src_related_elt
= 0;
5834 else if (src_related_elt
&& elt
== 0)
5835 elt
= src_related_elt
;
5839 /* See if we have a CONST_INT that is already in a register in a
5842 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
5843 && GET_MODE_CLASS (mode
) == MODE_INT
5844 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
5846 enum machine_mode wider_mode
;
5848 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
5849 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
5850 && src_related
== 0;
5851 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
5853 struct table_elt
*const_elt
5854 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
5859 for (const_elt
= const_elt
->first_same_value
;
5860 const_elt
; const_elt
= const_elt
->next_same_value
)
5861 if (GET_CODE (const_elt
->exp
) == REG
)
5863 src_related
= gen_lowpart_if_possible (mode
,
5870 /* Another possibility is that we have an AND with a constant in
5871 a mode narrower than a word. If so, it might have been generated
5872 as part of an "if" which would narrow the AND. If we already
5873 have done the AND in a wider mode, we can use a SUBREG of that
5876 if (flag_expensive_optimizations
&& ! src_related
5877 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
5878 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
5880 enum machine_mode tmode
;
5881 rtx new_and
= gen_rtx (AND
, VOIDmode
, 0, XEXP (src
, 1));
5883 for (tmode
= GET_MODE_WIDER_MODE (mode
);
5884 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
5885 tmode
= GET_MODE_WIDER_MODE (tmode
))
5887 rtx inner
= gen_lowpart_if_possible (tmode
, XEXP (src
, 0));
5888 struct table_elt
*larger_elt
;
5892 PUT_MODE (new_and
, tmode
);
5893 XEXP (new_and
, 0) = inner
;
5894 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
5895 if (larger_elt
== 0)
5898 for (larger_elt
= larger_elt
->first_same_value
;
5899 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5900 if (GET_CODE (larger_elt
->exp
) == REG
)
5903 = gen_lowpart_if_possible (mode
, larger_elt
->exp
);
5913 if (src
== src_folded
)
5916 /* At this point, ELT, if non-zero, points to a class of expressions
5917 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5918 and SRC_RELATED, if non-zero, each contain additional equivalent
5919 expressions. Prune these latter expressions by deleting expressions
5920 already in the equivalence class.
5922 Check for an equivalent identical to the destination. If found,
5923 this is the preferred equivalent since it will likely lead to
5924 elimination of the insn. Indicate this by placing it in
5927 if (elt
) elt
= elt
->first_same_value
;
5928 for (p
= elt
; p
; p
= p
->next_same_value
)
5930 enum rtx_code code
= GET_CODE (p
->exp
);
5932 /* If the expression is not valid, ignore it. Then we do not
5933 have to check for validity below. In most cases, we can use
5934 `rtx_equal_p', since canonicalization has already been done. */
5935 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
5938 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
5940 else if (src_folded
&& GET_CODE (src_folded
) == code
5941 && rtx_equal_p (src_folded
, p
->exp
))
5943 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
5944 && rtx_equal_p (src_eqv_here
, p
->exp
))
5946 else if (src_related
&& GET_CODE (src_related
) == code
5947 && rtx_equal_p (src_related
, p
->exp
))
5950 /* This is the same as the destination of the insns, we want
5951 to prefer it. Copy it to src_related. The code below will
5952 then give it a negative cost. */
5953 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
5958 /* Find the cheapest valid equivalent, trying all the available
5959 possibilities. Prefer items not in the hash table to ones
5960 that are when they are equal cost. Note that we can never
5961 worsen an insn as the current contents will also succeed.
5962 If we find an equivalent identical to the destination, use it as best,
5963 since this insn will probably be eliminated in that case. */
5966 if (rtx_equal_p (src
, dest
))
5969 src_cost
= COST (src
);
5974 if (rtx_equal_p (src_eqv_here
, dest
))
5977 src_eqv_cost
= COST (src_eqv_here
);
5982 if (rtx_equal_p (src_folded
, dest
))
5983 src_folded_cost
= -1;
5985 src_folded_cost
= COST (src_folded
);
5990 if (rtx_equal_p (src_related
, dest
))
5991 src_related_cost
= -1;
5993 src_related_cost
= COST (src_related
);
5996 /* If this was an indirect jump insn, a known label will really be
5997 cheaper even though it looks more expensive. */
5998 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
5999 src_folded
= src_const
, src_folded_cost
= -1;
6001 /* Terminate loop when replacement made. This must terminate since
6002 the current contents will be tested and will always be valid. */
6007 /* Skip invalid entries. */
6008 while (elt
&& GET_CODE (elt
->exp
) != REG
6009 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6010 elt
= elt
->next_same_value
;
6012 if (elt
) src_elt_cost
= elt
->cost
;
6014 /* Find cheapest and skip it for the next time. For items
6015 of equal cost, use this order:
6016 src_folded, src, src_eqv, src_related and hash table entry. */
6017 if (src_folded_cost
<= src_cost
6018 && src_folded_cost
<= src_eqv_cost
6019 && src_folded_cost
<= src_related_cost
6020 && src_folded_cost
<= src_elt_cost
)
6022 trial
= src_folded
, src_folded_cost
= 10000;
6023 if (src_folded_force_flag
)
6024 trial
= force_const_mem (mode
, trial
);
6026 else if (src_cost
<= src_eqv_cost
6027 && src_cost
<= src_related_cost
6028 && src_cost
<= src_elt_cost
)
6029 trial
= src
, src_cost
= 10000;
6030 else if (src_eqv_cost
<= src_related_cost
6031 && src_eqv_cost
<= src_elt_cost
)
6032 trial
= src_eqv_here
, src_eqv_cost
= 10000;
6033 else if (src_related_cost
<= src_elt_cost
)
6034 trial
= src_related
, src_related_cost
= 10000;
6037 trial
= copy_rtx (elt
->exp
);
6038 elt
= elt
->next_same_value
;
6039 src_elt_cost
= 10000;
6042 /* We don't normally have an insn matching (set (pc) (pc)), so
6043 check for this separately here. We will delete such an
6046 Tablejump insns contain a USE of the table, so simply replacing
6047 the operand with the constant won't match. This is simply an
6048 unconditional branch, however, and is therefore valid. Just
6049 insert the substitution here and we will delete and re-emit
6052 if (n_sets
== 1 && dest
== pc_rtx
6054 || (GET_CODE (trial
) == LABEL_REF
6055 && ! condjump_p (insn
))))
6057 /* If TRIAL is a label in front of a jump table, we are
6058 really falling through the switch (this is how casesi
6059 insns work), so we must branch around the table. */
6060 if (GET_CODE (trial
) == CODE_LABEL
6061 && NEXT_INSN (trial
) != 0
6062 && GET_CODE (NEXT_INSN (trial
)) == JUMP_INSN
6063 && (GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_DIFF_VEC
6064 || GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_VEC
))
6066 trial
= gen_rtx (LABEL_REF
, Pmode
, get_label_after (trial
));
6068 SET_SRC (sets
[i
].rtl
) = trial
;
6072 /* Look for a substitution that makes a valid insn. */
6073 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
6075 SET_SRC (sets
[i
].rtl
) = canon_reg (SET_SRC (sets
[i
].rtl
), insn
);
6079 /* If we previously found constant pool entries for
6080 constants and this is a constant, try making a
6081 pool entry. Put it in src_folded unless we already have done
6082 this since that is where it likely came from. */
6084 else if (constant_pool_entries_cost
6085 && CONSTANT_P (trial
)
6086 && (src_folded
== 0 || GET_CODE (src_folded
) != MEM
)
6087 && GET_MODE_CLASS (mode
) != MODE_CC
)
6089 src_folded_force_flag
= 1;
6091 src_folded_cost
= constant_pool_entries_cost
;
6095 src
= SET_SRC (sets
[i
].rtl
);
6097 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6098 However, there is an important exception: If both are registers
6099 that are not the head of their equivalence class, replace SET_SRC
6100 with the head of the class. If we do not do this, we will have
6101 both registers live over a portion of the basic block. This way,
6102 their lifetimes will likely abut instead of overlapping. */
6103 if (GET_CODE (dest
) == REG
6104 && REGNO_QTY_VALID_P (REGNO (dest
))
6105 && qty_mode
[reg_qty
[REGNO (dest
)]] == GET_MODE (dest
)
6106 && qty_first_reg
[reg_qty
[REGNO (dest
)]] != REGNO (dest
)
6107 && GET_CODE (src
) == REG
&& REGNO (src
) == REGNO (dest
)
6108 /* Don't do this if the original insn had a hard reg as
6110 && (GET_CODE (sets
[i
].src
) != REG
6111 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
))
6112 /* We can't call canon_reg here because it won't do anything if
6113 SRC is a hard register. */
6115 int first
= qty_first_reg
[reg_qty
[REGNO (src
)]];
6117 src
= SET_SRC (sets
[i
].rtl
)
6118 = first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
6119 : gen_rtx (REG
, GET_MODE (src
), first
);
6121 /* If we had a constant that is cheaper than what we are now
6122 setting SRC to, use that constant. We ignored it when we
6123 thought we could make this into a no-op. */
6124 if (src_const
&& COST (src_const
) < COST (src
)
6125 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
), src_const
, 0))
6129 /* If we made a change, recompute SRC values. */
6130 if (src
!= sets
[i
].src
)
6133 hash_arg_in_memory
= 0;
6134 hash_arg_in_struct
= 0;
6136 sets
[i
].src_hash_code
= HASH (src
, mode
);
6137 sets
[i
].src_volatile
= do_not_record
;
6138 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6139 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6140 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash_code
, mode
);
6143 /* If this is a single SET, we are setting a register, and we have an
6144 equivalent constant, we want to add a REG_NOTE. We don't want
6145 to write a REG_EQUAL note for a constant pseudo since verifying that
6146 that pseudo hasn't been eliminated is a pain. Such a note also
6147 won't help anything. */
6148 if (n_sets
== 1 && src_const
&& GET_CODE (dest
) == REG
6149 && GET_CODE (src_const
) != REG
)
6151 rtx tem
= find_reg_note (insn
, REG_EQUAL
, 0);
6153 /* Record the actual constant value in a REG_EQUAL note, making
6154 a new one if one does not already exist. */
6156 XEXP (tem
, 0) = src_const
;
6158 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
6159 src_const
, REG_NOTES (insn
));
6161 /* If storing a constant value in a register that
6162 previously held the constant value 0,
6163 record this fact with a REG_WAS_0 note on this insn.
6165 Note that the *register* is required to have previously held 0,
6166 not just any register in the quantity and we must point to the
6167 insn that set that register to zero.
6169 Rather than track each register individually, we just see if
6170 the last set for this quantity was for this register. */
6172 if (REGNO_QTY_VALID_P (REGNO (dest
))
6173 && qty_const
[reg_qty
[REGNO (dest
)]] == const0_rtx
)
6175 /* See if we previously had a REG_WAS_0 note. */
6176 rtx note
= find_reg_note (insn
, REG_WAS_0
, 0);
6177 rtx const_insn
= qty_const_insn
[reg_qty
[REGNO (dest
)]];
6179 if ((tem
= single_set (const_insn
)) != 0
6180 && rtx_equal_p (SET_DEST (tem
), dest
))
6183 XEXP (note
, 0) = const_insn
;
6185 REG_NOTES (insn
) = gen_rtx (INSN_LIST
, REG_WAS_0
,
6186 const_insn
, REG_NOTES (insn
));
6191 /* Now deal with the destination. */
6193 sets
[i
].inner_dest_loc
= &SET_DEST (sets
[0].rtl
);
6195 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
6196 to the MEM or REG within it. */
6197 while (GET_CODE (dest
) == SIGN_EXTRACT
6198 || GET_CODE (dest
) == ZERO_EXTRACT
6199 || GET_CODE (dest
) == SUBREG
6200 || GET_CODE (dest
) == STRICT_LOW_PART
)
6202 sets
[i
].inner_dest_loc
= &XEXP (dest
, 0);
6203 dest
= XEXP (dest
, 0);
6206 sets
[i
].inner_dest
= dest
;
6208 if (GET_CODE (dest
) == MEM
)
6210 dest
= fold_rtx (dest
, insn
);
6212 /* Decide whether we invalidate everything in memory,
6213 or just things at non-fixed places.
6214 Writing a large aggregate must invalidate everything
6215 because we don't know how long it is. */
6216 note_mem_written (dest
, &writes_memory
);
6219 /* Compute the hash code of the destination now,
6220 before the effects of this instruction are recorded,
6221 since the register values used in the address computation
6222 are those before this instruction. */
6223 sets
[i
].dest_hash_code
= HASH (dest
, mode
);
6225 /* Don't enter a bit-field in the hash table
6226 because the value in it after the store
6227 may not equal what was stored, due to truncation. */
6229 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6230 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6232 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6234 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
6235 && GET_CODE (width
) == CONST_INT
6236 && INTVAL (width
) < HOST_BITS_PER_INT
6237 && ! (INTVAL (src_const
) & ((-1) << INTVAL (width
))))
6238 /* Exception: if the value is constant,
6239 and it won't be truncated, record it. */
6243 /* This is chosen so that the destination will be invalidated
6244 but no new value will be recorded.
6245 We must invalidate because sometimes constant
6246 values can be recorded for bitfields. */
6247 sets
[i
].src_elt
= 0;
6248 sets
[i
].src_volatile
= 1;
6254 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
6256 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
6258 PUT_CODE (insn
, NOTE
);
6259 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
6260 NOTE_SOURCE_FILE (insn
) = 0;
6261 cse_jumps_altered
= 1;
6262 /* One less use of the label this insn used to jump to. */
6263 --LABEL_NUSES (JUMP_LABEL (insn
));
6264 /* No more processing for this set. */
6268 /* If this SET is now setting PC to a label, we know it used to
6269 be a conditional or computed branch. So we see if we can follow
6270 it. If it was a computed branch, delete it and re-emit. */
6271 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
6275 /* If this is not in the format for a simple branch and
6276 we are the only SET in it, re-emit it. */
6277 if (! simplejump_p (insn
) && n_sets
== 1)
6279 rtx
new = emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
6280 JUMP_LABEL (new) = XEXP (src
, 0);
6281 LABEL_NUSES (XEXP (src
, 0))++;
6286 /* Now that we've converted this jump to an unconditional jump,
6287 there is dead code after it. Delete the dead code until we
6288 reach a BARRIER, the end of the function, or a label. Do
6289 not delete NOTEs except for NOTE_INSN_DELETED since later
6290 phases assume these notes are retained. */
6294 while (NEXT_INSN (p
) != 0
6295 && GET_CODE (NEXT_INSN (p
)) != BARRIER
6296 && GET_CODE (NEXT_INSN (p
)) != CODE_LABEL
)
6298 if (GET_CODE (NEXT_INSN (p
)) != NOTE
6299 || NOTE_LINE_NUMBER (NEXT_INSN (p
)) == NOTE_INSN_DELETED
)
6300 delete_insn (NEXT_INSN (p
));
6305 /* If we don't have a BARRIER immediately after INSN, put one there.
6306 Much code assumes that there are no NOTEs between a JUMP_INSN and
6309 if (NEXT_INSN (insn
) == 0
6310 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
6311 emit_barrier_after (insn
);
6313 /* We might have two BARRIERs separated by notes. Delete the second
6316 if (p
!= insn
&& NEXT_INSN (p
) != 0
6317 && GET_CODE (NEXT_INSN (p
)) == BARRIER
)
6318 delete_insn (NEXT_INSN (p
));
6320 cse_jumps_altered
= 1;
6324 /* If destination is volatile, invalidate it and then do no further
6325 processing for this assignment. */
6327 else if (do_not_record
)
6329 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
6330 || GET_CODE (dest
) == MEM
)
6335 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
6336 sets
[i
].dest_hash_code
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
6339 /* If setting CC0, record what it was set to, or a constant, if it
6340 is equivalent to a constant. If it is being set to a floating-point
6341 value, make a COMPARE with the appropriate constant of 0. If we
6342 don't do this, later code can interpret this as a test against
6343 const0_rtx, which can cause problems if we try to put it into an
6344 insn as a floating-point operand. */
6345 if (dest
== cc0_rtx
)
6347 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
6348 this_insn_cc0_mode
= mode
;
6349 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
6350 this_insn_cc0
= gen_rtx (COMPARE
, VOIDmode
, this_insn_cc0
,
6356 /* Now enter all non-volatile source expressions in the hash table
6357 if they are not already present.
6358 Record their equivalence classes in src_elt.
6359 This way we can insert the corresponding destinations into
6360 the same classes even if the actual sources are no longer in them
6361 (having been invalidated). */
6363 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
6364 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
6366 register struct table_elt
*elt
;
6367 register struct table_elt
*classp
= sets
[0].src_elt
;
6368 rtx dest
= SET_DEST (sets
[0].rtl
);
6369 enum machine_mode eqvmode
= GET_MODE (dest
);
6371 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6373 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6376 if (insert_regs (src_eqv
, classp
, 0))
6377 src_eqv_hash_code
= HASH (src_eqv
, eqvmode
);
6378 elt
= insert (src_eqv
, classp
, src_eqv_hash_code
, eqvmode
);
6379 elt
->in_memory
= src_eqv_in_memory
;
6380 elt
->in_struct
= src_eqv_in_struct
;
6384 for (i
= 0; i
< n_sets
; i
++)
6385 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
6386 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
6388 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
6390 /* REG_EQUAL in setting a STRICT_LOW_PART
6391 gives an equivalent for the entire destination register,
6392 not just for the subreg being stored in now.
6393 This is a more interesting equivalence, so we arrange later
6394 to treat the entire reg as the destination. */
6395 sets
[i
].src_elt
= src_eqv_elt
;
6396 sets
[i
].src_hash_code
= src_eqv_hash_code
;
6400 /* Insert source and constant equivalent into hash table, if not
6402 register struct table_elt
*classp
= src_eqv_elt
;
6403 register rtx src
= sets
[i
].src
;
6404 register rtx dest
= SET_DEST (sets
[i
].rtl
);
6405 enum machine_mode mode
6406 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6408 if (sets
[i
].src_elt
== 0)
6410 register struct table_elt
*elt
;
6412 /* Note that these insert_regs calls cannot remove
6413 any of the src_elt's, because they would have failed to
6414 match if not still valid. */
6415 if (insert_regs (src
, classp
, 0))
6416 sets
[i
].src_hash_code
= HASH (src
, mode
);
6417 elt
= insert (src
, classp
, sets
[i
].src_hash_code
, mode
);
6418 elt
->in_memory
= sets
[i
].src_in_memory
;
6419 elt
->in_struct
= sets
[i
].src_in_struct
;
6420 sets
[i
].src_elt
= classp
= elt
;
6423 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
6424 && src
!= sets
[i
].src_const
6425 && ! rtx_equal_p (sets
[i
].src_const
, src
))
6426 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
6427 sets
[i
].src_const_hash_code
, mode
);
6430 else if (sets
[i
].src_elt
== 0)
6431 /* If we did not insert the source into the hash table (e.g., it was
6432 volatile), note the equivalence class for the REG_EQUAL value, if any,
6433 so that the destination goes into that class. */
6434 sets
[i
].src_elt
= src_eqv_elt
;
6436 invalidate_from_clobbers (&writes_memory
, x
);
6438 /* Some registers are invalidated by subroutine calls. Memory is
6439 invalidated by non-constant calls. */
6441 if (GET_CODE (insn
) == CALL_INSN
)
6443 static struct write_data everything
= {0, 1, 1, 1};
6445 if (! CONST_CALL_P (insn
))
6446 invalidate_memory (&everything
);
6447 invalidate_for_call ();
6450 /* Now invalidate everything set by this instruction.
6451 If a SUBREG or other funny destination is being set,
6452 sets[i].rtl is still nonzero, so here we invalidate the reg
6453 a part of which is being set. */
6455 for (i
= 0; i
< n_sets
; i
++)
6458 register rtx dest
= sets
[i
].inner_dest
;
6460 /* Needed for registers to remove the register from its
6461 previous quantity's chain.
6462 Needed for memory if this is a nonvarying address, unless
6463 we have just done an invalidate_memory that covers even those. */
6464 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
6465 || (! writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
6469 /* Make sure registers mentioned in destinations
6470 are safe for use in an expression to be inserted.
6471 This removes from the hash table
6472 any invalid entry that refers to one of these registers.
6474 We don't care about the return value from mention_regs because
6475 we are going to hash the SET_DEST values unconditionally. */
6477 for (i
= 0; i
< n_sets
; i
++)
6478 if (sets
[i
].rtl
&& GET_CODE (SET_DEST (sets
[i
].rtl
)) != REG
)
6479 mention_regs (SET_DEST (sets
[i
].rtl
));
6481 /* We may have just removed some of the src_elt's from the hash table.
6482 So replace each one with the current head of the same class. */
6484 for (i
= 0; i
< n_sets
; i
++)
6487 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
6488 /* If elt was removed, find current head of same class,
6489 or 0 if nothing remains of that class. */
6491 register struct table_elt
*elt
= sets
[i
].src_elt
;
6493 while (elt
&& elt
->prev_same_value
)
6494 elt
= elt
->prev_same_value
;
6496 while (elt
&& elt
->first_same_value
== 0)
6497 elt
= elt
->next_same_value
;
6498 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
6502 /* Now insert the destinations into their equivalence classes. */
6504 for (i
= 0; i
< n_sets
; i
++)
6507 register rtx dest
= SET_DEST (sets
[i
].rtl
);
6508 register struct table_elt
*elt
;
6510 /* Don't record value if we are not supposed to risk allocating
6511 floating-point values in registers that might be wider than
6513 if ((flag_float_store
6514 && GET_CODE (dest
) == MEM
6515 && GET_MODE_CLASS (GET_MODE (dest
)) == MODE_FLOAT
)
6516 /* Don't record values of destinations set inside a libcall block
6517 since we might delete the libcall. Things should have been set
6518 up so we won't want to reuse such a value, but we play it safe
6521 /* If we didn't put a REG_EQUAL value or a source into the hash
6522 table, there is no point is recording DEST. */
6523 || sets
[i
].src_elt
== 0)
6526 /* STRICT_LOW_PART isn't part of the value BEING set,
6527 and neither is the SUBREG inside it.
6528 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6529 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6530 dest
= SUBREG_REG (XEXP (dest
, 0));
6532 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
6533 /* Registers must also be inserted into chains for quantities. */
6534 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
6535 /* If `insert_regs' changes something, the hash code must be
6537 sets
[i
].dest_hash_code
= HASH (dest
, GET_MODE (dest
));
6539 elt
= insert (dest
, sets
[i
].src_elt
,
6540 sets
[i
].dest_hash_code
, GET_MODE (dest
));
6541 elt
->in_memory
= GET_CODE (sets
[i
].inner_dest
) == MEM
;
6544 /* This implicitly assumes a whole struct
6545 need not have MEM_IN_STRUCT_P.
6546 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
6547 elt
->in_struct
= (MEM_IN_STRUCT_P (sets
[i
].inner_dest
)
6548 || sets
[i
].inner_dest
!= SET_DEST (sets
[i
].rtl
));
6551 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6552 narrower than M2, and both M1 and M2 are the same number of words,
6553 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6554 make that equivalence as well.
6556 However, BAR may have equivalences for which gen_lowpart_if_possible
6557 will produce a simpler value than gen_lowpart_if_possible applied to
6558 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6559 BAR's equivalences. If we don't get a simplified form, make
6560 the SUBREG. It will not be used in an equivalence, but will
6561 cause two similar assignments to be detected.
6563 Note the loop below will find SUBREG_REG (DEST) since we have
6564 already entered SRC and DEST of the SET in the table. */
6566 if (GET_CODE (dest
) == SUBREG
6567 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) / UNITS_PER_WORD
6568 == GET_MODE_SIZE (GET_MODE (dest
)) / UNITS_PER_WORD
)
6569 && (GET_MODE_SIZE (GET_MODE (dest
))
6570 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6571 && sets
[i
].src_elt
!= 0)
6573 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
6574 struct table_elt
*elt
, *classp
= 0;
6576 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
6577 elt
= elt
->next_same_value
)
6581 struct table_elt
*src_elt
;
6583 /* Ignore invalid entries. */
6584 if (GET_CODE (elt
->exp
) != REG
6585 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6588 new_src
= gen_lowpart_if_possible (new_mode
, elt
->exp
);
6590 new_src
= gen_rtx (SUBREG
, new_mode
, elt
->exp
, 0);
6592 src_hash
= HASH (new_src
, new_mode
);
6593 src_elt
= lookup (new_src
, src_hash
, new_mode
);
6595 /* Put the new source in the hash table is if isn't
6599 if (insert_regs (new_src
, classp
, 0))
6600 src_hash
= HASH (new_src
, new_mode
);
6601 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
6602 src_elt
->in_memory
= elt
->in_memory
;
6603 src_elt
->in_struct
= elt
->in_struct
;
6605 else if (classp
&& classp
!= src_elt
->first_same_value
)
6606 /* Show that two things that we've seen before are
6607 actually the same. */
6608 merge_equiv_classes (src_elt
, classp
);
6610 classp
= src_elt
->first_same_value
;
6615 /* Special handling for (set REG0 REG1)
6616 where REG0 is the "cheapest", cheaper than REG1.
6617 After cse, REG1 will probably not be used in the sequel,
6618 so (if easily done) change this insn to (set REG1 REG0) and
6619 replace REG1 with REG0 in the previous insn that computed their value.
6620 Then REG1 will become a dead store and won't cloud the situation
6621 for later optimizations.
6623 Do not make this change if REG1 is a hard register, because it will
6624 then be used in the sequel and we may be changing a two-operand insn
6625 into a three-operand insn.
6627 Also do not do this if we are operating on a copy of INSN. */
6629 if (n_sets
== 1 && sets
[0].rtl
&& GET_CODE (SET_DEST (sets
[0].rtl
)) == REG
6630 && NEXT_INSN (PREV_INSN (insn
)) == insn
6631 && GET_CODE (SET_SRC (sets
[0].rtl
)) == REG
6632 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
6633 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
)))
6634 && (qty_first_reg
[reg_qty
[REGNO (SET_SRC (sets
[0].rtl
))]]
6635 == REGNO (SET_DEST (sets
[0].rtl
))))
6637 rtx prev
= PREV_INSN (insn
);
6638 while (prev
&& GET_CODE (prev
) == NOTE
)
6639 prev
= PREV_INSN (prev
);
6641 if (prev
&& GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SET
6642 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
))
6644 rtx dest
= SET_DEST (sets
[0].rtl
);
6645 rtx note
= find_reg_note (prev
, REG_EQUIV
, 0);
6647 validate_change (prev
, & SET_DEST (PATTERN (prev
)), dest
, 1);
6648 validate_change (insn
, & SET_DEST (sets
[0].rtl
),
6649 SET_SRC (sets
[0].rtl
), 1);
6650 validate_change (insn
, & SET_SRC (sets
[0].rtl
), dest
, 1);
6651 apply_change_group ();
6653 /* If REG1 was equivalent to a constant, REG0 is not. */
6655 PUT_REG_NOTE_KIND (note
, REG_EQUAL
);
6657 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6658 any REG_WAS_0 note on INSN to PREV. */
6659 note
= find_reg_note (prev
, REG_WAS_0
, 0);
6661 remove_note (prev
, note
);
6663 note
= find_reg_note (insn
, REG_WAS_0
, 0);
6666 remove_note (insn
, note
);
6667 XEXP (note
, 1) = REG_NOTES (prev
);
6668 REG_NOTES (prev
) = note
;
6673 /* If this is a conditional jump insn, record any known equivalences due to
6674 the condition being tested. */
6676 last_jump_equiv_class
= 0;
6677 if (GET_CODE (insn
) == JUMP_INSN
6678 && n_sets
== 1 && GET_CODE (x
) == SET
6679 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
6680 record_jump_equiv (insn
, 0);
6683 /* If the previous insn set CC0 and this insn no longer references CC0,
6684 delete the previous insn. Here we use the fact that nothing expects CC0
6685 to be valid over an insn, which is true until the final pass. */
6686 if (prev_insn
&& GET_CODE (prev_insn
) == INSN
6687 && (tem
= single_set (prev_insn
)) != 0
6688 && SET_DEST (tem
) == cc0_rtx
6689 && ! reg_mentioned_p (cc0_rtx
, x
))
6691 PUT_CODE (prev_insn
, NOTE
);
6692 NOTE_LINE_NUMBER (prev_insn
) = NOTE_INSN_DELETED
;
6693 NOTE_SOURCE_FILE (prev_insn
) = 0;
6696 prev_insn_cc0
= this_insn_cc0
;
6697 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6703 /* Store 1 in *WRITES_PTR for those categories of memory ref
6704 that must be invalidated when the expression WRITTEN is stored in.
6705 If WRITTEN is null, say everything must be invalidated. */
6708 note_mem_written (written
, writes_ptr
)
6710 struct write_data
*writes_ptr
;
6712 static struct write_data everything
= {0, 1, 1, 1};
6715 *writes_ptr
= everything
;
6716 else if (GET_CODE (written
) == MEM
)
6718 /* Pushing or popping the stack invalidates just the stack pointer. */
6719 rtx addr
= XEXP (written
, 0);
6720 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
6721 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
6722 && GET_CODE (XEXP (addr
, 0)) == REG
6723 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
6728 else if (GET_MODE (written
) == BLKmode
)
6729 *writes_ptr
= everything
;
6730 else if (cse_rtx_addr_varies_p (written
))
6732 /* A varying address that is a sum indicates an array element,
6733 and that's just as good as a structure element
6734 in implying that we need not invalidate scalar variables. */
6735 if (!(MEM_IN_STRUCT_P (written
)
6736 || GET_CODE (XEXP (written
, 0)) == PLUS
))
6737 writes_ptr
->all
= 1;
6738 writes_ptr
->nonscalar
= 1;
6740 writes_ptr
->var
= 1;
6744 /* Perform invalidation on the basis of everything about an insn
6745 except for invalidating the actual places that are SET in it.
6746 This includes the places CLOBBERed, and anything that might
6747 alias with something that is SET or CLOBBERed.
6749 W points to the writes_memory for this insn, a struct write_data
6750 saying which kinds of memory references must be invalidated.
6751 X is the pattern of the insn. */
6754 invalidate_from_clobbers (w
, x
)
6755 struct write_data
*w
;
6758 /* If W->var is not set, W specifies no action.
6759 If W->all is set, this step gets all memory refs
6760 so they can be ignored in the rest of this function. */
6762 invalidate_memory (w
);
6766 if (reg_tick
[STACK_POINTER_REGNUM
] >= 0)
6767 reg_tick
[STACK_POINTER_REGNUM
]++;
6769 /* This should be *very* rare. */
6770 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
6771 invalidate (stack_pointer_rtx
);
6774 if (GET_CODE (x
) == CLOBBER
)
6776 rtx ref
= XEXP (x
, 0);
6778 && (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
6779 || (GET_CODE (ref
) == MEM
&& ! w
->all
)))
6782 else if (GET_CODE (x
) == PARALLEL
)
6785 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6787 register rtx y
= XVECEXP (x
, 0, i
);
6788 if (GET_CODE (y
) == CLOBBER
)
6790 rtx ref
= XEXP (y
, 0);
6792 &&(GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
6793 || (GET_CODE (ref
) == MEM
&& !w
->all
)))
6800 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6801 and replace any registers in them with either an equivalent constant
6802 or the canonical form of the register. If we are inside an address,
6803 only do this if the address remains valid.
6805 OBJECT is 0 except when within a MEM in which case it is the MEM.
6807 Return the replacement for X. */
6810 cse_process_notes (x
, object
)
6814 enum rtx_code code
= GET_CODE (x
);
6815 char *fmt
= GET_RTX_FORMAT (code
);
6832 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), x
);
6837 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
6838 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), 0);
6840 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), 0);
6846 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
6847 /* We don't substitute VOIDmode constants into these rtx,
6848 since they would impede folding. */
6849 if (GET_MODE (new) != VOIDmode
)
6850 validate_change (object
, &XEXP (x
, 0), new, 0);
6855 i
= reg_qty
[REGNO (x
)];
6857 /* Return a constant or a constant register. */
6858 if (REGNO_QTY_VALID_P (REGNO (x
))
6859 && qty_const
[i
] != 0
6860 && (CONSTANT_P (qty_const
[i
])
6861 || GET_CODE (qty_const
[i
]) == REG
))
6863 rtx
new = gen_lowpart_if_possible (GET_MODE (x
), qty_const
[i
]);
6868 /* Otherwise, canonicalize this register. */
6869 return canon_reg (x
, 0);
6872 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
6874 validate_change (object
, &XEXP (x
, i
),
6875 cse_process_notes (XEXP (x
, i
), object
), 0);
6880 /* Find common subexpressions between the end test of a loop and the beginning
6881 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6883 Often we have a loop where an expression in the exit test is used
6884 in the body of the loop. For example "while (*p) *q++ = *p++;".
6885 Because of the way we duplicate the loop exit test in front of the loop,
6886 however, we don't detect that common subexpression. This will be caught
6887 when global cse is implemented, but this is a quite common case.
6889 This function handles the most common cases of these common expressions.
6890 It is called after we have processed the basic block ending with the
6891 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6892 jumps to a label used only once. */
6895 cse_around_loop (loop_start
)
6900 struct table_elt
*p
;
6902 /* If the jump at the end of the loop doesn't go to the start, we don't
6904 for (insn
= PREV_INSN (loop_start
);
6905 insn
&& (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) >= 0);
6906 insn
= PREV_INSN (insn
))
6910 || GET_CODE (insn
) != NOTE
6911 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
6914 /* If the last insn of the loop (the end test) was an NE comparison,
6915 we will interpret it as an EQ comparison, since we fell through
6916 the loop. Any equivalences resulting from that comparison are
6917 therefore not valid and must be invalidated. */
6918 if (last_jump_equiv_class
)
6919 for (p
= last_jump_equiv_class
->first_same_value
; p
;
6920 p
= p
->next_same_value
)
6921 if (GET_CODE (p
->exp
) == MEM
|| GET_CODE (p
->exp
) == REG
6922 || GET_CODE (p
->exp
) == SUBREG
)
6923 invalidate (p
->exp
);
6925 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6926 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6928 The only thing we do with SET_DEST is invalidate entries, so we
6929 can safely process each SET in order. It is slightly less efficient
6930 to do so, but we only want to handle the most common cases. */
6932 for (insn
= NEXT_INSN (loop_start
);
6933 GET_CODE (insn
) != CALL_INSN
&& GET_CODE (insn
) != CODE_LABEL
6934 && ! (GET_CODE (insn
) == NOTE
6935 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
6936 insn
= NEXT_INSN (insn
))
6938 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
6939 && (GET_CODE (PATTERN (insn
)) == SET
6940 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
6941 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
6942 else if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
6943 && GET_CODE (PATTERN (insn
)) == PARALLEL
)
6944 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
6945 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
6946 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
6947 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
6952 /* Variable used for communications between the next two routines. */
6954 static struct write_data skipped_writes_memory
;
6956 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6957 since they are done elsewhere. This function is called via note_stores. */
6960 invalidate_skipped_set (dest
, set
)
6964 if (GET_CODE (set
) == CLOBBER
6971 if (GET_CODE (dest
) == MEM
)
6972 note_mem_written (dest
, &skipped_writes_memory
);
6974 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
6975 || (! skipped_writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
6979 /* Invalidate all insns from START up to the end of the function or the
6980 next label. This called when we wish to CSE around a block that is
6981 conditionally executed. */
6984 invalidate_skipped_block (start
)
6989 static struct write_data init
= {0, 0, 0, 0};
6990 static struct write_data everything
= {0, 1, 1, 1};
6992 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
6993 insn
= NEXT_INSN (insn
))
6995 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
6998 skipped_writes_memory
= init
;
7000 if (GET_CODE (insn
) == CALL_INSN
)
7002 invalidate_for_call ();
7003 skipped_writes_memory
= everything
;
7006 note_stores (PATTERN (insn
), invalidate_skipped_set
);
7007 invalidate_from_clobbers (&skipped_writes_memory
, PATTERN (insn
));
7011 /* Used for communication between the following two routines; contains a
7012 value to be checked for modification. */
7014 static rtx cse_check_loop_start_value
;
7016 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7017 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7020 cse_check_loop_start (x
, set
)
7024 if (cse_check_loop_start_value
== 0
7025 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
7028 if ((GET_CODE (x
) == MEM
&& GET_CODE (cse_check_loop_start_value
) == MEM
)
7029 || reg_overlap_mentioned_p (x
, cse_check_loop_start_value
))
7030 cse_check_loop_start_value
= 0;
7033 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7034 a loop that starts with the label at LOOP_START.
7036 If X is a SET, we see if its SET_SRC is currently in our hash table.
7037 If so, we see if it has a value equal to some register used only in the
7038 loop exit code (as marked by jump.c).
7040 If those two conditions are true, we search backwards from the start of
7041 the loop to see if that same value was loaded into a register that still
7042 retains its value at the start of the loop.
7044 If so, we insert an insn after the load to copy the destination of that
7045 load into the equivalent register and (try to) replace our SET_SRC with that
7048 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7051 cse_set_around_loop (x
, insn
, loop_start
)
7057 struct table_elt
*src_elt
;
7058 static struct write_data init
= {0, 0, 0, 0};
7059 struct write_data writes_memory
;
7061 writes_memory
= init
;
7063 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7064 are setting PC or CC0 or whose SET_SRC is already a register. */
7065 if (GET_CODE (x
) == SET
7066 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
7067 && GET_CODE (SET_SRC (x
)) != REG
)
7069 src_elt
= lookup (SET_SRC (x
),
7070 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
7071 GET_MODE (SET_DEST (x
)));
7074 for (src_elt
= src_elt
->first_same_value
; src_elt
;
7075 src_elt
= src_elt
->next_same_value
)
7076 if (GET_CODE (src_elt
->exp
) == REG
&& REG_LOOP_TEST_P (src_elt
->exp
)
7077 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
7081 /* Look for an insn in front of LOOP_START that sets
7082 something in the desired mode to SET_SRC (x) before we hit
7083 a label or CALL_INSN. */
7085 for (p
= prev_nonnote_insn (loop_start
);
7086 p
&& GET_CODE (p
) != CALL_INSN
7087 && GET_CODE (p
) != CODE_LABEL
;
7088 p
= prev_nonnote_insn (p
))
7089 if ((set
= single_set (p
)) != 0
7090 && GET_CODE (SET_DEST (set
)) == REG
7091 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
7092 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
7094 /* We now have to ensure that nothing between P
7095 and LOOP_START modified anything referenced in
7096 SET_SRC (x). We know that nothing within the loop
7097 can modify it, or we would have invalidated it in
7101 cse_check_loop_start_value
= SET_SRC (x
);
7102 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
7103 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
7104 note_stores (PATTERN (q
), cse_check_loop_start
);
7106 /* If nothing was changed and we can replace our
7107 SET_SRC, add an insn after P to copy its destination
7108 to what we will be replacing SET_SRC with. */
7109 if (cse_check_loop_start_value
7110 && validate_change (insn
, &SET_SRC (x
),
7112 emit_insn_after (gen_move_insn (src_elt
->exp
,
7120 /* Now invalidate anything modified by X. */
7121 note_mem_written (SET_DEST (x
), &writes_memory
);
7123 if (writes_memory
.var
)
7124 invalidate_memory (&writes_memory
);
7126 /* See comment on similar code in cse_insn for explanation of these tests. */
7127 if (GET_CODE (SET_DEST (x
)) == REG
|| GET_CODE (SET_DEST (x
)) == SUBREG
7128 || (GET_CODE (SET_DEST (x
)) == MEM
&& ! writes_memory
.all
7129 && ! cse_rtx_addr_varies_p (SET_DEST (x
))))
7130 invalidate (SET_DEST (x
));
7133 /* Find the end of INSN's basic block and return its range,
7134 the total number of SETs in all the insns of the block, the last insn of the
7135 block, and the branch path.
7137 The branch path indicates which branches should be followed. If a non-zero
7138 path size is specified, the block should be rescanned and a different set
7139 of branches will be taken. The branch path is only used if
7140 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
7142 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
7143 used to describe the block. It is filled in with the information about
7144 the current block. The incoming structure's branch path, if any, is used
7145 to construct the output branch path. */
7147 /* Define maximum length of a branch path. */
7149 #define PATHLENGTH 20
7151 struct cse_basic_block_data
{
7152 /* Lowest CUID value of insns in block. */
7154 /* Highest CUID value of insns in block. */
7156 /* Total number of SETs in block. */
7158 /* Last insn in the block. */
7160 /* Size of current branch path, if any. */
7162 /* Current branch path, indicating which branches will be taken. */
7163 struct branch_path
{
7164 /* The branch insn. */
7166 /* Whether it should be taken or not. AROUND is the same as taken
7167 except that it is used when the destination label is not preceded
7169 enum taken
{TAKEN
, NOT_TAKEN
, AROUND
} status
;
7174 cse_end_of_basic_block (insn
, data
, follow_jumps
, after_loop
, skip_blocks
)
7176 struct cse_basic_block_data
*data
;
7183 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
7184 rtx next
= GET_RTX_CLASS (GET_CODE (insn
)) == 'i' ? insn
: next_real_insn (insn
);
7185 int path_size
= data
->path_size
;
7189 /* Update the previous branch path, if any. If the last branch was
7190 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
7191 shorten the path by one and look at the previous branch. We know that
7192 at least one branch must have been taken if PATH_SIZE is non-zero. */
7193 while (path_size
> 0)
7195 if (data
->path
[path_size
- 1].status
!= NOT_TAKEN
)
7197 data
->path
[path_size
- 1].status
= NOT_TAKEN
;
7204 /* Scan to end of this basic block. */
7205 while (p
&& GET_CODE (p
) != CODE_LABEL
)
7207 /* Don't cse out the end of a loop. This makes a difference
7208 only for the unusual loops that always execute at least once;
7209 all other loops have labels there so we will stop in any case.
7210 Cse'ing out the end of the loop is dangerous because it
7211 might cause an invariant expression inside the loop
7212 to be reused after the end of the loop. This would make it
7213 hard to move the expression out of the loop in loop.c,
7214 especially if it is one of several equivalent expressions
7215 and loop.c would like to eliminate it.
7217 If we are running after loop.c has finished, we can ignore
7218 the NOTE_INSN_LOOP_END. */
7220 if (! after_loop
&& GET_CODE (p
) == NOTE
7221 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
7224 /* Don't cse over a call to setjmp; on some machines (eg vax)
7225 the regs restored by the longjmp come from
7226 a later time than the setjmp. */
7227 if (GET_CODE (p
) == NOTE
7228 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
7231 /* A PARALLEL can have lots of SETs in it,
7232 especially if it is really an ASM_OPERANDS. */
7233 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
7234 && GET_CODE (PATTERN (p
)) == PARALLEL
)
7235 nsets
+= XVECLEN (PATTERN (p
), 0);
7236 else if (GET_CODE (p
) != NOTE
)
7239 if (INSN_CUID (p
) > high_cuid
)
7240 high_cuid
= INSN_CUID (p
);
7241 if (INSN_CUID (p
) < low_cuid
)
7242 low_cuid
= INSN_CUID(p
);
7244 /* See if this insn is in our branch path. If it is and we are to
7246 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
7248 if (data
->path
[path_entry
].status
!= NOT_TAKEN
)
7251 /* Point to next entry in path, if any. */
7255 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
7256 was specified, we haven't reached our maximum path length, there are
7257 insns following the target of the jump, this is the only use of the
7258 jump label, and the target label is preceded by a BARRIER.
7260 Alternatively, we can follow the jump if it branches around a
7261 block of code and there are no other branches into the block.
7262 In this case invalidate_skipped_block will be called to invalidate any
7263 registers set in the block when following the jump. */
7265 else if ((follow_jumps
|| skip_blocks
) && path_size
< PATHLENGTH
- 1
7266 && GET_CODE (p
) == JUMP_INSN
7267 && GET_CODE (PATTERN (p
)) == SET
7268 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
7269 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
7270 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
7272 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
7273 if ((GET_CODE (q
) != NOTE
7274 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
7275 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_SETJMP
)
7276 && (GET_CODE (q
) != CODE_LABEL
|| LABEL_NUSES (q
) != 0))
7279 /* If we ran into a BARRIER, this code is an extension of the
7280 basic block when the branch is taken. */
7281 if (follow_jumps
&& q
!= 0 && GET_CODE (q
) == BARRIER
)
7283 /* Don't allow ourself to keep walking around an
7284 always-executed loop. */
7285 if (next_real_insn (q
) == next
)
7291 /* Similarly, don't put a branch in our path more than once. */
7292 for (i
= 0; i
< path_entry
; i
++)
7293 if (data
->path
[i
].branch
== p
)
7296 if (i
!= path_entry
)
7299 data
->path
[path_entry
].branch
= p
;
7300 data
->path
[path_entry
++].status
= TAKEN
;
7302 /* This branch now ends our path. It was possible that we
7303 didn't see this branch the last time around (when the
7304 insn in front of the target was a JUMP_INSN that was
7305 turned into a no-op). */
7306 path_size
= path_entry
;
7309 /* Mark block so we won't scan it again later. */
7310 PUT_MODE (NEXT_INSN (p
), QImode
);
7312 /* Detect a branch around a block of code. */
7313 else if (skip_blocks
&& q
!= 0 && GET_CODE (q
) != CODE_LABEL
)
7317 if (next_real_insn (q
) == next
)
7323 for (i
= 0; i
< path_entry
; i
++)
7324 if (data
->path
[i
].branch
== p
)
7327 if (i
!= path_entry
)
7330 /* This is no_labels_between_p (p, q) with an added check for
7331 reaching the end of a function (in case Q precedes P). */
7332 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
7333 if (GET_CODE (tmp
) == CODE_LABEL
)
7338 data
->path
[path_entry
].branch
= p
;
7339 data
->path
[path_entry
++].status
= AROUND
;
7341 path_size
= path_entry
;
7344 /* Mark block so we won't scan it again later. */
7345 PUT_MODE (NEXT_INSN (p
), QImode
);
7352 data
->low_cuid
= low_cuid
;
7353 data
->high_cuid
= high_cuid
;
7354 data
->nsets
= nsets
;
7357 /* If all jumps in the path are not taken, set our path length to zero
7358 so a rescan won't be done. */
7359 for (i
= path_size
- 1; i
>= 0; i
--)
7360 if (data
->path
[i
].status
!= NOT_TAKEN
)
7364 data
->path_size
= 0;
7366 data
->path_size
= path_size
;
7368 /* End the current branch path. */
7369 data
->path
[path_size
].branch
= 0;
7372 static rtx
cse_basic_block ();
7374 /* Perform cse on the instructions of a function.
7375 F is the first instruction.
7376 NREGS is one plus the highest pseudo-reg number used in the instruction.
7378 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7379 (only if -frerun-cse-after-loop).
7381 Returns 1 if jump_optimize should be redone due to simplifications
7382 in conditional jump instructions. */
7385 cse_main (f
, nregs
, after_loop
, file
)
7391 struct cse_basic_block_data val
;
7392 register rtx insn
= f
;
7395 cse_jumps_altered
= 0;
7396 constant_pool_entries_cost
= 0;
7403 all_minus_one
= (int *) alloca (nregs
* sizeof (int));
7404 consec_ints
= (int *) alloca (nregs
* sizeof (int));
7406 for (i
= 0; i
< nregs
; i
++)
7408 all_minus_one
[i
] = -1;
7412 reg_next_eqv
= (int *) alloca (nregs
* sizeof (int));
7413 reg_prev_eqv
= (int *) alloca (nregs
* sizeof (int));
7414 reg_qty
= (int *) alloca (nregs
* sizeof (int));
7415 reg_in_table
= (int *) alloca (nregs
* sizeof (int));
7416 reg_tick
= (int *) alloca (nregs
* sizeof (int));
7418 /* Discard all the free elements of the previous function
7419 since they are allocated in the temporarily obstack. */
7420 bzero (table
, sizeof table
);
7421 free_element_chain
= 0;
7422 n_elements_made
= 0;
7424 /* Find the largest uid. */
7427 uid_cuid
= (short *) alloca ((i
+ 1) * sizeof (short));
7428 bzero (uid_cuid
, (i
+ 1) * sizeof (short));
7430 /* Compute the mapping from uids to cuids.
7431 CUIDs are numbers assigned to insns, like uids,
7432 except that cuids increase monotonically through the code.
7433 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7434 between two insns is not affected by -g. */
7436 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
7438 if (GET_CODE (insn
) != NOTE
7439 || NOTE_LINE_NUMBER (insn
) < 0)
7440 INSN_CUID (insn
) = ++i
;
7442 /* Give a line number note the same cuid as preceding insn. */
7443 INSN_CUID (insn
) = i
;
7446 /* Initialize which registers are clobbered by calls. */
7448 CLEAR_HARD_REG_SET (regs_invalidated_by_call
);
7450 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
7451 if ((call_used_regs
[i
]
7452 /* Used to check !fixed_regs[i] here, but that isn't safe;
7453 fixed regs are still call-clobbered, and sched can get
7454 confused if they can "live across calls".
7456 The frame pointer is always preserved across calls. The arg
7457 pointer is if it is fixed. The stack pointer usually is, unless
7458 RETURN_POPS_ARGS, in which case an explicit CLOBBER
7459 will be present. If we are generating PIC code, the PIC offset
7460 table register is preserved across calls. */
7462 && i
!= STACK_POINTER_REGNUM
7463 && i
!= FRAME_POINTER_REGNUM
7464 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
7465 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
7467 #ifdef PIC_OFFSET_TABLE_REGNUM
7468 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
7472 SET_HARD_REG_BIT (regs_invalidated_by_call
, i
);
7474 /* Loop over basic blocks.
7475 Compute the maximum number of qty's needed for each basic block
7476 (which is 2 for each SET). */
7480 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
7481 flag_cse_skip_blocks
);
7483 /* If this basic block was already processed or has no sets, skip it. */
7484 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
7486 PUT_MODE (insn
, VOIDmode
);
7487 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
7492 cse_basic_block_start
= val
.low_cuid
;
7493 cse_basic_block_end
= val
.high_cuid
;
7494 max_qty
= val
.nsets
* 2;
7497 fprintf (file
, ";; Processing block from %d to %d, %d sets.\n",
7498 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
7501 /* Make MAX_QTY bigger to give us room to optimize
7502 past the end of this basic block, if that should prove useful. */
7508 /* If this basic block is being extended by following certain jumps,
7509 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7510 Otherwise, we start after this basic block. */
7511 if (val
.path_size
> 0)
7512 cse_basic_block (insn
, val
.last
, val
.path
, 0);
7515 int old_cse_jumps_altered
= cse_jumps_altered
;
7518 /* When cse changes a conditional jump to an unconditional
7519 jump, we want to reprocess the block, since it will give
7520 us a new branch path to investigate. */
7521 cse_jumps_altered
= 0;
7522 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
7523 if (cse_jumps_altered
== 0
7524 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
7527 cse_jumps_altered
|= old_cse_jumps_altered
;
7535 /* Tell refers_to_mem_p that qty_const info is not available. */
7538 if (max_elements_made
< n_elements_made
)
7539 max_elements_made
= n_elements_made
;
7541 return cse_jumps_altered
;
7544 /* Process a single basic block. FROM and TO and the limits of the basic
7545 block. NEXT_BRANCH points to the branch path when following jumps or
7546 a null path when not following jumps.
7548 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
7549 loop. This is true when we are being called for the last time on a
7550 block and this CSE pass is before loop.c. */
7553 cse_basic_block (from
, to
, next_branch
, around_loop
)
7554 register rtx from
, to
;
7555 struct branch_path
*next_branch
;
7560 int in_libcall_block
= 0;
7562 /* Each of these arrays is undefined before max_reg, so only allocate
7563 the space actually needed and adjust the start below. */
7565 qty_first_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
7566 qty_last_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
7567 qty_mode
= (enum machine_mode
*) alloca ((max_qty
- max_reg
) * sizeof (enum machine_mode
));
7568 qty_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
7569 qty_const_insn
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
7571 = (enum rtx_code
*) alloca ((max_qty
- max_reg
) * sizeof (enum rtx_code
));
7572 qty_comparison_qty
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
7573 qty_comparison_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
7575 qty_first_reg
-= max_reg
;
7576 qty_last_reg
-= max_reg
;
7577 qty_mode
-= max_reg
;
7578 qty_const
-= max_reg
;
7579 qty_const_insn
-= max_reg
;
7580 qty_comparison_code
-= max_reg
;
7581 qty_comparison_qty
-= max_reg
;
7582 qty_comparison_const
-= max_reg
;
7586 /* TO might be a label. If so, protect it from being deleted. */
7587 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
7590 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
7592 register enum rtx_code code
;
7594 /* See if this is a branch that is part of the path. If so, and it is
7595 to be taken, do so. */
7596 if (next_branch
->branch
== insn
)
7598 enum taken status
= next_branch
++->status
;
7599 if (status
!= NOT_TAKEN
)
7601 if (status
== TAKEN
)
7602 record_jump_equiv (insn
, 1);
7604 invalidate_skipped_block (NEXT_INSN (insn
));
7606 /* Set the last insn as the jump insn; it doesn't affect cc0.
7607 Then follow this branch. */
7612 insn
= JUMP_LABEL (insn
);
7617 code
= GET_CODE (insn
);
7618 if (GET_MODE (insn
) == QImode
)
7619 PUT_MODE (insn
, VOIDmode
);
7621 if (GET_RTX_CLASS (code
) == 'i')
7623 /* Process notes first so we have all notes in canonical forms when
7624 looking for duplicate operations. */
7626 if (REG_NOTES (insn
))
7627 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), 0);
7629 /* Track when we are inside in LIBCALL block. Inside such a block,
7630 we do not want to record destinations. The last insn of a
7631 LIBCALL block is not considered to be part of the block, since
7632 its destination is the result of the block and hence should be
7635 if (find_reg_note (insn
, REG_LIBCALL
, 0))
7636 in_libcall_block
= 1;
7637 else if (find_reg_note (insn
, REG_RETVAL
, 0))
7638 in_libcall_block
= 0;
7640 cse_insn (insn
, in_libcall_block
);
7643 /* If INSN is now an unconditional jump, skip to the end of our
7644 basic block by pretending that we just did the last insn in the
7645 basic block. If we are jumping to the end of our block, show
7646 that we can have one usage of TO. */
7648 if (simplejump_p (insn
))
7653 if (JUMP_LABEL (insn
) == to
)
7656 /* Maybe TO was deleted because the jump is unconditional.
7657 If so, there is nothing left in this basic block. */
7658 /* ??? Perhaps it would be smarter to set TO
7659 to whatever follows this insn,
7660 and pretend the basic block had always ended here. */
7661 if (INSN_DELETED_P (to
))
7664 insn
= PREV_INSN (to
);
7667 /* See if it is ok to keep on going past the label
7668 which used to end our basic block. Remember that we incremented
7669 the count of that label, so we decrement it here. If we made
7670 a jump unconditional, TO_USAGE will be one; in that case, we don't
7671 want to count the use in that jump. */
7673 if (to
!= 0 && NEXT_INSN (insn
) == to
7674 && GET_CODE (to
) == CODE_LABEL
&& --LABEL_NUSES (to
) == to_usage
)
7676 struct cse_basic_block_data val
;
7678 insn
= NEXT_INSN (to
);
7680 if (LABEL_NUSES (to
) == 0)
7683 /* Find the end of the following block. Note that we won't be
7684 following branches in this case. If TO was the last insn
7685 in the function, we are done. Similarly, if we deleted the
7686 insn after TO, it must have been because it was preceded by
7687 a BARRIER. In that case, we are done with this block because it
7688 has no continuation. */
7690 if (insn
== 0 || INSN_DELETED_P (insn
))
7695 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
7697 /* If the tables we allocated have enough space left
7698 to handle all the SETs in the next basic block,
7699 continue through it. Otherwise, return,
7700 and that block will be scanned individually. */
7701 if (val
.nsets
* 2 + next_qty
> max_qty
)
7704 cse_basic_block_start
= val
.low_cuid
;
7705 cse_basic_block_end
= val
.high_cuid
;
7708 /* Prevent TO from being deleted if it is a label. */
7709 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
7712 /* Back up so we process the first insn in the extension. */
7713 insn
= PREV_INSN (insn
);
7717 if (next_qty
> max_qty
)
7720 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7721 the previous insn is the only insn that branches to the head of a loop,
7722 we can cse into the loop. Don't do this if we changed the jump
7723 structure of a loop unless we aren't going to be following jumps. */
7725 if ((cse_jumps_altered
== 0
7726 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
7727 && around_loop
&& to
!= 0
7728 && GET_CODE (to
) == NOTE
&& NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
7729 && GET_CODE (PREV_INSN (to
)) == JUMP_INSN
7730 && JUMP_LABEL (PREV_INSN (to
)) != 0
7731 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to
))) == 1)
7732 cse_around_loop (JUMP_LABEL (PREV_INSN (to
)));
7734 return to
? NEXT_INSN (to
) : 0;
7737 /* Count the number of times registers are used (not set) in X.
7738 COUNTS is an array in which we accumulate the count, INCR is how much
7739 we count each register usage. */
7742 count_reg_usage (x
, counts
, incr
)
7747 enum rtx_code code
= GET_CODE (x
);
7754 counts
[REGNO (x
)] += incr
;
7768 /* Unless we are setting a REG, count everything in SET_DEST. */
7769 if (GET_CODE (SET_DEST (x
)) != REG
)
7770 count_reg_usage (SET_DEST (x
), counts
, incr
);
7771 count_reg_usage (SET_SRC (x
), counts
, incr
);
7777 count_reg_usage (PATTERN (x
), counts
, incr
);
7779 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7783 count_reg_usage (REG_NOTES (x
), counts
, incr
);
7788 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
7789 count_reg_usage (XEXP (x
, 0), counts
, incr
);
7791 count_reg_usage (XEXP (x
, 1), counts
, incr
);
7795 fmt
= GET_RTX_FORMAT (code
);
7796 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7799 count_reg_usage (XEXP (x
, i
), counts
, incr
);
7800 else if (fmt
[i
] == 'E')
7801 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7802 count_reg_usage (XVECEXP (x
, i
, j
), counts
, incr
);
7806 /* Scan all the insns and delete any that are dead; i.e., they store a register
7807 that is never used or they copy a register to itself.
7809 This is used to remove insns made obviously dead by cse. It improves the
7810 heuristics in loop since it won't try to move dead invariants out of loops
7811 or make givs for dead quantities. The remaining passes of the compilation
7812 are also sped up. */
7815 delete_dead_from_cse (insns
, nreg
)
7819 int *counts
= (int *) alloca (nreg
* sizeof (int));
7825 /* First count the number of times each register is used. */
7826 bzero (counts
, sizeof (int) * nreg
);
7827 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
7828 count_reg_usage (insn
, counts
, 1);
7830 /* Go from the last insn to the first and delete insns that only set unused
7831 registers or copy a register to itself. As we delete an insn, remove
7832 usage counts for registers it uses. */
7833 for (insn
= prev_real_insn (get_last_insn ()); insn
; insn
= prev
)
7837 prev
= prev_real_insn (insn
);
7839 /* Don't delete any insns that are part of a libcall block.
7840 Flow or loop might get confused if we did that. Remember
7841 that we are scanning backwards. */
7842 if (find_reg_note (insn
, REG_RETVAL
, 0))
7847 else if (GET_CODE (PATTERN (insn
)) == SET
)
7849 if (GET_CODE (SET_DEST (PATTERN (insn
))) == REG
7850 && SET_DEST (PATTERN (insn
)) == SET_SRC (PATTERN (insn
)))
7854 else if (GET_CODE (SET_DEST (PATTERN (insn
))) == CC0
7855 && ! side_effects_p (SET_SRC (PATTERN (insn
)))
7856 && ((tem
= next_nonnote_insn (insn
)) == 0
7857 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
7858 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
7861 else if (GET_CODE (SET_DEST (PATTERN (insn
))) != REG
7862 || REGNO (SET_DEST (PATTERN (insn
))) < FIRST_PSEUDO_REGISTER
7863 || counts
[REGNO (SET_DEST (PATTERN (insn
)))] != 0
7864 || side_effects_p (SET_SRC (PATTERN (insn
))))
7867 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7868 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7870 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7872 if (GET_CODE (elt
) == SET
)
7874 if (GET_CODE (SET_DEST (elt
)) == REG
7875 && SET_DEST (elt
) == SET_SRC (elt
))
7879 else if (GET_CODE (SET_DEST (elt
)) == CC0
7880 && ! side_effects_p (SET_SRC (elt
))
7881 && ((tem
= next_nonnote_insn (insn
)) == 0
7882 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
7883 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
7886 else if (GET_CODE (SET_DEST (elt
)) != REG
7887 || REGNO (SET_DEST (elt
)) < FIRST_PSEUDO_REGISTER
7888 || counts
[REGNO (SET_DEST (elt
))] != 0
7889 || side_effects_p (SET_SRC (elt
)))
7892 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
7898 /* If this is a dead insn, delete it and show registers in it aren't
7903 count_reg_usage (insn
, counts
, -1);
7907 if (find_reg_note (insn
, REG_LIBCALL
, 0))