1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
24 #include "hard-reg-set.h"
27 #include "insn-config.h"
33 /* The basic idea of common subexpression elimination is to go
34 through the code, keeping a record of expressions that would
35 have the same value at the current scan point, and replacing
36 expressions encountered with the cheapest equivalent expression.
38 It is too complicated to keep track of the different possibilities
39 when control paths merge; so, at each label, we forget all that is
40 known and start fresh. This can be described as processing each
41 basic block separately. Note, however, that these are not quite
42 the same as the basic blocks found by a later pass and used for
43 data flow analysis and register packing. We do not need to start fresh
44 after a conditional jump instruction if there is no label there.
46 We use two data structures to record the equivalent expressions:
47 a hash table for most expressions, and several vectors together
48 with "quantity numbers" to record equivalent (pseudo) registers.
50 The use of the special data structure for registers is desirable
51 because it is faster. It is possible because registers references
52 contain a fairly small number, the register number, taken from
53 a contiguously allocated series, and two register references are
54 identical if they have the same number. General expressions
55 do not have any such thing, so the only way to retrieve the
56 information recorded on an expression other than a register
57 is to keep it in a hash table.
59 Registers and "quantity numbers":
61 At the start of each basic block, all of the (hardware and pseudo)
62 registers used in the function are given distinct quantity
63 numbers to indicate their contents. During scan, when the code
64 copies one register into another, we copy the quantity number.
65 When a register is loaded in any other way, we allocate a new
66 quantity number to describe the value generated by this operation.
67 `reg_qty' records what quantity a register is currently thought
70 All real quantity numbers are greater than or equal to `max_reg'.
71 If register N has not been assigned a quantity, reg_qty[N] will equal N.
73 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
74 variables should be referenced with an index below `max_reg'.
76 We also maintain a bidirectional chain of registers for each
77 quantity number. `qty_first_reg', `qty_last_reg',
78 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
80 The first register in a chain is the one whose lifespan is least local.
81 Among equals, it is the one that was seen first.
82 We replace any equivalent register with that one.
84 If two registers have the same quantity number, it must be true that
85 REG expressions with `qty_mode' must be in the hash table for both
86 registers and must be in the same class.
88 The converse is not true. Since hard registers may be referenced in
89 any mode, two REG expressions might be equivalent in the hash table
90 but not have the same quantity number if the quantity number of one
91 of the registers is not the same mode as those expressions.
93 Constants and quantity numbers
95 When a quantity has a known constant value, that value is stored
96 in the appropriate element of qty_const. This is in addition to
97 putting the constant in the hash table as is usual for non-regs.
99 Whether a reg or a constant is preferred is determined by the configuration
100 macro CONST_COSTS and will often depend on the constant value. In any
101 event, expressions containing constants can be simplified, by fold_rtx.
103 When a quantity has a known nearly constant value (such as an address
104 of a stack slot), that value is stored in the appropriate element
107 Integer constants don't have a machine mode. However, cse
108 determines the intended machine mode from the destination
109 of the instruction that moves the constant. The machine mode
110 is recorded in the hash table along with the actual RTL
111 constant expression so that different modes are kept separate.
115 To record known equivalences among expressions in general
116 we use a hash table called `table'. It has a fixed number of buckets
117 that contain chains of `struct table_elt' elements for expressions.
118 These chains connect the elements whose expressions have the same
121 Other chains through the same elements connect the elements which
122 currently have equivalent values.
124 Register references in an expression are canonicalized before hashing
125 the expression. This is done using `reg_qty' and `qty_first_reg'.
126 The hash code of a register reference is computed using the quantity
127 number, not the register number.
129 When the value of an expression changes, it is necessary to remove from the
130 hash table not just that expression but all expressions whose values
131 could be different as a result.
133 1. If the value changing is in memory, except in special cases
134 ANYTHING referring to memory could be changed. That is because
135 nobody knows where a pointer does not point.
136 The function `invalidate_memory' removes what is necessary.
138 The special cases are when the address is constant or is
139 a constant plus a fixed register such as the frame pointer
140 or a static chain pointer. When such addresses are stored in,
141 we can tell exactly which other such addresses must be invalidated
142 due to overlap. `invalidate' does this.
143 All expressions that refer to non-constant
144 memory addresses are also invalidated. `invalidate_memory' does this.
146 2. If the value changing is a register, all expressions
147 containing references to that register, and only those,
150 Because searching the entire hash table for expressions that contain
151 a register is very slow, we try to figure out when it isn't necessary.
152 Precisely, this is necessary only when expressions have been
153 entered in the hash table using this register, and then the value has
154 changed, and then another expression wants to be added to refer to
155 the register's new value. This sequence of circumstances is rare
156 within any one basic block.
158 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
159 reg_tick[i] is incremented whenever a value is stored in register i.
160 reg_in_table[i] holds -1 if no references to register i have been
161 entered in the table; otherwise, it contains the value reg_tick[i] had
162 when the references were entered. If we want to enter a reference
163 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
164 Until we want to enter a new entry, the mere fact that the two vectors
165 don't match makes the entries be ignored if anyone tries to match them.
167 Registers themselves are entered in the hash table as well as in
168 the equivalent-register chains. However, the vectors `reg_tick'
169 and `reg_in_table' do not apply to expressions which are simple
170 register references. These expressions are removed from the table
171 immediately when they become invalid, and this can be done even if
172 we do not immediately search for all the expressions that refer to
175 A CLOBBER rtx in an instruction invalidates its operand for further
176 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
177 invalidates everything that resides in memory.
181 Constant expressions that differ only by an additive integer
182 are called related. When a constant expression is put in
183 the table, the related expression with no constant term
184 is also entered. These are made to point at each other
185 so that it is possible to find out if there exists any
186 register equivalent to an expression related to a given expression. */
188 /* One plus largest register number used in this function. */
192 /* Length of vectors indexed by quantity number.
193 We know in advance we will not need a quantity number this big. */
197 /* Next quantity number to be allocated.
198 This is 1 + the largest number needed so far. */
202 /* Indexed by quantity number, gives the first (or last) (pseudo) register
203 in the chain of registers that currently contain this quantity. */
205 static int *qty_first_reg
;
206 static int *qty_last_reg
;
208 /* Index by quantity number, gives the mode of the quantity. */
210 static enum machine_mode
*qty_mode
;
212 /* Indexed by quantity number, gives the rtx of the constant value of the
213 quantity, or zero if it does not have a known value.
214 A sum of the frame pointer (or arg pointer) plus a constant
215 can also be entered here. */
217 static rtx
*qty_const
;
219 /* Indexed by qty number, gives the insn that stored the constant value
220 recorded in `qty_const'. */
222 static rtx
*qty_const_insn
;
224 /* The next three variables are used to track when a comparison between a
225 quantity and some constant or register has been passed. In that case, we
226 know the results of the comparison in case we see it again. These variables
227 record a comparison that is known to be true. */
229 /* Indexed by qty number, gives the rtx code of a comparison with a known
230 result involving this quantity. If none, it is UNKNOWN. */
231 static enum rtx_code
*qty_comparison_code
;
233 /* Indexed by qty number, gives the constant being compared against in a
234 comparison of known result. If no such comparison, it is undefined.
235 If the comparison is not with a constant, it is zero. */
237 static rtx
*qty_comparison_const
;
239 /* Indexed by qty number, gives the quantity being compared against in a
240 comparison of known result. If no such comparison, if it undefined.
241 If the comparison is not with a register, it is -1. */
243 static int *qty_comparison_qty
;
246 /* For machines that have a CC0, we do not record its value in the hash
247 table since its use is guaranteed to be the insn immediately following
248 its definition and any other insn is presumed to invalidate it.
250 Instead, we store below the value last assigned to CC0. If it should
251 happen to be a constant, it is stored in preference to the actual
252 assigned value. In case it is a constant, we store the mode in which
253 the constant should be interpreted. */
255 static rtx prev_insn_cc0
;
256 static enum machine_mode prev_insn_cc0_mode
;
259 /* Previous actual insn. 0 if at first insn of basic block. */
261 static rtx prev_insn
;
263 /* Insn being scanned. */
265 static rtx this_insn
;
267 /* Index by (pseudo) register number, gives the quantity number
268 of the register's current contents. */
272 /* Index by (pseudo) register number, gives the number of the next (or
273 previous) (pseudo) register in the chain of registers sharing the same
276 Or -1 if this register is at the end of the chain.
278 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
280 static int *reg_next_eqv
;
281 static int *reg_prev_eqv
;
283 /* Index by (pseudo) register number, gives the number of times
284 that register has been altered in the current basic block. */
286 static int *reg_tick
;
288 /* Index by (pseudo) register number, gives the reg_tick value at which
289 rtx's containing this register are valid in the hash table.
290 If this does not equal the current reg_tick value, such expressions
291 existing in the hash table are invalid.
292 If this is -1, no expressions containing this register have been
293 entered in the table. */
295 static int *reg_in_table
;
297 /* A HARD_REG_SET containing all the hard registers for which there is
298 currently a REG expression in the hash table. Note the difference
299 from the above variables, which indicate if the REG is mentioned in some
300 expression in the table. */
302 static HARD_REG_SET hard_regs_in_table
;
304 /* A HARD_REG_SET containing all the hard registers that are invalidated
307 static HARD_REG_SET regs_invalidated_by_call
;
309 /* Two vectors of ints:
310 one containing max_reg -1's; the other max_reg + 500 (an approximation
311 for max_qty) elements where element i contains i.
312 These are used to initialize various other vectors fast. */
314 static int *all_minus_one
;
315 static int *consec_ints
;
317 /* CUID of insn that starts the basic block currently being cse-processed. */
319 static int cse_basic_block_start
;
321 /* CUID of insn that ends the basic block currently being cse-processed. */
323 static int cse_basic_block_end
;
325 /* Vector mapping INSN_UIDs to cuids.
326 The cuids are like uids but increase monotonically always.
327 We use them to see whether a reg is used outside a given basic block. */
329 static int *uid_cuid
;
331 /* Highest UID in UID_CUID. */
334 /* Get the cuid of an insn. */
336 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
338 /* Nonzero if cse has altered conditional jump insns
339 in such a way that jump optimization should be redone. */
341 static int cse_jumps_altered
;
343 /* canon_hash stores 1 in do_not_record
344 if it notices a reference to CC0, PC, or some other volatile
347 static int do_not_record
;
349 /* canon_hash stores 1 in hash_arg_in_memory
350 if it notices a reference to memory within the expression being hashed. */
352 static int hash_arg_in_memory
;
354 /* canon_hash stores 1 in hash_arg_in_struct
355 if it notices a reference to memory that's part of a structure. */
357 static int hash_arg_in_struct
;
359 /* The hash table contains buckets which are chains of `struct table_elt's,
360 each recording one expression's information.
361 That expression is in the `exp' field.
363 Those elements with the same hash code are chained in both directions
364 through the `next_same_hash' and `prev_same_hash' fields.
366 Each set of expressions with equivalent values
367 are on a two-way chain through the `next_same_value'
368 and `prev_same_value' fields, and all point with
369 the `first_same_value' field at the first element in
370 that chain. The chain is in order of increasing cost.
371 Each element's cost value is in its `cost' field.
373 The `in_memory' field is nonzero for elements that
374 involve any reference to memory. These elements are removed
375 whenever a write is done to an unidentified location in memory.
376 To be safe, we assume that a memory address is unidentified unless
377 the address is either a symbol constant or a constant plus
378 the frame pointer or argument pointer.
380 The `in_struct' field is nonzero for elements that
381 involve any reference to memory inside a structure or array.
383 The `related_value' field is used to connect related expressions
384 (that differ by adding an integer).
385 The related expressions are chained in a circular fashion.
386 `related_value' is zero for expressions for which this
389 The `cost' field stores the cost of this element's expression.
391 The `is_const' flag is set if the element is a constant (including
394 The `flag' field is used as a temporary during some search routines.
396 The `mode' field is usually the same as GET_MODE (`exp'), but
397 if `exp' is a CONST_INT and has no machine mode then the `mode'
398 field is the mode it was being used as. Each constant is
399 recorded separately for each mode it is used with. */
405 struct table_elt
*next_same_hash
;
406 struct table_elt
*prev_same_hash
;
407 struct table_elt
*next_same_value
;
408 struct table_elt
*prev_same_value
;
409 struct table_elt
*first_same_value
;
410 struct table_elt
*related_value
;
412 enum machine_mode mode
;
421 /* We don't want a lot of buckets, because we rarely have very many
422 things stored in the hash table, and a lot of buckets slows
423 down a lot of loops that happen frequently. */
426 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
427 register (hard registers may require `do_not_record' to be set). */
430 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
431 ? ((((int) REG << 7) + reg_qty[REGNO (X)]) % NBUCKETS) \
432 : canon_hash (X, M) % NBUCKETS)
434 /* Determine whether register number N is considered a fixed register for CSE.
435 It is desirable to replace other regs with fixed regs, to reduce need for
437 A reg wins if it is either the frame pointer or designated as fixed,
438 but not if it is an overlapping register. */
439 #ifdef OVERLAPPING_REGNO_P
440 #define FIXED_REGNO_P(N) \
441 (((N) == FRAME_POINTER_REGNUM || fixed_regs[N]) \
442 && ! OVERLAPPING_REGNO_P ((N)))
444 #define FIXED_REGNO_P(N) \
445 ((N) == FRAME_POINTER_REGNUM || fixed_regs[N])
448 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
449 hard registers and pointers into the frame are the cheapest with a cost
450 of 0. Next come pseudos with a cost of one and other hard registers with
451 a cost of 2. Aside from these special cases, call `rtx_cost'. */
453 #define CHEAP_REG(N) \
454 ((N) == FRAME_POINTER_REGNUM || (N) == STACK_POINTER_REGNUM \
455 || (N) == ARG_POINTER_REGNUM \
456 || (N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER \
457 || (FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
460 (GET_CODE (X) == REG \
461 ? (CHEAP_REG (REGNO (X)) ? 0 \
462 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
464 : rtx_cost (X, SET) * 2)
466 /* Determine if the quantity number for register X represents a valid index
467 into the `qty_...' variables. */
469 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
471 static struct table_elt
*table
[NBUCKETS
];
473 /* Chain of `struct table_elt's made so far for this function
474 but currently removed from the table. */
476 static struct table_elt
*free_element_chain
;
478 /* Number of `struct table_elt' structures made so far for this function. */
480 static int n_elements_made
;
482 /* Maximum value `n_elements_made' has had so far in this compilation
483 for functions previously processed. */
485 static int max_elements_made
;
487 /* Surviving equivalence class when two equivalence classes are merged
488 by recording the effects of a jump in the last insn. Zero if the
489 last insn was not a conditional jump. */
491 static struct table_elt
*last_jump_equiv_class
;
493 /* Set to the cost of a constant pool reference if one was found for a
494 symbolic constant. If this was found, it means we should try to
495 convert constants into constant pool entries if they don't fit in
498 static int constant_pool_entries_cost
;
500 /* Bits describing what kind of values in memory must be invalidated
501 for a particular instruction. If all three bits are zero,
502 no memory refs need to be invalidated. Each bit is more powerful
503 than the preceding ones, and if a bit is set then the preceding
506 Here is how the bits are set:
507 Pushing onto the stack invalidates only the stack pointer,
508 writing at a fixed address invalidates only variable addresses,
509 writing in a structure element at variable address
510 invalidates all but scalar variables,
511 and writing in anything else at variable address invalidates everything. */
515 int sp
: 1; /* Invalidate stack pointer. */
516 int var
: 1; /* Invalidate variable addresses. */
517 int nonscalar
: 1; /* Invalidate all but scalar variables. */
518 int all
: 1; /* Invalidate all memory refs. */
521 /* Define maximum length of a branch path. */
523 #define PATHLENGTH 10
525 /* This data describes a block that will be processed by cse_basic_block. */
527 struct cse_basic_block_data
{
528 /* Lowest CUID value of insns in block. */
530 /* Highest CUID value of insns in block. */
532 /* Total number of SETs in block. */
534 /* Last insn in the block. */
536 /* Size of current branch path, if any. */
538 /* Current branch path, indicating which branches will be taken. */
540 /* The branch insn. */
542 /* Whether it should be taken or not. AROUND is the same as taken
543 except that it is used when the destination label is not preceded
545 enum taken
{TAKEN
, NOT_TAKEN
, AROUND
} status
;
549 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
550 virtual regs here because the simplify_*_operation routines are called
551 by integrate.c, which is called before virtual register instantiation. */
553 #define FIXED_BASE_PLUS_P(X) \
554 ((X) == frame_pointer_rtx || (X) == arg_pointer_rtx \
555 || (X) == virtual_stack_vars_rtx \
556 || (X) == virtual_incoming_args_rtx \
557 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
558 && (XEXP (X, 0) == frame_pointer_rtx \
559 || XEXP (X, 0) == arg_pointer_rtx \
560 || XEXP (X, 0) == virtual_stack_vars_rtx \
561 || XEXP (X, 0) == virtual_incoming_args_rtx)))
563 /* Similar, but also allows reference to the stack pointer.
565 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
566 arg_pointer_rtx by itself is nonzero, because on at least one machine,
567 the i960, the arg pointer is zero when it is unused. */
569 #define NONZERO_BASE_PLUS_P(X) \
570 ((X) == frame_pointer_rtx \
571 || (X) == virtual_stack_vars_rtx \
572 || (X) == virtual_incoming_args_rtx \
573 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
574 && (XEXP (X, 0) == frame_pointer_rtx \
575 || XEXP (X, 0) == arg_pointer_rtx \
576 || XEXP (X, 0) == virtual_stack_vars_rtx \
577 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
578 || (X) == stack_pointer_rtx \
579 || (X) == virtual_stack_dynamic_rtx \
580 || (X) == virtual_outgoing_args_rtx \
581 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
582 && (XEXP (X, 0) == stack_pointer_rtx \
583 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
584 || XEXP (X, 0) == virtual_outgoing_args_rtx)))
586 static void new_basic_block
PROTO((void));
587 static void make_new_qty
PROTO((int));
588 static void make_regs_eqv
PROTO((int, int));
589 static void delete_reg_equiv
PROTO((int));
590 static int mention_regs
PROTO((rtx
));
591 static int insert_regs
PROTO((rtx
, struct table_elt
*, int));
592 static void free_element
PROTO((struct table_elt
*));
593 static void remove_from_table
PROTO((struct table_elt
*, int));
594 static struct table_elt
*get_element
PROTO((void));
595 static struct table_elt
*lookup
PROTO((rtx
, int, enum machine_mode
)),
596 *lookup_for_remove
PROTO((rtx
, int, enum machine_mode
));
597 static rtx lookup_as_function
PROTO((rtx
, enum rtx_code
));
598 static struct table_elt
*insert
PROTO((rtx
, struct table_elt
*, int,
600 static void merge_equiv_classes
PROTO((struct table_elt
*,
601 struct table_elt
*));
602 static void invalidate
PROTO((rtx
));
603 static void remove_invalid_refs
PROTO((int));
604 static void rehash_using_reg
PROTO((rtx
));
605 static void invalidate_memory
PROTO((struct write_data
*));
606 static void invalidate_for_call
PROTO((void));
607 static rtx use_related_value
PROTO((rtx
, struct table_elt
*));
608 static int canon_hash
PROTO((rtx
, enum machine_mode
));
609 static int safe_hash
PROTO((rtx
, enum machine_mode
));
610 static int exp_equiv_p
PROTO((rtx
, rtx
, int, int));
611 static void set_nonvarying_address_components
PROTO((rtx
, int, rtx
*,
614 static int refers_to_p
PROTO((rtx
, rtx
));
615 static int refers_to_mem_p
PROTO((rtx
, rtx
, HOST_WIDE_INT
,
617 static int cse_rtx_addr_varies_p
PROTO((rtx
));
618 static rtx canon_reg
PROTO((rtx
, rtx
));
619 static void find_best_addr
PROTO((rtx
, rtx
*));
620 static enum rtx_code find_comparison_args
PROTO((enum rtx_code
, rtx
*, rtx
*,
622 enum machine_mode
*));
623 static rtx cse_gen_binary
PROTO((enum rtx_code
, enum machine_mode
,
625 static rtx simplify_plus_minus
PROTO((enum rtx_code
, enum machine_mode
,
627 static rtx fold_rtx
PROTO((rtx
, rtx
));
628 static rtx equiv_constant
PROTO((rtx
));
629 static void record_jump_equiv
PROTO((rtx
, int));
630 static void record_jump_cond
PROTO((enum rtx_code
, enum machine_mode
,
632 static void cse_insn
PROTO((rtx
, int));
633 static void note_mem_written
PROTO((rtx
, struct write_data
*));
634 static void invalidate_from_clobbers
PROTO((struct write_data
*, rtx
));
635 static rtx cse_process_notes
PROTO((rtx
, rtx
));
636 static void cse_around_loop
PROTO((rtx
));
637 static void invalidate_skipped_set
PROTO((rtx
, rtx
));
638 static void invalidate_skipped_block
PROTO((rtx
));
639 static void cse_check_loop_start
PROTO((rtx
, rtx
));
640 static void cse_set_around_loop
PROTO((rtx
, rtx
, rtx
));
641 static rtx cse_basic_block
PROTO((rtx
, rtx
, struct branch_path
*, int));
642 static void count_reg_usage
PROTO((rtx
, int *, int));
644 /* Return an estimate of the cost of computing rtx X.
645 One use is in cse, to decide which expression to keep in the hash table.
646 Another is in rtl generation, to pick the cheapest way to multiply.
647 Other uses like the latter are expected in the future. */
649 /* Return the right cost to give to an operation
650 to make the cost of the corresponding register-to-register instruction
651 N times that of a fast register-to-register instruction. */
653 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
656 rtx_cost (x
, outer_code
)
658 enum rtx_code outer_code
;
661 register enum rtx_code code
;
668 /* Compute the default costs of certain things.
669 Note that RTX_COSTS can override the defaults. */
675 /* Count multiplication by 2**n as a shift,
676 because if we are considering it, we would output it as a shift. */
677 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
678 && exact_log2 (INTVAL (XEXP (x
, 1))) >= 0)
681 total
= COSTS_N_INSNS (5);
687 total
= COSTS_N_INSNS (7);
690 /* Used in loop.c and combine.c as a marker. */
694 /* We don't want these to be used in substitutions because
695 we have no way of validating the resulting insn. So assign
696 anything containing an ASM_OPERANDS a very high cost. */
706 return ! CHEAP_REG (REGNO (x
));
709 /* If we can't tie these modes, make this expensive. The larger
710 the mode, the more expensive it is. */
711 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
712 return COSTS_N_INSNS (2
713 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
716 RTX_COSTS (x
, code
, outer_code
);
718 CONST_COSTS (x
, code
, outer_code
);
721 /* Sum the costs of the sub-rtx's, plus cost of this operation,
722 which is already in total. */
724 fmt
= GET_RTX_FORMAT (code
);
725 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
727 total
+= rtx_cost (XEXP (x
, i
), code
);
728 else if (fmt
[i
] == 'E')
729 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
730 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
735 /* Clear the hash table and initialize each register with its own quantity,
736 for a new basic block. */
745 bzero (reg_tick
, max_reg
* sizeof (int));
747 bcopy (all_minus_one
, reg_in_table
, max_reg
* sizeof (int));
748 bcopy (consec_ints
, reg_qty
, max_reg
* sizeof (int));
749 CLEAR_HARD_REG_SET (hard_regs_in_table
);
751 /* The per-quantity values used to be initialized here, but it is
752 much faster to initialize each as it is made in `make_new_qty'. */
754 for (i
= 0; i
< NBUCKETS
; i
++)
756 register struct table_elt
*this, *next
;
757 for (this = table
[i
]; this; this = next
)
759 next
= this->next_same_hash
;
764 bzero (table
, sizeof table
);
773 /* Say that register REG contains a quantity not in any register before
774 and initialize that quantity. */
782 if (next_qty
>= max_qty
)
785 q
= reg_qty
[reg
] = next_qty
++;
786 qty_first_reg
[q
] = reg
;
787 qty_last_reg
[q
] = reg
;
788 qty_const
[q
] = qty_const_insn
[q
] = 0;
789 qty_comparison_code
[q
] = UNKNOWN
;
791 reg_next_eqv
[reg
] = reg_prev_eqv
[reg
] = -1;
794 /* Make reg NEW equivalent to reg OLD.
795 OLD is not changing; NEW is. */
798 make_regs_eqv (new, old
)
799 register int new, old
;
801 register int lastr
, firstr
;
802 register int q
= reg_qty
[old
];
804 /* Nothing should become eqv until it has a "non-invalid" qty number. */
805 if (! REGNO_QTY_VALID_P (old
))
809 firstr
= qty_first_reg
[q
];
810 lastr
= qty_last_reg
[q
];
812 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
813 hard regs. Among pseudos, if NEW will live longer than any other reg
814 of the same qty, and that is beyond the current basic block,
815 make it the new canonical replacement for this qty. */
816 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
817 /* Certain fixed registers might be of the class NO_REGS. This means
818 that not only can they not be allocated by the compiler, but
819 they cannot be used in substitutions or canonicalizations
821 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
822 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
823 || (new >= FIRST_PSEUDO_REGISTER
824 && (firstr
< FIRST_PSEUDO_REGISTER
825 || ((uid_cuid
[regno_last_uid
[new]] > cse_basic_block_end
826 || (uid_cuid
[regno_first_uid
[new]]
827 < cse_basic_block_start
))
828 && (uid_cuid
[regno_last_uid
[new]]
829 > uid_cuid
[regno_last_uid
[firstr
]]))))))
831 reg_prev_eqv
[firstr
] = new;
832 reg_next_eqv
[new] = firstr
;
833 reg_prev_eqv
[new] = -1;
834 qty_first_reg
[q
] = new;
838 /* If NEW is a hard reg (known to be non-fixed), insert at end.
839 Otherwise, insert before any non-fixed hard regs that are at the
840 end. Registers of class NO_REGS cannot be used as an
841 equivalent for anything. */
842 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_prev_eqv
[lastr
] >= 0
843 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
844 && new >= FIRST_PSEUDO_REGISTER
)
845 lastr
= reg_prev_eqv
[lastr
];
846 reg_next_eqv
[new] = reg_next_eqv
[lastr
];
847 if (reg_next_eqv
[lastr
] >= 0)
848 reg_prev_eqv
[reg_next_eqv
[lastr
]] = new;
850 qty_last_reg
[q
] = new;
851 reg_next_eqv
[lastr
] = new;
852 reg_prev_eqv
[new] = lastr
;
856 /* Remove REG from its equivalence class. */
859 delete_reg_equiv (reg
)
862 register int n
= reg_next_eqv
[reg
];
863 register int p
= reg_prev_eqv
[reg
];
864 register int q
= reg_qty
[reg
];
866 /* If invalid, do nothing. N and P above are undefined in that case. */
877 qty_first_reg
[q
] = n
;
882 /* Remove any invalid expressions from the hash table
883 that refer to any of the registers contained in expression X.
885 Make sure that newly inserted references to those registers
886 as subexpressions will be considered valid.
888 mention_regs is not called when a register itself
889 is being stored in the table.
891 Return 1 if we have done something that may have changed the hash code
898 register enum rtx_code code
;
901 register int changed
= 0;
909 register int regno
= REGNO (x
);
910 register int endregno
911 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
912 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
915 for (i
= regno
; i
< endregno
; i
++)
917 if (reg_in_table
[i
] >= 0 && reg_in_table
[i
] != reg_tick
[i
])
918 remove_invalid_refs (i
);
920 reg_in_table
[i
] = reg_tick
[i
];
926 /* If X is a comparison or a COMPARE and either operand is a register
927 that does not have a quantity, give it one. This is so that a later
928 call to record_jump_equiv won't cause X to be assigned a different
929 hash code and not found in the table after that call.
931 It is not necessary to do this here, since rehash_using_reg can
932 fix up the table later, but doing this here eliminates the need to
933 call that expensive function in the most common case where the only
934 use of the register is in the comparison. */
936 if (code
== COMPARE
|| GET_RTX_CLASS (code
) == '<')
938 if (GET_CODE (XEXP (x
, 0)) == REG
939 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
940 if (insert_regs (XEXP (x
, 0), NULL_PTR
, 0))
942 rehash_using_reg (XEXP (x
, 0));
946 if (GET_CODE (XEXP (x
, 1)) == REG
947 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
948 if (insert_regs (XEXP (x
, 1), NULL_PTR
, 0))
950 rehash_using_reg (XEXP (x
, 1));
955 fmt
= GET_RTX_FORMAT (code
);
956 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
958 changed
|= mention_regs (XEXP (x
, i
));
959 else if (fmt
[i
] == 'E')
960 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
961 changed
|= mention_regs (XVECEXP (x
, i
, j
));
966 /* Update the register quantities for inserting X into the hash table
967 with a value equivalent to CLASSP.
968 (If the class does not contain a REG, it is irrelevant.)
969 If MODIFIED is nonzero, X is a destination; it is being modified.
970 Note that delete_reg_equiv should be called on a register
971 before insert_regs is done on that register with MODIFIED != 0.
973 Nonzero value means that elements of reg_qty have changed
974 so X's hash code may be different. */
977 insert_regs (x
, classp
, modified
)
979 struct table_elt
*classp
;
982 if (GET_CODE (x
) == REG
)
984 register int regno
= REGNO (x
);
987 || ! (REGNO_QTY_VALID_P (regno
)
988 && qty_mode
[reg_qty
[regno
]] == GET_MODE (x
)))
991 for (classp
= classp
->first_same_value
;
993 classp
= classp
->next_same_value
)
994 if (GET_CODE (classp
->exp
) == REG
995 && GET_MODE (classp
->exp
) == GET_MODE (x
))
997 make_regs_eqv (regno
, REGNO (classp
->exp
));
1001 make_new_qty (regno
);
1002 qty_mode
[reg_qty
[regno
]] = GET_MODE (x
);
1007 /* If X is a SUBREG, we will likely be inserting the inner register in the
1008 table. If that register doesn't have an assigned quantity number at
1009 this point but does later, the insertion that we will be doing now will
1010 not be accessible because its hash code will have changed. So assign
1011 a quantity number now. */
1013 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
1014 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1016 insert_regs (SUBREG_REG (x
), NULL_PTR
, 0);
1017 mention_regs (SUBREG_REG (x
));
1021 return mention_regs (x
);
1024 /* Look in or update the hash table. */
1026 /* Put the element ELT on the list of free elements. */
1030 struct table_elt
*elt
;
1032 elt
->next_same_hash
= free_element_chain
;
1033 free_element_chain
= elt
;
1036 /* Return an element that is free for use. */
1038 static struct table_elt
*
1041 struct table_elt
*elt
= free_element_chain
;
1044 free_element_chain
= elt
->next_same_hash
;
1048 return (struct table_elt
*) oballoc (sizeof (struct table_elt
));
1051 /* Remove table element ELT from use in the table.
1052 HASH is its hash code, made using the HASH macro.
1053 It's an argument because often that is known in advance
1054 and we save much time not recomputing it. */
1057 remove_from_table (elt
, hash
)
1058 register struct table_elt
*elt
;
1064 /* Mark this element as removed. See cse_insn. */
1065 elt
->first_same_value
= 0;
1067 /* Remove the table element from its equivalence class. */
1070 register struct table_elt
*prev
= elt
->prev_same_value
;
1071 register struct table_elt
*next
= elt
->next_same_value
;
1073 if (next
) next
->prev_same_value
= prev
;
1076 prev
->next_same_value
= next
;
1079 register struct table_elt
*newfirst
= next
;
1082 next
->first_same_value
= newfirst
;
1083 next
= next
->next_same_value
;
1088 /* Remove the table element from its hash bucket. */
1091 register struct table_elt
*prev
= elt
->prev_same_hash
;
1092 register struct table_elt
*next
= elt
->next_same_hash
;
1094 if (next
) next
->prev_same_hash
= prev
;
1097 prev
->next_same_hash
= next
;
1098 else if (table
[hash
] == elt
)
1102 /* This entry is not in the proper hash bucket. This can happen
1103 when two classes were merged by `merge_equiv_classes'. Search
1104 for the hash bucket that it heads. This happens only very
1105 rarely, so the cost is acceptable. */
1106 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1107 if (table
[hash
] == elt
)
1112 /* Remove the table element from its related-value circular chain. */
1114 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1116 register struct table_elt
*p
= elt
->related_value
;
1117 while (p
->related_value
!= elt
)
1118 p
= p
->related_value
;
1119 p
->related_value
= elt
->related_value
;
1120 if (p
->related_value
== p
)
1121 p
->related_value
= 0;
1127 /* Look up X in the hash table and return its table element,
1128 or 0 if X is not in the table.
1130 MODE is the machine-mode of X, or if X is an integer constant
1131 with VOIDmode then MODE is the mode with which X will be used.
1133 Here we are satisfied to find an expression whose tree structure
1136 static struct table_elt
*
1137 lookup (x
, hash
, mode
)
1140 enum machine_mode mode
;
1142 register struct table_elt
*p
;
1144 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1145 if (mode
== p
->mode
&& ((x
== p
->exp
&& GET_CODE (x
) == REG
)
1146 || exp_equiv_p (x
, p
->exp
, GET_CODE (x
) != REG
, 0)))
1152 /* Like `lookup' but don't care whether the table element uses invalid regs.
1153 Also ignore discrepancies in the machine mode of a register. */
1155 static struct table_elt
*
1156 lookup_for_remove (x
, hash
, mode
)
1159 enum machine_mode mode
;
1161 register struct table_elt
*p
;
1163 if (GET_CODE (x
) == REG
)
1165 int regno
= REGNO (x
);
1166 /* Don't check the machine mode when comparing registers;
1167 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1168 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1169 if (GET_CODE (p
->exp
) == REG
1170 && REGNO (p
->exp
) == regno
)
1175 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1176 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1183 /* Look for an expression equivalent to X and with code CODE.
1184 If one is found, return that expression. */
1187 lookup_as_function (x
, code
)
1191 register struct table_elt
*p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
,
1196 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1198 if (GET_CODE (p
->exp
) == code
1199 /* Make sure this is a valid entry in the table. */
1200 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1207 /* Insert X in the hash table, assuming HASH is its hash code
1208 and CLASSP is an element of the class it should go in
1209 (or 0 if a new class should be made).
1210 It is inserted at the proper position to keep the class in
1211 the order cheapest first.
1213 MODE is the machine-mode of X, or if X is an integer constant
1214 with VOIDmode then MODE is the mode with which X will be used.
1216 For elements of equal cheapness, the most recent one
1217 goes in front, except that the first element in the list
1218 remains first unless a cheaper element is added. The order of
1219 pseudo-registers does not matter, as canon_reg will be called to
1220 find the cheapest when a register is retrieved from the table.
1222 The in_memory field in the hash table element is set to 0.
1223 The caller must set it nonzero if appropriate.
1225 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1226 and if insert_regs returns a nonzero value
1227 you must then recompute its hash code before calling here.
1229 If necessary, update table showing constant values of quantities. */
1231 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1233 static struct table_elt
*
1234 insert (x
, classp
, hash
, mode
)
1236 register struct table_elt
*classp
;
1238 enum machine_mode mode
;
1240 register struct table_elt
*elt
;
1242 /* If X is a register and we haven't made a quantity for it,
1243 something is wrong. */
1244 if (GET_CODE (x
) == REG
&& ! REGNO_QTY_VALID_P (REGNO (x
)))
1247 /* If X is a hard register, show it is being put in the table. */
1248 if (GET_CODE (x
) == REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1250 int regno
= REGNO (x
);
1251 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1254 for (i
= regno
; i
< endregno
; i
++)
1255 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1259 /* Put an element for X into the right hash bucket. */
1261 elt
= get_element ();
1263 elt
->cost
= COST (x
);
1264 elt
->next_same_value
= 0;
1265 elt
->prev_same_value
= 0;
1266 elt
->next_same_hash
= table
[hash
];
1267 elt
->prev_same_hash
= 0;
1268 elt
->related_value
= 0;
1271 elt
->is_const
= (CONSTANT_P (x
)
1272 /* GNU C++ takes advantage of this for `this'
1273 (and other const values). */
1274 || (RTX_UNCHANGING_P (x
)
1275 && GET_CODE (x
) == REG
1276 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1277 || FIXED_BASE_PLUS_P (x
));
1280 table
[hash
]->prev_same_hash
= elt
;
1283 /* Put it into the proper value-class. */
1286 classp
= classp
->first_same_value
;
1287 if (CHEAPER (elt
, classp
))
1288 /* Insert at the head of the class */
1290 register struct table_elt
*p
;
1291 elt
->next_same_value
= classp
;
1292 classp
->prev_same_value
= elt
;
1293 elt
->first_same_value
= elt
;
1295 for (p
= classp
; p
; p
= p
->next_same_value
)
1296 p
->first_same_value
= elt
;
1300 /* Insert not at head of the class. */
1301 /* Put it after the last element cheaper than X. */
1302 register struct table_elt
*p
, *next
;
1303 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1305 /* Put it after P and before NEXT. */
1306 elt
->next_same_value
= next
;
1308 next
->prev_same_value
= elt
;
1309 elt
->prev_same_value
= p
;
1310 p
->next_same_value
= elt
;
1311 elt
->first_same_value
= classp
;
1315 elt
->first_same_value
= elt
;
1317 /* If this is a constant being set equivalent to a register or a register
1318 being set equivalent to a constant, note the constant equivalence.
1320 If this is a constant, it cannot be equivalent to a different constant,
1321 and a constant is the only thing that can be cheaper than a register. So
1322 we know the register is the head of the class (before the constant was
1325 If this is a register that is not already known equivalent to a
1326 constant, we must check the entire class.
1328 If this is a register that is already known equivalent to an insn,
1329 update `qty_const_insn' to show that `this_insn' is the latest
1330 insn making that quantity equivalent to the constant. */
1332 if (elt
->is_const
&& classp
&& GET_CODE (classp
->exp
) == REG
)
1334 qty_const
[reg_qty
[REGNO (classp
->exp
)]]
1335 = gen_lowpart_if_possible (qty_mode
[reg_qty
[REGNO (classp
->exp
)]], x
);
1336 qty_const_insn
[reg_qty
[REGNO (classp
->exp
)]] = this_insn
;
1339 else if (GET_CODE (x
) == REG
&& classp
&& ! qty_const
[reg_qty
[REGNO (x
)]])
1341 register struct table_elt
*p
;
1343 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1347 qty_const
[reg_qty
[REGNO (x
)]]
1348 = gen_lowpart_if_possible (GET_MODE (x
), p
->exp
);
1349 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1355 else if (GET_CODE (x
) == REG
&& qty_const
[reg_qty
[REGNO (x
)]]
1356 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]])
1357 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1359 /* If this is a constant with symbolic value,
1360 and it has a term with an explicit integer value,
1361 link it up with related expressions. */
1362 if (GET_CODE (x
) == CONST
)
1364 rtx subexp
= get_related_value (x
);
1366 struct table_elt
*subelt
, *subelt_prev
;
1370 /* Get the integer-free subexpression in the hash table. */
1371 subhash
= safe_hash (subexp
, mode
) % NBUCKETS
;
1372 subelt
= lookup (subexp
, subhash
, mode
);
1374 subelt
= insert (subexp
, NULL_PTR
, subhash
, mode
);
1375 /* Initialize SUBELT's circular chain if it has none. */
1376 if (subelt
->related_value
== 0)
1377 subelt
->related_value
= subelt
;
1378 /* Find the element in the circular chain that precedes SUBELT. */
1379 subelt_prev
= subelt
;
1380 while (subelt_prev
->related_value
!= subelt
)
1381 subelt_prev
= subelt_prev
->related_value
;
1382 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1383 This way the element that follows SUBELT is the oldest one. */
1384 elt
->related_value
= subelt_prev
->related_value
;
1385 subelt_prev
->related_value
= elt
;
1392 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1393 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1394 the two classes equivalent.
1396 CLASS1 will be the surviving class; CLASS2 should not be used after this
1399 Any invalid entries in CLASS2 will not be copied. */
1402 merge_equiv_classes (class1
, class2
)
1403 struct table_elt
*class1
, *class2
;
1405 struct table_elt
*elt
, *next
, *new;
1407 /* Ensure we start with the head of the classes. */
1408 class1
= class1
->first_same_value
;
1409 class2
= class2
->first_same_value
;
1411 /* If they were already equal, forget it. */
1412 if (class1
== class2
)
1415 for (elt
= class2
; elt
; elt
= next
)
1419 enum machine_mode mode
= elt
->mode
;
1421 next
= elt
->next_same_value
;
1423 /* Remove old entry, make a new one in CLASS1's class.
1424 Don't do this for invalid entries as we cannot find their
1425 hash code (it also isn't necessary). */
1426 if (GET_CODE (exp
) == REG
|| exp_equiv_p (exp
, exp
, 1, 0))
1428 hash_arg_in_memory
= 0;
1429 hash_arg_in_struct
= 0;
1430 hash
= HASH (exp
, mode
);
1432 if (GET_CODE (exp
) == REG
)
1433 delete_reg_equiv (REGNO (exp
));
1435 remove_from_table (elt
, hash
);
1437 if (insert_regs (exp
, class1
, 0))
1438 hash
= HASH (exp
, mode
);
1439 new = insert (exp
, class1
, hash
, mode
);
1440 new->in_memory
= hash_arg_in_memory
;
1441 new->in_struct
= hash_arg_in_struct
;
1446 /* Remove from the hash table, or mark as invalid,
1447 all expressions whose values could be altered by storing in X.
1448 X is a register, a subreg, or a memory reference with nonvarying address
1449 (because, when a memory reference with a varying address is stored in,
1450 all memory references are removed by invalidate_memory
1451 so specific invalidation is superfluous).
1453 A nonvarying address may be just a register or just
1454 a symbol reference, or it may be either of those plus
1455 a numeric offset. */
1462 register struct table_elt
*p
;
1464 HOST_WIDE_INT start
, end
;
1466 /* If X is a register, dependencies on its contents
1467 are recorded through the qty number mechanism.
1468 Just change the qty number of the register,
1469 mark it as invalid for expressions that refer to it,
1470 and remove it itself. */
1472 if (GET_CODE (x
) == REG
)
1474 register int regno
= REGNO (x
);
1475 register int hash
= HASH (x
, GET_MODE (x
));
1477 /* Remove REGNO from any quantity list it might be on and indicate
1478 that it's value might have changed. If it is a pseudo, remove its
1479 entry from the hash table.
1481 For a hard register, we do the first two actions above for any
1482 additional hard registers corresponding to X. Then, if any of these
1483 registers are in the table, we must remove any REG entries that
1484 overlap these registers. */
1486 delete_reg_equiv (regno
);
1489 if (regno
>= FIRST_PSEUDO_REGISTER
)
1490 remove_from_table (lookup_for_remove (x
, hash
, GET_MODE (x
)), hash
);
1493 int in_table
= TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1494 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1495 int tregno
, tendregno
;
1496 register struct table_elt
*p
, *next
;
1498 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1500 for (i
= regno
+ 1; i
< endregno
; i
++)
1502 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, i
);
1503 CLEAR_HARD_REG_BIT (hard_regs_in_table
, i
);
1504 delete_reg_equiv (i
);
1509 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1510 for (p
= table
[hash
]; p
; p
= next
)
1512 next
= p
->next_same_hash
;
1514 if (GET_CODE (p
->exp
) != REG
1515 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1518 tregno
= REGNO (p
->exp
);
1520 = tregno
+ HARD_REGNO_NREGS (tregno
, GET_MODE (p
->exp
));
1521 if (tendregno
> regno
&& tregno
< endregno
)
1522 remove_from_table (p
, hash
);
1529 if (GET_CODE (x
) == SUBREG
)
1531 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1533 invalidate (SUBREG_REG (x
));
1537 /* X is not a register; it must be a memory reference with
1538 a nonvarying address. Remove all hash table elements
1539 that refer to overlapping pieces of memory. */
1541 if (GET_CODE (x
) != MEM
)
1544 set_nonvarying_address_components (XEXP (x
, 0), GET_MODE_SIZE (GET_MODE (x
)),
1545 &base
, &start
, &end
);
1547 for (i
= 0; i
< NBUCKETS
; i
++)
1549 register struct table_elt
*next
;
1550 for (p
= table
[i
]; p
; p
= next
)
1552 next
= p
->next_same_hash
;
1553 if (refers_to_mem_p (p
->exp
, base
, start
, end
))
1554 remove_from_table (p
, i
);
1559 /* Remove all expressions that refer to register REGNO,
1560 since they are already invalid, and we are about to
1561 mark that register valid again and don't want the old
1562 expressions to reappear as valid. */
1565 remove_invalid_refs (regno
)
1569 register struct table_elt
*p
, *next
;
1571 for (i
= 0; i
< NBUCKETS
; i
++)
1572 for (p
= table
[i
]; p
; p
= next
)
1574 next
= p
->next_same_hash
;
1575 if (GET_CODE (p
->exp
) != REG
1576 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, NULL_PTR
))
1577 remove_from_table (p
, i
);
1581 /* Recompute the hash codes of any valid entries in the hash table that
1582 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1584 This is called when we make a jump equivalence. */
1587 rehash_using_reg (x
)
1591 struct table_elt
*p
, *next
;
1594 if (GET_CODE (x
) == SUBREG
)
1597 /* If X is not a register or if the register is known not to be in any
1598 valid entries in the table, we have no work to do. */
1600 if (GET_CODE (x
) != REG
1601 || reg_in_table
[REGNO (x
)] < 0
1602 || reg_in_table
[REGNO (x
)] != reg_tick
[REGNO (x
)])
1605 /* Scan all hash chains looking for valid entries that mention X.
1606 If we find one and it is in the wrong hash chain, move it. We can skip
1607 objects that are registers, since they are handled specially. */
1609 for (i
= 0; i
< NBUCKETS
; i
++)
1610 for (p
= table
[i
]; p
; p
= next
)
1612 next
= p
->next_same_hash
;
1613 if (GET_CODE (p
->exp
) != REG
&& reg_mentioned_p (x
, p
->exp
)
1614 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
1615 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) % NBUCKETS
))
1617 if (p
->next_same_hash
)
1618 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1620 if (p
->prev_same_hash
)
1621 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1623 table
[i
] = p
->next_same_hash
;
1625 p
->next_same_hash
= table
[hash
];
1626 p
->prev_same_hash
= 0;
1628 table
[hash
]->prev_same_hash
= p
;
1634 /* Remove from the hash table all expressions that reference memory,
1635 or some of them as specified by *WRITES. */
1638 invalidate_memory (writes
)
1639 struct write_data
*writes
;
1642 register struct table_elt
*p
, *next
;
1643 int all
= writes
->all
;
1644 int nonscalar
= writes
->nonscalar
;
1646 for (i
= 0; i
< NBUCKETS
; i
++)
1647 for (p
= table
[i
]; p
; p
= next
)
1649 next
= p
->next_same_hash
;
1652 || (nonscalar
&& p
->in_struct
)
1653 || cse_rtx_addr_varies_p (p
->exp
)))
1654 remove_from_table (p
, i
);
1658 /* Remove from the hash table any expression that is a call-clobbered
1659 register. Also update their TICK values. */
1662 invalidate_for_call ()
1664 int regno
, endregno
;
1667 struct table_elt
*p
, *next
;
1670 /* Go through all the hard registers. For each that is clobbered in
1671 a CALL_INSN, remove the register from quantity chains and update
1672 reg_tick if defined. Also see if any of these registers is currently
1675 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1676 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1678 delete_reg_equiv (regno
);
1679 if (reg_tick
[regno
] >= 0)
1682 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1685 /* In the case where we have no call-clobbered hard registers in the
1686 table, we are done. Otherwise, scan the table and remove any
1687 entry that overlaps a call-clobbered register. */
1690 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1691 for (p
= table
[hash
]; p
; p
= next
)
1693 next
= p
->next_same_hash
;
1695 if (GET_CODE (p
->exp
) != REG
1696 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1699 regno
= REGNO (p
->exp
);
1700 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (p
->exp
));
1702 for (i
= regno
; i
< endregno
; i
++)
1703 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1705 remove_from_table (p
, hash
);
1711 /* Given an expression X of type CONST,
1712 and ELT which is its table entry (or 0 if it
1713 is not in the hash table),
1714 return an alternate expression for X as a register plus integer.
1715 If none can be found, return 0. */
1718 use_related_value (x
, elt
)
1720 struct table_elt
*elt
;
1722 register struct table_elt
*relt
= 0;
1723 register struct table_elt
*p
, *q
;
1724 HOST_WIDE_INT offset
;
1726 /* First, is there anything related known?
1727 If we have a table element, we can tell from that.
1728 Otherwise, must look it up. */
1730 if (elt
!= 0 && elt
->related_value
!= 0)
1732 else if (elt
== 0 && GET_CODE (x
) == CONST
)
1734 rtx subexp
= get_related_value (x
);
1736 relt
= lookup (subexp
,
1737 safe_hash (subexp
, GET_MODE (subexp
)) % NBUCKETS
,
1744 /* Search all related table entries for one that has an
1745 equivalent register. */
1750 /* This loop is strange in that it is executed in two different cases.
1751 The first is when X is already in the table. Then it is searching
1752 the RELATED_VALUE list of X's class (RELT). The second case is when
1753 X is not in the table. Then RELT points to a class for the related
1756 Ensure that, whatever case we are in, that we ignore classes that have
1757 the same value as X. */
1759 if (rtx_equal_p (x
, p
->exp
))
1762 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
1763 if (GET_CODE (q
->exp
) == REG
)
1769 p
= p
->related_value
;
1771 /* We went all the way around, so there is nothing to be found.
1772 Alternatively, perhaps RELT was in the table for some other reason
1773 and it has no related values recorded. */
1774 if (p
== relt
|| p
== 0)
1781 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
1782 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1783 return plus_constant (q
->exp
, offset
);
1786 /* Hash an rtx. We are careful to make sure the value is never negative.
1787 Equivalent registers hash identically.
1788 MODE is used in hashing for CONST_INTs only;
1789 otherwise the mode of X is used.
1791 Store 1 in do_not_record if any subexpression is volatile.
1793 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1794 which does not have the RTX_UNCHANGING_P bit set.
1795 In this case, also store 1 in hash_arg_in_struct
1796 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1798 Note that cse_insn knows that the hash code of a MEM expression
1799 is just (int) MEM plus the hash code of the address. */
1802 canon_hash (x
, mode
)
1804 enum machine_mode mode
;
1807 register int hash
= 0;
1808 register enum rtx_code code
;
1811 /* repeat is used to turn tail-recursion into iteration. */
1816 code
= GET_CODE (x
);
1821 register int regno
= REGNO (x
);
1823 /* On some machines, we can't record any non-fixed hard register,
1824 because extending its life will cause reload problems. We
1825 consider ap, fp, and sp to be fixed for this purpose.
1826 On all machines, we can't record any global registers. */
1828 if (regno
< FIRST_PSEUDO_REGISTER
1829 && (global_regs
[regno
]
1830 #ifdef SMALL_REGISTER_CLASSES
1831 || (! fixed_regs
[regno
]
1832 && regno
!= FRAME_POINTER_REGNUM
1833 && regno
!= ARG_POINTER_REGNUM
1834 && regno
!= STACK_POINTER_REGNUM
)
1841 return hash
+ ((int) REG
<< 7) + reg_qty
[regno
];
1845 hash
+= ((int) mode
+ ((int) CONST_INT
<< 7)
1846 + INTVAL (x
) + (INTVAL (x
) >> HASHBITS
));
1847 return ((1 << HASHBITS
) - 1) & hash
;
1850 /* This is like the general case, except that it only counts
1851 the integers representing the constant. */
1852 hash
+= (int) code
+ (int) GET_MODE (x
);
1855 for (i
= 2; i
< GET_RTX_LENGTH (CONST_DOUBLE
); i
++)
1857 int tem
= XINT (x
, i
);
1858 hash
+= ((1 << HASHBITS
) - 1) & (tem
+ (tem
>> HASHBITS
));
1863 /* Assume there is only one rtx object for any given label. */
1865 /* Use `and' to ensure a positive number. */
1866 return (hash
+ ((HOST_WIDE_INT
) LABEL_REF
<< 7)
1867 + ((HOST_WIDE_INT
) XEXP (x
, 0) & ((1 << HASHBITS
) - 1)));
1870 return (hash
+ ((HOST_WIDE_INT
) SYMBOL_REF
<< 7)
1871 + ((HOST_WIDE_INT
) XEXP (x
, 0) & ((1 << HASHBITS
) - 1)));
1874 if (MEM_VOLATILE_P (x
))
1879 if (! RTX_UNCHANGING_P (x
))
1881 hash_arg_in_memory
= 1;
1882 if (MEM_IN_STRUCT_P (x
)) hash_arg_in_struct
= 1;
1884 /* Now that we have already found this special case,
1885 might as well speed it up as much as possible. */
1897 case UNSPEC_VOLATILE
:
1902 if (MEM_VOLATILE_P (x
))
1909 i
= GET_RTX_LENGTH (code
) - 1;
1910 hash
+= (int) code
+ (int) GET_MODE (x
);
1911 fmt
= GET_RTX_FORMAT (code
);
1916 rtx tem
= XEXP (x
, i
);
1919 /* If the operand is a REG that is equivalent to a constant, hash
1920 as if we were hashing the constant, since we will be comparing
1922 if (tem
!= 0 && GET_CODE (tem
) == REG
1923 && REGNO_QTY_VALID_P (REGNO (tem
))
1924 && qty_mode
[reg_qty
[REGNO (tem
)]] == GET_MODE (tem
)
1925 && (tem1
= qty_const
[reg_qty
[REGNO (tem
)]]) != 0
1926 && CONSTANT_P (tem1
))
1929 /* If we are about to do the last recursive call
1930 needed at this level, change it into iteration.
1931 This function is called enough to be worth it. */
1937 hash
+= canon_hash (tem
, 0);
1939 else if (fmt
[i
] == 'E')
1940 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1941 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
1942 else if (fmt
[i
] == 's')
1944 register char *p
= XSTR (x
, i
);
1948 register int tem
= *p
++;
1949 hash
+= ((1 << HASHBITS
) - 1) & (tem
+ (tem
>> HASHBITS
));
1952 else if (fmt
[i
] == 'i')
1954 register int tem
= XINT (x
, i
);
1955 hash
+= ((1 << HASHBITS
) - 1) & (tem
+ (tem
>> HASHBITS
));
1963 /* Like canon_hash but with no side effects. */
1968 enum machine_mode mode
;
1970 int save_do_not_record
= do_not_record
;
1971 int save_hash_arg_in_memory
= hash_arg_in_memory
;
1972 int save_hash_arg_in_struct
= hash_arg_in_struct
;
1973 int hash
= canon_hash (x
, mode
);
1974 hash_arg_in_memory
= save_hash_arg_in_memory
;
1975 hash_arg_in_struct
= save_hash_arg_in_struct
;
1976 do_not_record
= save_do_not_record
;
1980 /* Return 1 iff X and Y would canonicalize into the same thing,
1981 without actually constructing the canonicalization of either one.
1982 If VALIDATE is nonzero,
1983 we assume X is an expression being processed from the rtl
1984 and Y was found in the hash table. We check register refs
1985 in Y for being marked as valid.
1987 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
1988 that is known to be in the register. Ordinarily, we don't allow them
1989 to match, because letting them match would cause unpredictable results
1990 in all the places that search a hash table chain for an equivalent
1991 for a given value. A possible equivalent that has different structure
1992 has its hash code computed from different data. Whether the hash code
1993 is the same as that of the the given value is pure luck. */
1996 exp_equiv_p (x
, y
, validate
, equal_values
)
2002 register enum rtx_code code
;
2005 /* Note: it is incorrect to assume an expression is equivalent to itself
2006 if VALIDATE is nonzero. */
2007 if (x
== y
&& !validate
)
2009 if (x
== 0 || y
== 0)
2012 code
= GET_CODE (x
);
2013 if (code
!= GET_CODE (y
))
2018 /* If X is a constant and Y is a register or vice versa, they may be
2019 equivalent. We only have to validate if Y is a register. */
2020 if (CONSTANT_P (x
) && GET_CODE (y
) == REG
2021 && REGNO_QTY_VALID_P (REGNO (y
))
2022 && GET_MODE (y
) == qty_mode
[reg_qty
[REGNO (y
)]]
2023 && rtx_equal_p (x
, qty_const
[reg_qty
[REGNO (y
)]])
2024 && (! validate
|| reg_in_table
[REGNO (y
)] == reg_tick
[REGNO (y
)]))
2027 if (CONSTANT_P (y
) && code
== REG
2028 && REGNO_QTY_VALID_P (REGNO (x
))
2029 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
2030 && rtx_equal_p (y
, qty_const
[reg_qty
[REGNO (x
)]]))
2036 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2037 if (GET_MODE (x
) != GET_MODE (y
))
2047 return INTVAL (x
) == INTVAL (y
);
2051 return XEXP (x
, 0) == XEXP (y
, 0);
2055 int regno
= REGNO (y
);
2057 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2058 : HARD_REGNO_NREGS (regno
, GET_MODE (y
)));
2061 /* If the quantities are not the same, the expressions are not
2062 equivalent. If there are and we are not to validate, they
2063 are equivalent. Otherwise, ensure all regs are up-to-date. */
2065 if (reg_qty
[REGNO (x
)] != reg_qty
[regno
])
2071 for (i
= regno
; i
< endregno
; i
++)
2072 if (reg_in_table
[i
] != reg_tick
[i
])
2078 /* For commutative operations, check both orders. */
2086 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2087 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2088 validate
, equal_values
))
2089 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2090 validate
, equal_values
)
2091 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2092 validate
, equal_values
)));
2095 /* Compare the elements. If any pair of corresponding elements
2096 fail to match, return 0 for the whole things. */
2098 fmt
= GET_RTX_FORMAT (code
);
2099 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2104 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2109 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2111 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2112 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2113 validate
, equal_values
))
2118 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2123 if (XINT (x
, i
) != XINT (y
, i
))
2128 if (XWINT (x
, i
) != XWINT (y
, i
))
2143 /* Return 1 iff any subexpression of X matches Y.
2144 Here we do not require that X or Y be valid (for registers referred to)
2145 for being in the hash table. */
2152 register enum rtx_code code
;
2158 if (x
== 0 || y
== 0)
2161 code
= GET_CODE (x
);
2162 /* If X as a whole has the same code as Y, they may match.
2164 if (code
== GET_CODE (y
))
2166 if (exp_equiv_p (x
, y
, 0, 1))
2170 /* X does not match, so try its subexpressions. */
2172 fmt
= GET_RTX_FORMAT (code
);
2173 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2182 if (refers_to_p (XEXP (x
, i
), y
))
2185 else if (fmt
[i
] == 'E')
2188 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2189 if (refers_to_p (XVECEXP (x
, i
, j
), y
))
2196 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2197 set PBASE, PSTART, and PEND which correspond to the base of the address,
2198 the starting offset, and ending offset respectively.
2200 ADDR is known to be a nonvarying address.
2202 cse_address_varies_p returns zero for nonvarying addresses. */
2205 set_nonvarying_address_components (addr
, size
, pbase
, pstart
, pend
)
2209 HOST_WIDE_INT
*pstart
, *pend
;
2218 /* Registers with nonvarying addresses usually have constant equivalents;
2219 but the frame pointer register is also possible. */
2220 if (GET_CODE (base
) == REG
2222 && REGNO_QTY_VALID_P (REGNO (base
))
2223 && qty_mode
[reg_qty
[REGNO (base
)]] == GET_MODE (base
)
2224 && qty_const
[reg_qty
[REGNO (base
)]] != 0)
2225 base
= qty_const
[reg_qty
[REGNO (base
)]];
2226 else if (GET_CODE (base
) == PLUS
2227 && GET_CODE (XEXP (base
, 1)) == CONST_INT
2228 && GET_CODE (XEXP (base
, 0)) == REG
2230 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2231 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2232 == GET_MODE (XEXP (base
, 0)))
2233 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]])
2235 start
= INTVAL (XEXP (base
, 1));
2236 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2239 /* By definition, operand1 of a LO_SUM is the associated constant
2240 address. Use the associated constant address as the base instead. */
2241 if (GET_CODE (base
) == LO_SUM
)
2242 base
= XEXP (base
, 1);
2244 /* Strip off CONST. */
2245 if (GET_CODE (base
) == CONST
)
2246 base
= XEXP (base
, 0);
2248 if (GET_CODE (base
) == PLUS
2249 && GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2251 start
+= INTVAL (XEXP (base
, 1));
2252 base
= XEXP (base
, 0);
2257 /* Set the return values. */
2263 /* Return 1 iff any subexpression of X refers to memory
2264 at an address of BASE plus some offset
2265 such that any of the bytes' offsets fall between START (inclusive)
2266 and END (exclusive).
2268 The value is undefined if X is a varying address (as determined by
2269 cse_rtx_addr_varies_p). This function is not used in such cases.
2271 When used in the cse pass, `qty_const' is nonzero, and it is used
2272 to treat an address that is a register with a known constant value
2273 as if it were that constant value.
2274 In the loop pass, `qty_const' is zero, so this is not done. */
2277 refers_to_mem_p (x
, base
, start
, end
)
2279 HOST_WIDE_INT start
, end
;
2281 register HOST_WIDE_INT i
;
2282 register enum rtx_code code
;
2285 if (GET_CODE (base
) == CONST_INT
)
2287 start
+= INTVAL (base
);
2288 end
+= INTVAL (base
);
2296 code
= GET_CODE (x
);
2299 register rtx addr
= XEXP (x
, 0); /* Get the address. */
2301 HOST_WIDE_INT mystart
, myend
;
2303 set_nonvarying_address_components (addr
, GET_MODE_SIZE (GET_MODE (x
)),
2304 &mybase
, &mystart
, &myend
);
2307 /* refers_to_mem_p is never called with varying addresses.
2308 If the base addresses are not equal, there is no chance
2309 of the memory addresses conflicting. */
2310 if (! rtx_equal_p (mybase
, base
))
2313 return myend
> start
&& mystart
< end
;
2316 /* X does not match, so try its subexpressions. */
2318 fmt
= GET_RTX_FORMAT (code
);
2319 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2328 if (refers_to_mem_p (XEXP (x
, i
), base
, start
, end
))
2331 else if (fmt
[i
] == 'E')
2334 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2335 if (refers_to_mem_p (XVECEXP (x
, i
, j
), base
, start
, end
))
2342 /* Nonzero if X refers to memory at a varying address;
2343 except that a register which has at the moment a known constant value
2344 isn't considered variable. */
2347 cse_rtx_addr_varies_p (x
)
2350 /* We need not check for X and the equivalence class being of the same
2351 mode because if X is equivalent to a constant in some mode, it
2352 doesn't vary in any mode. */
2354 if (GET_CODE (x
) == MEM
2355 && GET_CODE (XEXP (x
, 0)) == REG
2356 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2357 && GET_MODE (XEXP (x
, 0)) == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]]
2358 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]] != 0)
2361 if (GET_CODE (x
) == MEM
2362 && GET_CODE (XEXP (x
, 0)) == PLUS
2363 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
2364 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == REG
2365 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x
, 0), 0)))
2366 && (GET_MODE (XEXP (XEXP (x
, 0), 0))
2367 == qty_mode
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2368 && qty_const
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2371 return rtx_addr_varies_p (x
);
2374 /* Canonicalize an expression:
2375 replace each register reference inside it
2376 with the "oldest" equivalent register.
2378 If INSN is non-zero and we are replacing a pseudo with a hard register
2379 or vice versa, validate_change is used to ensure that INSN remains valid
2380 after we make our substitution. The calls are made with IN_GROUP non-zero
2381 so apply_change_group must be called upon the outermost return from this
2382 function (unless INSN is zero). The result of apply_change_group can
2383 generally be discarded since the changes we are making are optional. */
2391 register enum rtx_code code
;
2397 code
= GET_CODE (x
);
2415 /* Never replace a hard reg, because hard regs can appear
2416 in more than one machine mode, and we must preserve the mode
2417 of each occurrence. Also, some hard regs appear in
2418 MEMs that are shared and mustn't be altered. Don't try to
2419 replace any reg that maps to a reg of class NO_REGS. */
2420 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2421 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2424 first
= qty_first_reg
[reg_qty
[REGNO (x
)]];
2425 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2426 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2427 : gen_rtx (REG
, qty_mode
[reg_qty
[REGNO (x
)]], first
));
2431 fmt
= GET_RTX_FORMAT (code
);
2432 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2438 rtx
new = canon_reg (XEXP (x
, i
), insn
);
2440 /* If replacing pseudo with hard reg or vice versa, ensure the
2441 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2442 if (insn
!= 0 && new != 0
2443 && GET_CODE (new) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
2444 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2445 != (REGNO (XEXP (x
, i
)) < FIRST_PSEUDO_REGISTER
))
2446 || insn_n_dups
[recog_memoized (insn
)] > 0))
2447 validate_change (insn
, &XEXP (x
, i
), new, 1);
2451 else if (fmt
[i
] == 'E')
2452 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2453 XVECEXP (x
, i
, j
) = canon_reg (XVECEXP (x
, i
, j
), insn
);
2459 /* LOC is a location with INSN that is an operand address (the contents of
2460 a MEM). Find the best equivalent address to use that is valid for this
2463 On most CISC machines, complicated address modes are costly, and rtx_cost
2464 is a good approximation for that cost. However, most RISC machines have
2465 only a few (usually only one) memory reference formats. If an address is
2466 valid at all, it is often just as cheap as any other address. Hence, for
2467 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2468 costs of various addresses. For two addresses of equal cost, choose the one
2469 with the highest `rtx_cost' value as that has the potential of eliminating
2470 the most insns. For equal costs, we choose the first in the equivalence
2471 class. Note that we ignore the fact that pseudo registers are cheaper
2472 than hard registers here because we would also prefer the pseudo registers.
2476 find_best_addr (insn
, loc
)
2480 struct table_elt
*elt
, *p
;
2483 int found_better
= 1;
2484 int save_do_not_record
= do_not_record
;
2485 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2486 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2491 /* Do not try to replace constant addresses or addresses of local and
2492 argument slots. These MEM expressions are made only once and inserted
2493 in many instructions, as well as being used to control symbol table
2494 output. It is not safe to clobber them.
2496 There are some uncommon cases where the address is already in a register
2497 for some reason, but we cannot take advantage of that because we have
2498 no easy way to unshare the MEM. In addition, looking up all stack
2499 addresses is costly. */
2500 if ((GET_CODE (addr
) == PLUS
2501 && GET_CODE (XEXP (addr
, 0)) == REG
2502 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2503 && (regno
= REGNO (XEXP (addr
, 0)),
2504 regno
== FRAME_POINTER_REGNUM
|| regno
== ARG_POINTER_REGNUM
))
2505 || (GET_CODE (addr
) == REG
2506 && (regno
= REGNO (addr
),
2507 regno
== FRAME_POINTER_REGNUM
|| regno
== ARG_POINTER_REGNUM
))
2508 || CONSTANT_ADDRESS_P (addr
))
2511 /* If this address is not simply a register, try to fold it. This will
2512 sometimes simplify the expression. Many simplifications
2513 will not be valid, but some, usually applying the associative rule, will
2514 be valid and produce better code. */
2515 if (GET_CODE (addr
) != REG
2516 && validate_change (insn
, loc
, fold_rtx (addr
, insn
), 0))
2519 /* If this address is not in the hash table, we can't look for equivalences
2520 of the whole address. Also, ignore if volatile. */
2523 hash_code
= HASH (addr
, Pmode
);
2524 addr_volatile
= do_not_record
;
2525 do_not_record
= save_do_not_record
;
2526 hash_arg_in_memory
= save_hash_arg_in_memory
;
2527 hash_arg_in_struct
= save_hash_arg_in_struct
;
2532 elt
= lookup (addr
, hash_code
, Pmode
);
2534 #ifndef ADDRESS_COST
2537 our_cost
= elt
->cost
;
2539 /* Find the lowest cost below ours that works. */
2540 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
2541 if (elt
->cost
< our_cost
2542 && (GET_CODE (elt
->exp
) == REG
2543 || exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
2544 && validate_change (insn
, loc
,
2545 canon_reg (copy_rtx (elt
->exp
), NULL_RTX
), 0))
2552 /* We need to find the best (under the criteria documented above) entry
2553 in the class that is valid. We use the `flag' field to indicate
2554 choices that were invalid and iterate until we can't find a better
2555 one that hasn't already been tried. */
2557 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2560 while (found_better
)
2562 int best_addr_cost
= ADDRESS_COST (*loc
);
2563 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2564 struct table_elt
*best_elt
= elt
;
2567 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2569 && (GET_CODE (p
->exp
) == REG
2570 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2571 && (ADDRESS_COST (p
->exp
) < best_addr_cost
2572 || (ADDRESS_COST (p
->exp
) == best_addr_cost
2573 && (p
->cost
+ 1) >> 1 > best_rtx_cost
)))
2576 best_addr_cost
= ADDRESS_COST (p
->exp
);
2577 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2583 if (validate_change (insn
, loc
,
2584 canon_reg (copy_rtx (best_elt
->exp
),
2593 /* If the address is a binary operation with the first operand a register
2594 and the second a constant, do the same as above, but looking for
2595 equivalences of the register. Then try to simplify before checking for
2596 the best address to use. This catches a few cases: First is when we
2597 have REG+const and the register is another REG+const. We can often merge
2598 the constants and eliminate one insn and one register. It may also be
2599 that a machine has a cheap REG+REG+const. Finally, this improves the
2600 code on the Alpha for unaligned byte stores. */
2602 if (flag_expensive_optimizations
2603 && (GET_RTX_CLASS (GET_CODE (*loc
)) == '2'
2604 || GET_RTX_CLASS (GET_CODE (*loc
)) == 'c')
2605 && GET_CODE (XEXP (*loc
, 0)) == REG
2606 && GET_CODE (XEXP (*loc
, 1)) == CONST_INT
)
2608 rtx c
= XEXP (*loc
, 1);
2611 hash_code
= HASH (XEXP (*loc
, 0), Pmode
);
2612 do_not_record
= save_do_not_record
;
2613 hash_arg_in_memory
= save_hash_arg_in_memory
;
2614 hash_arg_in_struct
= save_hash_arg_in_struct
;
2616 elt
= lookup (XEXP (*loc
, 0), hash_code
, Pmode
);
2620 /* We need to find the best (under the criteria documented above) entry
2621 in the class that is valid. We use the `flag' field to indicate
2622 choices that were invalid and iterate until we can't find a better
2623 one that hasn't already been tried. */
2625 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2628 while (found_better
)
2630 int best_addr_cost
= ADDRESS_COST (*loc
);
2631 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2632 struct table_elt
*best_elt
= elt
;
2633 rtx best_rtx
= *loc
;
2636 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2638 && (GET_CODE (p
->exp
) == REG
2639 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0)))
2641 rtx
new = cse_gen_binary (GET_CODE (*loc
), Pmode
, p
->exp
, c
);
2643 if ((ADDRESS_COST (new) < best_addr_cost
2644 || (ADDRESS_COST (new) == best_addr_cost
2645 && (COST (new) + 1) >> 1 > best_rtx_cost
)))
2648 best_addr_cost
= ADDRESS_COST (new);
2649 best_rtx_cost
= (COST (new) + 1) >> 1;
2657 if (validate_change (insn
, loc
,
2658 canon_reg (copy_rtx (best_rtx
),
2669 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2670 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2671 what values are being compared.
2673 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2674 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2675 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2676 compared to produce cc0.
2678 The return value is the comparison operator and is either the code of
2679 A or the code corresponding to the inverse of the comparison. */
2681 static enum rtx_code
2682 find_comparison_args (code
, parg1
, parg2
, pmode1
, pmode2
)
2685 enum machine_mode
*pmode1
, *pmode2
;
2689 arg1
= *parg1
, arg2
= *parg2
;
2691 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2693 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2695 /* Set non-zero when we find something of interest. */
2697 int reverse_code
= 0;
2698 struct table_elt
*p
= 0;
2700 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2701 On machines with CC0, this is the only case that can occur, since
2702 fold_rtx will return the COMPARE or item being compared with zero
2705 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2708 /* If ARG1 is a comparison operator and CODE is testing for
2709 STORE_FLAG_VALUE, get the inner arguments. */
2711 else if (GET_RTX_CLASS (GET_CODE (arg1
)) == '<')
2714 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2715 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2716 #ifdef FLOAT_STORE_FLAG_VALUE
2717 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2718 && FLOAT_STORE_FLAG_VALUE
< 0)
2723 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2724 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2725 #ifdef FLOAT_STORE_FLAG_VALUE
2726 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2727 && FLOAT_STORE_FLAG_VALUE
< 0)
2730 x
= arg1
, reverse_code
= 1;
2733 /* ??? We could also check for
2735 (ne (and (eq (...) (const_int 1))) (const_int 0))
2737 and related forms, but let's wait until we see them occurring. */
2740 /* Look up ARG1 in the hash table and see if it has an equivalence
2741 that lets us see what is being compared. */
2742 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) % NBUCKETS
,
2744 if (p
) p
= p
->first_same_value
;
2746 for (; p
; p
= p
->next_same_value
)
2748 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2750 /* If the entry isn't valid, skip it. */
2751 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2754 if (GET_CODE (p
->exp
) == COMPARE
2755 /* Another possibility is that this machine has a compare insn
2756 that includes the comparison code. In that case, ARG1 would
2757 be equivalent to a comparison operation that would set ARG1 to
2758 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2759 ORIG_CODE is the actual comparison being done; if it is an EQ,
2760 we must reverse ORIG_CODE. On machine with a negative value
2761 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2764 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2765 && (GET_MODE_BITSIZE (inner_mode
)
2766 <= HOST_BITS_PER_WIDE_INT
)
2767 && (STORE_FLAG_VALUE
2768 & ((HOST_WIDE_INT
) 1
2769 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2770 #ifdef FLOAT_STORE_FLAG_VALUE
2772 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2773 && FLOAT_STORE_FLAG_VALUE
< 0)
2776 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<'))
2781 else if ((code
== EQ
2783 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2784 && (GET_MODE_BITSIZE (inner_mode
)
2785 <= HOST_BITS_PER_WIDE_INT
)
2786 && (STORE_FLAG_VALUE
2787 & ((HOST_WIDE_INT
) 1
2788 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2789 #ifdef FLOAT_STORE_FLAG_VALUE
2791 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2792 && FLOAT_STORE_FLAG_VALUE
< 0)
2795 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<')
2802 /* If this is fp + constant, the equivalent is a better operand since
2803 it may let us predict the value of the comparison. */
2804 else if (NONZERO_BASE_PLUS_P (p
->exp
))
2811 /* If we didn't find a useful equivalence for ARG1, we are done.
2812 Otherwise, set up for the next iteration. */
2816 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
2817 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
2818 code
= GET_CODE (x
);
2821 code
= reverse_condition (code
);
2824 /* Return our results. Return the modes from before fold_rtx
2825 because fold_rtx might produce const_int, and then it's too late. */
2826 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
2827 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
2832 /* Try to simplify a unary operation CODE whose output mode is to be
2833 MODE with input operand OP whose mode was originally OP_MODE.
2834 Return zero if no simplification can be made. */
2837 simplify_unary_operation (code
, mode
, op
, op_mode
)
2839 enum machine_mode mode
;
2841 enum machine_mode op_mode
;
2843 register int width
= GET_MODE_BITSIZE (mode
);
2845 /* The order of these tests is critical so that, for example, we don't
2846 check the wrong mode (input vs. output) for a conversion operation,
2847 such as FIX. At some point, this should be simplified. */
2849 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
2850 if (code
== FLOAT
&& GET_CODE (op
) == CONST_INT
)
2854 #ifdef REAL_ARITHMETIC
2855 REAL_VALUE_FROM_INT (d
, INTVAL (op
), INTVAL (op
) < 0 ? ~0 : 0);
2857 d
= (double) INTVAL (op
);
2859 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2861 else if (code
== UNSIGNED_FLOAT
&& GET_CODE (op
) == CONST_INT
)
2865 #ifdef REAL_ARITHMETIC
2866 REAL_VALUE_FROM_INT (d
, INTVAL (op
), 0);
2868 d
= (double) (unsigned int) INTVAL (op
);
2870 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2873 else if (code
== FLOAT
&& GET_CODE (op
) == CONST_DOUBLE
2874 && GET_MODE (op
) == VOIDmode
)
2878 #ifdef REAL_ARITHMETIC
2879 REAL_VALUE_FROM_INT (d
, CONST_DOUBLE_LOW (op
), CONST_DOUBLE_HIGH (op
));
2881 if (CONST_DOUBLE_HIGH (op
) < 0)
2883 d
= (double) (~ CONST_DOUBLE_HIGH (op
));
2884 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2885 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2886 d
+= (double) (unsigned HOST_WIDE_INT
) (~ CONST_DOUBLE_LOW (op
));
2891 d
= (double) CONST_DOUBLE_HIGH (op
);
2892 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2893 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2894 d
+= (double) (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (op
);
2896 #endif /* REAL_ARITHMETIC */
2897 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2899 else if (code
== UNSIGNED_FLOAT
&& GET_CODE (op
) == CONST_DOUBLE
2900 && GET_MODE (op
) == VOIDmode
)
2904 #ifdef REAL_ARITHMETIC
2905 REAL_VALUE_FROM_UNSIGNED_INT (d
, CONST_DOUBLE_LOW (op
),
2906 CONST_DOUBLE_HIGH (op
));
2908 d
= (double) CONST_DOUBLE_HIGH (op
);
2909 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2910 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2911 d
+= (double) (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (op
);
2912 #endif /* REAL_ARITHMETIC */
2913 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2917 if (GET_CODE (op
) == CONST_INT
2918 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
2920 register HOST_WIDE_INT arg0
= INTVAL (op
);
2921 register HOST_WIDE_INT val
;
2934 val
= (arg0
>= 0 ? arg0
: - arg0
);
2938 /* Don't use ffs here. Instead, get low order bit and then its
2939 number. If arg0 is zero, this will return 0, as desired. */
2940 arg0
&= GET_MODE_MASK (mode
);
2941 val
= exact_log2 (arg0
& (- arg0
)) + 1;
2949 if (op_mode
== VOIDmode
)
2951 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
2953 /* If we were really extending the mode,
2954 we would have to distinguish between zero-extension
2955 and sign-extension. */
2956 if (width
!= GET_MODE_BITSIZE (op_mode
))
2960 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
2961 val
= arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
2967 if (op_mode
== VOIDmode
)
2969 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
2971 /* If we were really extending the mode,
2972 we would have to distinguish between zero-extension
2973 and sign-extension. */
2974 if (width
!= GET_MODE_BITSIZE (op_mode
))
2978 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
2981 = arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
2983 & ((HOST_WIDE_INT
) 1 << (GET_MODE_BITSIZE (op_mode
) - 1)))
2984 val
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
2997 /* Clear the bits that don't belong in our mode,
2998 unless they and our sign bit are all one.
2999 So we get either a reasonable negative value or a reasonable
3000 unsigned value for this mode. */
3001 if (width
< HOST_BITS_PER_WIDE_INT
3002 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3003 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3004 val
&= (1 << width
) - 1;
3006 return GEN_INT (val
);
3009 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3010 for a DImode operation on a CONST_INT. */
3011 else if (GET_MODE (op
) == VOIDmode
3012 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3014 HOST_WIDE_INT l1
, h1
, lv
, hv
;
3016 if (GET_CODE (op
) == CONST_DOUBLE
)
3017 l1
= CONST_DOUBLE_LOW (op
), h1
= CONST_DOUBLE_HIGH (op
);
3019 l1
= INTVAL (op
), h1
= l1
< 0 ? -1 : 0;
3029 neg_double (l1
, h1
, &lv
, &hv
);
3034 neg_double (l1
, h1
, &lv
, &hv
);
3042 lv
= HOST_BITS_PER_WIDE_INT
+ exact_log2 (h1
& (-h1
)) + 1;
3044 lv
= exact_log2 (l1
& (-l1
)) + 1;
3048 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
3049 return GEN_INT (l1
& GET_MODE_MASK (mode
));
3055 if (op_mode
== VOIDmode
3056 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3060 lv
= l1
& GET_MODE_MASK (op_mode
);
3064 if (op_mode
== VOIDmode
3065 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3069 lv
= l1
& GET_MODE_MASK (op_mode
);
3070 if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
3071 && (lv
& ((HOST_WIDE_INT
) 1
3072 << (GET_MODE_BITSIZE (op_mode
) - 1))) != 0)
3073 lv
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3075 hv
= (lv
< 0) ? ~ (HOST_WIDE_INT
) 0 : 0;
3086 return immed_double_const (lv
, hv
, mode
);
3089 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3090 else if (GET_CODE (op
) == CONST_DOUBLE
3091 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3097 if (setjmp (handler
))
3098 /* There used to be a warning here, but that is inadvisable.
3099 People may want to cause traps, and the natural way
3100 to do it should not get a warning. */
3103 set_float_handler (handler
);
3105 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3110 d
= REAL_VALUE_NEGATE (d
);
3114 if (REAL_VALUE_NEGATIVE (d
))
3115 d
= REAL_VALUE_NEGATE (d
);
3118 case FLOAT_TRUNCATE
:
3119 d
= (double) real_value_truncate (mode
, d
);
3123 /* All this does is change the mode. */
3127 d
= (double) REAL_VALUE_FIX_TRUNCATE (d
);
3131 d
= (double) REAL_VALUE_UNSIGNED_FIX_TRUNCATE (d
);
3141 x
= immed_real_const_1 (d
, mode
);
3142 set_float_handler (NULL_PTR
);
3145 else if (GET_CODE (op
) == CONST_DOUBLE
&& GET_MODE_CLASS (mode
) == MODE_INT
3146 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3153 if (setjmp (handler
))
3156 set_float_handler (handler
);
3158 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3163 val
= REAL_VALUE_FIX (d
);
3167 val
= REAL_VALUE_UNSIGNED_FIX (d
);
3174 set_float_handler (NULL_PTR
);
3176 /* Clear the bits that don't belong in our mode,
3177 unless they and our sign bit are all one.
3178 So we get either a reasonable negative value or a reasonable
3179 unsigned value for this mode. */
3180 if (width
< HOST_BITS_PER_WIDE_INT
3181 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3182 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3183 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3185 return GEN_INT (val
);
3188 /* This was formerly used only for non-IEEE float.
3189 eggert@twinsun.com says it is safe for IEEE also. */
3192 /* There are some simplifications we can do even if the operands
3198 /* (not (not X)) == X, similarly for NEG. */
3199 if (GET_CODE (op
) == code
)
3200 return XEXP (op
, 0);
3204 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3205 becomes just the MINUS if its mode is MODE. This allows
3206 folding switch statements on machines using casesi (such as
3208 if (GET_CODE (op
) == TRUNCATE
3209 && GET_MODE (XEXP (op
, 0)) == mode
3210 && GET_CODE (XEXP (op
, 0)) == MINUS
3211 && GET_CODE (XEXP (XEXP (op
, 0), 0)) == LABEL_REF
3212 && GET_CODE (XEXP (XEXP (op
, 0), 1)) == LABEL_REF
)
3213 return XEXP (op
, 0);
3221 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3222 and OP1. Return 0 if no simplification is possible.
3224 Don't use this for relational operations such as EQ or LT.
3225 Use simplify_relational_operation instead. */
3228 simplify_binary_operation (code
, mode
, op0
, op1
)
3230 enum machine_mode mode
;
3233 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
3235 int width
= GET_MODE_BITSIZE (mode
);
3238 /* Relational operations don't work here. We must know the mode
3239 of the operands in order to do the comparison correctly.
3240 Assuming a full word can give incorrect results.
3241 Consider comparing 128 with -128 in QImode. */
3243 if (GET_RTX_CLASS (code
) == '<')
3246 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3247 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
3248 && GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
3249 && mode
== GET_MODE (op0
) && mode
== GET_MODE (op1
))
3251 REAL_VALUE_TYPE f0
, f1
, value
;
3254 if (setjmp (handler
))
3257 set_float_handler (handler
);
3259 REAL_VALUE_FROM_CONST_DOUBLE (f0
, op0
);
3260 REAL_VALUE_FROM_CONST_DOUBLE (f1
, op1
);
3261 f0
= real_value_truncate (mode
, f0
);
3262 f1
= real_value_truncate (mode
, f1
);
3264 #ifdef REAL_ARITHMETIC
3265 REAL_ARITHMETIC (value
, code
, f0
, f1
);
3279 #ifndef REAL_INFINITY
3286 value
= MIN (f0
, f1
);
3289 value
= MAX (f0
, f1
);
3296 set_float_handler (NULL_PTR
);
3297 value
= real_value_truncate (mode
, value
);
3298 return immed_real_const_1 (value
, mode
);
3300 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3302 /* We can fold some multi-word operations. */
3303 if (GET_MODE_CLASS (mode
) == MODE_INT
3304 && GET_CODE (op0
) == CONST_DOUBLE
3305 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
3307 HOST_WIDE_INT l1
, l2
, h1
, h2
, lv
, hv
;
3309 l1
= CONST_DOUBLE_LOW (op0
), h1
= CONST_DOUBLE_HIGH (op0
);
3311 if (GET_CODE (op1
) == CONST_DOUBLE
)
3312 l2
= CONST_DOUBLE_LOW (op1
), h2
= CONST_DOUBLE_HIGH (op1
);
3314 l2
= INTVAL (op1
), h2
= l2
< 0 ? -1 : 0;
3319 /* A - B == A + (-B). */
3320 neg_double (l2
, h2
, &lv
, &hv
);
3323 /* .. fall through ... */
3326 add_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3330 mul_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3333 case DIV
: case MOD
: case UDIV
: case UMOD
:
3334 /* We'd need to include tree.h to do this and it doesn't seem worth
3339 lv
= l1
& l2
, hv
= h1
& h2
;
3343 lv
= l1
| l2
, hv
= h1
| h2
;
3347 lv
= l1
^ l2
, hv
= h1
^ h2
;
3353 && ((unsigned HOST_WIDE_INT
) l1
3354 < (unsigned HOST_WIDE_INT
) l2
)))
3363 && ((unsigned HOST_WIDE_INT
) l1
3364 > (unsigned HOST_WIDE_INT
) l2
)))
3371 if ((unsigned HOST_WIDE_INT
) h1
< (unsigned HOST_WIDE_INT
) h2
3373 && ((unsigned HOST_WIDE_INT
) l1
3374 < (unsigned HOST_WIDE_INT
) l2
)))
3381 if ((unsigned HOST_WIDE_INT
) h1
> (unsigned HOST_WIDE_INT
) h2
3383 && ((unsigned HOST_WIDE_INT
) l1
3384 > (unsigned HOST_WIDE_INT
) l2
)))
3390 case LSHIFTRT
: case ASHIFTRT
:
3391 case ASHIFT
: case LSHIFT
:
3392 case ROTATE
: case ROTATERT
:
3393 #ifdef SHIFT_COUNT_TRUNCATED
3394 l2
&= (GET_MODE_BITSIZE (mode
) - 1), h2
= 0;
3397 if (h2
!= 0 || l2
< 0 || l2
>= GET_MODE_BITSIZE (mode
))
3400 if (code
== LSHIFTRT
|| code
== ASHIFTRT
)
3401 rshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3403 else if (code
== ASHIFT
|| code
== LSHIFT
)
3404 lshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3406 else if (code
== ROTATE
)
3407 lrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3408 else /* code == ROTATERT */
3409 rrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3416 return immed_double_const (lv
, hv
, mode
);
3419 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3420 || width
> HOST_BITS_PER_WIDE_INT
|| width
== 0)
3422 /* Even if we can't compute a constant result,
3423 there are some cases worth simplifying. */
3428 /* In IEEE floating point, x+0 is not the same as x. Similarly
3429 for the other optimizations below. */
3430 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3431 && GET_MODE_CLASS (mode
) != MODE_INT
)
3434 if (op1
== CONST0_RTX (mode
))
3437 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3438 if (GET_CODE (op0
) == NEG
)
3439 return cse_gen_binary (MINUS
, mode
, op1
, XEXP (op0
, 0));
3440 else if (GET_CODE (op1
) == NEG
)
3441 return cse_gen_binary (MINUS
, mode
, op0
, XEXP (op1
, 0));
3443 /* Handle both-operands-constant cases. We can only add
3444 CONST_INTs to constants since the sum of relocatable symbols
3445 can't be handled by most assemblers. */
3447 if (CONSTANT_P (op0
) && GET_CODE (op1
) == CONST_INT
)
3448 return plus_constant (op0
, INTVAL (op1
));
3449 else if (CONSTANT_P (op1
) && GET_CODE (op0
) == CONST_INT
)
3450 return plus_constant (op1
, INTVAL (op0
));
3452 /* If one of the operands is a PLUS or a MINUS, see if we can
3453 simplify this by the associative law.
3454 Don't use the associative law for floating point.
3455 The inaccuracy makes it nonassociative,
3456 and subtle programs can break if operations are associated. */
3458 if ((GET_MODE_CLASS (mode
) == MODE_INT
3459 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
3460 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3461 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3462 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3468 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3469 using cc0, in which case we want to leave it as a COMPARE
3470 so we can distinguish it from a register-register-copy.
3472 In IEEE floating point, x-0 is not the same as x. */
3474 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3475 || GET_MODE_CLASS (mode
) == MODE_INT
)
3476 && op1
== CONST0_RTX (mode
))
3479 /* Do nothing here. */
3484 /* None of these optimizations can be done for IEEE
3486 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3487 && GET_MODE_CLASS (mode
) != MODE_INT
3488 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
3491 /* We can't assume x-x is 0 even with non-IEEE floating point. */
3492 if (rtx_equal_p (op0
, op1
)
3493 && ! side_effects_p (op0
)
3494 && GET_MODE_CLASS (mode
) != MODE_FLOAT
3495 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
3498 /* Change subtraction from zero into negation. */
3499 if (op0
== CONST0_RTX (mode
))
3500 return gen_rtx (NEG
, mode
, op1
);
3502 /* (-1 - a) is ~a. */
3503 if (op0
== constm1_rtx
)
3504 return gen_rtx (NOT
, mode
, op1
);
3506 /* Subtracting 0 has no effect. */
3507 if (op1
== CONST0_RTX (mode
))
3510 /* (a - (-b)) -> (a + b). */
3511 if (GET_CODE (op1
) == NEG
)
3512 return cse_gen_binary (PLUS
, mode
, op0
, XEXP (op1
, 0));
3514 /* If one of the operands is a PLUS or a MINUS, see if we can
3515 simplify this by the associative law.
3516 Don't use the associative law for floating point.
3517 The inaccuracy makes it nonassociative,
3518 and subtle programs can break if operations are associated. */
3520 if ((GET_MODE_CLASS (mode
) == MODE_INT
3521 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
3522 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3523 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3524 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3527 /* Don't let a relocatable value get a negative coeff. */
3528 if (GET_CODE (op1
) == CONST_INT
)
3529 return plus_constant (op0
, - INTVAL (op1
));
3533 if (op1
== constm1_rtx
)
3535 tem
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3537 return tem
? tem
: gen_rtx (NEG
, mode
, op0
);
3540 /* In IEEE floating point, x*0 is not always 0. */
3541 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3542 || GET_MODE_CLASS (mode
) == MODE_INT
)
3543 && op1
== CONST0_RTX (mode
)
3544 && ! side_effects_p (op0
))
3547 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3548 However, ANSI says we can drop signals,
3549 so we can do this anyway. */
3550 if (op1
== CONST1_RTX (mode
))
3553 /* Convert multiply by constant power of two into shift. */
3554 if (GET_CODE (op1
) == CONST_INT
3555 && (val
= exact_log2 (INTVAL (op1
))) >= 0)
3556 return gen_rtx (ASHIFT
, mode
, op0
, GEN_INT (val
));
3558 if (GET_CODE (op1
) == CONST_DOUBLE
3559 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
)
3562 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3564 /* x*2 is x+x and x*(-1) is -x */
3565 if (REAL_VALUES_EQUAL (d
, dconst2
)
3566 && GET_MODE (op0
) == mode
)
3567 return gen_rtx (PLUS
, mode
, op0
, copy_rtx (op0
));
3569 else if (REAL_VALUES_EQUAL (d
, dconstm1
)
3570 && GET_MODE (op0
) == mode
)
3571 return gen_rtx (NEG
, mode
, op0
);
3576 if (op1
== const0_rtx
)
3578 if (GET_CODE (op1
) == CONST_INT
3579 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3581 if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3583 /* A | (~A) -> -1 */
3584 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3585 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3586 && ! side_effects_p (op0
))
3591 if (op1
== const0_rtx
)
3593 if (GET_CODE (op1
) == CONST_INT
3594 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3595 return gen_rtx (NOT
, mode
, op0
);
3596 if (op0
== op1
&& ! side_effects_p (op0
))
3601 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3603 if (GET_CODE (op1
) == CONST_INT
3604 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3606 if (op0
== op1
&& ! side_effects_p (op0
))
3609 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3610 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3611 && ! side_effects_p (op0
))
3616 /* Convert divide by power of two into shift (divide by 1 handled
3618 if (GET_CODE (op1
) == CONST_INT
3619 && (arg1
= exact_log2 (INTVAL (op1
))) > 0)
3620 return gen_rtx (LSHIFTRT
, mode
, op0
, GEN_INT (arg1
));
3622 /* ... fall through ... */
3625 if (op1
== CONST1_RTX (mode
))
3628 /* In IEEE floating point, 0/x is not always 0. */
3629 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3630 || GET_MODE_CLASS (mode
) == MODE_INT
)
3631 && op0
== CONST0_RTX (mode
)
3632 && ! side_effects_p (op1
))
3635 #if 0 /* Turned off till an expert says this is a safe thing to do. */
3636 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3637 /* Change division by a constant into multiplication. */
3638 else if (GET_CODE (op1
) == CONST_DOUBLE
3639 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
3640 && op1
!= CONST0_RTX (mode
))
3643 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3644 if (REAL_VALUES_EQUAL (d
, dconst0
))
3646 #if defined (REAL_ARITHMETIC)
3647 REAL_ARITHMETIC (d
, RDIV_EXPR
, dconst1
, d
);
3648 return gen_rtx (MULT
, mode
, op0
,
3649 CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
));
3651 return gen_rtx (MULT
, mode
, op0
,
3652 CONST_DOUBLE_FROM_REAL_VALUE (1./d
, mode
));
3660 /* Handle modulus by power of two (mod with 1 handled below). */
3661 if (GET_CODE (op1
) == CONST_INT
3662 && exact_log2 (INTVAL (op1
)) > 0)
3663 return gen_rtx (AND
, mode
, op0
, GEN_INT (INTVAL (op1
) - 1));
3665 /* ... fall through ... */
3668 if ((op0
== const0_rtx
|| op1
== const1_rtx
)
3669 && ! side_effects_p (op0
) && ! side_effects_p (op1
))
3675 /* Rotating ~0 always results in ~0. */
3676 if (GET_CODE (op0
) == CONST_INT
&& width
<= HOST_BITS_PER_WIDE_INT
3677 && INTVAL (op0
) == GET_MODE_MASK (mode
)
3678 && ! side_effects_p (op1
))
3681 /* ... fall through ... */
3687 if (op1
== const0_rtx
)
3689 if (op0
== const0_rtx
&& ! side_effects_p (op1
))
3694 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3695 && INTVAL (op1
) == (HOST_WIDE_INT
) 1 << (width
-1)
3696 && ! side_effects_p (op0
))
3698 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3703 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3704 && INTVAL (op1
) == (unsigned) GET_MODE_MASK (mode
) >> 1
3705 && ! side_effects_p (op0
))
3707 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3712 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3714 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3719 if (op1
== constm1_rtx
&& ! side_effects_p (op0
))
3721 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3732 /* Get the integer argument values in two forms:
3733 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
3735 arg0
= INTVAL (op0
);
3736 arg1
= INTVAL (op1
);
3738 if (width
< HOST_BITS_PER_WIDE_INT
)
3740 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3741 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3744 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
3745 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
3748 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
3749 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
3757 /* Compute the value of the arithmetic. */
3762 val
= arg0s
+ arg1s
;
3766 val
= arg0s
- arg1s
;
3770 val
= arg0s
* arg1s
;
3776 val
= arg0s
/ arg1s
;
3782 val
= arg0s
% arg1s
;
3788 val
= (unsigned HOST_WIDE_INT
) arg0
/ arg1
;
3794 val
= (unsigned HOST_WIDE_INT
) arg0
% arg1
;
3810 /* If shift count is undefined, don't fold it; let the machine do
3811 what it wants. But truncate it if the machine will do that. */
3815 #ifdef SHIFT_COUNT_TRUNCATED
3816 arg1
&= (BITS_PER_WORD
- 1);
3822 val
= ((unsigned HOST_WIDE_INT
) arg0
) >> arg1
;
3830 #ifdef SHIFT_COUNT_TRUNCATED
3831 arg1
&= (BITS_PER_WORD
- 1);
3837 val
= ((unsigned HOST_WIDE_INT
) arg0
) << arg1
;
3844 #ifdef SHIFT_COUNT_TRUNCATED
3845 arg1
&= (BITS_PER_WORD
- 1);
3851 val
= arg0s
>> arg1
;
3853 /* Bootstrap compiler may not have sign extended the right shift.
3854 Manually extend the sign to insure bootstrap cc matches gcc. */
3855 if (arg0s
< 0 && arg1
> 0)
3856 val
|= ((HOST_WIDE_INT
) -1) << (HOST_BITS_PER_WIDE_INT
- arg1
);
3865 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << (width
- arg1
))
3866 | (((unsigned HOST_WIDE_INT
) arg0
) >> arg1
));
3874 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << arg1
)
3875 | (((unsigned HOST_WIDE_INT
) arg0
) >> (width
- arg1
)));
3879 /* Do nothing here. */
3883 val
= arg0s
<= arg1s
? arg0s
: arg1s
;
3887 val
= ((unsigned HOST_WIDE_INT
) arg0
3888 <= (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
3892 val
= arg0s
> arg1s
? arg0s
: arg1s
;
3896 val
= ((unsigned HOST_WIDE_INT
) arg0
3897 > (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
3904 /* Clear the bits that don't belong in our mode, unless they and our sign
3905 bit are all one. So we get either a reasonable negative value or a
3906 reasonable unsigned value for this mode. */
3907 if (width
< HOST_BITS_PER_WIDE_INT
3908 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3909 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3910 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3912 return GEN_INT (val
);
3915 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
3918 Rather than test for specific case, we do this by a brute-force method
3919 and do all possible simplifications until no more changes occur. Then
3920 we rebuild the operation. */
3923 simplify_plus_minus (code
, mode
, op0
, op1
)
3925 enum machine_mode mode
;
3931 int n_ops
= 2, input_ops
= 2;
3933 int first
= 1, negate
= 0, changed
;
3935 bzero (ops
, sizeof ops
);
3937 /* Set up the two operands and then expand them until nothing has been
3938 changed. If we run out of room in our array, give up; this should
3939 almost never happen. */
3941 ops
[0] = op0
, ops
[1] = op1
, negs
[0] = 0, negs
[1] = (code
== MINUS
);
3948 for (i
= 0; i
< n_ops
; i
++)
3949 switch (GET_CODE (ops
[i
]))
3956 ops
[n_ops
] = XEXP (ops
[i
], 1);
3957 negs
[n_ops
++] = GET_CODE (ops
[i
]) == MINUS
? !negs
[i
] : negs
[i
];
3958 ops
[i
] = XEXP (ops
[i
], 0);
3964 ops
[i
] = XEXP (ops
[i
], 0);
3965 negs
[i
] = ! negs
[i
];
3970 ops
[i
] = XEXP (ops
[i
], 0);
3975 /* ~a -> (-a - 1) */
3978 ops
[n_ops
] = constm1_rtx
;
3979 negs
[n_ops
++] = negs
[i
];
3980 ops
[i
] = XEXP (ops
[i
], 0);
3981 negs
[i
] = ! negs
[i
];
3988 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0, changed
= 1;
3993 /* If we only have two operands, we can't do anything. */
3997 /* Now simplify each pair of operands until nothing changes. The first
3998 time through just simplify constants against each other. */
4005 for (i
= 0; i
< n_ops
- 1; i
++)
4006 for (j
= i
+ 1; j
< n_ops
; j
++)
4007 if (ops
[i
] != 0 && ops
[j
] != 0
4008 && (! first
|| (CONSTANT_P (ops
[i
]) && CONSTANT_P (ops
[j
]))))
4010 rtx lhs
= ops
[i
], rhs
= ops
[j
];
4011 enum rtx_code ncode
= PLUS
;
4013 if (negs
[i
] && ! negs
[j
])
4014 lhs
= ops
[j
], rhs
= ops
[i
], ncode
= MINUS
;
4015 else if (! negs
[i
] && negs
[j
])
4018 tem
= simplify_binary_operation (ncode
, mode
, lhs
, rhs
);
4021 ops
[i
] = tem
, ops
[j
] = 0;
4022 negs
[i
] = negs
[i
] && negs
[j
];
4023 if (GET_CODE (tem
) == NEG
)
4024 ops
[i
] = XEXP (tem
, 0), negs
[i
] = ! negs
[i
];
4026 if (GET_CODE (ops
[i
]) == CONST_INT
&& negs
[i
])
4027 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0;
4035 /* Pack all the operands to the lower-numbered entries and give up if
4036 we didn't reduce the number of operands we had. Make sure we
4037 count a CONST as two operands. */
4039 for (i
= 0, j
= 0, k
= 0; j
< n_ops
; j
++)
4042 ops
[i
] = ops
[j
], negs
[i
++] = negs
[j
];
4043 if (GET_CODE (ops
[j
]) == CONST
)
4047 if (i
+ k
>= input_ops
)
4052 /* If we have a CONST_INT, put it last. */
4053 for (i
= 0; i
< n_ops
- 1; i
++)
4054 if (GET_CODE (ops
[i
]) == CONST_INT
)
4056 tem
= ops
[n_ops
- 1], ops
[n_ops
- 1] = ops
[i
] , ops
[i
] = tem
;
4057 j
= negs
[n_ops
- 1], negs
[n_ops
- 1] = negs
[i
], negs
[i
] = j
;
4060 /* Put a non-negated operand first. If there aren't any, make all
4061 operands positive and negate the whole thing later. */
4062 for (i
= 0; i
< n_ops
&& negs
[i
]; i
++)
4067 for (i
= 0; i
< n_ops
; i
++)
4073 tem
= ops
[0], ops
[0] = ops
[i
], ops
[i
] = tem
;
4074 j
= negs
[0], negs
[0] = negs
[i
], negs
[i
] = j
;
4077 /* Now make the result by performing the requested operations. */
4079 for (i
= 1; i
< n_ops
; i
++)
4080 result
= cse_gen_binary (negs
[i
] ? MINUS
: PLUS
, mode
, result
, ops
[i
]);
4082 return negate
? gen_rtx (NEG
, mode
, result
) : result
;
4085 /* Make a binary operation by properly ordering the operands and
4086 seeing if the expression folds. */
4089 cse_gen_binary (code
, mode
, op0
, op1
)
4091 enum machine_mode mode
;
4096 /* Put complex operands first and constants second if commutative. */
4097 if (GET_RTX_CLASS (code
) == 'c'
4098 && ((CONSTANT_P (op0
) && GET_CODE (op1
) != CONST_INT
)
4099 || (GET_RTX_CLASS (GET_CODE (op0
)) == 'o'
4100 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')
4101 || (GET_CODE (op0
) == SUBREG
4102 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0
))) == 'o'
4103 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')))
4104 tem
= op0
, op0
= op1
, op1
= tem
;
4106 /* If this simplifies, do it. */
4107 tem
= simplify_binary_operation (code
, mode
, op0
, op1
);
4112 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4113 just form the operation. */
4115 if (code
== PLUS
&& GET_CODE (op1
) == CONST_INT
4116 && GET_MODE (op0
) != VOIDmode
)
4117 return plus_constant (op0
, INTVAL (op1
));
4118 else if (code
== MINUS
&& GET_CODE (op1
) == CONST_INT
4119 && GET_MODE (op0
) != VOIDmode
)
4120 return plus_constant (op0
, - INTVAL (op1
));
4122 return gen_rtx (code
, mode
, op0
, op1
);
4125 /* Like simplify_binary_operation except used for relational operators.
4126 MODE is the mode of the operands, not that of the result. */
4129 simplify_relational_operation (code
, mode
, op0
, op1
)
4131 enum machine_mode mode
;
4134 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
4136 int width
= GET_MODE_BITSIZE (mode
);
4138 /* If op0 is a compare, extract the comparison arguments from it. */
4139 if (GET_CODE (op0
) == COMPARE
&& op1
== const0_rtx
)
4140 op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4142 /* Unlike the arithmetic operations, we can do the comparison whether
4143 or not WIDTH is larger than HOST_BITS_PER_WIDE_INT because the
4144 CONST_INTs are to be understood as being infinite precision as
4145 is the comparison. So there is no question of overflow. */
4147 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
|| width
== 0)
4149 /* Even if we can't compute a constant result,
4150 there are some cases worth simplifying. */
4152 /* For non-IEEE floating-point, if the two operands are equal, we know
4154 if (rtx_equal_p (op0
, op1
)
4155 && (TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4156 || GET_MODE_CLASS (GET_MODE (op0
)) != MODE_FLOAT
))
4157 return (code
== EQ
|| code
== GE
|| code
== LE
|| code
== LEU
4158 || code
== GEU
) ? const_true_rtx
: const0_rtx
;
4160 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4161 else if (GET_CODE (op0
) == CONST_DOUBLE
4162 && GET_CODE (op1
) == CONST_DOUBLE
4163 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
4165 REAL_VALUE_TYPE d0
, d1
;
4167 int op0lt
, op1lt
, equal
;
4169 if (setjmp (handler
))
4172 set_float_handler (handler
);
4173 REAL_VALUE_FROM_CONST_DOUBLE (d0
, op0
);
4174 REAL_VALUE_FROM_CONST_DOUBLE (d1
, op1
);
4175 equal
= REAL_VALUES_EQUAL (d0
, d1
);
4176 op0lt
= REAL_VALUES_LESS (d0
, d1
);
4177 op1lt
= REAL_VALUES_LESS (d1
, d0
);
4178 set_float_handler (NULL_PTR
);
4183 return equal
? const_true_rtx
: const0_rtx
;
4185 return !equal
? const_true_rtx
: const0_rtx
;
4187 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4189 return op0lt
? const_true_rtx
: const0_rtx
;
4191 return equal
|| op1lt
? const_true_rtx
: const0_rtx
;
4193 return op1lt
? const_true_rtx
: const0_rtx
;
4196 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4198 else if (GET_MODE_CLASS (mode
) == MODE_INT
4199 && width
> HOST_BITS_PER_WIDE_INT
4200 && (GET_CODE (op0
) == CONST_DOUBLE
4201 || GET_CODE (op0
) == CONST_INT
)
4202 && (GET_CODE (op1
) == CONST_DOUBLE
4203 || GET_CODE (op1
) == CONST_INT
))
4205 HOST_WIDE_INT h0
, l0
, h1
, l1
;
4206 unsigned HOST_WIDE_INT uh0
, ul0
, uh1
, ul1
;
4207 int op0lt
, op0ltu
, equal
;
4209 if (GET_CODE (op0
) == CONST_DOUBLE
)
4210 l0
= CONST_DOUBLE_LOW (op0
), h0
= CONST_DOUBLE_HIGH (op0
);
4212 l0
= INTVAL (op0
), h0
= l0
< 0 ? -1 : 0;
4214 if (GET_CODE (op1
) == CONST_DOUBLE
)
4215 l1
= CONST_DOUBLE_LOW (op1
), h1
= CONST_DOUBLE_HIGH (op1
);
4217 l1
= INTVAL (op1
), h1
= l1
< 0 ? -1 : 0;
4219 uh0
= h0
, ul0
= l0
, uh1
= h1
, ul1
= l1
;
4221 equal
= (h0
== h1
&& l0
== l1
);
4222 op0lt
= (h0
< h1
|| (h0
== h1
&& l0
< l1
));
4223 op0ltu
= (uh0
< uh1
|| (uh0
== uh1
&& ul0
< ul1
));
4228 return equal
? const_true_rtx
: const0_rtx
;
4230 return !equal
? const_true_rtx
: const0_rtx
;
4232 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4234 return op0lt
? const_true_rtx
: const0_rtx
;
4236 return !op0lt
? const_true_rtx
: const0_rtx
;
4238 return !equal
&& !op0lt
? const_true_rtx
: const0_rtx
;
4240 return equal
|| op0ltu
? const_true_rtx
: const0_rtx
;
4242 return op0ltu
? const_true_rtx
: const0_rtx
;
4244 return !op0ltu
? const_true_rtx
: const0_rtx
;
4246 return !equal
&& !op0ltu
? const_true_rtx
: const0_rtx
;
4255 /* We can't make this assumption due to #pragma weak */
4256 if (CONSTANT_P (op0
) && op1
== const0_rtx
)
4259 if (NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
4260 /* On some machines, the ap reg can be 0 sometimes. */
4261 && op0
!= arg_pointer_rtx
)
4268 /* We can't make this assumption due to #pragma weak */
4269 if (CONSTANT_P (op0
) && op1
== const0_rtx
)
4270 return const_true_rtx
;
4272 if (NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
4273 /* On some machines, the ap reg can be 0 sometimes. */
4274 && op0
!= arg_pointer_rtx
)
4275 return const_true_rtx
;
4279 /* Unsigned values are never negative, but we must be sure we are
4280 actually comparing a value, not a CC operand. */
4281 if (op1
== const0_rtx
4282 && GET_MODE_CLASS (mode
) == MODE_INT
)
4283 return const_true_rtx
;
4287 if (op1
== const0_rtx
4288 && GET_MODE_CLASS (mode
) == MODE_INT
)
4293 /* Unsigned values are never greater than the largest
4295 if (GET_CODE (op1
) == CONST_INT
4296 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4297 && GET_MODE_CLASS (mode
) == MODE_INT
)
4298 return const_true_rtx
;
4302 if (GET_CODE (op1
) == CONST_INT
4303 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4304 && GET_MODE_CLASS (mode
) == MODE_INT
)
4312 /* Get the integer argument values in two forms:
4313 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4315 arg0
= INTVAL (op0
);
4316 arg1
= INTVAL (op1
);
4318 if (width
< HOST_BITS_PER_WIDE_INT
)
4320 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4321 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4324 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4325 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4328 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4329 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4337 /* Compute the value of the arithmetic. */
4342 val
= arg0
!= arg1
? STORE_FLAG_VALUE
: 0;
4346 val
= arg0
== arg1
? STORE_FLAG_VALUE
: 0;
4350 val
= arg0s
<= arg1s
? STORE_FLAG_VALUE
: 0;
4354 val
= arg0s
< arg1s
? STORE_FLAG_VALUE
: 0;
4358 val
= arg0s
>= arg1s
? STORE_FLAG_VALUE
: 0;
4362 val
= arg0s
> arg1s
? STORE_FLAG_VALUE
: 0;
4366 val
= (((unsigned HOST_WIDE_INT
) arg0
)
4367 <= ((unsigned HOST_WIDE_INT
) arg1
) ? STORE_FLAG_VALUE
: 0);
4371 val
= (((unsigned HOST_WIDE_INT
) arg0
)
4372 < ((unsigned HOST_WIDE_INT
) arg1
) ? STORE_FLAG_VALUE
: 0);
4376 val
= (((unsigned HOST_WIDE_INT
) arg0
)
4377 >= ((unsigned HOST_WIDE_INT
) arg1
) ? STORE_FLAG_VALUE
: 0);
4381 val
= (((unsigned HOST_WIDE_INT
) arg0
)
4382 > ((unsigned HOST_WIDE_INT
) arg1
) ? STORE_FLAG_VALUE
: 0);
4389 /* Clear the bits that don't belong in our mode, unless they and our sign
4390 bit are all one. So we get either a reasonable negative value or a
4391 reasonable unsigned value for this mode. */
4392 if (width
< HOST_BITS_PER_WIDE_INT
4393 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4394 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4395 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4397 return GEN_INT (val
);
4400 /* Simplify CODE, an operation with result mode MODE and three operands,
4401 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4402 a constant. Return 0 if no simplifications is possible. */
4405 simplify_ternary_operation (code
, mode
, op0_mode
, op0
, op1
, op2
)
4407 enum machine_mode mode
, op0_mode
;
4410 int width
= GET_MODE_BITSIZE (mode
);
4412 /* VOIDmode means "infinite" precision. */
4414 width
= HOST_BITS_PER_WIDE_INT
;
4420 if (GET_CODE (op0
) == CONST_INT
4421 && GET_CODE (op1
) == CONST_INT
4422 && GET_CODE (op2
) == CONST_INT
4423 && INTVAL (op1
) + INTVAL (op2
) <= GET_MODE_BITSIZE (op0_mode
)
4424 && width
<= HOST_BITS_PER_WIDE_INT
)
4426 /* Extracting a bit-field from a constant */
4427 HOST_WIDE_INT val
= INTVAL (op0
);
4430 val
>>= (GET_MODE_BITSIZE (op0_mode
) - INTVAL (op2
) - INTVAL (op1
));
4432 val
>>= INTVAL (op2
);
4434 if (HOST_BITS_PER_WIDE_INT
!= INTVAL (op1
))
4436 /* First zero-extend. */
4437 val
&= ((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1;
4438 /* If desired, propagate sign bit. */
4439 if (code
== SIGN_EXTRACT
4440 && (val
& ((HOST_WIDE_INT
) 1 << (INTVAL (op1
) - 1))))
4441 val
|= ~ (((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1);
4444 /* Clear the bits that don't belong in our mode,
4445 unless they and our sign bit are all one.
4446 So we get either a reasonable negative value or a reasonable
4447 unsigned value for this mode. */
4448 if (width
< HOST_BITS_PER_WIDE_INT
4449 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4450 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4451 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4453 return GEN_INT (val
);
4458 if (GET_CODE (op0
) == CONST_INT
)
4459 return op0
!= const0_rtx
? op1
: op2
;
4469 /* If X is a nontrivial arithmetic operation on an argument
4470 for which a constant value can be determined, return
4471 the result of operating on that value, as a constant.
4472 Otherwise, return X, possibly with one or more operands
4473 modified by recursive calls to this function.
4475 If X is a register whose contents are known, we do NOT
4476 return those contents. This is because an instruction that
4477 uses a register is usually faster than one that uses a constant.
4479 INSN is the insn that we may be modifying. If it is 0, make a copy
4480 of X before modifying it. */
4487 register enum rtx_code code
;
4488 register enum machine_mode mode
;
4495 /* Folded equivalents of first two operands of X. */
4499 /* Constant equivalents of first three operands of X;
4500 0 when no such equivalent is known. */
4505 /* The mode of the first operand of X. We need this for sign and zero
4507 enum machine_mode mode_arg0
;
4512 mode
= GET_MODE (x
);
4513 code
= GET_CODE (x
);
4522 /* No use simplifying an EXPR_LIST
4523 since they are used only for lists of args
4524 in a function call's REG_EQUAL note. */
4530 return prev_insn_cc0
;
4534 /* If the next insn is a CODE_LABEL followed by a jump table,
4535 PC's value is a LABEL_REF pointing to that label. That
4536 lets us fold switch statements on the Vax. */
4537 if (insn
&& GET_CODE (insn
) == JUMP_INSN
)
4539 rtx next
= next_nonnote_insn (insn
);
4541 if (next
&& GET_CODE (next
) == CODE_LABEL
4542 && NEXT_INSN (next
) != 0
4543 && GET_CODE (NEXT_INSN (next
)) == JUMP_INSN
4544 && (GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_VEC
4545 || GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_DIFF_VEC
))
4546 return gen_rtx (LABEL_REF
, Pmode
, next
);
4551 /* See if we previously assigned a constant value to this SUBREG. */
4552 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
4553 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
4556 /* If this is a paradoxical SUBREG, we have no idea what value the
4557 extra bits would have. However, if the operand is equivalent
4558 to a SUBREG whose operand is the same as our mode, and all the
4559 modes are within a word, we can just use the inner operand
4560 because these SUBREGs just say how to treat the register. */
4562 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4564 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
4565 struct table_elt
*elt
;
4567 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
4568 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
4569 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
4572 for (elt
= elt
->first_same_value
;
4573 elt
; elt
= elt
->next_same_value
)
4574 if (GET_CODE (elt
->exp
) == SUBREG
4575 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4576 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4577 return copy_rtx (SUBREG_REG (elt
->exp
));
4583 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4584 We might be able to if the SUBREG is extracting a single word in an
4585 integral mode or extracting the low part. */
4587 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
4588 const_arg0
= equiv_constant (folded_arg0
);
4590 folded_arg0
= const_arg0
;
4592 if (folded_arg0
!= SUBREG_REG (x
))
4596 if (GET_MODE_CLASS (mode
) == MODE_INT
4597 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4598 && GET_MODE (SUBREG_REG (x
)) != VOIDmode
)
4599 new = operand_subword (folded_arg0
, SUBREG_WORD (x
), 0,
4600 GET_MODE (SUBREG_REG (x
)));
4601 if (new == 0 && subreg_lowpart_p (x
))
4602 new = gen_lowpart_if_possible (mode
, folded_arg0
);
4607 /* If this is a narrowing SUBREG and our operand is a REG, see if
4608 we can find an equivalence for REG that is an arithmetic operation
4609 in a wider mode where both operands are paradoxical SUBREGs
4610 from objects of our result mode. In that case, we couldn't report
4611 an equivalent value for that operation, since we don't know what the
4612 extra bits will be. But we can find an equivalence for this SUBREG
4613 by folding that operation is the narrow mode. This allows us to
4614 fold arithmetic in narrow modes when the machine only supports
4615 word-sized arithmetic.
4617 Also look for a case where we have a SUBREG whose operand is the
4618 same as our result. If both modes are smaller than a word, we
4619 are simply interpreting a register in different modes and we
4620 can use the inner value. */
4622 if (GET_CODE (folded_arg0
) == REG
4623 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
))
4624 && subreg_lowpart_p (x
))
4626 struct table_elt
*elt
;
4628 /* We can use HASH here since we know that canon_hash won't be
4630 elt
= lookup (folded_arg0
,
4631 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
4632 GET_MODE (folded_arg0
));
4635 elt
= elt
->first_same_value
;
4637 for (; elt
; elt
= elt
->next_same_value
)
4639 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
4641 /* Just check for unary and binary operations. */
4642 if (GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '1'
4643 && GET_CODE (elt
->exp
) != SIGN_EXTEND
4644 && GET_CODE (elt
->exp
) != ZERO_EXTEND
4645 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4646 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
)
4648 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
4650 if (GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4651 op0
= fold_rtx (op0
, NULL_RTX
);
4653 op0
= equiv_constant (op0
);
4655 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
4658 else if ((GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '2'
4659 || GET_RTX_CLASS (GET_CODE (elt
->exp
)) == 'c')
4660 && eltcode
!= DIV
&& eltcode
!= MOD
4661 && eltcode
!= UDIV
&& eltcode
!= UMOD
4662 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
4663 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
4664 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4665 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
4667 || CONSTANT_P (XEXP (elt
->exp
, 0)))
4668 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
4669 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
4671 || CONSTANT_P (XEXP (elt
->exp
, 1))))
4673 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
4674 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
4676 if (op0
&& GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4677 op0
= fold_rtx (op0
, NULL_RTX
);
4680 op0
= equiv_constant (op0
);
4682 if (op1
&& GET_CODE (op1
) != REG
&& ! CONSTANT_P (op1
))
4683 op1
= fold_rtx (op1
, NULL_RTX
);
4686 op1
= equiv_constant (op1
);
4689 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
,
4693 else if (GET_CODE (elt
->exp
) == SUBREG
4694 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4695 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
4697 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4698 new = copy_rtx (SUBREG_REG (elt
->exp
));
4709 /* If we have (NOT Y), see if Y is known to be (NOT Z).
4710 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
4711 new = lookup_as_function (XEXP (x
, 0), code
);
4713 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
4717 /* If we are not actually processing an insn, don't try to find the
4718 best address. Not only don't we care, but we could modify the
4719 MEM in an invalid way since we have no insn to validate against. */
4721 find_best_addr (insn
, &XEXP (x
, 0));
4724 /* Even if we don't fold in the insn itself,
4725 we can safely do so here, in hopes of getting a constant. */
4726 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
4728 HOST_WIDE_INT offset
= 0;
4730 if (GET_CODE (addr
) == REG
4731 && REGNO_QTY_VALID_P (REGNO (addr
))
4732 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
4733 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
4734 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
4736 /* If address is constant, split it into a base and integer offset. */
4737 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
4739 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
4740 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
4742 base
= XEXP (XEXP (addr
, 0), 0);
4743 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
4745 else if (GET_CODE (addr
) == LO_SUM
4746 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
4747 base
= XEXP (addr
, 1);
4749 /* If this is a constant pool reference, we can fold it into its
4750 constant to allow better value tracking. */
4751 if (base
&& GET_CODE (base
) == SYMBOL_REF
4752 && CONSTANT_POOL_ADDRESS_P (base
))
4754 rtx constant
= get_pool_constant (base
);
4755 enum machine_mode const_mode
= get_pool_mode (base
);
4758 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
4759 constant_pool_entries_cost
= COST (constant
);
4761 /* If we are loading the full constant, we have an equivalence. */
4762 if (offset
== 0 && mode
== const_mode
)
4765 /* If this actually isn't a constant (wierd!), we can't do
4766 anything. Otherwise, handle the two most common cases:
4767 extracting a word from a multi-word constant, and extracting
4768 the low-order bits. Other cases don't seem common enough to
4770 if (! CONSTANT_P (constant
))
4773 if (GET_MODE_CLASS (mode
) == MODE_INT
4774 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4775 && offset
% UNITS_PER_WORD
== 0
4776 && (new = operand_subword (constant
,
4777 offset
/ UNITS_PER_WORD
,
4778 0, const_mode
)) != 0)
4781 if (((BYTES_BIG_ENDIAN
4782 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
4783 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
4784 && (new = gen_lowpart_if_possible (mode
, constant
)) != 0)
4788 /* If this is a reference to a label at a known position in a jump
4789 table, we also know its value. */
4790 if (base
&& GET_CODE (base
) == LABEL_REF
)
4792 rtx label
= XEXP (base
, 0);
4793 rtx table_insn
= NEXT_INSN (label
);
4795 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
4796 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
4798 rtx table
= PATTERN (table_insn
);
4801 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
4802 < XVECLEN (table
, 0)))
4803 return XVECEXP (table
, 0,
4804 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
4806 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
4807 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
4809 rtx table
= PATTERN (table_insn
);
4812 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
4813 < XVECLEN (table
, 1)))
4815 offset
/= GET_MODE_SIZE (GET_MODE (table
));
4816 new = gen_rtx (MINUS
, Pmode
, XVECEXP (table
, 1, offset
),
4819 if (GET_MODE (table
) != Pmode
)
4820 new = gen_rtx (TRUNCATE
, GET_MODE (table
), new);
4834 mode_arg0
= VOIDmode
;
4836 /* Try folding our operands.
4837 Then see which ones have constant values known. */
4839 fmt
= GET_RTX_FORMAT (code
);
4840 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4843 rtx arg
= XEXP (x
, i
);
4844 rtx folded_arg
= arg
, const_arg
= 0;
4845 enum machine_mode mode_arg
= GET_MODE (arg
);
4846 rtx cheap_arg
, expensive_arg
;
4847 rtx replacements
[2];
4850 /* Most arguments are cheap, so handle them specially. */
4851 switch (GET_CODE (arg
))
4854 /* This is the same as calling equiv_constant; it is duplicated
4856 if (REGNO_QTY_VALID_P (REGNO (arg
))
4857 && qty_const
[reg_qty
[REGNO (arg
)]] != 0
4858 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != REG
4859 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != PLUS
)
4861 = gen_lowpart_if_possible (GET_MODE (arg
),
4862 qty_const
[reg_qty
[REGNO (arg
)]]);
4875 folded_arg
= prev_insn_cc0
;
4876 mode_arg
= prev_insn_cc0_mode
;
4877 const_arg
= equiv_constant (folded_arg
);
4882 folded_arg
= fold_rtx (arg
, insn
);
4883 const_arg
= equiv_constant (folded_arg
);
4886 /* For the first three operands, see if the operand
4887 is constant or equivalent to a constant. */
4891 folded_arg0
= folded_arg
;
4892 const_arg0
= const_arg
;
4893 mode_arg0
= mode_arg
;
4896 folded_arg1
= folded_arg
;
4897 const_arg1
= const_arg
;
4900 const_arg2
= const_arg
;
4904 /* Pick the least expensive of the folded argument and an
4905 equivalent constant argument. */
4906 if (const_arg
== 0 || const_arg
== folded_arg
4907 || COST (const_arg
) > COST (folded_arg
))
4908 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
4910 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
4912 /* Try to replace the operand with the cheapest of the two
4913 possibilities. If it doesn't work and this is either of the first
4914 two operands of a commutative operation, try swapping them.
4915 If THAT fails, try the more expensive, provided it is cheaper
4916 than what is already there. */
4918 if (cheap_arg
== XEXP (x
, i
))
4921 if (insn
== 0 && ! copied
)
4927 replacements
[0] = cheap_arg
, replacements
[1] = expensive_arg
;
4929 j
< 2 && replacements
[j
]
4930 && COST (replacements
[j
]) < COST (XEXP (x
, i
));
4933 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
4936 if (code
== NE
|| code
== EQ
|| GET_RTX_CLASS (code
) == 'c')
4938 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
4939 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
4941 if (apply_change_group ())
4943 /* Swap them back to be invalid so that this loop can
4944 continue and flag them to be swapped back later. */
4947 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
4956 else if (fmt
[i
] == 'E')
4957 /* Don't try to fold inside of a vector of expressions.
4958 Doing nothing is harmless. */
4961 /* If a commutative operation, place a constant integer as the second
4962 operand unless the first operand is also a constant integer. Otherwise,
4963 place any constant second unless the first operand is also a constant. */
4965 if (code
== EQ
|| code
== NE
|| GET_RTX_CLASS (code
) == 'c')
4967 if (must_swap
|| (const_arg0
4969 || (GET_CODE (const_arg0
) == CONST_INT
4970 && GET_CODE (const_arg1
) != CONST_INT
))))
4972 register rtx tem
= XEXP (x
, 0);
4974 if (insn
== 0 && ! copied
)
4980 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
4981 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
4982 if (apply_change_group ())
4984 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
4985 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
4990 /* If X is an arithmetic operation, see if we can simplify it. */
4992 switch (GET_RTX_CLASS (code
))
4995 /* We can't simplify extension ops unless we know the original mode. */
4996 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
4997 && mode_arg0
== VOIDmode
)
4999 new = simplify_unary_operation (code
, mode
,
5000 const_arg0
? const_arg0
: folded_arg0
,
5005 /* See what items are actually being compared and set FOLDED_ARG[01]
5006 to those values and CODE to the actual comparison code. If any are
5007 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5008 do anything if both operands are already known to be constant. */
5010 if (const_arg0
== 0 || const_arg1
== 0)
5012 struct table_elt
*p0
, *p1
;
5013 rtx
true = const_true_rtx
, false = const0_rtx
;
5014 enum machine_mode mode_arg1
;
5016 #ifdef FLOAT_STORE_FLAG_VALUE
5017 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5019 true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
);
5020 false = CONST0_RTX (mode
);
5024 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
5025 &mode_arg0
, &mode_arg1
);
5026 const_arg0
= equiv_constant (folded_arg0
);
5027 const_arg1
= equiv_constant (folded_arg1
);
5029 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5030 what kinds of things are being compared, so we can't do
5031 anything with this comparison. */
5033 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
5036 /* If we do not now have two constants being compared, see if we
5037 can nevertheless deduce some things about the comparison. */
5038 if (const_arg0
== 0 || const_arg1
== 0)
5040 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit
5041 constant? These aren't zero, but we don't know their sign. */
5042 if (const_arg1
== const0_rtx
5043 && (NONZERO_BASE_PLUS_P (folded_arg0
)
5044 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5046 || GET_CODE (folded_arg0
) == SYMBOL_REF
5048 || GET_CODE (folded_arg0
) == LABEL_REF
5049 || GET_CODE (folded_arg0
) == CONST
))
5053 else if (code
== NE
)
5057 /* See if the two operands are the same. We don't do this
5058 for IEEE floating-point since we can't assume x == x
5059 since x might be a NaN. */
5061 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
5062 || GET_MODE_CLASS (mode_arg0
) != MODE_FLOAT
)
5063 && (folded_arg0
== folded_arg1
5064 || (GET_CODE (folded_arg0
) == REG
5065 && GET_CODE (folded_arg1
) == REG
5066 && (reg_qty
[REGNO (folded_arg0
)]
5067 == reg_qty
[REGNO (folded_arg1
)]))
5068 || ((p0
= lookup (folded_arg0
,
5069 (safe_hash (folded_arg0
, mode_arg0
)
5070 % NBUCKETS
), mode_arg0
))
5071 && (p1
= lookup (folded_arg1
,
5072 (safe_hash (folded_arg1
, mode_arg0
)
5073 % NBUCKETS
), mode_arg0
))
5074 && p0
->first_same_value
== p1
->first_same_value
)))
5075 return ((code
== EQ
|| code
== LE
|| code
== GE
5076 || code
== LEU
|| code
== GEU
)
5079 /* If FOLDED_ARG0 is a register, see if the comparison we are
5080 doing now is either the same as we did before or the reverse
5081 (we only check the reverse if not floating-point). */
5082 else if (GET_CODE (folded_arg0
) == REG
)
5084 int qty
= reg_qty
[REGNO (folded_arg0
)];
5086 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
))
5087 && (comparison_dominates_p (qty_comparison_code
[qty
], code
)
5088 || (comparison_dominates_p (qty_comparison_code
[qty
],
5089 reverse_condition (code
))
5090 && GET_MODE_CLASS (mode_arg0
) == MODE_INT
))
5091 && (rtx_equal_p (qty_comparison_const
[qty
], folded_arg1
)
5093 && rtx_equal_p (qty_comparison_const
[qty
],
5095 || (GET_CODE (folded_arg1
) == REG
5096 && (reg_qty
[REGNO (folded_arg1
)]
5097 == qty_comparison_qty
[qty
]))))
5098 return (comparison_dominates_p (qty_comparison_code
[qty
],
5105 /* If we are comparing against zero, see if the first operand is
5106 equivalent to an IOR with a constant. If so, we may be able to
5107 determine the result of this comparison. */
5109 if (const_arg1
== const0_rtx
)
5111 rtx y
= lookup_as_function (folded_arg0
, IOR
);
5115 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
5116 && GET_CODE (inner_const
) == CONST_INT
5117 && INTVAL (inner_const
) != 0)
5119 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
5120 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
5121 && (INTVAL (inner_const
)
5122 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
5123 rtx
true = const_true_rtx
, false = const0_rtx
;
5125 #ifdef FLOAT_STORE_FLAG_VALUE
5126 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5128 true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
);
5129 false = CONST0_RTX (mode
);
5151 new = simplify_relational_operation (code
, mode_arg0
,
5152 const_arg0
? const_arg0
: folded_arg0
,
5153 const_arg1
? const_arg1
: folded_arg1
);
5154 #ifdef FLOAT_STORE_FLAG_VALUE
5155 if (new != 0 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5156 new = ((new == const0_rtx
) ? CONST0_RTX (mode
)
5157 : immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
));
5166 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5167 with that LABEL_REF as its second operand. If so, the result is
5168 the first operand of that MINUS. This handles switches with an
5169 ADDR_DIFF_VEC table. */
5170 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
5172 rtx y
= lookup_as_function (folded_arg0
, MINUS
);
5174 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5175 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
5181 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5182 If so, produce (PLUS Z C2-C). */
5183 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
5185 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
5186 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
5187 return fold_rtx (plus_constant (y
, -INTVAL (const_arg1
)),
5191 /* ... fall through ... */
5194 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
5195 case IOR
: case AND
: case XOR
:
5196 case MULT
: case DIV
: case UDIV
:
5197 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
5198 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5199 is known to be of similar form, we may be able to replace the
5200 operation with a combined operation. This may eliminate the
5201 intermediate operation if every use is simplified in this way.
5202 Note that the similar optimization done by combine.c only works
5203 if the intermediate operation's result has only one reference. */
5205 if (GET_CODE (folded_arg0
) == REG
5206 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
5209 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
5210 rtx y
= lookup_as_function (folded_arg0
, code
);
5212 enum rtx_code associate_code
;
5216 || 0 == (inner_const
5217 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
5218 || GET_CODE (inner_const
) != CONST_INT
5219 /* If we have compiled a statement like
5220 "if (x == (x & mask1))", and now are looking at
5221 "x & mask2", we will have a case where the first operand
5222 of Y is the same as our first operand. Unless we detect
5223 this case, an infinite loop will result. */
5224 || XEXP (y
, 0) == folded_arg0
)
5227 /* Don't associate these operations if they are a PLUS with the
5228 same constant and it is a power of two. These might be doable
5229 with a pre- or post-increment. Similarly for two subtracts of
5230 identical powers of two with post decrement. */
5232 if (code
== PLUS
&& INTVAL (const_arg1
) == INTVAL (inner_const
)
5234 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5235 || exact_log2 (INTVAL (const_arg1
)) >= 0
5237 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5238 || exact_log2 (- INTVAL (const_arg1
)) >= 0
5243 /* Compute the code used to compose the constants. For example,
5244 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5247 = (code
== MULT
|| code
== DIV
|| code
== UDIV
? MULT
5248 : is_shift
|| code
== PLUS
|| code
== MINUS
? PLUS
: code
);
5250 new_const
= simplify_binary_operation (associate_code
, mode
,
5251 const_arg1
, inner_const
);
5256 /* If we are associating shift operations, don't let this
5257 produce a shift of larger than the object. This could
5258 occur when we following a sign-extend by a right shift on
5259 a machine that does a sign-extend as a pair of shifts. */
5261 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
5262 && INTVAL (new_const
) > GET_MODE_BITSIZE (mode
))
5265 y
= copy_rtx (XEXP (y
, 0));
5267 /* If Y contains our first operand (the most common way this
5268 can happen is if Y is a MEM), we would do into an infinite
5269 loop if we tried to fold it. So don't in that case. */
5271 if (! reg_mentioned_p (folded_arg0
, y
))
5272 y
= fold_rtx (y
, insn
);
5274 return cse_gen_binary (code
, mode
, y
, new_const
);
5278 new = simplify_binary_operation (code
, mode
,
5279 const_arg0
? const_arg0
: folded_arg0
,
5280 const_arg1
? const_arg1
: folded_arg1
);
5284 /* (lo_sum (high X) X) is simply X. */
5285 if (code
== LO_SUM
&& const_arg0
!= 0
5286 && GET_CODE (const_arg0
) == HIGH
5287 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
5293 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
5294 const_arg0
? const_arg0
: folded_arg0
,
5295 const_arg1
? const_arg1
: folded_arg1
,
5296 const_arg2
? const_arg2
: XEXP (x
, 2));
5300 return new ? new : x
;
5303 /* Return a constant value currently equivalent to X.
5304 Return 0 if we don't know one. */
5310 if (GET_CODE (x
) == REG
5311 && REGNO_QTY_VALID_P (REGNO (x
))
5312 && qty_const
[reg_qty
[REGNO (x
)]])
5313 x
= gen_lowpart_if_possible (GET_MODE (x
), qty_const
[reg_qty
[REGNO (x
)]]);
5315 if (x
!= 0 && CONSTANT_P (x
))
5318 /* If X is a MEM, try to fold it outside the context of any insn to see if
5319 it might be equivalent to a constant. That handles the case where it
5320 is a constant-pool reference. Then try to look it up in the hash table
5321 in case it is something whose value we have seen before. */
5323 if (GET_CODE (x
) == MEM
)
5325 struct table_elt
*elt
;
5327 x
= fold_rtx (x
, NULL_RTX
);
5331 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) % NBUCKETS
, GET_MODE (x
));
5335 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
5336 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
5343 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5344 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5345 least-significant part of X.
5346 MODE specifies how big a part of X to return.
5348 If the requested operation cannot be done, 0 is returned.
5350 This is similar to gen_lowpart in emit-rtl.c. */
5353 gen_lowpart_if_possible (mode
, x
)
5354 enum machine_mode mode
;
5357 rtx result
= gen_lowpart_common (mode
, x
);
5361 else if (GET_CODE (x
) == MEM
)
5363 /* This is the only other case we handle. */
5364 register int offset
= 0;
5367 #if WORDS_BIG_ENDIAN
5368 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
5369 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
5371 #if BYTES_BIG_ENDIAN
5372 /* Adjust the address so that the address-after-the-data
5374 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
5375 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
5377 new = gen_rtx (MEM
, mode
, plus_constant (XEXP (x
, 0), offset
));
5378 if (! memory_address_p (mode
, XEXP (new, 0)))
5380 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x
);
5381 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x
);
5382 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x
);
5389 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5390 branch. It will be zero if not.
5392 In certain cases, this can cause us to add an equivalence. For example,
5393 if we are following the taken case of
5395 we can add the fact that `i' and '2' are now equivalent.
5397 In any case, we can record that this comparison was passed. If the same
5398 comparison is seen later, we will know its value. */
5401 record_jump_equiv (insn
, taken
)
5405 int cond_known_true
;
5407 enum machine_mode mode
, mode0
, mode1
;
5408 int reversed_nonequality
= 0;
5411 /* Ensure this is the right kind of insn. */
5412 if (! condjump_p (insn
) || simplejump_p (insn
))
5415 /* See if this jump condition is known true or false. */
5417 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 2) == pc_rtx
);
5419 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 1) == pc_rtx
);
5421 /* Get the type of comparison being done and the operands being compared.
5422 If we had to reverse a non-equality condition, record that fact so we
5423 know that it isn't valid for floating-point. */
5424 code
= GET_CODE (XEXP (SET_SRC (PATTERN (insn
)), 0));
5425 op0
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 0), insn
);
5426 op1
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 1), insn
);
5428 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
5429 if (! cond_known_true
)
5431 reversed_nonequality
= (code
!= EQ
&& code
!= NE
);
5432 code
= reverse_condition (code
);
5435 /* The mode is the mode of the non-constant. */
5437 if (mode1
!= VOIDmode
)
5440 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
5443 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5444 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5445 Make any useful entries we can with that information. Called from
5446 above function and called recursively. */
5449 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
)
5451 enum machine_mode mode
;
5453 int reversed_nonequality
;
5455 int op0_hash_code
, op1_hash_code
;
5456 int op0_in_memory
, op0_in_struct
, op1_in_memory
, op1_in_struct
;
5457 struct table_elt
*op0_elt
, *op1_elt
;
5459 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5460 we know that they are also equal in the smaller mode (this is also
5461 true for all smaller modes whether or not there is a SUBREG, but
5462 is not worth testing for with no SUBREG. */
5464 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
5465 && GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
))))
5467 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5468 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5470 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5471 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5472 reversed_nonequality
);
5475 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
5476 && GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
))))
5478 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5479 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5481 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5482 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5483 reversed_nonequality
);
5486 /* Similarly, if this is an NE comparison, and either is a SUBREG
5487 making a smaller mode, we know the whole thing is also NE. */
5489 if (code
== NE
&& GET_CODE (op0
) == SUBREG
5490 && subreg_lowpart_p (op0
)
5491 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
))))
5493 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5494 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5496 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5497 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5498 reversed_nonequality
);
5501 if (code
== NE
&& GET_CODE (op1
) == SUBREG
5502 && subreg_lowpart_p (op1
)
5503 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
))))
5505 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5506 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5508 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5509 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5510 reversed_nonequality
);
5513 /* Hash both operands. */
5516 hash_arg_in_memory
= 0;
5517 hash_arg_in_struct
= 0;
5518 op0_hash_code
= HASH (op0
, mode
);
5519 op0_in_memory
= hash_arg_in_memory
;
5520 op0_in_struct
= hash_arg_in_struct
;
5526 hash_arg_in_memory
= 0;
5527 hash_arg_in_struct
= 0;
5528 op1_hash_code
= HASH (op1
, mode
);
5529 op1_in_memory
= hash_arg_in_memory
;
5530 op1_in_struct
= hash_arg_in_struct
;
5535 /* Look up both operands. */
5536 op0_elt
= lookup (op0
, op0_hash_code
, mode
);
5537 op1_elt
= lookup (op1
, op1_hash_code
, mode
);
5539 /* If we aren't setting two things equal all we can do is save this
5540 comparison. Similarly if this is floating-point. In the latter
5541 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5542 If we record the equality, we might inadvertently delete code
5543 whose intent was to change -0 to +0. */
5545 if (code
!= EQ
|| GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
5547 /* If we reversed a floating-point comparison, if OP0 is not a
5548 register, or if OP1 is neither a register or constant, we can't
5551 if (GET_CODE (op1
) != REG
)
5552 op1
= equiv_constant (op1
);
5554 if ((reversed_nonequality
&& GET_MODE_CLASS (mode
) != MODE_INT
)
5555 || GET_CODE (op0
) != REG
|| op1
== 0)
5558 /* Put OP0 in the hash table if it isn't already. This gives it a
5559 new quantity number. */
5562 if (insert_regs (op0
, NULL_PTR
, 0))
5564 rehash_using_reg (op0
);
5565 op0_hash_code
= HASH (op0
, mode
);
5568 op0_elt
= insert (op0
, NULL_PTR
, op0_hash_code
, mode
);
5569 op0_elt
->in_memory
= op0_in_memory
;
5570 op0_elt
->in_struct
= op0_in_struct
;
5573 qty_comparison_code
[reg_qty
[REGNO (op0
)]] = code
;
5574 if (GET_CODE (op1
) == REG
)
5576 /* Put OP1 in the hash table so it gets a new quantity number. */
5579 if (insert_regs (op1
, NULL_PTR
, 0))
5581 rehash_using_reg (op1
);
5582 op1_hash_code
= HASH (op1
, mode
);
5585 op1_elt
= insert (op1
, NULL_PTR
, op1_hash_code
, mode
);
5586 op1_elt
->in_memory
= op1_in_memory
;
5587 op1_elt
->in_struct
= op1_in_struct
;
5590 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = reg_qty
[REGNO (op1
)];
5591 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = 0;
5595 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = -1;
5596 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = op1
;
5602 /* If both are equivalent, merge the two classes. Save this class for
5603 `cse_set_around_loop'. */
5604 if (op0_elt
&& op1_elt
)
5606 merge_equiv_classes (op0_elt
, op1_elt
);
5607 last_jump_equiv_class
= op0_elt
;
5610 /* For whichever side doesn't have an equivalence, make one. */
5613 if (insert_regs (op0
, op1_elt
, 0))
5615 rehash_using_reg (op0
);
5616 op0_hash_code
= HASH (op0
, mode
);
5619 op0_elt
= insert (op0
, op1_elt
, op0_hash_code
, mode
);
5620 op0_elt
->in_memory
= op0_in_memory
;
5621 op0_elt
->in_struct
= op0_in_struct
;
5622 last_jump_equiv_class
= op0_elt
;
5627 if (insert_regs (op1
, op0_elt
, 0))
5629 rehash_using_reg (op1
);
5630 op1_hash_code
= HASH (op1
, mode
);
5633 op1_elt
= insert (op1
, op0_elt
, op1_hash_code
, mode
);
5634 op1_elt
->in_memory
= op1_in_memory
;
5635 op1_elt
->in_struct
= op1_in_struct
;
5636 last_jump_equiv_class
= op1_elt
;
5640 /* CSE processing for one instruction.
5641 First simplify sources and addresses of all assignments
5642 in the instruction, using previously-computed equivalents values.
5643 Then install the new sources and destinations in the table
5644 of available values.
5646 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
5649 /* Data on one SET contained in the instruction. */
5653 /* The SET rtx itself. */
5655 /* The SET_SRC of the rtx (the original value, if it is changing). */
5657 /* The hash-table element for the SET_SRC of the SET. */
5658 struct table_elt
*src_elt
;
5659 /* Hash code for the SET_SRC. */
5661 /* Hash code for the SET_DEST. */
5663 /* The SET_DEST, with SUBREG, etc., stripped. */
5665 /* Place where the pointer to the INNER_DEST was found. */
5666 rtx
*inner_dest_loc
;
5667 /* Nonzero if the SET_SRC is in memory. */
5669 /* Nonzero if the SET_SRC is in a structure. */
5671 /* Nonzero if the SET_SRC contains something
5672 whose value cannot be predicted and understood. */
5674 /* Original machine mode, in case it becomes a CONST_INT. */
5675 enum machine_mode mode
;
5676 /* A constant equivalent for SET_SRC, if any. */
5678 /* Hash code of constant equivalent for SET_SRC. */
5679 int src_const_hash_code
;
5680 /* Table entry for constant equivalent for SET_SRC, if any. */
5681 struct table_elt
*src_const_elt
;
5685 cse_insn (insn
, in_libcall_block
)
5687 int in_libcall_block
;
5689 register rtx x
= PATTERN (insn
);
5692 register int n_sets
= 0;
5694 /* Records what this insn does to set CC0. */
5695 rtx this_insn_cc0
= 0;
5696 enum machine_mode this_insn_cc0_mode
;
5697 struct write_data writes_memory
;
5698 static struct write_data init
= {0, 0, 0, 0};
5701 struct table_elt
*src_eqv_elt
= 0;
5702 int src_eqv_volatile
;
5703 int src_eqv_in_memory
;
5704 int src_eqv_in_struct
;
5705 int src_eqv_hash_code
;
5710 writes_memory
= init
;
5712 /* Find all the SETs and CLOBBERs in this instruction.
5713 Record all the SETs in the array `set' and count them.
5714 Also determine whether there is a CLOBBER that invalidates
5715 all memory references, or all references at varying addresses. */
5717 if (GET_CODE (x
) == SET
)
5719 sets
= (struct set
*) alloca (sizeof (struct set
));
5722 /* Ignore SETs that are unconditional jumps.
5723 They never need cse processing, so this does not hurt.
5724 The reason is not efficiency but rather
5725 so that we can test at the end for instructions
5726 that have been simplified to unconditional jumps
5727 and not be misled by unchanged instructions
5728 that were unconditional jumps to begin with. */
5729 if (SET_DEST (x
) == pc_rtx
5730 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
5733 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
5734 The hard function value register is used only once, to copy to
5735 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
5736 Ensure we invalidate the destination register. On the 80386 no
5737 other code would invalidate it since it is a fixed_reg.
5738 We need not check the return of apply_change_group; see canon_reg. */
5740 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5742 canon_reg (SET_SRC (x
), insn
);
5743 apply_change_group ();
5744 fold_rtx (SET_SRC (x
), insn
);
5745 invalidate (SET_DEST (x
));
5750 else if (GET_CODE (x
) == PARALLEL
)
5752 register int lim
= XVECLEN (x
, 0);
5754 sets
= (struct set
*) alloca (lim
* sizeof (struct set
));
5756 /* Find all regs explicitly clobbered in this insn,
5757 and ensure they are not replaced with any other regs
5758 elsewhere in this insn.
5759 When a reg that is clobbered is also used for input,
5760 we should presume that that is for a reason,
5761 and we should not substitute some other register
5762 which is not supposed to be clobbered.
5763 Therefore, this loop cannot be merged into the one below
5764 because a CALL may precede a CLOBBER and refer to the
5765 value clobbered. We must not let a canonicalization do
5766 anything in that case. */
5767 for (i
= 0; i
< lim
; i
++)
5769 register rtx y
= XVECEXP (x
, 0, i
);
5770 if (GET_CODE (y
) == CLOBBER
5771 && (GET_CODE (XEXP (y
, 0)) == REG
5772 || GET_CODE (XEXP (y
, 0)) == SUBREG
))
5773 invalidate (XEXP (y
, 0));
5776 for (i
= 0; i
< lim
; i
++)
5778 register rtx y
= XVECEXP (x
, 0, i
);
5779 if (GET_CODE (y
) == SET
)
5781 /* As above, we ignore unconditional jumps and call-insns and
5782 ignore the result of apply_change_group. */
5783 if (GET_CODE (SET_SRC (y
)) == CALL
)
5785 canon_reg (SET_SRC (y
), insn
);
5786 apply_change_group ();
5787 fold_rtx (SET_SRC (y
), insn
);
5788 invalidate (SET_DEST (y
));
5790 else if (SET_DEST (y
) == pc_rtx
5791 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
5794 sets
[n_sets
++].rtl
= y
;
5796 else if (GET_CODE (y
) == CLOBBER
)
5798 /* If we clobber memory, take note of that,
5799 and canon the address.
5800 This does nothing when a register is clobbered
5801 because we have already invalidated the reg. */
5802 if (GET_CODE (XEXP (y
, 0)) == MEM
)
5804 canon_reg (XEXP (y
, 0), NULL_RTX
);
5805 note_mem_written (XEXP (y
, 0), &writes_memory
);
5808 else if (GET_CODE (y
) == USE
5809 && ! (GET_CODE (XEXP (y
, 0)) == REG
5810 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
5811 canon_reg (y
, NULL_RTX
);
5812 else if (GET_CODE (y
) == CALL
)
5814 /* The result of apply_change_group can be ignored; see
5816 canon_reg (y
, insn
);
5817 apply_change_group ();
5822 else if (GET_CODE (x
) == CLOBBER
)
5824 if (GET_CODE (XEXP (x
, 0)) == MEM
)
5826 canon_reg (XEXP (x
, 0), NULL_RTX
);
5827 note_mem_written (XEXP (x
, 0), &writes_memory
);
5831 /* Canonicalize a USE of a pseudo register or memory location. */
5832 else if (GET_CODE (x
) == USE
5833 && ! (GET_CODE (XEXP (x
, 0)) == REG
5834 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
5835 canon_reg (XEXP (x
, 0), NULL_RTX
);
5836 else if (GET_CODE (x
) == CALL
)
5838 /* The result of apply_change_group can be ignored; see canon_reg. */
5839 canon_reg (x
, insn
);
5840 apply_change_group ();
5844 if (n_sets
== 1 && REG_NOTES (insn
) != 0)
5846 /* Store the equivalent value in SRC_EQV, if different. */
5847 rtx tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5849 if (tem
&& ! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
)))
5850 src_eqv
= canon_reg (XEXP (tem
, 0), NULL_RTX
);
5853 /* Canonicalize sources and addresses of destinations.
5854 We do this in a separate pass to avoid problems when a MATCH_DUP is
5855 present in the insn pattern. In that case, we want to ensure that
5856 we don't break the duplicate nature of the pattern. So we will replace
5857 both operands at the same time. Otherwise, we would fail to find an
5858 equivalent substitution in the loop calling validate_change below.
5860 We used to suppress canonicalization of DEST if it appears in SRC,
5861 but we don't do this any more. */
5863 for (i
= 0; i
< n_sets
; i
++)
5865 rtx dest
= SET_DEST (sets
[i
].rtl
);
5866 rtx src
= SET_SRC (sets
[i
].rtl
);
5867 rtx
new = canon_reg (src
, insn
);
5869 if ((GET_CODE (new) == REG
&& GET_CODE (src
) == REG
5870 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
5871 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
5872 || insn_n_dups
[recog_memoized (insn
)] > 0)
5873 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
5875 SET_SRC (sets
[i
].rtl
) = new;
5877 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
5879 validate_change (insn
, &XEXP (dest
, 1),
5880 canon_reg (XEXP (dest
, 1), insn
), 1);
5881 validate_change (insn
, &XEXP (dest
, 2),
5882 canon_reg (XEXP (dest
, 2), insn
), 1);
5885 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
5886 || GET_CODE (dest
) == ZERO_EXTRACT
5887 || GET_CODE (dest
) == SIGN_EXTRACT
)
5888 dest
= XEXP (dest
, 0);
5890 if (GET_CODE (dest
) == MEM
)
5891 canon_reg (dest
, insn
);
5894 /* Now that we have done all the replacements, we can apply the change
5895 group and see if they all work. Note that this will cause some
5896 canonicalizations that would have worked individually not to be applied
5897 because some other canonicalization didn't work, but this should not
5900 The result of apply_change_group can be ignored; see canon_reg. */
5902 apply_change_group ();
5904 /* Set sets[i].src_elt to the class each source belongs to.
5905 Detect assignments from or to volatile things
5906 and set set[i] to zero so they will be ignored
5907 in the rest of this function.
5909 Nothing in this loop changes the hash table or the register chains. */
5911 for (i
= 0; i
< n_sets
; i
++)
5913 register rtx src
, dest
;
5914 register rtx src_folded
;
5915 register struct table_elt
*elt
= 0, *p
;
5916 enum machine_mode mode
;
5919 rtx src_related
= 0;
5920 struct table_elt
*src_const_elt
= 0;
5921 int src_cost
= 10000, src_eqv_cost
= 10000, src_folded_cost
= 10000;
5922 int src_related_cost
= 10000, src_elt_cost
= 10000;
5923 /* Set non-zero if we need to call force_const_mem on with the
5924 contents of src_folded before using it. */
5925 int src_folded_force_flag
= 0;
5927 dest
= SET_DEST (sets
[i
].rtl
);
5928 src
= SET_SRC (sets
[i
].rtl
);
5930 /* If SRC is a constant that has no machine mode,
5931 hash it with the destination's machine mode.
5932 This way we can keep different modes separate. */
5934 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5935 sets
[i
].mode
= mode
;
5939 enum machine_mode eqvmode
= mode
;
5940 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5941 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5943 hash_arg_in_memory
= 0;
5944 hash_arg_in_struct
= 0;
5945 src_eqv
= fold_rtx (src_eqv
, insn
);
5946 src_eqv_hash_code
= HASH (src_eqv
, eqvmode
);
5948 /* Find the equivalence class for the equivalent expression. */
5951 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash_code
, eqvmode
);
5953 src_eqv_volatile
= do_not_record
;
5954 src_eqv_in_memory
= hash_arg_in_memory
;
5955 src_eqv_in_struct
= hash_arg_in_struct
;
5958 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5959 value of the INNER register, not the destination. So it is not
5960 a legal substitution for the source. But save it for later. */
5961 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5964 src_eqv_here
= src_eqv
;
5966 /* Simplify and foldable subexpressions in SRC. Then get the fully-
5967 simplified result, which may not necessarily be valid. */
5968 src_folded
= fold_rtx (src
, insn
);
5970 /* If storing a constant in a bitfield, pre-truncate the constant
5971 so we will be able to record it later. */
5972 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5973 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
5975 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5977 if (GET_CODE (src
) == CONST_INT
5978 && GET_CODE (width
) == CONST_INT
5979 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5980 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5982 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
5983 << INTVAL (width
)) - 1));
5986 /* Compute SRC's hash code, and also notice if it
5987 should not be recorded at all. In that case,
5988 prevent any further processing of this assignment. */
5990 hash_arg_in_memory
= 0;
5991 hash_arg_in_struct
= 0;
5994 sets
[i
].src_hash_code
= HASH (src
, mode
);
5995 sets
[i
].src_volatile
= do_not_record
;
5996 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5997 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6000 /* It is no longer clear why we used to do this, but it doesn't
6001 appear to still be needed. So let's try without it since this
6002 code hurts cse'ing widened ops. */
6003 /* If source is a perverse subreg (such as QI treated as an SI),
6004 treat it as volatile. It may do the work of an SI in one context
6005 where the extra bits are not being used, but cannot replace an SI
6007 if (GET_CODE (src
) == SUBREG
6008 && (GET_MODE_SIZE (GET_MODE (src
))
6009 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
6010 sets
[i
].src_volatile
= 1;
6013 /* Locate all possible equivalent forms for SRC. Try to replace
6014 SRC in the insn with each cheaper equivalent.
6016 We have the following types of equivalents: SRC itself, a folded
6017 version, a value given in a REG_EQUAL note, or a value related
6020 Each of these equivalents may be part of an additional class
6021 of equivalents (if more than one is in the table, they must be in
6022 the same class; we check for this).
6024 If the source is volatile, we don't do any table lookups.
6026 We note any constant equivalent for possible later use in a
6029 if (!sets
[i
].src_volatile
)
6030 elt
= lookup (src
, sets
[i
].src_hash_code
, mode
);
6032 sets
[i
].src_elt
= elt
;
6034 if (elt
&& src_eqv_here
&& src_eqv_elt
)
6036 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
6038 /* The REG_EQUAL is indicating that two formerly distinct
6039 classes are now equivalent. So merge them. */
6040 merge_equiv_classes (elt
, src_eqv_elt
);
6041 src_eqv_hash_code
= HASH (src_eqv
, elt
->mode
);
6042 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash_code
, elt
->mode
);
6048 else if (src_eqv_elt
)
6051 /* Try to find a constant somewhere and record it in `src_const'.
6052 Record its table element, if any, in `src_const_elt'. Look in
6053 any known equivalences first. (If the constant is not in the
6054 table, also set `sets[i].src_const_hash_code'). */
6056 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
6060 src_const_elt
= elt
;
6065 && (CONSTANT_P (src_folded
)
6066 /* Consider (minus (label_ref L1) (label_ref L2)) as
6067 "constant" here so we will record it. This allows us
6068 to fold switch statements when an ADDR_DIFF_VEC is used. */
6069 || (GET_CODE (src_folded
) == MINUS
6070 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
6071 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
6072 src_const
= src_folded
, src_const_elt
= elt
;
6073 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
6074 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
6076 /* If we don't know if the constant is in the table, get its
6077 hash code and look it up. */
6078 if (src_const
&& src_const_elt
== 0)
6080 sets
[i
].src_const_hash_code
= HASH (src_const
, mode
);
6081 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash_code
,
6085 sets
[i
].src_const
= src_const
;
6086 sets
[i
].src_const_elt
= src_const_elt
;
6088 /* If the constant and our source are both in the table, mark them as
6089 equivalent. Otherwise, if a constant is in the table but the source
6090 isn't, set ELT to it. */
6091 if (src_const_elt
&& elt
6092 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
6093 merge_equiv_classes (elt
, src_const_elt
);
6094 else if (src_const_elt
&& elt
== 0)
6095 elt
= src_const_elt
;
6097 /* See if there is a register linearly related to a constant
6098 equivalent of SRC. */
6100 && (GET_CODE (src_const
) == CONST
6101 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
6103 src_related
= use_related_value (src_const
, src_const_elt
);
6106 struct table_elt
*src_related_elt
6107 = lookup (src_related
, HASH (src_related
, mode
), mode
);
6108 if (src_related_elt
&& elt
)
6110 if (elt
->first_same_value
6111 != src_related_elt
->first_same_value
)
6112 /* This can occur when we previously saw a CONST
6113 involving a SYMBOL_REF and then see the SYMBOL_REF
6114 twice. Merge the involved classes. */
6115 merge_equiv_classes (elt
, src_related_elt
);
6118 src_related_elt
= 0;
6120 else if (src_related_elt
&& elt
== 0)
6121 elt
= src_related_elt
;
6125 /* See if we have a CONST_INT that is already in a register in a
6128 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
6129 && GET_MODE_CLASS (mode
) == MODE_INT
6130 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
6132 enum machine_mode wider_mode
;
6134 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
6135 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
6136 && src_related
== 0;
6137 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
6139 struct table_elt
*const_elt
6140 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
6145 for (const_elt
= const_elt
->first_same_value
;
6146 const_elt
; const_elt
= const_elt
->next_same_value
)
6147 if (GET_CODE (const_elt
->exp
) == REG
)
6149 src_related
= gen_lowpart_if_possible (mode
,
6156 /* Another possibility is that we have an AND with a constant in
6157 a mode narrower than a word. If so, it might have been generated
6158 as part of an "if" which would narrow the AND. If we already
6159 have done the AND in a wider mode, we can use a SUBREG of that
6162 if (flag_expensive_optimizations
&& ! src_related
6163 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
6164 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6166 enum machine_mode tmode
;
6167 rtx new_and
= gen_rtx (AND
, VOIDmode
, NULL_RTX
, XEXP (src
, 1));
6169 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6170 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6171 tmode
= GET_MODE_WIDER_MODE (tmode
))
6173 rtx inner
= gen_lowpart_if_possible (tmode
, XEXP (src
, 0));
6174 struct table_elt
*larger_elt
;
6178 PUT_MODE (new_and
, tmode
);
6179 XEXP (new_and
, 0) = inner
;
6180 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
6181 if (larger_elt
== 0)
6184 for (larger_elt
= larger_elt
->first_same_value
;
6185 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6186 if (GET_CODE (larger_elt
->exp
) == REG
)
6189 = gen_lowpart_if_possible (mode
, larger_elt
->exp
);
6199 if (src
== src_folded
)
6202 /* At this point, ELT, if non-zero, points to a class of expressions
6203 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6204 and SRC_RELATED, if non-zero, each contain additional equivalent
6205 expressions. Prune these latter expressions by deleting expressions
6206 already in the equivalence class.
6208 Check for an equivalent identical to the destination. If found,
6209 this is the preferred equivalent since it will likely lead to
6210 elimination of the insn. Indicate this by placing it in
6213 if (elt
) elt
= elt
->first_same_value
;
6214 for (p
= elt
; p
; p
= p
->next_same_value
)
6216 enum rtx_code code
= GET_CODE (p
->exp
);
6218 /* If the expression is not valid, ignore it. Then we do not
6219 have to check for validity below. In most cases, we can use
6220 `rtx_equal_p', since canonicalization has already been done. */
6221 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
6224 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
6226 else if (src_folded
&& GET_CODE (src_folded
) == code
6227 && rtx_equal_p (src_folded
, p
->exp
))
6229 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
6230 && rtx_equal_p (src_eqv_here
, p
->exp
))
6232 else if (src_related
&& GET_CODE (src_related
) == code
6233 && rtx_equal_p (src_related
, p
->exp
))
6236 /* This is the same as the destination of the insns, we want
6237 to prefer it. Copy it to src_related. The code below will
6238 then give it a negative cost. */
6239 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
6244 /* Find the cheapest valid equivalent, trying all the available
6245 possibilities. Prefer items not in the hash table to ones
6246 that are when they are equal cost. Note that we can never
6247 worsen an insn as the current contents will also succeed.
6248 If we find an equivalent identical to the destination, use it as best,
6249 since this insn will probably be eliminated in that case. */
6252 if (rtx_equal_p (src
, dest
))
6255 src_cost
= COST (src
);
6260 if (rtx_equal_p (src_eqv_here
, dest
))
6263 src_eqv_cost
= COST (src_eqv_here
);
6268 if (rtx_equal_p (src_folded
, dest
))
6269 src_folded_cost
= -1;
6271 src_folded_cost
= COST (src_folded
);
6276 if (rtx_equal_p (src_related
, dest
))
6277 src_related_cost
= -1;
6279 src_related_cost
= COST (src_related
);
6282 /* If this was an indirect jump insn, a known label will really be
6283 cheaper even though it looks more expensive. */
6284 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
6285 src_folded
= src_const
, src_folded_cost
= -1;
6287 /* Terminate loop when replacement made. This must terminate since
6288 the current contents will be tested and will always be valid. */
6293 /* Skip invalid entries. */
6294 while (elt
&& GET_CODE (elt
->exp
) != REG
6295 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6296 elt
= elt
->next_same_value
;
6298 if (elt
) src_elt_cost
= elt
->cost
;
6300 /* Find cheapest and skip it for the next time. For items
6301 of equal cost, use this order:
6302 src_folded, src, src_eqv, src_related and hash table entry. */
6303 if (src_folded_cost
<= src_cost
6304 && src_folded_cost
<= src_eqv_cost
6305 && src_folded_cost
<= src_related_cost
6306 && src_folded_cost
<= src_elt_cost
)
6308 trial
= src_folded
, src_folded_cost
= 10000;
6309 if (src_folded_force_flag
)
6310 trial
= force_const_mem (mode
, trial
);
6312 else if (src_cost
<= src_eqv_cost
6313 && src_cost
<= src_related_cost
6314 && src_cost
<= src_elt_cost
)
6315 trial
= src
, src_cost
= 10000;
6316 else if (src_eqv_cost
<= src_related_cost
6317 && src_eqv_cost
<= src_elt_cost
)
6318 trial
= src_eqv_here
, src_eqv_cost
= 10000;
6319 else if (src_related_cost
<= src_elt_cost
)
6320 trial
= src_related
, src_related_cost
= 10000;
6323 trial
= copy_rtx (elt
->exp
);
6324 elt
= elt
->next_same_value
;
6325 src_elt_cost
= 10000;
6328 /* We don't normally have an insn matching (set (pc) (pc)), so
6329 check for this separately here. We will delete such an
6332 Tablejump insns contain a USE of the table, so simply replacing
6333 the operand with the constant won't match. This is simply an
6334 unconditional branch, however, and is therefore valid. Just
6335 insert the substitution here and we will delete and re-emit
6338 if (n_sets
== 1 && dest
== pc_rtx
6340 || (GET_CODE (trial
) == LABEL_REF
6341 && ! condjump_p (insn
))))
6343 /* If TRIAL is a label in front of a jump table, we are
6344 really falling through the switch (this is how casesi
6345 insns work), so we must branch around the table. */
6346 if (GET_CODE (trial
) == CODE_LABEL
6347 && NEXT_INSN (trial
) != 0
6348 && GET_CODE (NEXT_INSN (trial
)) == JUMP_INSN
6349 && (GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_DIFF_VEC
6350 || GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_VEC
))
6352 trial
= gen_rtx (LABEL_REF
, Pmode
, get_label_after (trial
));
6354 SET_SRC (sets
[i
].rtl
) = trial
;
6358 /* Look for a substitution that makes a valid insn. */
6359 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
6361 /* The result of apply_change_group can be ignored; see
6364 validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
6365 canon_reg (SET_SRC (sets
[i
].rtl
), insn
),
6367 apply_change_group ();
6371 /* If we previously found constant pool entries for
6372 constants and this is a constant, try making a
6373 pool entry. Put it in src_folded unless we already have done
6374 this since that is where it likely came from. */
6376 else if (constant_pool_entries_cost
6377 && CONSTANT_P (trial
)
6378 && (src_folded
== 0 || GET_CODE (src_folded
) != MEM
)
6379 && GET_MODE_CLASS (mode
) != MODE_CC
)
6381 src_folded_force_flag
= 1;
6383 src_folded_cost
= constant_pool_entries_cost
;
6387 src
= SET_SRC (sets
[i
].rtl
);
6389 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6390 However, there is an important exception: If both are registers
6391 that are not the head of their equivalence class, replace SET_SRC
6392 with the head of the class. If we do not do this, we will have
6393 both registers live over a portion of the basic block. This way,
6394 their lifetimes will likely abut instead of overlapping. */
6395 if (GET_CODE (dest
) == REG
6396 && REGNO_QTY_VALID_P (REGNO (dest
))
6397 && qty_mode
[reg_qty
[REGNO (dest
)]] == GET_MODE (dest
)
6398 && qty_first_reg
[reg_qty
[REGNO (dest
)]] != REGNO (dest
)
6399 && GET_CODE (src
) == REG
&& REGNO (src
) == REGNO (dest
)
6400 /* Don't do this if the original insn had a hard reg as
6402 && (GET_CODE (sets
[i
].src
) != REG
6403 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
))
6404 /* We can't call canon_reg here because it won't do anything if
6405 SRC is a hard register. */
6407 int first
= qty_first_reg
[reg_qty
[REGNO (src
)]];
6409 src
= SET_SRC (sets
[i
].rtl
)
6410 = first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
6411 : gen_rtx (REG
, GET_MODE (src
), first
);
6413 /* If we had a constant that is cheaper than what we are now
6414 setting SRC to, use that constant. We ignored it when we
6415 thought we could make this into a no-op. */
6416 if (src_const
&& COST (src_const
) < COST (src
)
6417 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
), src_const
, 0))
6421 /* If we made a change, recompute SRC values. */
6422 if (src
!= sets
[i
].src
)
6425 hash_arg_in_memory
= 0;
6426 hash_arg_in_struct
= 0;
6428 sets
[i
].src_hash_code
= HASH (src
, mode
);
6429 sets
[i
].src_volatile
= do_not_record
;
6430 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6431 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6432 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash_code
, mode
);
6435 /* If this is a single SET, we are setting a register, and we have an
6436 equivalent constant, we want to add a REG_NOTE. We don't want
6437 to write a REG_EQUAL note for a constant pseudo since verifying that
6438 that pseudo hasn't been eliminated is a pain. Such a note also
6439 won't help anything. */
6440 if (n_sets
== 1 && src_const
&& GET_CODE (dest
) == REG
6441 && GET_CODE (src_const
) != REG
)
6443 rtx tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6445 /* Record the actual constant value in a REG_EQUAL note, making
6446 a new one if one does not already exist. */
6448 XEXP (tem
, 0) = src_const
;
6450 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
6451 src_const
, REG_NOTES (insn
));
6453 /* If storing a constant value in a register that
6454 previously held the constant value 0,
6455 record this fact with a REG_WAS_0 note on this insn.
6457 Note that the *register* is required to have previously held 0,
6458 not just any register in the quantity and we must point to the
6459 insn that set that register to zero.
6461 Rather than track each register individually, we just see if
6462 the last set for this quantity was for this register. */
6464 if (REGNO_QTY_VALID_P (REGNO (dest
))
6465 && qty_const
[reg_qty
[REGNO (dest
)]] == const0_rtx
)
6467 /* See if we previously had a REG_WAS_0 note. */
6468 rtx note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
6469 rtx const_insn
= qty_const_insn
[reg_qty
[REGNO (dest
)]];
6471 if ((tem
= single_set (const_insn
)) != 0
6472 && rtx_equal_p (SET_DEST (tem
), dest
))
6475 XEXP (note
, 0) = const_insn
;
6477 REG_NOTES (insn
) = gen_rtx (INSN_LIST
, REG_WAS_0
,
6478 const_insn
, REG_NOTES (insn
));
6483 /* Now deal with the destination. */
6485 sets
[i
].inner_dest_loc
= &SET_DEST (sets
[0].rtl
);
6487 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
6488 to the MEM or REG within it. */
6489 while (GET_CODE (dest
) == SIGN_EXTRACT
6490 || GET_CODE (dest
) == ZERO_EXTRACT
6491 || GET_CODE (dest
) == SUBREG
6492 || GET_CODE (dest
) == STRICT_LOW_PART
)
6494 sets
[i
].inner_dest_loc
= &XEXP (dest
, 0);
6495 dest
= XEXP (dest
, 0);
6498 sets
[i
].inner_dest
= dest
;
6500 if (GET_CODE (dest
) == MEM
)
6502 dest
= fold_rtx (dest
, insn
);
6504 /* Decide whether we invalidate everything in memory,
6505 or just things at non-fixed places.
6506 Writing a large aggregate must invalidate everything
6507 because we don't know how long it is. */
6508 note_mem_written (dest
, &writes_memory
);
6511 /* Compute the hash code of the destination now,
6512 before the effects of this instruction are recorded,
6513 since the register values used in the address computation
6514 are those before this instruction. */
6515 sets
[i
].dest_hash_code
= HASH (dest
, mode
);
6517 /* Don't enter a bit-field in the hash table
6518 because the value in it after the store
6519 may not equal what was stored, due to truncation. */
6521 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6522 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6524 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6526 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
6527 && GET_CODE (width
) == CONST_INT
6528 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
6529 && ! (INTVAL (src_const
)
6530 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6531 /* Exception: if the value is constant,
6532 and it won't be truncated, record it. */
6536 /* This is chosen so that the destination will be invalidated
6537 but no new value will be recorded.
6538 We must invalidate because sometimes constant
6539 values can be recorded for bitfields. */
6540 sets
[i
].src_elt
= 0;
6541 sets
[i
].src_volatile
= 1;
6547 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
6549 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
6551 PUT_CODE (insn
, NOTE
);
6552 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
6553 NOTE_SOURCE_FILE (insn
) = 0;
6554 cse_jumps_altered
= 1;
6555 /* One less use of the label this insn used to jump to. */
6556 --LABEL_NUSES (JUMP_LABEL (insn
));
6557 /* No more processing for this set. */
6561 /* If this SET is now setting PC to a label, we know it used to
6562 be a conditional or computed branch. So we see if we can follow
6563 it. If it was a computed branch, delete it and re-emit. */
6564 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
6568 /* If this is not in the format for a simple branch and
6569 we are the only SET in it, re-emit it. */
6570 if (! simplejump_p (insn
) && n_sets
== 1)
6572 rtx
new = emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
6573 JUMP_LABEL (new) = XEXP (src
, 0);
6574 LABEL_NUSES (XEXP (src
, 0))++;
6579 /* Now that we've converted this jump to an unconditional jump,
6580 there is dead code after it. Delete the dead code until we
6581 reach a BARRIER, the end of the function, or a label. Do
6582 not delete NOTEs except for NOTE_INSN_DELETED since later
6583 phases assume these notes are retained. */
6587 while (NEXT_INSN (p
) != 0
6588 && GET_CODE (NEXT_INSN (p
)) != BARRIER
6589 && GET_CODE (NEXT_INSN (p
)) != CODE_LABEL
)
6591 if (GET_CODE (NEXT_INSN (p
)) != NOTE
6592 || NOTE_LINE_NUMBER (NEXT_INSN (p
)) == NOTE_INSN_DELETED
)
6593 delete_insn (NEXT_INSN (p
));
6598 /* If we don't have a BARRIER immediately after INSN, put one there.
6599 Much code assumes that there are no NOTEs between a JUMP_INSN and
6602 if (NEXT_INSN (insn
) == 0
6603 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
6604 emit_barrier_after (insn
);
6606 /* We might have two BARRIERs separated by notes. Delete the second
6609 if (p
!= insn
&& NEXT_INSN (p
) != 0
6610 && GET_CODE (NEXT_INSN (p
)) == BARRIER
)
6611 delete_insn (NEXT_INSN (p
));
6613 cse_jumps_altered
= 1;
6617 /* If destination is volatile, invalidate it and then do no further
6618 processing for this assignment. */
6620 else if (do_not_record
)
6622 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
6623 || GET_CODE (dest
) == MEM
)
6628 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
6629 sets
[i
].dest_hash_code
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
6632 /* If setting CC0, record what it was set to, or a constant, if it
6633 is equivalent to a constant. If it is being set to a floating-point
6634 value, make a COMPARE with the appropriate constant of 0. If we
6635 don't do this, later code can interpret this as a test against
6636 const0_rtx, which can cause problems if we try to put it into an
6637 insn as a floating-point operand. */
6638 if (dest
== cc0_rtx
)
6640 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
6641 this_insn_cc0_mode
= mode
;
6642 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
6643 this_insn_cc0
= gen_rtx (COMPARE
, VOIDmode
, this_insn_cc0
,
6649 /* Now enter all non-volatile source expressions in the hash table
6650 if they are not already present.
6651 Record their equivalence classes in src_elt.
6652 This way we can insert the corresponding destinations into
6653 the same classes even if the actual sources are no longer in them
6654 (having been invalidated). */
6656 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
6657 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
6659 register struct table_elt
*elt
;
6660 register struct table_elt
*classp
= sets
[0].src_elt
;
6661 rtx dest
= SET_DEST (sets
[0].rtl
);
6662 enum machine_mode eqvmode
= GET_MODE (dest
);
6664 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6666 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6669 if (insert_regs (src_eqv
, classp
, 0))
6670 src_eqv_hash_code
= HASH (src_eqv
, eqvmode
);
6671 elt
= insert (src_eqv
, classp
, src_eqv_hash_code
, eqvmode
);
6672 elt
->in_memory
= src_eqv_in_memory
;
6673 elt
->in_struct
= src_eqv_in_struct
;
6677 for (i
= 0; i
< n_sets
; i
++)
6678 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
6679 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
6681 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
6683 /* REG_EQUAL in setting a STRICT_LOW_PART
6684 gives an equivalent for the entire destination register,
6685 not just for the subreg being stored in now.
6686 This is a more interesting equivalence, so we arrange later
6687 to treat the entire reg as the destination. */
6688 sets
[i
].src_elt
= src_eqv_elt
;
6689 sets
[i
].src_hash_code
= src_eqv_hash_code
;
6693 /* Insert source and constant equivalent into hash table, if not
6695 register struct table_elt
*classp
= src_eqv_elt
;
6696 register rtx src
= sets
[i
].src
;
6697 register rtx dest
= SET_DEST (sets
[i
].rtl
);
6698 enum machine_mode mode
6699 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6701 if (sets
[i
].src_elt
== 0)
6703 register struct table_elt
*elt
;
6705 /* Note that these insert_regs calls cannot remove
6706 any of the src_elt's, because they would have failed to
6707 match if not still valid. */
6708 if (insert_regs (src
, classp
, 0))
6709 sets
[i
].src_hash_code
= HASH (src
, mode
);
6710 elt
= insert (src
, classp
, sets
[i
].src_hash_code
, mode
);
6711 elt
->in_memory
= sets
[i
].src_in_memory
;
6712 elt
->in_struct
= sets
[i
].src_in_struct
;
6713 sets
[i
].src_elt
= classp
= elt
;
6716 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
6717 && src
!= sets
[i
].src_const
6718 && ! rtx_equal_p (sets
[i
].src_const
, src
))
6719 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
6720 sets
[i
].src_const_hash_code
, mode
);
6723 else if (sets
[i
].src_elt
== 0)
6724 /* If we did not insert the source into the hash table (e.g., it was
6725 volatile), note the equivalence class for the REG_EQUAL value, if any,
6726 so that the destination goes into that class. */
6727 sets
[i
].src_elt
= src_eqv_elt
;
6729 invalidate_from_clobbers (&writes_memory
, x
);
6731 /* Some registers are invalidated by subroutine calls. Memory is
6732 invalidated by non-constant calls. */
6734 if (GET_CODE (insn
) == CALL_INSN
)
6736 static struct write_data everything
= {0, 1, 1, 1};
6738 if (! CONST_CALL_P (insn
))
6739 invalidate_memory (&everything
);
6740 invalidate_for_call ();
6743 /* Now invalidate everything set by this instruction.
6744 If a SUBREG or other funny destination is being set,
6745 sets[i].rtl is still nonzero, so here we invalidate the reg
6746 a part of which is being set. */
6748 for (i
= 0; i
< n_sets
; i
++)
6751 register rtx dest
= sets
[i
].inner_dest
;
6753 /* Needed for registers to remove the register from its
6754 previous quantity's chain.
6755 Needed for memory if this is a nonvarying address, unless
6756 we have just done an invalidate_memory that covers even those. */
6757 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
6758 || (! writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
6762 /* Make sure registers mentioned in destinations
6763 are safe for use in an expression to be inserted.
6764 This removes from the hash table
6765 any invalid entry that refers to one of these registers.
6767 We don't care about the return value from mention_regs because
6768 we are going to hash the SET_DEST values unconditionally. */
6770 for (i
= 0; i
< n_sets
; i
++)
6771 if (sets
[i
].rtl
&& GET_CODE (SET_DEST (sets
[i
].rtl
)) != REG
)
6772 mention_regs (SET_DEST (sets
[i
].rtl
));
6774 /* We may have just removed some of the src_elt's from the hash table.
6775 So replace each one with the current head of the same class. */
6777 for (i
= 0; i
< n_sets
; i
++)
6780 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
6781 /* If elt was removed, find current head of same class,
6782 or 0 if nothing remains of that class. */
6784 register struct table_elt
*elt
= sets
[i
].src_elt
;
6786 while (elt
&& elt
->prev_same_value
)
6787 elt
= elt
->prev_same_value
;
6789 while (elt
&& elt
->first_same_value
== 0)
6790 elt
= elt
->next_same_value
;
6791 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
6795 /* Now insert the destinations into their equivalence classes. */
6797 for (i
= 0; i
< n_sets
; i
++)
6800 register rtx dest
= SET_DEST (sets
[i
].rtl
);
6801 register struct table_elt
*elt
;
6803 /* Don't record value if we are not supposed to risk allocating
6804 floating-point values in registers that might be wider than
6806 if ((flag_float_store
6807 && GET_CODE (dest
) == MEM
6808 && GET_MODE_CLASS (GET_MODE (dest
)) == MODE_FLOAT
)
6809 /* Don't record values of destinations set inside a libcall block
6810 since we might delete the libcall. Things should have been set
6811 up so we won't want to reuse such a value, but we play it safe
6814 /* If we didn't put a REG_EQUAL value or a source into the hash
6815 table, there is no point is recording DEST. */
6816 || sets
[i
].src_elt
== 0)
6819 /* STRICT_LOW_PART isn't part of the value BEING set,
6820 and neither is the SUBREG inside it.
6821 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6822 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6823 dest
= SUBREG_REG (XEXP (dest
, 0));
6825 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
6826 /* Registers must also be inserted into chains for quantities. */
6827 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
6828 /* If `insert_regs' changes something, the hash code must be
6830 sets
[i
].dest_hash_code
= HASH (dest
, GET_MODE (dest
));
6832 elt
= insert (dest
, sets
[i
].src_elt
,
6833 sets
[i
].dest_hash_code
, GET_MODE (dest
));
6834 elt
->in_memory
= GET_CODE (sets
[i
].inner_dest
) == MEM
;
6837 /* This implicitly assumes a whole struct
6838 need not have MEM_IN_STRUCT_P.
6839 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
6840 elt
->in_struct
= (MEM_IN_STRUCT_P (sets
[i
].inner_dest
)
6841 || sets
[i
].inner_dest
!= SET_DEST (sets
[i
].rtl
));
6844 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6845 narrower than M2, and both M1 and M2 are the same number of words,
6846 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6847 make that equivalence as well.
6849 However, BAR may have equivalences for which gen_lowpart_if_possible
6850 will produce a simpler value than gen_lowpart_if_possible applied to
6851 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6852 BAR's equivalences. If we don't get a simplified form, make
6853 the SUBREG. It will not be used in an equivalence, but will
6854 cause two similar assignments to be detected.
6856 Note the loop below will find SUBREG_REG (DEST) since we have
6857 already entered SRC and DEST of the SET in the table. */
6859 if (GET_CODE (dest
) == SUBREG
6860 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) / UNITS_PER_WORD
6861 == GET_MODE_SIZE (GET_MODE (dest
)) / UNITS_PER_WORD
)
6862 && (GET_MODE_SIZE (GET_MODE (dest
))
6863 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6864 && sets
[i
].src_elt
!= 0)
6866 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
6867 struct table_elt
*elt
, *classp
= 0;
6869 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
6870 elt
= elt
->next_same_value
)
6874 struct table_elt
*src_elt
;
6876 /* Ignore invalid entries. */
6877 if (GET_CODE (elt
->exp
) != REG
6878 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6881 new_src
= gen_lowpart_if_possible (new_mode
, elt
->exp
);
6883 new_src
= gen_rtx (SUBREG
, new_mode
, elt
->exp
, 0);
6885 src_hash
= HASH (new_src
, new_mode
);
6886 src_elt
= lookup (new_src
, src_hash
, new_mode
);
6888 /* Put the new source in the hash table is if isn't
6892 if (insert_regs (new_src
, classp
, 0))
6893 src_hash
= HASH (new_src
, new_mode
);
6894 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
6895 src_elt
->in_memory
= elt
->in_memory
;
6896 src_elt
->in_struct
= elt
->in_struct
;
6898 else if (classp
&& classp
!= src_elt
->first_same_value
)
6899 /* Show that two things that we've seen before are
6900 actually the same. */
6901 merge_equiv_classes (src_elt
, classp
);
6903 classp
= src_elt
->first_same_value
;
6908 /* Special handling for (set REG0 REG1)
6909 where REG0 is the "cheapest", cheaper than REG1.
6910 After cse, REG1 will probably not be used in the sequel,
6911 so (if easily done) change this insn to (set REG1 REG0) and
6912 replace REG1 with REG0 in the previous insn that computed their value.
6913 Then REG1 will become a dead store and won't cloud the situation
6914 for later optimizations.
6916 Do not make this change if REG1 is a hard register, because it will
6917 then be used in the sequel and we may be changing a two-operand insn
6918 into a three-operand insn.
6920 Also do not do this if we are operating on a copy of INSN. */
6922 if (n_sets
== 1 && sets
[0].rtl
&& GET_CODE (SET_DEST (sets
[0].rtl
)) == REG
6923 && NEXT_INSN (PREV_INSN (insn
)) == insn
6924 && GET_CODE (SET_SRC (sets
[0].rtl
)) == REG
6925 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
6926 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
)))
6927 && (qty_first_reg
[reg_qty
[REGNO (SET_SRC (sets
[0].rtl
))]]
6928 == REGNO (SET_DEST (sets
[0].rtl
))))
6930 rtx prev
= PREV_INSN (insn
);
6931 while (prev
&& GET_CODE (prev
) == NOTE
)
6932 prev
= PREV_INSN (prev
);
6934 if (prev
&& GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SET
6935 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
))
6937 rtx dest
= SET_DEST (sets
[0].rtl
);
6938 rtx note
= find_reg_note (prev
, REG_EQUIV
, NULL_RTX
);
6940 validate_change (prev
, & SET_DEST (PATTERN (prev
)), dest
, 1);
6941 validate_change (insn
, & SET_DEST (sets
[0].rtl
),
6942 SET_SRC (sets
[0].rtl
), 1);
6943 validate_change (insn
, & SET_SRC (sets
[0].rtl
), dest
, 1);
6944 apply_change_group ();
6946 /* If REG1 was equivalent to a constant, REG0 is not. */
6948 PUT_REG_NOTE_KIND (note
, REG_EQUAL
);
6950 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6951 any REG_WAS_0 note on INSN to PREV. */
6952 note
= find_reg_note (prev
, REG_WAS_0
, NULL_RTX
);
6954 remove_note (prev
, note
);
6956 note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
6959 remove_note (insn
, note
);
6960 XEXP (note
, 1) = REG_NOTES (prev
);
6961 REG_NOTES (prev
) = note
;
6966 /* If this is a conditional jump insn, record any known equivalences due to
6967 the condition being tested. */
6969 last_jump_equiv_class
= 0;
6970 if (GET_CODE (insn
) == JUMP_INSN
6971 && n_sets
== 1 && GET_CODE (x
) == SET
6972 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
6973 record_jump_equiv (insn
, 0);
6976 /* If the previous insn set CC0 and this insn no longer references CC0,
6977 delete the previous insn. Here we use the fact that nothing expects CC0
6978 to be valid over an insn, which is true until the final pass. */
6979 if (prev_insn
&& GET_CODE (prev_insn
) == INSN
6980 && (tem
= single_set (prev_insn
)) != 0
6981 && SET_DEST (tem
) == cc0_rtx
6982 && ! reg_mentioned_p (cc0_rtx
, x
))
6984 PUT_CODE (prev_insn
, NOTE
);
6985 NOTE_LINE_NUMBER (prev_insn
) = NOTE_INSN_DELETED
;
6986 NOTE_SOURCE_FILE (prev_insn
) = 0;
6989 prev_insn_cc0
= this_insn_cc0
;
6990 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6996 /* Store 1 in *WRITES_PTR for those categories of memory ref
6997 that must be invalidated when the expression WRITTEN is stored in.
6998 If WRITTEN is null, say everything must be invalidated. */
7001 note_mem_written (written
, writes_ptr
)
7003 struct write_data
*writes_ptr
;
7005 static struct write_data everything
= {0, 1, 1, 1};
7008 *writes_ptr
= everything
;
7009 else if (GET_CODE (written
) == MEM
)
7011 /* Pushing or popping the stack invalidates just the stack pointer. */
7012 rtx addr
= XEXP (written
, 0);
7013 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7014 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7015 && GET_CODE (XEXP (addr
, 0)) == REG
7016 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
7021 else if (GET_MODE (written
) == BLKmode
)
7022 *writes_ptr
= everything
;
7023 else if (cse_rtx_addr_varies_p (written
))
7025 /* A varying address that is a sum indicates an array element,
7026 and that's just as good as a structure element
7027 in implying that we need not invalidate scalar variables.
7028 However, we must allow QImode aliasing of scalars, because the
7029 ANSI C standard allows character pointers to alias anything. */
7030 if (! ((MEM_IN_STRUCT_P (written
)
7031 || GET_CODE (XEXP (written
, 0)) == PLUS
)
7032 && GET_MODE (written
) != QImode
))
7033 writes_ptr
->all
= 1;
7034 writes_ptr
->nonscalar
= 1;
7036 writes_ptr
->var
= 1;
7040 /* Perform invalidation on the basis of everything about an insn
7041 except for invalidating the actual places that are SET in it.
7042 This includes the places CLOBBERed, and anything that might
7043 alias with something that is SET or CLOBBERed.
7045 W points to the writes_memory for this insn, a struct write_data
7046 saying which kinds of memory references must be invalidated.
7047 X is the pattern of the insn. */
7050 invalidate_from_clobbers (w
, x
)
7051 struct write_data
*w
;
7054 /* If W->var is not set, W specifies no action.
7055 If W->all is set, this step gets all memory refs
7056 so they can be ignored in the rest of this function. */
7058 invalidate_memory (w
);
7062 if (reg_tick
[STACK_POINTER_REGNUM
] >= 0)
7063 reg_tick
[STACK_POINTER_REGNUM
]++;
7065 /* This should be *very* rare. */
7066 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
7067 invalidate (stack_pointer_rtx
);
7070 if (GET_CODE (x
) == CLOBBER
)
7072 rtx ref
= XEXP (x
, 0);
7074 && (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7075 || (GET_CODE (ref
) == MEM
&& ! w
->all
)))
7078 else if (GET_CODE (x
) == PARALLEL
)
7081 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
7083 register rtx y
= XVECEXP (x
, 0, i
);
7084 if (GET_CODE (y
) == CLOBBER
)
7086 rtx ref
= XEXP (y
, 0);
7088 &&(GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7089 || (GET_CODE (ref
) == MEM
&& !w
->all
)))
7096 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7097 and replace any registers in them with either an equivalent constant
7098 or the canonical form of the register. If we are inside an address,
7099 only do this if the address remains valid.
7101 OBJECT is 0 except when within a MEM in which case it is the MEM.
7103 Return the replacement for X. */
7106 cse_process_notes (x
, object
)
7110 enum rtx_code code
= GET_CODE (x
);
7111 char *fmt
= GET_RTX_FORMAT (code
);
7128 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), x
);
7133 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
7134 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
7136 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
7142 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
7143 /* We don't substitute VOIDmode constants into these rtx,
7144 since they would impede folding. */
7145 if (GET_MODE (new) != VOIDmode
)
7146 validate_change (object
, &XEXP (x
, 0), new, 0);
7151 i
= reg_qty
[REGNO (x
)];
7153 /* Return a constant or a constant register. */
7154 if (REGNO_QTY_VALID_P (REGNO (x
))
7155 && qty_const
[i
] != 0
7156 && (CONSTANT_P (qty_const
[i
])
7157 || GET_CODE (qty_const
[i
]) == REG
))
7159 rtx
new = gen_lowpart_if_possible (GET_MODE (x
), qty_const
[i
]);
7164 /* Otherwise, canonicalize this register. */
7165 return canon_reg (x
, NULL_RTX
);
7168 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
7170 validate_change (object
, &XEXP (x
, i
),
7171 cse_process_notes (XEXP (x
, i
), object
), NULL_RTX
);
7176 /* Find common subexpressions between the end test of a loop and the beginning
7177 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7179 Often we have a loop where an expression in the exit test is used
7180 in the body of the loop. For example "while (*p) *q++ = *p++;".
7181 Because of the way we duplicate the loop exit test in front of the loop,
7182 however, we don't detect that common subexpression. This will be caught
7183 when global cse is implemented, but this is a quite common case.
7185 This function handles the most common cases of these common expressions.
7186 It is called after we have processed the basic block ending with the
7187 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7188 jumps to a label used only once. */
7191 cse_around_loop (loop_start
)
7196 struct table_elt
*p
;
7198 /* If the jump at the end of the loop doesn't go to the start, we don't
7200 for (insn
= PREV_INSN (loop_start
);
7201 insn
&& (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) >= 0);
7202 insn
= PREV_INSN (insn
))
7206 || GET_CODE (insn
) != NOTE
7207 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
7210 /* If the last insn of the loop (the end test) was an NE comparison,
7211 we will interpret it as an EQ comparison, since we fell through
7212 the loop. Any equivalences resulting from that comparison are
7213 therefore not valid and must be invalidated. */
7214 if (last_jump_equiv_class
)
7215 for (p
= last_jump_equiv_class
->first_same_value
; p
;
7216 p
= p
->next_same_value
)
7217 if (GET_CODE (p
->exp
) == MEM
|| GET_CODE (p
->exp
) == REG
7218 || GET_CODE (p
->exp
) == SUBREG
)
7219 invalidate (p
->exp
);
7221 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7222 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7224 The only thing we do with SET_DEST is invalidate entries, so we
7225 can safely process each SET in order. It is slightly less efficient
7226 to do so, but we only want to handle the most common cases. */
7228 for (insn
= NEXT_INSN (loop_start
);
7229 GET_CODE (insn
) != CALL_INSN
&& GET_CODE (insn
) != CODE_LABEL
7230 && ! (GET_CODE (insn
) == NOTE
7231 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
7232 insn
= NEXT_INSN (insn
))
7234 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7235 && (GET_CODE (PATTERN (insn
)) == SET
7236 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
7237 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
7238 else if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7239 && GET_CODE (PATTERN (insn
)) == PARALLEL
)
7240 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7241 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
7242 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
7243 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
7248 /* Variable used for communications between the next two routines. */
7250 static struct write_data skipped_writes_memory
;
7252 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7253 since they are done elsewhere. This function is called via note_stores. */
7256 invalidate_skipped_set (dest
, set
)
7260 if (GET_CODE (set
) == CLOBBER
7267 if (GET_CODE (dest
) == MEM
)
7268 note_mem_written (dest
, &skipped_writes_memory
);
7270 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7271 || (! skipped_writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
7275 /* Invalidate all insns from START up to the end of the function or the
7276 next label. This called when we wish to CSE around a block that is
7277 conditionally executed. */
7280 invalidate_skipped_block (start
)
7285 static struct write_data init
= {0, 0, 0, 0};
7286 static struct write_data everything
= {0, 1, 1, 1};
7288 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
7289 insn
= NEXT_INSN (insn
))
7291 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
7294 skipped_writes_memory
= init
;
7296 if (GET_CODE (insn
) == CALL_INSN
)
7298 invalidate_for_call ();
7299 skipped_writes_memory
= everything
;
7302 note_stores (PATTERN (insn
), invalidate_skipped_set
);
7303 invalidate_from_clobbers (&skipped_writes_memory
, PATTERN (insn
));
7307 /* Used for communication between the following two routines; contains a
7308 value to be checked for modification. */
7310 static rtx cse_check_loop_start_value
;
7312 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7313 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7316 cse_check_loop_start (x
, set
)
7320 if (cse_check_loop_start_value
== 0
7321 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
7324 if ((GET_CODE (x
) == MEM
&& GET_CODE (cse_check_loop_start_value
) == MEM
)
7325 || reg_overlap_mentioned_p (x
, cse_check_loop_start_value
))
7326 cse_check_loop_start_value
= 0;
7329 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7330 a loop that starts with the label at LOOP_START.
7332 If X is a SET, we see if its SET_SRC is currently in our hash table.
7333 If so, we see if it has a value equal to some register used only in the
7334 loop exit code (as marked by jump.c).
7336 If those two conditions are true, we search backwards from the start of
7337 the loop to see if that same value was loaded into a register that still
7338 retains its value at the start of the loop.
7340 If so, we insert an insn after the load to copy the destination of that
7341 load into the equivalent register and (try to) replace our SET_SRC with that
7344 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7347 cse_set_around_loop (x
, insn
, loop_start
)
7353 struct table_elt
*src_elt
;
7354 static struct write_data init
= {0, 0, 0, 0};
7355 struct write_data writes_memory
;
7357 writes_memory
= init
;
7359 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7360 are setting PC or CC0 or whose SET_SRC is already a register. */
7361 if (GET_CODE (x
) == SET
7362 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
7363 && GET_CODE (SET_SRC (x
)) != REG
)
7365 src_elt
= lookup (SET_SRC (x
),
7366 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
7367 GET_MODE (SET_DEST (x
)));
7370 for (src_elt
= src_elt
->first_same_value
; src_elt
;
7371 src_elt
= src_elt
->next_same_value
)
7372 if (GET_CODE (src_elt
->exp
) == REG
&& REG_LOOP_TEST_P (src_elt
->exp
)
7373 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
7377 /* Look for an insn in front of LOOP_START that sets
7378 something in the desired mode to SET_SRC (x) before we hit
7379 a label or CALL_INSN. */
7381 for (p
= prev_nonnote_insn (loop_start
);
7382 p
&& GET_CODE (p
) != CALL_INSN
7383 && GET_CODE (p
) != CODE_LABEL
;
7384 p
= prev_nonnote_insn (p
))
7385 if ((set
= single_set (p
)) != 0
7386 && GET_CODE (SET_DEST (set
)) == REG
7387 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
7388 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
7390 /* We now have to ensure that nothing between P
7391 and LOOP_START modified anything referenced in
7392 SET_SRC (x). We know that nothing within the loop
7393 can modify it, or we would have invalidated it in
7397 cse_check_loop_start_value
= SET_SRC (x
);
7398 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
7399 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
7400 note_stores (PATTERN (q
), cse_check_loop_start
);
7402 /* If nothing was changed and we can replace our
7403 SET_SRC, add an insn after P to copy its destination
7404 to what we will be replacing SET_SRC with. */
7405 if (cse_check_loop_start_value
7406 && validate_change (insn
, &SET_SRC (x
),
7408 emit_insn_after (gen_move_insn (src_elt
->exp
,
7416 /* Now invalidate anything modified by X. */
7417 note_mem_written (SET_DEST (x
), &writes_memory
);
7419 if (writes_memory
.var
)
7420 invalidate_memory (&writes_memory
);
7422 /* See comment on similar code in cse_insn for explanation of these tests. */
7423 if (GET_CODE (SET_DEST (x
)) == REG
|| GET_CODE (SET_DEST (x
)) == SUBREG
7424 || (GET_CODE (SET_DEST (x
)) == MEM
&& ! writes_memory
.all
7425 && ! cse_rtx_addr_varies_p (SET_DEST (x
))))
7426 invalidate (SET_DEST (x
));
7429 /* Find the end of INSN's basic block and return its range,
7430 the total number of SETs in all the insns of the block, the last insn of the
7431 block, and the branch path.
7433 The branch path indicates which branches should be followed. If a non-zero
7434 path size is specified, the block should be rescanned and a different set
7435 of branches will be taken. The branch path is only used if
7436 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
7438 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
7439 used to describe the block. It is filled in with the information about
7440 the current block. The incoming structure's branch path, if any, is used
7441 to construct the output branch path. */
7444 cse_end_of_basic_block (insn
, data
, follow_jumps
, after_loop
, skip_blocks
)
7446 struct cse_basic_block_data
*data
;
7453 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
7454 rtx next
= GET_RTX_CLASS (GET_CODE (insn
)) == 'i' ? insn
: next_real_insn (insn
);
7455 int path_size
= data
->path_size
;
7459 /* Update the previous branch path, if any. If the last branch was
7460 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
7461 shorten the path by one and look at the previous branch. We know that
7462 at least one branch must have been taken if PATH_SIZE is non-zero. */
7463 while (path_size
> 0)
7465 if (data
->path
[path_size
- 1].status
!= NOT_TAKEN
)
7467 data
->path
[path_size
- 1].status
= NOT_TAKEN
;
7474 /* Scan to end of this basic block. */
7475 while (p
&& GET_CODE (p
) != CODE_LABEL
)
7477 /* Don't cse out the end of a loop. This makes a difference
7478 only for the unusual loops that always execute at least once;
7479 all other loops have labels there so we will stop in any case.
7480 Cse'ing out the end of the loop is dangerous because it
7481 might cause an invariant expression inside the loop
7482 to be reused after the end of the loop. This would make it
7483 hard to move the expression out of the loop in loop.c,
7484 especially if it is one of several equivalent expressions
7485 and loop.c would like to eliminate it.
7487 If we are running after loop.c has finished, we can ignore
7488 the NOTE_INSN_LOOP_END. */
7490 if (! after_loop
&& GET_CODE (p
) == NOTE
7491 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
7494 /* Don't cse over a call to setjmp; on some machines (eg vax)
7495 the regs restored by the longjmp come from
7496 a later time than the setjmp. */
7497 if (GET_CODE (p
) == NOTE
7498 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
7501 /* A PARALLEL can have lots of SETs in it,
7502 especially if it is really an ASM_OPERANDS. */
7503 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
7504 && GET_CODE (PATTERN (p
)) == PARALLEL
)
7505 nsets
+= XVECLEN (PATTERN (p
), 0);
7506 else if (GET_CODE (p
) != NOTE
)
7509 /* Ignore insns made by CSE; they cannot affect the boundaries of
7512 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
7513 high_cuid
= INSN_CUID (p
);
7514 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
7515 low_cuid
= INSN_CUID (p
);
7517 /* See if this insn is in our branch path. If it is and we are to
7519 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
7521 if (data
->path
[path_entry
].status
!= NOT_TAKEN
)
7524 /* Point to next entry in path, if any. */
7528 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
7529 was specified, we haven't reached our maximum path length, there are
7530 insns following the target of the jump, this is the only use of the
7531 jump label, and the target label is preceded by a BARRIER.
7533 Alternatively, we can follow the jump if it branches around a
7534 block of code and there are no other branches into the block.
7535 In this case invalidate_skipped_block will be called to invalidate any
7536 registers set in the block when following the jump. */
7538 else if ((follow_jumps
|| skip_blocks
) && path_size
< PATHLENGTH
- 1
7539 && GET_CODE (p
) == JUMP_INSN
7540 && GET_CODE (PATTERN (p
)) == SET
7541 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
7542 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
7543 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
7545 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
7546 if ((GET_CODE (q
) != NOTE
7547 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
7548 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_SETJMP
)
7549 && (GET_CODE (q
) != CODE_LABEL
|| LABEL_NUSES (q
) != 0))
7552 /* If we ran into a BARRIER, this code is an extension of the
7553 basic block when the branch is taken. */
7554 if (follow_jumps
&& q
!= 0 && GET_CODE (q
) == BARRIER
)
7556 /* Don't allow ourself to keep walking around an
7557 always-executed loop. */
7558 if (next_real_insn (q
) == next
)
7564 /* Similarly, don't put a branch in our path more than once. */
7565 for (i
= 0; i
< path_entry
; i
++)
7566 if (data
->path
[i
].branch
== p
)
7569 if (i
!= path_entry
)
7572 data
->path
[path_entry
].branch
= p
;
7573 data
->path
[path_entry
++].status
= TAKEN
;
7575 /* This branch now ends our path. It was possible that we
7576 didn't see this branch the last time around (when the
7577 insn in front of the target was a JUMP_INSN that was
7578 turned into a no-op). */
7579 path_size
= path_entry
;
7582 /* Mark block so we won't scan it again later. */
7583 PUT_MODE (NEXT_INSN (p
), QImode
);
7585 /* Detect a branch around a block of code. */
7586 else if (skip_blocks
&& q
!= 0 && GET_CODE (q
) != CODE_LABEL
)
7590 if (next_real_insn (q
) == next
)
7596 for (i
= 0; i
< path_entry
; i
++)
7597 if (data
->path
[i
].branch
== p
)
7600 if (i
!= path_entry
)
7603 /* This is no_labels_between_p (p, q) with an added check for
7604 reaching the end of a function (in case Q precedes P). */
7605 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
7606 if (GET_CODE (tmp
) == CODE_LABEL
)
7611 data
->path
[path_entry
].branch
= p
;
7612 data
->path
[path_entry
++].status
= AROUND
;
7614 path_size
= path_entry
;
7617 /* Mark block so we won't scan it again later. */
7618 PUT_MODE (NEXT_INSN (p
), QImode
);
7625 data
->low_cuid
= low_cuid
;
7626 data
->high_cuid
= high_cuid
;
7627 data
->nsets
= nsets
;
7630 /* If all jumps in the path are not taken, set our path length to zero
7631 so a rescan won't be done. */
7632 for (i
= path_size
- 1; i
>= 0; i
--)
7633 if (data
->path
[i
].status
!= NOT_TAKEN
)
7637 data
->path_size
= 0;
7639 data
->path_size
= path_size
;
7641 /* End the current branch path. */
7642 data
->path
[path_size
].branch
= 0;
7645 /* Perform cse on the instructions of a function.
7646 F is the first instruction.
7647 NREGS is one plus the highest pseudo-reg number used in the instruction.
7649 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7650 (only if -frerun-cse-after-loop).
7652 Returns 1 if jump_optimize should be redone due to simplifications
7653 in conditional jump instructions. */
7656 cse_main (f
, nregs
, after_loop
, file
)
7662 struct cse_basic_block_data val
;
7663 register rtx insn
= f
;
7666 cse_jumps_altered
= 0;
7667 constant_pool_entries_cost
= 0;
7674 all_minus_one
= (int *) alloca (nregs
* sizeof (int));
7675 consec_ints
= (int *) alloca (nregs
* sizeof (int));
7677 for (i
= 0; i
< nregs
; i
++)
7679 all_minus_one
[i
] = -1;
7683 reg_next_eqv
= (int *) alloca (nregs
* sizeof (int));
7684 reg_prev_eqv
= (int *) alloca (nregs
* sizeof (int));
7685 reg_qty
= (int *) alloca (nregs
* sizeof (int));
7686 reg_in_table
= (int *) alloca (nregs
* sizeof (int));
7687 reg_tick
= (int *) alloca (nregs
* sizeof (int));
7689 /* Discard all the free elements of the previous function
7690 since they are allocated in the temporarily obstack. */
7691 bzero (table
, sizeof table
);
7692 free_element_chain
= 0;
7693 n_elements_made
= 0;
7695 /* Find the largest uid. */
7697 max_uid
= get_max_uid ();
7698 uid_cuid
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
7699 bzero (uid_cuid
, (max_uid
+ 1) * sizeof (int));
7701 /* Compute the mapping from uids to cuids.
7702 CUIDs are numbers assigned to insns, like uids,
7703 except that cuids increase monotonically through the code.
7704 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7705 between two insns is not affected by -g. */
7707 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
7709 if (GET_CODE (insn
) != NOTE
7710 || NOTE_LINE_NUMBER (insn
) < 0)
7711 INSN_CUID (insn
) = ++i
;
7713 /* Give a line number note the same cuid as preceding insn. */
7714 INSN_CUID (insn
) = i
;
7717 /* Initialize which registers are clobbered by calls. */
7719 CLEAR_HARD_REG_SET (regs_invalidated_by_call
);
7721 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
7722 if ((call_used_regs
[i
]
7723 /* Used to check !fixed_regs[i] here, but that isn't safe;
7724 fixed regs are still call-clobbered, and sched can get
7725 confused if they can "live across calls".
7727 The frame pointer is always preserved across calls. The arg
7728 pointer is if it is fixed. The stack pointer usually is, unless
7729 RETURN_POPS_ARGS, in which case an explicit CLOBBER
7730 will be present. If we are generating PIC code, the PIC offset
7731 table register is preserved across calls. */
7733 && i
!= STACK_POINTER_REGNUM
7734 && i
!= FRAME_POINTER_REGNUM
7735 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
7736 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
7738 #ifdef PIC_OFFSET_TABLE_REGNUM
7739 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
7743 SET_HARD_REG_BIT (regs_invalidated_by_call
, i
);
7745 /* Loop over basic blocks.
7746 Compute the maximum number of qty's needed for each basic block
7747 (which is 2 for each SET). */
7751 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
7752 flag_cse_skip_blocks
);
7754 /* If this basic block was already processed or has no sets, skip it. */
7755 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
7757 PUT_MODE (insn
, VOIDmode
);
7758 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
7763 cse_basic_block_start
= val
.low_cuid
;
7764 cse_basic_block_end
= val
.high_cuid
;
7765 max_qty
= val
.nsets
* 2;
7768 fprintf (file
, ";; Processing block from %d to %d, %d sets.\n",
7769 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
7772 /* Make MAX_QTY bigger to give us room to optimize
7773 past the end of this basic block, if that should prove useful. */
7779 /* If this basic block is being extended by following certain jumps,
7780 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7781 Otherwise, we start after this basic block. */
7782 if (val
.path_size
> 0)
7783 cse_basic_block (insn
, val
.last
, val
.path
, 0);
7786 int old_cse_jumps_altered
= cse_jumps_altered
;
7789 /* When cse changes a conditional jump to an unconditional
7790 jump, we want to reprocess the block, since it will give
7791 us a new branch path to investigate. */
7792 cse_jumps_altered
= 0;
7793 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
7794 if (cse_jumps_altered
== 0
7795 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
7798 cse_jumps_altered
|= old_cse_jumps_altered
;
7806 /* Tell refers_to_mem_p that qty_const info is not available. */
7809 if (max_elements_made
< n_elements_made
)
7810 max_elements_made
= n_elements_made
;
7812 return cse_jumps_altered
;
7815 /* Process a single basic block. FROM and TO and the limits of the basic
7816 block. NEXT_BRANCH points to the branch path when following jumps or
7817 a null path when not following jumps.
7819 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
7820 loop. This is true when we are being called for the last time on a
7821 block and this CSE pass is before loop.c. */
7824 cse_basic_block (from
, to
, next_branch
, around_loop
)
7825 register rtx from
, to
;
7826 struct branch_path
*next_branch
;
7831 int in_libcall_block
= 0;
7833 /* Each of these arrays is undefined before max_reg, so only allocate
7834 the space actually needed and adjust the start below. */
7836 qty_first_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
7837 qty_last_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
7838 qty_mode
= (enum machine_mode
*) alloca ((max_qty
- max_reg
) * sizeof (enum machine_mode
));
7839 qty_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
7840 qty_const_insn
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
7842 = (enum rtx_code
*) alloca ((max_qty
- max_reg
) * sizeof (enum rtx_code
));
7843 qty_comparison_qty
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
7844 qty_comparison_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
7846 qty_first_reg
-= max_reg
;
7847 qty_last_reg
-= max_reg
;
7848 qty_mode
-= max_reg
;
7849 qty_const
-= max_reg
;
7850 qty_const_insn
-= max_reg
;
7851 qty_comparison_code
-= max_reg
;
7852 qty_comparison_qty
-= max_reg
;
7853 qty_comparison_const
-= max_reg
;
7857 /* TO might be a label. If so, protect it from being deleted. */
7858 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
7861 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
7863 register enum rtx_code code
;
7865 /* See if this is a branch that is part of the path. If so, and it is
7866 to be taken, do so. */
7867 if (next_branch
->branch
== insn
)
7869 enum taken status
= next_branch
++->status
;
7870 if (status
!= NOT_TAKEN
)
7872 if (status
== TAKEN
)
7873 record_jump_equiv (insn
, 1);
7875 invalidate_skipped_block (NEXT_INSN (insn
));
7877 /* Set the last insn as the jump insn; it doesn't affect cc0.
7878 Then follow this branch. */
7883 insn
= JUMP_LABEL (insn
);
7888 code
= GET_CODE (insn
);
7889 if (GET_MODE (insn
) == QImode
)
7890 PUT_MODE (insn
, VOIDmode
);
7892 if (GET_RTX_CLASS (code
) == 'i')
7894 /* Process notes first so we have all notes in canonical forms when
7895 looking for duplicate operations. */
7897 if (REG_NOTES (insn
))
7898 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
7900 /* Track when we are inside in LIBCALL block. Inside such a block,
7901 we do not want to record destinations. The last insn of a
7902 LIBCALL block is not considered to be part of the block, since
7903 its destination is the result of the block and hence should be
7906 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
7907 in_libcall_block
= 1;
7908 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
7909 in_libcall_block
= 0;
7911 cse_insn (insn
, in_libcall_block
);
7914 /* If INSN is now an unconditional jump, skip to the end of our
7915 basic block by pretending that we just did the last insn in the
7916 basic block. If we are jumping to the end of our block, show
7917 that we can have one usage of TO. */
7919 if (simplejump_p (insn
))
7924 if (JUMP_LABEL (insn
) == to
)
7927 /* Maybe TO was deleted because the jump is unconditional.
7928 If so, there is nothing left in this basic block. */
7929 /* ??? Perhaps it would be smarter to set TO
7930 to whatever follows this insn,
7931 and pretend the basic block had always ended here. */
7932 if (INSN_DELETED_P (to
))
7935 insn
= PREV_INSN (to
);
7938 /* See if it is ok to keep on going past the label
7939 which used to end our basic block. Remember that we incremented
7940 the count of that label, so we decrement it here. If we made
7941 a jump unconditional, TO_USAGE will be one; in that case, we don't
7942 want to count the use in that jump. */
7944 if (to
!= 0 && NEXT_INSN (insn
) == to
7945 && GET_CODE (to
) == CODE_LABEL
&& --LABEL_NUSES (to
) == to_usage
)
7947 struct cse_basic_block_data val
;
7949 insn
= NEXT_INSN (to
);
7951 if (LABEL_NUSES (to
) == 0)
7954 /* Find the end of the following block. Note that we won't be
7955 following branches in this case. If TO was the last insn
7956 in the function, we are done. Similarly, if we deleted the
7957 insn after TO, it must have been because it was preceded by
7958 a BARRIER. In that case, we are done with this block because it
7959 has no continuation. */
7961 if (insn
== 0 || INSN_DELETED_P (insn
))
7966 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
7968 /* If the tables we allocated have enough space left
7969 to handle all the SETs in the next basic block,
7970 continue through it. Otherwise, return,
7971 and that block will be scanned individually. */
7972 if (val
.nsets
* 2 + next_qty
> max_qty
)
7975 cse_basic_block_start
= val
.low_cuid
;
7976 cse_basic_block_end
= val
.high_cuid
;
7979 /* Prevent TO from being deleted if it is a label. */
7980 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
7983 /* Back up so we process the first insn in the extension. */
7984 insn
= PREV_INSN (insn
);
7988 if (next_qty
> max_qty
)
7991 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7992 the previous insn is the only insn that branches to the head of a loop,
7993 we can cse into the loop. Don't do this if we changed the jump
7994 structure of a loop unless we aren't going to be following jumps. */
7996 if ((cse_jumps_altered
== 0
7997 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
7998 && around_loop
&& to
!= 0
7999 && GET_CODE (to
) == NOTE
&& NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
8000 && GET_CODE (PREV_INSN (to
)) == JUMP_INSN
8001 && JUMP_LABEL (PREV_INSN (to
)) != 0
8002 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to
))) == 1)
8003 cse_around_loop (JUMP_LABEL (PREV_INSN (to
)));
8005 return to
? NEXT_INSN (to
) : 0;
8008 /* Count the number of times registers are used (not set) in X.
8009 COUNTS is an array in which we accumulate the count, INCR is how much
8010 we count each register usage. */
8013 count_reg_usage (x
, counts
, incr
)
8018 enum rtx_code code
= GET_CODE (x
);
8025 counts
[REGNO (x
)] += incr
;
8039 /* Unless we are setting a REG, count everything in SET_DEST. */
8040 if (GET_CODE (SET_DEST (x
)) != REG
)
8041 count_reg_usage (SET_DEST (x
), counts
, incr
);
8042 count_reg_usage (SET_SRC (x
), counts
, incr
);
8048 count_reg_usage (PATTERN (x
), counts
, incr
);
8050 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8054 count_reg_usage (REG_NOTES (x
), counts
, incr
);
8059 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
8060 count_reg_usage (XEXP (x
, 0), counts
, incr
);
8062 count_reg_usage (XEXP (x
, 1), counts
, incr
);
8066 fmt
= GET_RTX_FORMAT (code
);
8067 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
8070 count_reg_usage (XEXP (x
, i
), counts
, incr
);
8071 else if (fmt
[i
] == 'E')
8072 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8073 count_reg_usage (XVECEXP (x
, i
, j
), counts
, incr
);
8077 /* Scan all the insns and delete any that are dead; i.e., they store a register
8078 that is never used or they copy a register to itself.
8080 This is used to remove insns made obviously dead by cse. It improves the
8081 heuristics in loop since it won't try to move dead invariants out of loops
8082 or make givs for dead quantities. The remaining passes of the compilation
8083 are also sped up. */
8086 delete_dead_from_cse (insns
, nreg
)
8090 int *counts
= (int *) alloca (nreg
* sizeof (int));
8096 /* First count the number of times each register is used. */
8097 bzero (counts
, sizeof (int) * nreg
);
8098 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
8099 count_reg_usage (insn
, counts
, 1);
8101 /* Go from the last insn to the first and delete insns that only set unused
8102 registers or copy a register to itself. As we delete an insn, remove
8103 usage counts for registers it uses. */
8104 for (insn
= prev_real_insn (get_last_insn ()); insn
; insn
= prev
)
8108 prev
= prev_real_insn (insn
);
8110 /* Don't delete any insns that are part of a libcall block.
8111 Flow or loop might get confused if we did that. Remember
8112 that we are scanning backwards. */
8113 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8118 else if (GET_CODE (PATTERN (insn
)) == SET
)
8120 if (GET_CODE (SET_DEST (PATTERN (insn
))) == REG
8121 && SET_DEST (PATTERN (insn
)) == SET_SRC (PATTERN (insn
)))
8125 else if (GET_CODE (SET_DEST (PATTERN (insn
))) == CC0
8126 && ! side_effects_p (SET_SRC (PATTERN (insn
)))
8127 && ((tem
= next_nonnote_insn (insn
)) == 0
8128 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8129 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8132 else if (GET_CODE (SET_DEST (PATTERN (insn
))) != REG
8133 || REGNO (SET_DEST (PATTERN (insn
))) < FIRST_PSEUDO_REGISTER
8134 || counts
[REGNO (SET_DEST (PATTERN (insn
)))] != 0
8135 || side_effects_p (SET_SRC (PATTERN (insn
))))
8138 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
8139 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
8141 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
8143 if (GET_CODE (elt
) == SET
)
8145 if (GET_CODE (SET_DEST (elt
)) == REG
8146 && SET_DEST (elt
) == SET_SRC (elt
))
8150 else if (GET_CODE (SET_DEST (elt
)) == CC0
8151 && ! side_effects_p (SET_SRC (elt
))
8152 && ((tem
= next_nonnote_insn (insn
)) == 0
8153 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8154 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8157 else if (GET_CODE (SET_DEST (elt
)) != REG
8158 || REGNO (SET_DEST (elt
)) < FIRST_PSEUDO_REGISTER
8159 || counts
[REGNO (SET_DEST (elt
))] != 0
8160 || side_effects_p (SET_SRC (elt
)))
8163 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
8169 /* If this is a dead insn, delete it and show registers in it aren't
8174 count_reg_usage (insn
, counts
, -1);
8178 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))