1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
24 #include "hard-reg-set.h"
27 #include "insn-config.h"
33 /* The basic idea of common subexpression elimination is to go
34 through the code, keeping a record of expressions that would
35 have the same value at the current scan point, and replacing
36 expressions encountered with the cheapest equivalent expression.
38 It is too complicated to keep track of the different possibilities
39 when control paths merge; so, at each label, we forget all that is
40 known and start fresh. This can be described as processing each
41 basic block separately. Note, however, that these are not quite
42 the same as the basic blocks found by a later pass and used for
43 data flow analysis and register packing. We do not need to start fresh
44 after a conditional jump instruction if there is no label there.
46 We use two data structures to record the equivalent expressions:
47 a hash table for most expressions, and several vectors together
48 with "quantity numbers" to record equivalent (pseudo) registers.
50 The use of the special data structure for registers is desirable
51 because it is faster. It is possible because registers references
52 contain a fairly small number, the register number, taken from
53 a contiguously allocated series, and two register references are
54 identical if they have the same number. General expressions
55 do not have any such thing, so the only way to retrieve the
56 information recorded on an expression other than a register
57 is to keep it in a hash table.
59 Registers and "quantity numbers":
61 At the start of each basic block, all of the (hardware and pseudo)
62 registers used in the function are given distinct quantity
63 numbers to indicate their contents. During scan, when the code
64 copies one register into another, we copy the quantity number.
65 When a register is loaded in any other way, we allocate a new
66 quantity number to describe the value generated by this operation.
67 `reg_qty' records what quantity a register is currently thought
70 All real quantity numbers are greater than or equal to `max_reg'.
71 If register N has not been assigned a quantity, reg_qty[N] will equal N.
73 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
74 variables should be referenced with an index below `max_reg'.
76 We also maintain a bidirectional chain of registers for each
77 quantity number. `qty_first_reg', `qty_last_reg',
78 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
80 The first register in a chain is the one whose lifespan is least local.
81 Among equals, it is the one that was seen first.
82 We replace any equivalent register with that one.
84 If two registers have the same quantity number, it must be true that
85 REG expressions with `qty_mode' must be in the hash table for both
86 registers and must be in the same class.
88 The converse is not true. Since hard registers may be referenced in
89 any mode, two REG expressions might be equivalent in the hash table
90 but not have the same quantity number if the quantity number of one
91 of the registers is not the same mode as those expressions.
93 Constants and quantity numbers
95 When a quantity has a known constant value, that value is stored
96 in the appropriate element of qty_const. This is in addition to
97 putting the constant in the hash table as is usual for non-regs.
99 Whether a reg or a constant is preferred is determined by the configuration
100 macro CONST_COSTS and will often depend on the constant value. In any
101 event, expressions containing constants can be simplified, by fold_rtx.
103 When a quantity has a known nearly constant value (such as an address
104 of a stack slot), that value is stored in the appropriate element
107 Integer constants don't have a machine mode. However, cse
108 determines the intended machine mode from the destination
109 of the instruction that moves the constant. The machine mode
110 is recorded in the hash table along with the actual RTL
111 constant expression so that different modes are kept separate.
115 To record known equivalences among expressions in general
116 we use a hash table called `table'. It has a fixed number of buckets
117 that contain chains of `struct table_elt' elements for expressions.
118 These chains connect the elements whose expressions have the same
121 Other chains through the same elements connect the elements which
122 currently have equivalent values.
124 Register references in an expression are canonicalized before hashing
125 the expression. This is done using `reg_qty' and `qty_first_reg'.
126 The hash code of a register reference is computed using the quantity
127 number, not the register number.
129 When the value of an expression changes, it is necessary to remove from the
130 hash table not just that expression but all expressions whose values
131 could be different as a result.
133 1. If the value changing is in memory, except in special cases
134 ANYTHING referring to memory could be changed. That is because
135 nobody knows where a pointer does not point.
136 The function `invalidate_memory' removes what is necessary.
138 The special cases are when the address is constant or is
139 a constant plus a fixed register such as the frame pointer
140 or a static chain pointer. When such addresses are stored in,
141 we can tell exactly which other such addresses must be invalidated
142 due to overlap. `invalidate' does this.
143 All expressions that refer to non-constant
144 memory addresses are also invalidated. `invalidate_memory' does this.
146 2. If the value changing is a register, all expressions
147 containing references to that register, and only those,
150 Because searching the entire hash table for expressions that contain
151 a register is very slow, we try to figure out when it isn't necessary.
152 Precisely, this is necessary only when expressions have been
153 entered in the hash table using this register, and then the value has
154 changed, and then another expression wants to be added to refer to
155 the register's new value. This sequence of circumstances is rare
156 within any one basic block.
158 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
159 reg_tick[i] is incremented whenever a value is stored in register i.
160 reg_in_table[i] holds -1 if no references to register i have been
161 entered in the table; otherwise, it contains the value reg_tick[i] had
162 when the references were entered. If we want to enter a reference
163 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
164 Until we want to enter a new entry, the mere fact that the two vectors
165 don't match makes the entries be ignored if anyone tries to match them.
167 Registers themselves are entered in the hash table as well as in
168 the equivalent-register chains. However, the vectors `reg_tick'
169 and `reg_in_table' do not apply to expressions which are simple
170 register references. These expressions are removed from the table
171 immediately when they become invalid, and this can be done even if
172 we do not immediately search for all the expressions that refer to
175 A CLOBBER rtx in an instruction invalidates its operand for further
176 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
177 invalidates everything that resides in memory.
181 Constant expressions that differ only by an additive integer
182 are called related. When a constant expression is put in
183 the table, the related expression with no constant term
184 is also entered. These are made to point at each other
185 so that it is possible to find out if there exists any
186 register equivalent to an expression related to a given expression. */
188 /* One plus largest register number used in this function. */
192 /* Length of vectors indexed by quantity number.
193 We know in advance we will not need a quantity number this big. */
197 /* Next quantity number to be allocated.
198 This is 1 + the largest number needed so far. */
202 /* Indexed by quantity number, gives the first (or last) (pseudo) register
203 in the chain of registers that currently contain this quantity. */
205 static int *qty_first_reg
;
206 static int *qty_last_reg
;
208 /* Index by quantity number, gives the mode of the quantity. */
210 static enum machine_mode
*qty_mode
;
212 /* Indexed by quantity number, gives the rtx of the constant value of the
213 quantity, or zero if it does not have a known value.
214 A sum of the frame pointer (or arg pointer) plus a constant
215 can also be entered here. */
217 static rtx
*qty_const
;
219 /* Indexed by qty number, gives the insn that stored the constant value
220 recorded in `qty_const'. */
222 static rtx
*qty_const_insn
;
224 /* The next three variables are used to track when a comparison between a
225 quantity and some constant or register has been passed. In that case, we
226 know the results of the comparison in case we see it again. These variables
227 record a comparison that is known to be true. */
229 /* Indexed by qty number, gives the rtx code of a comparison with a known
230 result involving this quantity. If none, it is UNKNOWN. */
231 static enum rtx_code
*qty_comparison_code
;
233 /* Indexed by qty number, gives the constant being compared against in a
234 comparison of known result. If no such comparison, it is undefined.
235 If the comparison is not with a constant, it is zero. */
237 static rtx
*qty_comparison_const
;
239 /* Indexed by qty number, gives the quantity being compared against in a
240 comparison of known result. If no such comparison, if it undefined.
241 If the comparison is not with a register, it is -1. */
243 static int *qty_comparison_qty
;
246 /* For machines that have a CC0, we do not record its value in the hash
247 table since its use is guaranteed to be the insn immediately following
248 its definition and any other insn is presumed to invalidate it.
250 Instead, we store below the value last assigned to CC0. If it should
251 happen to be a constant, it is stored in preference to the actual
252 assigned value. In case it is a constant, we store the mode in which
253 the constant should be interpreted. */
255 static rtx prev_insn_cc0
;
256 static enum machine_mode prev_insn_cc0_mode
;
259 /* Previous actual insn. 0 if at first insn of basic block. */
261 static rtx prev_insn
;
263 /* Insn being scanned. */
265 static rtx this_insn
;
267 /* Index by (pseudo) register number, gives the quantity number
268 of the register's current contents. */
272 /* Index by (pseudo) register number, gives the number of the next (or
273 previous) (pseudo) register in the chain of registers sharing the same
276 Or -1 if this register is at the end of the chain.
278 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
280 static int *reg_next_eqv
;
281 static int *reg_prev_eqv
;
283 /* Index by (pseudo) register number, gives the number of times
284 that register has been altered in the current basic block. */
286 static int *reg_tick
;
288 /* Index by (pseudo) register number, gives the reg_tick value at which
289 rtx's containing this register are valid in the hash table.
290 If this does not equal the current reg_tick value, such expressions
291 existing in the hash table are invalid.
292 If this is -1, no expressions containing this register have been
293 entered in the table. */
295 static int *reg_in_table
;
297 /* A HARD_REG_SET containing all the hard registers for which there is
298 currently a REG expression in the hash table. Note the difference
299 from the above variables, which indicate if the REG is mentioned in some
300 expression in the table. */
302 static HARD_REG_SET hard_regs_in_table
;
304 /* A HARD_REG_SET containing all the hard registers that are invalidated
307 static HARD_REG_SET regs_invalidated_by_call
;
309 /* Two vectors of ints:
310 one containing max_reg -1's; the other max_reg + 500 (an approximation
311 for max_qty) elements where element i contains i.
312 These are used to initialize various other vectors fast. */
314 static int *all_minus_one
;
315 static int *consec_ints
;
317 /* CUID of insn that starts the basic block currently being cse-processed. */
319 static int cse_basic_block_start
;
321 /* CUID of insn that ends the basic block currently being cse-processed. */
323 static int cse_basic_block_end
;
325 /* Vector mapping INSN_UIDs to cuids.
326 The cuids are like uids but increase monotonically always.
327 We use them to see whether a reg is used outside a given basic block. */
329 static int *uid_cuid
;
331 /* Highest UID in UID_CUID. */
334 /* Get the cuid of an insn. */
336 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
338 /* Nonzero if cse has altered conditional jump insns
339 in such a way that jump optimization should be redone. */
341 static int cse_jumps_altered
;
343 /* canon_hash stores 1 in do_not_record
344 if it notices a reference to CC0, PC, or some other volatile
347 static int do_not_record
;
349 /* canon_hash stores 1 in hash_arg_in_memory
350 if it notices a reference to memory within the expression being hashed. */
352 static int hash_arg_in_memory
;
354 /* canon_hash stores 1 in hash_arg_in_struct
355 if it notices a reference to memory that's part of a structure. */
357 static int hash_arg_in_struct
;
359 /* The hash table contains buckets which are chains of `struct table_elt's,
360 each recording one expression's information.
361 That expression is in the `exp' field.
363 Those elements with the same hash code are chained in both directions
364 through the `next_same_hash' and `prev_same_hash' fields.
366 Each set of expressions with equivalent values
367 are on a two-way chain through the `next_same_value'
368 and `prev_same_value' fields, and all point with
369 the `first_same_value' field at the first element in
370 that chain. The chain is in order of increasing cost.
371 Each element's cost value is in its `cost' field.
373 The `in_memory' field is nonzero for elements that
374 involve any reference to memory. These elements are removed
375 whenever a write is done to an unidentified location in memory.
376 To be safe, we assume that a memory address is unidentified unless
377 the address is either a symbol constant or a constant plus
378 the frame pointer or argument pointer.
380 The `in_struct' field is nonzero for elements that
381 involve any reference to memory inside a structure or array.
383 The `related_value' field is used to connect related expressions
384 (that differ by adding an integer).
385 The related expressions are chained in a circular fashion.
386 `related_value' is zero for expressions for which this
389 The `cost' field stores the cost of this element's expression.
391 The `is_const' flag is set if the element is a constant (including
394 The `flag' field is used as a temporary during some search routines.
396 The `mode' field is usually the same as GET_MODE (`exp'), but
397 if `exp' is a CONST_INT and has no machine mode then the `mode'
398 field is the mode it was being used as. Each constant is
399 recorded separately for each mode it is used with. */
405 struct table_elt
*next_same_hash
;
406 struct table_elt
*prev_same_hash
;
407 struct table_elt
*next_same_value
;
408 struct table_elt
*prev_same_value
;
409 struct table_elt
*first_same_value
;
410 struct table_elt
*related_value
;
412 enum machine_mode mode
;
421 /* We don't want a lot of buckets, because we rarely have very many
422 things stored in the hash table, and a lot of buckets slows
423 down a lot of loops that happen frequently. */
426 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
427 register (hard registers may require `do_not_record' to be set). */
430 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
431 ? ((((int) REG << 7) + reg_qty[REGNO (X)]) % NBUCKETS) \
432 : canon_hash (X, M) % NBUCKETS)
434 /* Determine whether register number N is considered a fixed register for CSE.
435 It is desirable to replace other regs with fixed regs, to reduce need for
437 A reg wins if it is either the frame pointer or designated as fixed,
438 but not if it is an overlapping register. */
439 #ifdef OVERLAPPING_REGNO_P
440 #define FIXED_REGNO_P(N) \
441 (((N) == FRAME_POINTER_REGNUM \
442 || ((N) < FIRST_PSEUDO_REGISTER && fixed_regs[N])) \
443 && ! OVERLAPPING_REGNO_P ((N)))
445 #define FIXED_REGNO_P(N) \
446 ((N) == FRAME_POINTER_REGNUM \
447 || ((N) < FIRST_PSEUDO_REGISTER && fixed_regs[N]))
450 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
451 hard registers and pointers into the frame are the cheapest with a cost
452 of 0. Next come pseudos with a cost of one and other hard registers with
453 a cost of 2. Aside from these special cases, call `rtx_cost'. */
455 #define CHEAP_REG(N) \
456 ((N) == FRAME_POINTER_REGNUM || (N) == STACK_POINTER_REGNUM \
457 || (N) == ARG_POINTER_REGNUM \
458 || (N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER \
459 || (FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
462 (GET_CODE (X) == REG \
463 ? (CHEAP_REG (REGNO (X)) ? 0 \
464 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
466 : rtx_cost (X, SET) * 2)
468 /* Determine if the quantity number for register X represents a valid index
469 into the `qty_...' variables. */
471 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
473 static struct table_elt
*table
[NBUCKETS
];
475 /* Chain of `struct table_elt's made so far for this function
476 but currently removed from the table. */
478 static struct table_elt
*free_element_chain
;
480 /* Number of `struct table_elt' structures made so far for this function. */
482 static int n_elements_made
;
484 /* Maximum value `n_elements_made' has had so far in this compilation
485 for functions previously processed. */
487 static int max_elements_made
;
489 /* Surviving equivalence class when two equivalence classes are merged
490 by recording the effects of a jump in the last insn. Zero if the
491 last insn was not a conditional jump. */
493 static struct table_elt
*last_jump_equiv_class
;
495 /* Set to the cost of a constant pool reference if one was found for a
496 symbolic constant. If this was found, it means we should try to
497 convert constants into constant pool entries if they don't fit in
500 static int constant_pool_entries_cost
;
502 /* Bits describing what kind of values in memory must be invalidated
503 for a particular instruction. If all three bits are zero,
504 no memory refs need to be invalidated. Each bit is more powerful
505 than the preceding ones, and if a bit is set then the preceding
508 Here is how the bits are set:
509 Pushing onto the stack invalidates only the stack pointer,
510 writing at a fixed address invalidates only variable addresses,
511 writing in a structure element at variable address
512 invalidates all but scalar variables,
513 and writing in anything else at variable address invalidates everything. */
517 int sp
: 1; /* Invalidate stack pointer. */
518 int var
: 1; /* Invalidate variable addresses. */
519 int nonscalar
: 1; /* Invalidate all but scalar variables. */
520 int all
: 1; /* Invalidate all memory refs. */
523 /* Define maximum length of a branch path. */
525 #define PATHLENGTH 10
527 /* This data describes a block that will be processed by cse_basic_block. */
529 struct cse_basic_block_data
{
530 /* Lowest CUID value of insns in block. */
532 /* Highest CUID value of insns in block. */
534 /* Total number of SETs in block. */
536 /* Last insn in the block. */
538 /* Size of current branch path, if any. */
540 /* Current branch path, indicating which branches will be taken. */
542 /* The branch insn. */
544 /* Whether it should be taken or not. AROUND is the same as taken
545 except that it is used when the destination label is not preceded
547 enum taken
{TAKEN
, NOT_TAKEN
, AROUND
} status
;
551 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
552 virtual regs here because the simplify_*_operation routines are called
553 by integrate.c, which is called before virtual register instantiation. */
555 #define FIXED_BASE_PLUS_P(X) \
556 ((X) == frame_pointer_rtx || (X) == arg_pointer_rtx \
557 || (X) == virtual_stack_vars_rtx \
558 || (X) == virtual_incoming_args_rtx \
559 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
560 && (XEXP (X, 0) == frame_pointer_rtx \
561 || XEXP (X, 0) == arg_pointer_rtx \
562 || XEXP (X, 0) == virtual_stack_vars_rtx \
563 || XEXP (X, 0) == virtual_incoming_args_rtx)))
565 /* Similar, but also allows reference to the stack pointer.
567 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
568 arg_pointer_rtx by itself is nonzero, because on at least one machine,
569 the i960, the arg pointer is zero when it is unused. */
571 #define NONZERO_BASE_PLUS_P(X) \
572 ((X) == frame_pointer_rtx \
573 || (X) == virtual_stack_vars_rtx \
574 || (X) == virtual_incoming_args_rtx \
575 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
576 && (XEXP (X, 0) == frame_pointer_rtx \
577 || XEXP (X, 0) == arg_pointer_rtx \
578 || XEXP (X, 0) == virtual_stack_vars_rtx \
579 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
580 || (X) == stack_pointer_rtx \
581 || (X) == virtual_stack_dynamic_rtx \
582 || (X) == virtual_outgoing_args_rtx \
583 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
584 && (XEXP (X, 0) == stack_pointer_rtx \
585 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
586 || XEXP (X, 0) == virtual_outgoing_args_rtx)))
588 static void new_basic_block
PROTO((void));
589 static void make_new_qty
PROTO((int));
590 static void make_regs_eqv
PROTO((int, int));
591 static void delete_reg_equiv
PROTO((int));
592 static int mention_regs
PROTO((rtx
));
593 static int insert_regs
PROTO((rtx
, struct table_elt
*, int));
594 static void free_element
PROTO((struct table_elt
*));
595 static void remove_from_table
PROTO((struct table_elt
*, int));
596 static struct table_elt
*get_element
PROTO((void));
597 static struct table_elt
*lookup
PROTO((rtx
, int, enum machine_mode
)),
598 *lookup_for_remove
PROTO((rtx
, int, enum machine_mode
));
599 static rtx lookup_as_function
PROTO((rtx
, enum rtx_code
));
600 static struct table_elt
*insert
PROTO((rtx
, struct table_elt
*, int,
602 static void merge_equiv_classes
PROTO((struct table_elt
*,
603 struct table_elt
*));
604 static void invalidate
PROTO((rtx
));
605 static void remove_invalid_refs
PROTO((int));
606 static void rehash_using_reg
PROTO((rtx
));
607 static void invalidate_memory
PROTO((struct write_data
*));
608 static void invalidate_for_call
PROTO((void));
609 static rtx use_related_value
PROTO((rtx
, struct table_elt
*));
610 static int canon_hash
PROTO((rtx
, enum machine_mode
));
611 static int safe_hash
PROTO((rtx
, enum machine_mode
));
612 static int exp_equiv_p
PROTO((rtx
, rtx
, int, int));
613 static void set_nonvarying_address_components
PROTO((rtx
, int, rtx
*,
616 static int refers_to_p
PROTO((rtx
, rtx
));
617 static int refers_to_mem_p
PROTO((rtx
, rtx
, HOST_WIDE_INT
,
619 static int cse_rtx_addr_varies_p
PROTO((rtx
));
620 static rtx canon_reg
PROTO((rtx
, rtx
));
621 static void find_best_addr
PROTO((rtx
, rtx
*));
622 static enum rtx_code find_comparison_args
PROTO((enum rtx_code
, rtx
*, rtx
*,
624 enum machine_mode
*));
625 static rtx cse_gen_binary
PROTO((enum rtx_code
, enum machine_mode
,
627 static rtx simplify_plus_minus
PROTO((enum rtx_code
, enum machine_mode
,
629 static rtx fold_rtx
PROTO((rtx
, rtx
));
630 static rtx equiv_constant
PROTO((rtx
));
631 static void record_jump_equiv
PROTO((rtx
, int));
632 static void record_jump_cond
PROTO((enum rtx_code
, enum machine_mode
,
634 static void cse_insn
PROTO((rtx
, int));
635 static void note_mem_written
PROTO((rtx
, struct write_data
*));
636 static void invalidate_from_clobbers
PROTO((struct write_data
*, rtx
));
637 static rtx cse_process_notes
PROTO((rtx
, rtx
));
638 static void cse_around_loop
PROTO((rtx
));
639 static void invalidate_skipped_set
PROTO((rtx
, rtx
));
640 static void invalidate_skipped_block
PROTO((rtx
));
641 static void cse_check_loop_start
PROTO((rtx
, rtx
));
642 static void cse_set_around_loop
PROTO((rtx
, rtx
, rtx
));
643 static rtx cse_basic_block
PROTO((rtx
, rtx
, struct branch_path
*, int));
644 static void count_reg_usage
PROTO((rtx
, int *, int));
646 /* Return an estimate of the cost of computing rtx X.
647 One use is in cse, to decide which expression to keep in the hash table.
648 Another is in rtl generation, to pick the cheapest way to multiply.
649 Other uses like the latter are expected in the future. */
651 /* Return the right cost to give to an operation
652 to make the cost of the corresponding register-to-register instruction
653 N times that of a fast register-to-register instruction. */
655 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
658 rtx_cost (x
, outer_code
)
660 enum rtx_code outer_code
;
663 register enum rtx_code code
;
670 /* Compute the default costs of certain things.
671 Note that RTX_COSTS can override the defaults. */
677 /* Count multiplication by 2**n as a shift,
678 because if we are considering it, we would output it as a shift. */
679 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
680 && exact_log2 (INTVAL (XEXP (x
, 1))) >= 0)
683 total
= COSTS_N_INSNS (5);
689 total
= COSTS_N_INSNS (7);
692 /* Used in loop.c and combine.c as a marker. */
696 /* We don't want these to be used in substitutions because
697 we have no way of validating the resulting insn. So assign
698 anything containing an ASM_OPERANDS a very high cost. */
708 return ! CHEAP_REG (REGNO (x
));
711 /* If we can't tie these modes, make this expensive. The larger
712 the mode, the more expensive it is. */
713 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
714 return COSTS_N_INSNS (2
715 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
718 RTX_COSTS (x
, code
, outer_code
);
720 CONST_COSTS (x
, code
, outer_code
);
723 /* Sum the costs of the sub-rtx's, plus cost of this operation,
724 which is already in total. */
726 fmt
= GET_RTX_FORMAT (code
);
727 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
729 total
+= rtx_cost (XEXP (x
, i
), code
);
730 else if (fmt
[i
] == 'E')
731 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
732 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
737 /* Clear the hash table and initialize each register with its own quantity,
738 for a new basic block. */
747 bzero (reg_tick
, max_reg
* sizeof (int));
749 bcopy (all_minus_one
, reg_in_table
, max_reg
* sizeof (int));
750 bcopy (consec_ints
, reg_qty
, max_reg
* sizeof (int));
751 CLEAR_HARD_REG_SET (hard_regs_in_table
);
753 /* The per-quantity values used to be initialized here, but it is
754 much faster to initialize each as it is made in `make_new_qty'. */
756 for (i
= 0; i
< NBUCKETS
; i
++)
758 register struct table_elt
*this, *next
;
759 for (this = table
[i
]; this; this = next
)
761 next
= this->next_same_hash
;
766 bzero (table
, sizeof table
);
775 /* Say that register REG contains a quantity not in any register before
776 and initialize that quantity. */
784 if (next_qty
>= max_qty
)
787 q
= reg_qty
[reg
] = next_qty
++;
788 qty_first_reg
[q
] = reg
;
789 qty_last_reg
[q
] = reg
;
790 qty_const
[q
] = qty_const_insn
[q
] = 0;
791 qty_comparison_code
[q
] = UNKNOWN
;
793 reg_next_eqv
[reg
] = reg_prev_eqv
[reg
] = -1;
796 /* Make reg NEW equivalent to reg OLD.
797 OLD is not changing; NEW is. */
800 make_regs_eqv (new, old
)
801 register int new, old
;
803 register int lastr
, firstr
;
804 register int q
= reg_qty
[old
];
806 /* Nothing should become eqv until it has a "non-invalid" qty number. */
807 if (! REGNO_QTY_VALID_P (old
))
811 firstr
= qty_first_reg
[q
];
812 lastr
= qty_last_reg
[q
];
814 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
815 hard regs. Among pseudos, if NEW will live longer than any other reg
816 of the same qty, and that is beyond the current basic block,
817 make it the new canonical replacement for this qty. */
818 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
819 /* Certain fixed registers might be of the class NO_REGS. This means
820 that not only can they not be allocated by the compiler, but
821 they cannot be used in substitutions or canonicalizations
823 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
824 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
825 || (new >= FIRST_PSEUDO_REGISTER
826 && (firstr
< FIRST_PSEUDO_REGISTER
827 || ((uid_cuid
[regno_last_uid
[new]] > cse_basic_block_end
828 || (uid_cuid
[regno_first_uid
[new]]
829 < cse_basic_block_start
))
830 && (uid_cuid
[regno_last_uid
[new]]
831 > uid_cuid
[regno_last_uid
[firstr
]]))))))
833 reg_prev_eqv
[firstr
] = new;
834 reg_next_eqv
[new] = firstr
;
835 reg_prev_eqv
[new] = -1;
836 qty_first_reg
[q
] = new;
840 /* If NEW is a hard reg (known to be non-fixed), insert at end.
841 Otherwise, insert before any non-fixed hard regs that are at the
842 end. Registers of class NO_REGS cannot be used as an
843 equivalent for anything. */
844 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_prev_eqv
[lastr
] >= 0
845 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
846 && new >= FIRST_PSEUDO_REGISTER
)
847 lastr
= reg_prev_eqv
[lastr
];
848 reg_next_eqv
[new] = reg_next_eqv
[lastr
];
849 if (reg_next_eqv
[lastr
] >= 0)
850 reg_prev_eqv
[reg_next_eqv
[lastr
]] = new;
852 qty_last_reg
[q
] = new;
853 reg_next_eqv
[lastr
] = new;
854 reg_prev_eqv
[new] = lastr
;
858 /* Remove REG from its equivalence class. */
861 delete_reg_equiv (reg
)
864 register int n
= reg_next_eqv
[reg
];
865 register int p
= reg_prev_eqv
[reg
];
866 register int q
= reg_qty
[reg
];
868 /* If invalid, do nothing. N and P above are undefined in that case. */
879 qty_first_reg
[q
] = n
;
884 /* Remove any invalid expressions from the hash table
885 that refer to any of the registers contained in expression X.
887 Make sure that newly inserted references to those registers
888 as subexpressions will be considered valid.
890 mention_regs is not called when a register itself
891 is being stored in the table.
893 Return 1 if we have done something that may have changed the hash code
900 register enum rtx_code code
;
903 register int changed
= 0;
911 register int regno
= REGNO (x
);
912 register int endregno
913 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
914 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
917 for (i
= regno
; i
< endregno
; i
++)
919 if (reg_in_table
[i
] >= 0 && reg_in_table
[i
] != reg_tick
[i
])
920 remove_invalid_refs (i
);
922 reg_in_table
[i
] = reg_tick
[i
];
928 /* If X is a comparison or a COMPARE and either operand is a register
929 that does not have a quantity, give it one. This is so that a later
930 call to record_jump_equiv won't cause X to be assigned a different
931 hash code and not found in the table after that call.
933 It is not necessary to do this here, since rehash_using_reg can
934 fix up the table later, but doing this here eliminates the need to
935 call that expensive function in the most common case where the only
936 use of the register is in the comparison. */
938 if (code
== COMPARE
|| GET_RTX_CLASS (code
) == '<')
940 if (GET_CODE (XEXP (x
, 0)) == REG
941 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
942 if (insert_regs (XEXP (x
, 0), NULL_PTR
, 0))
944 rehash_using_reg (XEXP (x
, 0));
948 if (GET_CODE (XEXP (x
, 1)) == REG
949 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
950 if (insert_regs (XEXP (x
, 1), NULL_PTR
, 0))
952 rehash_using_reg (XEXP (x
, 1));
957 fmt
= GET_RTX_FORMAT (code
);
958 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
960 changed
|= mention_regs (XEXP (x
, i
));
961 else if (fmt
[i
] == 'E')
962 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
963 changed
|= mention_regs (XVECEXP (x
, i
, j
));
968 /* Update the register quantities for inserting X into the hash table
969 with a value equivalent to CLASSP.
970 (If the class does not contain a REG, it is irrelevant.)
971 If MODIFIED is nonzero, X is a destination; it is being modified.
972 Note that delete_reg_equiv should be called on a register
973 before insert_regs is done on that register with MODIFIED != 0.
975 Nonzero value means that elements of reg_qty have changed
976 so X's hash code may be different. */
979 insert_regs (x
, classp
, modified
)
981 struct table_elt
*classp
;
984 if (GET_CODE (x
) == REG
)
986 register int regno
= REGNO (x
);
989 || ! (REGNO_QTY_VALID_P (regno
)
990 && qty_mode
[reg_qty
[regno
]] == GET_MODE (x
)))
993 for (classp
= classp
->first_same_value
;
995 classp
= classp
->next_same_value
)
996 if (GET_CODE (classp
->exp
) == REG
997 && GET_MODE (classp
->exp
) == GET_MODE (x
))
999 make_regs_eqv (regno
, REGNO (classp
->exp
));
1003 make_new_qty (regno
);
1004 qty_mode
[reg_qty
[regno
]] = GET_MODE (x
);
1009 /* If X is a SUBREG, we will likely be inserting the inner register in the
1010 table. If that register doesn't have an assigned quantity number at
1011 this point but does later, the insertion that we will be doing now will
1012 not be accessible because its hash code will have changed. So assign
1013 a quantity number now. */
1015 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
1016 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1018 insert_regs (SUBREG_REG (x
), NULL_PTR
, 0);
1019 mention_regs (SUBREG_REG (x
));
1023 return mention_regs (x
);
1026 /* Look in or update the hash table. */
1028 /* Put the element ELT on the list of free elements. */
1032 struct table_elt
*elt
;
1034 elt
->next_same_hash
= free_element_chain
;
1035 free_element_chain
= elt
;
1038 /* Return an element that is free for use. */
1040 static struct table_elt
*
1043 struct table_elt
*elt
= free_element_chain
;
1046 free_element_chain
= elt
->next_same_hash
;
1050 return (struct table_elt
*) oballoc (sizeof (struct table_elt
));
1053 /* Remove table element ELT from use in the table.
1054 HASH is its hash code, made using the HASH macro.
1055 It's an argument because often that is known in advance
1056 and we save much time not recomputing it. */
1059 remove_from_table (elt
, hash
)
1060 register struct table_elt
*elt
;
1066 /* Mark this element as removed. See cse_insn. */
1067 elt
->first_same_value
= 0;
1069 /* Remove the table element from its equivalence class. */
1072 register struct table_elt
*prev
= elt
->prev_same_value
;
1073 register struct table_elt
*next
= elt
->next_same_value
;
1075 if (next
) next
->prev_same_value
= prev
;
1078 prev
->next_same_value
= next
;
1081 register struct table_elt
*newfirst
= next
;
1084 next
->first_same_value
= newfirst
;
1085 next
= next
->next_same_value
;
1090 /* Remove the table element from its hash bucket. */
1093 register struct table_elt
*prev
= elt
->prev_same_hash
;
1094 register struct table_elt
*next
= elt
->next_same_hash
;
1096 if (next
) next
->prev_same_hash
= prev
;
1099 prev
->next_same_hash
= next
;
1100 else if (table
[hash
] == elt
)
1104 /* This entry is not in the proper hash bucket. This can happen
1105 when two classes were merged by `merge_equiv_classes'. Search
1106 for the hash bucket that it heads. This happens only very
1107 rarely, so the cost is acceptable. */
1108 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1109 if (table
[hash
] == elt
)
1114 /* Remove the table element from its related-value circular chain. */
1116 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1118 register struct table_elt
*p
= elt
->related_value
;
1119 while (p
->related_value
!= elt
)
1120 p
= p
->related_value
;
1121 p
->related_value
= elt
->related_value
;
1122 if (p
->related_value
== p
)
1123 p
->related_value
= 0;
1129 /* Look up X in the hash table and return its table element,
1130 or 0 if X is not in the table.
1132 MODE is the machine-mode of X, or if X is an integer constant
1133 with VOIDmode then MODE is the mode with which X will be used.
1135 Here we are satisfied to find an expression whose tree structure
1138 static struct table_elt
*
1139 lookup (x
, hash
, mode
)
1142 enum machine_mode mode
;
1144 register struct table_elt
*p
;
1146 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1147 if (mode
== p
->mode
&& ((x
== p
->exp
&& GET_CODE (x
) == REG
)
1148 || exp_equiv_p (x
, p
->exp
, GET_CODE (x
) != REG
, 0)))
1154 /* Like `lookup' but don't care whether the table element uses invalid regs.
1155 Also ignore discrepancies in the machine mode of a register. */
1157 static struct table_elt
*
1158 lookup_for_remove (x
, hash
, mode
)
1161 enum machine_mode mode
;
1163 register struct table_elt
*p
;
1165 if (GET_CODE (x
) == REG
)
1167 int regno
= REGNO (x
);
1168 /* Don't check the machine mode when comparing registers;
1169 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1170 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1171 if (GET_CODE (p
->exp
) == REG
1172 && REGNO (p
->exp
) == regno
)
1177 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1178 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1185 /* Look for an expression equivalent to X and with code CODE.
1186 If one is found, return that expression. */
1189 lookup_as_function (x
, code
)
1193 register struct table_elt
*p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
,
1198 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1200 if (GET_CODE (p
->exp
) == code
1201 /* Make sure this is a valid entry in the table. */
1202 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1209 /* Insert X in the hash table, assuming HASH is its hash code
1210 and CLASSP is an element of the class it should go in
1211 (or 0 if a new class should be made).
1212 It is inserted at the proper position to keep the class in
1213 the order cheapest first.
1215 MODE is the machine-mode of X, or if X is an integer constant
1216 with VOIDmode then MODE is the mode with which X will be used.
1218 For elements of equal cheapness, the most recent one
1219 goes in front, except that the first element in the list
1220 remains first unless a cheaper element is added. The order of
1221 pseudo-registers does not matter, as canon_reg will be called to
1222 find the cheapest when a register is retrieved from the table.
1224 The in_memory field in the hash table element is set to 0.
1225 The caller must set it nonzero if appropriate.
1227 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1228 and if insert_regs returns a nonzero value
1229 you must then recompute its hash code before calling here.
1231 If necessary, update table showing constant values of quantities. */
1233 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1235 static struct table_elt
*
1236 insert (x
, classp
, hash
, mode
)
1238 register struct table_elt
*classp
;
1240 enum machine_mode mode
;
1242 register struct table_elt
*elt
;
1244 /* If X is a register and we haven't made a quantity for it,
1245 something is wrong. */
1246 if (GET_CODE (x
) == REG
&& ! REGNO_QTY_VALID_P (REGNO (x
)))
1249 /* If X is a hard register, show it is being put in the table. */
1250 if (GET_CODE (x
) == REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1252 int regno
= REGNO (x
);
1253 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1256 for (i
= regno
; i
< endregno
; i
++)
1257 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1261 /* Put an element for X into the right hash bucket. */
1263 elt
= get_element ();
1265 elt
->cost
= COST (x
);
1266 elt
->next_same_value
= 0;
1267 elt
->prev_same_value
= 0;
1268 elt
->next_same_hash
= table
[hash
];
1269 elt
->prev_same_hash
= 0;
1270 elt
->related_value
= 0;
1273 elt
->is_const
= (CONSTANT_P (x
)
1274 /* GNU C++ takes advantage of this for `this'
1275 (and other const values). */
1276 || (RTX_UNCHANGING_P (x
)
1277 && GET_CODE (x
) == REG
1278 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1279 || FIXED_BASE_PLUS_P (x
));
1282 table
[hash
]->prev_same_hash
= elt
;
1285 /* Put it into the proper value-class. */
1288 classp
= classp
->first_same_value
;
1289 if (CHEAPER (elt
, classp
))
1290 /* Insert at the head of the class */
1292 register struct table_elt
*p
;
1293 elt
->next_same_value
= classp
;
1294 classp
->prev_same_value
= elt
;
1295 elt
->first_same_value
= elt
;
1297 for (p
= classp
; p
; p
= p
->next_same_value
)
1298 p
->first_same_value
= elt
;
1302 /* Insert not at head of the class. */
1303 /* Put it after the last element cheaper than X. */
1304 register struct table_elt
*p
, *next
;
1305 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1307 /* Put it after P and before NEXT. */
1308 elt
->next_same_value
= next
;
1310 next
->prev_same_value
= elt
;
1311 elt
->prev_same_value
= p
;
1312 p
->next_same_value
= elt
;
1313 elt
->first_same_value
= classp
;
1317 elt
->first_same_value
= elt
;
1319 /* If this is a constant being set equivalent to a register or a register
1320 being set equivalent to a constant, note the constant equivalence.
1322 If this is a constant, it cannot be equivalent to a different constant,
1323 and a constant is the only thing that can be cheaper than a register. So
1324 we know the register is the head of the class (before the constant was
1327 If this is a register that is not already known equivalent to a
1328 constant, we must check the entire class.
1330 If this is a register that is already known equivalent to an insn,
1331 update `qty_const_insn' to show that `this_insn' is the latest
1332 insn making that quantity equivalent to the constant. */
1334 if (elt
->is_const
&& classp
&& GET_CODE (classp
->exp
) == REG
)
1336 qty_const
[reg_qty
[REGNO (classp
->exp
)]]
1337 = gen_lowpart_if_possible (qty_mode
[reg_qty
[REGNO (classp
->exp
)]], x
);
1338 qty_const_insn
[reg_qty
[REGNO (classp
->exp
)]] = this_insn
;
1341 else if (GET_CODE (x
) == REG
&& classp
&& ! qty_const
[reg_qty
[REGNO (x
)]])
1343 register struct table_elt
*p
;
1345 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1349 qty_const
[reg_qty
[REGNO (x
)]]
1350 = gen_lowpart_if_possible (GET_MODE (x
), p
->exp
);
1351 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1357 else if (GET_CODE (x
) == REG
&& qty_const
[reg_qty
[REGNO (x
)]]
1358 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]])
1359 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1361 /* If this is a constant with symbolic value,
1362 and it has a term with an explicit integer value,
1363 link it up with related expressions. */
1364 if (GET_CODE (x
) == CONST
)
1366 rtx subexp
= get_related_value (x
);
1368 struct table_elt
*subelt
, *subelt_prev
;
1372 /* Get the integer-free subexpression in the hash table. */
1373 subhash
= safe_hash (subexp
, mode
) % NBUCKETS
;
1374 subelt
= lookup (subexp
, subhash
, mode
);
1376 subelt
= insert (subexp
, NULL_PTR
, subhash
, mode
);
1377 /* Initialize SUBELT's circular chain if it has none. */
1378 if (subelt
->related_value
== 0)
1379 subelt
->related_value
= subelt
;
1380 /* Find the element in the circular chain that precedes SUBELT. */
1381 subelt_prev
= subelt
;
1382 while (subelt_prev
->related_value
!= subelt
)
1383 subelt_prev
= subelt_prev
->related_value
;
1384 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1385 This way the element that follows SUBELT is the oldest one. */
1386 elt
->related_value
= subelt_prev
->related_value
;
1387 subelt_prev
->related_value
= elt
;
1394 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1395 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1396 the two classes equivalent.
1398 CLASS1 will be the surviving class; CLASS2 should not be used after this
1401 Any invalid entries in CLASS2 will not be copied. */
1404 merge_equiv_classes (class1
, class2
)
1405 struct table_elt
*class1
, *class2
;
1407 struct table_elt
*elt
, *next
, *new;
1409 /* Ensure we start with the head of the classes. */
1410 class1
= class1
->first_same_value
;
1411 class2
= class2
->first_same_value
;
1413 /* If they were already equal, forget it. */
1414 if (class1
== class2
)
1417 for (elt
= class2
; elt
; elt
= next
)
1421 enum machine_mode mode
= elt
->mode
;
1423 next
= elt
->next_same_value
;
1425 /* Remove old entry, make a new one in CLASS1's class.
1426 Don't do this for invalid entries as we cannot find their
1427 hash code (it also isn't necessary). */
1428 if (GET_CODE (exp
) == REG
|| exp_equiv_p (exp
, exp
, 1, 0))
1430 hash_arg_in_memory
= 0;
1431 hash_arg_in_struct
= 0;
1432 hash
= HASH (exp
, mode
);
1434 if (GET_CODE (exp
) == REG
)
1435 delete_reg_equiv (REGNO (exp
));
1437 remove_from_table (elt
, hash
);
1439 if (insert_regs (exp
, class1
, 0))
1440 hash
= HASH (exp
, mode
);
1441 new = insert (exp
, class1
, hash
, mode
);
1442 new->in_memory
= hash_arg_in_memory
;
1443 new->in_struct
= hash_arg_in_struct
;
1448 /* Remove from the hash table, or mark as invalid,
1449 all expressions whose values could be altered by storing in X.
1450 X is a register, a subreg, or a memory reference with nonvarying address
1451 (because, when a memory reference with a varying address is stored in,
1452 all memory references are removed by invalidate_memory
1453 so specific invalidation is superfluous).
1455 A nonvarying address may be just a register or just
1456 a symbol reference, or it may be either of those plus
1457 a numeric offset. */
1464 register struct table_elt
*p
;
1466 HOST_WIDE_INT start
, end
;
1468 /* If X is a register, dependencies on its contents
1469 are recorded through the qty number mechanism.
1470 Just change the qty number of the register,
1471 mark it as invalid for expressions that refer to it,
1472 and remove it itself. */
1474 if (GET_CODE (x
) == REG
)
1476 register int regno
= REGNO (x
);
1477 register int hash
= HASH (x
, GET_MODE (x
));
1479 /* Remove REGNO from any quantity list it might be on and indicate
1480 that it's value might have changed. If it is a pseudo, remove its
1481 entry from the hash table.
1483 For a hard register, we do the first two actions above for any
1484 additional hard registers corresponding to X. Then, if any of these
1485 registers are in the table, we must remove any REG entries that
1486 overlap these registers. */
1488 delete_reg_equiv (regno
);
1491 if (regno
>= FIRST_PSEUDO_REGISTER
)
1492 remove_from_table (lookup_for_remove (x
, hash
, GET_MODE (x
)), hash
);
1495 int in_table
= TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1496 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1497 int tregno
, tendregno
;
1498 register struct table_elt
*p
, *next
;
1500 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1502 for (i
= regno
+ 1; i
< endregno
; i
++)
1504 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, i
);
1505 CLEAR_HARD_REG_BIT (hard_regs_in_table
, i
);
1506 delete_reg_equiv (i
);
1511 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1512 for (p
= table
[hash
]; p
; p
= next
)
1514 next
= p
->next_same_hash
;
1516 if (GET_CODE (p
->exp
) != REG
1517 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1520 tregno
= REGNO (p
->exp
);
1522 = tregno
+ HARD_REGNO_NREGS (tregno
, GET_MODE (p
->exp
));
1523 if (tendregno
> regno
&& tregno
< endregno
)
1524 remove_from_table (p
, hash
);
1531 if (GET_CODE (x
) == SUBREG
)
1533 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1535 invalidate (SUBREG_REG (x
));
1539 /* X is not a register; it must be a memory reference with
1540 a nonvarying address. Remove all hash table elements
1541 that refer to overlapping pieces of memory. */
1543 if (GET_CODE (x
) != MEM
)
1546 set_nonvarying_address_components (XEXP (x
, 0), GET_MODE_SIZE (GET_MODE (x
)),
1547 &base
, &start
, &end
);
1549 for (i
= 0; i
< NBUCKETS
; i
++)
1551 register struct table_elt
*next
;
1552 for (p
= table
[i
]; p
; p
= next
)
1554 next
= p
->next_same_hash
;
1555 if (refers_to_mem_p (p
->exp
, base
, start
, end
))
1556 remove_from_table (p
, i
);
1561 /* Remove all expressions that refer to register REGNO,
1562 since they are already invalid, and we are about to
1563 mark that register valid again and don't want the old
1564 expressions to reappear as valid. */
1567 remove_invalid_refs (regno
)
1571 register struct table_elt
*p
, *next
;
1573 for (i
= 0; i
< NBUCKETS
; i
++)
1574 for (p
= table
[i
]; p
; p
= next
)
1576 next
= p
->next_same_hash
;
1577 if (GET_CODE (p
->exp
) != REG
1578 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, NULL_PTR
))
1579 remove_from_table (p
, i
);
1583 /* Recompute the hash codes of any valid entries in the hash table that
1584 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1586 This is called when we make a jump equivalence. */
1589 rehash_using_reg (x
)
1593 struct table_elt
*p
, *next
;
1596 if (GET_CODE (x
) == SUBREG
)
1599 /* If X is not a register or if the register is known not to be in any
1600 valid entries in the table, we have no work to do. */
1602 if (GET_CODE (x
) != REG
1603 || reg_in_table
[REGNO (x
)] < 0
1604 || reg_in_table
[REGNO (x
)] != reg_tick
[REGNO (x
)])
1607 /* Scan all hash chains looking for valid entries that mention X.
1608 If we find one and it is in the wrong hash chain, move it. We can skip
1609 objects that are registers, since they are handled specially. */
1611 for (i
= 0; i
< NBUCKETS
; i
++)
1612 for (p
= table
[i
]; p
; p
= next
)
1614 next
= p
->next_same_hash
;
1615 if (GET_CODE (p
->exp
) != REG
&& reg_mentioned_p (x
, p
->exp
)
1616 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
1617 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) % NBUCKETS
))
1619 if (p
->next_same_hash
)
1620 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1622 if (p
->prev_same_hash
)
1623 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1625 table
[i
] = p
->next_same_hash
;
1627 p
->next_same_hash
= table
[hash
];
1628 p
->prev_same_hash
= 0;
1630 table
[hash
]->prev_same_hash
= p
;
1636 /* Remove from the hash table all expressions that reference memory,
1637 or some of them as specified by *WRITES. */
1640 invalidate_memory (writes
)
1641 struct write_data
*writes
;
1644 register struct table_elt
*p
, *next
;
1645 int all
= writes
->all
;
1646 int nonscalar
= writes
->nonscalar
;
1648 for (i
= 0; i
< NBUCKETS
; i
++)
1649 for (p
= table
[i
]; p
; p
= next
)
1651 next
= p
->next_same_hash
;
1654 || (nonscalar
&& p
->in_struct
)
1655 || cse_rtx_addr_varies_p (p
->exp
)))
1656 remove_from_table (p
, i
);
1660 /* Remove from the hash table any expression that is a call-clobbered
1661 register. Also update their TICK values. */
1664 invalidate_for_call ()
1666 int regno
, endregno
;
1669 struct table_elt
*p
, *next
;
1672 /* Go through all the hard registers. For each that is clobbered in
1673 a CALL_INSN, remove the register from quantity chains and update
1674 reg_tick if defined. Also see if any of these registers is currently
1677 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1678 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1680 delete_reg_equiv (regno
);
1681 if (reg_tick
[regno
] >= 0)
1684 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1687 /* In the case where we have no call-clobbered hard registers in the
1688 table, we are done. Otherwise, scan the table and remove any
1689 entry that overlaps a call-clobbered register. */
1692 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1693 for (p
= table
[hash
]; p
; p
= next
)
1695 next
= p
->next_same_hash
;
1697 if (GET_CODE (p
->exp
) != REG
1698 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1701 regno
= REGNO (p
->exp
);
1702 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (p
->exp
));
1704 for (i
= regno
; i
< endregno
; i
++)
1705 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1707 remove_from_table (p
, hash
);
1713 /* Given an expression X of type CONST,
1714 and ELT which is its table entry (or 0 if it
1715 is not in the hash table),
1716 return an alternate expression for X as a register plus integer.
1717 If none can be found, return 0. */
1720 use_related_value (x
, elt
)
1722 struct table_elt
*elt
;
1724 register struct table_elt
*relt
= 0;
1725 register struct table_elt
*p
, *q
;
1726 HOST_WIDE_INT offset
;
1728 /* First, is there anything related known?
1729 If we have a table element, we can tell from that.
1730 Otherwise, must look it up. */
1732 if (elt
!= 0 && elt
->related_value
!= 0)
1734 else if (elt
== 0 && GET_CODE (x
) == CONST
)
1736 rtx subexp
= get_related_value (x
);
1738 relt
= lookup (subexp
,
1739 safe_hash (subexp
, GET_MODE (subexp
)) % NBUCKETS
,
1746 /* Search all related table entries for one that has an
1747 equivalent register. */
1752 /* This loop is strange in that it is executed in two different cases.
1753 The first is when X is already in the table. Then it is searching
1754 the RELATED_VALUE list of X's class (RELT). The second case is when
1755 X is not in the table. Then RELT points to a class for the related
1758 Ensure that, whatever case we are in, that we ignore classes that have
1759 the same value as X. */
1761 if (rtx_equal_p (x
, p
->exp
))
1764 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
1765 if (GET_CODE (q
->exp
) == REG
)
1771 p
= p
->related_value
;
1773 /* We went all the way around, so there is nothing to be found.
1774 Alternatively, perhaps RELT was in the table for some other reason
1775 and it has no related values recorded. */
1776 if (p
== relt
|| p
== 0)
1783 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
1784 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1785 return plus_constant (q
->exp
, offset
);
1788 /* Hash an rtx. We are careful to make sure the value is never negative.
1789 Equivalent registers hash identically.
1790 MODE is used in hashing for CONST_INTs only;
1791 otherwise the mode of X is used.
1793 Store 1 in do_not_record if any subexpression is volatile.
1795 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1796 which does not have the RTX_UNCHANGING_P bit set.
1797 In this case, also store 1 in hash_arg_in_struct
1798 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1800 Note that cse_insn knows that the hash code of a MEM expression
1801 is just (int) MEM plus the hash code of the address. */
1804 canon_hash (x
, mode
)
1806 enum machine_mode mode
;
1809 register int hash
= 0;
1810 register enum rtx_code code
;
1813 /* repeat is used to turn tail-recursion into iteration. */
1818 code
= GET_CODE (x
);
1823 register int regno
= REGNO (x
);
1825 /* On some machines, we can't record any non-fixed hard register,
1826 because extending its life will cause reload problems. We
1827 consider ap, fp, and sp to be fixed for this purpose.
1828 On all machines, we can't record any global registers. */
1830 if (regno
< FIRST_PSEUDO_REGISTER
1831 && (global_regs
[regno
]
1832 #ifdef SMALL_REGISTER_CLASSES
1833 || (! fixed_regs
[regno
]
1834 && regno
!= FRAME_POINTER_REGNUM
1835 && regno
!= ARG_POINTER_REGNUM
1836 && regno
!= STACK_POINTER_REGNUM
)
1843 return hash
+ ((int) REG
<< 7) + reg_qty
[regno
];
1847 hash
+= ((int) mode
+ ((int) CONST_INT
<< 7)
1848 + INTVAL (x
) + (INTVAL (x
) >> HASHBITS
));
1849 return ((1 << HASHBITS
) - 1) & hash
;
1852 /* This is like the general case, except that it only counts
1853 the integers representing the constant. */
1854 hash
+= (int) code
+ (int) GET_MODE (x
);
1857 for (i
= 2; i
< GET_RTX_LENGTH (CONST_DOUBLE
); i
++)
1859 int tem
= XINT (x
, i
);
1860 hash
+= ((1 << HASHBITS
) - 1) & (tem
+ (tem
>> HASHBITS
));
1865 /* Assume there is only one rtx object for any given label. */
1867 /* Use `and' to ensure a positive number. */
1868 return (hash
+ ((HOST_WIDE_INT
) LABEL_REF
<< 7)
1869 + ((HOST_WIDE_INT
) XEXP (x
, 0) & ((1 << HASHBITS
) - 1)));
1872 return (hash
+ ((HOST_WIDE_INT
) SYMBOL_REF
<< 7)
1873 + ((HOST_WIDE_INT
) XEXP (x
, 0) & ((1 << HASHBITS
) - 1)));
1876 if (MEM_VOLATILE_P (x
))
1881 if (! RTX_UNCHANGING_P (x
))
1883 hash_arg_in_memory
= 1;
1884 if (MEM_IN_STRUCT_P (x
)) hash_arg_in_struct
= 1;
1886 /* Now that we have already found this special case,
1887 might as well speed it up as much as possible. */
1899 case UNSPEC_VOLATILE
:
1904 if (MEM_VOLATILE_P (x
))
1911 i
= GET_RTX_LENGTH (code
) - 1;
1912 hash
+= (int) code
+ (int) GET_MODE (x
);
1913 fmt
= GET_RTX_FORMAT (code
);
1918 rtx tem
= XEXP (x
, i
);
1921 /* If the operand is a REG that is equivalent to a constant, hash
1922 as if we were hashing the constant, since we will be comparing
1924 if (tem
!= 0 && GET_CODE (tem
) == REG
1925 && REGNO_QTY_VALID_P (REGNO (tem
))
1926 && qty_mode
[reg_qty
[REGNO (tem
)]] == GET_MODE (tem
)
1927 && (tem1
= qty_const
[reg_qty
[REGNO (tem
)]]) != 0
1928 && CONSTANT_P (tem1
))
1931 /* If we are about to do the last recursive call
1932 needed at this level, change it into iteration.
1933 This function is called enough to be worth it. */
1939 hash
+= canon_hash (tem
, 0);
1941 else if (fmt
[i
] == 'E')
1942 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1943 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
1944 else if (fmt
[i
] == 's')
1946 register char *p
= XSTR (x
, i
);
1950 register int tem
= *p
++;
1951 hash
+= ((1 << HASHBITS
) - 1) & (tem
+ (tem
>> HASHBITS
));
1954 else if (fmt
[i
] == 'i')
1956 register int tem
= XINT (x
, i
);
1957 hash
+= ((1 << HASHBITS
) - 1) & (tem
+ (tem
>> HASHBITS
));
1965 /* Like canon_hash but with no side effects. */
1970 enum machine_mode mode
;
1972 int save_do_not_record
= do_not_record
;
1973 int save_hash_arg_in_memory
= hash_arg_in_memory
;
1974 int save_hash_arg_in_struct
= hash_arg_in_struct
;
1975 int hash
= canon_hash (x
, mode
);
1976 hash_arg_in_memory
= save_hash_arg_in_memory
;
1977 hash_arg_in_struct
= save_hash_arg_in_struct
;
1978 do_not_record
= save_do_not_record
;
1982 /* Return 1 iff X and Y would canonicalize into the same thing,
1983 without actually constructing the canonicalization of either one.
1984 If VALIDATE is nonzero,
1985 we assume X is an expression being processed from the rtl
1986 and Y was found in the hash table. We check register refs
1987 in Y for being marked as valid.
1989 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
1990 that is known to be in the register. Ordinarily, we don't allow them
1991 to match, because letting them match would cause unpredictable results
1992 in all the places that search a hash table chain for an equivalent
1993 for a given value. A possible equivalent that has different structure
1994 has its hash code computed from different data. Whether the hash code
1995 is the same as that of the the given value is pure luck. */
1998 exp_equiv_p (x
, y
, validate
, equal_values
)
2004 register enum rtx_code code
;
2007 /* Note: it is incorrect to assume an expression is equivalent to itself
2008 if VALIDATE is nonzero. */
2009 if (x
== y
&& !validate
)
2011 if (x
== 0 || y
== 0)
2014 code
= GET_CODE (x
);
2015 if (code
!= GET_CODE (y
))
2020 /* If X is a constant and Y is a register or vice versa, they may be
2021 equivalent. We only have to validate if Y is a register. */
2022 if (CONSTANT_P (x
) && GET_CODE (y
) == REG
2023 && REGNO_QTY_VALID_P (REGNO (y
))
2024 && GET_MODE (y
) == qty_mode
[reg_qty
[REGNO (y
)]]
2025 && rtx_equal_p (x
, qty_const
[reg_qty
[REGNO (y
)]])
2026 && (! validate
|| reg_in_table
[REGNO (y
)] == reg_tick
[REGNO (y
)]))
2029 if (CONSTANT_P (y
) && code
== REG
2030 && REGNO_QTY_VALID_P (REGNO (x
))
2031 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
2032 && rtx_equal_p (y
, qty_const
[reg_qty
[REGNO (x
)]]))
2038 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2039 if (GET_MODE (x
) != GET_MODE (y
))
2049 return INTVAL (x
) == INTVAL (y
);
2053 return XEXP (x
, 0) == XEXP (y
, 0);
2057 int regno
= REGNO (y
);
2059 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2060 : HARD_REGNO_NREGS (regno
, GET_MODE (y
)));
2063 /* If the quantities are not the same, the expressions are not
2064 equivalent. If there are and we are not to validate, they
2065 are equivalent. Otherwise, ensure all regs are up-to-date. */
2067 if (reg_qty
[REGNO (x
)] != reg_qty
[regno
])
2073 for (i
= regno
; i
< endregno
; i
++)
2074 if (reg_in_table
[i
] != reg_tick
[i
])
2080 /* For commutative operations, check both orders. */
2088 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2089 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2090 validate
, equal_values
))
2091 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2092 validate
, equal_values
)
2093 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2094 validate
, equal_values
)));
2097 /* Compare the elements. If any pair of corresponding elements
2098 fail to match, return 0 for the whole things. */
2100 fmt
= GET_RTX_FORMAT (code
);
2101 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2106 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2111 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2113 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2114 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2115 validate
, equal_values
))
2120 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2125 if (XINT (x
, i
) != XINT (y
, i
))
2130 if (XWINT (x
, i
) != XWINT (y
, i
))
2145 /* Return 1 iff any subexpression of X matches Y.
2146 Here we do not require that X or Y be valid (for registers referred to)
2147 for being in the hash table. */
2154 register enum rtx_code code
;
2160 if (x
== 0 || y
== 0)
2163 code
= GET_CODE (x
);
2164 /* If X as a whole has the same code as Y, they may match.
2166 if (code
== GET_CODE (y
))
2168 if (exp_equiv_p (x
, y
, 0, 1))
2172 /* X does not match, so try its subexpressions. */
2174 fmt
= GET_RTX_FORMAT (code
);
2175 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2184 if (refers_to_p (XEXP (x
, i
), y
))
2187 else if (fmt
[i
] == 'E')
2190 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2191 if (refers_to_p (XVECEXP (x
, i
, j
), y
))
2198 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2199 set PBASE, PSTART, and PEND which correspond to the base of the address,
2200 the starting offset, and ending offset respectively.
2202 ADDR is known to be a nonvarying address.
2204 cse_address_varies_p returns zero for nonvarying addresses. */
2207 set_nonvarying_address_components (addr
, size
, pbase
, pstart
, pend
)
2211 HOST_WIDE_INT
*pstart
, *pend
;
2220 /* Registers with nonvarying addresses usually have constant equivalents;
2221 but the frame pointer register is also possible. */
2222 if (GET_CODE (base
) == REG
2224 && REGNO_QTY_VALID_P (REGNO (base
))
2225 && qty_mode
[reg_qty
[REGNO (base
)]] == GET_MODE (base
)
2226 && qty_const
[reg_qty
[REGNO (base
)]] != 0)
2227 base
= qty_const
[reg_qty
[REGNO (base
)]];
2228 else if (GET_CODE (base
) == PLUS
2229 && GET_CODE (XEXP (base
, 1)) == CONST_INT
2230 && GET_CODE (XEXP (base
, 0)) == REG
2232 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2233 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2234 == GET_MODE (XEXP (base
, 0)))
2235 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]])
2237 start
= INTVAL (XEXP (base
, 1));
2238 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2241 /* By definition, operand1 of a LO_SUM is the associated constant
2242 address. Use the associated constant address as the base instead. */
2243 if (GET_CODE (base
) == LO_SUM
)
2244 base
= XEXP (base
, 1);
2246 /* Strip off CONST. */
2247 if (GET_CODE (base
) == CONST
)
2248 base
= XEXP (base
, 0);
2250 if (GET_CODE (base
) == PLUS
2251 && GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2253 start
+= INTVAL (XEXP (base
, 1));
2254 base
= XEXP (base
, 0);
2259 /* Set the return values. */
2265 /* Return 1 iff any subexpression of X refers to memory
2266 at an address of BASE plus some offset
2267 such that any of the bytes' offsets fall between START (inclusive)
2268 and END (exclusive).
2270 The value is undefined if X is a varying address (as determined by
2271 cse_rtx_addr_varies_p). This function is not used in such cases.
2273 When used in the cse pass, `qty_const' is nonzero, and it is used
2274 to treat an address that is a register with a known constant value
2275 as if it were that constant value.
2276 In the loop pass, `qty_const' is zero, so this is not done. */
2279 refers_to_mem_p (x
, base
, start
, end
)
2281 HOST_WIDE_INT start
, end
;
2283 register HOST_WIDE_INT i
;
2284 register enum rtx_code code
;
2287 if (GET_CODE (base
) == CONST_INT
)
2289 start
+= INTVAL (base
);
2290 end
+= INTVAL (base
);
2298 code
= GET_CODE (x
);
2301 register rtx addr
= XEXP (x
, 0); /* Get the address. */
2303 HOST_WIDE_INT mystart
, myend
;
2305 set_nonvarying_address_components (addr
, GET_MODE_SIZE (GET_MODE (x
)),
2306 &mybase
, &mystart
, &myend
);
2309 /* refers_to_mem_p is never called with varying addresses.
2310 If the base addresses are not equal, there is no chance
2311 of the memory addresses conflicting. */
2312 if (! rtx_equal_p (mybase
, base
))
2315 return myend
> start
&& mystart
< end
;
2318 /* X does not match, so try its subexpressions. */
2320 fmt
= GET_RTX_FORMAT (code
);
2321 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2330 if (refers_to_mem_p (XEXP (x
, i
), base
, start
, end
))
2333 else if (fmt
[i
] == 'E')
2336 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2337 if (refers_to_mem_p (XVECEXP (x
, i
, j
), base
, start
, end
))
2344 /* Nonzero if X refers to memory at a varying address;
2345 except that a register which has at the moment a known constant value
2346 isn't considered variable. */
2349 cse_rtx_addr_varies_p (x
)
2352 /* We need not check for X and the equivalence class being of the same
2353 mode because if X is equivalent to a constant in some mode, it
2354 doesn't vary in any mode. */
2356 if (GET_CODE (x
) == MEM
2357 && GET_CODE (XEXP (x
, 0)) == REG
2358 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2359 && GET_MODE (XEXP (x
, 0)) == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]]
2360 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]] != 0)
2363 if (GET_CODE (x
) == MEM
2364 && GET_CODE (XEXP (x
, 0)) == PLUS
2365 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
2366 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == REG
2367 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x
, 0), 0)))
2368 && (GET_MODE (XEXP (XEXP (x
, 0), 0))
2369 == qty_mode
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2370 && qty_const
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2373 return rtx_addr_varies_p (x
);
2376 /* Canonicalize an expression:
2377 replace each register reference inside it
2378 with the "oldest" equivalent register.
2380 If INSN is non-zero and we are replacing a pseudo with a hard register
2381 or vice versa, validate_change is used to ensure that INSN remains valid
2382 after we make our substitution. The calls are made with IN_GROUP non-zero
2383 so apply_change_group must be called upon the outermost return from this
2384 function (unless INSN is zero). The result of apply_change_group can
2385 generally be discarded since the changes we are making are optional. */
2393 register enum rtx_code code
;
2399 code
= GET_CODE (x
);
2417 /* Never replace a hard reg, because hard regs can appear
2418 in more than one machine mode, and we must preserve the mode
2419 of each occurrence. Also, some hard regs appear in
2420 MEMs that are shared and mustn't be altered. Don't try to
2421 replace any reg that maps to a reg of class NO_REGS. */
2422 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2423 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2426 first
= qty_first_reg
[reg_qty
[REGNO (x
)]];
2427 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2428 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2429 : gen_rtx (REG
, qty_mode
[reg_qty
[REGNO (x
)]], first
));
2433 fmt
= GET_RTX_FORMAT (code
);
2434 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2440 rtx
new = canon_reg (XEXP (x
, i
), insn
);
2442 /* If replacing pseudo with hard reg or vice versa, ensure the
2443 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2444 if (insn
!= 0 && new != 0
2445 && GET_CODE (new) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
2446 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2447 != (REGNO (XEXP (x
, i
)) < FIRST_PSEUDO_REGISTER
))
2448 || insn_n_dups
[recog_memoized (insn
)] > 0))
2449 validate_change (insn
, &XEXP (x
, i
), new, 1);
2453 else if (fmt
[i
] == 'E')
2454 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2455 XVECEXP (x
, i
, j
) = canon_reg (XVECEXP (x
, i
, j
), insn
);
2461 /* LOC is a location with INSN that is an operand address (the contents of
2462 a MEM). Find the best equivalent address to use that is valid for this
2465 On most CISC machines, complicated address modes are costly, and rtx_cost
2466 is a good approximation for that cost. However, most RISC machines have
2467 only a few (usually only one) memory reference formats. If an address is
2468 valid at all, it is often just as cheap as any other address. Hence, for
2469 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2470 costs of various addresses. For two addresses of equal cost, choose the one
2471 with the highest `rtx_cost' value as that has the potential of eliminating
2472 the most insns. For equal costs, we choose the first in the equivalence
2473 class. Note that we ignore the fact that pseudo registers are cheaper
2474 than hard registers here because we would also prefer the pseudo registers.
2478 find_best_addr (insn
, loc
)
2482 struct table_elt
*elt
, *p
;
2485 int found_better
= 1;
2486 int save_do_not_record
= do_not_record
;
2487 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2488 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2493 /* Do not try to replace constant addresses or addresses of local and
2494 argument slots. These MEM expressions are made only once and inserted
2495 in many instructions, as well as being used to control symbol table
2496 output. It is not safe to clobber them.
2498 There are some uncommon cases where the address is already in a register
2499 for some reason, but we cannot take advantage of that because we have
2500 no easy way to unshare the MEM. In addition, looking up all stack
2501 addresses is costly. */
2502 if ((GET_CODE (addr
) == PLUS
2503 && GET_CODE (XEXP (addr
, 0)) == REG
2504 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2505 && (regno
= REGNO (XEXP (addr
, 0)),
2506 regno
== FRAME_POINTER_REGNUM
|| regno
== ARG_POINTER_REGNUM
))
2507 || (GET_CODE (addr
) == REG
2508 && (regno
= REGNO (addr
),
2509 regno
== FRAME_POINTER_REGNUM
|| regno
== ARG_POINTER_REGNUM
))
2510 || CONSTANT_ADDRESS_P (addr
))
2513 /* If this address is not simply a register, try to fold it. This will
2514 sometimes simplify the expression. Many simplifications
2515 will not be valid, but some, usually applying the associative rule, will
2516 be valid and produce better code. */
2517 if (GET_CODE (addr
) != REG
2518 && validate_change (insn
, loc
, fold_rtx (addr
, insn
), 0))
2521 /* If this address is not in the hash table, we can't look for equivalences
2522 of the whole address. Also, ignore if volatile. */
2525 hash_code
= HASH (addr
, Pmode
);
2526 addr_volatile
= do_not_record
;
2527 do_not_record
= save_do_not_record
;
2528 hash_arg_in_memory
= save_hash_arg_in_memory
;
2529 hash_arg_in_struct
= save_hash_arg_in_struct
;
2534 elt
= lookup (addr
, hash_code
, Pmode
);
2536 #ifndef ADDRESS_COST
2539 our_cost
= elt
->cost
;
2541 /* Find the lowest cost below ours that works. */
2542 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
2543 if (elt
->cost
< our_cost
2544 && (GET_CODE (elt
->exp
) == REG
2545 || exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
2546 && validate_change (insn
, loc
,
2547 canon_reg (copy_rtx (elt
->exp
), NULL_RTX
), 0))
2554 /* We need to find the best (under the criteria documented above) entry
2555 in the class that is valid. We use the `flag' field to indicate
2556 choices that were invalid and iterate until we can't find a better
2557 one that hasn't already been tried. */
2559 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2562 while (found_better
)
2564 int best_addr_cost
= ADDRESS_COST (*loc
);
2565 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2566 struct table_elt
*best_elt
= elt
;
2569 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2571 && (GET_CODE (p
->exp
) == REG
2572 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2573 && (ADDRESS_COST (p
->exp
) < best_addr_cost
2574 || (ADDRESS_COST (p
->exp
) == best_addr_cost
2575 && (p
->cost
+ 1) >> 1 > best_rtx_cost
)))
2578 best_addr_cost
= ADDRESS_COST (p
->exp
);
2579 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2585 if (validate_change (insn
, loc
,
2586 canon_reg (copy_rtx (best_elt
->exp
),
2595 /* If the address is a binary operation with the first operand a register
2596 and the second a constant, do the same as above, but looking for
2597 equivalences of the register. Then try to simplify before checking for
2598 the best address to use. This catches a few cases: First is when we
2599 have REG+const and the register is another REG+const. We can often merge
2600 the constants and eliminate one insn and one register. It may also be
2601 that a machine has a cheap REG+REG+const. Finally, this improves the
2602 code on the Alpha for unaligned byte stores. */
2604 if (flag_expensive_optimizations
2605 && (GET_RTX_CLASS (GET_CODE (*loc
)) == '2'
2606 || GET_RTX_CLASS (GET_CODE (*loc
)) == 'c')
2607 && GET_CODE (XEXP (*loc
, 0)) == REG
2608 && GET_CODE (XEXP (*loc
, 1)) == CONST_INT
)
2610 rtx c
= XEXP (*loc
, 1);
2613 hash_code
= HASH (XEXP (*loc
, 0), Pmode
);
2614 do_not_record
= save_do_not_record
;
2615 hash_arg_in_memory
= save_hash_arg_in_memory
;
2616 hash_arg_in_struct
= save_hash_arg_in_struct
;
2618 elt
= lookup (XEXP (*loc
, 0), hash_code
, Pmode
);
2622 /* We need to find the best (under the criteria documented above) entry
2623 in the class that is valid. We use the `flag' field to indicate
2624 choices that were invalid and iterate until we can't find a better
2625 one that hasn't already been tried. */
2627 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2630 while (found_better
)
2632 int best_addr_cost
= ADDRESS_COST (*loc
);
2633 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2634 struct table_elt
*best_elt
= elt
;
2635 rtx best_rtx
= *loc
;
2638 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2640 && (GET_CODE (p
->exp
) == REG
2641 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0)))
2643 rtx
new = cse_gen_binary (GET_CODE (*loc
), Pmode
, p
->exp
, c
);
2645 if ((ADDRESS_COST (new) < best_addr_cost
2646 || (ADDRESS_COST (new) == best_addr_cost
2647 && (COST (new) + 1) >> 1 > best_rtx_cost
)))
2650 best_addr_cost
= ADDRESS_COST (new);
2651 best_rtx_cost
= (COST (new) + 1) >> 1;
2659 if (validate_change (insn
, loc
,
2660 canon_reg (copy_rtx (best_rtx
),
2671 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2672 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2673 what values are being compared.
2675 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2676 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2677 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2678 compared to produce cc0.
2680 The return value is the comparison operator and is either the code of
2681 A or the code corresponding to the inverse of the comparison. */
2683 static enum rtx_code
2684 find_comparison_args (code
, parg1
, parg2
, pmode1
, pmode2
)
2687 enum machine_mode
*pmode1
, *pmode2
;
2691 arg1
= *parg1
, arg2
= *parg2
;
2693 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2695 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2697 /* Set non-zero when we find something of interest. */
2699 int reverse_code
= 0;
2700 struct table_elt
*p
= 0;
2702 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2703 On machines with CC0, this is the only case that can occur, since
2704 fold_rtx will return the COMPARE or item being compared with zero
2707 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2710 /* If ARG1 is a comparison operator and CODE is testing for
2711 STORE_FLAG_VALUE, get the inner arguments. */
2713 else if (GET_RTX_CLASS (GET_CODE (arg1
)) == '<')
2716 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2717 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2718 #ifdef FLOAT_STORE_FLAG_VALUE
2719 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2720 && FLOAT_STORE_FLAG_VALUE
< 0)
2725 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2726 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2727 #ifdef FLOAT_STORE_FLAG_VALUE
2728 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2729 && FLOAT_STORE_FLAG_VALUE
< 0)
2732 x
= arg1
, reverse_code
= 1;
2735 /* ??? We could also check for
2737 (ne (and (eq (...) (const_int 1))) (const_int 0))
2739 and related forms, but let's wait until we see them occurring. */
2742 /* Look up ARG1 in the hash table and see if it has an equivalence
2743 that lets us see what is being compared. */
2744 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) % NBUCKETS
,
2746 if (p
) p
= p
->first_same_value
;
2748 for (; p
; p
= p
->next_same_value
)
2750 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2752 /* If the entry isn't valid, skip it. */
2753 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2756 if (GET_CODE (p
->exp
) == COMPARE
2757 /* Another possibility is that this machine has a compare insn
2758 that includes the comparison code. In that case, ARG1 would
2759 be equivalent to a comparison operation that would set ARG1 to
2760 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2761 ORIG_CODE is the actual comparison being done; if it is an EQ,
2762 we must reverse ORIG_CODE. On machine with a negative value
2763 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2766 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2767 && (GET_MODE_BITSIZE (inner_mode
)
2768 <= HOST_BITS_PER_WIDE_INT
)
2769 && (STORE_FLAG_VALUE
2770 & ((HOST_WIDE_INT
) 1
2771 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2772 #ifdef FLOAT_STORE_FLAG_VALUE
2774 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2775 && FLOAT_STORE_FLAG_VALUE
< 0)
2778 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<'))
2783 else if ((code
== EQ
2785 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2786 && (GET_MODE_BITSIZE (inner_mode
)
2787 <= HOST_BITS_PER_WIDE_INT
)
2788 && (STORE_FLAG_VALUE
2789 & ((HOST_WIDE_INT
) 1
2790 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2791 #ifdef FLOAT_STORE_FLAG_VALUE
2793 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2794 && FLOAT_STORE_FLAG_VALUE
< 0)
2797 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<')
2804 /* If this is fp + constant, the equivalent is a better operand since
2805 it may let us predict the value of the comparison. */
2806 else if (NONZERO_BASE_PLUS_P (p
->exp
))
2813 /* If we didn't find a useful equivalence for ARG1, we are done.
2814 Otherwise, set up for the next iteration. */
2818 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
2819 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
2820 code
= GET_CODE (x
);
2823 code
= reverse_condition (code
);
2826 /* Return our results. Return the modes from before fold_rtx
2827 because fold_rtx might produce const_int, and then it's too late. */
2828 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
2829 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
2834 /* Try to simplify a unary operation CODE whose output mode is to be
2835 MODE with input operand OP whose mode was originally OP_MODE.
2836 Return zero if no simplification can be made. */
2839 simplify_unary_operation (code
, mode
, op
, op_mode
)
2841 enum machine_mode mode
;
2843 enum machine_mode op_mode
;
2845 register int width
= GET_MODE_BITSIZE (mode
);
2847 /* The order of these tests is critical so that, for example, we don't
2848 check the wrong mode (input vs. output) for a conversion operation,
2849 such as FIX. At some point, this should be simplified. */
2851 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
2852 if (code
== FLOAT
&& GET_CODE (op
) == CONST_INT
)
2856 #ifdef REAL_ARITHMETIC
2857 REAL_VALUE_FROM_INT (d
, INTVAL (op
), INTVAL (op
) < 0 ? ~0 : 0);
2859 d
= (double) INTVAL (op
);
2861 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2863 else if (code
== UNSIGNED_FLOAT
&& GET_CODE (op
) == CONST_INT
)
2867 #ifdef REAL_ARITHMETIC
2868 REAL_VALUE_FROM_INT (d
, INTVAL (op
), 0);
2870 d
= (double) (unsigned int) INTVAL (op
);
2872 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2875 else if (code
== FLOAT
&& GET_CODE (op
) == CONST_DOUBLE
2876 && GET_MODE (op
) == VOIDmode
)
2880 #ifdef REAL_ARITHMETIC
2881 REAL_VALUE_FROM_INT (d
, CONST_DOUBLE_LOW (op
), CONST_DOUBLE_HIGH (op
));
2883 if (CONST_DOUBLE_HIGH (op
) < 0)
2885 d
= (double) (~ CONST_DOUBLE_HIGH (op
));
2886 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2887 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2888 d
+= (double) (unsigned HOST_WIDE_INT
) (~ CONST_DOUBLE_LOW (op
));
2893 d
= (double) CONST_DOUBLE_HIGH (op
);
2894 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2895 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2896 d
+= (double) (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (op
);
2898 #endif /* REAL_ARITHMETIC */
2899 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2901 else if (code
== UNSIGNED_FLOAT
&& GET_CODE (op
) == CONST_DOUBLE
2902 && GET_MODE (op
) == VOIDmode
)
2906 #ifdef REAL_ARITHMETIC
2907 REAL_VALUE_FROM_UNSIGNED_INT (d
, CONST_DOUBLE_LOW (op
),
2908 CONST_DOUBLE_HIGH (op
));
2910 d
= (double) CONST_DOUBLE_HIGH (op
);
2911 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2912 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2913 d
+= (double) (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (op
);
2914 #endif /* REAL_ARITHMETIC */
2915 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2919 if (GET_CODE (op
) == CONST_INT
2920 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
2922 register HOST_WIDE_INT arg0
= INTVAL (op
);
2923 register HOST_WIDE_INT val
;
2936 val
= (arg0
>= 0 ? arg0
: - arg0
);
2940 /* Don't use ffs here. Instead, get low order bit and then its
2941 number. If arg0 is zero, this will return 0, as desired. */
2942 arg0
&= GET_MODE_MASK (mode
);
2943 val
= exact_log2 (arg0
& (- arg0
)) + 1;
2951 if (op_mode
== VOIDmode
)
2953 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
2955 /* If we were really extending the mode,
2956 we would have to distinguish between zero-extension
2957 and sign-extension. */
2958 if (width
!= GET_MODE_BITSIZE (op_mode
))
2962 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
2963 val
= arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
2969 if (op_mode
== VOIDmode
)
2971 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
2973 /* If we were really extending the mode,
2974 we would have to distinguish between zero-extension
2975 and sign-extension. */
2976 if (width
!= GET_MODE_BITSIZE (op_mode
))
2980 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
2983 = arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
2985 & ((HOST_WIDE_INT
) 1 << (GET_MODE_BITSIZE (op_mode
) - 1)))
2986 val
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
2999 /* Clear the bits that don't belong in our mode,
3000 unless they and our sign bit are all one.
3001 So we get either a reasonable negative value or a reasonable
3002 unsigned value for this mode. */
3003 if (width
< HOST_BITS_PER_WIDE_INT
3004 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3005 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3006 val
&= (1 << width
) - 1;
3008 return GEN_INT (val
);
3011 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3012 for a DImode operation on a CONST_INT. */
3013 else if (GET_MODE (op
) == VOIDmode
3014 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3016 HOST_WIDE_INT l1
, h1
, lv
, hv
;
3018 if (GET_CODE (op
) == CONST_DOUBLE
)
3019 l1
= CONST_DOUBLE_LOW (op
), h1
= CONST_DOUBLE_HIGH (op
);
3021 l1
= INTVAL (op
), h1
= l1
< 0 ? -1 : 0;
3031 neg_double (l1
, h1
, &lv
, &hv
);
3036 neg_double (l1
, h1
, &lv
, &hv
);
3044 lv
= HOST_BITS_PER_WIDE_INT
+ exact_log2 (h1
& (-h1
)) + 1;
3046 lv
= exact_log2 (l1
& (-l1
)) + 1;
3050 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
3051 return GEN_INT (l1
& GET_MODE_MASK (mode
));
3057 if (op_mode
== VOIDmode
3058 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3062 lv
= l1
& GET_MODE_MASK (op_mode
);
3066 if (op_mode
== VOIDmode
3067 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3071 lv
= l1
& GET_MODE_MASK (op_mode
);
3072 if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
3073 && (lv
& ((HOST_WIDE_INT
) 1
3074 << (GET_MODE_BITSIZE (op_mode
) - 1))) != 0)
3075 lv
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3077 hv
= (lv
< 0) ? ~ (HOST_WIDE_INT
) 0 : 0;
3088 return immed_double_const (lv
, hv
, mode
);
3091 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3092 else if (GET_CODE (op
) == CONST_DOUBLE
3093 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3099 if (setjmp (handler
))
3100 /* There used to be a warning here, but that is inadvisable.
3101 People may want to cause traps, and the natural way
3102 to do it should not get a warning. */
3105 set_float_handler (handler
);
3107 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3112 d
= REAL_VALUE_NEGATE (d
);
3116 if (REAL_VALUE_NEGATIVE (d
))
3117 d
= REAL_VALUE_NEGATE (d
);
3120 case FLOAT_TRUNCATE
:
3121 d
= (double) real_value_truncate (mode
, d
);
3125 /* All this does is change the mode. */
3129 d
= (double) REAL_VALUE_FIX_TRUNCATE (d
);
3133 d
= (double) REAL_VALUE_UNSIGNED_FIX_TRUNCATE (d
);
3143 x
= immed_real_const_1 (d
, mode
);
3144 set_float_handler (NULL_PTR
);
3147 else if (GET_CODE (op
) == CONST_DOUBLE
&& GET_MODE_CLASS (mode
) == MODE_INT
3148 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3155 if (setjmp (handler
))
3158 set_float_handler (handler
);
3160 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3165 val
= REAL_VALUE_FIX (d
);
3169 val
= REAL_VALUE_UNSIGNED_FIX (d
);
3176 set_float_handler (NULL_PTR
);
3178 /* Clear the bits that don't belong in our mode,
3179 unless they and our sign bit are all one.
3180 So we get either a reasonable negative value or a reasonable
3181 unsigned value for this mode. */
3182 if (width
< HOST_BITS_PER_WIDE_INT
3183 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3184 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3185 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3187 return GEN_INT (val
);
3190 /* This was formerly used only for non-IEEE float.
3191 eggert@twinsun.com says it is safe for IEEE also. */
3194 /* There are some simplifications we can do even if the operands
3200 /* (not (not X)) == X, similarly for NEG. */
3201 if (GET_CODE (op
) == code
)
3202 return XEXP (op
, 0);
3206 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3207 becomes just the MINUS if its mode is MODE. This allows
3208 folding switch statements on machines using casesi (such as
3210 if (GET_CODE (op
) == TRUNCATE
3211 && GET_MODE (XEXP (op
, 0)) == mode
3212 && GET_CODE (XEXP (op
, 0)) == MINUS
3213 && GET_CODE (XEXP (XEXP (op
, 0), 0)) == LABEL_REF
3214 && GET_CODE (XEXP (XEXP (op
, 0), 1)) == LABEL_REF
)
3215 return XEXP (op
, 0);
3223 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3224 and OP1. Return 0 if no simplification is possible.
3226 Don't use this for relational operations such as EQ or LT.
3227 Use simplify_relational_operation instead. */
3230 simplify_binary_operation (code
, mode
, op0
, op1
)
3232 enum machine_mode mode
;
3235 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
3237 int width
= GET_MODE_BITSIZE (mode
);
3240 /* Relational operations don't work here. We must know the mode
3241 of the operands in order to do the comparison correctly.
3242 Assuming a full word can give incorrect results.
3243 Consider comparing 128 with -128 in QImode. */
3245 if (GET_RTX_CLASS (code
) == '<')
3248 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3249 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
3250 && GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
3251 && mode
== GET_MODE (op0
) && mode
== GET_MODE (op1
))
3253 REAL_VALUE_TYPE f0
, f1
, value
;
3256 if (setjmp (handler
))
3259 set_float_handler (handler
);
3261 REAL_VALUE_FROM_CONST_DOUBLE (f0
, op0
);
3262 REAL_VALUE_FROM_CONST_DOUBLE (f1
, op1
);
3263 f0
= real_value_truncate (mode
, f0
);
3264 f1
= real_value_truncate (mode
, f1
);
3266 #ifdef REAL_ARITHMETIC
3267 REAL_ARITHMETIC (value
, code
, f0
, f1
);
3281 #ifndef REAL_INFINITY
3288 value
= MIN (f0
, f1
);
3291 value
= MAX (f0
, f1
);
3298 set_float_handler (NULL_PTR
);
3299 value
= real_value_truncate (mode
, value
);
3300 return immed_real_const_1 (value
, mode
);
3302 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3304 /* We can fold some multi-word operations. */
3305 if (GET_MODE_CLASS (mode
) == MODE_INT
3306 && GET_CODE (op0
) == CONST_DOUBLE
3307 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
3309 HOST_WIDE_INT l1
, l2
, h1
, h2
, lv
, hv
;
3311 l1
= CONST_DOUBLE_LOW (op0
), h1
= CONST_DOUBLE_HIGH (op0
);
3313 if (GET_CODE (op1
) == CONST_DOUBLE
)
3314 l2
= CONST_DOUBLE_LOW (op1
), h2
= CONST_DOUBLE_HIGH (op1
);
3316 l2
= INTVAL (op1
), h2
= l2
< 0 ? -1 : 0;
3321 /* A - B == A + (-B). */
3322 neg_double (l2
, h2
, &lv
, &hv
);
3325 /* .. fall through ... */
3328 add_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3332 mul_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3335 case DIV
: case MOD
: case UDIV
: case UMOD
:
3336 /* We'd need to include tree.h to do this and it doesn't seem worth
3341 lv
= l1
& l2
, hv
= h1
& h2
;
3345 lv
= l1
| l2
, hv
= h1
| h2
;
3349 lv
= l1
^ l2
, hv
= h1
^ h2
;
3355 && ((unsigned HOST_WIDE_INT
) l1
3356 < (unsigned HOST_WIDE_INT
) l2
)))
3365 && ((unsigned HOST_WIDE_INT
) l1
3366 > (unsigned HOST_WIDE_INT
) l2
)))
3373 if ((unsigned HOST_WIDE_INT
) h1
< (unsigned HOST_WIDE_INT
) h2
3375 && ((unsigned HOST_WIDE_INT
) l1
3376 < (unsigned HOST_WIDE_INT
) l2
)))
3383 if ((unsigned HOST_WIDE_INT
) h1
> (unsigned HOST_WIDE_INT
) h2
3385 && ((unsigned HOST_WIDE_INT
) l1
3386 > (unsigned HOST_WIDE_INT
) l2
)))
3392 case LSHIFTRT
: case ASHIFTRT
:
3393 case ASHIFT
: case LSHIFT
:
3394 case ROTATE
: case ROTATERT
:
3395 #ifdef SHIFT_COUNT_TRUNCATED
3396 l2
&= (GET_MODE_BITSIZE (mode
) - 1), h2
= 0;
3399 if (h2
!= 0 || l2
< 0 || l2
>= GET_MODE_BITSIZE (mode
))
3402 if (code
== LSHIFTRT
|| code
== ASHIFTRT
)
3403 rshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3405 else if (code
== ASHIFT
|| code
== LSHIFT
)
3406 lshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3408 else if (code
== ROTATE
)
3409 lrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3410 else /* code == ROTATERT */
3411 rrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3418 return immed_double_const (lv
, hv
, mode
);
3421 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3422 || width
> HOST_BITS_PER_WIDE_INT
|| width
== 0)
3424 /* Even if we can't compute a constant result,
3425 there are some cases worth simplifying. */
3430 /* In IEEE floating point, x+0 is not the same as x. Similarly
3431 for the other optimizations below. */
3432 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3433 && GET_MODE_CLASS (mode
) != MODE_INT
)
3436 if (op1
== CONST0_RTX (mode
))
3439 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3440 if (GET_CODE (op0
) == NEG
)
3441 return cse_gen_binary (MINUS
, mode
, op1
, XEXP (op0
, 0));
3442 else if (GET_CODE (op1
) == NEG
)
3443 return cse_gen_binary (MINUS
, mode
, op0
, XEXP (op1
, 0));
3445 /* Handle both-operands-constant cases. We can only add
3446 CONST_INTs to constants since the sum of relocatable symbols
3447 can't be handled by most assemblers. */
3449 if (CONSTANT_P (op0
) && GET_CODE (op1
) == CONST_INT
)
3450 return plus_constant (op0
, INTVAL (op1
));
3451 else if (CONSTANT_P (op1
) && GET_CODE (op0
) == CONST_INT
)
3452 return plus_constant (op1
, INTVAL (op0
));
3454 /* If one of the operands is a PLUS or a MINUS, see if we can
3455 simplify this by the associative law.
3456 Don't use the associative law for floating point.
3457 The inaccuracy makes it nonassociative,
3458 and subtle programs can break if operations are associated. */
3460 if ((GET_MODE_CLASS (mode
) == MODE_INT
3461 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
3462 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3463 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3464 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3470 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3471 using cc0, in which case we want to leave it as a COMPARE
3472 so we can distinguish it from a register-register-copy.
3474 In IEEE floating point, x-0 is not the same as x. */
3476 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3477 || GET_MODE_CLASS (mode
) == MODE_INT
)
3478 && op1
== CONST0_RTX (mode
))
3481 /* Do nothing here. */
3486 /* None of these optimizations can be done for IEEE
3488 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3489 && GET_MODE_CLASS (mode
) != MODE_INT
3490 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
3493 /* We can't assume x-x is 0 even with non-IEEE floating point. */
3494 if (rtx_equal_p (op0
, op1
)
3495 && ! side_effects_p (op0
)
3496 && GET_MODE_CLASS (mode
) != MODE_FLOAT
3497 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
3500 /* Change subtraction from zero into negation. */
3501 if (op0
== CONST0_RTX (mode
))
3502 return gen_rtx (NEG
, mode
, op1
);
3504 /* (-1 - a) is ~a. */
3505 if (op0
== constm1_rtx
)
3506 return gen_rtx (NOT
, mode
, op1
);
3508 /* Subtracting 0 has no effect. */
3509 if (op1
== CONST0_RTX (mode
))
3512 /* (a - (-b)) -> (a + b). */
3513 if (GET_CODE (op1
) == NEG
)
3514 return cse_gen_binary (PLUS
, mode
, op0
, XEXP (op1
, 0));
3516 /* If one of the operands is a PLUS or a MINUS, see if we can
3517 simplify this by the associative law.
3518 Don't use the associative law for floating point.
3519 The inaccuracy makes it nonassociative,
3520 and subtle programs can break if operations are associated. */
3522 if ((GET_MODE_CLASS (mode
) == MODE_INT
3523 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
3524 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3525 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3526 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3529 /* Don't let a relocatable value get a negative coeff. */
3530 if (GET_CODE (op1
) == CONST_INT
)
3531 return plus_constant (op0
, - INTVAL (op1
));
3535 if (op1
== constm1_rtx
)
3537 tem
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3539 return tem
? tem
: gen_rtx (NEG
, mode
, op0
);
3542 /* In IEEE floating point, x*0 is not always 0. */
3543 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3544 || GET_MODE_CLASS (mode
) == MODE_INT
)
3545 && op1
== CONST0_RTX (mode
)
3546 && ! side_effects_p (op0
))
3549 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3550 However, ANSI says we can drop signals,
3551 so we can do this anyway. */
3552 if (op1
== CONST1_RTX (mode
))
3555 /* Convert multiply by constant power of two into shift. */
3556 if (GET_CODE (op1
) == CONST_INT
3557 && (val
= exact_log2 (INTVAL (op1
))) >= 0)
3558 return gen_rtx (ASHIFT
, mode
, op0
, GEN_INT (val
));
3560 if (GET_CODE (op1
) == CONST_DOUBLE
3561 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
)
3564 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3566 /* x*2 is x+x and x*(-1) is -x */
3567 if (REAL_VALUES_EQUAL (d
, dconst2
)
3568 && GET_MODE (op0
) == mode
)
3569 return gen_rtx (PLUS
, mode
, op0
, copy_rtx (op0
));
3571 else if (REAL_VALUES_EQUAL (d
, dconstm1
)
3572 && GET_MODE (op0
) == mode
)
3573 return gen_rtx (NEG
, mode
, op0
);
3578 if (op1
== const0_rtx
)
3580 if (GET_CODE (op1
) == CONST_INT
3581 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3583 if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3585 /* A | (~A) -> -1 */
3586 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3587 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3588 && ! side_effects_p (op0
))
3593 if (op1
== const0_rtx
)
3595 if (GET_CODE (op1
) == CONST_INT
3596 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3597 return gen_rtx (NOT
, mode
, op0
);
3598 if (op0
== op1
&& ! side_effects_p (op0
))
3603 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3605 if (GET_CODE (op1
) == CONST_INT
3606 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3608 if (op0
== op1
&& ! side_effects_p (op0
))
3611 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3612 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3613 && ! side_effects_p (op0
))
3618 /* Convert divide by power of two into shift (divide by 1 handled
3620 if (GET_CODE (op1
) == CONST_INT
3621 && (arg1
= exact_log2 (INTVAL (op1
))) > 0)
3622 return gen_rtx (LSHIFTRT
, mode
, op0
, GEN_INT (arg1
));
3624 /* ... fall through ... */
3627 if (op1
== CONST1_RTX (mode
))
3630 /* In IEEE floating point, 0/x is not always 0. */
3631 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3632 || GET_MODE_CLASS (mode
) == MODE_INT
)
3633 && op0
== CONST0_RTX (mode
)
3634 && ! side_effects_p (op1
))
3637 #if 0 /* Turned off till an expert says this is a safe thing to do. */
3638 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3639 /* Change division by a constant into multiplication. */
3640 else if (GET_CODE (op1
) == CONST_DOUBLE
3641 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
3642 && op1
!= CONST0_RTX (mode
))
3645 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3646 if (REAL_VALUES_EQUAL (d
, dconst0
))
3648 #if defined (REAL_ARITHMETIC)
3649 REAL_ARITHMETIC (d
, RDIV_EXPR
, dconst1
, d
);
3650 return gen_rtx (MULT
, mode
, op0
,
3651 CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
));
3653 return gen_rtx (MULT
, mode
, op0
,
3654 CONST_DOUBLE_FROM_REAL_VALUE (1./d
, mode
));
3662 /* Handle modulus by power of two (mod with 1 handled below). */
3663 if (GET_CODE (op1
) == CONST_INT
3664 && exact_log2 (INTVAL (op1
)) > 0)
3665 return gen_rtx (AND
, mode
, op0
, GEN_INT (INTVAL (op1
) - 1));
3667 /* ... fall through ... */
3670 if ((op0
== const0_rtx
|| op1
== const1_rtx
)
3671 && ! side_effects_p (op0
) && ! side_effects_p (op1
))
3677 /* Rotating ~0 always results in ~0. */
3678 if (GET_CODE (op0
) == CONST_INT
&& width
<= HOST_BITS_PER_WIDE_INT
3679 && INTVAL (op0
) == GET_MODE_MASK (mode
)
3680 && ! side_effects_p (op1
))
3683 /* ... fall through ... */
3689 if (op1
== const0_rtx
)
3691 if (op0
== const0_rtx
&& ! side_effects_p (op1
))
3696 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3697 && INTVAL (op1
) == (HOST_WIDE_INT
) 1 << (width
-1)
3698 && ! side_effects_p (op0
))
3700 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3705 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3706 && INTVAL (op1
) == (unsigned) GET_MODE_MASK (mode
) >> 1
3707 && ! side_effects_p (op0
))
3709 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3714 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3716 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3721 if (op1
== constm1_rtx
&& ! side_effects_p (op0
))
3723 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3734 /* Get the integer argument values in two forms:
3735 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
3737 arg0
= INTVAL (op0
);
3738 arg1
= INTVAL (op1
);
3740 if (width
< HOST_BITS_PER_WIDE_INT
)
3742 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3743 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3746 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
3747 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
3750 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
3751 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
3759 /* Compute the value of the arithmetic. */
3764 val
= arg0s
+ arg1s
;
3768 val
= arg0s
- arg1s
;
3772 val
= arg0s
* arg1s
;
3778 val
= arg0s
/ arg1s
;
3784 val
= arg0s
% arg1s
;
3790 val
= (unsigned HOST_WIDE_INT
) arg0
/ arg1
;
3796 val
= (unsigned HOST_WIDE_INT
) arg0
% arg1
;
3812 /* If shift count is undefined, don't fold it; let the machine do
3813 what it wants. But truncate it if the machine will do that. */
3817 #ifdef SHIFT_COUNT_TRUNCATED
3818 arg1
&= (BITS_PER_WORD
- 1);
3824 val
= ((unsigned HOST_WIDE_INT
) arg0
) >> arg1
;
3832 #ifdef SHIFT_COUNT_TRUNCATED
3833 arg1
&= (BITS_PER_WORD
- 1);
3839 val
= ((unsigned HOST_WIDE_INT
) arg0
) << arg1
;
3846 #ifdef SHIFT_COUNT_TRUNCATED
3847 arg1
&= (BITS_PER_WORD
- 1);
3853 val
= arg0s
>> arg1
;
3855 /* Bootstrap compiler may not have sign extended the right shift.
3856 Manually extend the sign to insure bootstrap cc matches gcc. */
3857 if (arg0s
< 0 && arg1
> 0)
3858 val
|= ((HOST_WIDE_INT
) -1) << (HOST_BITS_PER_WIDE_INT
- arg1
);
3867 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << (width
- arg1
))
3868 | (((unsigned HOST_WIDE_INT
) arg0
) >> arg1
));
3876 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << arg1
)
3877 | (((unsigned HOST_WIDE_INT
) arg0
) >> (width
- arg1
)));
3881 /* Do nothing here. */
3885 val
= arg0s
<= arg1s
? arg0s
: arg1s
;
3889 val
= ((unsigned HOST_WIDE_INT
) arg0
3890 <= (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
3894 val
= arg0s
> arg1s
? arg0s
: arg1s
;
3898 val
= ((unsigned HOST_WIDE_INT
) arg0
3899 > (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
3906 /* Clear the bits that don't belong in our mode, unless they and our sign
3907 bit are all one. So we get either a reasonable negative value or a
3908 reasonable unsigned value for this mode. */
3909 if (width
< HOST_BITS_PER_WIDE_INT
3910 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3911 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3912 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3914 return GEN_INT (val
);
3917 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
3920 Rather than test for specific case, we do this by a brute-force method
3921 and do all possible simplifications until no more changes occur. Then
3922 we rebuild the operation. */
3925 simplify_plus_minus (code
, mode
, op0
, op1
)
3927 enum machine_mode mode
;
3933 int n_ops
= 2, input_ops
= 2;
3935 int first
= 1, negate
= 0, changed
;
3937 bzero (ops
, sizeof ops
);
3939 /* Set up the two operands and then expand them until nothing has been
3940 changed. If we run out of room in our array, give up; this should
3941 almost never happen. */
3943 ops
[0] = op0
, ops
[1] = op1
, negs
[0] = 0, negs
[1] = (code
== MINUS
);
3950 for (i
= 0; i
< n_ops
; i
++)
3951 switch (GET_CODE (ops
[i
]))
3958 ops
[n_ops
] = XEXP (ops
[i
], 1);
3959 negs
[n_ops
++] = GET_CODE (ops
[i
]) == MINUS
? !negs
[i
] : negs
[i
];
3960 ops
[i
] = XEXP (ops
[i
], 0);
3966 ops
[i
] = XEXP (ops
[i
], 0);
3967 negs
[i
] = ! negs
[i
];
3972 ops
[i
] = XEXP (ops
[i
], 0);
3977 /* ~a -> (-a - 1) */
3980 ops
[n_ops
] = constm1_rtx
;
3981 negs
[n_ops
++] = negs
[i
];
3982 ops
[i
] = XEXP (ops
[i
], 0);
3983 negs
[i
] = ! negs
[i
];
3990 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0, changed
= 1;
3995 /* If we only have two operands, we can't do anything. */
3999 /* Now simplify each pair of operands until nothing changes. The first
4000 time through just simplify constants against each other. */
4007 for (i
= 0; i
< n_ops
- 1; i
++)
4008 for (j
= i
+ 1; j
< n_ops
; j
++)
4009 if (ops
[i
] != 0 && ops
[j
] != 0
4010 && (! first
|| (CONSTANT_P (ops
[i
]) && CONSTANT_P (ops
[j
]))))
4012 rtx lhs
= ops
[i
], rhs
= ops
[j
];
4013 enum rtx_code ncode
= PLUS
;
4015 if (negs
[i
] && ! negs
[j
])
4016 lhs
= ops
[j
], rhs
= ops
[i
], ncode
= MINUS
;
4017 else if (! negs
[i
] && negs
[j
])
4020 tem
= simplify_binary_operation (ncode
, mode
, lhs
, rhs
);
4023 ops
[i
] = tem
, ops
[j
] = 0;
4024 negs
[i
] = negs
[i
] && negs
[j
];
4025 if (GET_CODE (tem
) == NEG
)
4026 ops
[i
] = XEXP (tem
, 0), negs
[i
] = ! negs
[i
];
4028 if (GET_CODE (ops
[i
]) == CONST_INT
&& negs
[i
])
4029 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0;
4037 /* Pack all the operands to the lower-numbered entries and give up if
4038 we didn't reduce the number of operands we had. Make sure we
4039 count a CONST as two operands. */
4041 for (i
= 0, j
= 0, k
= 0; j
< n_ops
; j
++)
4044 ops
[i
] = ops
[j
], negs
[i
++] = negs
[j
];
4045 if (GET_CODE (ops
[j
]) == CONST
)
4049 if (i
+ k
>= input_ops
)
4054 /* If we have a CONST_INT, put it last. */
4055 for (i
= 0; i
< n_ops
- 1; i
++)
4056 if (GET_CODE (ops
[i
]) == CONST_INT
)
4058 tem
= ops
[n_ops
- 1], ops
[n_ops
- 1] = ops
[i
] , ops
[i
] = tem
;
4059 j
= negs
[n_ops
- 1], negs
[n_ops
- 1] = negs
[i
], negs
[i
] = j
;
4062 /* Put a non-negated operand first. If there aren't any, make all
4063 operands positive and negate the whole thing later. */
4064 for (i
= 0; i
< n_ops
&& negs
[i
]; i
++)
4069 for (i
= 0; i
< n_ops
; i
++)
4075 tem
= ops
[0], ops
[0] = ops
[i
], ops
[i
] = tem
;
4076 j
= negs
[0], negs
[0] = negs
[i
], negs
[i
] = j
;
4079 /* Now make the result by performing the requested operations. */
4081 for (i
= 1; i
< n_ops
; i
++)
4082 result
= cse_gen_binary (negs
[i
] ? MINUS
: PLUS
, mode
, result
, ops
[i
]);
4084 return negate
? gen_rtx (NEG
, mode
, result
) : result
;
4087 /* Make a binary operation by properly ordering the operands and
4088 seeing if the expression folds. */
4091 cse_gen_binary (code
, mode
, op0
, op1
)
4093 enum machine_mode mode
;
4098 /* Put complex operands first and constants second if commutative. */
4099 if (GET_RTX_CLASS (code
) == 'c'
4100 && ((CONSTANT_P (op0
) && GET_CODE (op1
) != CONST_INT
)
4101 || (GET_RTX_CLASS (GET_CODE (op0
)) == 'o'
4102 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')
4103 || (GET_CODE (op0
) == SUBREG
4104 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0
))) == 'o'
4105 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')))
4106 tem
= op0
, op0
= op1
, op1
= tem
;
4108 /* If this simplifies, do it. */
4109 tem
= simplify_binary_operation (code
, mode
, op0
, op1
);
4114 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4115 just form the operation. */
4117 if (code
== PLUS
&& GET_CODE (op1
) == CONST_INT
4118 && GET_MODE (op0
) != VOIDmode
)
4119 return plus_constant (op0
, INTVAL (op1
));
4120 else if (code
== MINUS
&& GET_CODE (op1
) == CONST_INT
4121 && GET_MODE (op0
) != VOIDmode
)
4122 return plus_constant (op0
, - INTVAL (op1
));
4124 return gen_rtx (code
, mode
, op0
, op1
);
4127 /* Like simplify_binary_operation except used for relational operators.
4128 MODE is the mode of the operands, not that of the result. */
4131 simplify_relational_operation (code
, mode
, op0
, op1
)
4133 enum machine_mode mode
;
4136 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
4138 int width
= GET_MODE_BITSIZE (mode
);
4140 /* If op0 is a compare, extract the comparison arguments from it. */
4141 if (GET_CODE (op0
) == COMPARE
&& op1
== const0_rtx
)
4142 op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4144 /* Unlike the arithmetic operations, we can do the comparison whether
4145 or not WIDTH is larger than HOST_BITS_PER_WIDE_INT because the
4146 CONST_INTs are to be understood as being infinite precision as
4147 is the comparison. So there is no question of overflow. */
4149 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
|| width
== 0)
4151 /* Even if we can't compute a constant result,
4152 there are some cases worth simplifying. */
4154 /* For non-IEEE floating-point, if the two operands are equal, we know
4156 if (rtx_equal_p (op0
, op1
)
4157 && (TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4158 || GET_MODE_CLASS (GET_MODE (op0
)) != MODE_FLOAT
))
4159 return (code
== EQ
|| code
== GE
|| code
== LE
|| code
== LEU
4160 || code
== GEU
) ? const_true_rtx
: const0_rtx
;
4162 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4163 else if (GET_CODE (op0
) == CONST_DOUBLE
4164 && GET_CODE (op1
) == CONST_DOUBLE
4165 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
4167 REAL_VALUE_TYPE d0
, d1
;
4169 int op0lt
, op1lt
, equal
;
4171 if (setjmp (handler
))
4174 set_float_handler (handler
);
4175 REAL_VALUE_FROM_CONST_DOUBLE (d0
, op0
);
4176 REAL_VALUE_FROM_CONST_DOUBLE (d1
, op1
);
4177 equal
= REAL_VALUES_EQUAL (d0
, d1
);
4178 op0lt
= REAL_VALUES_LESS (d0
, d1
);
4179 op1lt
= REAL_VALUES_LESS (d1
, d0
);
4180 set_float_handler (NULL_PTR
);
4185 return equal
? const_true_rtx
: const0_rtx
;
4187 return !equal
? const_true_rtx
: const0_rtx
;
4189 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4191 return op0lt
? const_true_rtx
: const0_rtx
;
4193 return equal
|| op1lt
? const_true_rtx
: const0_rtx
;
4195 return op1lt
? const_true_rtx
: const0_rtx
;
4198 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4200 else if (GET_MODE_CLASS (mode
) == MODE_INT
4201 && width
> HOST_BITS_PER_WIDE_INT
4202 && (GET_CODE (op0
) == CONST_DOUBLE
4203 || GET_CODE (op0
) == CONST_INT
)
4204 && (GET_CODE (op1
) == CONST_DOUBLE
4205 || GET_CODE (op1
) == CONST_INT
))
4207 HOST_WIDE_INT h0
, l0
, h1
, l1
;
4208 unsigned HOST_WIDE_INT uh0
, ul0
, uh1
, ul1
;
4209 int op0lt
, op0ltu
, equal
;
4211 if (GET_CODE (op0
) == CONST_DOUBLE
)
4212 l0
= CONST_DOUBLE_LOW (op0
), h0
= CONST_DOUBLE_HIGH (op0
);
4214 l0
= INTVAL (op0
), h0
= l0
< 0 ? -1 : 0;
4216 if (GET_CODE (op1
) == CONST_DOUBLE
)
4217 l1
= CONST_DOUBLE_LOW (op1
), h1
= CONST_DOUBLE_HIGH (op1
);
4219 l1
= INTVAL (op1
), h1
= l1
< 0 ? -1 : 0;
4221 uh0
= h0
, ul0
= l0
, uh1
= h1
, ul1
= l1
;
4223 equal
= (h0
== h1
&& l0
== l1
);
4224 op0lt
= (h0
< h1
|| (h0
== h1
&& l0
< l1
));
4225 op0ltu
= (uh0
< uh1
|| (uh0
== uh1
&& ul0
< ul1
));
4230 return equal
? const_true_rtx
: const0_rtx
;
4232 return !equal
? const_true_rtx
: const0_rtx
;
4234 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4236 return op0lt
? const_true_rtx
: const0_rtx
;
4238 return !op0lt
? const_true_rtx
: const0_rtx
;
4240 return !equal
&& !op0lt
? const_true_rtx
: const0_rtx
;
4242 return equal
|| op0ltu
? const_true_rtx
: const0_rtx
;
4244 return op0ltu
? const_true_rtx
: const0_rtx
;
4246 return !op0ltu
? const_true_rtx
: const0_rtx
;
4248 return !equal
&& !op0ltu
? const_true_rtx
: const0_rtx
;
4257 /* We can't make this assumption due to #pragma weak */
4258 if (CONSTANT_P (op0
) && op1
== const0_rtx
)
4261 if (NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
4262 /* On some machines, the ap reg can be 0 sometimes. */
4263 && op0
!= arg_pointer_rtx
)
4270 /* We can't make this assumption due to #pragma weak */
4271 if (CONSTANT_P (op0
) && op1
== const0_rtx
)
4272 return const_true_rtx
;
4274 if (NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
4275 /* On some machines, the ap reg can be 0 sometimes. */
4276 && op0
!= arg_pointer_rtx
)
4277 return const_true_rtx
;
4281 /* Unsigned values are never negative, but we must be sure we are
4282 actually comparing a value, not a CC operand. */
4283 if (op1
== const0_rtx
4284 && GET_MODE_CLASS (mode
) == MODE_INT
)
4285 return const_true_rtx
;
4289 if (op1
== const0_rtx
4290 && GET_MODE_CLASS (mode
) == MODE_INT
)
4295 /* Unsigned values are never greater than the largest
4297 if (GET_CODE (op1
) == CONST_INT
4298 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4299 && GET_MODE_CLASS (mode
) == MODE_INT
)
4300 return const_true_rtx
;
4304 if (GET_CODE (op1
) == CONST_INT
4305 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4306 && GET_MODE_CLASS (mode
) == MODE_INT
)
4314 /* Get the integer argument values in two forms:
4315 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4317 arg0
= INTVAL (op0
);
4318 arg1
= INTVAL (op1
);
4320 if (width
< HOST_BITS_PER_WIDE_INT
)
4322 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4323 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4326 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4327 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4330 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4331 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4339 /* Compute the value of the arithmetic. */
4344 val
= arg0
!= arg1
? STORE_FLAG_VALUE
: 0;
4348 val
= arg0
== arg1
? STORE_FLAG_VALUE
: 0;
4352 val
= arg0s
<= arg1s
? STORE_FLAG_VALUE
: 0;
4356 val
= arg0s
< arg1s
? STORE_FLAG_VALUE
: 0;
4360 val
= arg0s
>= arg1s
? STORE_FLAG_VALUE
: 0;
4364 val
= arg0s
> arg1s
? STORE_FLAG_VALUE
: 0;
4368 val
= (((unsigned HOST_WIDE_INT
) arg0
)
4369 <= ((unsigned HOST_WIDE_INT
) arg1
) ? STORE_FLAG_VALUE
: 0);
4373 val
= (((unsigned HOST_WIDE_INT
) arg0
)
4374 < ((unsigned HOST_WIDE_INT
) arg1
) ? STORE_FLAG_VALUE
: 0);
4378 val
= (((unsigned HOST_WIDE_INT
) arg0
)
4379 >= ((unsigned HOST_WIDE_INT
) arg1
) ? STORE_FLAG_VALUE
: 0);
4383 val
= (((unsigned HOST_WIDE_INT
) arg0
)
4384 > ((unsigned HOST_WIDE_INT
) arg1
) ? STORE_FLAG_VALUE
: 0);
4391 /* Clear the bits that don't belong in our mode, unless they and our sign
4392 bit are all one. So we get either a reasonable negative value or a
4393 reasonable unsigned value for this mode. */
4394 if (width
< HOST_BITS_PER_WIDE_INT
4395 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4396 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4397 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4399 return GEN_INT (val
);
4402 /* Simplify CODE, an operation with result mode MODE and three operands,
4403 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4404 a constant. Return 0 if no simplifications is possible. */
4407 simplify_ternary_operation (code
, mode
, op0_mode
, op0
, op1
, op2
)
4409 enum machine_mode mode
, op0_mode
;
4412 int width
= GET_MODE_BITSIZE (mode
);
4414 /* VOIDmode means "infinite" precision. */
4416 width
= HOST_BITS_PER_WIDE_INT
;
4422 if (GET_CODE (op0
) == CONST_INT
4423 && GET_CODE (op1
) == CONST_INT
4424 && GET_CODE (op2
) == CONST_INT
4425 && INTVAL (op1
) + INTVAL (op2
) <= GET_MODE_BITSIZE (op0_mode
)
4426 && width
<= HOST_BITS_PER_WIDE_INT
)
4428 /* Extracting a bit-field from a constant */
4429 HOST_WIDE_INT val
= INTVAL (op0
);
4432 val
>>= (GET_MODE_BITSIZE (op0_mode
) - INTVAL (op2
) - INTVAL (op1
));
4434 val
>>= INTVAL (op2
);
4436 if (HOST_BITS_PER_WIDE_INT
!= INTVAL (op1
))
4438 /* First zero-extend. */
4439 val
&= ((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1;
4440 /* If desired, propagate sign bit. */
4441 if (code
== SIGN_EXTRACT
4442 && (val
& ((HOST_WIDE_INT
) 1 << (INTVAL (op1
) - 1))))
4443 val
|= ~ (((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1);
4446 /* Clear the bits that don't belong in our mode,
4447 unless they and our sign bit are all one.
4448 So we get either a reasonable negative value or a reasonable
4449 unsigned value for this mode. */
4450 if (width
< HOST_BITS_PER_WIDE_INT
4451 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4452 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4453 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4455 return GEN_INT (val
);
4460 if (GET_CODE (op0
) == CONST_INT
)
4461 return op0
!= const0_rtx
? op1
: op2
;
4471 /* If X is a nontrivial arithmetic operation on an argument
4472 for which a constant value can be determined, return
4473 the result of operating on that value, as a constant.
4474 Otherwise, return X, possibly with one or more operands
4475 modified by recursive calls to this function.
4477 If X is a register whose contents are known, we may or may not
4478 return those contents. An instruction that uses a register is usually
4479 faster than one that uses a constant. But on machines with few hard
4480 regs, using a register instead of a constant increases register life,
4481 hurting register allocation.
4483 INSN is the insn that we may be modifying. If it is 0, make a copy
4484 of X before modifying it. */
4491 register enum rtx_code code
;
4492 register enum machine_mode mode
;
4499 /* Folded equivalents of first two operands of X. */
4503 /* Constant equivalents of first three operands of X;
4504 0 when no such equivalent is known. */
4509 /* The mode of the first operand of X. We need this for sign and zero
4511 enum machine_mode mode_arg0
;
4516 mode
= GET_MODE (x
);
4517 code
= GET_CODE (x
);
4526 /* No use simplifying an EXPR_LIST
4527 since they are used only for lists of args
4528 in a function call's REG_EQUAL note. */
4534 return prev_insn_cc0
;
4538 /* If the next insn is a CODE_LABEL followed by a jump table,
4539 PC's value is a LABEL_REF pointing to that label. That
4540 lets us fold switch statements on the Vax. */
4541 if (insn
&& GET_CODE (insn
) == JUMP_INSN
)
4543 rtx next
= next_nonnote_insn (insn
);
4545 if (next
&& GET_CODE (next
) == CODE_LABEL
4546 && NEXT_INSN (next
) != 0
4547 && GET_CODE (NEXT_INSN (next
)) == JUMP_INSN
4548 && (GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_VEC
4549 || GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_DIFF_VEC
))
4550 return gen_rtx (LABEL_REF
, Pmode
, next
);
4555 /* See if we previously assigned a constant value to this SUBREG. */
4556 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
4557 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
4560 /* If this is a paradoxical SUBREG, we have no idea what value the
4561 extra bits would have. However, if the operand is equivalent
4562 to a SUBREG whose operand is the same as our mode, and all the
4563 modes are within a word, we can just use the inner operand
4564 because these SUBREGs just say how to treat the register. */
4566 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4568 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
4569 struct table_elt
*elt
;
4571 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
4572 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
4573 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
4576 for (elt
= elt
->first_same_value
;
4577 elt
; elt
= elt
->next_same_value
)
4578 if (GET_CODE (elt
->exp
) == SUBREG
4579 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4580 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4581 return copy_rtx (SUBREG_REG (elt
->exp
));
4587 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4588 We might be able to if the SUBREG is extracting a single word in an
4589 integral mode or extracting the low part. */
4591 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
4592 const_arg0
= equiv_constant (folded_arg0
);
4594 folded_arg0
= const_arg0
;
4596 if (folded_arg0
!= SUBREG_REG (x
))
4600 if (GET_MODE_CLASS (mode
) == MODE_INT
4601 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4602 && GET_MODE (SUBREG_REG (x
)) != VOIDmode
)
4603 new = operand_subword (folded_arg0
, SUBREG_WORD (x
), 0,
4604 GET_MODE (SUBREG_REG (x
)));
4605 if (new == 0 && subreg_lowpart_p (x
))
4606 new = gen_lowpart_if_possible (mode
, folded_arg0
);
4611 /* If this is a narrowing SUBREG and our operand is a REG, see if
4612 we can find an equivalence for REG that is an arithmetic operation
4613 in a wider mode where both operands are paradoxical SUBREGs
4614 from objects of our result mode. In that case, we couldn't report
4615 an equivalent value for that operation, since we don't know what the
4616 extra bits will be. But we can find an equivalence for this SUBREG
4617 by folding that operation is the narrow mode. This allows us to
4618 fold arithmetic in narrow modes when the machine only supports
4619 word-sized arithmetic.
4621 Also look for a case where we have a SUBREG whose operand is the
4622 same as our result. If both modes are smaller than a word, we
4623 are simply interpreting a register in different modes and we
4624 can use the inner value. */
4626 if (GET_CODE (folded_arg0
) == REG
4627 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
))
4628 && subreg_lowpart_p (x
))
4630 struct table_elt
*elt
;
4632 /* We can use HASH here since we know that canon_hash won't be
4634 elt
= lookup (folded_arg0
,
4635 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
4636 GET_MODE (folded_arg0
));
4639 elt
= elt
->first_same_value
;
4641 for (; elt
; elt
= elt
->next_same_value
)
4643 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
4645 /* Just check for unary and binary operations. */
4646 if (GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '1'
4647 && GET_CODE (elt
->exp
) != SIGN_EXTEND
4648 && GET_CODE (elt
->exp
) != ZERO_EXTEND
4649 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4650 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
)
4652 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
4654 if (GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4655 op0
= fold_rtx (op0
, NULL_RTX
);
4657 op0
= equiv_constant (op0
);
4659 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
4662 else if ((GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '2'
4663 || GET_RTX_CLASS (GET_CODE (elt
->exp
)) == 'c')
4664 && eltcode
!= DIV
&& eltcode
!= MOD
4665 && eltcode
!= UDIV
&& eltcode
!= UMOD
4666 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
4667 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
4668 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4669 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
4671 || CONSTANT_P (XEXP (elt
->exp
, 0)))
4672 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
4673 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
4675 || CONSTANT_P (XEXP (elt
->exp
, 1))))
4677 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
4678 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
4680 if (op0
&& GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4681 op0
= fold_rtx (op0
, NULL_RTX
);
4684 op0
= equiv_constant (op0
);
4686 if (op1
&& GET_CODE (op1
) != REG
&& ! CONSTANT_P (op1
))
4687 op1
= fold_rtx (op1
, NULL_RTX
);
4690 op1
= equiv_constant (op1
);
4693 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
,
4697 else if (GET_CODE (elt
->exp
) == SUBREG
4698 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4699 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
4701 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4702 new = copy_rtx (SUBREG_REG (elt
->exp
));
4713 /* If we have (NOT Y), see if Y is known to be (NOT Z).
4714 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
4715 new = lookup_as_function (XEXP (x
, 0), code
);
4717 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
4721 /* If we are not actually processing an insn, don't try to find the
4722 best address. Not only don't we care, but we could modify the
4723 MEM in an invalid way since we have no insn to validate against. */
4725 find_best_addr (insn
, &XEXP (x
, 0));
4728 /* Even if we don't fold in the insn itself,
4729 we can safely do so here, in hopes of getting a constant. */
4730 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
4732 HOST_WIDE_INT offset
= 0;
4734 if (GET_CODE (addr
) == REG
4735 && REGNO_QTY_VALID_P (REGNO (addr
))
4736 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
4737 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
4738 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
4740 /* If address is constant, split it into a base and integer offset. */
4741 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
4743 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
4744 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
4746 base
= XEXP (XEXP (addr
, 0), 0);
4747 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
4749 else if (GET_CODE (addr
) == LO_SUM
4750 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
4751 base
= XEXP (addr
, 1);
4753 /* If this is a constant pool reference, we can fold it into its
4754 constant to allow better value tracking. */
4755 if (base
&& GET_CODE (base
) == SYMBOL_REF
4756 && CONSTANT_POOL_ADDRESS_P (base
))
4758 rtx constant
= get_pool_constant (base
);
4759 enum machine_mode const_mode
= get_pool_mode (base
);
4762 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
4763 constant_pool_entries_cost
= COST (constant
);
4765 /* If we are loading the full constant, we have an equivalence. */
4766 if (offset
== 0 && mode
== const_mode
)
4769 /* If this actually isn't a constant (wierd!), we can't do
4770 anything. Otherwise, handle the two most common cases:
4771 extracting a word from a multi-word constant, and extracting
4772 the low-order bits. Other cases don't seem common enough to
4774 if (! CONSTANT_P (constant
))
4777 if (GET_MODE_CLASS (mode
) == MODE_INT
4778 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4779 && offset
% UNITS_PER_WORD
== 0
4780 && (new = operand_subword (constant
,
4781 offset
/ UNITS_PER_WORD
,
4782 0, const_mode
)) != 0)
4785 if (((BYTES_BIG_ENDIAN
4786 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
4787 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
4788 && (new = gen_lowpart_if_possible (mode
, constant
)) != 0)
4792 /* If this is a reference to a label at a known position in a jump
4793 table, we also know its value. */
4794 if (base
&& GET_CODE (base
) == LABEL_REF
)
4796 rtx label
= XEXP (base
, 0);
4797 rtx table_insn
= NEXT_INSN (label
);
4799 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
4800 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
4802 rtx table
= PATTERN (table_insn
);
4805 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
4806 < XVECLEN (table
, 0)))
4807 return XVECEXP (table
, 0,
4808 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
4810 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
4811 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
4813 rtx table
= PATTERN (table_insn
);
4816 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
4817 < XVECLEN (table
, 1)))
4819 offset
/= GET_MODE_SIZE (GET_MODE (table
));
4820 new = gen_rtx (MINUS
, Pmode
, XVECEXP (table
, 1, offset
),
4823 if (GET_MODE (table
) != Pmode
)
4824 new = gen_rtx (TRUNCATE
, GET_MODE (table
), new);
4838 mode_arg0
= VOIDmode
;
4840 /* Try folding our operands.
4841 Then see which ones have constant values known. */
4843 fmt
= GET_RTX_FORMAT (code
);
4844 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4847 rtx arg
= XEXP (x
, i
);
4848 rtx folded_arg
= arg
, const_arg
= 0;
4849 enum machine_mode mode_arg
= GET_MODE (arg
);
4850 rtx cheap_arg
, expensive_arg
;
4851 rtx replacements
[2];
4854 /* Most arguments are cheap, so handle them specially. */
4855 switch (GET_CODE (arg
))
4858 /* This is the same as calling equiv_constant; it is duplicated
4860 if (REGNO_QTY_VALID_P (REGNO (arg
))
4861 && qty_const
[reg_qty
[REGNO (arg
)]] != 0
4862 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != REG
4863 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != PLUS
)
4865 = gen_lowpart_if_possible (GET_MODE (arg
),
4866 qty_const
[reg_qty
[REGNO (arg
)]]);
4879 folded_arg
= prev_insn_cc0
;
4880 mode_arg
= prev_insn_cc0_mode
;
4881 const_arg
= equiv_constant (folded_arg
);
4886 folded_arg
= fold_rtx (arg
, insn
);
4887 const_arg
= equiv_constant (folded_arg
);
4890 /* For the first three operands, see if the operand
4891 is constant or equivalent to a constant. */
4895 folded_arg0
= folded_arg
;
4896 const_arg0
= const_arg
;
4897 mode_arg0
= mode_arg
;
4900 folded_arg1
= folded_arg
;
4901 const_arg1
= const_arg
;
4904 const_arg2
= const_arg
;
4908 /* Pick the least expensive of the folded argument and an
4909 equivalent constant argument. */
4910 if (const_arg
== 0 || const_arg
== folded_arg
4911 || COST (const_arg
) > COST (folded_arg
))
4912 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
4914 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
4916 /* Try to replace the operand with the cheapest of the two
4917 possibilities. If it doesn't work and this is either of the first
4918 two operands of a commutative operation, try swapping them.
4919 If THAT fails, try the more expensive, provided it is cheaper
4920 than what is already there. */
4922 if (cheap_arg
== XEXP (x
, i
))
4925 if (insn
== 0 && ! copied
)
4931 replacements
[0] = cheap_arg
, replacements
[1] = expensive_arg
;
4933 j
< 2 && replacements
[j
]
4934 && COST (replacements
[j
]) < COST (XEXP (x
, i
));
4937 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
4940 if (code
== NE
|| code
== EQ
|| GET_RTX_CLASS (code
) == 'c')
4942 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
4943 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
4945 if (apply_change_group ())
4947 /* Swap them back to be invalid so that this loop can
4948 continue and flag them to be swapped back later. */
4951 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
4960 else if (fmt
[i
] == 'E')
4961 /* Don't try to fold inside of a vector of expressions.
4962 Doing nothing is harmless. */
4965 /* If a commutative operation, place a constant integer as the second
4966 operand unless the first operand is also a constant integer. Otherwise,
4967 place any constant second unless the first operand is also a constant. */
4969 if (code
== EQ
|| code
== NE
|| GET_RTX_CLASS (code
) == 'c')
4971 if (must_swap
|| (const_arg0
4973 || (GET_CODE (const_arg0
) == CONST_INT
4974 && GET_CODE (const_arg1
) != CONST_INT
))))
4976 register rtx tem
= XEXP (x
, 0);
4978 if (insn
== 0 && ! copied
)
4984 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
4985 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
4986 if (apply_change_group ())
4988 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
4989 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
4994 /* If X is an arithmetic operation, see if we can simplify it. */
4996 switch (GET_RTX_CLASS (code
))
4999 /* We can't simplify extension ops unless we know the original mode. */
5000 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
5001 && mode_arg0
== VOIDmode
)
5003 new = simplify_unary_operation (code
, mode
,
5004 const_arg0
? const_arg0
: folded_arg0
,
5009 /* See what items are actually being compared and set FOLDED_ARG[01]
5010 to those values and CODE to the actual comparison code. If any are
5011 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5012 do anything if both operands are already known to be constant. */
5014 if (const_arg0
== 0 || const_arg1
== 0)
5016 struct table_elt
*p0
, *p1
;
5017 rtx
true = const_true_rtx
, false = const0_rtx
;
5018 enum machine_mode mode_arg1
;
5020 #ifdef FLOAT_STORE_FLAG_VALUE
5021 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5023 true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
);
5024 false = CONST0_RTX (mode
);
5028 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
5029 &mode_arg0
, &mode_arg1
);
5030 const_arg0
= equiv_constant (folded_arg0
);
5031 const_arg1
= equiv_constant (folded_arg1
);
5033 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5034 what kinds of things are being compared, so we can't do
5035 anything with this comparison. */
5037 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
5040 /* If we do not now have two constants being compared, see if we
5041 can nevertheless deduce some things about the comparison. */
5042 if (const_arg0
== 0 || const_arg1
== 0)
5044 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit
5045 constant? These aren't zero, but we don't know their sign. */
5046 if (const_arg1
== const0_rtx
5047 && (NONZERO_BASE_PLUS_P (folded_arg0
)
5048 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5050 || GET_CODE (folded_arg0
) == SYMBOL_REF
5052 || GET_CODE (folded_arg0
) == LABEL_REF
5053 || GET_CODE (folded_arg0
) == CONST
))
5057 else if (code
== NE
)
5061 /* See if the two operands are the same. We don't do this
5062 for IEEE floating-point since we can't assume x == x
5063 since x might be a NaN. */
5065 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
5066 || GET_MODE_CLASS (mode_arg0
) != MODE_FLOAT
)
5067 && (folded_arg0
== folded_arg1
5068 || (GET_CODE (folded_arg0
) == REG
5069 && GET_CODE (folded_arg1
) == REG
5070 && (reg_qty
[REGNO (folded_arg0
)]
5071 == reg_qty
[REGNO (folded_arg1
)]))
5072 || ((p0
= lookup (folded_arg0
,
5073 (safe_hash (folded_arg0
, mode_arg0
)
5074 % NBUCKETS
), mode_arg0
))
5075 && (p1
= lookup (folded_arg1
,
5076 (safe_hash (folded_arg1
, mode_arg0
)
5077 % NBUCKETS
), mode_arg0
))
5078 && p0
->first_same_value
== p1
->first_same_value
)))
5079 return ((code
== EQ
|| code
== LE
|| code
== GE
5080 || code
== LEU
|| code
== GEU
)
5083 /* If FOLDED_ARG0 is a register, see if the comparison we are
5084 doing now is either the same as we did before or the reverse
5085 (we only check the reverse if not floating-point). */
5086 else if (GET_CODE (folded_arg0
) == REG
)
5088 int qty
= reg_qty
[REGNO (folded_arg0
)];
5090 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
))
5091 && (comparison_dominates_p (qty_comparison_code
[qty
], code
)
5092 || (comparison_dominates_p (qty_comparison_code
[qty
],
5093 reverse_condition (code
))
5094 && GET_MODE_CLASS (mode_arg0
) == MODE_INT
))
5095 && (rtx_equal_p (qty_comparison_const
[qty
], folded_arg1
)
5097 && rtx_equal_p (qty_comparison_const
[qty
],
5099 || (GET_CODE (folded_arg1
) == REG
5100 && (reg_qty
[REGNO (folded_arg1
)]
5101 == qty_comparison_qty
[qty
]))))
5102 return (comparison_dominates_p (qty_comparison_code
[qty
],
5109 /* If we are comparing against zero, see if the first operand is
5110 equivalent to an IOR with a constant. If so, we may be able to
5111 determine the result of this comparison. */
5113 if (const_arg1
== const0_rtx
)
5115 rtx y
= lookup_as_function (folded_arg0
, IOR
);
5119 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
5120 && GET_CODE (inner_const
) == CONST_INT
5121 && INTVAL (inner_const
) != 0)
5123 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
5124 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
5125 && (INTVAL (inner_const
)
5126 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
5127 rtx
true = const_true_rtx
, false = const0_rtx
;
5129 #ifdef FLOAT_STORE_FLAG_VALUE
5130 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5132 true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
);
5133 false = CONST0_RTX (mode
);
5155 new = simplify_relational_operation (code
, mode_arg0
,
5156 const_arg0
? const_arg0
: folded_arg0
,
5157 const_arg1
? const_arg1
: folded_arg1
);
5158 #ifdef FLOAT_STORE_FLAG_VALUE
5159 if (new != 0 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5160 new = ((new == const0_rtx
) ? CONST0_RTX (mode
)
5161 : immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
));
5170 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5171 with that LABEL_REF as its second operand. If so, the result is
5172 the first operand of that MINUS. This handles switches with an
5173 ADDR_DIFF_VEC table. */
5174 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
5176 rtx y
= lookup_as_function (folded_arg0
, MINUS
);
5178 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5179 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
5185 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5186 If so, produce (PLUS Z C2-C). */
5187 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
5189 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
5190 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
5191 return fold_rtx (plus_constant (y
, -INTVAL (const_arg1
)),
5195 /* ... fall through ... */
5198 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
5199 case IOR
: case AND
: case XOR
:
5200 case MULT
: case DIV
: case UDIV
:
5201 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
5202 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5203 is known to be of similar form, we may be able to replace the
5204 operation with a combined operation. This may eliminate the
5205 intermediate operation if every use is simplified in this way.
5206 Note that the similar optimization done by combine.c only works
5207 if the intermediate operation's result has only one reference. */
5209 if (GET_CODE (folded_arg0
) == REG
5210 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
5213 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
5214 rtx y
= lookup_as_function (folded_arg0
, code
);
5216 enum rtx_code associate_code
;
5220 || 0 == (inner_const
5221 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
5222 || GET_CODE (inner_const
) != CONST_INT
5223 /* If we have compiled a statement like
5224 "if (x == (x & mask1))", and now are looking at
5225 "x & mask2", we will have a case where the first operand
5226 of Y is the same as our first operand. Unless we detect
5227 this case, an infinite loop will result. */
5228 || XEXP (y
, 0) == folded_arg0
)
5231 /* Don't associate these operations if they are a PLUS with the
5232 same constant and it is a power of two. These might be doable
5233 with a pre- or post-increment. Similarly for two subtracts of
5234 identical powers of two with post decrement. */
5236 if (code
== PLUS
&& INTVAL (const_arg1
) == INTVAL (inner_const
)
5238 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5239 || exact_log2 (INTVAL (const_arg1
)) >= 0
5241 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5242 || exact_log2 (- INTVAL (const_arg1
)) >= 0
5247 /* Compute the code used to compose the constants. For example,
5248 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5251 = (code
== MULT
|| code
== DIV
|| code
== UDIV
? MULT
5252 : is_shift
|| code
== PLUS
|| code
== MINUS
? PLUS
: code
);
5254 new_const
= simplify_binary_operation (associate_code
, mode
,
5255 const_arg1
, inner_const
);
5260 /* If we are associating shift operations, don't let this
5261 produce a shift of larger than the object. This could
5262 occur when we following a sign-extend by a right shift on
5263 a machine that does a sign-extend as a pair of shifts. */
5265 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
5266 && INTVAL (new_const
) > GET_MODE_BITSIZE (mode
))
5269 y
= copy_rtx (XEXP (y
, 0));
5271 /* If Y contains our first operand (the most common way this
5272 can happen is if Y is a MEM), we would do into an infinite
5273 loop if we tried to fold it. So don't in that case. */
5275 if (! reg_mentioned_p (folded_arg0
, y
))
5276 y
= fold_rtx (y
, insn
);
5278 return cse_gen_binary (code
, mode
, y
, new_const
);
5282 new = simplify_binary_operation (code
, mode
,
5283 const_arg0
? const_arg0
: folded_arg0
,
5284 const_arg1
? const_arg1
: folded_arg1
);
5288 /* (lo_sum (high X) X) is simply X. */
5289 if (code
== LO_SUM
&& const_arg0
!= 0
5290 && GET_CODE (const_arg0
) == HIGH
5291 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
5297 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
5298 const_arg0
? const_arg0
: folded_arg0
,
5299 const_arg1
? const_arg1
: folded_arg1
,
5300 const_arg2
? const_arg2
: XEXP (x
, 2));
5304 return new ? new : x
;
5307 /* Return a constant value currently equivalent to X.
5308 Return 0 if we don't know one. */
5314 if (GET_CODE (x
) == REG
5315 && REGNO_QTY_VALID_P (REGNO (x
))
5316 && qty_const
[reg_qty
[REGNO (x
)]])
5317 x
= gen_lowpart_if_possible (GET_MODE (x
), qty_const
[reg_qty
[REGNO (x
)]]);
5319 if (x
!= 0 && CONSTANT_P (x
))
5322 /* If X is a MEM, try to fold it outside the context of any insn to see if
5323 it might be equivalent to a constant. That handles the case where it
5324 is a constant-pool reference. Then try to look it up in the hash table
5325 in case it is something whose value we have seen before. */
5327 if (GET_CODE (x
) == MEM
)
5329 struct table_elt
*elt
;
5331 x
= fold_rtx (x
, NULL_RTX
);
5335 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) % NBUCKETS
, GET_MODE (x
));
5339 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
5340 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
5347 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5348 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5349 least-significant part of X.
5350 MODE specifies how big a part of X to return.
5352 If the requested operation cannot be done, 0 is returned.
5354 This is similar to gen_lowpart in emit-rtl.c. */
5357 gen_lowpart_if_possible (mode
, x
)
5358 enum machine_mode mode
;
5361 rtx result
= gen_lowpart_common (mode
, x
);
5365 else if (GET_CODE (x
) == MEM
)
5367 /* This is the only other case we handle. */
5368 register int offset
= 0;
5371 #if WORDS_BIG_ENDIAN
5372 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
5373 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
5375 #if BYTES_BIG_ENDIAN
5376 /* Adjust the address so that the address-after-the-data
5378 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
5379 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
5381 new = gen_rtx (MEM
, mode
, plus_constant (XEXP (x
, 0), offset
));
5382 if (! memory_address_p (mode
, XEXP (new, 0)))
5384 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x
);
5385 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x
);
5386 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x
);
5393 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5394 branch. It will be zero if not.
5396 In certain cases, this can cause us to add an equivalence. For example,
5397 if we are following the taken case of
5399 we can add the fact that `i' and '2' are now equivalent.
5401 In any case, we can record that this comparison was passed. If the same
5402 comparison is seen later, we will know its value. */
5405 record_jump_equiv (insn
, taken
)
5409 int cond_known_true
;
5411 enum machine_mode mode
, mode0
, mode1
;
5412 int reversed_nonequality
= 0;
5415 /* Ensure this is the right kind of insn. */
5416 if (! condjump_p (insn
) || simplejump_p (insn
))
5419 /* See if this jump condition is known true or false. */
5421 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 2) == pc_rtx
);
5423 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 1) == pc_rtx
);
5425 /* Get the type of comparison being done and the operands being compared.
5426 If we had to reverse a non-equality condition, record that fact so we
5427 know that it isn't valid for floating-point. */
5428 code
= GET_CODE (XEXP (SET_SRC (PATTERN (insn
)), 0));
5429 op0
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 0), insn
);
5430 op1
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 1), insn
);
5432 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
5433 if (! cond_known_true
)
5435 reversed_nonequality
= (code
!= EQ
&& code
!= NE
);
5436 code
= reverse_condition (code
);
5439 /* The mode is the mode of the non-constant. */
5441 if (mode1
!= VOIDmode
)
5444 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
5447 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5448 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5449 Make any useful entries we can with that information. Called from
5450 above function and called recursively. */
5453 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
)
5455 enum machine_mode mode
;
5457 int reversed_nonequality
;
5459 int op0_hash_code
, op1_hash_code
;
5460 int op0_in_memory
, op0_in_struct
, op1_in_memory
, op1_in_struct
;
5461 struct table_elt
*op0_elt
, *op1_elt
;
5463 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5464 we know that they are also equal in the smaller mode (this is also
5465 true for all smaller modes whether or not there is a SUBREG, but
5466 is not worth testing for with no SUBREG. */
5468 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
5469 && GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
))))
5471 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5472 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5474 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5475 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5476 reversed_nonequality
);
5479 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
5480 && GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
))))
5482 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5483 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5485 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5486 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5487 reversed_nonequality
);
5490 /* Similarly, if this is an NE comparison, and either is a SUBREG
5491 making a smaller mode, we know the whole thing is also NE. */
5493 if (code
== NE
&& GET_CODE (op0
) == SUBREG
5494 && subreg_lowpart_p (op0
)
5495 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
))))
5497 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5498 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5500 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5501 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5502 reversed_nonequality
);
5505 if (code
== NE
&& GET_CODE (op1
) == SUBREG
5506 && subreg_lowpart_p (op1
)
5507 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
))))
5509 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5510 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5512 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5513 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5514 reversed_nonequality
);
5517 /* Hash both operands. */
5520 hash_arg_in_memory
= 0;
5521 hash_arg_in_struct
= 0;
5522 op0_hash_code
= HASH (op0
, mode
);
5523 op0_in_memory
= hash_arg_in_memory
;
5524 op0_in_struct
= hash_arg_in_struct
;
5530 hash_arg_in_memory
= 0;
5531 hash_arg_in_struct
= 0;
5532 op1_hash_code
= HASH (op1
, mode
);
5533 op1_in_memory
= hash_arg_in_memory
;
5534 op1_in_struct
= hash_arg_in_struct
;
5539 /* Look up both operands. */
5540 op0_elt
= lookup (op0
, op0_hash_code
, mode
);
5541 op1_elt
= lookup (op1
, op1_hash_code
, mode
);
5543 /* If we aren't setting two things equal all we can do is save this
5544 comparison. Similarly if this is floating-point. In the latter
5545 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5546 If we record the equality, we might inadvertently delete code
5547 whose intent was to change -0 to +0. */
5549 if (code
!= EQ
|| GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
5551 /* If we reversed a floating-point comparison, if OP0 is not a
5552 register, or if OP1 is neither a register or constant, we can't
5555 if (GET_CODE (op1
) != REG
)
5556 op1
= equiv_constant (op1
);
5558 if ((reversed_nonequality
&& GET_MODE_CLASS (mode
) != MODE_INT
)
5559 || GET_CODE (op0
) != REG
|| op1
== 0)
5562 /* Put OP0 in the hash table if it isn't already. This gives it a
5563 new quantity number. */
5566 if (insert_regs (op0
, NULL_PTR
, 0))
5568 rehash_using_reg (op0
);
5569 op0_hash_code
= HASH (op0
, mode
);
5572 op0_elt
= insert (op0
, NULL_PTR
, op0_hash_code
, mode
);
5573 op0_elt
->in_memory
= op0_in_memory
;
5574 op0_elt
->in_struct
= op0_in_struct
;
5577 qty_comparison_code
[reg_qty
[REGNO (op0
)]] = code
;
5578 if (GET_CODE (op1
) == REG
)
5580 /* Put OP1 in the hash table so it gets a new quantity number. */
5583 if (insert_regs (op1
, NULL_PTR
, 0))
5585 rehash_using_reg (op1
);
5586 op1_hash_code
= HASH (op1
, mode
);
5589 op1_elt
= insert (op1
, NULL_PTR
, op1_hash_code
, mode
);
5590 op1_elt
->in_memory
= op1_in_memory
;
5591 op1_elt
->in_struct
= op1_in_struct
;
5594 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = reg_qty
[REGNO (op1
)];
5595 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = 0;
5599 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = -1;
5600 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = op1
;
5606 /* If both are equivalent, merge the two classes. Save this class for
5607 `cse_set_around_loop'. */
5608 if (op0_elt
&& op1_elt
)
5610 merge_equiv_classes (op0_elt
, op1_elt
);
5611 last_jump_equiv_class
= op0_elt
;
5614 /* For whichever side doesn't have an equivalence, make one. */
5617 if (insert_regs (op0
, op1_elt
, 0))
5619 rehash_using_reg (op0
);
5620 op0_hash_code
= HASH (op0
, mode
);
5623 op0_elt
= insert (op0
, op1_elt
, op0_hash_code
, mode
);
5624 op0_elt
->in_memory
= op0_in_memory
;
5625 op0_elt
->in_struct
= op0_in_struct
;
5626 last_jump_equiv_class
= op0_elt
;
5631 if (insert_regs (op1
, op0_elt
, 0))
5633 rehash_using_reg (op1
);
5634 op1_hash_code
= HASH (op1
, mode
);
5637 op1_elt
= insert (op1
, op0_elt
, op1_hash_code
, mode
);
5638 op1_elt
->in_memory
= op1_in_memory
;
5639 op1_elt
->in_struct
= op1_in_struct
;
5640 last_jump_equiv_class
= op1_elt
;
5644 /* CSE processing for one instruction.
5645 First simplify sources and addresses of all assignments
5646 in the instruction, using previously-computed equivalents values.
5647 Then install the new sources and destinations in the table
5648 of available values.
5650 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
5653 /* Data on one SET contained in the instruction. */
5657 /* The SET rtx itself. */
5659 /* The SET_SRC of the rtx (the original value, if it is changing). */
5661 /* The hash-table element for the SET_SRC of the SET. */
5662 struct table_elt
*src_elt
;
5663 /* Hash code for the SET_SRC. */
5665 /* Hash code for the SET_DEST. */
5667 /* The SET_DEST, with SUBREG, etc., stripped. */
5669 /* Place where the pointer to the INNER_DEST was found. */
5670 rtx
*inner_dest_loc
;
5671 /* Nonzero if the SET_SRC is in memory. */
5673 /* Nonzero if the SET_SRC is in a structure. */
5675 /* Nonzero if the SET_SRC contains something
5676 whose value cannot be predicted and understood. */
5678 /* Original machine mode, in case it becomes a CONST_INT. */
5679 enum machine_mode mode
;
5680 /* A constant equivalent for SET_SRC, if any. */
5682 /* Hash code of constant equivalent for SET_SRC. */
5683 int src_const_hash_code
;
5684 /* Table entry for constant equivalent for SET_SRC, if any. */
5685 struct table_elt
*src_const_elt
;
5689 cse_insn (insn
, in_libcall_block
)
5691 int in_libcall_block
;
5693 register rtx x
= PATTERN (insn
);
5696 register int n_sets
= 0;
5698 /* Records what this insn does to set CC0. */
5699 rtx this_insn_cc0
= 0;
5700 enum machine_mode this_insn_cc0_mode
;
5701 struct write_data writes_memory
;
5702 static struct write_data init
= {0, 0, 0, 0};
5705 struct table_elt
*src_eqv_elt
= 0;
5706 int src_eqv_volatile
;
5707 int src_eqv_in_memory
;
5708 int src_eqv_in_struct
;
5709 int src_eqv_hash_code
;
5714 writes_memory
= init
;
5716 /* Find all the SETs and CLOBBERs in this instruction.
5717 Record all the SETs in the array `set' and count them.
5718 Also determine whether there is a CLOBBER that invalidates
5719 all memory references, or all references at varying addresses. */
5721 if (GET_CODE (x
) == SET
)
5723 sets
= (struct set
*) alloca (sizeof (struct set
));
5726 /* Ignore SETs that are unconditional jumps.
5727 They never need cse processing, so this does not hurt.
5728 The reason is not efficiency but rather
5729 so that we can test at the end for instructions
5730 that have been simplified to unconditional jumps
5731 and not be misled by unchanged instructions
5732 that were unconditional jumps to begin with. */
5733 if (SET_DEST (x
) == pc_rtx
5734 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
5737 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
5738 The hard function value register is used only once, to copy to
5739 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
5740 Ensure we invalidate the destination register. On the 80386 no
5741 other code would invalidate it since it is a fixed_reg.
5742 We need not check the return of apply_change_group; see canon_reg. */
5744 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5746 canon_reg (SET_SRC (x
), insn
);
5747 apply_change_group ();
5748 fold_rtx (SET_SRC (x
), insn
);
5749 invalidate (SET_DEST (x
));
5754 else if (GET_CODE (x
) == PARALLEL
)
5756 register int lim
= XVECLEN (x
, 0);
5758 sets
= (struct set
*) alloca (lim
* sizeof (struct set
));
5760 /* Find all regs explicitly clobbered in this insn,
5761 and ensure they are not replaced with any other regs
5762 elsewhere in this insn.
5763 When a reg that is clobbered is also used for input,
5764 we should presume that that is for a reason,
5765 and we should not substitute some other register
5766 which is not supposed to be clobbered.
5767 Therefore, this loop cannot be merged into the one below
5768 because a CALL may precede a CLOBBER and refer to the
5769 value clobbered. We must not let a canonicalization do
5770 anything in that case. */
5771 for (i
= 0; i
< lim
; i
++)
5773 register rtx y
= XVECEXP (x
, 0, i
);
5774 if (GET_CODE (y
) == CLOBBER
5775 && (GET_CODE (XEXP (y
, 0)) == REG
5776 || GET_CODE (XEXP (y
, 0)) == SUBREG
))
5777 invalidate (XEXP (y
, 0));
5780 for (i
= 0; i
< lim
; i
++)
5782 register rtx y
= XVECEXP (x
, 0, i
);
5783 if (GET_CODE (y
) == SET
)
5785 /* As above, we ignore unconditional jumps and call-insns and
5786 ignore the result of apply_change_group. */
5787 if (GET_CODE (SET_SRC (y
)) == CALL
)
5789 canon_reg (SET_SRC (y
), insn
);
5790 apply_change_group ();
5791 fold_rtx (SET_SRC (y
), insn
);
5792 invalidate (SET_DEST (y
));
5794 else if (SET_DEST (y
) == pc_rtx
5795 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
5798 sets
[n_sets
++].rtl
= y
;
5800 else if (GET_CODE (y
) == CLOBBER
)
5802 /* If we clobber memory, take note of that,
5803 and canon the address.
5804 This does nothing when a register is clobbered
5805 because we have already invalidated the reg. */
5806 if (GET_CODE (XEXP (y
, 0)) == MEM
)
5808 canon_reg (XEXP (y
, 0), NULL_RTX
);
5809 note_mem_written (XEXP (y
, 0), &writes_memory
);
5812 else if (GET_CODE (y
) == USE
5813 && ! (GET_CODE (XEXP (y
, 0)) == REG
5814 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
5815 canon_reg (y
, NULL_RTX
);
5816 else if (GET_CODE (y
) == CALL
)
5818 /* The result of apply_change_group can be ignored; see
5820 canon_reg (y
, insn
);
5821 apply_change_group ();
5826 else if (GET_CODE (x
) == CLOBBER
)
5828 if (GET_CODE (XEXP (x
, 0)) == MEM
)
5830 canon_reg (XEXP (x
, 0), NULL_RTX
);
5831 note_mem_written (XEXP (x
, 0), &writes_memory
);
5835 /* Canonicalize a USE of a pseudo register or memory location. */
5836 else if (GET_CODE (x
) == USE
5837 && ! (GET_CODE (XEXP (x
, 0)) == REG
5838 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
5839 canon_reg (XEXP (x
, 0), NULL_RTX
);
5840 else if (GET_CODE (x
) == CALL
)
5842 /* The result of apply_change_group can be ignored; see canon_reg. */
5843 canon_reg (x
, insn
);
5844 apply_change_group ();
5848 if (n_sets
== 1 && REG_NOTES (insn
) != 0)
5850 /* Store the equivalent value in SRC_EQV, if different. */
5851 rtx tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5853 if (tem
&& ! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
)))
5854 src_eqv
= canon_reg (XEXP (tem
, 0), NULL_RTX
);
5857 /* Canonicalize sources and addresses of destinations.
5858 We do this in a separate pass to avoid problems when a MATCH_DUP is
5859 present in the insn pattern. In that case, we want to ensure that
5860 we don't break the duplicate nature of the pattern. So we will replace
5861 both operands at the same time. Otherwise, we would fail to find an
5862 equivalent substitution in the loop calling validate_change below.
5864 We used to suppress canonicalization of DEST if it appears in SRC,
5865 but we don't do this any more. */
5867 for (i
= 0; i
< n_sets
; i
++)
5869 rtx dest
= SET_DEST (sets
[i
].rtl
);
5870 rtx src
= SET_SRC (sets
[i
].rtl
);
5871 rtx
new = canon_reg (src
, insn
);
5873 if ((GET_CODE (new) == REG
&& GET_CODE (src
) == REG
5874 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
5875 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
5876 || insn_n_dups
[recog_memoized (insn
)] > 0)
5877 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
5879 SET_SRC (sets
[i
].rtl
) = new;
5881 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
5883 validate_change (insn
, &XEXP (dest
, 1),
5884 canon_reg (XEXP (dest
, 1), insn
), 1);
5885 validate_change (insn
, &XEXP (dest
, 2),
5886 canon_reg (XEXP (dest
, 2), insn
), 1);
5889 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
5890 || GET_CODE (dest
) == ZERO_EXTRACT
5891 || GET_CODE (dest
) == SIGN_EXTRACT
)
5892 dest
= XEXP (dest
, 0);
5894 if (GET_CODE (dest
) == MEM
)
5895 canon_reg (dest
, insn
);
5898 /* Now that we have done all the replacements, we can apply the change
5899 group and see if they all work. Note that this will cause some
5900 canonicalizations that would have worked individually not to be applied
5901 because some other canonicalization didn't work, but this should not
5904 The result of apply_change_group can be ignored; see canon_reg. */
5906 apply_change_group ();
5908 /* Set sets[i].src_elt to the class each source belongs to.
5909 Detect assignments from or to volatile things
5910 and set set[i] to zero so they will be ignored
5911 in the rest of this function.
5913 Nothing in this loop changes the hash table or the register chains. */
5915 for (i
= 0; i
< n_sets
; i
++)
5917 register rtx src
, dest
;
5918 register rtx src_folded
;
5919 register struct table_elt
*elt
= 0, *p
;
5920 enum machine_mode mode
;
5923 rtx src_related
= 0;
5924 struct table_elt
*src_const_elt
= 0;
5925 int src_cost
= 10000, src_eqv_cost
= 10000, src_folded_cost
= 10000;
5926 int src_related_cost
= 10000, src_elt_cost
= 10000;
5927 /* Set non-zero if we need to call force_const_mem on with the
5928 contents of src_folded before using it. */
5929 int src_folded_force_flag
= 0;
5931 dest
= SET_DEST (sets
[i
].rtl
);
5932 src
= SET_SRC (sets
[i
].rtl
);
5934 /* If SRC is a constant that has no machine mode,
5935 hash it with the destination's machine mode.
5936 This way we can keep different modes separate. */
5938 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5939 sets
[i
].mode
= mode
;
5943 enum machine_mode eqvmode
= mode
;
5944 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5945 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5947 hash_arg_in_memory
= 0;
5948 hash_arg_in_struct
= 0;
5949 src_eqv
= fold_rtx (src_eqv
, insn
);
5950 src_eqv_hash_code
= HASH (src_eqv
, eqvmode
);
5952 /* Find the equivalence class for the equivalent expression. */
5955 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash_code
, eqvmode
);
5957 src_eqv_volatile
= do_not_record
;
5958 src_eqv_in_memory
= hash_arg_in_memory
;
5959 src_eqv_in_struct
= hash_arg_in_struct
;
5962 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5963 value of the INNER register, not the destination. So it is not
5964 a legal substitution for the source. But save it for later. */
5965 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5968 src_eqv_here
= src_eqv
;
5970 /* Simplify and foldable subexpressions in SRC. Then get the fully-
5971 simplified result, which may not necessarily be valid. */
5972 src_folded
= fold_rtx (src
, insn
);
5974 /* If storing a constant in a bitfield, pre-truncate the constant
5975 so we will be able to record it later. */
5976 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5977 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
5979 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5981 if (GET_CODE (src
) == CONST_INT
5982 && GET_CODE (width
) == CONST_INT
5983 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5984 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5986 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
5987 << INTVAL (width
)) - 1));
5990 /* Compute SRC's hash code, and also notice if it
5991 should not be recorded at all. In that case,
5992 prevent any further processing of this assignment. */
5994 hash_arg_in_memory
= 0;
5995 hash_arg_in_struct
= 0;
5998 sets
[i
].src_hash_code
= HASH (src
, mode
);
5999 sets
[i
].src_volatile
= do_not_record
;
6000 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6001 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6004 /* It is no longer clear why we used to do this, but it doesn't
6005 appear to still be needed. So let's try without it since this
6006 code hurts cse'ing widened ops. */
6007 /* If source is a perverse subreg (such as QI treated as an SI),
6008 treat it as volatile. It may do the work of an SI in one context
6009 where the extra bits are not being used, but cannot replace an SI
6011 if (GET_CODE (src
) == SUBREG
6012 && (GET_MODE_SIZE (GET_MODE (src
))
6013 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
6014 sets
[i
].src_volatile
= 1;
6017 /* Locate all possible equivalent forms for SRC. Try to replace
6018 SRC in the insn with each cheaper equivalent.
6020 We have the following types of equivalents: SRC itself, a folded
6021 version, a value given in a REG_EQUAL note, or a value related
6024 Each of these equivalents may be part of an additional class
6025 of equivalents (if more than one is in the table, they must be in
6026 the same class; we check for this).
6028 If the source is volatile, we don't do any table lookups.
6030 We note any constant equivalent for possible later use in a
6033 if (!sets
[i
].src_volatile
)
6034 elt
= lookup (src
, sets
[i
].src_hash_code
, mode
);
6036 sets
[i
].src_elt
= elt
;
6038 if (elt
&& src_eqv_here
&& src_eqv_elt
)
6040 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
6042 /* The REG_EQUAL is indicating that two formerly distinct
6043 classes are now equivalent. So merge them. */
6044 merge_equiv_classes (elt
, src_eqv_elt
);
6045 src_eqv_hash_code
= HASH (src_eqv
, elt
->mode
);
6046 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash_code
, elt
->mode
);
6052 else if (src_eqv_elt
)
6055 /* Try to find a constant somewhere and record it in `src_const'.
6056 Record its table element, if any, in `src_const_elt'. Look in
6057 any known equivalences first. (If the constant is not in the
6058 table, also set `sets[i].src_const_hash_code'). */
6060 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
6064 src_const_elt
= elt
;
6069 && (CONSTANT_P (src_folded
)
6070 /* Consider (minus (label_ref L1) (label_ref L2)) as
6071 "constant" here so we will record it. This allows us
6072 to fold switch statements when an ADDR_DIFF_VEC is used. */
6073 || (GET_CODE (src_folded
) == MINUS
6074 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
6075 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
6076 src_const
= src_folded
, src_const_elt
= elt
;
6077 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
6078 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
6080 /* If we don't know if the constant is in the table, get its
6081 hash code and look it up. */
6082 if (src_const
&& src_const_elt
== 0)
6084 sets
[i
].src_const_hash_code
= HASH (src_const
, mode
);
6085 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash_code
,
6089 sets
[i
].src_const
= src_const
;
6090 sets
[i
].src_const_elt
= src_const_elt
;
6092 /* If the constant and our source are both in the table, mark them as
6093 equivalent. Otherwise, if a constant is in the table but the source
6094 isn't, set ELT to it. */
6095 if (src_const_elt
&& elt
6096 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
6097 merge_equiv_classes (elt
, src_const_elt
);
6098 else if (src_const_elt
&& elt
== 0)
6099 elt
= src_const_elt
;
6101 /* See if there is a register linearly related to a constant
6102 equivalent of SRC. */
6104 && (GET_CODE (src_const
) == CONST
6105 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
6107 src_related
= use_related_value (src_const
, src_const_elt
);
6110 struct table_elt
*src_related_elt
6111 = lookup (src_related
, HASH (src_related
, mode
), mode
);
6112 if (src_related_elt
&& elt
)
6114 if (elt
->first_same_value
6115 != src_related_elt
->first_same_value
)
6116 /* This can occur when we previously saw a CONST
6117 involving a SYMBOL_REF and then see the SYMBOL_REF
6118 twice. Merge the involved classes. */
6119 merge_equiv_classes (elt
, src_related_elt
);
6122 src_related_elt
= 0;
6124 else if (src_related_elt
&& elt
== 0)
6125 elt
= src_related_elt
;
6129 /* See if we have a CONST_INT that is already in a register in a
6132 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
6133 && GET_MODE_CLASS (mode
) == MODE_INT
6134 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
6136 enum machine_mode wider_mode
;
6138 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
6139 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
6140 && src_related
== 0;
6141 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
6143 struct table_elt
*const_elt
6144 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
6149 for (const_elt
= const_elt
->first_same_value
;
6150 const_elt
; const_elt
= const_elt
->next_same_value
)
6151 if (GET_CODE (const_elt
->exp
) == REG
)
6153 src_related
= gen_lowpart_if_possible (mode
,
6160 /* Another possibility is that we have an AND with a constant in
6161 a mode narrower than a word. If so, it might have been generated
6162 as part of an "if" which would narrow the AND. If we already
6163 have done the AND in a wider mode, we can use a SUBREG of that
6166 if (flag_expensive_optimizations
&& ! src_related
6167 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
6168 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6170 enum machine_mode tmode
;
6171 rtx new_and
= gen_rtx (AND
, VOIDmode
, NULL_RTX
, XEXP (src
, 1));
6173 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6174 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6175 tmode
= GET_MODE_WIDER_MODE (tmode
))
6177 rtx inner
= gen_lowpart_if_possible (tmode
, XEXP (src
, 0));
6178 struct table_elt
*larger_elt
;
6182 PUT_MODE (new_and
, tmode
);
6183 XEXP (new_and
, 0) = inner
;
6184 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
6185 if (larger_elt
== 0)
6188 for (larger_elt
= larger_elt
->first_same_value
;
6189 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6190 if (GET_CODE (larger_elt
->exp
) == REG
)
6193 = gen_lowpart_if_possible (mode
, larger_elt
->exp
);
6203 if (src
== src_folded
)
6206 /* At this point, ELT, if non-zero, points to a class of expressions
6207 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6208 and SRC_RELATED, if non-zero, each contain additional equivalent
6209 expressions. Prune these latter expressions by deleting expressions
6210 already in the equivalence class.
6212 Check for an equivalent identical to the destination. If found,
6213 this is the preferred equivalent since it will likely lead to
6214 elimination of the insn. Indicate this by placing it in
6217 if (elt
) elt
= elt
->first_same_value
;
6218 for (p
= elt
; p
; p
= p
->next_same_value
)
6220 enum rtx_code code
= GET_CODE (p
->exp
);
6222 /* If the expression is not valid, ignore it. Then we do not
6223 have to check for validity below. In most cases, we can use
6224 `rtx_equal_p', since canonicalization has already been done. */
6225 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
6228 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
6230 else if (src_folded
&& GET_CODE (src_folded
) == code
6231 && rtx_equal_p (src_folded
, p
->exp
))
6233 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
6234 && rtx_equal_p (src_eqv_here
, p
->exp
))
6236 else if (src_related
&& GET_CODE (src_related
) == code
6237 && rtx_equal_p (src_related
, p
->exp
))
6240 /* This is the same as the destination of the insns, we want
6241 to prefer it. Copy it to src_related. The code below will
6242 then give it a negative cost. */
6243 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
6248 /* Find the cheapest valid equivalent, trying all the available
6249 possibilities. Prefer items not in the hash table to ones
6250 that are when they are equal cost. Note that we can never
6251 worsen an insn as the current contents will also succeed.
6252 If we find an equivalent identical to the destination, use it as best,
6253 since this insn will probably be eliminated in that case. */
6256 if (rtx_equal_p (src
, dest
))
6259 src_cost
= COST (src
);
6264 if (rtx_equal_p (src_eqv_here
, dest
))
6267 src_eqv_cost
= COST (src_eqv_here
);
6272 if (rtx_equal_p (src_folded
, dest
))
6273 src_folded_cost
= -1;
6275 src_folded_cost
= COST (src_folded
);
6280 if (rtx_equal_p (src_related
, dest
))
6281 src_related_cost
= -1;
6283 src_related_cost
= COST (src_related
);
6286 /* If this was an indirect jump insn, a known label will really be
6287 cheaper even though it looks more expensive. */
6288 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
6289 src_folded
= src_const
, src_folded_cost
= -1;
6291 /* Terminate loop when replacement made. This must terminate since
6292 the current contents will be tested and will always be valid. */
6297 /* Skip invalid entries. */
6298 while (elt
&& GET_CODE (elt
->exp
) != REG
6299 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6300 elt
= elt
->next_same_value
;
6302 if (elt
) src_elt_cost
= elt
->cost
;
6304 /* Find cheapest and skip it for the next time. For items
6305 of equal cost, use this order:
6306 src_folded, src, src_eqv, src_related and hash table entry. */
6307 if (src_folded_cost
<= src_cost
6308 && src_folded_cost
<= src_eqv_cost
6309 && src_folded_cost
<= src_related_cost
6310 && src_folded_cost
<= src_elt_cost
)
6312 trial
= src_folded
, src_folded_cost
= 10000;
6313 if (src_folded_force_flag
)
6314 trial
= force_const_mem (mode
, trial
);
6316 else if (src_cost
<= src_eqv_cost
6317 && src_cost
<= src_related_cost
6318 && src_cost
<= src_elt_cost
)
6319 trial
= src
, src_cost
= 10000;
6320 else if (src_eqv_cost
<= src_related_cost
6321 && src_eqv_cost
<= src_elt_cost
)
6322 trial
= src_eqv_here
, src_eqv_cost
= 10000;
6323 else if (src_related_cost
<= src_elt_cost
)
6324 trial
= src_related
, src_related_cost
= 10000;
6327 trial
= copy_rtx (elt
->exp
);
6328 elt
= elt
->next_same_value
;
6329 src_elt_cost
= 10000;
6332 /* We don't normally have an insn matching (set (pc) (pc)), so
6333 check for this separately here. We will delete such an
6336 Tablejump insns contain a USE of the table, so simply replacing
6337 the operand with the constant won't match. This is simply an
6338 unconditional branch, however, and is therefore valid. Just
6339 insert the substitution here and we will delete and re-emit
6342 if (n_sets
== 1 && dest
== pc_rtx
6344 || (GET_CODE (trial
) == LABEL_REF
6345 && ! condjump_p (insn
))))
6347 /* If TRIAL is a label in front of a jump table, we are
6348 really falling through the switch (this is how casesi
6349 insns work), so we must branch around the table. */
6350 if (GET_CODE (trial
) == CODE_LABEL
6351 && NEXT_INSN (trial
) != 0
6352 && GET_CODE (NEXT_INSN (trial
)) == JUMP_INSN
6353 && (GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_DIFF_VEC
6354 || GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_VEC
))
6356 trial
= gen_rtx (LABEL_REF
, Pmode
, get_label_after (trial
));
6358 SET_SRC (sets
[i
].rtl
) = trial
;
6362 /* Look for a substitution that makes a valid insn. */
6363 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
6365 /* The result of apply_change_group can be ignored; see
6368 validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
6369 canon_reg (SET_SRC (sets
[i
].rtl
), insn
),
6371 apply_change_group ();
6375 /* If we previously found constant pool entries for
6376 constants and this is a constant, try making a
6377 pool entry. Put it in src_folded unless we already have done
6378 this since that is where it likely came from. */
6380 else if (constant_pool_entries_cost
6381 && CONSTANT_P (trial
)
6382 && (src_folded
== 0 || GET_CODE (src_folded
) != MEM
)
6383 && GET_MODE_CLASS (mode
) != MODE_CC
)
6385 src_folded_force_flag
= 1;
6387 src_folded_cost
= constant_pool_entries_cost
;
6391 src
= SET_SRC (sets
[i
].rtl
);
6393 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6394 However, there is an important exception: If both are registers
6395 that are not the head of their equivalence class, replace SET_SRC
6396 with the head of the class. If we do not do this, we will have
6397 both registers live over a portion of the basic block. This way,
6398 their lifetimes will likely abut instead of overlapping. */
6399 if (GET_CODE (dest
) == REG
6400 && REGNO_QTY_VALID_P (REGNO (dest
))
6401 && qty_mode
[reg_qty
[REGNO (dest
)]] == GET_MODE (dest
)
6402 && qty_first_reg
[reg_qty
[REGNO (dest
)]] != REGNO (dest
)
6403 && GET_CODE (src
) == REG
&& REGNO (src
) == REGNO (dest
)
6404 /* Don't do this if the original insn had a hard reg as
6406 && (GET_CODE (sets
[i
].src
) != REG
6407 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
))
6408 /* We can't call canon_reg here because it won't do anything if
6409 SRC is a hard register. */
6411 int first
= qty_first_reg
[reg_qty
[REGNO (src
)]];
6413 src
= SET_SRC (sets
[i
].rtl
)
6414 = first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
6415 : gen_rtx (REG
, GET_MODE (src
), first
);
6417 /* If we had a constant that is cheaper than what we are now
6418 setting SRC to, use that constant. We ignored it when we
6419 thought we could make this into a no-op. */
6420 if (src_const
&& COST (src_const
) < COST (src
)
6421 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
), src_const
, 0))
6425 /* If we made a change, recompute SRC values. */
6426 if (src
!= sets
[i
].src
)
6429 hash_arg_in_memory
= 0;
6430 hash_arg_in_struct
= 0;
6432 sets
[i
].src_hash_code
= HASH (src
, mode
);
6433 sets
[i
].src_volatile
= do_not_record
;
6434 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6435 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6436 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash_code
, mode
);
6439 /* If this is a single SET, we are setting a register, and we have an
6440 equivalent constant, we want to add a REG_NOTE. We don't want
6441 to write a REG_EQUAL note for a constant pseudo since verifying that
6442 that pseudo hasn't been eliminated is a pain. Such a note also
6443 won't help anything. */
6444 if (n_sets
== 1 && src_const
&& GET_CODE (dest
) == REG
6445 && GET_CODE (src_const
) != REG
)
6447 rtx tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6449 /* Record the actual constant value in a REG_EQUAL note, making
6450 a new one if one does not already exist. */
6452 XEXP (tem
, 0) = src_const
;
6454 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
6455 src_const
, REG_NOTES (insn
));
6457 /* If storing a constant value in a register that
6458 previously held the constant value 0,
6459 record this fact with a REG_WAS_0 note on this insn.
6461 Note that the *register* is required to have previously held 0,
6462 not just any register in the quantity and we must point to the
6463 insn that set that register to zero.
6465 Rather than track each register individually, we just see if
6466 the last set for this quantity was for this register. */
6468 if (REGNO_QTY_VALID_P (REGNO (dest
))
6469 && qty_const
[reg_qty
[REGNO (dest
)]] == const0_rtx
)
6471 /* See if we previously had a REG_WAS_0 note. */
6472 rtx note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
6473 rtx const_insn
= qty_const_insn
[reg_qty
[REGNO (dest
)]];
6475 if ((tem
= single_set (const_insn
)) != 0
6476 && rtx_equal_p (SET_DEST (tem
), dest
))
6479 XEXP (note
, 0) = const_insn
;
6481 REG_NOTES (insn
) = gen_rtx (INSN_LIST
, REG_WAS_0
,
6482 const_insn
, REG_NOTES (insn
));
6487 /* Now deal with the destination. */
6489 sets
[i
].inner_dest_loc
= &SET_DEST (sets
[0].rtl
);
6491 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
6492 to the MEM or REG within it. */
6493 while (GET_CODE (dest
) == SIGN_EXTRACT
6494 || GET_CODE (dest
) == ZERO_EXTRACT
6495 || GET_CODE (dest
) == SUBREG
6496 || GET_CODE (dest
) == STRICT_LOW_PART
)
6498 sets
[i
].inner_dest_loc
= &XEXP (dest
, 0);
6499 dest
= XEXP (dest
, 0);
6502 sets
[i
].inner_dest
= dest
;
6504 if (GET_CODE (dest
) == MEM
)
6506 dest
= fold_rtx (dest
, insn
);
6508 /* Decide whether we invalidate everything in memory,
6509 or just things at non-fixed places.
6510 Writing a large aggregate must invalidate everything
6511 because we don't know how long it is. */
6512 note_mem_written (dest
, &writes_memory
);
6515 /* Compute the hash code of the destination now,
6516 before the effects of this instruction are recorded,
6517 since the register values used in the address computation
6518 are those before this instruction. */
6519 sets
[i
].dest_hash_code
= HASH (dest
, mode
);
6521 /* Don't enter a bit-field in the hash table
6522 because the value in it after the store
6523 may not equal what was stored, due to truncation. */
6525 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6526 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6528 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6530 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
6531 && GET_CODE (width
) == CONST_INT
6532 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
6533 && ! (INTVAL (src_const
)
6534 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6535 /* Exception: if the value is constant,
6536 and it won't be truncated, record it. */
6540 /* This is chosen so that the destination will be invalidated
6541 but no new value will be recorded.
6542 We must invalidate because sometimes constant
6543 values can be recorded for bitfields. */
6544 sets
[i
].src_elt
= 0;
6545 sets
[i
].src_volatile
= 1;
6551 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
6553 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
6555 PUT_CODE (insn
, NOTE
);
6556 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
6557 NOTE_SOURCE_FILE (insn
) = 0;
6558 cse_jumps_altered
= 1;
6559 /* One less use of the label this insn used to jump to. */
6560 --LABEL_NUSES (JUMP_LABEL (insn
));
6561 /* No more processing for this set. */
6565 /* If this SET is now setting PC to a label, we know it used to
6566 be a conditional or computed branch. So we see if we can follow
6567 it. If it was a computed branch, delete it and re-emit. */
6568 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
6572 /* If this is not in the format for a simple branch and
6573 we are the only SET in it, re-emit it. */
6574 if (! simplejump_p (insn
) && n_sets
== 1)
6576 rtx
new = emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
6577 JUMP_LABEL (new) = XEXP (src
, 0);
6578 LABEL_NUSES (XEXP (src
, 0))++;
6583 /* Now that we've converted this jump to an unconditional jump,
6584 there is dead code after it. Delete the dead code until we
6585 reach a BARRIER, the end of the function, or a label. Do
6586 not delete NOTEs except for NOTE_INSN_DELETED since later
6587 phases assume these notes are retained. */
6591 while (NEXT_INSN (p
) != 0
6592 && GET_CODE (NEXT_INSN (p
)) != BARRIER
6593 && GET_CODE (NEXT_INSN (p
)) != CODE_LABEL
)
6595 if (GET_CODE (NEXT_INSN (p
)) != NOTE
6596 || NOTE_LINE_NUMBER (NEXT_INSN (p
)) == NOTE_INSN_DELETED
)
6597 delete_insn (NEXT_INSN (p
));
6602 /* If we don't have a BARRIER immediately after INSN, put one there.
6603 Much code assumes that there are no NOTEs between a JUMP_INSN and
6606 if (NEXT_INSN (insn
) == 0
6607 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
6608 emit_barrier_after (insn
);
6610 /* We might have two BARRIERs separated by notes. Delete the second
6613 if (p
!= insn
&& NEXT_INSN (p
) != 0
6614 && GET_CODE (NEXT_INSN (p
)) == BARRIER
)
6615 delete_insn (NEXT_INSN (p
));
6617 cse_jumps_altered
= 1;
6621 /* If destination is volatile, invalidate it and then do no further
6622 processing for this assignment. */
6624 else if (do_not_record
)
6626 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
6627 || GET_CODE (dest
) == MEM
)
6632 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
6633 sets
[i
].dest_hash_code
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
6636 /* If setting CC0, record what it was set to, or a constant, if it
6637 is equivalent to a constant. If it is being set to a floating-point
6638 value, make a COMPARE with the appropriate constant of 0. If we
6639 don't do this, later code can interpret this as a test against
6640 const0_rtx, which can cause problems if we try to put it into an
6641 insn as a floating-point operand. */
6642 if (dest
== cc0_rtx
)
6644 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
6645 this_insn_cc0_mode
= mode
;
6646 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
6647 this_insn_cc0
= gen_rtx (COMPARE
, VOIDmode
, this_insn_cc0
,
6653 /* Now enter all non-volatile source expressions in the hash table
6654 if they are not already present.
6655 Record their equivalence classes in src_elt.
6656 This way we can insert the corresponding destinations into
6657 the same classes even if the actual sources are no longer in them
6658 (having been invalidated). */
6660 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
6661 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
6663 register struct table_elt
*elt
;
6664 register struct table_elt
*classp
= sets
[0].src_elt
;
6665 rtx dest
= SET_DEST (sets
[0].rtl
);
6666 enum machine_mode eqvmode
= GET_MODE (dest
);
6668 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6670 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6673 if (insert_regs (src_eqv
, classp
, 0))
6674 src_eqv_hash_code
= HASH (src_eqv
, eqvmode
);
6675 elt
= insert (src_eqv
, classp
, src_eqv_hash_code
, eqvmode
);
6676 elt
->in_memory
= src_eqv_in_memory
;
6677 elt
->in_struct
= src_eqv_in_struct
;
6681 for (i
= 0; i
< n_sets
; i
++)
6682 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
6683 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
6685 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
6687 /* REG_EQUAL in setting a STRICT_LOW_PART
6688 gives an equivalent for the entire destination register,
6689 not just for the subreg being stored in now.
6690 This is a more interesting equivalence, so we arrange later
6691 to treat the entire reg as the destination. */
6692 sets
[i
].src_elt
= src_eqv_elt
;
6693 sets
[i
].src_hash_code
= src_eqv_hash_code
;
6697 /* Insert source and constant equivalent into hash table, if not
6699 register struct table_elt
*classp
= src_eqv_elt
;
6700 register rtx src
= sets
[i
].src
;
6701 register rtx dest
= SET_DEST (sets
[i
].rtl
);
6702 enum machine_mode mode
6703 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6705 if (sets
[i
].src_elt
== 0)
6707 register struct table_elt
*elt
;
6709 /* Note that these insert_regs calls cannot remove
6710 any of the src_elt's, because they would have failed to
6711 match if not still valid. */
6712 if (insert_regs (src
, classp
, 0))
6713 sets
[i
].src_hash_code
= HASH (src
, mode
);
6714 elt
= insert (src
, classp
, sets
[i
].src_hash_code
, mode
);
6715 elt
->in_memory
= sets
[i
].src_in_memory
;
6716 elt
->in_struct
= sets
[i
].src_in_struct
;
6717 sets
[i
].src_elt
= classp
= elt
;
6720 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
6721 && src
!= sets
[i
].src_const
6722 && ! rtx_equal_p (sets
[i
].src_const
, src
))
6723 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
6724 sets
[i
].src_const_hash_code
, mode
);
6727 else if (sets
[i
].src_elt
== 0)
6728 /* If we did not insert the source into the hash table (e.g., it was
6729 volatile), note the equivalence class for the REG_EQUAL value, if any,
6730 so that the destination goes into that class. */
6731 sets
[i
].src_elt
= src_eqv_elt
;
6733 invalidate_from_clobbers (&writes_memory
, x
);
6735 /* Some registers are invalidated by subroutine calls. Memory is
6736 invalidated by non-constant calls. */
6738 if (GET_CODE (insn
) == CALL_INSN
)
6740 static struct write_data everything
= {0, 1, 1, 1};
6742 if (! CONST_CALL_P (insn
))
6743 invalidate_memory (&everything
);
6744 invalidate_for_call ();
6747 /* Now invalidate everything set by this instruction.
6748 If a SUBREG or other funny destination is being set,
6749 sets[i].rtl is still nonzero, so here we invalidate the reg
6750 a part of which is being set. */
6752 for (i
= 0; i
< n_sets
; i
++)
6755 register rtx dest
= sets
[i
].inner_dest
;
6757 /* Needed for registers to remove the register from its
6758 previous quantity's chain.
6759 Needed for memory if this is a nonvarying address, unless
6760 we have just done an invalidate_memory that covers even those. */
6761 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
6762 || (! writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
6766 /* Make sure registers mentioned in destinations
6767 are safe for use in an expression to be inserted.
6768 This removes from the hash table
6769 any invalid entry that refers to one of these registers.
6771 We don't care about the return value from mention_regs because
6772 we are going to hash the SET_DEST values unconditionally. */
6774 for (i
= 0; i
< n_sets
; i
++)
6775 if (sets
[i
].rtl
&& GET_CODE (SET_DEST (sets
[i
].rtl
)) != REG
)
6776 mention_regs (SET_DEST (sets
[i
].rtl
));
6778 /* We may have just removed some of the src_elt's from the hash table.
6779 So replace each one with the current head of the same class. */
6781 for (i
= 0; i
< n_sets
; i
++)
6784 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
6785 /* If elt was removed, find current head of same class,
6786 or 0 if nothing remains of that class. */
6788 register struct table_elt
*elt
= sets
[i
].src_elt
;
6790 while (elt
&& elt
->prev_same_value
)
6791 elt
= elt
->prev_same_value
;
6793 while (elt
&& elt
->first_same_value
== 0)
6794 elt
= elt
->next_same_value
;
6795 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
6799 /* Now insert the destinations into their equivalence classes. */
6801 for (i
= 0; i
< n_sets
; i
++)
6804 register rtx dest
= SET_DEST (sets
[i
].rtl
);
6805 register struct table_elt
*elt
;
6807 /* Don't record value if we are not supposed to risk allocating
6808 floating-point values in registers that might be wider than
6810 if ((flag_float_store
6811 && GET_CODE (dest
) == MEM
6812 && GET_MODE_CLASS (GET_MODE (dest
)) == MODE_FLOAT
)
6813 /* Don't record values of destinations set inside a libcall block
6814 since we might delete the libcall. Things should have been set
6815 up so we won't want to reuse such a value, but we play it safe
6818 /* If we didn't put a REG_EQUAL value or a source into the hash
6819 table, there is no point is recording DEST. */
6820 || sets
[i
].src_elt
== 0)
6823 /* STRICT_LOW_PART isn't part of the value BEING set,
6824 and neither is the SUBREG inside it.
6825 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6826 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6827 dest
= SUBREG_REG (XEXP (dest
, 0));
6829 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
6830 /* Registers must also be inserted into chains for quantities. */
6831 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
6832 /* If `insert_regs' changes something, the hash code must be
6834 sets
[i
].dest_hash_code
= HASH (dest
, GET_MODE (dest
));
6836 elt
= insert (dest
, sets
[i
].src_elt
,
6837 sets
[i
].dest_hash_code
, GET_MODE (dest
));
6838 elt
->in_memory
= GET_CODE (sets
[i
].inner_dest
) == MEM
;
6841 /* This implicitly assumes a whole struct
6842 need not have MEM_IN_STRUCT_P.
6843 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
6844 elt
->in_struct
= (MEM_IN_STRUCT_P (sets
[i
].inner_dest
)
6845 || sets
[i
].inner_dest
!= SET_DEST (sets
[i
].rtl
));
6848 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6849 narrower than M2, and both M1 and M2 are the same number of words,
6850 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6851 make that equivalence as well.
6853 However, BAR may have equivalences for which gen_lowpart_if_possible
6854 will produce a simpler value than gen_lowpart_if_possible applied to
6855 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6856 BAR's equivalences. If we don't get a simplified form, make
6857 the SUBREG. It will not be used in an equivalence, but will
6858 cause two similar assignments to be detected.
6860 Note the loop below will find SUBREG_REG (DEST) since we have
6861 already entered SRC and DEST of the SET in the table. */
6863 if (GET_CODE (dest
) == SUBREG
6864 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) / UNITS_PER_WORD
6865 == GET_MODE_SIZE (GET_MODE (dest
)) / UNITS_PER_WORD
)
6866 && (GET_MODE_SIZE (GET_MODE (dest
))
6867 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6868 && sets
[i
].src_elt
!= 0)
6870 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
6871 struct table_elt
*elt
, *classp
= 0;
6873 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
6874 elt
= elt
->next_same_value
)
6878 struct table_elt
*src_elt
;
6880 /* Ignore invalid entries. */
6881 if (GET_CODE (elt
->exp
) != REG
6882 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6885 new_src
= gen_lowpart_if_possible (new_mode
, elt
->exp
);
6887 new_src
= gen_rtx (SUBREG
, new_mode
, elt
->exp
, 0);
6889 src_hash
= HASH (new_src
, new_mode
);
6890 src_elt
= lookup (new_src
, src_hash
, new_mode
);
6892 /* Put the new source in the hash table is if isn't
6896 if (insert_regs (new_src
, classp
, 0))
6897 src_hash
= HASH (new_src
, new_mode
);
6898 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
6899 src_elt
->in_memory
= elt
->in_memory
;
6900 src_elt
->in_struct
= elt
->in_struct
;
6902 else if (classp
&& classp
!= src_elt
->first_same_value
)
6903 /* Show that two things that we've seen before are
6904 actually the same. */
6905 merge_equiv_classes (src_elt
, classp
);
6907 classp
= src_elt
->first_same_value
;
6912 /* Special handling for (set REG0 REG1)
6913 where REG0 is the "cheapest", cheaper than REG1.
6914 After cse, REG1 will probably not be used in the sequel,
6915 so (if easily done) change this insn to (set REG1 REG0) and
6916 replace REG1 with REG0 in the previous insn that computed their value.
6917 Then REG1 will become a dead store and won't cloud the situation
6918 for later optimizations.
6920 Do not make this change if REG1 is a hard register, because it will
6921 then be used in the sequel and we may be changing a two-operand insn
6922 into a three-operand insn.
6924 Also do not do this if we are operating on a copy of INSN. */
6926 if (n_sets
== 1 && sets
[0].rtl
&& GET_CODE (SET_DEST (sets
[0].rtl
)) == REG
6927 && NEXT_INSN (PREV_INSN (insn
)) == insn
6928 && GET_CODE (SET_SRC (sets
[0].rtl
)) == REG
6929 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
6930 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
)))
6931 && (qty_first_reg
[reg_qty
[REGNO (SET_SRC (sets
[0].rtl
))]]
6932 == REGNO (SET_DEST (sets
[0].rtl
))))
6934 rtx prev
= PREV_INSN (insn
);
6935 while (prev
&& GET_CODE (prev
) == NOTE
)
6936 prev
= PREV_INSN (prev
);
6938 if (prev
&& GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SET
6939 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
))
6941 rtx dest
= SET_DEST (sets
[0].rtl
);
6942 rtx note
= find_reg_note (prev
, REG_EQUIV
, NULL_RTX
);
6944 validate_change (prev
, & SET_DEST (PATTERN (prev
)), dest
, 1);
6945 validate_change (insn
, & SET_DEST (sets
[0].rtl
),
6946 SET_SRC (sets
[0].rtl
), 1);
6947 validate_change (insn
, & SET_SRC (sets
[0].rtl
), dest
, 1);
6948 apply_change_group ();
6950 /* If REG1 was equivalent to a constant, REG0 is not. */
6952 PUT_REG_NOTE_KIND (note
, REG_EQUAL
);
6954 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6955 any REG_WAS_0 note on INSN to PREV. */
6956 note
= find_reg_note (prev
, REG_WAS_0
, NULL_RTX
);
6958 remove_note (prev
, note
);
6960 note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
6963 remove_note (insn
, note
);
6964 XEXP (note
, 1) = REG_NOTES (prev
);
6965 REG_NOTES (prev
) = note
;
6970 /* If this is a conditional jump insn, record any known equivalences due to
6971 the condition being tested. */
6973 last_jump_equiv_class
= 0;
6974 if (GET_CODE (insn
) == JUMP_INSN
6975 && n_sets
== 1 && GET_CODE (x
) == SET
6976 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
6977 record_jump_equiv (insn
, 0);
6980 /* If the previous insn set CC0 and this insn no longer references CC0,
6981 delete the previous insn. Here we use the fact that nothing expects CC0
6982 to be valid over an insn, which is true until the final pass. */
6983 if (prev_insn
&& GET_CODE (prev_insn
) == INSN
6984 && (tem
= single_set (prev_insn
)) != 0
6985 && SET_DEST (tem
) == cc0_rtx
6986 && ! reg_mentioned_p (cc0_rtx
, x
))
6988 PUT_CODE (prev_insn
, NOTE
);
6989 NOTE_LINE_NUMBER (prev_insn
) = NOTE_INSN_DELETED
;
6990 NOTE_SOURCE_FILE (prev_insn
) = 0;
6993 prev_insn_cc0
= this_insn_cc0
;
6994 prev_insn_cc0_mode
= this_insn_cc0_mode
;
7000 /* Store 1 in *WRITES_PTR for those categories of memory ref
7001 that must be invalidated when the expression WRITTEN is stored in.
7002 If WRITTEN is null, say everything must be invalidated. */
7005 note_mem_written (written
, writes_ptr
)
7007 struct write_data
*writes_ptr
;
7009 static struct write_data everything
= {0, 1, 1, 1};
7012 *writes_ptr
= everything
;
7013 else if (GET_CODE (written
) == MEM
)
7015 /* Pushing or popping the stack invalidates just the stack pointer. */
7016 rtx addr
= XEXP (written
, 0);
7017 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7018 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7019 && GET_CODE (XEXP (addr
, 0)) == REG
7020 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
7025 else if (GET_MODE (written
) == BLKmode
)
7026 *writes_ptr
= everything
;
7027 else if (cse_rtx_addr_varies_p (written
))
7029 /* A varying address that is a sum indicates an array element,
7030 and that's just as good as a structure element
7031 in implying that we need not invalidate scalar variables.
7032 However, we must allow QImode aliasing of scalars, because the
7033 ANSI C standard allows character pointers to alias anything. */
7034 if (! ((MEM_IN_STRUCT_P (written
)
7035 || GET_CODE (XEXP (written
, 0)) == PLUS
)
7036 && GET_MODE (written
) != QImode
))
7037 writes_ptr
->all
= 1;
7038 writes_ptr
->nonscalar
= 1;
7040 writes_ptr
->var
= 1;
7044 /* Perform invalidation on the basis of everything about an insn
7045 except for invalidating the actual places that are SET in it.
7046 This includes the places CLOBBERed, and anything that might
7047 alias with something that is SET or CLOBBERed.
7049 W points to the writes_memory for this insn, a struct write_data
7050 saying which kinds of memory references must be invalidated.
7051 X is the pattern of the insn. */
7054 invalidate_from_clobbers (w
, x
)
7055 struct write_data
*w
;
7058 /* If W->var is not set, W specifies no action.
7059 If W->all is set, this step gets all memory refs
7060 so they can be ignored in the rest of this function. */
7062 invalidate_memory (w
);
7066 if (reg_tick
[STACK_POINTER_REGNUM
] >= 0)
7067 reg_tick
[STACK_POINTER_REGNUM
]++;
7069 /* This should be *very* rare. */
7070 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
7071 invalidate (stack_pointer_rtx
);
7074 if (GET_CODE (x
) == CLOBBER
)
7076 rtx ref
= XEXP (x
, 0);
7078 && (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7079 || (GET_CODE (ref
) == MEM
&& ! w
->all
)))
7082 else if (GET_CODE (x
) == PARALLEL
)
7085 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
7087 register rtx y
= XVECEXP (x
, 0, i
);
7088 if (GET_CODE (y
) == CLOBBER
)
7090 rtx ref
= XEXP (y
, 0);
7092 &&(GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7093 || (GET_CODE (ref
) == MEM
&& !w
->all
)))
7100 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7101 and replace any registers in them with either an equivalent constant
7102 or the canonical form of the register. If we are inside an address,
7103 only do this if the address remains valid.
7105 OBJECT is 0 except when within a MEM in which case it is the MEM.
7107 Return the replacement for X. */
7110 cse_process_notes (x
, object
)
7114 enum rtx_code code
= GET_CODE (x
);
7115 char *fmt
= GET_RTX_FORMAT (code
);
7132 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), x
);
7137 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
7138 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
7140 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
7146 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
7147 /* We don't substitute VOIDmode constants into these rtx,
7148 since they would impede folding. */
7149 if (GET_MODE (new) != VOIDmode
)
7150 validate_change (object
, &XEXP (x
, 0), new, 0);
7155 i
= reg_qty
[REGNO (x
)];
7157 /* Return a constant or a constant register. */
7158 if (REGNO_QTY_VALID_P (REGNO (x
))
7159 && qty_const
[i
] != 0
7160 && (CONSTANT_P (qty_const
[i
])
7161 || GET_CODE (qty_const
[i
]) == REG
))
7163 rtx
new = gen_lowpart_if_possible (GET_MODE (x
), qty_const
[i
]);
7168 /* Otherwise, canonicalize this register. */
7169 return canon_reg (x
, NULL_RTX
);
7172 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
7174 validate_change (object
, &XEXP (x
, i
),
7175 cse_process_notes (XEXP (x
, i
), object
), NULL_RTX
);
7180 /* Find common subexpressions between the end test of a loop and the beginning
7181 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7183 Often we have a loop where an expression in the exit test is used
7184 in the body of the loop. For example "while (*p) *q++ = *p++;".
7185 Because of the way we duplicate the loop exit test in front of the loop,
7186 however, we don't detect that common subexpression. This will be caught
7187 when global cse is implemented, but this is a quite common case.
7189 This function handles the most common cases of these common expressions.
7190 It is called after we have processed the basic block ending with the
7191 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7192 jumps to a label used only once. */
7195 cse_around_loop (loop_start
)
7200 struct table_elt
*p
;
7202 /* If the jump at the end of the loop doesn't go to the start, we don't
7204 for (insn
= PREV_INSN (loop_start
);
7205 insn
&& (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) >= 0);
7206 insn
= PREV_INSN (insn
))
7210 || GET_CODE (insn
) != NOTE
7211 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
7214 /* If the last insn of the loop (the end test) was an NE comparison,
7215 we will interpret it as an EQ comparison, since we fell through
7216 the loop. Any equivalences resulting from that comparison are
7217 therefore not valid and must be invalidated. */
7218 if (last_jump_equiv_class
)
7219 for (p
= last_jump_equiv_class
->first_same_value
; p
;
7220 p
= p
->next_same_value
)
7221 if (GET_CODE (p
->exp
) == MEM
|| GET_CODE (p
->exp
) == REG
7222 || GET_CODE (p
->exp
) == SUBREG
)
7223 invalidate (p
->exp
);
7225 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7226 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7228 The only thing we do with SET_DEST is invalidate entries, so we
7229 can safely process each SET in order. It is slightly less efficient
7230 to do so, but we only want to handle the most common cases. */
7232 for (insn
= NEXT_INSN (loop_start
);
7233 GET_CODE (insn
) != CALL_INSN
&& GET_CODE (insn
) != CODE_LABEL
7234 && ! (GET_CODE (insn
) == NOTE
7235 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
7236 insn
= NEXT_INSN (insn
))
7238 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7239 && (GET_CODE (PATTERN (insn
)) == SET
7240 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
7241 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
7242 else if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7243 && GET_CODE (PATTERN (insn
)) == PARALLEL
)
7244 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7245 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
7246 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
7247 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
7252 /* Variable used for communications between the next two routines. */
7254 static struct write_data skipped_writes_memory
;
7256 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7257 since they are done elsewhere. This function is called via note_stores. */
7260 invalidate_skipped_set (dest
, set
)
7264 if (GET_CODE (set
) == CLOBBER
7271 if (GET_CODE (dest
) == MEM
)
7272 note_mem_written (dest
, &skipped_writes_memory
);
7274 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7275 || (! skipped_writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
7279 /* Invalidate all insns from START up to the end of the function or the
7280 next label. This called when we wish to CSE around a block that is
7281 conditionally executed. */
7284 invalidate_skipped_block (start
)
7289 static struct write_data init
= {0, 0, 0, 0};
7290 static struct write_data everything
= {0, 1, 1, 1};
7292 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
7293 insn
= NEXT_INSN (insn
))
7295 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
7298 skipped_writes_memory
= init
;
7300 if (GET_CODE (insn
) == CALL_INSN
)
7302 invalidate_for_call ();
7303 skipped_writes_memory
= everything
;
7306 note_stores (PATTERN (insn
), invalidate_skipped_set
);
7307 invalidate_from_clobbers (&skipped_writes_memory
, PATTERN (insn
));
7311 /* Used for communication between the following two routines; contains a
7312 value to be checked for modification. */
7314 static rtx cse_check_loop_start_value
;
7316 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7317 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7320 cse_check_loop_start (x
, set
)
7324 if (cse_check_loop_start_value
== 0
7325 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
7328 if ((GET_CODE (x
) == MEM
&& GET_CODE (cse_check_loop_start_value
) == MEM
)
7329 || reg_overlap_mentioned_p (x
, cse_check_loop_start_value
))
7330 cse_check_loop_start_value
= 0;
7333 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7334 a loop that starts with the label at LOOP_START.
7336 If X is a SET, we see if its SET_SRC is currently in our hash table.
7337 If so, we see if it has a value equal to some register used only in the
7338 loop exit code (as marked by jump.c).
7340 If those two conditions are true, we search backwards from the start of
7341 the loop to see if that same value was loaded into a register that still
7342 retains its value at the start of the loop.
7344 If so, we insert an insn after the load to copy the destination of that
7345 load into the equivalent register and (try to) replace our SET_SRC with that
7348 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7351 cse_set_around_loop (x
, insn
, loop_start
)
7357 struct table_elt
*src_elt
;
7358 static struct write_data init
= {0, 0, 0, 0};
7359 struct write_data writes_memory
;
7361 writes_memory
= init
;
7363 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7364 are setting PC or CC0 or whose SET_SRC is already a register. */
7365 if (GET_CODE (x
) == SET
7366 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
7367 && GET_CODE (SET_SRC (x
)) != REG
)
7369 src_elt
= lookup (SET_SRC (x
),
7370 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
7371 GET_MODE (SET_DEST (x
)));
7374 for (src_elt
= src_elt
->first_same_value
; src_elt
;
7375 src_elt
= src_elt
->next_same_value
)
7376 if (GET_CODE (src_elt
->exp
) == REG
&& REG_LOOP_TEST_P (src_elt
->exp
)
7377 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
7381 /* Look for an insn in front of LOOP_START that sets
7382 something in the desired mode to SET_SRC (x) before we hit
7383 a label or CALL_INSN. */
7385 for (p
= prev_nonnote_insn (loop_start
);
7386 p
&& GET_CODE (p
) != CALL_INSN
7387 && GET_CODE (p
) != CODE_LABEL
;
7388 p
= prev_nonnote_insn (p
))
7389 if ((set
= single_set (p
)) != 0
7390 && GET_CODE (SET_DEST (set
)) == REG
7391 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
7392 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
7394 /* We now have to ensure that nothing between P
7395 and LOOP_START modified anything referenced in
7396 SET_SRC (x). We know that nothing within the loop
7397 can modify it, or we would have invalidated it in
7401 cse_check_loop_start_value
= SET_SRC (x
);
7402 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
7403 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
7404 note_stores (PATTERN (q
), cse_check_loop_start
);
7406 /* If nothing was changed and we can replace our
7407 SET_SRC, add an insn after P to copy its destination
7408 to what we will be replacing SET_SRC with. */
7409 if (cse_check_loop_start_value
7410 && validate_change (insn
, &SET_SRC (x
),
7412 emit_insn_after (gen_move_insn (src_elt
->exp
,
7420 /* Now invalidate anything modified by X. */
7421 note_mem_written (SET_DEST (x
), &writes_memory
);
7423 if (writes_memory
.var
)
7424 invalidate_memory (&writes_memory
);
7426 /* See comment on similar code in cse_insn for explanation of these tests. */
7427 if (GET_CODE (SET_DEST (x
)) == REG
|| GET_CODE (SET_DEST (x
)) == SUBREG
7428 || (GET_CODE (SET_DEST (x
)) == MEM
&& ! writes_memory
.all
7429 && ! cse_rtx_addr_varies_p (SET_DEST (x
))))
7430 invalidate (SET_DEST (x
));
7433 /* Find the end of INSN's basic block and return its range,
7434 the total number of SETs in all the insns of the block, the last insn of the
7435 block, and the branch path.
7437 The branch path indicates which branches should be followed. If a non-zero
7438 path size is specified, the block should be rescanned and a different set
7439 of branches will be taken. The branch path is only used if
7440 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
7442 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
7443 used to describe the block. It is filled in with the information about
7444 the current block. The incoming structure's branch path, if any, is used
7445 to construct the output branch path. */
7448 cse_end_of_basic_block (insn
, data
, follow_jumps
, after_loop
, skip_blocks
)
7450 struct cse_basic_block_data
*data
;
7457 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
7458 rtx next
= GET_RTX_CLASS (GET_CODE (insn
)) == 'i' ? insn
: next_real_insn (insn
);
7459 int path_size
= data
->path_size
;
7463 /* Update the previous branch path, if any. If the last branch was
7464 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
7465 shorten the path by one and look at the previous branch. We know that
7466 at least one branch must have been taken if PATH_SIZE is non-zero. */
7467 while (path_size
> 0)
7469 if (data
->path
[path_size
- 1].status
!= NOT_TAKEN
)
7471 data
->path
[path_size
- 1].status
= NOT_TAKEN
;
7478 /* Scan to end of this basic block. */
7479 while (p
&& GET_CODE (p
) != CODE_LABEL
)
7481 /* Don't cse out the end of a loop. This makes a difference
7482 only for the unusual loops that always execute at least once;
7483 all other loops have labels there so we will stop in any case.
7484 Cse'ing out the end of the loop is dangerous because it
7485 might cause an invariant expression inside the loop
7486 to be reused after the end of the loop. This would make it
7487 hard to move the expression out of the loop in loop.c,
7488 especially if it is one of several equivalent expressions
7489 and loop.c would like to eliminate it.
7491 If we are running after loop.c has finished, we can ignore
7492 the NOTE_INSN_LOOP_END. */
7494 if (! after_loop
&& GET_CODE (p
) == NOTE
7495 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
7498 /* Don't cse over a call to setjmp; on some machines (eg vax)
7499 the regs restored by the longjmp come from
7500 a later time than the setjmp. */
7501 if (GET_CODE (p
) == NOTE
7502 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
7505 /* A PARALLEL can have lots of SETs in it,
7506 especially if it is really an ASM_OPERANDS. */
7507 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
7508 && GET_CODE (PATTERN (p
)) == PARALLEL
)
7509 nsets
+= XVECLEN (PATTERN (p
), 0);
7510 else if (GET_CODE (p
) != NOTE
)
7513 /* Ignore insns made by CSE; they cannot affect the boundaries of
7516 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
7517 high_cuid
= INSN_CUID (p
);
7518 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
7519 low_cuid
= INSN_CUID (p
);
7521 /* See if this insn is in our branch path. If it is and we are to
7523 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
7525 if (data
->path
[path_entry
].status
!= NOT_TAKEN
)
7528 /* Point to next entry in path, if any. */
7532 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
7533 was specified, we haven't reached our maximum path length, there are
7534 insns following the target of the jump, this is the only use of the
7535 jump label, and the target label is preceded by a BARRIER.
7537 Alternatively, we can follow the jump if it branches around a
7538 block of code and there are no other branches into the block.
7539 In this case invalidate_skipped_block will be called to invalidate any
7540 registers set in the block when following the jump. */
7542 else if ((follow_jumps
|| skip_blocks
) && path_size
< PATHLENGTH
- 1
7543 && GET_CODE (p
) == JUMP_INSN
7544 && GET_CODE (PATTERN (p
)) == SET
7545 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
7546 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
7547 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
7549 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
7550 if ((GET_CODE (q
) != NOTE
7551 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
7552 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_SETJMP
)
7553 && (GET_CODE (q
) != CODE_LABEL
|| LABEL_NUSES (q
) != 0))
7556 /* If we ran into a BARRIER, this code is an extension of the
7557 basic block when the branch is taken. */
7558 if (follow_jumps
&& q
!= 0 && GET_CODE (q
) == BARRIER
)
7560 /* Don't allow ourself to keep walking around an
7561 always-executed loop. */
7562 if (next_real_insn (q
) == next
)
7568 /* Similarly, don't put a branch in our path more than once. */
7569 for (i
= 0; i
< path_entry
; i
++)
7570 if (data
->path
[i
].branch
== p
)
7573 if (i
!= path_entry
)
7576 data
->path
[path_entry
].branch
= p
;
7577 data
->path
[path_entry
++].status
= TAKEN
;
7579 /* This branch now ends our path. It was possible that we
7580 didn't see this branch the last time around (when the
7581 insn in front of the target was a JUMP_INSN that was
7582 turned into a no-op). */
7583 path_size
= path_entry
;
7586 /* Mark block so we won't scan it again later. */
7587 PUT_MODE (NEXT_INSN (p
), QImode
);
7589 /* Detect a branch around a block of code. */
7590 else if (skip_blocks
&& q
!= 0 && GET_CODE (q
) != CODE_LABEL
)
7594 if (next_real_insn (q
) == next
)
7600 for (i
= 0; i
< path_entry
; i
++)
7601 if (data
->path
[i
].branch
== p
)
7604 if (i
!= path_entry
)
7607 /* This is no_labels_between_p (p, q) with an added check for
7608 reaching the end of a function (in case Q precedes P). */
7609 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
7610 if (GET_CODE (tmp
) == CODE_LABEL
)
7615 data
->path
[path_entry
].branch
= p
;
7616 data
->path
[path_entry
++].status
= AROUND
;
7618 path_size
= path_entry
;
7621 /* Mark block so we won't scan it again later. */
7622 PUT_MODE (NEXT_INSN (p
), QImode
);
7629 data
->low_cuid
= low_cuid
;
7630 data
->high_cuid
= high_cuid
;
7631 data
->nsets
= nsets
;
7634 /* If all jumps in the path are not taken, set our path length to zero
7635 so a rescan won't be done. */
7636 for (i
= path_size
- 1; i
>= 0; i
--)
7637 if (data
->path
[i
].status
!= NOT_TAKEN
)
7641 data
->path_size
= 0;
7643 data
->path_size
= path_size
;
7645 /* End the current branch path. */
7646 data
->path
[path_size
].branch
= 0;
7649 /* Perform cse on the instructions of a function.
7650 F is the first instruction.
7651 NREGS is one plus the highest pseudo-reg number used in the instruction.
7653 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7654 (only if -frerun-cse-after-loop).
7656 Returns 1 if jump_optimize should be redone due to simplifications
7657 in conditional jump instructions. */
7660 cse_main (f
, nregs
, after_loop
, file
)
7666 struct cse_basic_block_data val
;
7667 register rtx insn
= f
;
7670 cse_jumps_altered
= 0;
7671 constant_pool_entries_cost
= 0;
7678 all_minus_one
= (int *) alloca (nregs
* sizeof (int));
7679 consec_ints
= (int *) alloca (nregs
* sizeof (int));
7681 for (i
= 0; i
< nregs
; i
++)
7683 all_minus_one
[i
] = -1;
7687 reg_next_eqv
= (int *) alloca (nregs
* sizeof (int));
7688 reg_prev_eqv
= (int *) alloca (nregs
* sizeof (int));
7689 reg_qty
= (int *) alloca (nregs
* sizeof (int));
7690 reg_in_table
= (int *) alloca (nregs
* sizeof (int));
7691 reg_tick
= (int *) alloca (nregs
* sizeof (int));
7693 /* Discard all the free elements of the previous function
7694 since they are allocated in the temporarily obstack. */
7695 bzero (table
, sizeof table
);
7696 free_element_chain
= 0;
7697 n_elements_made
= 0;
7699 /* Find the largest uid. */
7701 max_uid
= get_max_uid ();
7702 uid_cuid
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
7703 bzero (uid_cuid
, (max_uid
+ 1) * sizeof (int));
7705 /* Compute the mapping from uids to cuids.
7706 CUIDs are numbers assigned to insns, like uids,
7707 except that cuids increase monotonically through the code.
7708 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7709 between two insns is not affected by -g. */
7711 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
7713 if (GET_CODE (insn
) != NOTE
7714 || NOTE_LINE_NUMBER (insn
) < 0)
7715 INSN_CUID (insn
) = ++i
;
7717 /* Give a line number note the same cuid as preceding insn. */
7718 INSN_CUID (insn
) = i
;
7721 /* Initialize which registers are clobbered by calls. */
7723 CLEAR_HARD_REG_SET (regs_invalidated_by_call
);
7725 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
7726 if ((call_used_regs
[i
]
7727 /* Used to check !fixed_regs[i] here, but that isn't safe;
7728 fixed regs are still call-clobbered, and sched can get
7729 confused if they can "live across calls".
7731 The frame pointer is always preserved across calls. The arg
7732 pointer is if it is fixed. The stack pointer usually is, unless
7733 RETURN_POPS_ARGS, in which case an explicit CLOBBER
7734 will be present. If we are generating PIC code, the PIC offset
7735 table register is preserved across calls. */
7737 && i
!= STACK_POINTER_REGNUM
7738 && i
!= FRAME_POINTER_REGNUM
7739 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
7740 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
7742 #ifdef PIC_OFFSET_TABLE_REGNUM
7743 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
7747 SET_HARD_REG_BIT (regs_invalidated_by_call
, i
);
7749 /* Loop over basic blocks.
7750 Compute the maximum number of qty's needed for each basic block
7751 (which is 2 for each SET). */
7755 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
7756 flag_cse_skip_blocks
);
7758 /* If this basic block was already processed or has no sets, skip it. */
7759 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
7761 PUT_MODE (insn
, VOIDmode
);
7762 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
7767 cse_basic_block_start
= val
.low_cuid
;
7768 cse_basic_block_end
= val
.high_cuid
;
7769 max_qty
= val
.nsets
* 2;
7772 fprintf (file
, ";; Processing block from %d to %d, %d sets.\n",
7773 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
7776 /* Make MAX_QTY bigger to give us room to optimize
7777 past the end of this basic block, if that should prove useful. */
7783 /* If this basic block is being extended by following certain jumps,
7784 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7785 Otherwise, we start after this basic block. */
7786 if (val
.path_size
> 0)
7787 cse_basic_block (insn
, val
.last
, val
.path
, 0);
7790 int old_cse_jumps_altered
= cse_jumps_altered
;
7793 /* When cse changes a conditional jump to an unconditional
7794 jump, we want to reprocess the block, since it will give
7795 us a new branch path to investigate. */
7796 cse_jumps_altered
= 0;
7797 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
7798 if (cse_jumps_altered
== 0
7799 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
7802 cse_jumps_altered
|= old_cse_jumps_altered
;
7810 /* Tell refers_to_mem_p that qty_const info is not available. */
7813 if (max_elements_made
< n_elements_made
)
7814 max_elements_made
= n_elements_made
;
7816 return cse_jumps_altered
;
7819 /* Process a single basic block. FROM and TO and the limits of the basic
7820 block. NEXT_BRANCH points to the branch path when following jumps or
7821 a null path when not following jumps.
7823 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
7824 loop. This is true when we are being called for the last time on a
7825 block and this CSE pass is before loop.c. */
7828 cse_basic_block (from
, to
, next_branch
, around_loop
)
7829 register rtx from
, to
;
7830 struct branch_path
*next_branch
;
7835 int in_libcall_block
= 0;
7837 /* Each of these arrays is undefined before max_reg, so only allocate
7838 the space actually needed and adjust the start below. */
7840 qty_first_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
7841 qty_last_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
7842 qty_mode
= (enum machine_mode
*) alloca ((max_qty
- max_reg
) * sizeof (enum machine_mode
));
7843 qty_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
7844 qty_const_insn
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
7846 = (enum rtx_code
*) alloca ((max_qty
- max_reg
) * sizeof (enum rtx_code
));
7847 qty_comparison_qty
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
7848 qty_comparison_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
7850 qty_first_reg
-= max_reg
;
7851 qty_last_reg
-= max_reg
;
7852 qty_mode
-= max_reg
;
7853 qty_const
-= max_reg
;
7854 qty_const_insn
-= max_reg
;
7855 qty_comparison_code
-= max_reg
;
7856 qty_comparison_qty
-= max_reg
;
7857 qty_comparison_const
-= max_reg
;
7861 /* TO might be a label. If so, protect it from being deleted. */
7862 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
7865 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
7867 register enum rtx_code code
;
7869 /* See if this is a branch that is part of the path. If so, and it is
7870 to be taken, do so. */
7871 if (next_branch
->branch
== insn
)
7873 enum taken status
= next_branch
++->status
;
7874 if (status
!= NOT_TAKEN
)
7876 if (status
== TAKEN
)
7877 record_jump_equiv (insn
, 1);
7879 invalidate_skipped_block (NEXT_INSN (insn
));
7881 /* Set the last insn as the jump insn; it doesn't affect cc0.
7882 Then follow this branch. */
7887 insn
= JUMP_LABEL (insn
);
7892 code
= GET_CODE (insn
);
7893 if (GET_MODE (insn
) == QImode
)
7894 PUT_MODE (insn
, VOIDmode
);
7896 if (GET_RTX_CLASS (code
) == 'i')
7898 /* Process notes first so we have all notes in canonical forms when
7899 looking for duplicate operations. */
7901 if (REG_NOTES (insn
))
7902 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
7904 /* Track when we are inside in LIBCALL block. Inside such a block,
7905 we do not want to record destinations. The last insn of a
7906 LIBCALL block is not considered to be part of the block, since
7907 its destination is the result of the block and hence should be
7910 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
7911 in_libcall_block
= 1;
7912 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
7913 in_libcall_block
= 0;
7915 cse_insn (insn
, in_libcall_block
);
7918 /* If INSN is now an unconditional jump, skip to the end of our
7919 basic block by pretending that we just did the last insn in the
7920 basic block. If we are jumping to the end of our block, show
7921 that we can have one usage of TO. */
7923 if (simplejump_p (insn
))
7928 if (JUMP_LABEL (insn
) == to
)
7931 /* Maybe TO was deleted because the jump is unconditional.
7932 If so, there is nothing left in this basic block. */
7933 /* ??? Perhaps it would be smarter to set TO
7934 to whatever follows this insn,
7935 and pretend the basic block had always ended here. */
7936 if (INSN_DELETED_P (to
))
7939 insn
= PREV_INSN (to
);
7942 /* See if it is ok to keep on going past the label
7943 which used to end our basic block. Remember that we incremented
7944 the count of that label, so we decrement it here. If we made
7945 a jump unconditional, TO_USAGE will be one; in that case, we don't
7946 want to count the use in that jump. */
7948 if (to
!= 0 && NEXT_INSN (insn
) == to
7949 && GET_CODE (to
) == CODE_LABEL
&& --LABEL_NUSES (to
) == to_usage
)
7951 struct cse_basic_block_data val
;
7953 insn
= NEXT_INSN (to
);
7955 if (LABEL_NUSES (to
) == 0)
7958 /* Find the end of the following block. Note that we won't be
7959 following branches in this case. If TO was the last insn
7960 in the function, we are done. Similarly, if we deleted the
7961 insn after TO, it must have been because it was preceded by
7962 a BARRIER. In that case, we are done with this block because it
7963 has no continuation. */
7965 if (insn
== 0 || INSN_DELETED_P (insn
))
7970 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
7972 /* If the tables we allocated have enough space left
7973 to handle all the SETs in the next basic block,
7974 continue through it. Otherwise, return,
7975 and that block will be scanned individually. */
7976 if (val
.nsets
* 2 + next_qty
> max_qty
)
7979 cse_basic_block_start
= val
.low_cuid
;
7980 cse_basic_block_end
= val
.high_cuid
;
7983 /* Prevent TO from being deleted if it is a label. */
7984 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
7987 /* Back up so we process the first insn in the extension. */
7988 insn
= PREV_INSN (insn
);
7992 if (next_qty
> max_qty
)
7995 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7996 the previous insn is the only insn that branches to the head of a loop,
7997 we can cse into the loop. Don't do this if we changed the jump
7998 structure of a loop unless we aren't going to be following jumps. */
8000 if ((cse_jumps_altered
== 0
8001 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8002 && around_loop
&& to
!= 0
8003 && GET_CODE (to
) == NOTE
&& NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
8004 && GET_CODE (PREV_INSN (to
)) == JUMP_INSN
8005 && JUMP_LABEL (PREV_INSN (to
)) != 0
8006 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to
))) == 1)
8007 cse_around_loop (JUMP_LABEL (PREV_INSN (to
)));
8009 return to
? NEXT_INSN (to
) : 0;
8012 /* Count the number of times registers are used (not set) in X.
8013 COUNTS is an array in which we accumulate the count, INCR is how much
8014 we count each register usage. */
8017 count_reg_usage (x
, counts
, incr
)
8022 enum rtx_code code
= GET_CODE (x
);
8029 counts
[REGNO (x
)] += incr
;
8043 /* Unless we are setting a REG, count everything in SET_DEST. */
8044 if (GET_CODE (SET_DEST (x
)) != REG
)
8045 count_reg_usage (SET_DEST (x
), counts
, incr
);
8046 count_reg_usage (SET_SRC (x
), counts
, incr
);
8052 count_reg_usage (PATTERN (x
), counts
, incr
);
8054 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8058 count_reg_usage (REG_NOTES (x
), counts
, incr
);
8063 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
8064 count_reg_usage (XEXP (x
, 0), counts
, incr
);
8066 count_reg_usage (XEXP (x
, 1), counts
, incr
);
8070 fmt
= GET_RTX_FORMAT (code
);
8071 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
8074 count_reg_usage (XEXP (x
, i
), counts
, incr
);
8075 else if (fmt
[i
] == 'E')
8076 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8077 count_reg_usage (XVECEXP (x
, i
, j
), counts
, incr
);
8081 /* Scan all the insns and delete any that are dead; i.e., they store a register
8082 that is never used or they copy a register to itself.
8084 This is used to remove insns made obviously dead by cse. It improves the
8085 heuristics in loop since it won't try to move dead invariants out of loops
8086 or make givs for dead quantities. The remaining passes of the compilation
8087 are also sped up. */
8090 delete_dead_from_cse (insns
, nreg
)
8094 int *counts
= (int *) alloca (nreg
* sizeof (int));
8100 /* First count the number of times each register is used. */
8101 bzero (counts
, sizeof (int) * nreg
);
8102 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
8103 count_reg_usage (insn
, counts
, 1);
8105 /* Go from the last insn to the first and delete insns that only set unused
8106 registers or copy a register to itself. As we delete an insn, remove
8107 usage counts for registers it uses. */
8108 for (insn
= prev_real_insn (get_last_insn ()); insn
; insn
= prev
)
8112 prev
= prev_real_insn (insn
);
8114 /* Don't delete any insns that are part of a libcall block.
8115 Flow or loop might get confused if we did that. Remember
8116 that we are scanning backwards. */
8117 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8122 else if (GET_CODE (PATTERN (insn
)) == SET
)
8124 if (GET_CODE (SET_DEST (PATTERN (insn
))) == REG
8125 && SET_DEST (PATTERN (insn
)) == SET_SRC (PATTERN (insn
)))
8129 else if (GET_CODE (SET_DEST (PATTERN (insn
))) == CC0
8130 && ! side_effects_p (SET_SRC (PATTERN (insn
)))
8131 && ((tem
= next_nonnote_insn (insn
)) == 0
8132 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8133 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8136 else if (GET_CODE (SET_DEST (PATTERN (insn
))) != REG
8137 || REGNO (SET_DEST (PATTERN (insn
))) < FIRST_PSEUDO_REGISTER
8138 || counts
[REGNO (SET_DEST (PATTERN (insn
)))] != 0
8139 || side_effects_p (SET_SRC (PATTERN (insn
))))
8142 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
8143 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
8145 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
8147 if (GET_CODE (elt
) == SET
)
8149 if (GET_CODE (SET_DEST (elt
)) == REG
8150 && SET_DEST (elt
) == SET_SRC (elt
))
8154 else if (GET_CODE (SET_DEST (elt
)) == CC0
8155 && ! side_effects_p (SET_SRC (elt
))
8156 && ((tem
= next_nonnote_insn (insn
)) == 0
8157 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8158 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8161 else if (GET_CODE (SET_DEST (elt
)) != REG
8162 || REGNO (SET_DEST (elt
)) < FIRST_PSEUDO_REGISTER
8163 || counts
[REGNO (SET_DEST (elt
))] != 0
8164 || side_effects_p (SET_SRC (elt
)))
8167 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
8173 /* If this is a dead insn, delete it and show registers in it aren't
8178 count_reg_usage (insn
, counts
, -1);
8182 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))