1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
24 #include "hard-reg-set.h"
27 #include "insn-config.h"
33 /* The basic idea of common subexpression elimination is to go
34 through the code, keeping a record of expressions that would
35 have the same value at the current scan point, and replacing
36 expressions encountered with the cheapest equivalent expression.
38 It is too complicated to keep track of the different possibilities
39 when control paths merge; so, at each label, we forget all that is
40 known and start fresh. This can be described as processing each
41 basic block separately. Note, however, that these are not quite
42 the same as the basic blocks found by a later pass and used for
43 data flow analysis and register packing. We do not need to start fresh
44 after a conditional jump instruction if there is no label there.
46 We use two data structures to record the equivalent expressions:
47 a hash table for most expressions, and several vectors together
48 with "quantity numbers" to record equivalent (pseudo) registers.
50 The use of the special data structure for registers is desirable
51 because it is faster. It is possible because registers references
52 contain a fairly small number, the register number, taken from
53 a contiguously allocated series, and two register references are
54 identical if they have the same number. General expressions
55 do not have any such thing, so the only way to retrieve the
56 information recorded on an expression other than a register
57 is to keep it in a hash table.
59 Registers and "quantity numbers":
61 At the start of each basic block, all of the (hardware and pseudo)
62 registers used in the function are given distinct quantity
63 numbers to indicate their contents. During scan, when the code
64 copies one register into another, we copy the quantity number.
65 When a register is loaded in any other way, we allocate a new
66 quantity number to describe the value generated by this operation.
67 `reg_qty' records what quantity a register is currently thought
70 All real quantity numbers are greater than or equal to `max_reg'.
71 If register N has not been assigned a quantity, reg_qty[N] will equal N.
73 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
74 variables should be referenced with an index below `max_reg'.
76 We also maintain a bidirectional chain of registers for each
77 quantity number. `qty_first_reg', `qty_last_reg',
78 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
80 The first register in a chain is the one whose lifespan is least local.
81 Among equals, it is the one that was seen first.
82 We replace any equivalent register with that one.
84 If two registers have the same quantity number, it must be true that
85 REG expressions with `qty_mode' must be in the hash table for both
86 registers and must be in the same class.
88 The converse is not true. Since hard registers may be referenced in
89 any mode, two REG expressions might be equivalent in the hash table
90 but not have the same quantity number if the quantity number of one
91 of the registers is not the same mode as those expressions.
93 Constants and quantity numbers
95 When a quantity has a known constant value, that value is stored
96 in the appropriate element of qty_const. This is in addition to
97 putting the constant in the hash table as is usual for non-regs.
99 Whether a reg or a constant is preferred is determined by the configuration
100 macro CONST_COSTS and will often depend on the constant value. In any
101 event, expressions containing constants can be simplified, by fold_rtx.
103 When a quantity has a known nearly constant value (such as an address
104 of a stack slot), that value is stored in the appropriate element
107 Integer constants don't have a machine mode. However, cse
108 determines the intended machine mode from the destination
109 of the instruction that moves the constant. The machine mode
110 is recorded in the hash table along with the actual RTL
111 constant expression so that different modes are kept separate.
115 To record known equivalences among expressions in general
116 we use a hash table called `table'. It has a fixed number of buckets
117 that contain chains of `struct table_elt' elements for expressions.
118 These chains connect the elements whose expressions have the same
121 Other chains through the same elements connect the elements which
122 currently have equivalent values.
124 Register references in an expression are canonicalized before hashing
125 the expression. This is done using `reg_qty' and `qty_first_reg'.
126 The hash code of a register reference is computed using the quantity
127 number, not the register number.
129 When the value of an expression changes, it is necessary to remove from the
130 hash table not just that expression but all expressions whose values
131 could be different as a result.
133 1. If the value changing is in memory, except in special cases
134 ANYTHING referring to memory could be changed. That is because
135 nobody knows where a pointer does not point.
136 The function `invalidate_memory' removes what is necessary.
138 The special cases are when the address is constant or is
139 a constant plus a fixed register such as the frame pointer
140 or a static chain pointer. When such addresses are stored in,
141 we can tell exactly which other such addresses must be invalidated
142 due to overlap. `invalidate' does this.
143 All expressions that refer to non-constant
144 memory addresses are also invalidated. `invalidate_memory' does this.
146 2. If the value changing is a register, all expressions
147 containing references to that register, and only those,
150 Because searching the entire hash table for expressions that contain
151 a register is very slow, we try to figure out when it isn't necessary.
152 Precisely, this is necessary only when expressions have been
153 entered in the hash table using this register, and then the value has
154 changed, and then another expression wants to be added to refer to
155 the register's new value. This sequence of circumstances is rare
156 within any one basic block.
158 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
159 reg_tick[i] is incremented whenever a value is stored in register i.
160 reg_in_table[i] holds -1 if no references to register i have been
161 entered in the table; otherwise, it contains the value reg_tick[i] had
162 when the references were entered. If we want to enter a reference
163 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
164 Until we want to enter a new entry, the mere fact that the two vectors
165 don't match makes the entries be ignored if anyone tries to match them.
167 Registers themselves are entered in the hash table as well as in
168 the equivalent-register chains. However, the vectors `reg_tick'
169 and `reg_in_table' do not apply to expressions which are simple
170 register references. These expressions are removed from the table
171 immediately when they become invalid, and this can be done even if
172 we do not immediately search for all the expressions that refer to
175 A CLOBBER rtx in an instruction invalidates its operand for further
176 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
177 invalidates everything that resides in memory.
181 Constant expressions that differ only by an additive integer
182 are called related. When a constant expression is put in
183 the table, the related expression with no constant term
184 is also entered. These are made to point at each other
185 so that it is possible to find out if there exists any
186 register equivalent to an expression related to a given expression. */
188 /* One plus largest register number used in this function. */
192 /* Length of vectors indexed by quantity number.
193 We know in advance we will not need a quantity number this big. */
197 /* Next quantity number to be allocated.
198 This is 1 + the largest number needed so far. */
202 /* Indexed by quantity number, gives the first (or last) (pseudo) register
203 in the chain of registers that currently contain this quantity. */
205 static int *qty_first_reg
;
206 static int *qty_last_reg
;
208 /* Index by quantity number, gives the mode of the quantity. */
210 static enum machine_mode
*qty_mode
;
212 /* Indexed by quantity number, gives the rtx of the constant value of the
213 quantity, or zero if it does not have a known value.
214 A sum of the frame pointer (or arg pointer) plus a constant
215 can also be entered here. */
217 static rtx
*qty_const
;
219 /* Indexed by qty number, gives the insn that stored the constant value
220 recorded in `qty_const'. */
222 static rtx
*qty_const_insn
;
224 /* The next three variables are used to track when a comparison between a
225 quantity and some constant or register has been passed. In that case, we
226 know the results of the comparison in case we see it again. These variables
227 record a comparison that is known to be true. */
229 /* Indexed by qty number, gives the rtx code of a comparison with a known
230 result involving this quantity. If none, it is UNKNOWN. */
231 static enum rtx_code
*qty_comparison_code
;
233 /* Indexed by qty number, gives the constant being compared against in a
234 comparison of known result. If no such comparison, it is undefined.
235 If the comparison is not with a constant, it is zero. */
237 static rtx
*qty_comparison_const
;
239 /* Indexed by qty number, gives the quantity being compared against in a
240 comparison of known result. If no such comparison, if it undefined.
241 If the comparison is not with a register, it is -1. */
243 static int *qty_comparison_qty
;
246 /* For machines that have a CC0, we do not record its value in the hash
247 table since its use is guaranteed to be the insn immediately following
248 its definition and any other insn is presumed to invalidate it.
250 Instead, we store below the value last assigned to CC0. If it should
251 happen to be a constant, it is stored in preference to the actual
252 assigned value. In case it is a constant, we store the mode in which
253 the constant should be interpreted. */
255 static rtx prev_insn_cc0
;
256 static enum machine_mode prev_insn_cc0_mode
;
259 /* Previous actual insn. 0 if at first insn of basic block. */
261 static rtx prev_insn
;
263 /* Insn being scanned. */
265 static rtx this_insn
;
267 /* Index by (pseudo) register number, gives the quantity number
268 of the register's current contents. */
272 /* Index by (pseudo) register number, gives the number of the next (or
273 previous) (pseudo) register in the chain of registers sharing the same
276 Or -1 if this register is at the end of the chain.
278 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
280 static int *reg_next_eqv
;
281 static int *reg_prev_eqv
;
283 /* Index by (pseudo) register number, gives the number of times
284 that register has been altered in the current basic block. */
286 static int *reg_tick
;
288 /* Index by (pseudo) register number, gives the reg_tick value at which
289 rtx's containing this register are valid in the hash table.
290 If this does not equal the current reg_tick value, such expressions
291 existing in the hash table are invalid.
292 If this is -1, no expressions containing this register have been
293 entered in the table. */
295 static int *reg_in_table
;
297 /* A HARD_REG_SET containing all the hard registers for which there is
298 currently a REG expression in the hash table. Note the difference
299 from the above variables, which indicate if the REG is mentioned in some
300 expression in the table. */
302 static HARD_REG_SET hard_regs_in_table
;
304 /* A HARD_REG_SET containing all the hard registers that are invalidated
307 static HARD_REG_SET regs_invalidated_by_call
;
309 /* Two vectors of ints:
310 one containing max_reg -1's; the other max_reg + 500 (an approximation
311 for max_qty) elements where element i contains i.
312 These are used to initialize various other vectors fast. */
314 static int *all_minus_one
;
315 static int *consec_ints
;
317 /* CUID of insn that starts the basic block currently being cse-processed. */
319 static int cse_basic_block_start
;
321 /* CUID of insn that ends the basic block currently being cse-processed. */
323 static int cse_basic_block_end
;
325 /* Vector mapping INSN_UIDs to cuids.
326 The cuids are like uids but increase monotonically always.
327 We use them to see whether a reg is used outside a given basic block. */
329 static short *uid_cuid
;
331 /* Get the cuid of an insn. */
333 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
335 /* Nonzero if cse has altered conditional jump insns
336 in such a way that jump optimization should be redone. */
338 static int cse_jumps_altered
;
340 /* canon_hash stores 1 in do_not_record
341 if it notices a reference to CC0, PC, or some other volatile
344 static int do_not_record
;
346 /* canon_hash stores 1 in hash_arg_in_memory
347 if it notices a reference to memory within the expression being hashed. */
349 static int hash_arg_in_memory
;
351 /* canon_hash stores 1 in hash_arg_in_struct
352 if it notices a reference to memory that's part of a structure. */
354 static int hash_arg_in_struct
;
356 /* The hash table contains buckets which are chains of `struct table_elt's,
357 each recording one expression's information.
358 That expression is in the `exp' field.
360 Those elements with the same hash code are chained in both directions
361 through the `next_same_hash' and `prev_same_hash' fields.
363 Each set of expressions with equivalent values
364 are on a two-way chain through the `next_same_value'
365 and `prev_same_value' fields, and all point with
366 the `first_same_value' field at the first element in
367 that chain. The chain is in order of increasing cost.
368 Each element's cost value is in its `cost' field.
370 The `in_memory' field is nonzero for elements that
371 involve any reference to memory. These elements are removed
372 whenever a write is done to an unidentified location in memory.
373 To be safe, we assume that a memory address is unidentified unless
374 the address is either a symbol constant or a constant plus
375 the frame pointer or argument pointer.
377 The `in_struct' field is nonzero for elements that
378 involve any reference to memory inside a structure or array.
380 The `related_value' field is used to connect related expressions
381 (that differ by adding an integer).
382 The related expressions are chained in a circular fashion.
383 `related_value' is zero for expressions for which this
386 The `cost' field stores the cost of this element's expression.
388 The `is_const' flag is set if the element is a constant (including
391 The `flag' field is used as a temporary during some search routines.
393 The `mode' field is usually the same as GET_MODE (`exp'), but
394 if `exp' is a CONST_INT and has no machine mode then the `mode'
395 field is the mode it was being used as. Each constant is
396 recorded separately for each mode it is used with. */
402 struct table_elt
*next_same_hash
;
403 struct table_elt
*prev_same_hash
;
404 struct table_elt
*next_same_value
;
405 struct table_elt
*prev_same_value
;
406 struct table_elt
*first_same_value
;
407 struct table_elt
*related_value
;
409 enum machine_mode mode
;
418 /* We don't want a lot of buckets, because we rarely have very many
419 things stored in the hash table, and a lot of buckets slows
420 down a lot of loops that happen frequently. */
423 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
424 register (hard registers may require `do_not_record' to be set). */
427 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
428 ? ((((int) REG << 7) + reg_qty[REGNO (X)]) % NBUCKETS) \
429 : canon_hash (X, M) % NBUCKETS)
431 /* Determine whether register number N is considered a fixed register for CSE.
432 It is desirable to replace other regs with fixed regs, to reduce need for
434 A reg wins if it is either the frame pointer or designated as fixed,
435 but not if it is an overlapping register. */
436 #ifdef OVERLAPPING_REGNO_P
437 #define FIXED_REGNO_P(N) \
438 (((N) == FRAME_POINTER_REGNUM || fixed_regs[N]) \
439 && ! OVERLAPPING_REGNO_P ((N)))
441 #define FIXED_REGNO_P(N) \
442 ((N) == FRAME_POINTER_REGNUM || fixed_regs[N])
445 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
446 hard registers are the cheapest with a cost of 0. Next come pseudos
447 with a cost of one and other hard registers with a cost of 2. Aside
448 from these special cases, call `rtx_cost'. */
451 (GET_CODE (X) == REG \
452 ? (REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
453 : (FIXED_REGNO_P (REGNO (X)) \
454 && REGNO_REG_CLASS (REGNO (X)) != NO_REGS) ? 0 \
456 : rtx_cost (X, SET) * 2)
458 /* Determine if the quantity number for register X represents a valid index
459 into the `qty_...' variables. */
461 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
463 static struct table_elt
*table
[NBUCKETS
];
465 /* Chain of `struct table_elt's made so far for this function
466 but currently removed from the table. */
468 static struct table_elt
*free_element_chain
;
470 /* Number of `struct table_elt' structures made so far for this function. */
472 static int n_elements_made
;
474 /* Maximum value `n_elements_made' has had so far in this compilation
475 for functions previously processed. */
477 static int max_elements_made
;
479 /* Surviving equivalence class when two equivalence classes are merged
480 by recording the effects of a jump in the last insn. Zero if the
481 last insn was not a conditional jump. */
483 static struct table_elt
*last_jump_equiv_class
;
485 /* Set to the cost of a constant pool reference if one was found for a
486 symbolic constant. If this was found, it means we should try to
487 convert constants into constant pool entries if they don't fit in
490 static int constant_pool_entries_cost
;
492 /* Bits describing what kind of values in memory must be invalidated
493 for a particular instruction. If all three bits are zero,
494 no memory refs need to be invalidated. Each bit is more powerful
495 than the preceding ones, and if a bit is set then the preceding
498 Here is how the bits are set:
499 Pushing onto the stack invalidates only the stack pointer,
500 writing at a fixed address invalidates only variable addresses,
501 writing in a structure element at variable address
502 invalidates all but scalar variables,
503 and writing in anything else at variable address invalidates everything. */
507 int sp
: 1; /* Invalidate stack pointer. */
508 int var
: 1; /* Invalidate variable addresses. */
509 int nonscalar
: 1; /* Invalidate all but scalar variables. */
510 int all
: 1; /* Invalidate all memory refs. */
513 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
514 virtual regs here because the simplify_*_operation routines are called
515 by integrate.c, which is called before virtual register instantiation. */
517 #define FIXED_BASE_PLUS_P(X) \
518 ((X) == frame_pointer_rtx || (X) == arg_pointer_rtx \
519 || (X) == virtual_stack_vars_rtx \
520 || (X) == virtual_incoming_args_rtx \
521 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
522 && (XEXP (X, 0) == frame_pointer_rtx \
523 || XEXP (X, 0) == arg_pointer_rtx \
524 || XEXP (X, 0) == virtual_stack_vars_rtx \
525 || XEXP (X, 0) == virtual_incoming_args_rtx)))
527 /* Similar, but also allows reference to the stack pointer.
529 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
530 arg_pointer_rtx by itself is nonzero, because on at least one machine,
531 the i960, the arg pointer is zero when it is unused. */
533 #define NONZERO_BASE_PLUS_P(X) \
534 ((X) == frame_pointer_rtx \
535 || (X) == virtual_stack_vars_rtx \
536 || (X) == virtual_incoming_args_rtx \
537 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
538 && (XEXP (X, 0) == frame_pointer_rtx \
539 || XEXP (X, 0) == arg_pointer_rtx \
540 || XEXP (X, 0) == virtual_stack_vars_rtx \
541 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
542 || (X) == stack_pointer_rtx \
543 || (X) == virtual_stack_dynamic_rtx \
544 || (X) == virtual_outgoing_args_rtx \
545 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
546 && (XEXP (X, 0) == stack_pointer_rtx \
547 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
548 || XEXP (X, 0) == virtual_outgoing_args_rtx)))
550 static struct table_elt
*lookup ();
551 static void free_element ();
553 static int insert_regs ();
554 static void rehash_using_reg ();
555 static void remove_invalid_refs ();
556 static int exp_equiv_p ();
558 int refers_to_mem_p ();
559 static void invalidate_from_clobbers ();
560 static int safe_hash ();
561 static int canon_hash ();
562 static rtx
fold_rtx ();
563 static rtx
equiv_constant ();
564 static void record_jump_cond ();
565 static void note_mem_written ();
566 static int cse_rtx_addr_varies_p ();
567 static enum rtx_code
find_comparison_args ();
568 static void cse_insn ();
569 static void cse_set_around_loop ();
571 /* Return an estimate of the cost of computing rtx X.
572 One use is in cse, to decide which expression to keep in the hash table.
573 Another is in rtl generation, to pick the cheapest way to multiply.
574 Other uses like the latter are expected in the future. */
576 /* Return the right cost to give to an operation
577 to make the cost of the corresponding register-to-register instruction
578 N times that of a fast register-to-register instruction. */
580 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
583 rtx_cost (x
, outer_code
)
585 enum rtx_code outer_code
;
588 register enum rtx_code code
;
595 /* Compute the default costs of certain things.
596 Note that RTX_COSTS can override the defaults. */
602 /* Count multiplication by 2**n as a shift,
603 because if we are considering it, we would output it as a shift. */
604 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
605 && exact_log2 (INTVAL (XEXP (x
, 1))) >= 0)
608 total
= COSTS_N_INSNS (5);
614 total
= COSTS_N_INSNS (7);
617 /* Used in loop.c and combine.c as a marker. */
621 /* We don't want these to be used in substitutions because
622 we have no way of validating the resulting insn. So assign
623 anything containing an ASM_OPERANDS a very high cost. */
635 /* If we can't tie these modes, make this expensive. The larger
636 the mode, the more expensive it is. */
637 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
638 return COSTS_N_INSNS (2
639 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
642 RTX_COSTS (x
, code
, outer_code
);
644 CONST_COSTS (x
, code
, outer_code
);
647 /* Sum the costs of the sub-rtx's, plus cost of this operation,
648 which is already in total. */
650 fmt
= GET_RTX_FORMAT (code
);
651 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
653 total
+= rtx_cost (XEXP (x
, i
), code
);
654 else if (fmt
[i
] == 'E')
655 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
656 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
661 /* Clear the hash table and initialize each register with its own quantity,
662 for a new basic block. */
671 bzero (reg_tick
, max_reg
* sizeof (int));
673 bcopy (all_minus_one
, reg_in_table
, max_reg
* sizeof (int));
674 bcopy (consec_ints
, reg_qty
, max_reg
* sizeof (int));
675 CLEAR_HARD_REG_SET (hard_regs_in_table
);
677 /* The per-quantity values used to be initialized here, but it is
678 much faster to initialize each as it is made in `make_new_qty'. */
680 for (i
= 0; i
< NBUCKETS
; i
++)
682 register struct table_elt
*this, *next
;
683 for (this = table
[i
]; this; this = next
)
685 next
= this->next_same_hash
;
690 bzero (table
, sizeof table
);
699 /* Say that register REG contains a quantity not in any register before
700 and initialize that quantity. */
708 if (next_qty
>= max_qty
)
711 q
= reg_qty
[reg
] = next_qty
++;
712 qty_first_reg
[q
] = reg
;
713 qty_last_reg
[q
] = reg
;
714 qty_const
[q
] = qty_const_insn
[q
] = 0;
715 qty_comparison_code
[q
] = UNKNOWN
;
717 reg_next_eqv
[reg
] = reg_prev_eqv
[reg
] = -1;
720 /* Make reg NEW equivalent to reg OLD.
721 OLD is not changing; NEW is. */
724 make_regs_eqv (new, old
)
725 register int new, old
;
727 register int lastr
, firstr
;
728 register int q
= reg_qty
[old
];
730 /* Nothing should become eqv until it has a "non-invalid" qty number. */
731 if (! REGNO_QTY_VALID_P (old
))
735 firstr
= qty_first_reg
[q
];
736 lastr
= qty_last_reg
[q
];
738 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
739 hard regs. Among pseudos, if NEW will live longer than any other reg
740 of the same qty, and that is beyond the current basic block,
741 make it the new canonical replacement for this qty. */
742 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
743 /* Certain fixed registers might be of the class NO_REGS. This means
744 that not only can they not be allocated by the compiler, but
745 they cannot be used in substitutions or canonicalizations
747 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
748 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
749 || (new >= FIRST_PSEUDO_REGISTER
750 && (firstr
< FIRST_PSEUDO_REGISTER
751 || ((uid_cuid
[regno_last_uid
[new]] > cse_basic_block_end
752 || (uid_cuid
[regno_first_uid
[new]]
753 < cse_basic_block_start
))
754 && (uid_cuid
[regno_last_uid
[new]]
755 > uid_cuid
[regno_last_uid
[firstr
]]))))))
757 reg_prev_eqv
[firstr
] = new;
758 reg_next_eqv
[new] = firstr
;
759 reg_prev_eqv
[new] = -1;
760 qty_first_reg
[q
] = new;
764 /* If NEW is a hard reg (known to be non-fixed), insert at end.
765 Otherwise, insert before any non-fixed hard regs that are at the
766 end. Registers of class NO_REGS cannot be used as an
767 equivalent for anything. */
768 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_prev_eqv
[lastr
] >= 0
769 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
770 && new >= FIRST_PSEUDO_REGISTER
)
771 lastr
= reg_prev_eqv
[lastr
];
772 reg_next_eqv
[new] = reg_next_eqv
[lastr
];
773 if (reg_next_eqv
[lastr
] >= 0)
774 reg_prev_eqv
[reg_next_eqv
[lastr
]] = new;
776 qty_last_reg
[q
] = new;
777 reg_next_eqv
[lastr
] = new;
778 reg_prev_eqv
[new] = lastr
;
782 /* Remove REG from its equivalence class. */
785 delete_reg_equiv (reg
)
788 register int n
= reg_next_eqv
[reg
];
789 register int p
= reg_prev_eqv
[reg
];
790 register int q
= reg_qty
[reg
];
792 /* If invalid, do nothing. N and P above are undefined in that case. */
803 qty_first_reg
[q
] = n
;
808 /* Remove any invalid expressions from the hash table
809 that refer to any of the registers contained in expression X.
811 Make sure that newly inserted references to those registers
812 as subexpressions will be considered valid.
814 mention_regs is not called when a register itself
815 is being stored in the table.
817 Return 1 if we have done something that may have changed the hash code
824 register enum rtx_code code
;
827 register int changed
= 0;
835 register int regno
= REGNO (x
);
836 register int endregno
837 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
838 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
841 for (i
= regno
; i
< endregno
; i
++)
843 if (reg_in_table
[i
] >= 0 && reg_in_table
[i
] != reg_tick
[i
])
844 remove_invalid_refs (i
);
846 reg_in_table
[i
] = reg_tick
[i
];
852 /* If X is a comparison or a COMPARE and either operand is a register
853 that does not have a quantity, give it one. This is so that a later
854 call to record_jump_equiv won't cause X to be assigned a different
855 hash code and not found in the table after that call.
857 It is not necessary to do this here, since rehash_using_reg can
858 fix up the table later, but doing this here eliminates the need to
859 call that expensive function in the most common case where the only
860 use of the register is in the comparison. */
862 if (code
== COMPARE
|| GET_RTX_CLASS (code
) == '<')
864 if (GET_CODE (XEXP (x
, 0)) == REG
865 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
866 if (insert_regs (XEXP (x
, 0), 0, 0))
868 rehash_using_reg (XEXP (x
, 0));
872 if (GET_CODE (XEXP (x
, 1)) == REG
873 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
874 if (insert_regs (XEXP (x
, 1), 0, 0))
876 rehash_using_reg (XEXP (x
, 1));
881 fmt
= GET_RTX_FORMAT (code
);
882 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
884 changed
|= mention_regs (XEXP (x
, i
));
885 else if (fmt
[i
] == 'E')
886 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
887 changed
|= mention_regs (XVECEXP (x
, i
, j
));
892 /* Update the register quantities for inserting X into the hash table
893 with a value equivalent to CLASSP.
894 (If the class does not contain a REG, it is irrelevant.)
895 If MODIFIED is nonzero, X is a destination; it is being modified.
896 Note that delete_reg_equiv should be called on a register
897 before insert_regs is done on that register with MODIFIED != 0.
899 Nonzero value means that elements of reg_qty have changed
900 so X's hash code may be different. */
903 insert_regs (x
, classp
, modified
)
905 struct table_elt
*classp
;
908 if (GET_CODE (x
) == REG
)
910 register int regno
= REGNO (x
);
913 || ! (REGNO_QTY_VALID_P (regno
)
914 && qty_mode
[reg_qty
[regno
]] == GET_MODE (x
)))
917 for (classp
= classp
->first_same_value
;
919 classp
= classp
->next_same_value
)
920 if (GET_CODE (classp
->exp
) == REG
921 && GET_MODE (classp
->exp
) == GET_MODE (x
))
923 make_regs_eqv (regno
, REGNO (classp
->exp
));
927 make_new_qty (regno
);
928 qty_mode
[reg_qty
[regno
]] = GET_MODE (x
);
933 return mention_regs (x
);
936 /* Look in or update the hash table. */
938 /* Put the element ELT on the list of free elements. */
942 struct table_elt
*elt
;
944 elt
->next_same_hash
= free_element_chain
;
945 free_element_chain
= elt
;
948 /* Return an element that is free for use. */
950 static struct table_elt
*
953 struct table_elt
*elt
= free_element_chain
;
956 free_element_chain
= elt
->next_same_hash
;
960 return (struct table_elt
*) oballoc (sizeof (struct table_elt
));
963 /* Remove table element ELT from use in the table.
964 HASH is its hash code, made using the HASH macro.
965 It's an argument because often that is known in advance
966 and we save much time not recomputing it. */
969 remove_from_table (elt
, hash
)
970 register struct table_elt
*elt
;
976 /* Mark this element as removed. See cse_insn. */
977 elt
->first_same_value
= 0;
979 /* Remove the table element from its equivalence class. */
982 register struct table_elt
*prev
= elt
->prev_same_value
;
983 register struct table_elt
*next
= elt
->next_same_value
;
985 if (next
) next
->prev_same_value
= prev
;
988 prev
->next_same_value
= next
;
991 register struct table_elt
*newfirst
= next
;
994 next
->first_same_value
= newfirst
;
995 next
= next
->next_same_value
;
1000 /* Remove the table element from its hash bucket. */
1003 register struct table_elt
*prev
= elt
->prev_same_hash
;
1004 register struct table_elt
*next
= elt
->next_same_hash
;
1006 if (next
) next
->prev_same_hash
= prev
;
1009 prev
->next_same_hash
= next
;
1010 else if (table
[hash
] == elt
)
1014 /* This entry is not in the proper hash bucket. This can happen
1015 when two classes were merged by `merge_equiv_classes'. Search
1016 for the hash bucket that it heads. This happens only very
1017 rarely, so the cost is acceptable. */
1018 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1019 if (table
[hash
] == elt
)
1024 /* Remove the table element from its related-value circular chain. */
1026 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1028 register struct table_elt
*p
= elt
->related_value
;
1029 while (p
->related_value
!= elt
)
1030 p
= p
->related_value
;
1031 p
->related_value
= elt
->related_value
;
1032 if (p
->related_value
== p
)
1033 p
->related_value
= 0;
1039 /* Look up X in the hash table and return its table element,
1040 or 0 if X is not in the table.
1042 MODE is the machine-mode of X, or if X is an integer constant
1043 with VOIDmode then MODE is the mode with which X will be used.
1045 Here we are satisfied to find an expression whose tree structure
1048 static struct table_elt
*
1049 lookup (x
, hash
, mode
)
1052 enum machine_mode mode
;
1054 register struct table_elt
*p
;
1056 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1057 if (mode
== p
->mode
&& ((x
== p
->exp
&& GET_CODE (x
) == REG
)
1058 || exp_equiv_p (x
, p
->exp
, GET_CODE (x
) != REG
, 0)))
1064 /* Like `lookup' but don't care whether the table element uses invalid regs.
1065 Also ignore discrepancies in the machine mode of a register. */
1067 static struct table_elt
*
1068 lookup_for_remove (x
, hash
, mode
)
1071 enum machine_mode mode
;
1073 register struct table_elt
*p
;
1075 if (GET_CODE (x
) == REG
)
1077 int regno
= REGNO (x
);
1078 /* Don't check the machine mode when comparing registers;
1079 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1080 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1081 if (GET_CODE (p
->exp
) == REG
1082 && REGNO (p
->exp
) == regno
)
1087 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1088 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1095 /* Look for an expression equivalent to X and with code CODE.
1096 If one is found, return that expression. */
1099 lookup_as_function (x
, code
)
1103 register struct table_elt
*p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
,
1108 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1110 if (GET_CODE (p
->exp
) == code
1111 /* Make sure this is a valid entry in the table. */
1112 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1119 /* Insert X in the hash table, assuming HASH is its hash code
1120 and CLASSP is an element of the class it should go in
1121 (or 0 if a new class should be made).
1122 It is inserted at the proper position to keep the class in
1123 the order cheapest first.
1125 MODE is the machine-mode of X, or if X is an integer constant
1126 with VOIDmode then MODE is the mode with which X will be used.
1128 For elements of equal cheapness, the most recent one
1129 goes in front, except that the first element in the list
1130 remains first unless a cheaper element is added. The order of
1131 pseudo-registers does not matter, as canon_reg will be called to
1132 find the cheapest when a register is retrieved from the table.
1134 The in_memory field in the hash table element is set to 0.
1135 The caller must set it nonzero if appropriate.
1137 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1138 and if insert_regs returns a nonzero value
1139 you must then recompute its hash code before calling here.
1141 If necessary, update table showing constant values of quantities. */
1143 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1145 static struct table_elt
*
1146 insert (x
, classp
, hash
, mode
)
1148 register struct table_elt
*classp
;
1150 enum machine_mode mode
;
1152 register struct table_elt
*elt
;
1154 /* If X is a register and we haven't made a quantity for it,
1155 something is wrong. */
1156 if (GET_CODE (x
) == REG
&& ! REGNO_QTY_VALID_P (REGNO (x
)))
1159 /* If X is a hard register, show it is being put in the table. */
1160 if (GET_CODE (x
) == REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1162 int regno
= REGNO (x
);
1163 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1166 for (i
= regno
; i
< endregno
; i
++)
1167 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1171 /* Put an element for X into the right hash bucket. */
1173 elt
= get_element ();
1175 elt
->cost
= COST (x
);
1176 elt
->next_same_value
= 0;
1177 elt
->prev_same_value
= 0;
1178 elt
->next_same_hash
= table
[hash
];
1179 elt
->prev_same_hash
= 0;
1180 elt
->related_value
= 0;
1183 elt
->is_const
= (CONSTANT_P (x
)
1184 /* GNU C++ takes advantage of this for `this'
1185 (and other const values). */
1186 || (RTX_UNCHANGING_P (x
)
1187 && GET_CODE (x
) == REG
1188 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1189 || FIXED_BASE_PLUS_P (x
));
1192 table
[hash
]->prev_same_hash
= elt
;
1195 /* Put it into the proper value-class. */
1198 classp
= classp
->first_same_value
;
1199 if (CHEAPER (elt
, classp
))
1200 /* Insert at the head of the class */
1202 register struct table_elt
*p
;
1203 elt
->next_same_value
= classp
;
1204 classp
->prev_same_value
= elt
;
1205 elt
->first_same_value
= elt
;
1207 for (p
= classp
; p
; p
= p
->next_same_value
)
1208 p
->first_same_value
= elt
;
1212 /* Insert not at head of the class. */
1213 /* Put it after the last element cheaper than X. */
1214 register struct table_elt
*p
, *next
;
1215 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1217 /* Put it after P and before NEXT. */
1218 elt
->next_same_value
= next
;
1220 next
->prev_same_value
= elt
;
1221 elt
->prev_same_value
= p
;
1222 p
->next_same_value
= elt
;
1223 elt
->first_same_value
= classp
;
1227 elt
->first_same_value
= elt
;
1229 /* If this is a constant being set equivalent to a register or a register
1230 being set equivalent to a constant, note the constant equivalence.
1232 If this is a constant, it cannot be equivalent to a different constant,
1233 and a constant is the only thing that can be cheaper than a register. So
1234 we know the register is the head of the class (before the constant was
1237 If this is a register that is not already known equivalent to a
1238 constant, we must check the entire class.
1240 If this is a register that is already known equivalent to an insn,
1241 update `qty_const_insn' to show that `this_insn' is the latest
1242 insn making that quantity equivalent to the constant. */
1244 if (elt
->is_const
&& classp
&& GET_CODE (classp
->exp
) == REG
)
1246 qty_const
[reg_qty
[REGNO (classp
->exp
)]]
1247 = gen_lowpart_if_possible (qty_mode
[reg_qty
[REGNO (classp
->exp
)]], x
);
1248 qty_const_insn
[reg_qty
[REGNO (classp
->exp
)]] = this_insn
;
1251 else if (GET_CODE (x
) == REG
&& classp
&& ! qty_const
[reg_qty
[REGNO (x
)]])
1253 register struct table_elt
*p
;
1255 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1259 qty_const
[reg_qty
[REGNO (x
)]]
1260 = gen_lowpart_if_possible (GET_MODE (x
), p
->exp
);
1261 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1267 else if (GET_CODE (x
) == REG
&& qty_const
[reg_qty
[REGNO (x
)]]
1268 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]])
1269 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1271 /* If this is a constant with symbolic value,
1272 and it has a term with an explicit integer value,
1273 link it up with related expressions. */
1274 if (GET_CODE (x
) == CONST
)
1276 rtx subexp
= get_related_value (x
);
1278 struct table_elt
*subelt
, *subelt_prev
;
1282 /* Get the integer-free subexpression in the hash table. */
1283 subhash
= safe_hash (subexp
, mode
) % NBUCKETS
;
1284 subelt
= lookup (subexp
, subhash
, mode
);
1286 subelt
= insert (subexp
, 0, subhash
, mode
);
1287 /* Initialize SUBELT's circular chain if it has none. */
1288 if (subelt
->related_value
== 0)
1289 subelt
->related_value
= subelt
;
1290 /* Find the element in the circular chain that precedes SUBELT. */
1291 subelt_prev
= subelt
;
1292 while (subelt_prev
->related_value
!= subelt
)
1293 subelt_prev
= subelt_prev
->related_value
;
1294 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1295 This way the element that follows SUBELT is the oldest one. */
1296 elt
->related_value
= subelt_prev
->related_value
;
1297 subelt_prev
->related_value
= elt
;
1304 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1305 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1306 the two classes equivalent.
1308 CLASS1 will be the surviving class; CLASS2 should not be used after this
1311 Any invalid entries in CLASS2 will not be copied. */
1314 merge_equiv_classes (class1
, class2
)
1315 struct table_elt
*class1
, *class2
;
1317 struct table_elt
*elt
, *next
, *new;
1319 /* Ensure we start with the head of the classes. */
1320 class1
= class1
->first_same_value
;
1321 class2
= class2
->first_same_value
;
1323 /* If they were already equal, forget it. */
1324 if (class1
== class2
)
1327 for (elt
= class2
; elt
; elt
= next
)
1331 enum machine_mode mode
= elt
->mode
;
1333 next
= elt
->next_same_value
;
1335 /* Remove old entry, make a new one in CLASS1's class.
1336 Don't do this for invalid entries as we cannot find their
1337 hash code (it also isn't necessary). */
1338 if (GET_CODE (exp
) == REG
|| exp_equiv_p (exp
, exp
, 1, 0))
1340 hash_arg_in_memory
= 0;
1341 hash_arg_in_struct
= 0;
1342 hash
= HASH (exp
, mode
);
1344 if (GET_CODE (exp
) == REG
)
1345 delete_reg_equiv (REGNO (exp
));
1347 remove_from_table (elt
, hash
);
1349 if (insert_regs (exp
, class1
, 0))
1350 hash
= HASH (exp
, mode
);
1351 new = insert (exp
, class1
, hash
, mode
);
1352 new->in_memory
= hash_arg_in_memory
;
1353 new->in_struct
= hash_arg_in_struct
;
1358 /* Remove from the hash table, or mark as invalid,
1359 all expressions whose values could be altered by storing in X.
1360 X is a register, a subreg, or a memory reference with nonvarying address
1361 (because, when a memory reference with a varying address is stored in,
1362 all memory references are removed by invalidate_memory
1363 so specific invalidation is superfluous).
1365 A nonvarying address may be just a register or just
1366 a symbol reference, or it may be either of those plus
1367 a numeric offset. */
1374 register struct table_elt
*p
;
1376 register int start
, end
;
1378 /* If X is a register, dependencies on its contents
1379 are recorded through the qty number mechanism.
1380 Just change the qty number of the register,
1381 mark it as invalid for expressions that refer to it,
1382 and remove it itself. */
1384 if (GET_CODE (x
) == REG
)
1386 register int regno
= REGNO (x
);
1387 register int hash
= HASH (x
, GET_MODE (x
));
1389 /* Remove REGNO from any quantity list it might be on and indicate
1390 that it's value might have changed. If it is a pseudo, remove its
1391 entry from the hash table.
1393 For a hard register, we do the first two actions above for any
1394 additional hard registers corresponding to X. Then, if any of these
1395 registers are in the table, we must remove any REG entries that
1396 overlap these registers. */
1398 delete_reg_equiv (regno
);
1401 if (regno
>= FIRST_PSEUDO_REGISTER
)
1402 remove_from_table (lookup_for_remove (x
, hash
, GET_MODE (x
)), hash
);
1405 int in_table
= TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1406 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1407 int tregno
, tendregno
;
1408 register struct table_elt
*p
, *next
;
1410 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1412 for (i
= regno
+ 1; i
< endregno
; i
++)
1414 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, i
);
1415 CLEAR_HARD_REG_BIT (hard_regs_in_table
, i
);
1416 delete_reg_equiv (i
);
1421 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1422 for (p
= table
[hash
]; p
; p
= next
)
1424 next
= p
->next_same_hash
;
1426 if (GET_CODE (p
->exp
) != REG
1427 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1430 tregno
= REGNO (p
->exp
);
1432 = tregno
+ HARD_REGNO_NREGS (tregno
, GET_MODE (p
->exp
));
1433 if (tendregno
> regno
&& tregno
< endregno
)
1434 remove_from_table (p
, hash
);
1441 if (GET_CODE (x
) == SUBREG
)
1443 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1445 invalidate (SUBREG_REG (x
));
1449 /* X is not a register; it must be a memory reference with
1450 a nonvarying address. Remove all hash table elements
1451 that refer to overlapping pieces of memory. */
1453 if (GET_CODE (x
) != MEM
)
1458 /* Registers with nonvarying addresses usually have constant equivalents;
1459 but the frame pointer register is also possible. */
1460 if (GET_CODE (base
) == REG
1461 && REGNO_QTY_VALID_P (REGNO (base
))
1462 && qty_mode
[reg_qty
[REGNO (base
)]] == GET_MODE (base
)
1463 && qty_const
[reg_qty
[REGNO (base
)]] != 0)
1464 base
= qty_const
[reg_qty
[REGNO (base
)]];
1465 else if (GET_CODE (base
) == PLUS
1466 && GET_CODE (XEXP (base
, 1)) == CONST_INT
1467 && GET_CODE (XEXP (base
, 0)) == REG
1468 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
1469 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
1470 == GET_MODE (XEXP (base
, 0)))
1471 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]])
1473 start
= INTVAL (XEXP (base
, 1));
1474 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
1477 if (GET_CODE (base
) == CONST
)
1478 base
= XEXP (base
, 0);
1479 if (GET_CODE (base
) == PLUS
1480 && GET_CODE (XEXP (base
, 1)) == CONST_INT
)
1482 start
+= INTVAL (XEXP (base
, 1));
1483 base
= XEXP (base
, 0);
1486 end
= start
+ GET_MODE_SIZE (GET_MODE (x
));
1487 for (i
= 0; i
< NBUCKETS
; i
++)
1489 register struct table_elt
*next
;
1490 for (p
= table
[i
]; p
; p
= next
)
1492 next
= p
->next_same_hash
;
1493 if (refers_to_mem_p (p
->exp
, base
, start
, end
))
1494 remove_from_table (p
, i
);
1499 /* Remove all expressions that refer to register REGNO,
1500 since they are already invalid, and we are about to
1501 mark that register valid again and don't want the old
1502 expressions to reappear as valid. */
1505 remove_invalid_refs (regno
)
1509 register struct table_elt
*p
, *next
;
1511 for (i
= 0; i
< NBUCKETS
; i
++)
1512 for (p
= table
[i
]; p
; p
= next
)
1514 next
= p
->next_same_hash
;
1515 if (GET_CODE (p
->exp
) != REG
1516 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, 0))
1517 remove_from_table (p
, i
);
1521 /* Recompute the hash codes of any valid entries in the hash table that
1522 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1524 This is called when we make a jump equivalence. */
1527 rehash_using_reg (x
)
1531 struct table_elt
*p
, *next
;
1534 if (GET_CODE (x
) == SUBREG
)
1537 /* If X is not a register or if the register is known not to be in any
1538 valid entries in the table, we have no work to do. */
1540 if (GET_CODE (x
) != REG
1541 || reg_in_table
[REGNO (x
)] < 0
1542 || reg_in_table
[REGNO (x
)] != reg_tick
[REGNO (x
)])
1545 /* Scan all hash chains looking for valid entries that mention X.
1546 If we find one and it is in the wrong hash chain, move it. We can skip
1547 objects that are registers, since they are handled specially. */
1549 for (i
= 0; i
< NBUCKETS
; i
++)
1550 for (p
= table
[i
]; p
; p
= next
)
1552 next
= p
->next_same_hash
;
1553 if (GET_CODE (p
->exp
) != REG
&& reg_mentioned_p (x
, p
->exp
)
1554 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
1555 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) % NBUCKETS
))
1557 if (p
->next_same_hash
)
1558 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1560 if (p
->prev_same_hash
)
1561 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1563 table
[i
] = p
->next_same_hash
;
1565 p
->next_same_hash
= table
[hash
];
1566 p
->prev_same_hash
= 0;
1568 table
[hash
]->prev_same_hash
= p
;
1574 /* Remove from the hash table all expressions that reference memory,
1575 or some of them as specified by *WRITES. */
1578 invalidate_memory (writes
)
1579 struct write_data
*writes
;
1582 register struct table_elt
*p
, *next
;
1583 int all
= writes
->all
;
1584 int nonscalar
= writes
->nonscalar
;
1586 for (i
= 0; i
< NBUCKETS
; i
++)
1587 for (p
= table
[i
]; p
; p
= next
)
1589 next
= p
->next_same_hash
;
1592 || (nonscalar
&& p
->in_struct
)
1593 || cse_rtx_addr_varies_p (p
->exp
)))
1594 remove_from_table (p
, i
);
1598 /* Remove from the hash table any expression that is a call-clobbered
1599 register. Also update their TICK values. */
1602 invalidate_for_call ()
1604 int regno
, endregno
;
1607 struct table_elt
*p
, *next
;
1610 /* Go through all the hard registers. For each that is clobbered in
1611 a CALL_INSN, remove the register from quantity chains and update
1612 reg_tick if defined. Also see if any of these registers is currently
1615 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1616 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1618 delete_reg_equiv (regno
);
1619 if (reg_tick
[regno
] >= 0)
1622 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1625 /* In the case where we have no call-clobbered hard registers in the
1626 table, we are done. Otherwise, scan the table and remove any
1627 entry that overlaps a call-clobbered register. */
1630 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1631 for (p
= table
[hash
]; p
; p
= next
)
1633 next
= p
->next_same_hash
;
1635 if (GET_CODE (p
->exp
) != REG
1636 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1639 regno
= REGNO (p
->exp
);
1640 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (p
->exp
));
1642 for (i
= regno
; i
< endregno
; i
++)
1643 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1645 remove_from_table (p
, hash
);
1651 /* Given an expression X of type CONST,
1652 and ELT which is its table entry (or 0 if it
1653 is not in the hash table),
1654 return an alternate expression for X as a register plus integer.
1655 If none can be found, return 0. */
1658 use_related_value (x
, elt
)
1660 struct table_elt
*elt
;
1662 register struct table_elt
*relt
= 0;
1663 register struct table_elt
*p
, *q
;
1666 /* First, is there anything related known?
1667 If we have a table element, we can tell from that.
1668 Otherwise, must look it up. */
1670 if (elt
!= 0 && elt
->related_value
!= 0)
1672 else if (elt
== 0 && GET_CODE (x
) == CONST
)
1674 rtx subexp
= get_related_value (x
);
1676 relt
= lookup (subexp
,
1677 safe_hash (subexp
, GET_MODE (subexp
)) % NBUCKETS
,
1684 /* Search all related table entries for one that has an
1685 equivalent register. */
1690 /* This loop is strange in that it is executed in two different cases.
1691 The first is when X is already in the table. Then it is searching
1692 the RELATED_VALUE list of X's class (RELT). The second case is when
1693 X is not in the table. Then RELT points to a class for the related
1696 Ensure that, whatever case we are in, that we ignore classes that have
1697 the same value as X. */
1699 if (rtx_equal_p (x
, p
->exp
))
1702 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
1703 if (GET_CODE (q
->exp
) == REG
)
1709 p
= p
->related_value
;
1711 /* We went all the way around, so there is nothing to be found.
1712 Alternatively, perhaps RELT was in the table for some other reason
1713 and it has no related values recorded. */
1714 if (p
== relt
|| p
== 0)
1721 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
1722 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1723 return plus_constant (q
->exp
, offset
);
1726 /* Hash an rtx. We are careful to make sure the value is never negative.
1727 Equivalent registers hash identically.
1728 MODE is used in hashing for CONST_INTs only;
1729 otherwise the mode of X is used.
1731 Store 1 in do_not_record if any subexpression is volatile.
1733 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1734 which does not have the RTX_UNCHANGING_P bit set.
1735 In this case, also store 1 in hash_arg_in_struct
1736 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1738 Note that cse_insn knows that the hash code of a MEM expression
1739 is just (int) MEM plus the hash code of the address. */
1742 canon_hash (x
, mode
)
1744 enum machine_mode mode
;
1747 register int hash
= 0;
1748 register enum rtx_code code
;
1751 /* repeat is used to turn tail-recursion into iteration. */
1756 code
= GET_CODE (x
);
1761 register int regno
= REGNO (x
);
1763 /* On some machines, we can't record any non-fixed hard register,
1764 because extending its life will cause reload problems. We
1765 consider ap, fp, and sp to be fixed for this purpose.
1766 On all machines, we can't record any global registers. */
1768 if (regno
< FIRST_PSEUDO_REGISTER
1769 && (global_regs
[regno
]
1770 #ifdef SMALL_REGISTER_CLASSES
1771 || (! fixed_regs
[regno
]
1772 && regno
!= FRAME_POINTER_REGNUM
1773 && regno
!= ARG_POINTER_REGNUM
1774 && regno
!= STACK_POINTER_REGNUM
)
1781 return hash
+ ((int) REG
<< 7) + reg_qty
[regno
];
1785 hash
+= ((int) mode
+ ((int) CONST_INT
<< 7)
1786 + INTVAL (x
) + (INTVAL (x
) >> HASHBITS
));
1787 return ((1 << HASHBITS
) - 1) & hash
;
1790 /* This is like the general case, except that it only counts
1791 the integers representing the constant. */
1792 hash
+= (int) code
+ (int) GET_MODE (x
);
1795 for (i
= 2; i
< GET_RTX_LENGTH (CONST_DOUBLE
); i
++)
1797 int tem
= XINT (x
, i
);
1798 hash
+= ((1 << HASHBITS
) - 1) & (tem
+ (tem
>> HASHBITS
));
1803 /* Assume there is only one rtx object for any given label. */
1805 /* Use `and' to ensure a positive number. */
1806 return (hash
+ ((int) LABEL_REF
<< 7)
1807 + ((int) XEXP (x
, 0) & ((1 << HASHBITS
) - 1)));
1810 return (hash
+ ((int) SYMBOL_REF
<< 7)
1811 + ((int) XEXP (x
, 0) & ((1 << HASHBITS
) - 1)));
1814 if (MEM_VOLATILE_P (x
))
1819 if (! RTX_UNCHANGING_P (x
))
1821 hash_arg_in_memory
= 1;
1822 if (MEM_IN_STRUCT_P (x
)) hash_arg_in_struct
= 1;
1824 /* Now that we have already found this special case,
1825 might as well speed it up as much as possible. */
1837 case UNSPEC_VOLATILE
:
1842 if (MEM_VOLATILE_P (x
))
1849 i
= GET_RTX_LENGTH (code
) - 1;
1850 hash
+= (int) code
+ (int) GET_MODE (x
);
1851 fmt
= GET_RTX_FORMAT (code
);
1856 rtx tem
= XEXP (x
, i
);
1859 /* If the operand is a REG that is equivalent to a constant, hash
1860 as if we were hashing the constant, since we will be comparing
1862 if (tem
!= 0 && GET_CODE (tem
) == REG
1863 && REGNO_QTY_VALID_P (REGNO (tem
))
1864 && qty_mode
[reg_qty
[REGNO (tem
)]] == GET_MODE (tem
)
1865 && (tem1
= qty_const
[reg_qty
[REGNO (tem
)]]) != 0
1866 && CONSTANT_P (tem1
))
1869 /* If we are about to do the last recursive call
1870 needed at this level, change it into iteration.
1871 This function is called enough to be worth it. */
1877 hash
+= canon_hash (tem
, 0);
1879 else if (fmt
[i
] == 'E')
1880 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1881 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
1882 else if (fmt
[i
] == 's')
1884 register char *p
= XSTR (x
, i
);
1888 register int tem
= *p
++;
1889 hash
+= ((1 << HASHBITS
) - 1) & (tem
+ (tem
>> HASHBITS
));
1892 else if (fmt
[i
] == 'i')
1894 register int tem
= XINT (x
, i
);
1895 hash
+= ((1 << HASHBITS
) - 1) & (tem
+ (tem
>> HASHBITS
));
1903 /* Like canon_hash but with no side effects. */
1908 enum machine_mode mode
;
1910 int save_do_not_record
= do_not_record
;
1911 int save_hash_arg_in_memory
= hash_arg_in_memory
;
1912 int save_hash_arg_in_struct
= hash_arg_in_struct
;
1913 int hash
= canon_hash (x
, mode
);
1914 hash_arg_in_memory
= save_hash_arg_in_memory
;
1915 hash_arg_in_struct
= save_hash_arg_in_struct
;
1916 do_not_record
= save_do_not_record
;
1920 /* Return 1 iff X and Y would canonicalize into the same thing,
1921 without actually constructing the canonicalization of either one.
1922 If VALIDATE is nonzero,
1923 we assume X is an expression being processed from the rtl
1924 and Y was found in the hash table. We check register refs
1925 in Y for being marked as valid.
1927 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
1928 that is known to be in the register. Ordinarily, we don't allow them
1929 to match, because letting them match would cause unpredictable results
1930 in all the places that search a hash table chain for an equivalent
1931 for a given value. A possible equivalent that has different structure
1932 has its hash code computed from different data. Whether the hash code
1933 is the same as that of the the given value is pure luck. */
1936 exp_equiv_p (x
, y
, validate
, equal_values
)
1942 register enum rtx_code code
;
1945 /* Note: it is incorrect to assume an expression is equivalent to itself
1946 if VALIDATE is nonzero. */
1947 if (x
== y
&& !validate
)
1949 if (x
== 0 || y
== 0)
1952 code
= GET_CODE (x
);
1953 if (code
!= GET_CODE (y
))
1958 /* If X is a constant and Y is a register or vice versa, they may be
1959 equivalent. We only have to validate if Y is a register. */
1960 if (CONSTANT_P (x
) && GET_CODE (y
) == REG
1961 && REGNO_QTY_VALID_P (REGNO (y
))
1962 && GET_MODE (y
) == qty_mode
[reg_qty
[REGNO (y
)]]
1963 && rtx_equal_p (x
, qty_const
[reg_qty
[REGNO (y
)]])
1964 && (! validate
|| reg_in_table
[REGNO (y
)] == reg_tick
[REGNO (y
)]))
1967 if (CONSTANT_P (y
) && code
== REG
1968 && REGNO_QTY_VALID_P (REGNO (x
))
1969 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
1970 && rtx_equal_p (y
, qty_const
[reg_qty
[REGNO (x
)]]))
1976 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1977 if (GET_MODE (x
) != GET_MODE (y
))
1987 return XINT (x
, 0) == XINT (y
, 0);
1991 return XEXP (x
, 0) == XEXP (y
, 0);
1995 int regno
= REGNO (y
);
1997 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
1998 : HARD_REGNO_NREGS (regno
, GET_MODE (y
)));
2001 /* If the quantities are not the same, the expressions are not
2002 equivalent. If there are and we are not to validate, they
2003 are equivalent. Otherwise, ensure all regs are up-to-date. */
2005 if (reg_qty
[REGNO (x
)] != reg_qty
[regno
])
2011 for (i
= regno
; i
< endregno
; i
++)
2012 if (reg_in_table
[i
] != reg_tick
[i
])
2018 /* For commutative operations, check both orders. */
2026 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2027 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2028 validate
, equal_values
))
2029 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2030 validate
, equal_values
)
2031 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2032 validate
, equal_values
)));
2035 /* Compare the elements. If any pair of corresponding elements
2036 fail to match, return 0 for the whole things. */
2038 fmt
= GET_RTX_FORMAT (code
);
2039 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2043 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2046 else if (fmt
[i
] == 'E')
2049 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2051 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2052 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2053 validate
, equal_values
))
2056 else if (fmt
[i
] == 's')
2058 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2061 else if (fmt
[i
] == 'i')
2063 if (XINT (x
, i
) != XINT (y
, i
))
2066 else if (fmt
[i
] != '0')
2072 /* Return 1 iff any subexpression of X matches Y.
2073 Here we do not require that X or Y be valid (for registers referred to)
2074 for being in the hash table. */
2081 register enum rtx_code code
;
2087 if (x
== 0 || y
== 0)
2090 code
= GET_CODE (x
);
2091 /* If X as a whole has the same code as Y, they may match.
2093 if (code
== GET_CODE (y
))
2095 if (exp_equiv_p (x
, y
, 0, 1))
2099 /* X does not match, so try its subexpressions. */
2101 fmt
= GET_RTX_FORMAT (code
);
2102 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2111 if (refers_to_p (XEXP (x
, i
), y
))
2114 else if (fmt
[i
] == 'E')
2117 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2118 if (refers_to_p (XVECEXP (x
, i
, j
), y
))
2125 /* Return 1 iff any subexpression of X refers to memory
2126 at an address of BASE plus some offset
2127 such that any of the bytes' offsets fall between START (inclusive)
2128 and END (exclusive).
2130 The value is undefined if X is a varying address.
2131 This function is not used in such cases.
2133 When used in the cse pass, `qty_const' is nonzero, and it is used
2134 to treat an address that is a register with a known constant value
2135 as if it were that constant value.
2136 In the loop pass, `qty_const' is zero, so this is not done. */
2139 refers_to_mem_p (x
, base
, start
, end
)
2144 register enum rtx_code code
;
2147 if (GET_CODE (base
) == CONST_INT
)
2149 start
+= INTVAL (base
);
2150 end
+= INTVAL (base
);
2158 code
= GET_CODE (x
);
2161 register rtx addr
= XEXP (x
, 0); /* Get the address. */
2165 if (GET_CODE (addr
) == REG
2166 /* qty_const is 0 when outside the cse pass;
2167 at such times, this info is not available. */
2169 && REGNO_QTY_VALID_P (REGNO (addr
))
2170 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
2171 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
2172 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
2173 else if (GET_CODE (addr
) == PLUS
2174 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2175 && GET_CODE (XEXP (addr
, 0)) == REG
2177 && REGNO_QTY_VALID_P (REGNO (XEXP (addr
, 0)))
2178 && (GET_MODE (XEXP (addr
, 0))
2179 == qty_mode
[reg_qty
[REGNO (XEXP (addr
, 0))]])
2180 && qty_const
[reg_qty
[REGNO (XEXP (addr
, 0))]])
2182 i
= INTVAL (XEXP (addr
, 1));
2183 addr
= qty_const
[reg_qty
[REGNO (XEXP (addr
, 0))]];
2187 if (GET_CODE (addr
) == CONST
)
2188 addr
= XEXP (addr
, 0);
2190 /* If ADDR is BASE, or BASE plus an integer, put
2191 the integer in I. */
2192 if (GET_CODE (addr
) == PLUS
2193 && XEXP (addr
, 0) == base
2194 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
)
2195 i
+= INTVAL (XEXP (addr
, 1));
2196 else if (GET_CODE (addr
) == LO_SUM
)
2198 if (GET_CODE (base
) != LO_SUM
)
2200 /* The REG component of the LO_SUM is known by the
2201 const value in the XEXP part. */
2202 addr
= XEXP (addr
, 1);
2203 base
= XEXP (base
, 1);
2205 if (GET_CODE (base
) == CONST
)
2206 base
= XEXP (base
, 0);
2207 if (GET_CODE (base
) == PLUS
2208 && GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2210 int tem
= INTVAL (XEXP (base
, 1));
2213 base
= XEXP (base
, 0);
2217 else if (GET_CODE (base
) == LO_SUM
)
2219 base
= XEXP (base
, 1);
2220 if (GET_CODE (base
) == CONST
)
2221 base
= XEXP (base
, 0);
2222 if (GET_CODE (base
) == PLUS
2223 && GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2225 int tem
= INTVAL (XEXP (base
, 1));
2228 base
= XEXP (base
, 0);
2232 else if (GET_CODE (addr
) == CONST_INT
&& base
== const0_rtx
)
2234 else if (addr
!= base
)
2237 myend
= i
+ GET_MODE_SIZE (GET_MODE (x
));
2238 return myend
> start
&& i
< end
;
2241 /* X does not match, so try its subexpressions. */
2243 fmt
= GET_RTX_FORMAT (code
);
2244 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2253 if (refers_to_mem_p (XEXP (x
, i
), base
, start
, end
))
2256 else if (fmt
[i
] == 'E')
2259 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2260 if (refers_to_mem_p (XVECEXP (x
, i
, j
), base
, start
, end
))
2267 /* Nonzero if X refers to memory at a varying address;
2268 except that a register which has at the moment a known constant value
2269 isn't considered variable. */
2272 cse_rtx_addr_varies_p (x
)
2275 /* We need not check for X and the equivalence class being of the same
2276 mode because if X is equivalent to a constant in some mode, it
2277 doesn't vary in any mode. */
2279 if (GET_CODE (x
) == MEM
2280 && GET_CODE (XEXP (x
, 0)) == REG
2281 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2282 && GET_MODE (XEXP (x
, 0)) == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]]
2283 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]] != 0)
2286 if (GET_CODE (x
) == MEM
2287 && GET_CODE (XEXP (x
, 0)) == PLUS
2288 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
2289 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == REG
2290 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x
, 0), 0)))
2291 && (GET_MODE (XEXP (XEXP (x
, 0), 0))
2292 == qty_mode
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2293 && qty_const
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2296 return rtx_addr_varies_p (x
);
2299 /* Canonicalize an expression:
2300 replace each register reference inside it
2301 with the "oldest" equivalent register.
2303 If INSN is non-zero and we are replacing a pseudo with a hard register
2304 or vice versa, verify that INSN remains valid after we make our
2313 register enum rtx_code code
;
2319 code
= GET_CODE (x
);
2337 /* Never replace a hard reg, because hard regs can appear
2338 in more than one machine mode, and we must preserve the mode
2339 of each occurrence. Also, some hard regs appear in
2340 MEMs that are shared and mustn't be altered. Don't try to
2341 replace any reg that maps to a reg of class NO_REGS. */
2342 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2343 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2346 first
= qty_first_reg
[reg_qty
[REGNO (x
)]];
2347 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2348 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2349 : gen_rtx (REG
, qty_mode
[reg_qty
[REGNO (x
)]], first
));
2353 fmt
= GET_RTX_FORMAT (code
);
2354 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2360 rtx
new = canon_reg (XEXP (x
, i
), insn
);
2362 /* If replacing pseudo with hard reg or vice versa, ensure the
2363 insn remains valid. */
2364 if (new && GET_CODE (new) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
2365 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2366 != (REGNO (XEXP (x
, i
)) < FIRST_PSEUDO_REGISTER
)))
2367 validate_change (insn
, &XEXP (x
, i
), new, 0);
2371 else if (fmt
[i
] == 'E')
2372 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2373 XVECEXP (x
, i
, j
) = canon_reg (XVECEXP (x
, i
, j
), insn
);
2379 /* LOC is a location with INSN that is an operand address (the contents of
2380 a MEM). Find the best equivalent address to use that is valid for this
2383 On most CISC machines, complicated address modes are costly, and rtx_cost
2384 is a good approximation for that cost. However, most RISC machines have
2385 only a few (usually only one) memory reference formats. If an address is
2386 valid at all, it is often just as cheap as any other address. Hence, for
2387 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2388 costs of various addresses. For two addresses of equal cost, choose the one
2389 with the highest `rtx_cost' value as that has the potential of eliminating
2390 the most insns. For equal costs, we choose the first in the equivalence
2391 class. Note that we ignore the fact that pseudo registers are cheaper
2392 than hard registers here because we would also prefer the pseudo registers.
2396 find_best_addr (insn
, loc
)
2400 struct table_elt
*elt
, *p
;
2403 int found_better
= 1;
2404 int save_do_not_record
= do_not_record
;
2405 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2406 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2411 /* Do not try to replace constant addresses or addresses of local and
2412 argument slots. These MEM expressions are made only once and inserted
2413 in many instructions, as well as being used to control symbol table
2414 output. It is not safe to clobber them.
2416 There are some uncommon cases where the address is already in a register
2417 for some reason, but we cannot take advantage of that because we have
2418 no easy way to unshare the MEM. In addition, looking up all stack
2419 addresses is costly. */
2420 if ((GET_CODE (addr
) == PLUS
2421 && GET_CODE (XEXP (addr
, 0)) == REG
2422 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2423 && (regno
= REGNO (XEXP (addr
, 0)),
2424 regno
== FRAME_POINTER_REGNUM
|| regno
== ARG_POINTER_REGNUM
))
2425 || (GET_CODE (addr
) == REG
2426 && (regno
= REGNO (addr
),
2427 regno
== FRAME_POINTER_REGNUM
|| regno
== ARG_POINTER_REGNUM
))
2428 || CONSTANT_ADDRESS_P (addr
))
2431 /* If this address is not simply a register, try to fold it. This will
2432 sometimes simplify the expression. Many simplifications
2433 will not be valid, but some, usually applying the associative rule, will
2434 be valid and produce better code. */
2435 if (GET_CODE (addr
) != REG
2436 && validate_change (insn
, loc
, fold_rtx (addr
, insn
), 0))
2439 /* If this address is not in the hash table, we can't do any better.
2440 Also, ignore if volatile. */
2442 hash_code
= HASH (addr
, Pmode
);
2443 addr_volatile
= do_not_record
;
2444 do_not_record
= save_do_not_record
;
2445 hash_arg_in_memory
= save_hash_arg_in_memory
;
2446 hash_arg_in_struct
= save_hash_arg_in_struct
;
2451 elt
= lookup (addr
, hash_code
, Pmode
);
2456 #ifndef ADDRESS_COST
2457 our_cost
= elt
->cost
;
2459 /* Find the lowest cost below ours that works. */
2460 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
2461 if (elt
->cost
< our_cost
2462 && (GET_CODE (elt
->exp
) == REG
|| exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
2463 && validate_change (insn
, loc
, canon_reg (copy_rtx (elt
->exp
), 0), 0))
2468 /* We need to find the best (under the criteria documented above) entry in
2469 the class that is valid. We use the `flag' field to indicate choices
2470 that were invalid and iterate until we can't find a better one that
2471 hasn't already been tried. */
2473 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2476 while (found_better
)
2478 int best_addr_cost
= ADDRESS_COST (*loc
);
2479 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2480 struct table_elt
*best_elt
= elt
;
2483 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2485 && (GET_CODE (p
->exp
) == REG
|| exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2486 && (ADDRESS_COST (p
->exp
) < best_addr_cost
2487 || (ADDRESS_COST (p
->exp
) == best_addr_cost
2488 && (p
->cost
+ 1) >> 1 > best_rtx_cost
)))
2491 best_addr_cost
= ADDRESS_COST (p
->exp
);
2492 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2498 if (validate_change (insn
, loc
,
2499 canon_reg (copy_rtx (best_elt
->exp
), 0), 0))
2508 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2509 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2510 what values are being compared.
2512 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2513 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2514 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2515 compared to produce cc0.
2517 The return value is the comparison operator and is either the code of
2518 A or the code corresponding to the inverse of the comparison. */
2520 static enum rtx_code
2521 find_comparison_args (code
, parg1
, parg2
)
2527 arg1
= *parg1
, arg2
= *parg2
;
2529 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2531 while (arg2
== const0_rtx
)
2533 /* Set non-zero when we find something of interest. */
2535 int reverse_code
= 0;
2536 struct table_elt
*p
= 0;
2538 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2539 On machines with CC0, this is the only case that can occur, since
2540 fold_rtx will return the COMPARE or item being compared with zero
2543 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2546 /* If ARG1 is a comparison operator and CODE is testing for
2547 STORE_FLAG_VALUE, get the inner arguments. */
2549 else if (GET_RTX_CLASS (GET_CODE (arg1
)) == '<')
2551 if (code
== NE
|| (code
== LT
&& STORE_FLAG_VALUE
== -1))
2553 else if (code
== EQ
|| (code
== GE
&& STORE_FLAG_VALUE
== -1))
2554 x
= arg1
, reverse_code
= 1;
2557 /* ??? We could also check for
2559 (ne (and (eq (...) (const_int 1))) (const_int 0))
2561 and related forms, but let's wait until we see them occurring. */
2564 /* Look up ARG1 in the hash table and see if it has an equivalence
2565 that lets us see what is being compared. */
2566 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) % NBUCKETS
,
2568 if (p
) p
= p
->first_same_value
;
2570 for (; p
; p
= p
->next_same_value
)
2572 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2574 /* If the entry isn't valid, skip it. */
2575 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2578 if (GET_CODE (p
->exp
) == COMPARE
2579 /* Another possibility is that this machine has a compare insn
2580 that includes the comparison code. In that case, ARG1 would
2581 be equivalent to a comparison operation that would set ARG1 to
2582 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2583 ORIG_CODE is the actual comparison being done; if it is an EQ,
2584 we must reverse ORIG_CODE. On machine with a negative value
2585 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2588 && inner_mode
!= VOIDmode
2589 && GET_MODE_BITSIZE (inner_mode
) <= HOST_BITS_PER_INT
2590 && (STORE_FLAG_VALUE
2591 & (1 << (GET_MODE_BITSIZE (inner_mode
) - 1)))))
2592 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<'))
2597 else if ((code
== EQ
2599 && inner_mode
!= VOIDmode
2600 && GET_MODE_BITSIZE (inner_mode
) <= HOST_BITS_PER_INT
2601 && (STORE_FLAG_VALUE
2602 & (1 << (GET_MODE_BITSIZE (inner_mode
) - 1)))))
2603 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<')
2610 /* If this is fp + constant, the equivalent is a better operand since
2611 it may let us predict the value of the comparison. */
2612 else if (NONZERO_BASE_PLUS_P (p
->exp
))
2619 /* If we didn't find a useful equivalence for ARG1, we are done.
2620 Otherwise, set up for the next iteration. */
2624 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
2625 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
2626 code
= GET_CODE (x
);
2629 code
= reverse_condition (code
);
2632 /* Return our results. */
2633 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
2638 /* Try to simplify a unary operation CODE whose output mode is to be
2639 MODE with input operand OP whose mode was originally OP_MODE.
2640 Return zero if no simplification can be made. */
2643 simplify_unary_operation (code
, mode
, op
, op_mode
)
2645 enum machine_mode mode
;
2647 enum machine_mode op_mode
;
2649 register int width
= GET_MODE_BITSIZE (mode
);
2651 /* The order of these tests is critical so that, for example, we don't
2652 check the wrong mode (input vs. output) for a conversion operation,
2653 such as FIX. At some point, this should be simplified. */
2655 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
2656 if (code
== FLOAT
&& GET_CODE (op
) == CONST_INT
)
2660 #ifdef REAL_ARITHMETIC
2661 REAL_VALUE_FROM_INT (d
, INTVAL (op
), INTVAL (op
) < 0 ? ~0 : 0);
2663 d
= (double) INTVAL (op
);
2665 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2667 else if (code
== UNSIGNED_FLOAT
&& GET_CODE (op
) == CONST_INT
)
2671 #ifdef REAL_ARITHMETIC
2672 REAL_VALUE_FROM_INT (d
, INTVAL (op
), 0);
2674 d
= (double) (unsigned int) INTVAL (op
);
2676 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2679 else if (code
== FLOAT
&& GET_CODE (op
) == CONST_DOUBLE
2680 && GET_MODE (op
) == VOIDmode
)
2684 #ifdef REAL_ARITHMETIC
2685 REAL_VALUE_FROM_INT (d
, CONST_DOUBLE_LOW (op
), CONST_DOUBLE_HIGH (op
));
2687 if (CONST_DOUBLE_HIGH (op
) < 0)
2689 d
= (double) (~ CONST_DOUBLE_HIGH (op
));
2690 d
*= ((double) (1 << (HOST_BITS_PER_INT
/ 2))
2691 * (double) (1 << (HOST_BITS_PER_INT
/ 2)));
2692 d
+= (double) (unsigned) (~ CONST_DOUBLE_LOW (op
));
2697 d
= (double) CONST_DOUBLE_HIGH (op
);
2698 d
*= ((double) (1 << (HOST_BITS_PER_INT
/ 2))
2699 * (double) (1 << (HOST_BITS_PER_INT
/ 2)));
2700 d
+= (double) (unsigned) CONST_DOUBLE_LOW (op
);
2702 #endif /* REAL_ARITHMETIC */
2703 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2705 else if (code
== UNSIGNED_FLOAT
&& GET_CODE (op
) == CONST_DOUBLE
2706 && GET_MODE (op
) == VOIDmode
)
2710 #ifdef REAL_ARITHMETIC
2711 REAL_VALUE_FROM_UNSIGNED_INT (d
, CONST_DOUBLE_LOW (op
),
2712 CONST_DOUBLE_HIGH (op
));
2714 d
= (double) CONST_DOUBLE_HIGH (op
);
2715 d
*= ((double) (1 << (HOST_BITS_PER_INT
/ 2))
2716 * (double) (1 << (HOST_BITS_PER_INT
/ 2)));
2717 d
+= (double) (unsigned) CONST_DOUBLE_LOW (op
);
2718 #endif /* REAL_ARITHMETIC */
2719 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2723 else if (GET_CODE (op
) == CONST_INT
2724 && width
<= HOST_BITS_PER_INT
&& width
> 0)
2726 register int arg0
= INTVAL (op
);
2740 val
= (arg0
>= 0 ? arg0
: - arg0
);
2744 /* Don't use ffs here. Instead, get low order bit and then its
2745 number. If arg0 is zero, this will return 0, as desired. */
2746 arg0
&= GET_MODE_MASK (mode
);
2747 val
= exact_log2 (arg0
& (- arg0
)) + 1;
2755 if (op_mode
== VOIDmode
)
2757 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_INT
)
2759 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_INT
)
2760 val
= arg0
& ~((-1) << GET_MODE_BITSIZE (op_mode
));
2766 if (op_mode
== VOIDmode
)
2768 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_INT
)
2770 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_INT
)
2772 val
= arg0
& ~((-1) << GET_MODE_BITSIZE (op_mode
));
2773 if (val
& (1 << (GET_MODE_BITSIZE (op_mode
) - 1)))
2774 val
-= 1 << GET_MODE_BITSIZE (op_mode
);
2787 /* Clear the bits that don't belong in our mode,
2788 unless they and our sign bit are all one.
2789 So we get either a reasonable negative value or a reasonable
2790 unsigned value for this mode. */
2791 if (width
< HOST_BITS_PER_INT
2792 && ((val
& ((-1) << (width
- 1))) != ((-1) << (width
- 1))))
2793 val
&= (1 << width
) - 1;
2795 return gen_rtx (CONST_INT
, VOIDmode
, val
);
2798 /* We can do some operations on integer CONST_DOUBLEs. Also allow
2799 for a DImode operation on a CONST_INT. */
2800 else if (GET_MODE (op
) == VOIDmode
2801 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
2805 if (GET_CODE (op
) == CONST_DOUBLE
)
2806 l1
= CONST_DOUBLE_LOW (op
), h1
= CONST_DOUBLE_HIGH (op
);
2808 l1
= INTVAL (op
), h1
= l1
< 0 ? -1 : 0;
2818 neg_double (l1
, h1
, &lv
, &hv
);
2823 neg_double (l1
, h1
, &lv
, &hv
);
2831 lv
= HOST_BITS_PER_INT
+ exact_log2 (h1
& (-h1
)) + 1;
2833 lv
= exact_log2 (l1
& (-l1
)) + 1;
2837 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_INT
)
2838 return gen_rtx (CONST_INT
, VOIDmode
, l1
& GET_MODE_MASK (mode
));
2850 return immed_double_const (lv
, hv
, mode
);
2853 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
2854 else if (GET_CODE (op
) == CONST_DOUBLE
2855 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
2861 if (setjmp (handler
))
2862 /* There used to be a warning here, but that is inadvisable.
2863 People may want to cause traps, and the natural way
2864 to do it should not get a warning. */
2867 set_float_handler (handler
);
2869 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
2874 d
= REAL_VALUE_NEGATE (d
);
2878 if (REAL_VALUE_NEGATIVE (d
))
2879 d
= REAL_VALUE_NEGATE (d
);
2882 case FLOAT_TRUNCATE
:
2883 d
= (double) REAL_VALUE_TRUNCATE (mode
, d
);
2887 /* All this does is change the mode. */
2891 d
= (double) REAL_VALUE_FIX_TRUNCATE (d
);
2895 d
= (double) REAL_VALUE_UNSIGNED_FIX_TRUNCATE (d
);
2905 x
= immed_real_const_1 (d
, mode
);
2906 set_float_handler (0);
2909 else if (GET_CODE (op
) == CONST_DOUBLE
&& GET_MODE_CLASS (mode
) == MODE_INT
2910 && width
<= HOST_BITS_PER_INT
&& width
> 0)
2917 if (setjmp (handler
))
2920 set_float_handler (handler
);
2922 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
2927 val
= REAL_VALUE_FIX (d
);
2931 val
= REAL_VALUE_UNSIGNED_FIX (d
);
2938 set_float_handler (0);
2940 /* Clear the bits that don't belong in our mode,
2941 unless they and our sign bit are all one.
2942 So we get either a reasonable negative value or a reasonable
2943 unsigned value for this mode. */
2944 if (width
< HOST_BITS_PER_INT
2945 && ((val
& ((-1) << (width
- 1))) != ((-1) << (width
- 1))))
2946 val
&= (1 << width
) - 1;
2948 return gen_rtx (CONST_INT
, VOIDmode
, val
);
2951 else if (GET_MODE_CLASS (mode
) == MODE_INT
2952 || TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
)
2954 /* There are some simplifications we can do even if the operands
2955 aren't constant, but they don't apply to floating-point
2961 /* (not (not X)) == X, similarly for NEG. */
2962 if (GET_CODE (op
) == code
)
2963 return XEXP (op
, 0);
2967 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
2968 becomes just the MINUS if its mode is MODE. This allows
2969 folding switch statements on machines using casesi (such as
2971 if (GET_CODE (op
) == TRUNCATE
2972 && GET_MODE (XEXP (op
, 0)) == mode
2973 && GET_CODE (XEXP (op
, 0)) == MINUS
2974 && GET_CODE (XEXP (XEXP (op
, 0), 0)) == LABEL_REF
2975 && GET_CODE (XEXP (XEXP (op
, 0), 1)) == LABEL_REF
)
2976 return XEXP (op
, 0);
2986 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
2987 and OP1. Return 0 if no simplification is possible.
2989 Don't use this for relational operations such as EQ or LT.
2990 Use simplify_relational_operation instead. */
2993 simplify_binary_operation (code
, mode
, op0
, op1
)
2995 enum machine_mode mode
;
2998 register int arg0
, arg1
, arg0s
, arg1s
;
3000 int width
= GET_MODE_BITSIZE (mode
);
3002 /* Relational operations don't work here. We must know the mode
3003 of the operands in order to do the comparison correctly.
3004 Assuming a full word can give incorrect results.
3005 Consider comparing 128 with -128 in QImode. */
3007 if (GET_RTX_CLASS (code
) == '<')
3010 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3011 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
3012 && GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
3013 && mode
== GET_MODE (op0
) && mode
== GET_MODE (op1
))
3015 REAL_VALUE_TYPE f0
, f1
, value
;
3018 if (setjmp (handler
))
3021 set_float_handler (handler
);
3023 REAL_VALUE_FROM_CONST_DOUBLE (f0
, op0
);
3024 REAL_VALUE_FROM_CONST_DOUBLE (f1
, op1
);
3025 f0
= REAL_VALUE_TRUNCATE (mode
, f0
);
3026 f1
= REAL_VALUE_TRUNCATE (mode
, f1
);
3028 #ifdef REAL_ARITHMETIC
3029 REAL_ARITHMETIC (value
, code
, f0
, f1
);
3043 #ifndef REAL_INFINITY
3050 value
= MIN (f0
, f1
);
3053 value
= MAX (f0
, f1
);
3060 set_float_handler (0);
3061 value
= REAL_VALUE_TRUNCATE (mode
, value
);
3062 return immed_real_const_1 (value
, mode
);
3065 /* We can fold some multi-word operations. */
3066 else if (GET_MODE_CLASS (mode
) == MODE_INT
3067 && GET_CODE (op0
) == CONST_DOUBLE
3068 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
3070 int l1
, l2
, h1
, h2
, lv
, hv
;
3072 l1
= CONST_DOUBLE_LOW (op0
), h1
= CONST_DOUBLE_HIGH (op0
);
3074 if (GET_CODE (op1
) == CONST_DOUBLE
)
3075 l2
= CONST_DOUBLE_LOW (op1
), h2
= CONST_DOUBLE_HIGH (op1
);
3077 l2
= INTVAL (op1
), h2
= l2
< 0 ? -1 : 0;
3082 /* A - B == A + (-B). */
3083 neg_double (l2
, h2
, &lv
, &hv
);
3086 /* .. fall through ... */
3089 add_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3093 mul_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3096 case DIV
: case MOD
: case UDIV
: case UMOD
:
3097 /* We'd need to include tree.h to do this and it doesn't seem worth
3102 lv
= l1
& l2
, hv
= h1
& h2
;
3106 lv
= l1
| l2
, hv
= h1
| h2
;
3110 lv
= l1
^ l2
, hv
= h1
^ h2
;
3114 if (h1
< h2
|| (h1
== h2
&& (unsigned) l1
< (unsigned) l2
))
3121 if (h1
> h2
|| (h1
== h2
&& (unsigned) l1
> (unsigned) l2
))
3128 if ((unsigned) h1
< (unsigned) h2
3129 || (h1
== h2
&& (unsigned) l1
< (unsigned) l2
))
3136 if ((unsigned) h1
> (unsigned) h2
3137 || (h1
== h2
&& (unsigned) l1
> (unsigned) l2
))
3143 case LSHIFTRT
: case ASHIFTRT
:
3144 case ASHIFT
: case LSHIFT
:
3145 case ROTATE
: case ROTATERT
:
3146 #ifdef SHIFT_COUNT_TRUNCATED
3147 l2
&= (GET_MODE_BITSIZE (mode
) - 1), h2
= 0;
3150 if (h2
!= 0 || l2
< 0 || l2
>= GET_MODE_BITSIZE (mode
))
3153 if (code
== LSHIFTRT
|| code
== ASHIFTRT
)
3154 rshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3156 else if (code
== ASHIFT
|| code
== LSHIFT
)
3157 lshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3159 else if (code
== ROTATE
)
3160 lrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3161 else /* code == ROTATERT */
3162 rrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3169 return immed_double_const (lv
, hv
, mode
);
3171 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3173 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3174 || width
> HOST_BITS_PER_INT
|| width
== 0)
3176 /* Even if we can't compute a constant result,
3177 there are some cases worth simplifying. */
3182 /* In IEEE floating point, x+0 is not the same as x. Similarly
3183 for the other optimizations below. */
3184 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3185 && GET_MODE_CLASS (mode
) != MODE_INT
)
3188 if (op1
== CONST0_RTX (mode
))
3191 /* Strip off any surrounding CONSTs. They don't matter in any of
3193 if (GET_CODE (op0
) == CONST
)
3194 op0
= XEXP (op0
, 0);
3195 if (GET_CODE (op1
) == CONST
)
3196 op1
= XEXP (op1
, 0);
3198 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3199 if (GET_CODE (op0
) == NEG
)
3201 rtx tem
= simplify_binary_operation (MINUS
, mode
,
3202 op1
, XEXP (op0
, 0));
3203 return tem
? tem
: gen_rtx (MINUS
, mode
, op1
, XEXP (op0
, 0));
3205 else if (GET_CODE (op1
) == NEG
)
3207 rtx tem
= simplify_binary_operation (MINUS
, mode
,
3208 op0
, XEXP (op1
, 0));
3209 return tem
? tem
: gen_rtx (MINUS
, mode
, op0
, XEXP (op1
, 0));
3212 /* Don't use the associative law for floating point.
3213 The inaccuracy makes it nonassociative,
3214 and subtle programs can break if operations are associated. */
3215 if (GET_MODE_CLASS (mode
) != MODE_INT
)
3218 /* (a - b) + b -> a, similarly a + (b - a) -> a */
3219 if (GET_CODE (op0
) == MINUS
3220 && rtx_equal_p (XEXP (op0
, 1), op1
) && ! side_effects_p (op1
))
3221 return XEXP (op0
, 0);
3223 if (GET_CODE (op1
) == MINUS
3224 && rtx_equal_p (XEXP (op1
, 1), op0
) && ! side_effects_p (op0
))
3225 return XEXP (op1
, 0);
3227 /* (c1 - a) + c2 becomes (c1 + c2) - a. */
3228 if (GET_CODE (op1
) == CONST_INT
&& GET_CODE (op0
) == MINUS
3229 && GET_CODE (XEXP (op0
, 0)) == CONST_INT
)
3231 rtx tem
= simplify_binary_operation (PLUS
, mode
, op1
,
3234 return tem
? gen_rtx (MINUS
, mode
, tem
, XEXP (op0
, 1)) : 0;
3237 /* Handle both-operands-constant cases. */
3238 if (CONSTANT_P (op0
) && CONSTANT_P (op1
)
3239 && GET_CODE (op0
) != CONST_DOUBLE
3240 && GET_CODE (op1
) != CONST_DOUBLE
3241 && GET_MODE_CLASS (mode
) == MODE_INT
)
3243 if (GET_CODE (op1
) == CONST_INT
)
3244 return plus_constant (op0
, INTVAL (op1
));
3245 else if (GET_CODE (op0
) == CONST_INT
)
3246 return plus_constant (op1
, INTVAL (op0
));
3248 return gen_rtx (CONST
, mode
,
3249 gen_rtx (PLUS
, mode
,
3250 GET_CODE (op0
) == CONST
3251 ? XEXP (op0
, 0) : op0
,
3252 GET_CODE (op1
) == CONST
3253 ? XEXP (op1
, 0) : op1
));
3255 else if (GET_CODE (op1
) == CONST_INT
3256 && GET_CODE (op0
) == PLUS
3257 && (CONSTANT_P (XEXP (op0
, 0))
3258 || CONSTANT_P (XEXP (op0
, 1))))
3259 /* constant + (variable + constant)
3260 can result if an index register is made constant.
3261 We simplify this by adding the constants.
3262 If we did not, it would become an invalid address. */
3263 return plus_constant (op0
, INTVAL (op1
));
3268 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3269 using cc0, in which case we want to leave it as a COMPARE
3270 so we can distinguish it from a register-register-copy.
3272 In IEEE floating point, x-0 is not the same as x. */
3274 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3275 || GET_MODE_CLASS (mode
) == MODE_INT
)
3276 && op1
== CONST0_RTX (mode
))
3279 /* Do nothing here. */
3284 /* None of these optimizations can be done for IEEE
3286 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3287 && GET_MODE_CLASS (mode
) != MODE_INT
)
3290 /* We can't assume x-x is 0 even with non-IEEE floating point. */
3291 if (rtx_equal_p (op0
, op1
)
3292 && ! side_effects_p (op0
)
3293 && GET_MODE_CLASS (mode
) != MODE_FLOAT
)
3296 /* Change subtraction from zero into negation. */
3297 if (op0
== CONST0_RTX (mode
))
3298 return gen_rtx (NEG
, mode
, op1
);
3300 /* Subtracting 0 has no effect. */
3301 if (op1
== CONST0_RTX (mode
))
3304 /* Strip off any surrounding CONSTs. They don't matter in any of
3306 if (GET_CODE (op0
) == CONST
)
3307 op0
= XEXP (op0
, 0);
3308 if (GET_CODE (op1
) == CONST
)
3309 op1
= XEXP (op1
, 0);
3311 /* (a - (-b)) -> (a + b). */
3312 if (GET_CODE (op1
) == NEG
)
3314 rtx tem
= simplify_binary_operation (PLUS
, mode
,
3315 op0
, XEXP (op1
, 0));
3316 return tem
? tem
: gen_rtx (PLUS
, mode
, op0
, XEXP (op1
, 0));
3319 /* Don't use the associative law for floating point.
3320 The inaccuracy makes it nonassociative,
3321 and subtle programs can break if operations are associated. */
3322 if (GET_MODE_CLASS (mode
) != MODE_INT
)
3325 /* (a + b) - a -> b, and (b - (a + b)) -> -a */
3326 if (GET_CODE (op0
) == PLUS
3327 && rtx_equal_p (XEXP (op0
, 0), op1
)
3328 && ! side_effects_p (op1
))
3329 return XEXP (op0
, 1);
3330 else if (GET_CODE (op0
) == PLUS
3331 && rtx_equal_p (XEXP (op0
, 1), op1
)
3332 && ! side_effects_p (op1
))
3333 return XEXP (op0
, 0);
3335 if (GET_CODE (op1
) == PLUS
3336 && rtx_equal_p (XEXP (op1
, 0), op0
)
3337 && ! side_effects_p (op0
))
3339 rtx tem
= simplify_unary_operation (NEG
, mode
, XEXP (op1
, 1),
3342 return tem
? tem
: gen_rtx (NEG
, mode
, XEXP (op1
, 1));
3344 else if (GET_CODE (op1
) == PLUS
3345 && rtx_equal_p (XEXP (op1
, 1), op0
)
3346 && ! side_effects_p (op0
))
3348 rtx tem
= simplify_unary_operation (NEG
, mode
, XEXP (op1
, 0),
3351 return tem
? tem
: gen_rtx (NEG
, mode
, XEXP (op1
, 0));
3354 /* a - (a - b) -> b */
3355 if (GET_CODE (op1
) == MINUS
&& rtx_equal_p (op0
, XEXP (op1
, 0))
3356 && ! side_effects_p (op0
))
3357 return XEXP (op1
, 1);
3359 /* (a +/- b) - (a +/- c) can be simplified. Do variants of
3360 this involving commutativity. The most common case is
3361 (a + C1) - (a + C2), but it's not hard to do all the cases. */
3362 if ((GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
)
3363 && (GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
))
3365 rtx lhs0
= XEXP (op0
, 0), lhs1
= XEXP (op0
, 1);
3366 rtx rhs0
= XEXP (op1
, 0), rhs1
= XEXP (op1
, 1);
3367 int lhs_neg
= GET_CODE (op0
) == MINUS
;
3368 int rhs_neg
= GET_CODE (op1
) == MINUS
;
3369 rtx lhs
= 0, rhs
= 0;
3371 /* Set LHS and RHS to the two different terms. */
3372 if (rtx_equal_p (lhs0
, rhs0
) && ! side_effects_p (lhs0
))
3373 lhs
= lhs1
, rhs
= rhs1
;
3374 else if (! rhs_neg
&& rtx_equal_p (lhs0
, rhs1
)
3375 && ! side_effects_p (lhs0
))
3376 lhs
= lhs1
, rhs
= rhs0
;
3377 else if (! lhs_neg
&& rtx_equal_p (lhs1
, rhs0
)
3378 && ! side_effects_p (lhs1
))
3379 lhs
= lhs0
, rhs
= rhs1
;
3380 else if (! lhs_neg
&& ! rhs_neg
&& rtx_equal_p (lhs1
, rhs1
)
3381 && ! side_effects_p (lhs1
))
3382 lhs
= lhs0
, rhs
= rhs0
;
3384 /* The RHS is the operand of a MINUS, so its negation
3385 status should be complemented. */
3386 rhs_neg
= ! rhs_neg
;
3388 /* If we found two values equal, form the sum or difference
3389 of the remaining two terms. */
3392 rtx tem
= simplify_binary_operation (lhs_neg
== rhs_neg
3395 lhs_neg
? rhs
: lhs
,
3396 lhs_neg
? lhs
: rhs
);
3398 tem
= gen_rtx (lhs_neg
== rhs_neg
3400 mode
, lhs_neg
? rhs
: lhs
,
3401 lhs_neg
? lhs
: rhs
);
3403 /* If both sides negated, negate result. */
3404 if (lhs_neg
&& rhs_neg
)
3407 = simplify_unary_operation (NEG
, mode
, tem
, mode
);
3409 tem1
= gen_rtx (NEG
, mode
, tem
);
3419 /* c1 - (a + c2) becomes (c1 - c2) - a. */
3420 if (GET_CODE (op0
) == CONST_INT
&& GET_CODE (op1
) == PLUS
3421 && GET_CODE (XEXP (op1
, 1)) == CONST_INT
)
3423 rtx tem
= simplify_binary_operation (MINUS
, mode
, op0
,
3426 return tem
? gen_rtx (MINUS
, mode
, tem
, XEXP (op1
, 0)) : 0;
3429 /* c1 - (c2 - a) becomes (c1 - c2) + a. */
3430 if (GET_CODE (op0
) == CONST_INT
&& GET_CODE (op1
) == MINUS
3431 && GET_CODE (XEXP (op1
, 0)) == CONST_INT
)
3433 rtx tem
= simplify_binary_operation (MINUS
, mode
, op0
,
3436 return (tem
&& GET_CODE (tem
) == CONST_INT
3437 ? plus_constant (XEXP (op1
, 1), INTVAL (tem
))
3441 /* Don't let a relocatable value get a negative coeff. */
3442 if (GET_CODE (op1
) == CONST_INT
)
3443 return plus_constant (op0
, - INTVAL (op1
));
3447 if (op1
== constm1_rtx
)
3449 rtx tem
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3451 return tem
? tem
: gen_rtx (NEG
, mode
, op0
);
3454 /* In IEEE floating point, x*0 is not always 0. */
3455 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3456 || GET_MODE_CLASS (mode
) == MODE_INT
)
3457 && op1
== CONST0_RTX (mode
)
3458 && ! side_effects_p (op0
))
3461 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3462 However, ANSI says we can drop signals,
3463 so we can do this anyway. */
3464 if (op1
== CONST1_RTX (mode
))
3467 /* Convert multiply by constant power of two into shift. */
3468 if (GET_CODE (op1
) == CONST_INT
3469 && (val
= exact_log2 (INTVAL (op1
))) >= 0)
3470 return gen_rtx (ASHIFT
, mode
, op0
,
3471 gen_rtx (CONST_INT
, VOIDmode
, val
));
3473 if (GET_CODE (op1
) == CONST_DOUBLE
3474 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
)
3477 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3479 /* x*2 is x+x and x*(-1) is -x */
3480 if (REAL_VALUES_EQUAL (d
, dconst2
)
3481 && GET_MODE (op0
) == mode
)
3482 return gen_rtx (PLUS
, mode
, op0
, copy_rtx (op0
));
3484 else if (REAL_VALUES_EQUAL (d
, dconstm1
)
3485 && GET_MODE (op0
) == mode
)
3486 return gen_rtx (NEG
, mode
, op0
);
3491 if (op1
== const0_rtx
)
3493 if (GET_CODE (op1
) == CONST_INT
3494 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3496 if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3498 /* A | (~A) -> -1 */
3499 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3500 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3501 && ! side_effects_p (op0
))
3506 if (op1
== const0_rtx
)
3508 if (GET_CODE (op1
) == CONST_INT
3509 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3510 return gen_rtx (NOT
, mode
, op0
);
3511 if (op0
== op1
&& ! side_effects_p (op0
))
3516 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3518 if (GET_CODE (op1
) == CONST_INT
3519 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3521 if (op0
== op1
&& ! side_effects_p (op0
))
3524 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3525 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3526 && ! side_effects_p (op0
))
3531 /* Convert divide by power of two into shift (divide by 1 handled
3533 if (GET_CODE (op1
) == CONST_INT
3534 && (arg1
= exact_log2 (INTVAL (op1
))) > 0)
3535 return gen_rtx (LSHIFTRT
, mode
, op0
,
3536 gen_rtx (CONST_INT
, VOIDmode
, arg1
));
3538 /* ... fall through ... */
3541 if (op1
== CONST1_RTX (mode
))
3543 else if (op0
== CONST0_RTX (mode
)
3544 && ! side_effects_p (op1
))
3546 #if 0 /* Turned off till an expert says this is a safe thing to do. */
3547 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3548 /* Change division by a constant into multiplication. */
3549 else if (GET_CODE (op1
) == CONST_DOUBLE
3550 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
3551 && op1
!= CONST0_RTX (mode
))
3554 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3555 if (REAL_VALUES_EQUAL (d
, dconst0
))
3557 #if defined (REAL_ARITHMETIC)
3558 REAL_ARITHMETIC (d
, RDIV_EXPR
, dconst1
, d
);
3559 return gen_rtx (MULT
, mode
, op0
,
3560 CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
));
3562 return gen_rtx (MULT
, mode
, op0
,
3563 CONST_DOUBLE_FROM_REAL_VALUE (1./d
, mode
));
3571 /* Handle modulus by power of two (mod with 1 handled below). */
3572 if (GET_CODE (op1
) == CONST_INT
3573 && exact_log2 (INTVAL (op1
)) > 0)
3574 return gen_rtx (AND
, mode
, op0
,
3575 gen_rtx (CONST_INT
, VOIDmode
, INTVAL (op1
) - 1));
3577 /* ... fall through ... */
3580 if ((op0
== const0_rtx
|| op1
== const1_rtx
)
3581 && ! side_effects_p (op0
) && ! side_effects_p (op1
))
3587 /* Rotating ~0 always results in ~0. */
3588 if (GET_CODE (op0
) == CONST_INT
&& width
<= HOST_BITS_PER_INT
3589 && INTVAL (op0
) == GET_MODE_MASK (mode
)
3590 && ! side_effects_p (op1
))
3593 /* ... fall through ... */
3599 if (op1
== const0_rtx
)
3601 if (op0
== const0_rtx
&& ! side_effects_p (op1
))
3606 if (width
<= HOST_BITS_PER_INT
&& GET_CODE (op1
) == CONST_INT
3607 && INTVAL (op1
) == 1 << (width
-1)
3608 && ! side_effects_p (op0
))
3610 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3615 if (width
<= HOST_BITS_PER_INT
&& GET_CODE (op1
) == CONST_INT
3616 && INTVAL (op1
) == GET_MODE_MASK (mode
) >> 1
3617 && ! side_effects_p (op0
))
3619 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3624 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3626 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3631 if (op1
== constm1_rtx
&& ! side_effects_p (op0
))
3633 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3644 /* Get the integer argument values in two forms:
3645 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
3647 arg0
= INTVAL (op0
);
3648 arg1
= INTVAL (op1
);
3650 if (width
< HOST_BITS_PER_INT
)
3652 arg0
&= (1 << width
) - 1;
3653 arg1
&= (1 << width
) - 1;
3656 if (arg0s
& (1 << (width
- 1)))
3657 arg0s
|= ((-1) << width
);
3660 if (arg1s
& (1 << (width
- 1)))
3661 arg1s
|= ((-1) << width
);
3669 /* Compute the value of the arithmetic. */
3674 val
= arg0s
+ arg1s
;
3678 val
= arg0s
- arg1s
;
3682 val
= arg0s
* arg1s
;
3688 val
= arg0s
/ arg1s
;
3694 val
= arg0s
% arg1s
;
3700 val
= (unsigned) arg0
/ arg1
;
3706 val
= (unsigned) arg0
% arg1
;
3722 /* If shift count is undefined, don't fold it; let the machine do
3723 what it wants. But truncate it if the machine will do that. */
3727 #ifdef SHIFT_COUNT_TRUNCATED
3728 arg1
&= (BITS_PER_WORD
- 1);
3734 val
= ((unsigned) arg0
) >> arg1
;
3742 #ifdef SHIFT_COUNT_TRUNCATED
3743 arg1
&= (BITS_PER_WORD
- 1);
3749 val
= ((unsigned) arg0
) << arg1
;
3756 #ifdef SHIFT_COUNT_TRUNCATED
3757 arg1
&= (BITS_PER_WORD
- 1);
3763 val
= arg0s
>> arg1
;
3771 val
= ((((unsigned) arg0
) << (width
- arg1
))
3772 | (((unsigned) arg0
) >> arg1
));
3780 val
= ((((unsigned) arg0
) << arg1
)
3781 | (((unsigned) arg0
) >> (width
- arg1
)));
3785 /* Do nothing here. */
3789 val
= arg0s
<= arg1s
? arg0s
: arg1s
;
3793 val
= (unsigned int)arg0
<= (unsigned int)arg1
? arg0
: arg1
;
3797 val
= arg0s
> arg1s
? arg0s
: arg1s
;
3801 val
= (unsigned int)arg0
> (unsigned int)arg1
? arg0
: arg1
;
3808 /* Clear the bits that don't belong in our mode, unless they and our sign
3809 bit are all one. So we get either a reasonable negative value or a
3810 reasonable unsigned value for this mode. */
3811 if (width
< HOST_BITS_PER_INT
3812 && ((val
& ((-1) << (width
- 1))) != ((-1) << (width
- 1))))
3813 val
&= (1 << width
) - 1;
3815 return gen_rtx (CONST_INT
, VOIDmode
, val
);
3818 /* Like simplify_binary_operation except used for relational operators.
3819 MODE is the mode of the operands, not that of the result. */
3822 simplify_relational_operation (code
, mode
, op0
, op1
)
3824 enum machine_mode mode
;
3827 register int arg0
, arg1
, arg0s
, arg1s
;
3829 int width
= GET_MODE_BITSIZE (mode
);
3831 /* If op0 is a compare, extract the comparison arguments from it. */
3832 if (GET_CODE (op0
) == COMPARE
&& op1
== const0_rtx
)
3833 op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
3835 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3836 || width
> HOST_BITS_PER_INT
|| width
== 0)
3838 /* Even if we can't compute a constant result,
3839 there are some cases worth simplifying. */
3841 /* For non-IEEE floating-point, if the two operands are equal, we know
3843 if (rtx_equal_p (op0
, op1
)
3844 && (TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3845 || GET_MODE_CLASS (GET_MODE (op0
)) != MODE_FLOAT
))
3846 return (code
== EQ
|| code
== GE
|| code
== LE
|| code
== LEU
3847 || code
== GEU
) ? const_true_rtx
: const0_rtx
;
3848 else if (GET_CODE (op0
) == CONST_DOUBLE
3849 && GET_CODE (op1
) == CONST_DOUBLE
3850 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
3852 REAL_VALUE_TYPE d0
, d1
;
3855 int op0lt
, op1lt
, equal
;
3857 if (setjmp (handler
))
3860 set_float_handler (handler
);
3861 REAL_VALUE_FROM_CONST_DOUBLE (d0
, op0
);
3862 REAL_VALUE_FROM_CONST_DOUBLE (d1
, op1
);
3863 equal
= REAL_VALUES_EQUAL (d0
, d1
);
3864 op0lt
= REAL_VALUES_LESS (d0
, d1
);
3865 op1lt
= REAL_VALUES_LESS (d1
, d0
);
3866 set_float_handler (0);
3871 return equal
? const_true_rtx
: const0_rtx
;
3873 return !equal
? const_true_rtx
: const0_rtx
;
3875 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
3877 return op0lt
? const_true_rtx
: const0_rtx
;
3879 return equal
|| op1lt
? const_true_rtx
: const0_rtx
;
3881 return op1lt
? const_true_rtx
: const0_rtx
;
3890 /* We can't make this assumption due to #pragma weak */
3891 if (CONSTANT_P (op0
) && op1
== const0_rtx
)
3894 if (NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
3895 /* On some machines, the ap reg can be 0 sometimes. */
3896 && op0
!= arg_pointer_rtx
)
3903 /* We can't make this assumption due to #pragma weak */
3904 if (CONSTANT_P (op0
) && op1
== const0_rtx
)
3905 return const_true_rtx
;
3907 if (NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
3908 /* On some machines, the ap reg can be 0 sometimes. */
3909 && op0
!= arg_pointer_rtx
)
3910 return const_true_rtx
;
3914 /* Unsigned values are never negative, but we must be sure we are
3915 actually comparing a value, not a CC operand. */
3916 if (op1
== const0_rtx
3917 && GET_MODE_CLASS (mode
) == MODE_INT
)
3918 return const_true_rtx
;
3922 if (op1
== const0_rtx
3923 && GET_MODE_CLASS (mode
) == MODE_INT
)
3928 /* Unsigned values are never greater than the largest
3930 if (GET_CODE (op1
) == CONST_INT
3931 && INTVAL (op1
) == GET_MODE_MASK (mode
)
3932 && GET_MODE_CLASS (mode
) == MODE_INT
)
3933 return const_true_rtx
;
3937 if (GET_CODE (op1
) == CONST_INT
3938 && INTVAL (op1
) == GET_MODE_MASK (mode
)
3939 && GET_MODE_CLASS (mode
) == MODE_INT
)
3947 /* Get the integer argument values in two forms:
3948 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
3950 arg0
= INTVAL (op0
);
3951 arg1
= INTVAL (op1
);
3953 if (width
< HOST_BITS_PER_INT
)
3955 arg0
&= (1 << width
) - 1;
3956 arg1
&= (1 << width
) - 1;
3959 if (arg0s
& (1 << (width
- 1)))
3960 arg0s
|= ((-1) << width
);
3963 if (arg1s
& (1 << (width
- 1)))
3964 arg1s
|= ((-1) << width
);
3972 /* Compute the value of the arithmetic. */
3977 val
= arg0
!= arg1
? STORE_FLAG_VALUE
: 0;
3981 val
= arg0
== arg1
? STORE_FLAG_VALUE
: 0;
3985 val
= arg0s
<= arg1s
? STORE_FLAG_VALUE
: 0;
3989 val
= arg0s
< arg1s
? STORE_FLAG_VALUE
: 0;
3993 val
= arg0s
>= arg1s
? STORE_FLAG_VALUE
: 0;
3997 val
= arg0s
> arg1s
? STORE_FLAG_VALUE
: 0;
4001 val
= ((unsigned) arg0
) <= ((unsigned) arg1
) ? STORE_FLAG_VALUE
: 0;
4005 val
= ((unsigned) arg0
) < ((unsigned) arg1
) ? STORE_FLAG_VALUE
: 0;
4009 val
= ((unsigned) arg0
) >= ((unsigned) arg1
) ? STORE_FLAG_VALUE
: 0;
4013 val
= ((unsigned) arg0
) > ((unsigned) arg1
) ? STORE_FLAG_VALUE
: 0;
4020 /* Clear the bits that don't belong in our mode, unless they and our sign
4021 bit are all one. So we get either a reasonable negative value or a
4022 reasonable unsigned value for this mode. */
4023 if (width
< HOST_BITS_PER_INT
4024 && ((val
& ((-1) << (width
- 1))) != ((-1) << (width
- 1))))
4025 val
&= (1 << width
) - 1;
4027 return gen_rtx (CONST_INT
, VOIDmode
, val
);
4030 /* Simplify CODE, an operation with result mode MODE and three operands,
4031 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4032 a constant. Return 0 if no simplifications is possible. */
4035 simplify_ternary_operation (code
, mode
, op0_mode
, op0
, op1
, op2
)
4037 enum machine_mode mode
, op0_mode
;
4040 int width
= GET_MODE_BITSIZE (mode
);
4042 /* VOIDmode means "infinite" precision. */
4044 width
= HOST_BITS_PER_INT
;
4050 if (GET_CODE (op0
) == CONST_INT
4051 && GET_CODE (op1
) == CONST_INT
4052 && GET_CODE (op2
) == CONST_INT
4053 && INTVAL (op1
) + INTVAL (op2
) <= GET_MODE_BITSIZE (op0_mode
)
4054 && width
<= HOST_BITS_PER_INT
)
4056 /* Extracting a bit-field from a constant */
4057 int val
= INTVAL (op0
);
4060 val
>>= (GET_MODE_BITSIZE (op0_mode
) - INTVAL (op2
) - INTVAL (op1
));
4062 val
>>= INTVAL (op2
);
4064 if (HOST_BITS_PER_INT
!= INTVAL (op1
))
4066 /* First zero-extend. */
4067 val
&= (1 << INTVAL (op1
)) - 1;
4068 /* If desired, propagate sign bit. */
4069 if (code
== SIGN_EXTRACT
&& (val
& (1 << (INTVAL (op1
) - 1))))
4070 val
|= ~ ((1 << INTVAL (op1
)) - 1);
4073 /* Clear the bits that don't belong in our mode,
4074 unless they and our sign bit are all one.
4075 So we get either a reasonable negative value or a reasonable
4076 unsigned value for this mode. */
4077 if (width
< HOST_BITS_PER_INT
4078 && ((val
& ((-1) << (width
- 1))) != ((-1) << (width
- 1))))
4079 val
&= (1 << width
) - 1;
4081 return gen_rtx (CONST_INT
, VOIDmode
, val
);
4086 if (GET_CODE (op0
) == CONST_INT
)
4087 return op0
!= const0_rtx
? op1
: op2
;
4097 /* If X is a nontrivial arithmetic operation on an argument
4098 for which a constant value can be determined, return
4099 the result of operating on that value, as a constant.
4100 Otherwise, return X, possibly with one or more operands
4101 modified by recursive calls to this function.
4103 If X is a register whose contents are known, we do NOT
4104 return those contents. This is because an instruction that
4105 uses a register is usually faster than one that uses a constant.
4107 INSN is the insn that we may be modifying. If it is 0, make a copy
4108 of X before modifying it. */
4115 register enum rtx_code code
;
4116 register enum machine_mode mode
;
4118 register int i
, val
;
4123 /* Folded equivalents of first two operands of X. */
4127 /* Constant equivalents of first three operands of X;
4128 0 when no such equivalent is known. */
4133 /* The mode of the first operand of X. We need this for sign and zero
4135 enum machine_mode mode_arg0
;
4140 mode
= GET_MODE (x
);
4141 code
= GET_CODE (x
);
4150 /* No use simplifying an EXPR_LIST
4151 since they are used only for lists of args
4152 in a function call's REG_EQUAL note. */
4158 return prev_insn_cc0
;
4162 /* If the next insn is a CODE_LABEL followed by a jump table,
4163 PC's value is a LABEL_REF pointing to that label. That
4164 lets us fold switch statements on the Vax. */
4165 if (insn
&& GET_CODE (insn
) == JUMP_INSN
)
4167 rtx next
= next_nonnote_insn (insn
);
4169 if (next
&& GET_CODE (next
) == CODE_LABEL
4170 && NEXT_INSN (next
) != 0
4171 && GET_CODE (NEXT_INSN (next
)) == JUMP_INSN
4172 && (GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_VEC
4173 || GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_DIFF_VEC
))
4174 return gen_rtx (LABEL_REF
, Pmode
, next
);
4179 /* If this is a single word of a multi-word value, see if we previously
4180 assigned a value to that word. */
4181 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
4182 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))) > UNITS_PER_WORD
4183 && (new = lookup_as_function (x
, CONST_INT
)) != 0)
4186 /* If this is a paradoxical SUBREG, we can't do anything with
4187 it because we have no idea what value the extra bits would have. */
4188 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4191 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4192 We might be able to if the SUBREG is extracting a single word in an
4193 integral mode or extracting the low part. */
4195 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
4196 const_arg0
= equiv_constant (folded_arg0
);
4198 folded_arg0
= const_arg0
;
4200 if (folded_arg0
!= SUBREG_REG (x
))
4204 if (GET_MODE_CLASS (mode
) == MODE_INT
4205 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4206 && GET_MODE (SUBREG_REG (x
)) != VOIDmode
)
4207 new = operand_subword (folded_arg0
, SUBREG_WORD (x
), 0,
4208 GET_MODE (SUBREG_REG (x
)));
4209 if (new == 0 && subreg_lowpart_p (x
))
4210 new = gen_lowpart_if_possible (mode
, folded_arg0
);
4215 /* If this is a narrowing SUBREG and our operand is a REG, see if
4216 we can find an equivalence for REG that is a arithmetic operation
4217 in a wider mode where both operands are paradoxical SUBREGs
4218 from objects of our result mode. In that case, we couldn't report
4219 an equivalent value for that operation, since we don't know what the
4220 extra bits will be. But we can find an equivalence for this SUBREG
4221 by folding that operation is the narrow mode. This allows us to
4222 fold arithmetic in narrow modes when the machine only supports
4223 word-sized arithmetic. */
4225 if (GET_CODE (folded_arg0
) == REG
4226 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
)))
4228 struct table_elt
*elt
;
4230 /* We can use HASH here since we know that canon_hash won't be
4232 elt
= lookup (folded_arg0
,
4233 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
4234 GET_MODE (folded_arg0
));
4237 elt
= elt
->first_same_value
;
4239 for (; elt
; elt
= elt
->next_same_value
)
4241 /* Just check for unary and binary operations. */
4242 if (GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '1'
4243 && GET_CODE (elt
->exp
) != SIGN_EXTEND
4244 && GET_CODE (elt
->exp
) != ZERO_EXTEND
4245 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4246 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
)
4248 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
4250 if (GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4251 op0
= fold_rtx (op0
, 0);
4253 op0
= equiv_constant (op0
);
4255 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
4258 else if ((GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '2'
4259 || GET_RTX_CLASS (GET_CODE (elt
->exp
)) == 'c')
4260 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4261 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
4263 || CONSTANT_P (XEXP (elt
->exp
, 0)))
4264 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
4265 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
4267 || CONSTANT_P (XEXP (elt
->exp
, 1))))
4269 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
4270 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
4272 if (op0
&& GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4273 op0
= fold_rtx (op0
, 0);
4276 op0
= equiv_constant (op0
);
4278 if (op1
&& GET_CODE (op1
) != REG
&& ! CONSTANT_P (op1
))
4279 op1
= fold_rtx (op1
, 0);
4282 op1
= equiv_constant (op1
);
4285 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
,
4298 /* If we have (NOT Y), see if Y is known to be (NOT Z).
4299 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
4300 new = lookup_as_function (XEXP (x
, 0), code
);
4302 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
4306 /* If we are not actually processing an insn, don't try to find the
4307 best address. Not only don't we care, but we could modify the
4308 MEM in an invalid way since we have no insn to validate against. */
4310 find_best_addr (insn
, &XEXP (x
, 0));
4313 /* Even if we don't fold in the insn itself,
4314 we can safely do so here, in hopes of getting a constant. */
4315 rtx addr
= fold_rtx (XEXP (x
, 0), 0);
4319 if (GET_CODE (addr
) == REG
4320 && REGNO_QTY_VALID_P (REGNO (addr
))
4321 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
4322 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
4323 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
4325 /* If address is constant, split it into a base and integer offset. */
4326 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
4328 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
4329 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
4331 base
= XEXP (XEXP (addr
, 0), 0);
4332 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
4334 else if (GET_CODE (addr
) == LO_SUM
4335 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
4336 base
= XEXP (addr
, 1);
4338 /* If this is a constant pool reference, we can fold it into its
4339 constant to allow better value tracking. */
4340 if (base
&& GET_CODE (base
) == SYMBOL_REF
4341 && CONSTANT_POOL_ADDRESS_P (base
))
4343 rtx constant
= get_pool_constant (base
);
4344 enum machine_mode const_mode
= get_pool_mode (base
);
4347 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
4348 constant_pool_entries_cost
= COST (constant
);
4350 /* If we are loading the full constant, we have an equivalence. */
4351 if (offset
== 0 && mode
== const_mode
)
4354 /* If this actually isn't a constant (wierd!), we can't do
4355 anything. Otherwise, handle the two most common cases:
4356 extracting a word from a multi-word constant, and extracting
4357 the low-order bits. Other cases don't seem common enough to
4359 if (! CONSTANT_P (constant
))
4362 if (GET_MODE_CLASS (mode
) == MODE_INT
4363 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4364 && offset
% UNITS_PER_WORD
== 0
4365 && (new = operand_subword (constant
,
4366 offset
/ UNITS_PER_WORD
,
4367 0, const_mode
)) != 0)
4370 if (((BYTES_BIG_ENDIAN
4371 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
4372 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
4373 && (new = gen_lowpart_if_possible (mode
, constant
)) != 0)
4377 /* If this is a reference to a label at a known position in a jump
4378 table, we also know its value. */
4379 if (base
&& GET_CODE (base
) == LABEL_REF
)
4381 rtx label
= XEXP (base
, 0);
4382 rtx table_insn
= NEXT_INSN (label
);
4384 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
4385 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
4387 rtx table
= PATTERN (table_insn
);
4390 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
4391 < XVECLEN (table
, 0)))
4392 return XVECEXP (table
, 0,
4393 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
4395 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
4396 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
4398 rtx table
= PATTERN (table_insn
);
4401 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
4402 < XVECLEN (table
, 1)))
4404 offset
/= GET_MODE_SIZE (GET_MODE (table
));
4405 new = gen_rtx (MINUS
, Pmode
, XVECEXP (table
, 1, offset
),
4408 if (GET_MODE (table
) != Pmode
)
4409 new = gen_rtx (TRUNCATE
, GET_MODE (table
), new);
4423 mode_arg0
= VOIDmode
;
4425 /* Try folding our operands.
4426 Then see which ones have constant values known. */
4428 fmt
= GET_RTX_FORMAT (code
);
4429 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4432 rtx arg
= XEXP (x
, i
);
4433 rtx folded_arg
= arg
, const_arg
= 0;
4434 enum machine_mode mode_arg
= GET_MODE (arg
);
4435 rtx cheap_arg
, expensive_arg
;
4436 rtx replacements
[2];
4439 /* Most arguments are cheap, so handle them specially. */
4440 switch (GET_CODE (arg
))
4443 /* This is the same as calling equiv_constant; it is duplicated
4445 if (REGNO_QTY_VALID_P (REGNO (arg
))
4446 && qty_const
[reg_qty
[REGNO (arg
)]] != 0
4447 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != REG
4448 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != PLUS
)
4450 = gen_lowpart_if_possible (GET_MODE (arg
),
4451 qty_const
[reg_qty
[REGNO (arg
)]]);
4464 folded_arg
= prev_insn_cc0
;
4465 mode_arg
= prev_insn_cc0_mode
;
4466 const_arg
= equiv_constant (folded_arg
);
4471 folded_arg
= fold_rtx (arg
, insn
);
4472 const_arg
= equiv_constant (folded_arg
);
4475 /* For the first three operands, see if the operand
4476 is constant or equivalent to a constant. */
4480 folded_arg0
= folded_arg
;
4481 const_arg0
= const_arg
;
4482 mode_arg0
= mode_arg
;
4485 folded_arg1
= folded_arg
;
4486 const_arg1
= const_arg
;
4489 const_arg2
= const_arg
;
4493 /* Pick the least expensive of the folded argument and an
4494 equivalent constant argument. */
4495 if (const_arg
== 0 || const_arg
== folded_arg
4496 || COST (const_arg
) > COST (folded_arg
))
4497 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
4499 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
4501 /* Try to replace the operand with the cheapest of the two
4502 possibilities. If it doesn't work and this is either of the first
4503 two operands of a commutative operation, try swapping them.
4504 If THAT fails, try the more expensive, provided it is cheaper
4505 than what is already there. */
4507 if (cheap_arg
== XEXP (x
, i
))
4510 if (insn
== 0 && ! copied
)
4516 replacements
[0] = cheap_arg
, replacements
[1] = expensive_arg
;
4518 j
< 2 && replacements
[j
]
4519 && COST (replacements
[j
]) < COST (XEXP (x
, i
));
4522 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
4525 if (code
== NE
|| code
== EQ
|| GET_RTX_CLASS (code
) == 'c')
4527 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
4528 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
4530 if (apply_change_group ())
4532 /* Swap them back to be invalid so that this loop can
4533 continue and flag them to be swapped back later. */
4536 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
4545 else if (fmt
[i
] == 'E')
4546 /* Don't try to fold inside of a vector of expressions.
4547 Doing nothing is harmless. */
4550 /* If a commutative operation, place a constant integer as the second
4551 operand unless the first operand is also a constant integer. Otherwise,
4552 place any constant second unless the first operand is also a constant. */
4554 if (code
== EQ
|| code
== NE
|| GET_RTX_CLASS (code
) == 'c')
4556 if (must_swap
|| (const_arg0
4558 || (GET_CODE (const_arg0
) == CONST_INT
4559 && GET_CODE (const_arg1
) != CONST_INT
))))
4561 register rtx tem
= XEXP (x
, 0);
4563 if (insn
== 0 && ! copied
)
4569 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
4570 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
4571 if (apply_change_group ())
4573 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
4574 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
4579 /* If X is an arithmetic operation, see if we can simplify it. */
4581 switch (GET_RTX_CLASS (code
))
4584 new = simplify_unary_operation (code
, mode
,
4585 const_arg0
? const_arg0
: folded_arg0
,
4590 /* See what items are actually being compared and set FOLDED_ARG[01]
4591 to those values and CODE to the actual comparison code. If any are
4592 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
4593 do anything if both operands are already known to be constant. */
4595 if (const_arg0
== 0 || const_arg1
== 0)
4597 struct table_elt
*p0
, *p1
;
4599 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
);
4600 const_arg0
= equiv_constant (folded_arg0
);
4601 const_arg1
= equiv_constant (folded_arg1
);
4603 /* Get a mode from the values actually being compared, or from the
4604 old value of MODE_ARG0 if both are constants. If the resulting
4605 mode is VOIDmode or a MODE_CC mode, we don't know what kinds
4606 of things are being compared, so we can't do anything with this
4609 if (GET_MODE (folded_arg0
) != VOIDmode
4610 && GET_MODE_CLASS (GET_MODE (folded_arg0
)) != MODE_CC
)
4611 mode_arg0
= GET_MODE (folded_arg0
);
4613 else if (GET_MODE (folded_arg1
) != VOIDmode
4614 && GET_MODE_CLASS (GET_MODE (folded_arg1
)) != MODE_CC
)
4615 mode_arg0
= GET_MODE (folded_arg1
);
4617 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
4620 /* If we do not now have two constants being compared, see if we
4621 can nevertheless deduce some things about the comparison. */
4622 if (const_arg0
== 0 || const_arg1
== 0)
4624 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit
4625 constant? These aren't zero, but we don't know their sign. */
4626 if (const_arg1
== const0_rtx
4627 && (NONZERO_BASE_PLUS_P (folded_arg0
)
4628 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
4630 || GET_CODE (folded_arg0
) == SYMBOL_REF
4632 || GET_CODE (folded_arg0
) == LABEL_REF
4633 || GET_CODE (folded_arg0
) == CONST
))
4637 else if (code
== NE
)
4638 return const_true_rtx
;
4641 /* See if the two operands are the same. We don't do this
4642 for IEEE floating-point since we can't assume x == x
4643 since x might be a NaN. */
4645 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4646 || GET_MODE_CLASS (mode_arg0
) != MODE_FLOAT
)
4647 && (folded_arg0
== folded_arg1
4648 || (GET_CODE (folded_arg0
) == REG
4649 && GET_CODE (folded_arg1
) == REG
4650 && (reg_qty
[REGNO (folded_arg0
)]
4651 == reg_qty
[REGNO (folded_arg1
)]))
4652 || ((p0
= lookup (folded_arg0
,
4653 (safe_hash (folded_arg0
, mode_arg0
)
4654 % NBUCKETS
), mode_arg0
))
4655 && (p1
= lookup (folded_arg1
,
4656 (safe_hash (folded_arg1
, mode_arg0
)
4657 % NBUCKETS
), mode_arg0
))
4658 && p0
->first_same_value
== p1
->first_same_value
)))
4659 return ((code
== EQ
|| code
== LE
|| code
== GE
4660 || code
== LEU
|| code
== GEU
)
4661 ? const_true_rtx
: const0_rtx
);
4663 /* If FOLDED_ARG0 is a register, see if the comparison we are
4664 doing now is either the same as we did before or the reverse
4665 (we only check the reverse if not floating-point). */
4666 else if (GET_CODE (folded_arg0
) == REG
)
4668 int qty
= reg_qty
[REGNO (folded_arg0
)];
4670 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
))
4671 && (comparison_dominates_p (qty_comparison_code
[qty
], code
)
4672 || (comparison_dominates_p (qty_comparison_code
[qty
],
4673 reverse_condition (code
))
4674 && GET_MODE_CLASS (mode_arg0
) == MODE_INT
))
4675 && (rtx_equal_p (qty_comparison_const
[qty
], folded_arg1
)
4677 && rtx_equal_p (qty_comparison_const
[qty
],
4679 || (GET_CODE (folded_arg1
) == REG
4680 && (reg_qty
[REGNO (folded_arg1
)]
4681 == qty_comparison_qty
[qty
]))))
4682 return (comparison_dominates_p (qty_comparison_code
[qty
],
4684 ? const_true_rtx
: const0_rtx
);
4689 /* If we are comparing against zero, see if the first operand is
4690 equivalent to an IOR with a constant. If so, we may be able to
4691 determine the result of this comparison. */
4693 if (const_arg1
== const0_rtx
)
4695 rtx y
= lookup_as_function (folded_arg0
, IOR
);
4699 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
4700 && GET_CODE (inner_const
) == CONST_INT
4701 && INTVAL (inner_const
) != 0)
4703 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
4704 int has_sign
= (HOST_BITS_PER_INT
>= sign_bitnum
4705 && (INTVAL (inner_const
) & (1 << sign_bitnum
)));
4712 return const_true_rtx
;
4715 return const_true_rtx
;
4725 new = simplify_relational_operation (code
, mode_arg0
,
4726 const_arg0
? const_arg0
: folded_arg0
,
4727 const_arg1
? const_arg1
: folded_arg1
);
4735 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4736 with that LABEL_REF as its second operand. If so, the result is
4737 the first operand of that MINUS. This handles switches with an
4738 ADDR_DIFF_VEC table. */
4739 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
4741 rtx y
= lookup_as_function (folded_arg0
, MINUS
);
4743 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
4744 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
4748 /* ... fall through ... */
4751 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4752 case IOR
: case AND
: case XOR
:
4753 case MULT
: case DIV
: case UDIV
:
4754 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
4755 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4756 is known to be of similar form, we may be able to replace the
4757 operation with a combined operation. This may eliminate the
4758 intermediate operation if every use is simplified in this way.
4759 Note that the similar optimization done by combine.c only works
4760 if the intermediate operation's result has only one reference. */
4762 if (GET_CODE (folded_arg0
) == REG
4763 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
4766 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
4767 rtx y
= lookup_as_function (folded_arg0
, code
);
4769 enum rtx_code associate_code
;
4773 || 0 == (inner_const
4774 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
4775 || GET_CODE (inner_const
) != CONST_INT
4776 /* If we have compiled a statement like
4777 "if (x == (x & mask1))", and now are looking at
4778 "x & mask2", we will have a case where the first operand
4779 of Y is the same as our first operand. Unless we detect
4780 this case, an infinite loop will result. */
4781 || XEXP (y
, 0) == folded_arg0
)
4784 /* Don't associate these operations if they are a PLUS with the
4785 same constant and it is a power of two. These might be doable
4786 with a pre- or post-increment. Similarly for two subtracts of
4787 identical powers of two with post decrement. */
4789 if (code
== PLUS
&& INTVAL (const_arg1
) == INTVAL (inner_const
)
4791 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
4792 || exact_log2 (INTVAL (const_arg1
)) >= 0
4794 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
4795 || exact_log2 (- INTVAL (const_arg1
)) >= 0
4800 /* Compute the code used to compose the constants. For example,
4801 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
4804 = (code
== MULT
|| code
== DIV
|| code
== UDIV
? MULT
4805 : is_shift
|| code
== PLUS
|| code
== MINUS
? PLUS
: code
);
4807 new_const
= simplify_binary_operation (associate_code
, mode
,
4808 const_arg1
, inner_const
);
4813 /* If we are associating shift operations, don't let this
4814 produce a shift of larger than the object. This could
4815 occur when we following a sign-extend by a right shift on
4816 a machine that does a sign-extend as a pair of shifts. */
4818 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
4819 && INTVAL (new_const
) > GET_MODE_BITSIZE (mode
))
4822 y
= copy_rtx (XEXP (y
, 0));
4824 /* If Y contains our first operand (the most common way this
4825 can happen is if Y is a MEM), we would do into an infinite
4826 loop if we tried to fold it. So don't in that case. */
4828 if (! reg_mentioned_p (folded_arg0
, y
))
4829 y
= fold_rtx (y
, insn
);
4831 new = simplify_binary_operation (code
, mode
, y
, new_const
);
4835 return gen_rtx (code
, mode
, y
, new_const
);
4839 new = simplify_binary_operation (code
, mode
,
4840 const_arg0
? const_arg0
: folded_arg0
,
4841 const_arg1
? const_arg1
: folded_arg1
);
4845 /* (lo_sum (high X) X) is simply X. */
4846 if (code
== LO_SUM
&& const_arg0
!= 0
4847 && GET_CODE (const_arg0
) == HIGH
4848 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
4854 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
4855 const_arg0
? const_arg0
: folded_arg0
,
4856 const_arg1
? const_arg1
: folded_arg1
,
4857 const_arg2
? const_arg2
: XEXP (x
, 2));
4861 return new ? new : x
;
4864 /* Return a constant value currently equivalent to X.
4865 Return 0 if we don't know one. */
4871 if (GET_CODE (x
) == REG
4872 && REGNO_QTY_VALID_P (REGNO (x
))
4873 && qty_const
[reg_qty
[REGNO (x
)]])
4874 x
= gen_lowpart_if_possible (GET_MODE (x
), qty_const
[reg_qty
[REGNO (x
)]]);
4876 if (x
!= 0 && CONSTANT_P (x
))
4879 /* If X is a MEM, try to fold it outside the context of any insn to see if
4880 it might be equivalent to a constant. That handles the case where it
4881 is a constant-pool reference. Then try to look it up in the hash table
4882 in case it is something whose value we have seen before. */
4884 if (GET_CODE (x
) == MEM
)
4886 struct table_elt
*elt
;
4888 x
= fold_rtx (x
, 0);
4892 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) % NBUCKETS
, GET_MODE (x
));
4896 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
4897 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
4904 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4905 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4906 least-significant part of X.
4907 MODE specifies how big a part of X to return.
4909 If the requested operation cannot be done, 0 is returned.
4911 This is similar to gen_lowpart in emit-rtl.c. */
4914 gen_lowpart_if_possible (mode
, x
)
4915 enum machine_mode mode
;
4918 rtx result
= gen_lowpart_common (mode
, x
);
4922 else if (GET_CODE (x
) == MEM
)
4924 /* This is the only other case we handle. */
4925 register int offset
= 0;
4928 #if WORDS_BIG_ENDIAN
4929 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
4930 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
4932 #if BYTES_BIG_ENDIAN
4933 /* Adjust the address so that the address-after-the-data
4935 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
4936 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
4938 new = gen_rtx (MEM
, mode
, plus_constant (XEXP (x
, 0), offset
));
4939 if (! memory_address_p (mode
, XEXP (new, 0)))
4941 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x
);
4942 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x
);
4943 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x
);
4950 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4951 branch. It will be zero if not.
4953 In certain cases, this can cause us to add an equivalence. For example,
4954 if we are following the taken case of
4956 we can add the fact that `i' and '2' are now equivalent.
4958 In any case, we can record that this comparison was passed. If the same
4959 comparison is seen later, we will know its value. */
4962 record_jump_equiv (insn
, taken
)
4966 int cond_known_true
;
4968 enum machine_mode mode
;
4969 int reversed_nonequality
= 0;
4972 /* Ensure this is the right kind of insn. */
4973 if (! condjump_p (insn
) || simplejump_p (insn
))
4976 /* See if this jump condition is known true or false. */
4978 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 2) == pc_rtx
);
4980 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 1) == pc_rtx
);
4982 /* Get the type of comparison being done and the operands being compared.
4983 If we had to reverse a non-equality condition, record that fact so we
4984 know that it isn't valid for floating-point. */
4985 code
= GET_CODE (XEXP (SET_SRC (PATTERN (insn
)), 0));
4986 op0
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 0), insn
);
4987 op1
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 1), insn
);
4989 code
= find_comparison_args (code
, &op0
, &op1
);
4990 if (! cond_known_true
)
4992 reversed_nonequality
= (code
!= EQ
&& code
!= NE
);
4993 code
= reverse_condition (code
);
4996 /* The mode is the mode of the non-constant. */
4997 mode
= GET_MODE (op0
);
4998 if (mode
== VOIDmode
) mode
= GET_MODE (op1
);
5000 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
5003 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5004 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5005 Make any useful entries we can with that information. Called from
5006 above function and called recursively. */
5009 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
)
5011 enum machine_mode mode
;
5013 int reversed_nonequality
;
5015 int op0_hash_code
, op1_hash_code
;
5016 int op0_in_memory
, op0_in_struct
, op1_in_memory
, op1_in_struct
;
5017 struct table_elt
*op0_elt
, *op1_elt
;
5019 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5020 we know that they are also equal in the smaller mode (this is also
5021 true for all smaller modes whether or not there is a SUBREG, but
5022 is not worth testing for with no SUBREG. */
5024 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
5025 && GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
))))
5027 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5028 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5030 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5031 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5032 reversed_nonequality
);
5035 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
5036 && GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
))))
5038 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5039 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5041 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5042 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5043 reversed_nonequality
);
5046 /* Similarly, if this is an NE comparison, and either is a SUBREG
5047 making a smaller mode, we know the whole thing is also NE. */
5049 if (code
== NE
&& GET_CODE (op0
) == SUBREG
5050 && subreg_lowpart_p (op0
)
5051 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
))))
5053 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5054 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5056 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5057 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5058 reversed_nonequality
);
5061 if (code
== NE
&& GET_CODE (op1
) == SUBREG
5062 && subreg_lowpart_p (op1
)
5063 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
))))
5065 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5066 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5068 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5069 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5070 reversed_nonequality
);
5073 /* Hash both operands. */
5076 hash_arg_in_memory
= 0;
5077 hash_arg_in_struct
= 0;
5078 op0_hash_code
= HASH (op0
, mode
);
5079 op0_in_memory
= hash_arg_in_memory
;
5080 op0_in_struct
= hash_arg_in_struct
;
5086 hash_arg_in_memory
= 0;
5087 hash_arg_in_struct
= 0;
5088 op1_hash_code
= HASH (op1
, mode
);
5089 op1_in_memory
= hash_arg_in_memory
;
5090 op1_in_struct
= hash_arg_in_struct
;
5095 /* Look up both operands. */
5096 op0_elt
= lookup (op0
, op0_hash_code
, mode
);
5097 op1_elt
= lookup (op1
, op1_hash_code
, mode
);
5099 /* If we aren't setting two things equal all we can do is save this
5103 /* If we reversed a floating-point comparison, if OP0 is not a
5104 register, or if OP1 is neither a register or constant, we can't
5107 if (GET_CODE (op1
) != REG
)
5108 op1
= equiv_constant (op1
);
5110 if ((reversed_nonequality
&& GET_MODE_CLASS (mode
) != MODE_INT
)
5111 || GET_CODE (op0
) != REG
|| op1
== 0)
5114 /* Put OP0 in the hash table if it isn't already. This gives it a
5115 new quantity number. */
5118 if (insert_regs (op0
, 0, 0))
5120 rehash_using_reg (op0
);
5121 op0_hash_code
= HASH (op0
, mode
);
5124 op0_elt
= insert (op0
, 0, op0_hash_code
, mode
);
5125 op0_elt
->in_memory
= op0_in_memory
;
5126 op0_elt
->in_struct
= op0_in_struct
;
5129 qty_comparison_code
[reg_qty
[REGNO (op0
)]] = code
;
5130 if (GET_CODE (op1
) == REG
)
5132 /* Put OP1 in the hash table so it gets a new quantity number. */
5135 if (insert_regs (op1
, 0, 0))
5137 rehash_using_reg (op1
);
5138 op1_hash_code
= HASH (op1
, mode
);
5141 op1_elt
= insert (op1
, 0, op1_hash_code
, mode
);
5142 op1_elt
->in_memory
= op1_in_memory
;
5143 op1_elt
->in_struct
= op1_in_struct
;
5146 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = reg_qty
[REGNO (op1
)];
5147 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = 0;
5151 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = -1;
5152 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = op1
;
5158 /* If both are equivalent, merge the two classes. Save this class for
5159 `cse_set_around_loop'. */
5160 if (op0_elt
&& op1_elt
)
5162 merge_equiv_classes (op0_elt
, op1_elt
);
5163 last_jump_equiv_class
= op0_elt
;
5166 /* For whichever side doesn't have an equivalence, make one. */
5169 if (insert_regs (op0
, op1_elt
, 0))
5171 rehash_using_reg (op0
);
5172 op0_hash_code
= HASH (op0
, mode
);
5175 op0_elt
= insert (op0
, op1_elt
, op0_hash_code
, mode
);
5176 op0_elt
->in_memory
= op0_in_memory
;
5177 op0_elt
->in_struct
= op0_in_struct
;
5178 last_jump_equiv_class
= op0_elt
;
5183 if (insert_regs (op1
, op0_elt
, 0))
5185 rehash_using_reg (op1
);
5186 op1_hash_code
= HASH (op1
, mode
);
5189 op1_elt
= insert (op1
, op0_elt
, op1_hash_code
, mode
);
5190 op1_elt
->in_memory
= op1_in_memory
;
5191 op1_elt
->in_struct
= op1_in_struct
;
5192 last_jump_equiv_class
= op1_elt
;
5196 /* CSE processing for one instruction.
5197 First simplify sources and addresses of all assignments
5198 in the instruction, using previously-computed equivalents values.
5199 Then install the new sources and destinations in the table
5200 of available values.
5202 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
5205 /* Data on one SET contained in the instruction. */
5209 /* The SET rtx itself. */
5211 /* The SET_SRC of the rtx (the original value, if it is changing). */
5213 /* The hash-table element for the SET_SRC of the SET. */
5214 struct table_elt
*src_elt
;
5215 /* Hash code for the SET_SRC. */
5217 /* Hash code for the SET_DEST. */
5219 /* The SET_DEST, with SUBREG, etc., stripped. */
5221 /* Place where the pointer to the INNER_DEST was found. */
5222 rtx
*inner_dest_loc
;
5223 /* Nonzero if the SET_SRC is in memory. */
5225 /* Nonzero if the SET_SRC is in a structure. */
5227 /* Nonzero if the SET_SRC contains something
5228 whose value cannot be predicted and understood. */
5230 /* Original machine mode, in case it becomes a CONST_INT. */
5231 enum machine_mode mode
;
5232 /* A constant equivalent for SET_SRC, if any. */
5234 /* Hash code of constant equivalent for SET_SRC. */
5235 int src_const_hash_code
;
5236 /* Table entry for constant equivalent for SET_SRC, if any. */
5237 struct table_elt
*src_const_elt
;
5241 cse_insn (insn
, in_libcall_block
)
5243 int in_libcall_block
;
5245 register rtx x
= PATTERN (insn
);
5248 register int n_sets
= 0;
5250 /* Records what this insn does to set CC0. */
5251 rtx this_insn_cc0
= 0;
5252 enum machine_mode this_insn_cc0_mode
;
5253 struct write_data writes_memory
;
5254 static struct write_data init
= {0, 0, 0, 0};
5257 struct table_elt
*src_eqv_elt
= 0;
5258 int src_eqv_volatile
;
5259 int src_eqv_in_memory
;
5260 int src_eqv_in_struct
;
5261 int src_eqv_hash_code
;
5266 writes_memory
= init
;
5268 /* Find all the SETs and CLOBBERs in this instruction.
5269 Record all the SETs in the array `set' and count them.
5270 Also determine whether there is a CLOBBER that invalidates
5271 all memory references, or all references at varying addresses. */
5273 if (GET_CODE (x
) == SET
)
5275 sets
= (struct set
*) alloca (sizeof (struct set
));
5278 /* Ignore SETs that are unconditional jumps.
5279 They never need cse processing, so this does not hurt.
5280 The reason is not efficiency but rather
5281 so that we can test at the end for instructions
5282 that have been simplified to unconditional jumps
5283 and not be misled by unchanged instructions
5284 that were unconditional jumps to begin with. */
5285 if (SET_DEST (x
) == pc_rtx
5286 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
5289 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
5290 The hard function value register is used only once, to copy to
5291 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
5292 Ensure we invalidate the destination register. On the 80386 no
5293 other code would invalidate it since it is a fixed_reg. */
5295 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5297 canon_reg (SET_SRC (x
), insn
);
5298 fold_rtx (SET_SRC (x
), insn
);
5299 invalidate (SET_DEST (x
));
5304 else if (GET_CODE (x
) == PARALLEL
)
5306 register int lim
= XVECLEN (x
, 0);
5308 sets
= (struct set
*) alloca (lim
* sizeof (struct set
));
5310 /* Find all regs explicitly clobbered in this insn,
5311 and ensure they are not replaced with any other regs
5312 elsewhere in this insn.
5313 When a reg that is clobbered is also used for input,
5314 we should presume that that is for a reason,
5315 and we should not substitute some other register
5316 which is not supposed to be clobbered.
5317 Therefore, this loop cannot be merged into the one below
5318 because a CALL may precede a CLOBBER and refer to the
5319 value clobbered. We must not let a canonicalization do
5320 anything in that case. */
5321 for (i
= 0; i
< lim
; i
++)
5323 register rtx y
= XVECEXP (x
, 0, i
);
5324 if (GET_CODE (y
) == CLOBBER
5325 && (GET_CODE (XEXP (y
, 0)) == REG
5326 || GET_CODE (XEXP (y
, 0)) == SUBREG
))
5327 invalidate (XEXP (y
, 0));
5330 for (i
= 0; i
< lim
; i
++)
5332 register rtx y
= XVECEXP (x
, 0, i
);
5333 if (GET_CODE (y
) == SET
)
5335 /* As above, we ignore unconditional jumps and call-insns. */
5336 if (GET_CODE (SET_SRC (y
)) == CALL
)
5338 canon_reg (SET_SRC (y
), insn
);
5339 fold_rtx (SET_SRC (y
), insn
);
5340 invalidate (SET_DEST (y
));
5342 else if (SET_DEST (y
) == pc_rtx
5343 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
5346 sets
[n_sets
++].rtl
= y
;
5348 else if (GET_CODE (y
) == CLOBBER
)
5350 /* If we clobber memory, take note of that,
5351 and canon the address.
5352 This does nothing when a register is clobbered
5353 because we have already invalidated the reg. */
5354 if (GET_CODE (XEXP (y
, 0)) == MEM
)
5356 canon_reg (XEXP (y
, 0), 0);
5357 note_mem_written (XEXP (y
, 0), &writes_memory
);
5360 else if (GET_CODE (y
) == USE
5361 && ! (GET_CODE (XEXP (y
, 0)) == REG
5362 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
5364 else if (GET_CODE (y
) == CALL
)
5366 canon_reg (y
, insn
);
5371 else if (GET_CODE (x
) == CLOBBER
)
5373 if (GET_CODE (XEXP (x
, 0)) == MEM
)
5375 canon_reg (XEXP (x
, 0), 0);
5376 note_mem_written (XEXP (x
, 0), &writes_memory
);
5380 /* Canonicalize a USE of a pseudo register or memory location. */
5381 else if (GET_CODE (x
) == USE
5382 && ! (GET_CODE (XEXP (x
, 0)) == REG
5383 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
5384 canon_reg (XEXP (x
, 0), 0);
5385 else if (GET_CODE (x
) == CALL
)
5387 canon_reg (x
, insn
);
5391 if (n_sets
== 1 && REG_NOTES (insn
) != 0)
5393 /* Store the equivalent value in SRC_EQV, if different. */
5394 rtx tem
= find_reg_note (insn
, REG_EQUAL
, 0);
5396 if (tem
&& ! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
)))
5397 src_eqv
= canon_reg (XEXP (tem
, 0), 0);
5400 /* Canonicalize sources and addresses of destinations.
5401 We do this in a separate pass to avoid problems when a MATCH_DUP is
5402 present in the insn pattern. In that case, we want to ensure that
5403 we don't break the duplicate nature of the pattern. So we will replace
5404 both operands at the same time. Otherwise, we would fail to find an
5405 equivalent substitution in the loop calling validate_change below.
5406 (We also speed up that loop when a canonicalization was done since
5407 recog_memoized need not be called for just a canonicalization unless
5408 a pseudo register is being replaced by a hard reg of vice versa.)
5410 We used to suppress canonicalization of DEST if it appears in SRC,
5411 but we don't do this any more.
5413 ??? The way this code is written now, if we have a MATCH_DUP between
5414 two operands that are pseudos and we would want to canonicalize them
5415 to a hard register, we won't do that. The only time this would happen
5416 is if the hard reg was a fixed register, and this should be rare.
5418 ??? This won't work if there is a MATCH_DUP between an input and an
5419 output, but these never worked and must be declared invalid. */
5421 for (i
= 0; i
< n_sets
; i
++)
5423 rtx dest
= SET_DEST (sets
[i
].rtl
);
5424 rtx src
= SET_SRC (sets
[i
].rtl
);
5425 rtx
new = canon_reg (src
, insn
);
5427 if (GET_CODE (new) == REG
&& GET_CODE (src
) == REG
5428 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
5429 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
5430 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 0);
5432 SET_SRC (sets
[i
].rtl
) = new;
5434 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
5436 validate_change (insn
, &XEXP (dest
, 1),
5437 canon_reg (XEXP (dest
, 1), insn
), 0);
5438 validate_change (insn
, &XEXP (dest
, 2),
5439 canon_reg (XEXP (dest
, 2), insn
), 0);
5442 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
5443 || GET_CODE (dest
) == ZERO_EXTRACT
5444 || GET_CODE (dest
) == SIGN_EXTRACT
)
5445 dest
= XEXP (dest
, 0);
5447 if (GET_CODE (dest
) == MEM
)
5448 canon_reg (dest
, insn
);
5451 /* Set sets[i].src_elt to the class each source belongs to.
5452 Detect assignments from or to volatile things
5453 and set set[i] to zero so they will be ignored
5454 in the rest of this function.
5456 Nothing in this loop changes the hash table or the register chains. */
5458 for (i
= 0; i
< n_sets
; i
++)
5460 register rtx src
, dest
;
5461 register rtx src_folded
;
5462 register struct table_elt
*elt
= 0, *p
;
5463 enum machine_mode mode
;
5466 rtx src_related
= 0;
5467 struct table_elt
*src_const_elt
= 0;
5468 int src_cost
= 10000, src_eqv_cost
= 10000, src_folded_cost
= 10000;
5469 int src_related_cost
= 10000, src_elt_cost
= 10000;
5470 /* Set non-zero if we need to call force_const_mem on with the
5471 contents of src_folded before using it. */
5472 int src_folded_force_flag
= 0;
5474 dest
= SET_DEST (sets
[i
].rtl
);
5475 src
= SET_SRC (sets
[i
].rtl
);
5477 /* If SRC is a constant that has no machine mode,
5478 hash it with the destination's machine mode.
5479 This way we can keep different modes separate. */
5481 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5482 sets
[i
].mode
= mode
;
5486 enum machine_mode eqvmode
= mode
;
5487 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5488 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5490 hash_arg_in_memory
= 0;
5491 hash_arg_in_struct
= 0;
5492 src_eqv
= fold_rtx (src_eqv
, insn
);
5493 src_eqv_hash_code
= HASH (src_eqv
, eqvmode
);
5495 /* Find the equivalence class for the equivalent expression. */
5498 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash_code
, eqvmode
);
5500 src_eqv_volatile
= do_not_record
;
5501 src_eqv_in_memory
= hash_arg_in_memory
;
5502 src_eqv_in_struct
= hash_arg_in_struct
;
5505 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5506 value of the INNER register, not the destination. So it is not
5507 a legal substitution for the source. But save it for later. */
5508 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5511 src_eqv_here
= src_eqv
;
5513 /* Simplify and foldable subexpressions in SRC. Then get the fully-
5514 simplified result, which may not necessarily be valid. */
5515 src_folded
= fold_rtx (src
, insn
);
5517 /* If storing a constant in a bitfield, pre-truncate the constant
5518 so we will be able to record it later. */
5519 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5520 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
5522 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5524 if (GET_CODE (src
) == CONST_INT
5525 && GET_CODE (width
) == CONST_INT
5526 && INTVAL (width
) < HOST_BITS_PER_INT
5527 && (INTVAL (src
) & ((-1) << INTVAL (width
))))
5528 src_folded
= gen_rtx (CONST_INT
, VOIDmode
,
5529 INTVAL (src
) & ((1 << INTVAL (width
)) - 1));
5532 /* Compute SRC's hash code, and also notice if it
5533 should not be recorded at all. In that case,
5534 prevent any further processing of this assignment. */
5536 hash_arg_in_memory
= 0;
5537 hash_arg_in_struct
= 0;
5540 sets
[i
].src_hash_code
= HASH (src
, mode
);
5541 sets
[i
].src_volatile
= do_not_record
;
5542 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5543 sets
[i
].src_in_struct
= hash_arg_in_struct
;
5545 /* If source is a perverse subreg (such as QI treated as an SI),
5546 treat it as volatile. It may do the work of an SI in one context
5547 where the extra bits are not being used, but cannot replace an SI
5549 if (GET_CODE (src
) == SUBREG
5550 && (GET_MODE_SIZE (GET_MODE (src
))
5551 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
5552 sets
[i
].src_volatile
= 1;
5554 /* Locate all possible equivalent forms for SRC. Try to replace
5555 SRC in the insn with each cheaper equivalent.
5557 We have the following types of equivalents: SRC itself, a folded
5558 version, a value given in a REG_EQUAL note, or a value related
5561 Each of these equivalents may be part of an additional class
5562 of equivalents (if more than one is in the table, they must be in
5563 the same class; we check for this).
5565 If the source is volatile, we don't do any table lookups.
5567 We note any constant equivalent for possible later use in a
5570 if (!sets
[i
].src_volatile
)
5571 elt
= lookup (src
, sets
[i
].src_hash_code
, mode
);
5573 sets
[i
].src_elt
= elt
;
5575 if (elt
&& src_eqv_here
&& src_eqv_elt
)
5577 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
5579 /* The REG_EQUAL is indicating that two formerly distinct
5580 classes are now equivalent. So merge them. */
5581 merge_equiv_classes (elt
, src_eqv_elt
);
5582 src_eqv_hash_code
= HASH (src_eqv
, elt
->mode
);
5583 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash_code
, elt
->mode
);
5589 else if (src_eqv_elt
)
5592 /* Try to find a constant somewhere and record it in `src_const'.
5593 Record its table element, if any, in `src_const_elt'. Look in
5594 any known equivalences first. (If the constant is not in the
5595 table, also set `sets[i].src_const_hash_code'). */
5597 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
5601 src_const_elt
= elt
;
5606 && (CONSTANT_P (src_folded
)
5607 /* Consider (minus (label_ref L1) (label_ref L2)) as
5608 "constant" here so we will record it. This allows us
5609 to fold switch statements when an ADDR_DIFF_VEC is used. */
5610 || (GET_CODE (src_folded
) == MINUS
5611 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
5612 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
5613 src_const
= src_folded
, src_const_elt
= elt
;
5614 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
5615 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
5617 /* If we don't know if the constant is in the table, get its
5618 hash code and look it up. */
5619 if (src_const
&& src_const_elt
== 0)
5621 sets
[i
].src_const_hash_code
= HASH (src_const
, mode
);
5622 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash_code
,
5626 sets
[i
].src_const
= src_const
;
5627 sets
[i
].src_const_elt
= src_const_elt
;
5629 /* If the constant and our source are both in the table, mark them as
5630 equivalent. Otherwise, if a constant is in the table but the source
5631 isn't, set ELT to it. */
5632 if (src_const_elt
&& elt
5633 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
5634 merge_equiv_classes (elt
, src_const_elt
);
5635 else if (src_const_elt
&& elt
== 0)
5636 elt
= src_const_elt
;
5638 /* See if there is a register linearly related to a constant
5639 equivalent of SRC. */
5641 && (GET_CODE (src_const
) == CONST
5642 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
5644 src_related
= use_related_value (src_const
, src_const_elt
);
5647 struct table_elt
*src_related_elt
5648 = lookup (src_related
, HASH (src_related
, mode
), mode
);
5649 if (src_related_elt
&& elt
)
5651 if (elt
->first_same_value
5652 != src_related_elt
->first_same_value
)
5653 /* This can occur when we previously saw a CONST
5654 involving a SYMBOL_REF and then see the SYMBOL_REF
5655 twice. Merge the involved classes. */
5656 merge_equiv_classes (elt
, src_related_elt
);
5659 src_related_elt
= 0;
5661 else if (src_related_elt
&& elt
== 0)
5662 elt
= src_related_elt
;
5666 /* Another possibility is that we have an AND with a constant in
5667 a mode narrower than a word. If so, it might have been generated
5668 as part of an "if" which would narrow the AND. If we already
5669 have done the AND in a wider mode, we can use a SUBREG of that
5672 if (flag_expensive_optimizations
&& ! src_related
5673 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
5674 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
5676 enum machine_mode tmode
;
5677 rtx new_and
= gen_rtx (AND
, VOIDmode
, 0, XEXP (src
, 1));
5679 for (tmode
= GET_MODE_WIDER_MODE (mode
);
5680 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
5681 tmode
= GET_MODE_WIDER_MODE (tmode
))
5683 rtx inner
= gen_lowpart_if_possible (tmode
, XEXP (src
, 0));
5684 struct table_elt
*larger_elt
;
5688 PUT_MODE (new_and
, tmode
);
5689 XEXP (new_and
, 0) = inner
;
5690 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
5691 if (larger_elt
== 0)
5694 for (larger_elt
= larger_elt
->first_same_value
;
5695 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5696 if (GET_CODE (larger_elt
->exp
) == REG
)
5699 = gen_lowpart_if_possible (mode
, larger_elt
->exp
);
5709 if (src
== src_folded
)
5712 /* At this point, ELT, if non-zero, points to a class of expressions
5713 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5714 and SRC_RELATED, if non-zero, each contain additional equivalent
5715 expressions. Prune these latter expressions by deleting expressions
5716 already in the equivalence class.
5718 Check for an equivalent identical to the destination. If found,
5719 this is the preferred equivalent since it will likely lead to
5720 elimination of the insn. Indicate this by placing it in
5723 if (elt
) elt
= elt
->first_same_value
;
5724 for (p
= elt
; p
; p
= p
->next_same_value
)
5726 enum rtx_code code
= GET_CODE (p
->exp
);
5728 /* If the expression is not valid, ignore it. Then we do not
5729 have to check for validity below. In most cases, we can use
5730 `rtx_equal_p', since canonicalization has already been done. */
5731 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
5734 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
5736 else if (src_folded
&& GET_CODE (src_folded
) == code
5737 && rtx_equal_p (src_folded
, p
->exp
))
5739 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
5740 && rtx_equal_p (src_eqv_here
, p
->exp
))
5742 else if (src_related
&& GET_CODE (src_related
) == code
5743 && rtx_equal_p (src_related
, p
->exp
))
5746 /* This is the same as the destination of the insns, we want
5747 to prefer it. Copy it to src_related. The code below will
5748 then give it a negative cost. */
5749 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
5754 /* Find the cheapest valid equivalent, trying all the available
5755 possibilities. Prefer items not in the hash table to ones
5756 that are when they are equal cost. Note that we can never
5757 worsen an insn as the current contents will also succeed.
5758 If we find an equivalent identical to the source, use it as best,
5759 since this insn will probably be eliminated in that case. */
5762 if (rtx_equal_p (src
, dest
))
5765 src_cost
= COST (src
);
5770 if (rtx_equal_p (src_eqv_here
, dest
))
5773 src_eqv_cost
= COST (src_eqv_here
);
5778 if (rtx_equal_p (src_folded
, dest
))
5779 src_folded_cost
= -1;
5781 src_folded_cost
= COST (src_folded
);
5786 if (rtx_equal_p (src_related
, dest
))
5787 src_related_cost
= -1;
5789 src_related_cost
= COST (src_related
);
5792 /* If this was an indirect jump insn, a known label will really be
5793 cheaper even though it looks more expensive. */
5794 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
5795 src_folded
= src_const
, src_folded_cost
= -1;
5797 /* Terminate loop when replacement made. This must terminate since
5798 the current contents will be tested and will always be valid. */
5803 /* Skip invalid entries. */
5804 while (elt
&& GET_CODE (elt
->exp
) != REG
5805 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
5806 elt
= elt
->next_same_value
;
5808 if (elt
) src_elt_cost
= elt
->cost
;
5810 /* Find cheapest and skip it for the next time. For items
5811 of equal cost, use this order:
5812 src_folded, src, src_eqv, src_related and hash table entry. */
5813 if (src_folded_cost
<= src_cost
5814 && src_folded_cost
<= src_eqv_cost
5815 && src_folded_cost
<= src_related_cost
5816 && src_folded_cost
<= src_elt_cost
)
5818 trial
= src_folded
, src_folded_cost
= 10000;
5819 if (src_folded_force_flag
)
5820 trial
= force_const_mem (mode
, trial
);
5822 else if (src_cost
<= src_eqv_cost
5823 && src_cost
<= src_related_cost
5824 && src_cost
<= src_elt_cost
)
5825 trial
= src
, src_cost
= 10000;
5826 else if (src_eqv_cost
<= src_related_cost
5827 && src_eqv_cost
<= src_elt_cost
)
5828 trial
= src_eqv_here
, src_eqv_cost
= 10000;
5829 else if (src_related_cost
<= src_elt_cost
)
5830 trial
= src_related
, src_related_cost
= 10000;
5833 trial
= canon_reg (copy_rtx (elt
->exp
), 0);
5834 elt
= elt
->next_same_value
;
5835 src_elt_cost
= 10000;
5838 /* We don't normally have an insn matching (set (pc) (pc)), so
5839 check for this separately here. We will delete such an
5842 Tablejump insns contain a USE of the table, so simply replacing
5843 the operand with the constant won't match. This is simply an
5844 unconditional branch, however, and is therefore valid. Just
5845 insert the substitution here and we will delete and re-emit
5848 if (n_sets
== 1 && dest
== pc_rtx
5850 || (GET_CODE (trial
) == LABEL_REF
5851 && ! condjump_p (insn
))))
5853 /* If TRIAL is a label in front of a jump table, we are
5854 really falling through the switch (this is how casesi
5855 insns work), so we must branch around the table. */
5856 if (GET_CODE (trial
) == CODE_LABEL
5857 && NEXT_INSN (trial
) != 0
5858 && GET_CODE (NEXT_INSN (trial
)) == JUMP_INSN
5859 && (GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_DIFF_VEC
5860 || GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_VEC
))
5862 trial
= gen_rtx (LABEL_REF
, Pmode
, get_label_after (trial
));
5864 SET_SRC (sets
[i
].rtl
) = trial
;
5868 /* Look for a substitution that makes a valid insn. */
5869 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
5872 /* If we previously found constant pool entries for
5873 constants and this is a constant, try making a
5874 pool entry. Put it in src_folded unless we already have done
5875 this since that is where it likely came from. */
5877 else if (constant_pool_entries_cost
5878 && CONSTANT_P (trial
)
5879 && (src_folded
== 0 || GET_CODE (src_folded
) != MEM
)
5880 && GET_MODE_CLASS (mode
) != MODE_CC
)
5882 src_folded_force_flag
= 1;
5884 src_folded_cost
= constant_pool_entries_cost
;
5888 src
= SET_SRC (sets
[i
].rtl
);
5890 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5891 However, there is an important exception: If both are registers
5892 that are not the head of their equivalence class, replace SET_SRC
5893 with the head of the class. If we do not do this, we will have
5894 both registers live over a portion of the basic block. This way,
5895 their lifetimes will likely abut instead of overlapping. */
5896 if (GET_CODE (dest
) == REG
5897 && REGNO_QTY_VALID_P (REGNO (dest
))
5898 && qty_mode
[reg_qty
[REGNO (dest
)]] == GET_MODE (dest
)
5899 && qty_first_reg
[reg_qty
[REGNO (dest
)]] != REGNO (dest
)
5900 && GET_CODE (src
) == REG
&& REGNO (src
) == REGNO (dest
)
5901 /* Don't do this if the original insn had a hard reg as
5903 && (GET_CODE (sets
[i
].src
) != REG
5904 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
))
5905 /* We can't call canon_reg here because it won't do anything if
5906 SRC is a hard register. */
5908 int first
= qty_first_reg
[reg_qty
[REGNO (src
)]];
5910 src
= SET_SRC (sets
[i
].rtl
)
5911 = first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
5912 : gen_rtx (REG
, GET_MODE (src
), first
);
5914 /* If we had a constant that is cheaper than what we are now
5915 setting SRC to, use that constant. We ignored it when we
5916 thought we could make this into a no-op. */
5917 if (src_const
&& COST (src_const
) < COST (src
)
5918 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
), src_const
, 0))
5922 /* If we made a change, recompute SRC values. */
5923 if (src
!= sets
[i
].src
)
5926 hash_arg_in_memory
= 0;
5927 hash_arg_in_struct
= 0;
5929 sets
[i
].src_hash_code
= HASH (src
, mode
);
5930 sets
[i
].src_volatile
= do_not_record
;
5931 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5932 sets
[i
].src_in_struct
= hash_arg_in_struct
;
5933 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash_code
, mode
);
5936 /* If this is a single SET, we are setting a register, and we have an
5937 equivalent constant, we want to add a REG_NOTE. We don't want
5938 to write a REG_EQUAL note for a constant pseudo since verifying that
5939 that pseudo hasn't been eliminated is a pain. Such a note also
5940 won't help anything. */
5941 if (n_sets
== 1 && src_const
&& GET_CODE (dest
) == REG
5942 && GET_CODE (src_const
) != REG
)
5944 rtx tem
= find_reg_note (insn
, REG_EQUAL
, 0);
5946 /* Record the actual constant value in a REG_EQUAL note, making
5947 a new one if one does not already exist. */
5949 XEXP (tem
, 0) = src_const
;
5951 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
5952 src_const
, REG_NOTES (insn
));
5954 /* If storing a constant value in a register that
5955 previously held the constant value 0,
5956 record this fact with a REG_WAS_0 note on this insn.
5958 Note that the *register* is required to have previously held 0,
5959 not just any register in the quantity and we must point to the
5960 insn that set that register to zero.
5962 Rather than track each register individually, we just see if
5963 the last set for this quantity was for this register. */
5965 if (REGNO_QTY_VALID_P (REGNO (dest
))
5966 && qty_const
[reg_qty
[REGNO (dest
)]] == const0_rtx
)
5968 /* See if we previously had a REG_WAS_0 note. */
5969 rtx note
= find_reg_note (insn
, REG_WAS_0
, 0);
5970 rtx const_insn
= qty_const_insn
[reg_qty
[REGNO (dest
)]];
5972 if ((tem
= single_set (const_insn
)) != 0
5973 && rtx_equal_p (SET_DEST (tem
), dest
))
5976 XEXP (note
, 0) = const_insn
;
5978 REG_NOTES (insn
) = gen_rtx (INSN_LIST
, REG_WAS_0
,
5979 const_insn
, REG_NOTES (insn
));
5984 /* Now deal with the destination. */
5986 sets
[i
].inner_dest_loc
= &SET_DEST (sets
[0].rtl
);
5988 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5989 to the MEM or REG within it. */
5990 while (GET_CODE (dest
) == SIGN_EXTRACT
5991 || GET_CODE (dest
) == ZERO_EXTRACT
5992 || GET_CODE (dest
) == SUBREG
5993 || GET_CODE (dest
) == STRICT_LOW_PART
)
5995 sets
[i
].inner_dest_loc
= &XEXP (dest
, 0);
5996 dest
= XEXP (dest
, 0);
5999 sets
[i
].inner_dest
= dest
;
6001 if (GET_CODE (dest
) == MEM
)
6003 dest
= fold_rtx (dest
, insn
);
6005 /* Decide whether we invalidate everything in memory,
6006 or just things at non-fixed places.
6007 Writing a large aggregate must invalidate everything
6008 because we don't know how long it is. */
6009 note_mem_written (dest
, &writes_memory
);
6012 /* Compute the hash code of the destination now,
6013 before the effects of this instruction are recorded,
6014 since the register values used in the address computation
6015 are those before this instruction. */
6016 sets
[i
].dest_hash_code
= HASH (dest
, mode
);
6018 /* Don't enter a bit-field in the hash table
6019 because the value in it after the store
6020 may not equal what was stored, due to truncation. */
6022 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6023 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6025 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6027 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
6028 && GET_CODE (width
) == CONST_INT
6029 && INTVAL (width
) < HOST_BITS_PER_INT
6030 && ! (INTVAL (src_const
) & ((-1) << INTVAL (width
))))
6031 /* Exception: if the value is constant,
6032 and it won't be truncated, record it. */
6036 /* This is chosen so that the destination will be invalidated
6037 but no new value will be recorded.
6038 We must invalidate because sometimes constant
6039 values can be recorded for bitfields. */
6040 sets
[i
].src_elt
= 0;
6041 sets
[i
].src_volatile
= 1;
6047 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
6049 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
6051 PUT_CODE (insn
, NOTE
);
6052 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
6053 NOTE_SOURCE_FILE (insn
) = 0;
6054 cse_jumps_altered
= 1;
6055 /* One less use of the label this insn used to jump to. */
6056 --LABEL_NUSES (JUMP_LABEL (insn
));
6057 /* No more processing for this set. */
6061 /* If this SET is now setting PC to a label, we know it used to
6062 be a conditional or computed branch. So we see if we can follow
6063 it. If it was a computed branch, delete it and re-emit. */
6064 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
6068 /* If this is not in the format for a simple branch and
6069 we are the only SET in it, re-emit it. */
6070 if (! simplejump_p (insn
) && n_sets
== 1)
6072 rtx
new = emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
6073 JUMP_LABEL (new) = XEXP (src
, 0);
6074 LABEL_NUSES (XEXP (src
, 0))++;
6079 /* Now that we've converted this jump to an unconditional jump,
6080 there is dead code after it. Delete the dead code until we
6081 reach a BARRIER, the end of the function, or a label. Do
6082 not delete NOTEs except for NOTE_INSN_DELETED since later
6083 phases assume these notes are retained. */
6087 while (NEXT_INSN (p
) != 0
6088 && GET_CODE (NEXT_INSN (p
)) != BARRIER
6089 && GET_CODE (NEXT_INSN (p
)) != CODE_LABEL
)
6091 if (GET_CODE (NEXT_INSN (p
)) != NOTE
6092 || NOTE_LINE_NUMBER (NEXT_INSN (p
)) == NOTE_INSN_DELETED
)
6093 delete_insn (NEXT_INSN (p
));
6098 /* If we don't have a BARRIER immediately after INSN, put one there.
6099 Much code assumes that there are no NOTEs between a JUMP_INSN and
6102 if (NEXT_INSN (insn
) == 0
6103 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
6104 emit_barrier_after (insn
);
6106 /* We might have two BARRIERs separated by notes. Delete the second
6109 if (p
!= insn
&& NEXT_INSN (p
) != 0
6110 && GET_CODE (NEXT_INSN (p
)) == BARRIER
)
6111 delete_insn (NEXT_INSN (p
));
6113 cse_jumps_altered
= 1;
6117 /* No further processing for this assignment if destination
6120 else if (do_not_record
)
6123 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
6124 sets
[i
].dest_hash_code
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
6127 /* If setting CC0, record what it was set to, or a constant, if it
6128 is equivalent to a constant. If it is being set to a floating-point
6129 value, make a COMPARE with the appropriate constant of 0. If we
6130 don't do this, later code can interpret this as a test against
6131 const0_rtx, which can cause problems if we try to put it into an
6132 insn as a floating-point operand. */
6133 if (dest
== cc0_rtx
)
6135 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
6136 this_insn_cc0_mode
= mode
;
6137 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
6138 this_insn_cc0
= gen_rtx (COMPARE
, VOIDmode
, this_insn_cc0
,
6144 /* Now enter all non-volatile source expressions in the hash table
6145 if they are not already present.
6146 Record their equivalence classes in src_elt.
6147 This way we can insert the corresponding destinations into
6148 the same classes even if the actual sources are no longer in them
6149 (having been invalidated). */
6151 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
6152 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
6154 register struct table_elt
*elt
;
6155 register struct table_elt
*classp
= sets
[0].src_elt
;
6156 rtx dest
= SET_DEST (sets
[0].rtl
);
6157 enum machine_mode eqvmode
= GET_MODE (dest
);
6159 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6161 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6164 if (insert_regs (src_eqv
, classp
, 0))
6165 src_eqv_hash_code
= HASH (src_eqv
, eqvmode
);
6166 elt
= insert (src_eqv
, classp
, src_eqv_hash_code
, eqvmode
);
6167 elt
->in_memory
= src_eqv_in_memory
;
6168 elt
->in_struct
= src_eqv_in_struct
;
6172 for (i
= 0; i
< n_sets
; i
++)
6173 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
6174 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
6176 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
6178 /* REG_EQUAL in setting a STRICT_LOW_PART
6179 gives an equivalent for the entire destination register,
6180 not just for the subreg being stored in now.
6181 This is a more interesting equivalence, so we arrange later
6182 to treat the entire reg as the destination. */
6183 sets
[i
].src_elt
= src_eqv_elt
;
6184 sets
[i
].src_hash_code
= src_eqv_hash_code
;
6188 /* Insert source and constant equivalent into hash table, if not
6190 register struct table_elt
*classp
= src_eqv_elt
;
6191 register rtx src
= sets
[i
].src
;
6192 register rtx dest
= SET_DEST (sets
[i
].rtl
);
6193 enum machine_mode mode
6194 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6196 if (sets
[i
].src_elt
== 0)
6198 register struct table_elt
*elt
;
6200 /* Note that these insert_regs calls cannot remove
6201 any of the src_elt's, because they would have failed to
6202 match if not still valid. */
6203 if (insert_regs (src
, classp
, 0))
6204 sets
[i
].src_hash_code
= HASH (src
, mode
);
6205 elt
= insert (src
, classp
, sets
[i
].src_hash_code
, mode
);
6206 elt
->in_memory
= sets
[i
].src_in_memory
;
6207 elt
->in_struct
= sets
[i
].src_in_struct
;
6208 sets
[i
].src_elt
= classp
= elt
;
6211 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
6212 && src
!= sets
[i
].src_const
6213 && ! rtx_equal_p (sets
[i
].src_const
, src
))
6214 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
6215 sets
[i
].src_const_hash_code
, mode
);
6218 else if (sets
[i
].src_elt
== 0)
6219 /* If we did not insert the source into the hash table (e.g., it was
6220 volatile), note the equivalence class for the REG_EQUAL value, if any,
6221 so that the destination goes into that class. */
6222 sets
[i
].src_elt
= src_eqv_elt
;
6224 invalidate_from_clobbers (&writes_memory
, x
);
6225 /* Memory, and some registers, are invalidate by subroutine calls. */
6226 if (GET_CODE (insn
) == CALL_INSN
)
6228 static struct write_data everything
= {0, 1, 1, 1};
6229 invalidate_memory (&everything
);
6230 invalidate_for_call ();
6233 /* Now invalidate everything set by this instruction.
6234 If a SUBREG or other funny destination is being set,
6235 sets[i].rtl is still nonzero, so here we invalidate the reg
6236 a part of which is being set. */
6238 for (i
= 0; i
< n_sets
; i
++)
6241 register rtx dest
= sets
[i
].inner_dest
;
6243 /* Needed for registers to remove the register from its
6244 previous quantity's chain.
6245 Needed for memory if this is a nonvarying address, unless
6246 we have just done an invalidate_memory that covers even those. */
6247 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
6248 || (! writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
6252 /* Make sure registers mentioned in destinations
6253 are safe for use in an expression to be inserted.
6254 This removes from the hash table
6255 any invalid entry that refers to one of these registers.
6257 We don't care about the return value from mention_regs because
6258 we are going to hash the SET_DEST values unconditionally. */
6260 for (i
= 0; i
< n_sets
; i
++)
6261 if (sets
[i
].rtl
&& GET_CODE (SET_DEST (sets
[i
].rtl
)) != REG
)
6262 mention_regs (SET_DEST (sets
[i
].rtl
));
6264 /* We may have just removed some of the src_elt's from the hash table.
6265 So replace each one with the current head of the same class. */
6267 for (i
= 0; i
< n_sets
; i
++)
6270 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
6271 /* If elt was removed, find current head of same class,
6272 or 0 if nothing remains of that class. */
6274 register struct table_elt
*elt
= sets
[i
].src_elt
;
6276 while (elt
&& elt
->prev_same_value
)
6277 elt
= elt
->prev_same_value
;
6279 while (elt
&& elt
->first_same_value
== 0)
6280 elt
= elt
->next_same_value
;
6281 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
6285 /* Now insert the destinations into their equivalence classes. */
6287 for (i
= 0; i
< n_sets
; i
++)
6290 register rtx dest
= SET_DEST (sets
[i
].rtl
);
6291 register struct table_elt
*elt
;
6293 /* Don't record value if we are not supposed to risk allocating
6294 floating-point values in registers that might be wider than
6296 if ((flag_float_store
6297 && GET_CODE (dest
) == MEM
6298 && GET_MODE_CLASS (GET_MODE (dest
)) == MODE_FLOAT
)
6299 /* Don't record values of destinations set inside a libcall block
6300 since we might delete the libcall. Things should have been set
6301 up so we won't want to reuse such a value, but we play it safe
6304 /* If we didn't put a REG_EQUAL value or a source into the hash
6305 table, there is no point is recording DEST. */
6306 || sets
[i
].src_elt
== 0)
6309 /* STRICT_LOW_PART isn't part of the value BEING set,
6310 and neither is the SUBREG inside it.
6311 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6312 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6313 dest
= SUBREG_REG (XEXP (dest
, 0));
6315 if (GET_CODE (dest
) == REG
)
6316 /* Registers must also be inserted into chains for quantities. */
6317 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
6318 /* If `insert_regs' changes something, the hash code must be
6320 sets
[i
].dest_hash_code
= HASH (dest
, GET_MODE (dest
));
6322 elt
= insert (dest
, sets
[i
].src_elt
,
6323 sets
[i
].dest_hash_code
, GET_MODE (dest
));
6324 elt
->in_memory
= GET_CODE (sets
[i
].inner_dest
) == MEM
;
6327 /* This implicitly assumes a whole struct
6328 need not have MEM_IN_STRUCT_P.
6329 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
6330 elt
->in_struct
= (MEM_IN_STRUCT_P (sets
[i
].inner_dest
)
6331 || sets
[i
].inner_dest
!= SET_DEST (sets
[i
].rtl
));
6334 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6335 narrower than M2, and both M1 and M2 are the same number of words,
6336 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6337 make that equivalence as well.
6339 However, BAR may have equivalences for which gen_lowpart_if_possible
6340 will produce a simpler value than gen_lowpart_if_possible applied to
6341 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6342 BAR's equivalences. If we don't get a simplified form, make
6343 the SUBREG. It will not be used in an equivalence, but will
6344 cause two similar assignments to be detected.
6346 Note the loop below will find SUBREG_REG (DEST) since we have
6347 already entered SRC and DEST of the SET in the table. */
6349 if (GET_CODE (dest
) == SUBREG
6350 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) / UNITS_PER_WORD
6351 == GET_MODE_SIZE (GET_MODE (dest
)) / UNITS_PER_WORD
)
6352 && (GET_MODE_SIZE (GET_MODE (dest
))
6353 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6354 && sets
[i
].src_elt
!= 0)
6356 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
6357 struct table_elt
*elt
, *classp
= 0;
6359 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
6360 elt
= elt
->next_same_value
)
6364 struct table_elt
*src_elt
;
6366 /* Ignore invalid entries. */
6367 if (GET_CODE (elt
->exp
) != REG
6368 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6371 new_src
= gen_lowpart_if_possible (new_mode
, elt
->exp
);
6373 new_src
= gen_rtx (SUBREG
, new_mode
, elt
->exp
, 0);
6375 src_hash
= HASH (new_src
, new_mode
);
6376 src_elt
= lookup (new_src
, src_hash
, new_mode
);
6378 /* Put the new source in the hash table is if isn't
6382 if (insert_regs (new_src
, classp
, 0))
6383 src_hash
= HASH (new_src
, new_mode
);
6384 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
6385 src_elt
->in_memory
= elt
->in_memory
;
6386 src_elt
->in_struct
= elt
->in_struct
;
6388 else if (classp
&& classp
!= src_elt
->first_same_value
)
6389 /* Show that two things that we've seen before are
6390 actually the same. */
6391 merge_equiv_classes (src_elt
, classp
);
6393 classp
= src_elt
->first_same_value
;
6398 /* Special handling for (set REG0 REG1)
6399 where REG0 is the "cheapest", cheaper than REG1.
6400 After cse, REG1 will probably not be used in the sequel,
6401 so (if easily done) change this insn to (set REG1 REG0) and
6402 replace REG1 with REG0 in the previous insn that computed their value.
6403 Then REG1 will become a dead store and won't cloud the situation
6404 for later optimizations.
6406 Do not make this change if REG1 is a hard register, because it will
6407 then be used in the sequel and we may be changing a two-operand insn
6408 into a three-operand insn.
6410 Also do not do this if we are operating on a copy of INSN. */
6412 if (n_sets
== 1 && sets
[0].rtl
&& GET_CODE (SET_DEST (sets
[0].rtl
)) == REG
6413 && NEXT_INSN (PREV_INSN (insn
)) == insn
6414 && GET_CODE (SET_SRC (sets
[0].rtl
)) == REG
6415 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
6416 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
)))
6417 && (qty_first_reg
[reg_qty
[REGNO (SET_SRC (sets
[0].rtl
))]]
6418 == REGNO (SET_DEST (sets
[0].rtl
))))
6420 rtx prev
= PREV_INSN (insn
);
6421 while (prev
&& GET_CODE (prev
) == NOTE
)
6422 prev
= PREV_INSN (prev
);
6424 if (prev
&& GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SET
6425 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
))
6427 rtx dest
= SET_DEST (sets
[0].rtl
);
6428 rtx note
= find_reg_note (prev
, REG_EQUIV
, 0);
6430 validate_change (prev
, & SET_DEST (PATTERN (prev
)), dest
, 1);
6431 validate_change (insn
, & SET_DEST (sets
[0].rtl
),
6432 SET_SRC (sets
[0].rtl
), 1);
6433 validate_change (insn
, & SET_SRC (sets
[0].rtl
), dest
, 1);
6434 apply_change_group ();
6436 /* If REG1 was equivalent to a constant, REG0 is not. */
6438 PUT_REG_NOTE_KIND (note
, REG_EQUAL
);
6440 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6441 any REG_WAS_0 note on INSN to PREV. */
6442 note
= find_reg_note (prev
, REG_WAS_0
, 0);
6444 remove_note (prev
, note
);
6446 note
= find_reg_note (insn
, REG_WAS_0
, 0);
6449 remove_note (insn
, note
);
6450 XEXP (note
, 1) = REG_NOTES (prev
);
6451 REG_NOTES (prev
) = note
;
6456 /* If this is a conditional jump insn, record any known equivalences due to
6457 the condition being tested. */
6459 last_jump_equiv_class
= 0;
6460 if (GET_CODE (insn
) == JUMP_INSN
6461 && n_sets
== 1 && GET_CODE (x
) == SET
6462 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
6463 record_jump_equiv (insn
, 0);
6466 /* If the previous insn set CC0 and this insn no longer references CC0,
6467 delete the previous insn. Here we use the fact that nothing expects CC0
6468 to be valid over an insn, which is true until the final pass. */
6469 if (prev_insn
&& GET_CODE (prev_insn
) == INSN
6470 && (tem
= single_set (prev_insn
)) != 0
6471 && SET_DEST (tem
) == cc0_rtx
6472 && ! reg_mentioned_p (cc0_rtx
, x
))
6474 PUT_CODE (prev_insn
, NOTE
);
6475 NOTE_LINE_NUMBER (prev_insn
) = NOTE_INSN_DELETED
;
6476 NOTE_SOURCE_FILE (prev_insn
) = 0;
6479 prev_insn_cc0
= this_insn_cc0
;
6480 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6486 /* Store 1 in *WRITES_PTR for those categories of memory ref
6487 that must be invalidated when the expression WRITTEN is stored in.
6488 If WRITTEN is null, say everything must be invalidated. */
6491 note_mem_written (written
, writes_ptr
)
6493 struct write_data
*writes_ptr
;
6495 static struct write_data everything
= {0, 1, 1, 1};
6498 *writes_ptr
= everything
;
6499 else if (GET_CODE (written
) == MEM
)
6501 /* Pushing or popping the stack invalidates just the stack pointer. */
6502 rtx addr
= XEXP (written
, 0);
6503 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
6504 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
6505 && GET_CODE (XEXP (addr
, 0)) == REG
6506 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
6511 else if (GET_MODE (written
) == BLKmode
)
6512 *writes_ptr
= everything
;
6513 else if (cse_rtx_addr_varies_p (written
))
6515 /* A varying address that is a sum indicates an array element,
6516 and that's just as good as a structure element
6517 in implying that we need not invalidate scalar variables. */
6518 if (!(MEM_IN_STRUCT_P (written
)
6519 || GET_CODE (XEXP (written
, 0)) == PLUS
))
6520 writes_ptr
->all
= 1;
6521 writes_ptr
->nonscalar
= 1;
6523 writes_ptr
->var
= 1;
6527 /* Perform invalidation on the basis of everything about an insn
6528 except for invalidating the actual places that are SET in it.
6529 This includes the places CLOBBERed, and anything that might
6530 alias with something that is SET or CLOBBERed.
6532 W points to the writes_memory for this insn, a struct write_data
6533 saying which kinds of memory references must be invalidated.
6534 X is the pattern of the insn. */
6537 invalidate_from_clobbers (w
, x
)
6538 struct write_data
*w
;
6541 /* If W->var is not set, W specifies no action.
6542 If W->all is set, this step gets all memory refs
6543 so they can be ignored in the rest of this function. */
6545 invalidate_memory (w
);
6549 if (reg_tick
[STACK_POINTER_REGNUM
] >= 0)
6550 reg_tick
[STACK_POINTER_REGNUM
]++;
6552 /* This should be *very* rare. */
6553 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
6554 invalidate (stack_pointer_rtx
);
6557 if (GET_CODE (x
) == CLOBBER
)
6559 rtx ref
= XEXP (x
, 0);
6561 && (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
6562 || (GET_CODE (ref
) == MEM
&& ! w
->all
)))
6565 else if (GET_CODE (x
) == PARALLEL
)
6568 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6570 register rtx y
= XVECEXP (x
, 0, i
);
6571 if (GET_CODE (y
) == CLOBBER
)
6573 rtx ref
= XEXP (y
, 0);
6575 &&(GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
6576 || (GET_CODE (ref
) == MEM
&& !w
->all
)))
6583 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6584 and replace any registers in them with either an equivalent constant
6585 or the canonical form of the register. If we are inside an address,
6586 only do this if the address remains valid.
6588 OBJECT is 0 except when within a MEM in which case it is the MEM.
6590 Return the replacement for X. */
6593 cse_process_notes (x
, object
)
6597 enum rtx_code code
= GET_CODE (x
);
6598 char *fmt
= GET_RTX_FORMAT (code
);
6615 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), x
);
6620 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
6621 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), 0);
6623 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), 0);
6627 i
= reg_qty
[REGNO (x
)];
6629 /* Return a constant or a constant register. */
6630 if (REGNO_QTY_VALID_P (REGNO (x
))
6631 && qty_const
[i
] != 0
6632 && (CONSTANT_P (qty_const
[i
])
6633 || GET_CODE (qty_const
[i
]) == REG
))
6635 rtx
new = gen_lowpart_if_possible (GET_MODE (x
), qty_const
[i
]);
6640 /* Otherwise, canonicalize this register. */
6641 return canon_reg (x
, 0);
6644 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
6646 validate_change (object
, &XEXP (x
, i
),
6647 cse_process_notes (XEXP (x
, i
), object
), 0);
6652 /* Find common subexpressions between the end test of a loop and the beginning
6653 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6655 Often we have a loop where an expression in the exit test is used
6656 in the body of the loop. For example "while (*p) *q++ = *p++;".
6657 Because of the way we duplicate the loop exit test in front of the loop,
6658 however, we don't detect that common subexpression. This will be caught
6659 when global cse is implemented, but this is a quite common case.
6661 This function handles the most common cases of these common expressions.
6662 It is called after we have processed the basic block ending with the
6663 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6664 jumps to a label used only once. */
6667 cse_around_loop (loop_start
)
6672 struct table_elt
*p
;
6674 /* If the jump at the end of the loop doesn't go to the start, we don't
6676 for (insn
= PREV_INSN (loop_start
);
6677 insn
&& (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) >= 0);
6678 insn
= PREV_INSN (insn
))
6682 || GET_CODE (insn
) != NOTE
6683 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
6686 /* If the last insn of the loop (the end test) was an NE comparison,
6687 we will interpret it as an EQ comparison, since we fell through
6688 the loop. Any equivalances resulting from that comparison are
6689 therefore not valid and must be invalidated. */
6690 if (last_jump_equiv_class
)
6691 for (p
= last_jump_equiv_class
->first_same_value
; p
;
6692 p
= p
->next_same_value
)
6693 if (GET_CODE (p
->exp
) == MEM
|| GET_CODE (p
->exp
) == REG
6694 || GET_CODE (p
->exp
) == SUBREG
)
6695 invalidate (p
->exp
);
6697 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6698 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6700 The only thing we do with SET_DEST is invalidate entries, so we
6701 can safely process each SET in order. It is slightly less efficient
6702 to do so, but we only want to handle the most common cases. */
6704 for (insn
= NEXT_INSN (loop_start
);
6705 GET_CODE (insn
) != CALL_INSN
&& GET_CODE (insn
) != CODE_LABEL
6706 && ! (GET_CODE (insn
) == NOTE
6707 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
6708 insn
= NEXT_INSN (insn
))
6710 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
6711 && (GET_CODE (PATTERN (insn
)) == SET
6712 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
6713 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
6714 else if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
6715 && GET_CODE (PATTERN (insn
)) == PARALLEL
)
6716 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
6717 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
6718 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
6719 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
6724 /* Variable used for communications between the next two routines. */
6726 static struct write_data skipped_writes_memory
;
6728 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6729 since they are done elsewhere. This function is called via note_stores. */
6732 invalidate_skipped_set (dest
, set
)
6736 if (GET_CODE (set
) == CLOBBER
6743 if (GET_CODE (dest
) == MEM
)
6744 note_mem_written (dest
, &skipped_writes_memory
);
6746 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
6747 || (! skipped_writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
6751 /* Invalidate all insns from START up to the end of the function or the
6752 next label. This called when we wish to CSE around a block that is
6753 conditionally executed. */
6756 invalidate_skipped_block (start
)
6761 static struct write_data init
= {0, 0, 0, 0};
6762 static struct write_data everything
= {0, 1, 1, 1};
6764 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
6765 insn
= NEXT_INSN (insn
))
6767 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
6770 skipped_writes_memory
= init
;
6772 if (GET_CODE (insn
) == CALL_INSN
)
6774 invalidate_for_call ();
6775 skipped_writes_memory
= everything
;
6778 note_stores (PATTERN (insn
), invalidate_skipped_set
);
6779 invalidate_from_clobbers (&skipped_writes_memory
, PATTERN (insn
));
6783 /* Used for communication between the following two routines; contains a
6784 value to be checked for modification. */
6786 static rtx cse_check_loop_start_value
;
6788 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
6789 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
6792 cse_check_loop_start (x
, set
)
6796 if (cse_check_loop_start_value
== 0
6797 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
6800 if ((GET_CODE (x
) == MEM
&& GET_CODE (cse_check_loop_start_value
) == MEM
)
6801 || reg_overlap_mentioned_p (x
, cse_check_loop_start_value
))
6802 cse_check_loop_start_value
= 0;
6805 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6806 a loop that starts with the label at LOOP_START.
6808 If X is a SET, we see if its SET_SRC is currently in our hash table.
6809 If so, we see if it has a value equal to some register used only in the
6810 loop exit code (as marked by jump.c).
6812 If those two conditions are true, we search backwards from the start of
6813 the loop to see if that same value was loaded into a register that still
6814 retains its value at the start of the loop.
6816 If so, we insert an insn after the load to copy the destination of that
6817 load into the equivalent register and (try to) replace our SET_SRC with that
6820 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6823 cse_set_around_loop (x
, insn
, loop_start
)
6829 struct table_elt
*src_elt
;
6830 static struct write_data init
= {0, 0, 0, 0};
6831 struct write_data writes_memory
;
6833 writes_memory
= init
;
6835 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6836 are setting PC or CC0 or whose SET_SRC is already a register. */
6837 if (GET_CODE (x
) == SET
6838 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
6839 && GET_CODE (SET_SRC (x
)) != REG
)
6841 src_elt
= lookup (SET_SRC (x
),
6842 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
6843 GET_MODE (SET_DEST (x
)));
6846 for (src_elt
= src_elt
->first_same_value
; src_elt
;
6847 src_elt
= src_elt
->next_same_value
)
6848 if (GET_CODE (src_elt
->exp
) == REG
&& REG_LOOP_TEST_P (src_elt
->exp
)
6849 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
6853 /* Look for an insn in front of LOOP_START that sets
6854 something in the desired mode to SET_SRC (x) before we hit
6855 a label or CALL_INSN. */
6857 for (p
= prev_nonnote_insn (loop_start
);
6858 p
&& GET_CODE (p
) != CALL_INSN
6859 && GET_CODE (p
) != CODE_LABEL
;
6860 p
= prev_nonnote_insn (p
))
6861 if ((set
= single_set (p
)) != 0
6862 && GET_CODE (SET_DEST (set
)) == REG
6863 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
6864 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
6866 /* We now have to ensure that nothing between P
6867 and LOOP_START modified anything referenced in
6868 SET_SRC (x). We know that nothing within the loop
6869 can modify it, or we would have invalidated it in
6873 cse_check_loop_start_value
= SET_SRC (x
);
6874 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
6875 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
6876 note_stores (PATTERN (q
), cse_check_loop_start
);
6878 /* If nothing was changed and we can replace our
6879 SET_SRC, add an insn after P to copy its destination
6880 to what we will be replacing SET_SRC with. */
6881 if (cse_check_loop_start_value
6882 && validate_change (insn
, &SET_SRC (x
),
6884 emit_insn_after (gen_move_insn (src_elt
->exp
,
6892 /* Now invalidate anything modified by X. */
6893 note_mem_written (SET_DEST (x
), &writes_memory
);
6895 if (writes_memory
.var
)
6896 invalidate_memory (&writes_memory
);
6898 /* See comment on similar code in cse_insn for explanation of these tests. */
6899 if (GET_CODE (SET_DEST (x
)) == REG
|| GET_CODE (SET_DEST (x
)) == SUBREG
6900 || (GET_CODE (SET_DEST (x
)) == MEM
&& ! writes_memory
.all
6901 && ! cse_rtx_addr_varies_p (SET_DEST (x
))))
6902 invalidate (SET_DEST (x
));
6905 /* Find the end of INSN's basic block and return its range,
6906 the total number of SETs in all the insns of the block, the last insn of the
6907 block, and the branch path.
6909 The branch path indicates which branches should be followed. If a non-zero
6910 path size is specified, the block should be rescanned and a different set
6911 of branches will be taken. The branch path is only used if
6912 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
6914 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6915 used to describe the block. It is filled in with the information about
6916 the current block. The incoming structure's branch path, if any, is used
6917 to construct the output branch path. */
6919 /* Define maximum length of a branch path. */
6921 #define PATHLENGTH 20
6923 struct cse_basic_block_data
{
6924 /* Lowest CUID value of insns in block. */
6926 /* Highest CUID value of insns in block. */
6928 /* Total number of SETs in block. */
6930 /* Last insn in the block. */
6932 /* Size of current branch path, if any. */
6934 /* Current branch path, indicating which branches will be taken. */
6935 struct branch_path
{
6936 /* The branch insn. */
6938 /* Whether it should be taken or not. AROUND is the same as taken
6939 except that it is used when the destination label is not preceded
6941 enum taken
{TAKEN
, NOT_TAKEN
, AROUND
} status
;
6946 cse_end_of_basic_block (insn
, data
, follow_jumps
, after_loop
, skip_blocks
)
6948 struct cse_basic_block_data
*data
;
6955 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
6956 rtx next
= GET_RTX_CLASS (GET_CODE (insn
)) == 'i' ? insn
: next_real_insn (insn
);
6957 int path_size
= data
->path_size
;
6961 /* Update the previous branch path, if any. If the last branch was
6962 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6963 shorten the path by one and look at the previous branch. We know that
6964 at least one branch must have been taken if PATH_SIZE is non-zero. */
6965 while (path_size
> 0)
6967 if (data
->path
[path_size
- 1].status
!= NOT_TAKEN
)
6969 data
->path
[path_size
- 1].status
= NOT_TAKEN
;
6976 /* Scan to end of this basic block. */
6977 while (p
&& GET_CODE (p
) != CODE_LABEL
)
6979 /* Don't cse out the end of a loop. This makes a difference
6980 only for the unusual loops that always execute at least once;
6981 all other loops have labels there so we will stop in any case.
6982 Cse'ing out the end of the loop is dangerous because it
6983 might cause an invariant expression inside the loop
6984 to be reused after the end of the loop. This would make it
6985 hard to move the expression out of the loop in loop.c,
6986 especially if it is one of several equivalent expressions
6987 and loop.c would like to eliminate it.
6989 If we are running after loop.c has finished, we can ignore
6990 the NOTE_INSN_LOOP_END. */
6992 if (! after_loop
&& GET_CODE (p
) == NOTE
6993 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
6996 /* Don't cse over a call to setjmp; on some machines (eg vax)
6997 the regs restored by the longjmp come from
6998 a later time than the setjmp. */
6999 if (GET_CODE (p
) == NOTE
7000 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
7003 /* A PARALLEL can have lots of SETs in it,
7004 especially if it is really an ASM_OPERANDS. */
7005 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
7006 && GET_CODE (PATTERN (p
)) == PARALLEL
)
7007 nsets
+= XVECLEN (PATTERN (p
), 0);
7008 else if (GET_CODE (p
) != NOTE
)
7011 if (INSN_CUID (p
) > high_cuid
)
7012 high_cuid
= INSN_CUID (p
);
7013 if (INSN_CUID (p
) < low_cuid
)
7014 low_cuid
= INSN_CUID(p
);
7016 /* See if this insn is in our branch path. If it is and we are to
7018 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
7020 if (data
->path
[path_entry
].status
!= NOT_TAKEN
)
7023 /* Point to next entry in path, if any. */
7027 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
7028 was specified, we haven't reached our maximum path length, there are
7029 insns following the target of the jump, this is the only use of the
7030 jump label, and the target label is preceded by a BARRIER.
7032 Alternatively, we can follow the jump if it branches around a
7033 block of code and there are no other branches into the block.
7034 In this case invalidate_skipped_block will be called to invalidate any
7035 registers set in the block when following the jump. */
7037 else if ((follow_jumps
|| skip_blocks
) && path_size
< PATHLENGTH
- 1
7038 && GET_CODE (p
) == JUMP_INSN
7039 && GET_CODE (PATTERN (p
)) == SET
7040 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
7041 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
7042 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
7044 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
7045 if ((GET_CODE (q
) != NOTE
7046 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
7047 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_SETJMP
)
7048 && (GET_CODE (q
) != CODE_LABEL
|| LABEL_NUSES (q
) != 0))
7051 /* If we ran into a BARRIER, this code is an extension of the
7052 basic block when the branch is taken. */
7053 if (follow_jumps
&& q
!= 0 && GET_CODE (q
) == BARRIER
)
7055 /* Don't allow ourself to keep walking around an
7056 always-executed loop. */
7057 if (next_real_insn (q
) == next
)
7063 /* Similarly, don't put a branch in our path more than once. */
7064 for (i
= 0; i
< path_entry
; i
++)
7065 if (data
->path
[i
].branch
== p
)
7068 if (i
!= path_entry
)
7071 data
->path
[path_entry
].branch
= p
;
7072 data
->path
[path_entry
++].status
= TAKEN
;
7074 /* This branch now ends our path. It was possible that we
7075 didn't see this branch the last time around (when the
7076 insn in front of the target was a JUMP_INSN that was
7077 turned into a no-op). */
7078 path_size
= path_entry
;
7081 /* Mark block so we won't scan it again later. */
7082 PUT_MODE (NEXT_INSN (p
), QImode
);
7084 /* Detect a branch around a block of code. */
7085 else if (skip_blocks
&& q
!= 0 && GET_CODE (q
) != CODE_LABEL
)
7089 if (next_real_insn (q
) == next
)
7095 for (i
= 0; i
< path_entry
; i
++)
7096 if (data
->path
[i
].branch
== p
)
7099 if (i
!= path_entry
)
7102 /* This is no_labels_between_p (p, q) with an added check for
7103 reaching the end of a function (in case Q precedes P). */
7104 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
7105 if (GET_CODE (tmp
) == CODE_LABEL
)
7110 data
->path
[path_entry
].branch
= p
;
7111 data
->path
[path_entry
++].status
= AROUND
;
7113 path_size
= path_entry
;
7116 /* Mark block so we won't scan it again later. */
7117 PUT_MODE (NEXT_INSN (p
), QImode
);
7124 data
->low_cuid
= low_cuid
;
7125 data
->high_cuid
= high_cuid
;
7126 data
->nsets
= nsets
;
7129 /* If all jumps in the path are not taken, set our path length to zero
7130 so a rescan won't be done. */
7131 for (i
= path_size
- 1; i
>= 0; i
--)
7132 if (data
->path
[i
].status
!= NOT_TAKEN
)
7136 data
->path_size
= 0;
7138 data
->path_size
= path_size
;
7140 /* End the current branch path. */
7141 data
->path
[path_size
].branch
= 0;
7144 static rtx
cse_basic_block ();
7146 /* Perform cse on the instructions of a function.
7147 F is the first instruction.
7148 NREGS is one plus the highest pseudo-reg number used in the instruction.
7150 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7151 (only if -frerun-cse-after-loop).
7153 Returns 1 if jump_optimize should be redone due to simplifications
7154 in conditional jump instructions. */
7157 cse_main (f
, nregs
, after_loop
, file
)
7163 struct cse_basic_block_data val
;
7164 register rtx insn
= f
;
7167 cse_jumps_altered
= 0;
7168 constant_pool_entries_cost
= 0;
7175 all_minus_one
= (int *) alloca (nregs
* sizeof (int));
7176 consec_ints
= (int *) alloca (nregs
* sizeof (int));
7178 for (i
= 0; i
< nregs
; i
++)
7180 all_minus_one
[i
] = -1;
7184 reg_next_eqv
= (int *) alloca (nregs
* sizeof (int));
7185 reg_prev_eqv
= (int *) alloca (nregs
* sizeof (int));
7186 reg_qty
= (int *) alloca (nregs
* sizeof (int));
7187 reg_in_table
= (int *) alloca (nregs
* sizeof (int));
7188 reg_tick
= (int *) alloca (nregs
* sizeof (int));
7190 /* Discard all the free elements of the previous function
7191 since they are allocated in the temporarily obstack. */
7192 bzero (table
, sizeof table
);
7193 free_element_chain
= 0;
7194 n_elements_made
= 0;
7196 /* Find the largest uid. */
7199 uid_cuid
= (short *) alloca ((i
+ 1) * sizeof (short));
7200 bzero (uid_cuid
, (i
+ 1) * sizeof (short));
7202 /* Compute the mapping from uids to cuids.
7203 CUIDs are numbers assigned to insns, like uids,
7204 except that cuids increase monotonically through the code.
7205 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7206 between two insns is not affected by -g. */
7208 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
7210 if (GET_CODE (insn
) != NOTE
7211 || NOTE_LINE_NUMBER (insn
) < 0)
7212 INSN_CUID (insn
) = ++i
;
7214 /* Give a line number note the same cuid as preceding insn. */
7215 INSN_CUID (insn
) = i
;
7218 /* Initialize which registers are clobbered by calls. */
7220 CLEAR_HARD_REG_SET (regs_invalidated_by_call
);
7222 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
7223 if ((call_used_regs
[i
]
7224 /* Used to check !fixed_regs[i] here, but that isn't safe;
7225 fixed regs are still call-clobbered, and sched can get
7226 confused if they can "live across calls".
7228 The frame pointer is always preserved across calls. The arg
7229 pointer is if it is fixed. The stack pointer usually is, unless
7230 RETURN_POPS_ARGS, in which case an explicit CLOBBER
7231 will be present. If we are generating PIC code, the PIC offset
7232 table register is preserved across calls. */
7234 && i
!= STACK_POINTER_REGNUM
7235 && i
!= FRAME_POINTER_REGNUM
7236 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
7237 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
7239 #ifdef PIC_OFFSET_TABLE_REGNUM
7240 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
7244 SET_HARD_REG_BIT (regs_invalidated_by_call
, i
);
7246 /* Loop over basic blocks.
7247 Compute the maximum number of qty's needed for each basic block
7248 (which is 2 for each SET). */
7252 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
7253 flag_cse_skip_blocks
);
7255 /* If this basic block was already processed or has no sets, skip it. */
7256 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
7258 PUT_MODE (insn
, VOIDmode
);
7259 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
7264 cse_basic_block_start
= val
.low_cuid
;
7265 cse_basic_block_end
= val
.high_cuid
;
7266 max_qty
= val
.nsets
* 2;
7269 fprintf (file
, ";; Processing block from %d to %d, %d sets.\n",
7270 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
7273 /* Make MAX_QTY bigger to give us room to optimize
7274 past the end of this basic block, if that should prove useful. */
7280 /* If this basic block is being extended by following certain jumps,
7281 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7282 Otherwise, we start after this basic block. */
7283 if (val
.path_size
> 0)
7284 cse_basic_block (insn
, val
.last
, val
.path
, 0);
7287 int old_cse_jumps_altered
= cse_jumps_altered
;
7290 /* When cse changes a conditional jump to an unconditional
7291 jump, we want to reprocess the block, since it will give
7292 us a new branch path to investigate. */
7293 cse_jumps_altered
= 0;
7294 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
7295 if (cse_jumps_altered
== 0
7296 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
7299 cse_jumps_altered
|= old_cse_jumps_altered
;
7307 /* Tell refers_to_mem_p that qty_const info is not available. */
7310 if (max_elements_made
< n_elements_made
)
7311 max_elements_made
= n_elements_made
;
7313 return cse_jumps_altered
;
7316 /* Process a single basic block. FROM and TO and the limits of the basic
7317 block. NEXT_BRANCH points to the branch path when following jumps or
7318 a null path when not following jumps.
7320 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
7321 loop. This is true when we are being called for the last time on a
7322 block and this CSE pass is before loop.c. */
7325 cse_basic_block (from
, to
, next_branch
, around_loop
)
7326 register rtx from
, to
;
7327 struct branch_path
*next_branch
;
7332 int in_libcall_block
= 0;
7334 /* Each of these arrays is undefined before max_reg, so only allocate
7335 the space actually needed and adjust the start below. */
7337 qty_first_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
7338 qty_last_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
7339 qty_mode
= (enum machine_mode
*) alloca ((max_qty
- max_reg
) * sizeof (enum machine_mode
));
7340 qty_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
7341 qty_const_insn
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
7343 = (enum rtx_code
*) alloca ((max_qty
- max_reg
) * sizeof (enum rtx_code
));
7344 qty_comparison_qty
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
7345 qty_comparison_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
7347 qty_first_reg
-= max_reg
;
7348 qty_last_reg
-= max_reg
;
7349 qty_mode
-= max_reg
;
7350 qty_const
-= max_reg
;
7351 qty_const_insn
-= max_reg
;
7352 qty_comparison_code
-= max_reg
;
7353 qty_comparison_qty
-= max_reg
;
7354 qty_comparison_const
-= max_reg
;
7358 /* TO might be a label. If so, protect it from being deleted. */
7359 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
7362 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
7364 register enum rtx_code code
;
7366 /* See if this is a branch that is part of the path. If so, and it is
7367 to be taken, do so. */
7368 if (next_branch
->branch
== insn
)
7370 enum taken status
= next_branch
++->status
;
7371 if (status
!= NOT_TAKEN
)
7373 if (status
== TAKEN
)
7374 record_jump_equiv (insn
, 1);
7376 invalidate_skipped_block (NEXT_INSN (insn
));
7378 /* Set the last insn as the jump insn; it doesn't affect cc0.
7379 Then follow this branch. */
7384 insn
= JUMP_LABEL (insn
);
7389 code
= GET_CODE (insn
);
7390 if (GET_MODE (insn
) == QImode
)
7391 PUT_MODE (insn
, VOIDmode
);
7393 if (GET_RTX_CLASS (code
) == 'i')
7395 /* Process notes first so we have all notes in canonical forms when
7396 looking for duplicate operations. */
7398 if (REG_NOTES (insn
))
7399 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), 0);
7401 /* Track when we are inside in LIBCALL block. Inside such a block,
7402 we do not want to record destinations. The last insn of a
7403 LIBCALL block is not considered to be part of the block, since
7404 its destination is the result of the block and hence should be
7407 if (find_reg_note (insn
, REG_LIBCALL
, 0))
7408 in_libcall_block
= 1;
7409 else if (find_reg_note (insn
, REG_RETVAL
, 0))
7410 in_libcall_block
= 0;
7412 cse_insn (insn
, in_libcall_block
);
7415 /* If INSN is now an unconditional jump, skip to the end of our
7416 basic block by pretending that we just did the last insn in the
7417 basic block. If we are jumping to the end of our block, show
7418 that we can have one usage of TO. */
7420 if (simplejump_p (insn
))
7425 if (JUMP_LABEL (insn
) == to
)
7428 insn
= PREV_INSN (to
);
7431 /* See if it is ok to keep on going past the label
7432 which used to end our basic block. Remember that we incremented
7433 the count of that label, so we decrement it here. If we made
7434 a jump unconditional, TO_USAGE will be one; in that case, we don't
7435 want to count the use in that jump. */
7437 if (to
!= 0 && NEXT_INSN (insn
) == to
7438 && GET_CODE (to
) == CODE_LABEL
&& --LABEL_NUSES (to
) == to_usage
)
7440 struct cse_basic_block_data val
;
7442 insn
= NEXT_INSN (to
);
7444 if (LABEL_NUSES (to
) == 0)
7447 /* Find the end of the following block. Note that we won't be
7448 following branches in this case. If TO was the last insn
7449 in the function, we are done. Similarly, if we deleted the
7450 insn after TO, it must have been because it was preceded by
7451 a BARRIER. In that case, we are done with this block because it
7452 has no continuation. */
7454 if (insn
== 0 || INSN_DELETED_P (insn
))
7459 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
7461 /* If the tables we allocated have enough space left
7462 to handle all the SETs in the next basic block,
7463 continue through it. Otherwise, return,
7464 and that block will be scanned individually. */
7465 if (val
.nsets
* 2 + next_qty
> max_qty
)
7468 cse_basic_block_start
= val
.low_cuid
;
7469 cse_basic_block_end
= val
.high_cuid
;
7472 /* Prevent TO from being deleted if it is a label. */
7473 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
7476 /* Back up so we process the first insn in the extension. */
7477 insn
= PREV_INSN (insn
);
7481 if (next_qty
> max_qty
)
7484 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7485 the previous insn is the only insn that branches to the head of a loop,
7486 we can cse into the loop. Don't do this if we changed the jump
7487 structure of a loop unless we aren't going to be following jumps. */
7489 if ((cse_jumps_altered
== 0
7490 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
7491 && around_loop
&& to
!= 0
7492 && GET_CODE (to
) == NOTE
&& NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
7493 && GET_CODE (PREV_INSN (to
)) == JUMP_INSN
7494 && JUMP_LABEL (PREV_INSN (to
)) != 0
7495 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to
))) == 1)
7496 cse_around_loop (JUMP_LABEL (PREV_INSN (to
)));
7498 return to
? NEXT_INSN (to
) : 0;
7501 /* Count the number of times registers are used (not set) in X.
7502 COUNTS is an array in which we accumulate the count, INCR is how much
7503 we count each register usage. */
7506 count_reg_usage (x
, counts
, incr
)
7511 enum rtx_code code
= GET_CODE (x
);
7518 counts
[REGNO (x
)] += incr
;
7532 /* Unless we are setting a REG, count everything in SET_DEST. */
7533 if (GET_CODE (SET_DEST (x
)) != REG
)
7534 count_reg_usage (SET_DEST (x
), counts
, incr
);
7535 count_reg_usage (SET_SRC (x
), counts
, incr
);
7541 count_reg_usage (PATTERN (x
), counts
, incr
);
7543 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7547 count_reg_usage (REG_NOTES (x
), counts
, incr
);
7552 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
7553 count_reg_usage (XEXP (x
, 0), counts
, incr
);
7555 count_reg_usage (XEXP (x
, 1), counts
, incr
);
7559 fmt
= GET_RTX_FORMAT (code
);
7560 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7563 count_reg_usage (XEXP (x
, i
), counts
, incr
);
7564 else if (fmt
[i
] == 'E')
7565 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7566 count_reg_usage (XVECEXP (x
, i
, j
), counts
, incr
);
7570 /* Scan all the insns and delete any that are dead; i.e., they store a register
7571 that is never used or they copy a register to itself.
7573 This is used to remove insns made obviously dead by cse. It improves the
7574 heuristics in loop since it won't try to move dead invariants out of loops
7575 or make givs for dead quantities. The remaining passes of the compilation
7576 are also sped up. */
7579 delete_dead_from_cse (insns
, nreg
)
7583 int *counts
= (int *) alloca (nreg
* sizeof (int));
7588 /* First count the number of times each register is used. */
7589 bzero (counts
, sizeof (int) * nreg
);
7590 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
7591 count_reg_usage (insn
, counts
, 1);
7593 /* Go from the last insn to the first and delete insns that only set unused
7594 registers or copy a register to itself. As we delete an insn, remove
7595 usage counts for registers it uses. */
7596 for (insn
= prev_real_insn (get_last_insn ());
7597 insn
; insn
= prev_real_insn (insn
))
7601 if (GET_CODE (PATTERN (insn
)) == SET
)
7603 if (GET_CODE (SET_DEST (PATTERN (insn
))) == REG
7604 && SET_DEST (PATTERN (insn
)) == SET_SRC (PATTERN (insn
)))
7608 else if (GET_CODE (SET_DEST (PATTERN (insn
))) == CC0
7609 && ! side_effects_p (SET_SRC (PATTERN (insn
)))
7610 && ((tem
= next_nonnote_insn (insn
)) == 0
7611 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
7612 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
7615 else if (GET_CODE (SET_DEST (PATTERN (insn
))) != REG
7616 || REGNO (SET_DEST (PATTERN (insn
))) < FIRST_PSEUDO_REGISTER
7617 || counts
[REGNO (SET_DEST (PATTERN (insn
)))] != 0
7618 || side_effects_p (SET_SRC (PATTERN (insn
))))
7621 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7622 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7624 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7626 if (GET_CODE (elt
) == SET
)
7628 if (GET_CODE (SET_DEST (elt
)) == REG
7629 && SET_DEST (elt
) == SET_SRC (elt
))
7633 else if (GET_CODE (SET_DEST (elt
)) == CC0
7634 && ! side_effects_p (SET_SRC (elt
))
7635 && ((tem
= next_nonnote_insn (insn
)) == 0
7636 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
7637 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
7640 else if (GET_CODE (SET_DEST (elt
)) != REG
7641 || REGNO (SET_DEST (elt
)) < FIRST_PSEUDO_REGISTER
7642 || counts
[REGNO (SET_DEST (elt
))] != 0
7643 || side_effects_p (SET_SRC (elt
)))
7646 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
7652 /* If this is a dead insn, delete it and show registers in it aren't
7653 being used. If this is the last insn of a libcall sequence, don't
7654 delete it even if it is dead because we don't know how to do so
7657 if (! live_insn
&& ! find_reg_note (insn
, REG_RETVAL
, 0))
7659 count_reg_usage (insn
, counts
, -1);
7660 PUT_CODE (insn
, NOTE
);
7661 NOTE_SOURCE_FILE (insn
) = 0;
7662 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;