1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
24 #include "hard-reg-set.h"
27 #include "insn-config.h"
33 /* The basic idea of common subexpression elimination is to go
34 through the code, keeping a record of expressions that would
35 have the same value at the current scan point, and replacing
36 expressions encountered with the cheapest equivalent expression.
38 It is too complicated to keep track of the different possibilities
39 when control paths merge; so, at each label, we forget all that is
40 known and start fresh. This can be described as processing each
41 basic block separately. Note, however, that these are not quite
42 the same as the basic blocks found by a later pass and used for
43 data flow analysis and register packing. We do not need to start fresh
44 after a conditional jump instruction if there is no label there.
46 We use two data structures to record the equivalent expressions:
47 a hash table for most expressions, and several vectors together
48 with "quantity numbers" to record equivalent (pseudo) registers.
50 The use of the special data structure for registers is desirable
51 because it is faster. It is possible because registers references
52 contain a fairly small number, the register number, taken from
53 a contiguously allocated series, and two register references are
54 identical if they have the same number. General expressions
55 do not have any such thing, so the only way to retrieve the
56 information recorded on an expression other than a register
57 is to keep it in a hash table.
59 Registers and "quantity numbers":
61 At the start of each basic block, all of the (hardware and pseudo)
62 registers used in the function are given distinct quantity
63 numbers to indicate their contents. During scan, when the code
64 copies one register into another, we copy the quantity number.
65 When a register is loaded in any other way, we allocate a new
66 quantity number to describe the value generated by this operation.
67 `reg_qty' records what quantity a register is currently thought
70 All real quantity numbers are greater than or equal to `max_reg'.
71 If register N has not been assigned a quantity, reg_qty[N] will equal N.
73 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
74 variables should be referenced with an index below `max_reg'.
76 We also maintain a bidirectional chain of registers for each
77 quantity number. `qty_first_reg', `qty_last_reg',
78 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
80 The first register in a chain is the one whose lifespan is least local.
81 Among equals, it is the one that was seen first.
82 We replace any equivalent register with that one.
84 If two registers have the same quantity number, it must be true that
85 REG expressions with `qty_mode' must be in the hash table for both
86 registers and must be in the same class.
88 The converse is not true. Since hard registers may be referenced in
89 any mode, two REG expressions might be equivalent in the hash table
90 but not have the same quantity number if the quantity number of one
91 of the registers is not the same mode as those expressions.
93 Constants and quantity numbers
95 When a quantity has a known constant value, that value is stored
96 in the appropriate element of qty_const. This is in addition to
97 putting the constant in the hash table as is usual for non-regs.
99 Whether a reg or a constant is preferred is determined by the configuration
100 macro CONST_COSTS and will often depend on the constant value. In any
101 event, expressions containing constants can be simplified, by fold_rtx.
103 When a quantity has a known nearly constant value (such as an address
104 of a stack slot), that value is stored in the appropriate element
107 Integer constants don't have a machine mode. However, cse
108 determines the intended machine mode from the destination
109 of the instruction that moves the constant. The machine mode
110 is recorded in the hash table along with the actual RTL
111 constant expression so that different modes are kept separate.
115 To record known equivalences among expressions in general
116 we use a hash table called `table'. It has a fixed number of buckets
117 that contain chains of `struct table_elt' elements for expressions.
118 These chains connect the elements whose expressions have the same
121 Other chains through the same elements connect the elements which
122 currently have equivalent values.
124 Register references in an expression are canonicalized before hashing
125 the expression. This is done using `reg_qty' and `qty_first_reg'.
126 The hash code of a register reference is computed using the quantity
127 number, not the register number.
129 When the value of an expression changes, it is necessary to remove from the
130 hash table not just that expression but all expressions whose values
131 could be different as a result.
133 1. If the value changing is in memory, except in special cases
134 ANYTHING referring to memory could be changed. That is because
135 nobody knows where a pointer does not point.
136 The function `invalidate_memory' removes what is necessary.
138 The special cases are when the address is constant or is
139 a constant plus a fixed register such as the frame pointer
140 or a static chain pointer. When such addresses are stored in,
141 we can tell exactly which other such addresses must be invalidated
142 due to overlap. `invalidate' does this.
143 All expressions that refer to non-constant
144 memory addresses are also invalidated. `invalidate_memory' does this.
146 2. If the value changing is a register, all expressions
147 containing references to that register, and only those,
150 Because searching the entire hash table for expressions that contain
151 a register is very slow, we try to figure out when it isn't necessary.
152 Precisely, this is necessary only when expressions have been
153 entered in the hash table using this register, and then the value has
154 changed, and then another expression wants to be added to refer to
155 the register's new value. This sequence of circumstances is rare
156 within any one basic block.
158 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
159 reg_tick[i] is incremented whenever a value is stored in register i.
160 reg_in_table[i] holds -1 if no references to register i have been
161 entered in the table; otherwise, it contains the value reg_tick[i] had
162 when the references were entered. If we want to enter a reference
163 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
164 Until we want to enter a new entry, the mere fact that the two vectors
165 don't match makes the entries be ignored if anyone tries to match them.
167 Registers themselves are entered in the hash table as well as in
168 the equivalent-register chains. However, the vectors `reg_tick'
169 and `reg_in_table' do not apply to expressions which are simple
170 register references. These expressions are removed from the table
171 immediately when they become invalid, and this can be done even if
172 we do not immediately search for all the expressions that refer to
175 A CLOBBER rtx in an instruction invalidates its operand for further
176 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
177 invalidates everything that resides in memory.
181 Constant expressions that differ only by an additive integer
182 are called related. When a constant expression is put in
183 the table, the related expression with no constant term
184 is also entered. These are made to point at each other
185 so that it is possible to find out if there exists any
186 register equivalent to an expression related to a given expression. */
188 /* One plus largest register number used in this function. */
192 /* Length of vectors indexed by quantity number.
193 We know in advance we will not need a quantity number this big. */
197 /* Next quantity number to be allocated.
198 This is 1 + the largest number needed so far. */
202 /* Indexed by quantity number, gives the first (or last) (pseudo) register
203 in the chain of registers that currently contain this quantity. */
205 static int *qty_first_reg
;
206 static int *qty_last_reg
;
208 /* Index by quantity number, gives the mode of the quantity. */
210 static enum machine_mode
*qty_mode
;
212 /* Indexed by quantity number, gives the rtx of the constant value of the
213 quantity, or zero if it does not have a known value.
214 A sum of the frame pointer (or arg pointer) plus a constant
215 can also be entered here. */
217 static rtx
*qty_const
;
219 /* Indexed by qty number, gives the insn that stored the constant value
220 recorded in `qty_const'. */
222 static rtx
*qty_const_insn
;
224 /* The next three variables are used to track when a comparison between a
225 quantity and some constant or register has been passed. In that case, we
226 know the results of the comparison in case we see it again. These variables
227 record a comparison that is known to be true. */
229 /* Indexed by qty number, gives the rtx code of a comparison with a known
230 result involving this quantity. If none, it is UNKNOWN. */
231 static enum rtx_code
*qty_comparison_code
;
233 /* Indexed by qty number, gives the constant being compared against in a
234 comparison of known result. If no such comparison, it is undefined.
235 If the comparison is not with a constant, it is zero. */
237 static rtx
*qty_comparison_const
;
239 /* Indexed by qty number, gives the quantity being compared against in a
240 comparison of known result. If no such comparison, if it undefined.
241 If the comparison is not with a register, it is -1. */
243 static int *qty_comparison_qty
;
246 /* For machines that have a CC0, we do not record its value in the hash
247 table since its use is guaranteed to be the insn immediately following
248 its definition and any other insn is presumed to invalidate it.
250 Instead, we store below the value last assigned to CC0. If it should
251 happen to be a constant, it is stored in preference to the actual
252 assigned value. In case it is a constant, we store the mode in which
253 the constant should be interpreted. */
255 static rtx prev_insn_cc0
;
256 static enum machine_mode prev_insn_cc0_mode
;
259 /* Previous actual insn. 0 if at first insn of basic block. */
261 static rtx prev_insn
;
263 /* Insn being scanned. */
265 static rtx this_insn
;
267 /* Index by (pseudo) register number, gives the quantity number
268 of the register's current contents. */
272 /* Index by (pseudo) register number, gives the number of the next (or
273 previous) (pseudo) register in the chain of registers sharing the same
276 Or -1 if this register is at the end of the chain.
278 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
280 static int *reg_next_eqv
;
281 static int *reg_prev_eqv
;
283 /* Index by (pseudo) register number, gives the number of times
284 that register has been altered in the current basic block. */
286 static int *reg_tick
;
288 /* Index by (pseudo) register number, gives the reg_tick value at which
289 rtx's containing this register are valid in the hash table.
290 If this does not equal the current reg_tick value, such expressions
291 existing in the hash table are invalid.
292 If this is -1, no expressions containing this register have been
293 entered in the table. */
295 static int *reg_in_table
;
297 /* A HARD_REG_SET containing all the hard registers for which there is
298 currently a REG expression in the hash table. Note the difference
299 from the above variables, which indicate if the REG is mentioned in some
300 expression in the table. */
302 static HARD_REG_SET hard_regs_in_table
;
304 /* A HARD_REG_SET containing all the hard registers that are invalidated
307 static HARD_REG_SET regs_invalidated_by_call
;
309 /* Two vectors of ints:
310 one containing max_reg -1's; the other max_reg + 500 (an approximation
311 for max_qty) elements where element i contains i.
312 These are used to initialize various other vectors fast. */
314 static int *all_minus_one
;
315 static int *consec_ints
;
317 /* CUID of insn that starts the basic block currently being cse-processed. */
319 static int cse_basic_block_start
;
321 /* CUID of insn that ends the basic block currently being cse-processed. */
323 static int cse_basic_block_end
;
325 /* Vector mapping INSN_UIDs to cuids.
326 The cuids are like uids but increase monotonically always.
327 We use them to see whether a reg is used outside a given basic block. */
329 static int *uid_cuid
;
331 /* Highest UID in UID_CUID. */
334 /* Get the cuid of an insn. */
336 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
338 /* Nonzero if cse has altered conditional jump insns
339 in such a way that jump optimization should be redone. */
341 static int cse_jumps_altered
;
343 /* canon_hash stores 1 in do_not_record
344 if it notices a reference to CC0, PC, or some other volatile
347 static int do_not_record
;
349 /* canon_hash stores 1 in hash_arg_in_memory
350 if it notices a reference to memory within the expression being hashed. */
352 static int hash_arg_in_memory
;
354 /* canon_hash stores 1 in hash_arg_in_struct
355 if it notices a reference to memory that's part of a structure. */
357 static int hash_arg_in_struct
;
359 /* The hash table contains buckets which are chains of `struct table_elt's,
360 each recording one expression's information.
361 That expression is in the `exp' field.
363 Those elements with the same hash code are chained in both directions
364 through the `next_same_hash' and `prev_same_hash' fields.
366 Each set of expressions with equivalent values
367 are on a two-way chain through the `next_same_value'
368 and `prev_same_value' fields, and all point with
369 the `first_same_value' field at the first element in
370 that chain. The chain is in order of increasing cost.
371 Each element's cost value is in its `cost' field.
373 The `in_memory' field is nonzero for elements that
374 involve any reference to memory. These elements are removed
375 whenever a write is done to an unidentified location in memory.
376 To be safe, we assume that a memory address is unidentified unless
377 the address is either a symbol constant or a constant plus
378 the frame pointer or argument pointer.
380 The `in_struct' field is nonzero for elements that
381 involve any reference to memory inside a structure or array.
383 The `related_value' field is used to connect related expressions
384 (that differ by adding an integer).
385 The related expressions are chained in a circular fashion.
386 `related_value' is zero for expressions for which this
389 The `cost' field stores the cost of this element's expression.
391 The `is_const' flag is set if the element is a constant (including
394 The `flag' field is used as a temporary during some search routines.
396 The `mode' field is usually the same as GET_MODE (`exp'), but
397 if `exp' is a CONST_INT and has no machine mode then the `mode'
398 field is the mode it was being used as. Each constant is
399 recorded separately for each mode it is used with. */
405 struct table_elt
*next_same_hash
;
406 struct table_elt
*prev_same_hash
;
407 struct table_elt
*next_same_value
;
408 struct table_elt
*prev_same_value
;
409 struct table_elt
*first_same_value
;
410 struct table_elt
*related_value
;
412 enum machine_mode mode
;
421 /* We don't want a lot of buckets, because we rarely have very many
422 things stored in the hash table, and a lot of buckets slows
423 down a lot of loops that happen frequently. */
426 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
427 register (hard registers may require `do_not_record' to be set). */
430 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
431 ? ((((int) REG << 7) + reg_qty[REGNO (X)]) % NBUCKETS) \
432 : canon_hash (X, M) % NBUCKETS)
434 /* Determine whether register number N is considered a fixed register for CSE.
435 It is desirable to replace other regs with fixed regs, to reduce need for
437 A reg wins if it is either the frame pointer or designated as fixed,
438 but not if it is an overlapping register. */
439 #ifdef OVERLAPPING_REGNO_P
440 #define FIXED_REGNO_P(N) \
441 (((N) == FRAME_POINTER_REGNUM || fixed_regs[N]) \
442 && ! OVERLAPPING_REGNO_P ((N)))
444 #define FIXED_REGNO_P(N) \
445 ((N) == FRAME_POINTER_REGNUM || fixed_regs[N])
448 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
449 hard registers and pointers into the frame are the cheapest with a cost
450 of 0. Next come pseudos with a cost of one and other hard registers with
451 a cost of 2. Aside from these special cases, call `rtx_cost'. */
453 #define CHEAP_REG(N) \
454 ((N) == FRAME_POINTER_REGNUM || (N) == STACK_POINTER_REGNUM \
455 || (N) == ARG_POINTER_REGNUM \
456 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
457 || ((N) < FIRST_PSEUDO_REGISTER \
458 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
461 (GET_CODE (X) == REG \
462 ? (CHEAP_REG (REGNO (X)) ? 0 \
463 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
465 : rtx_cost (X, SET) * 2)
467 /* Determine if the quantity number for register X represents a valid index
468 into the `qty_...' variables. */
470 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
472 static struct table_elt
*table
[NBUCKETS
];
474 /* Chain of `struct table_elt's made so far for this function
475 but currently removed from the table. */
477 static struct table_elt
*free_element_chain
;
479 /* Number of `struct table_elt' structures made so far for this function. */
481 static int n_elements_made
;
483 /* Maximum value `n_elements_made' has had so far in this compilation
484 for functions previously processed. */
486 static int max_elements_made
;
488 /* Surviving equivalence class when two equivalence classes are merged
489 by recording the effects of a jump in the last insn. Zero if the
490 last insn was not a conditional jump. */
492 static struct table_elt
*last_jump_equiv_class
;
494 /* Set to the cost of a constant pool reference if one was found for a
495 symbolic constant. If this was found, it means we should try to
496 convert constants into constant pool entries if they don't fit in
499 static int constant_pool_entries_cost
;
501 /* Bits describing what kind of values in memory must be invalidated
502 for a particular instruction. If all three bits are zero,
503 no memory refs need to be invalidated. Each bit is more powerful
504 than the preceding ones, and if a bit is set then the preceding
507 Here is how the bits are set:
508 Pushing onto the stack invalidates only the stack pointer,
509 writing at a fixed address invalidates only variable addresses,
510 writing in a structure element at variable address
511 invalidates all but scalar variables,
512 and writing in anything else at variable address invalidates everything. */
516 int sp
: 1; /* Invalidate stack pointer. */
517 int var
: 1; /* Invalidate variable addresses. */
518 int nonscalar
: 1; /* Invalidate all but scalar variables. */
519 int all
: 1; /* Invalidate all memory refs. */
522 /* Define maximum length of a branch path. */
524 #define PATHLENGTH 10
526 /* This data describes a block that will be processed by cse_basic_block. */
528 struct cse_basic_block_data
{
529 /* Lowest CUID value of insns in block. */
531 /* Highest CUID value of insns in block. */
533 /* Total number of SETs in block. */
535 /* Last insn in the block. */
537 /* Size of current branch path, if any. */
539 /* Current branch path, indicating which branches will be taken. */
541 /* The branch insn. */
543 /* Whether it should be taken or not. AROUND is the same as taken
544 except that it is used when the destination label is not preceded
546 enum taken
{TAKEN
, NOT_TAKEN
, AROUND
} status
;
550 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
551 virtual regs here because the simplify_*_operation routines are called
552 by integrate.c, which is called before virtual register instantiation. */
554 #define FIXED_BASE_PLUS_P(X) \
555 ((X) == frame_pointer_rtx || (X) == arg_pointer_rtx \
556 || (X) == virtual_stack_vars_rtx \
557 || (X) == virtual_incoming_args_rtx \
558 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
559 && (XEXP (X, 0) == frame_pointer_rtx \
560 || XEXP (X, 0) == arg_pointer_rtx \
561 || XEXP (X, 0) == virtual_stack_vars_rtx \
562 || XEXP (X, 0) == virtual_incoming_args_rtx)))
564 /* Similar, but also allows reference to the stack pointer.
566 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
567 arg_pointer_rtx by itself is nonzero, because on at least one machine,
568 the i960, the arg pointer is zero when it is unused. */
570 #define NONZERO_BASE_PLUS_P(X) \
571 ((X) == frame_pointer_rtx \
572 || (X) == virtual_stack_vars_rtx \
573 || (X) == virtual_incoming_args_rtx \
574 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
575 && (XEXP (X, 0) == frame_pointer_rtx \
576 || XEXP (X, 0) == arg_pointer_rtx \
577 || XEXP (X, 0) == virtual_stack_vars_rtx \
578 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
579 || (X) == stack_pointer_rtx \
580 || (X) == virtual_stack_dynamic_rtx \
581 || (X) == virtual_outgoing_args_rtx \
582 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
583 && (XEXP (X, 0) == stack_pointer_rtx \
584 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
585 || XEXP (X, 0) == virtual_outgoing_args_rtx)))
587 static void new_basic_block
PROTO((void));
588 static void make_new_qty
PROTO((int));
589 static void make_regs_eqv
PROTO((int, int));
590 static void delete_reg_equiv
PROTO((int));
591 static int mention_regs
PROTO((rtx
));
592 static int insert_regs
PROTO((rtx
, struct table_elt
*, int));
593 static void free_element
PROTO((struct table_elt
*));
594 static void remove_from_table
PROTO((struct table_elt
*, int));
595 static struct table_elt
*get_element
PROTO((void));
596 static struct table_elt
*lookup
PROTO((rtx
, int, enum machine_mode
)),
597 *lookup_for_remove
PROTO((rtx
, int, enum machine_mode
));
598 static rtx lookup_as_function
PROTO((rtx
, enum rtx_code
));
599 static struct table_elt
*insert
PROTO((rtx
, struct table_elt
*, int,
601 static void merge_equiv_classes
PROTO((struct table_elt
*,
602 struct table_elt
*));
603 static void invalidate
PROTO((rtx
));
604 static void remove_invalid_refs
PROTO((int));
605 static void rehash_using_reg
PROTO((rtx
));
606 static void invalidate_memory
PROTO((struct write_data
*));
607 static void invalidate_for_call
PROTO((void));
608 static rtx use_related_value
PROTO((rtx
, struct table_elt
*));
609 static int canon_hash
PROTO((rtx
, enum machine_mode
));
610 static int safe_hash
PROTO((rtx
, enum machine_mode
));
611 static int exp_equiv_p
PROTO((rtx
, rtx
, int, int));
612 static void set_nonvarying_address_components
PROTO((rtx
, int, rtx
*,
615 static int refers_to_p
PROTO((rtx
, rtx
));
616 static int refers_to_mem_p
PROTO((rtx
, rtx
, HOST_WIDE_INT
,
618 static int cse_rtx_addr_varies_p
PROTO((rtx
));
619 static rtx canon_reg
PROTO((rtx
, rtx
));
620 static void find_best_addr
PROTO((rtx
, rtx
*));
621 static enum rtx_code find_comparison_args
PROTO((enum rtx_code
, rtx
*, rtx
*,
623 enum machine_mode
*));
624 static rtx cse_gen_binary
PROTO((enum rtx_code
, enum machine_mode
,
626 static rtx simplify_plus_minus
PROTO((enum rtx_code
, enum machine_mode
,
628 static rtx fold_rtx
PROTO((rtx
, rtx
));
629 static rtx equiv_constant
PROTO((rtx
));
630 static void record_jump_equiv
PROTO((rtx
, int));
631 static void record_jump_cond
PROTO((enum rtx_code
, enum machine_mode
,
633 static void cse_insn
PROTO((rtx
, int));
634 static void note_mem_written
PROTO((rtx
, struct write_data
*));
635 static void invalidate_from_clobbers
PROTO((struct write_data
*, rtx
));
636 static rtx cse_process_notes
PROTO((rtx
, rtx
));
637 static void cse_around_loop
PROTO((rtx
));
638 static void invalidate_skipped_set
PROTO((rtx
, rtx
));
639 static void invalidate_skipped_block
PROTO((rtx
));
640 static void cse_check_loop_start
PROTO((rtx
, rtx
));
641 static void cse_set_around_loop
PROTO((rtx
, rtx
, rtx
));
642 static rtx cse_basic_block
PROTO((rtx
, rtx
, struct branch_path
*, int));
643 static void count_reg_usage
PROTO((rtx
, int *, int));
645 /* Return an estimate of the cost of computing rtx X.
646 One use is in cse, to decide which expression to keep in the hash table.
647 Another is in rtl generation, to pick the cheapest way to multiply.
648 Other uses like the latter are expected in the future. */
650 /* Return the right cost to give to an operation
651 to make the cost of the corresponding register-to-register instruction
652 N times that of a fast register-to-register instruction. */
654 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
657 rtx_cost (x
, outer_code
)
659 enum rtx_code outer_code
;
662 register enum rtx_code code
;
669 /* Compute the default costs of certain things.
670 Note that RTX_COSTS can override the defaults. */
676 /* Count multiplication by 2**n as a shift,
677 because if we are considering it, we would output it as a shift. */
678 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
679 && exact_log2 (INTVAL (XEXP (x
, 1))) >= 0)
682 total
= COSTS_N_INSNS (5);
688 total
= COSTS_N_INSNS (7);
691 /* Used in loop.c and combine.c as a marker. */
695 /* We don't want these to be used in substitutions because
696 we have no way of validating the resulting insn. So assign
697 anything containing an ASM_OPERANDS a very high cost. */
707 return ! CHEAP_REG (REGNO (x
));
710 /* If we can't tie these modes, make this expensive. The larger
711 the mode, the more expensive it is. */
712 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
713 return COSTS_N_INSNS (2
714 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
717 RTX_COSTS (x
, code
, outer_code
);
719 CONST_COSTS (x
, code
, outer_code
);
722 /* Sum the costs of the sub-rtx's, plus cost of this operation,
723 which is already in total. */
725 fmt
= GET_RTX_FORMAT (code
);
726 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
728 total
+= rtx_cost (XEXP (x
, i
), code
);
729 else if (fmt
[i
] == 'E')
730 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
731 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
736 /* Clear the hash table and initialize each register with its own quantity,
737 for a new basic block. */
746 bzero (reg_tick
, max_reg
* sizeof (int));
748 bcopy (all_minus_one
, reg_in_table
, max_reg
* sizeof (int));
749 bcopy (consec_ints
, reg_qty
, max_reg
* sizeof (int));
750 CLEAR_HARD_REG_SET (hard_regs_in_table
);
752 /* The per-quantity values used to be initialized here, but it is
753 much faster to initialize each as it is made in `make_new_qty'. */
755 for (i
= 0; i
< NBUCKETS
; i
++)
757 register struct table_elt
*this, *next
;
758 for (this = table
[i
]; this; this = next
)
760 next
= this->next_same_hash
;
765 bzero (table
, sizeof table
);
774 /* Say that register REG contains a quantity not in any register before
775 and initialize that quantity. */
783 if (next_qty
>= max_qty
)
786 q
= reg_qty
[reg
] = next_qty
++;
787 qty_first_reg
[q
] = reg
;
788 qty_last_reg
[q
] = reg
;
789 qty_const
[q
] = qty_const_insn
[q
] = 0;
790 qty_comparison_code
[q
] = UNKNOWN
;
792 reg_next_eqv
[reg
] = reg_prev_eqv
[reg
] = -1;
795 /* Make reg NEW equivalent to reg OLD.
796 OLD is not changing; NEW is. */
799 make_regs_eqv (new, old
)
800 register int new, old
;
802 register int lastr
, firstr
;
803 register int q
= reg_qty
[old
];
805 /* Nothing should become eqv until it has a "non-invalid" qty number. */
806 if (! REGNO_QTY_VALID_P (old
))
810 firstr
= qty_first_reg
[q
];
811 lastr
= qty_last_reg
[q
];
813 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
814 hard regs. Among pseudos, if NEW will live longer than any other reg
815 of the same qty, and that is beyond the current basic block,
816 make it the new canonical replacement for this qty. */
817 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
818 /* Certain fixed registers might be of the class NO_REGS. This means
819 that not only can they not be allocated by the compiler, but
820 they cannot be used in substitutions or canonicalizations
822 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
823 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
824 || (new >= FIRST_PSEUDO_REGISTER
825 && (firstr
< FIRST_PSEUDO_REGISTER
826 || ((uid_cuid
[regno_last_uid
[new]] > cse_basic_block_end
827 || (uid_cuid
[regno_first_uid
[new]]
828 < cse_basic_block_start
))
829 && (uid_cuid
[regno_last_uid
[new]]
830 > uid_cuid
[regno_last_uid
[firstr
]]))))))
832 reg_prev_eqv
[firstr
] = new;
833 reg_next_eqv
[new] = firstr
;
834 reg_prev_eqv
[new] = -1;
835 qty_first_reg
[q
] = new;
839 /* If NEW is a hard reg (known to be non-fixed), insert at end.
840 Otherwise, insert before any non-fixed hard regs that are at the
841 end. Registers of class NO_REGS cannot be used as an
842 equivalent for anything. */
843 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_prev_eqv
[lastr
] >= 0
844 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
845 && new >= FIRST_PSEUDO_REGISTER
)
846 lastr
= reg_prev_eqv
[lastr
];
847 reg_next_eqv
[new] = reg_next_eqv
[lastr
];
848 if (reg_next_eqv
[lastr
] >= 0)
849 reg_prev_eqv
[reg_next_eqv
[lastr
]] = new;
851 qty_last_reg
[q
] = new;
852 reg_next_eqv
[lastr
] = new;
853 reg_prev_eqv
[new] = lastr
;
857 /* Remove REG from its equivalence class. */
860 delete_reg_equiv (reg
)
863 register int n
= reg_next_eqv
[reg
];
864 register int p
= reg_prev_eqv
[reg
];
865 register int q
= reg_qty
[reg
];
867 /* If invalid, do nothing. N and P above are undefined in that case. */
878 qty_first_reg
[q
] = n
;
883 /* Remove any invalid expressions from the hash table
884 that refer to any of the registers contained in expression X.
886 Make sure that newly inserted references to those registers
887 as subexpressions will be considered valid.
889 mention_regs is not called when a register itself
890 is being stored in the table.
892 Return 1 if we have done something that may have changed the hash code
899 register enum rtx_code code
;
902 register int changed
= 0;
910 register int regno
= REGNO (x
);
911 register int endregno
912 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
913 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
916 for (i
= regno
; i
< endregno
; i
++)
918 if (reg_in_table
[i
] >= 0 && reg_in_table
[i
] != reg_tick
[i
])
919 remove_invalid_refs (i
);
921 reg_in_table
[i
] = reg_tick
[i
];
927 /* If X is a comparison or a COMPARE and either operand is a register
928 that does not have a quantity, give it one. This is so that a later
929 call to record_jump_equiv won't cause X to be assigned a different
930 hash code and not found in the table after that call.
932 It is not necessary to do this here, since rehash_using_reg can
933 fix up the table later, but doing this here eliminates the need to
934 call that expensive function in the most common case where the only
935 use of the register is in the comparison. */
937 if (code
== COMPARE
|| GET_RTX_CLASS (code
) == '<')
939 if (GET_CODE (XEXP (x
, 0)) == REG
940 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
941 if (insert_regs (XEXP (x
, 0), NULL_PTR
, 0))
943 rehash_using_reg (XEXP (x
, 0));
947 if (GET_CODE (XEXP (x
, 1)) == REG
948 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
949 if (insert_regs (XEXP (x
, 1), NULL_PTR
, 0))
951 rehash_using_reg (XEXP (x
, 1));
956 fmt
= GET_RTX_FORMAT (code
);
957 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
959 changed
|= mention_regs (XEXP (x
, i
));
960 else if (fmt
[i
] == 'E')
961 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
962 changed
|= mention_regs (XVECEXP (x
, i
, j
));
967 /* Update the register quantities for inserting X into the hash table
968 with a value equivalent to CLASSP.
969 (If the class does not contain a REG, it is irrelevant.)
970 If MODIFIED is nonzero, X is a destination; it is being modified.
971 Note that delete_reg_equiv should be called on a register
972 before insert_regs is done on that register with MODIFIED != 0.
974 Nonzero value means that elements of reg_qty have changed
975 so X's hash code may be different. */
978 insert_regs (x
, classp
, modified
)
980 struct table_elt
*classp
;
983 if (GET_CODE (x
) == REG
)
985 register int regno
= REGNO (x
);
987 /* If REGNO is in the equivalence table already but is of the
988 wrong mode for that equivalence, don't do anything here. */
990 if (REGNO_QTY_VALID_P (regno
)
991 && qty_mode
[reg_qty
[regno
]] != GET_MODE (x
))
994 if (modified
|| ! REGNO_QTY_VALID_P (regno
))
997 for (classp
= classp
->first_same_value
;
999 classp
= classp
->next_same_value
)
1000 if (GET_CODE (classp
->exp
) == REG
1001 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1003 make_regs_eqv (regno
, REGNO (classp
->exp
));
1007 make_new_qty (regno
);
1008 qty_mode
[reg_qty
[regno
]] = GET_MODE (x
);
1013 /* If X is a SUBREG, we will likely be inserting the inner register in the
1014 table. If that register doesn't have an assigned quantity number at
1015 this point but does later, the insertion that we will be doing now will
1016 not be accessible because its hash code will have changed. So assign
1017 a quantity number now. */
1019 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
1020 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1022 insert_regs (SUBREG_REG (x
), NULL_PTR
, 0);
1023 mention_regs (SUBREG_REG (x
));
1027 return mention_regs (x
);
1030 /* Look in or update the hash table. */
1032 /* Put the element ELT on the list of free elements. */
1036 struct table_elt
*elt
;
1038 elt
->next_same_hash
= free_element_chain
;
1039 free_element_chain
= elt
;
1042 /* Return an element that is free for use. */
1044 static struct table_elt
*
1047 struct table_elt
*elt
= free_element_chain
;
1050 free_element_chain
= elt
->next_same_hash
;
1054 return (struct table_elt
*) oballoc (sizeof (struct table_elt
));
1057 /* Remove table element ELT from use in the table.
1058 HASH is its hash code, made using the HASH macro.
1059 It's an argument because often that is known in advance
1060 and we save much time not recomputing it. */
1063 remove_from_table (elt
, hash
)
1064 register struct table_elt
*elt
;
1070 /* Mark this element as removed. See cse_insn. */
1071 elt
->first_same_value
= 0;
1073 /* Remove the table element from its equivalence class. */
1076 register struct table_elt
*prev
= elt
->prev_same_value
;
1077 register struct table_elt
*next
= elt
->next_same_value
;
1079 if (next
) next
->prev_same_value
= prev
;
1082 prev
->next_same_value
= next
;
1085 register struct table_elt
*newfirst
= next
;
1088 next
->first_same_value
= newfirst
;
1089 next
= next
->next_same_value
;
1094 /* Remove the table element from its hash bucket. */
1097 register struct table_elt
*prev
= elt
->prev_same_hash
;
1098 register struct table_elt
*next
= elt
->next_same_hash
;
1100 if (next
) next
->prev_same_hash
= prev
;
1103 prev
->next_same_hash
= next
;
1104 else if (table
[hash
] == elt
)
1108 /* This entry is not in the proper hash bucket. This can happen
1109 when two classes were merged by `merge_equiv_classes'. Search
1110 for the hash bucket that it heads. This happens only very
1111 rarely, so the cost is acceptable. */
1112 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1113 if (table
[hash
] == elt
)
1118 /* Remove the table element from its related-value circular chain. */
1120 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1122 register struct table_elt
*p
= elt
->related_value
;
1123 while (p
->related_value
!= elt
)
1124 p
= p
->related_value
;
1125 p
->related_value
= elt
->related_value
;
1126 if (p
->related_value
== p
)
1127 p
->related_value
= 0;
1133 /* Look up X in the hash table and return its table element,
1134 or 0 if X is not in the table.
1136 MODE is the machine-mode of X, or if X is an integer constant
1137 with VOIDmode then MODE is the mode with which X will be used.
1139 Here we are satisfied to find an expression whose tree structure
1142 static struct table_elt
*
1143 lookup (x
, hash
, mode
)
1146 enum machine_mode mode
;
1148 register struct table_elt
*p
;
1150 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1151 if (mode
== p
->mode
&& ((x
== p
->exp
&& GET_CODE (x
) == REG
)
1152 || exp_equiv_p (x
, p
->exp
, GET_CODE (x
) != REG
, 0)))
1158 /* Like `lookup' but don't care whether the table element uses invalid regs.
1159 Also ignore discrepancies in the machine mode of a register. */
1161 static struct table_elt
*
1162 lookup_for_remove (x
, hash
, mode
)
1165 enum machine_mode mode
;
1167 register struct table_elt
*p
;
1169 if (GET_CODE (x
) == REG
)
1171 int regno
= REGNO (x
);
1172 /* Don't check the machine mode when comparing registers;
1173 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1174 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1175 if (GET_CODE (p
->exp
) == REG
1176 && REGNO (p
->exp
) == regno
)
1181 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1182 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1189 /* Look for an expression equivalent to X and with code CODE.
1190 If one is found, return that expression. */
1193 lookup_as_function (x
, code
)
1197 register struct table_elt
*p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
,
1202 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1204 if (GET_CODE (p
->exp
) == code
1205 /* Make sure this is a valid entry in the table. */
1206 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1213 /* Insert X in the hash table, assuming HASH is its hash code
1214 and CLASSP is an element of the class it should go in
1215 (or 0 if a new class should be made).
1216 It is inserted at the proper position to keep the class in
1217 the order cheapest first.
1219 MODE is the machine-mode of X, or if X is an integer constant
1220 with VOIDmode then MODE is the mode with which X will be used.
1222 For elements of equal cheapness, the most recent one
1223 goes in front, except that the first element in the list
1224 remains first unless a cheaper element is added. The order of
1225 pseudo-registers does not matter, as canon_reg will be called to
1226 find the cheapest when a register is retrieved from the table.
1228 The in_memory field in the hash table element is set to 0.
1229 The caller must set it nonzero if appropriate.
1231 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1232 and if insert_regs returns a nonzero value
1233 you must then recompute its hash code before calling here.
1235 If necessary, update table showing constant values of quantities. */
1237 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1239 static struct table_elt
*
1240 insert (x
, classp
, hash
, mode
)
1242 register struct table_elt
*classp
;
1244 enum machine_mode mode
;
1246 register struct table_elt
*elt
;
1248 /* If X is a register and we haven't made a quantity for it,
1249 something is wrong. */
1250 if (GET_CODE (x
) == REG
&& ! REGNO_QTY_VALID_P (REGNO (x
)))
1253 /* If X is a hard register, show it is being put in the table. */
1254 if (GET_CODE (x
) == REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1256 int regno
= REGNO (x
);
1257 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1260 for (i
= regno
; i
< endregno
; i
++)
1261 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1265 /* Put an element for X into the right hash bucket. */
1267 elt
= get_element ();
1269 elt
->cost
= COST (x
);
1270 elt
->next_same_value
= 0;
1271 elt
->prev_same_value
= 0;
1272 elt
->next_same_hash
= table
[hash
];
1273 elt
->prev_same_hash
= 0;
1274 elt
->related_value
= 0;
1277 elt
->is_const
= (CONSTANT_P (x
)
1278 /* GNU C++ takes advantage of this for `this'
1279 (and other const values). */
1280 || (RTX_UNCHANGING_P (x
)
1281 && GET_CODE (x
) == REG
1282 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1283 || FIXED_BASE_PLUS_P (x
));
1286 table
[hash
]->prev_same_hash
= elt
;
1289 /* Put it into the proper value-class. */
1292 classp
= classp
->first_same_value
;
1293 if (CHEAPER (elt
, classp
))
1294 /* Insert at the head of the class */
1296 register struct table_elt
*p
;
1297 elt
->next_same_value
= classp
;
1298 classp
->prev_same_value
= elt
;
1299 elt
->first_same_value
= elt
;
1301 for (p
= classp
; p
; p
= p
->next_same_value
)
1302 p
->first_same_value
= elt
;
1306 /* Insert not at head of the class. */
1307 /* Put it after the last element cheaper than X. */
1308 register struct table_elt
*p
, *next
;
1309 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1311 /* Put it after P and before NEXT. */
1312 elt
->next_same_value
= next
;
1314 next
->prev_same_value
= elt
;
1315 elt
->prev_same_value
= p
;
1316 p
->next_same_value
= elt
;
1317 elt
->first_same_value
= classp
;
1321 elt
->first_same_value
= elt
;
1323 /* If this is a constant being set equivalent to a register or a register
1324 being set equivalent to a constant, note the constant equivalence.
1326 If this is a constant, it cannot be equivalent to a different constant,
1327 and a constant is the only thing that can be cheaper than a register. So
1328 we know the register is the head of the class (before the constant was
1331 If this is a register that is not already known equivalent to a
1332 constant, we must check the entire class.
1334 If this is a register that is already known equivalent to an insn,
1335 update `qty_const_insn' to show that `this_insn' is the latest
1336 insn making that quantity equivalent to the constant. */
1338 if (elt
->is_const
&& classp
&& GET_CODE (classp
->exp
) == REG
)
1340 qty_const
[reg_qty
[REGNO (classp
->exp
)]]
1341 = gen_lowpart_if_possible (qty_mode
[reg_qty
[REGNO (classp
->exp
)]], x
);
1342 qty_const_insn
[reg_qty
[REGNO (classp
->exp
)]] = this_insn
;
1345 else if (GET_CODE (x
) == REG
&& classp
&& ! qty_const
[reg_qty
[REGNO (x
)]])
1347 register struct table_elt
*p
;
1349 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1353 qty_const
[reg_qty
[REGNO (x
)]]
1354 = gen_lowpart_if_possible (GET_MODE (x
), p
->exp
);
1355 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1361 else if (GET_CODE (x
) == REG
&& qty_const
[reg_qty
[REGNO (x
)]]
1362 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]])
1363 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1365 /* If this is a constant with symbolic value,
1366 and it has a term with an explicit integer value,
1367 link it up with related expressions. */
1368 if (GET_CODE (x
) == CONST
)
1370 rtx subexp
= get_related_value (x
);
1372 struct table_elt
*subelt
, *subelt_prev
;
1376 /* Get the integer-free subexpression in the hash table. */
1377 subhash
= safe_hash (subexp
, mode
) % NBUCKETS
;
1378 subelt
= lookup (subexp
, subhash
, mode
);
1380 subelt
= insert (subexp
, NULL_PTR
, subhash
, mode
);
1381 /* Initialize SUBELT's circular chain if it has none. */
1382 if (subelt
->related_value
== 0)
1383 subelt
->related_value
= subelt
;
1384 /* Find the element in the circular chain that precedes SUBELT. */
1385 subelt_prev
= subelt
;
1386 while (subelt_prev
->related_value
!= subelt
)
1387 subelt_prev
= subelt_prev
->related_value
;
1388 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1389 This way the element that follows SUBELT is the oldest one. */
1390 elt
->related_value
= subelt_prev
->related_value
;
1391 subelt_prev
->related_value
= elt
;
1398 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1399 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1400 the two classes equivalent.
1402 CLASS1 will be the surviving class; CLASS2 should not be used after this
1405 Any invalid entries in CLASS2 will not be copied. */
1408 merge_equiv_classes (class1
, class2
)
1409 struct table_elt
*class1
, *class2
;
1411 struct table_elt
*elt
, *next
, *new;
1413 /* Ensure we start with the head of the classes. */
1414 class1
= class1
->first_same_value
;
1415 class2
= class2
->first_same_value
;
1417 /* If they were already equal, forget it. */
1418 if (class1
== class2
)
1421 for (elt
= class2
; elt
; elt
= next
)
1425 enum machine_mode mode
= elt
->mode
;
1427 next
= elt
->next_same_value
;
1429 /* Remove old entry, make a new one in CLASS1's class.
1430 Don't do this for invalid entries as we cannot find their
1431 hash code (it also isn't necessary). */
1432 if (GET_CODE (exp
) == REG
|| exp_equiv_p (exp
, exp
, 1, 0))
1434 hash_arg_in_memory
= 0;
1435 hash_arg_in_struct
= 0;
1436 hash
= HASH (exp
, mode
);
1438 if (GET_CODE (exp
) == REG
)
1439 delete_reg_equiv (REGNO (exp
));
1441 remove_from_table (elt
, hash
);
1443 if (insert_regs (exp
, class1
, 0))
1444 hash
= HASH (exp
, mode
);
1445 new = insert (exp
, class1
, hash
, mode
);
1446 new->in_memory
= hash_arg_in_memory
;
1447 new->in_struct
= hash_arg_in_struct
;
1452 /* Remove from the hash table, or mark as invalid,
1453 all expressions whose values could be altered by storing in X.
1454 X is a register, a subreg, or a memory reference with nonvarying address
1455 (because, when a memory reference with a varying address is stored in,
1456 all memory references are removed by invalidate_memory
1457 so specific invalidation is superfluous).
1459 A nonvarying address may be just a register or just
1460 a symbol reference, or it may be either of those plus
1461 a numeric offset. */
1468 register struct table_elt
*p
;
1470 HOST_WIDE_INT start
, end
;
1472 /* If X is a register, dependencies on its contents
1473 are recorded through the qty number mechanism.
1474 Just change the qty number of the register,
1475 mark it as invalid for expressions that refer to it,
1476 and remove it itself. */
1478 if (GET_CODE (x
) == REG
)
1480 register int regno
= REGNO (x
);
1481 register int hash
= HASH (x
, GET_MODE (x
));
1483 /* Remove REGNO from any quantity list it might be on and indicate
1484 that it's value might have changed. If it is a pseudo, remove its
1485 entry from the hash table.
1487 For a hard register, we do the first two actions above for any
1488 additional hard registers corresponding to X. Then, if any of these
1489 registers are in the table, we must remove any REG entries that
1490 overlap these registers. */
1492 delete_reg_equiv (regno
);
1495 if (regno
>= FIRST_PSEUDO_REGISTER
)
1496 remove_from_table (lookup_for_remove (x
, hash
, GET_MODE (x
)), hash
);
1499 int in_table
= TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1500 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1501 int tregno
, tendregno
;
1502 register struct table_elt
*p
, *next
;
1504 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1506 for (i
= regno
+ 1; i
< endregno
; i
++)
1508 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, i
);
1509 CLEAR_HARD_REG_BIT (hard_regs_in_table
, i
);
1510 delete_reg_equiv (i
);
1515 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1516 for (p
= table
[hash
]; p
; p
= next
)
1518 next
= p
->next_same_hash
;
1520 if (GET_CODE (p
->exp
) != REG
1521 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1524 tregno
= REGNO (p
->exp
);
1526 = tregno
+ HARD_REGNO_NREGS (tregno
, GET_MODE (p
->exp
));
1527 if (tendregno
> regno
&& tregno
< endregno
)
1528 remove_from_table (p
, hash
);
1535 if (GET_CODE (x
) == SUBREG
)
1537 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1539 invalidate (SUBREG_REG (x
));
1543 /* X is not a register; it must be a memory reference with
1544 a nonvarying address. Remove all hash table elements
1545 that refer to overlapping pieces of memory. */
1547 if (GET_CODE (x
) != MEM
)
1550 set_nonvarying_address_components (XEXP (x
, 0), GET_MODE_SIZE (GET_MODE (x
)),
1551 &base
, &start
, &end
);
1553 for (i
= 0; i
< NBUCKETS
; i
++)
1555 register struct table_elt
*next
;
1556 for (p
= table
[i
]; p
; p
= next
)
1558 next
= p
->next_same_hash
;
1559 if (refers_to_mem_p (p
->exp
, base
, start
, end
))
1560 remove_from_table (p
, i
);
1565 /* Remove all expressions that refer to register REGNO,
1566 since they are already invalid, and we are about to
1567 mark that register valid again and don't want the old
1568 expressions to reappear as valid. */
1571 remove_invalid_refs (regno
)
1575 register struct table_elt
*p
, *next
;
1577 for (i
= 0; i
< NBUCKETS
; i
++)
1578 for (p
= table
[i
]; p
; p
= next
)
1580 next
= p
->next_same_hash
;
1581 if (GET_CODE (p
->exp
) != REG
1582 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, NULL_PTR
))
1583 remove_from_table (p
, i
);
1587 /* Recompute the hash codes of any valid entries in the hash table that
1588 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1590 This is called when we make a jump equivalence. */
1593 rehash_using_reg (x
)
1597 struct table_elt
*p
, *next
;
1600 if (GET_CODE (x
) == SUBREG
)
1603 /* If X is not a register or if the register is known not to be in any
1604 valid entries in the table, we have no work to do. */
1606 if (GET_CODE (x
) != REG
1607 || reg_in_table
[REGNO (x
)] < 0
1608 || reg_in_table
[REGNO (x
)] != reg_tick
[REGNO (x
)])
1611 /* Scan all hash chains looking for valid entries that mention X.
1612 If we find one and it is in the wrong hash chain, move it. We can skip
1613 objects that are registers, since they are handled specially. */
1615 for (i
= 0; i
< NBUCKETS
; i
++)
1616 for (p
= table
[i
]; p
; p
= next
)
1618 next
= p
->next_same_hash
;
1619 if (GET_CODE (p
->exp
) != REG
&& reg_mentioned_p (x
, p
->exp
)
1620 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
1621 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) % NBUCKETS
))
1623 if (p
->next_same_hash
)
1624 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1626 if (p
->prev_same_hash
)
1627 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1629 table
[i
] = p
->next_same_hash
;
1631 p
->next_same_hash
= table
[hash
];
1632 p
->prev_same_hash
= 0;
1634 table
[hash
]->prev_same_hash
= p
;
1640 /* Remove from the hash table all expressions that reference memory,
1641 or some of them as specified by *WRITES. */
1644 invalidate_memory (writes
)
1645 struct write_data
*writes
;
1648 register struct table_elt
*p
, *next
;
1649 int all
= writes
->all
;
1650 int nonscalar
= writes
->nonscalar
;
1652 for (i
= 0; i
< NBUCKETS
; i
++)
1653 for (p
= table
[i
]; p
; p
= next
)
1655 next
= p
->next_same_hash
;
1658 || (nonscalar
&& p
->in_struct
)
1659 || cse_rtx_addr_varies_p (p
->exp
)))
1660 remove_from_table (p
, i
);
1664 /* Remove from the hash table any expression that is a call-clobbered
1665 register. Also update their TICK values. */
1668 invalidate_for_call ()
1670 int regno
, endregno
;
1673 struct table_elt
*p
, *next
;
1676 /* Go through all the hard registers. For each that is clobbered in
1677 a CALL_INSN, remove the register from quantity chains and update
1678 reg_tick if defined. Also see if any of these registers is currently
1681 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1682 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1684 delete_reg_equiv (regno
);
1685 if (reg_tick
[regno
] >= 0)
1688 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1691 /* In the case where we have no call-clobbered hard registers in the
1692 table, we are done. Otherwise, scan the table and remove any
1693 entry that overlaps a call-clobbered register. */
1696 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1697 for (p
= table
[hash
]; p
; p
= next
)
1699 next
= p
->next_same_hash
;
1701 if (GET_CODE (p
->exp
) != REG
1702 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1705 regno
= REGNO (p
->exp
);
1706 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (p
->exp
));
1708 for (i
= regno
; i
< endregno
; i
++)
1709 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1711 remove_from_table (p
, hash
);
1717 /* Given an expression X of type CONST,
1718 and ELT which is its table entry (or 0 if it
1719 is not in the hash table),
1720 return an alternate expression for X as a register plus integer.
1721 If none can be found, return 0. */
1724 use_related_value (x
, elt
)
1726 struct table_elt
*elt
;
1728 register struct table_elt
*relt
= 0;
1729 register struct table_elt
*p
, *q
;
1730 HOST_WIDE_INT offset
;
1732 /* First, is there anything related known?
1733 If we have a table element, we can tell from that.
1734 Otherwise, must look it up. */
1736 if (elt
!= 0 && elt
->related_value
!= 0)
1738 else if (elt
== 0 && GET_CODE (x
) == CONST
)
1740 rtx subexp
= get_related_value (x
);
1742 relt
= lookup (subexp
,
1743 safe_hash (subexp
, GET_MODE (subexp
)) % NBUCKETS
,
1750 /* Search all related table entries for one that has an
1751 equivalent register. */
1756 /* This loop is strange in that it is executed in two different cases.
1757 The first is when X is already in the table. Then it is searching
1758 the RELATED_VALUE list of X's class (RELT). The second case is when
1759 X is not in the table. Then RELT points to a class for the related
1762 Ensure that, whatever case we are in, that we ignore classes that have
1763 the same value as X. */
1765 if (rtx_equal_p (x
, p
->exp
))
1768 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
1769 if (GET_CODE (q
->exp
) == REG
)
1775 p
= p
->related_value
;
1777 /* We went all the way around, so there is nothing to be found.
1778 Alternatively, perhaps RELT was in the table for some other reason
1779 and it has no related values recorded. */
1780 if (p
== relt
|| p
== 0)
1787 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
1788 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1789 return plus_constant (q
->exp
, offset
);
1792 /* Hash an rtx. We are careful to make sure the value is never negative.
1793 Equivalent registers hash identically.
1794 MODE is used in hashing for CONST_INTs only;
1795 otherwise the mode of X is used.
1797 Store 1 in do_not_record if any subexpression is volatile.
1799 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1800 which does not have the RTX_UNCHANGING_P bit set.
1801 In this case, also store 1 in hash_arg_in_struct
1802 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1804 Note that cse_insn knows that the hash code of a MEM expression
1805 is just (int) MEM plus the hash code of the address. */
1808 canon_hash (x
, mode
)
1810 enum machine_mode mode
;
1813 register int hash
= 0;
1814 register enum rtx_code code
;
1817 /* repeat is used to turn tail-recursion into iteration. */
1822 code
= GET_CODE (x
);
1827 register int regno
= REGNO (x
);
1829 /* On some machines, we can't record any non-fixed hard register,
1830 because extending its life will cause reload problems. We
1831 consider ap, fp, and sp to be fixed for this purpose.
1832 On all machines, we can't record any global registers. */
1834 if (regno
< FIRST_PSEUDO_REGISTER
1835 && (global_regs
[regno
]
1836 #ifdef SMALL_REGISTER_CLASSES
1837 || (! fixed_regs
[regno
]
1838 && regno
!= FRAME_POINTER_REGNUM
1839 && regno
!= ARG_POINTER_REGNUM
1840 && regno
!= STACK_POINTER_REGNUM
)
1847 return hash
+ ((int) REG
<< 7) + reg_qty
[regno
];
1851 hash
+= ((int) mode
+ ((int) CONST_INT
<< 7)
1852 + INTVAL (x
) + (INTVAL (x
) >> HASHBITS
));
1853 return ((1 << HASHBITS
) - 1) & hash
;
1856 /* This is like the general case, except that it only counts
1857 the integers representing the constant. */
1858 hash
+= (int) code
+ (int) GET_MODE (x
);
1861 for (i
= 2; i
< GET_RTX_LENGTH (CONST_DOUBLE
); i
++)
1863 int tem
= XINT (x
, i
);
1864 hash
+= ((1 << HASHBITS
) - 1) & (tem
+ (tem
>> HASHBITS
));
1869 /* Assume there is only one rtx object for any given label. */
1871 /* Use `and' to ensure a positive number. */
1872 return (hash
+ ((HOST_WIDE_INT
) LABEL_REF
<< 7)
1873 + ((HOST_WIDE_INT
) XEXP (x
, 0) & ((1 << HASHBITS
) - 1)));
1876 return (hash
+ ((HOST_WIDE_INT
) SYMBOL_REF
<< 7)
1877 + ((HOST_WIDE_INT
) XEXP (x
, 0) & ((1 << HASHBITS
) - 1)));
1880 if (MEM_VOLATILE_P (x
))
1885 if (! RTX_UNCHANGING_P (x
))
1887 hash_arg_in_memory
= 1;
1888 if (MEM_IN_STRUCT_P (x
)) hash_arg_in_struct
= 1;
1890 /* Now that we have already found this special case,
1891 might as well speed it up as much as possible. */
1903 case UNSPEC_VOLATILE
:
1908 if (MEM_VOLATILE_P (x
))
1915 i
= GET_RTX_LENGTH (code
) - 1;
1916 hash
+= (int) code
+ (int) GET_MODE (x
);
1917 fmt
= GET_RTX_FORMAT (code
);
1922 rtx tem
= XEXP (x
, i
);
1925 /* If the operand is a REG that is equivalent to a constant, hash
1926 as if we were hashing the constant, since we will be comparing
1928 if (tem
!= 0 && GET_CODE (tem
) == REG
1929 && REGNO_QTY_VALID_P (REGNO (tem
))
1930 && qty_mode
[reg_qty
[REGNO (tem
)]] == GET_MODE (tem
)
1931 && (tem1
= qty_const
[reg_qty
[REGNO (tem
)]]) != 0
1932 && CONSTANT_P (tem1
))
1935 /* If we are about to do the last recursive call
1936 needed at this level, change it into iteration.
1937 This function is called enough to be worth it. */
1943 hash
+= canon_hash (tem
, 0);
1945 else if (fmt
[i
] == 'E')
1946 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1947 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
1948 else if (fmt
[i
] == 's')
1950 register char *p
= XSTR (x
, i
);
1954 register int tem
= *p
++;
1955 hash
+= ((1 << HASHBITS
) - 1) & (tem
+ (tem
>> HASHBITS
));
1958 else if (fmt
[i
] == 'i')
1960 register int tem
= XINT (x
, i
);
1961 hash
+= ((1 << HASHBITS
) - 1) & (tem
+ (tem
>> HASHBITS
));
1969 /* Like canon_hash but with no side effects. */
1974 enum machine_mode mode
;
1976 int save_do_not_record
= do_not_record
;
1977 int save_hash_arg_in_memory
= hash_arg_in_memory
;
1978 int save_hash_arg_in_struct
= hash_arg_in_struct
;
1979 int hash
= canon_hash (x
, mode
);
1980 hash_arg_in_memory
= save_hash_arg_in_memory
;
1981 hash_arg_in_struct
= save_hash_arg_in_struct
;
1982 do_not_record
= save_do_not_record
;
1986 /* Return 1 iff X and Y would canonicalize into the same thing,
1987 without actually constructing the canonicalization of either one.
1988 If VALIDATE is nonzero,
1989 we assume X is an expression being processed from the rtl
1990 and Y was found in the hash table. We check register refs
1991 in Y for being marked as valid.
1993 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
1994 that is known to be in the register. Ordinarily, we don't allow them
1995 to match, because letting them match would cause unpredictable results
1996 in all the places that search a hash table chain for an equivalent
1997 for a given value. A possible equivalent that has different structure
1998 has its hash code computed from different data. Whether the hash code
1999 is the same as that of the the given value is pure luck. */
2002 exp_equiv_p (x
, y
, validate
, equal_values
)
2008 register enum rtx_code code
;
2011 /* Note: it is incorrect to assume an expression is equivalent to itself
2012 if VALIDATE is nonzero. */
2013 if (x
== y
&& !validate
)
2015 if (x
== 0 || y
== 0)
2018 code
= GET_CODE (x
);
2019 if (code
!= GET_CODE (y
))
2024 /* If X is a constant and Y is a register or vice versa, they may be
2025 equivalent. We only have to validate if Y is a register. */
2026 if (CONSTANT_P (x
) && GET_CODE (y
) == REG
2027 && REGNO_QTY_VALID_P (REGNO (y
))
2028 && GET_MODE (y
) == qty_mode
[reg_qty
[REGNO (y
)]]
2029 && rtx_equal_p (x
, qty_const
[reg_qty
[REGNO (y
)]])
2030 && (! validate
|| reg_in_table
[REGNO (y
)] == reg_tick
[REGNO (y
)]))
2033 if (CONSTANT_P (y
) && code
== REG
2034 && REGNO_QTY_VALID_P (REGNO (x
))
2035 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
2036 && rtx_equal_p (y
, qty_const
[reg_qty
[REGNO (x
)]]))
2042 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2043 if (GET_MODE (x
) != GET_MODE (y
))
2053 return INTVAL (x
) == INTVAL (y
);
2057 return XEXP (x
, 0) == XEXP (y
, 0);
2061 int regno
= REGNO (y
);
2063 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2064 : HARD_REGNO_NREGS (regno
, GET_MODE (y
)));
2067 /* If the quantities are not the same, the expressions are not
2068 equivalent. If there are and we are not to validate, they
2069 are equivalent. Otherwise, ensure all regs are up-to-date. */
2071 if (reg_qty
[REGNO (x
)] != reg_qty
[regno
])
2077 for (i
= regno
; i
< endregno
; i
++)
2078 if (reg_in_table
[i
] != reg_tick
[i
])
2084 /* For commutative operations, check both orders. */
2092 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2093 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2094 validate
, equal_values
))
2095 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2096 validate
, equal_values
)
2097 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2098 validate
, equal_values
)));
2101 /* Compare the elements. If any pair of corresponding elements
2102 fail to match, return 0 for the whole things. */
2104 fmt
= GET_RTX_FORMAT (code
);
2105 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2110 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2115 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2117 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2118 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2119 validate
, equal_values
))
2124 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2129 if (XINT (x
, i
) != XINT (y
, i
))
2134 if (XWINT (x
, i
) != XWINT (y
, i
))
2149 /* Return 1 iff any subexpression of X matches Y.
2150 Here we do not require that X or Y be valid (for registers referred to)
2151 for being in the hash table. */
2158 register enum rtx_code code
;
2164 if (x
== 0 || y
== 0)
2167 code
= GET_CODE (x
);
2168 /* If X as a whole has the same code as Y, they may match.
2170 if (code
== GET_CODE (y
))
2172 if (exp_equiv_p (x
, y
, 0, 1))
2176 /* X does not match, so try its subexpressions. */
2178 fmt
= GET_RTX_FORMAT (code
);
2179 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2188 if (refers_to_p (XEXP (x
, i
), y
))
2191 else if (fmt
[i
] == 'E')
2194 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2195 if (refers_to_p (XVECEXP (x
, i
, j
), y
))
2202 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2203 set PBASE, PSTART, and PEND which correspond to the base of the address,
2204 the starting offset, and ending offset respectively.
2206 ADDR is known to be a nonvarying address.
2208 cse_address_varies_p returns zero for nonvarying addresses. */
2211 set_nonvarying_address_components (addr
, size
, pbase
, pstart
, pend
)
2215 HOST_WIDE_INT
*pstart
, *pend
;
2224 /* Registers with nonvarying addresses usually have constant equivalents;
2225 but the frame pointer register is also possible. */
2226 if (GET_CODE (base
) == REG
2228 && REGNO_QTY_VALID_P (REGNO (base
))
2229 && qty_mode
[reg_qty
[REGNO (base
)]] == GET_MODE (base
)
2230 && qty_const
[reg_qty
[REGNO (base
)]] != 0)
2231 base
= qty_const
[reg_qty
[REGNO (base
)]];
2232 else if (GET_CODE (base
) == PLUS
2233 && GET_CODE (XEXP (base
, 1)) == CONST_INT
2234 && GET_CODE (XEXP (base
, 0)) == REG
2236 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
2237 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
2238 == GET_MODE (XEXP (base
, 0)))
2239 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]])
2241 start
= INTVAL (XEXP (base
, 1));
2242 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
2245 /* By definition, operand1 of a LO_SUM is the associated constant
2246 address. Use the associated constant address as the base instead. */
2247 if (GET_CODE (base
) == LO_SUM
)
2248 base
= XEXP (base
, 1);
2250 /* Strip off CONST. */
2251 if (GET_CODE (base
) == CONST
)
2252 base
= XEXP (base
, 0);
2254 if (GET_CODE (base
) == PLUS
2255 && GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2257 start
+= INTVAL (XEXP (base
, 1));
2258 base
= XEXP (base
, 0);
2263 /* Set the return values. */
2269 /* Return 1 iff any subexpression of X refers to memory
2270 at an address of BASE plus some offset
2271 such that any of the bytes' offsets fall between START (inclusive)
2272 and END (exclusive).
2274 The value is undefined if X is a varying address (as determined by
2275 cse_rtx_addr_varies_p). This function is not used in such cases.
2277 When used in the cse pass, `qty_const' is nonzero, and it is used
2278 to treat an address that is a register with a known constant value
2279 as if it were that constant value.
2280 In the loop pass, `qty_const' is zero, so this is not done. */
2283 refers_to_mem_p (x
, base
, start
, end
)
2285 HOST_WIDE_INT start
, end
;
2287 register HOST_WIDE_INT i
;
2288 register enum rtx_code code
;
2291 if (GET_CODE (base
) == CONST_INT
)
2293 start
+= INTVAL (base
);
2294 end
+= INTVAL (base
);
2302 code
= GET_CODE (x
);
2305 register rtx addr
= XEXP (x
, 0); /* Get the address. */
2307 HOST_WIDE_INT mystart
, myend
;
2309 set_nonvarying_address_components (addr
, GET_MODE_SIZE (GET_MODE (x
)),
2310 &mybase
, &mystart
, &myend
);
2313 /* refers_to_mem_p is never called with varying addresses.
2314 If the base addresses are not equal, there is no chance
2315 of the memory addresses conflicting. */
2316 if (! rtx_equal_p (mybase
, base
))
2319 return myend
> start
&& mystart
< end
;
2322 /* X does not match, so try its subexpressions. */
2324 fmt
= GET_RTX_FORMAT (code
);
2325 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2334 if (refers_to_mem_p (XEXP (x
, i
), base
, start
, end
))
2337 else if (fmt
[i
] == 'E')
2340 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2341 if (refers_to_mem_p (XVECEXP (x
, i
, j
), base
, start
, end
))
2348 /* Nonzero if X refers to memory at a varying address;
2349 except that a register which has at the moment a known constant value
2350 isn't considered variable. */
2353 cse_rtx_addr_varies_p (x
)
2356 /* We need not check for X and the equivalence class being of the same
2357 mode because if X is equivalent to a constant in some mode, it
2358 doesn't vary in any mode. */
2360 if (GET_CODE (x
) == MEM
2361 && GET_CODE (XEXP (x
, 0)) == REG
2362 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2363 && GET_MODE (XEXP (x
, 0)) == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]]
2364 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]] != 0)
2367 if (GET_CODE (x
) == MEM
2368 && GET_CODE (XEXP (x
, 0)) == PLUS
2369 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
2370 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == REG
2371 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x
, 0), 0)))
2372 && (GET_MODE (XEXP (XEXP (x
, 0), 0))
2373 == qty_mode
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2374 && qty_const
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2377 return rtx_addr_varies_p (x
);
2380 /* Canonicalize an expression:
2381 replace each register reference inside it
2382 with the "oldest" equivalent register.
2384 If INSN is non-zero and we are replacing a pseudo with a hard register
2385 or vice versa, validate_change is used to ensure that INSN remains valid
2386 after we make our substitution. The calls are made with IN_GROUP non-zero
2387 so apply_change_group must be called upon the outermost return from this
2388 function (unless INSN is zero). The result of apply_change_group can
2389 generally be discarded since the changes we are making are optional. */
2397 register enum rtx_code code
;
2403 code
= GET_CODE (x
);
2421 /* Never replace a hard reg, because hard regs can appear
2422 in more than one machine mode, and we must preserve the mode
2423 of each occurrence. Also, some hard regs appear in
2424 MEMs that are shared and mustn't be altered. Don't try to
2425 replace any reg that maps to a reg of class NO_REGS. */
2426 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2427 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2430 first
= qty_first_reg
[reg_qty
[REGNO (x
)]];
2431 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2432 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2433 : gen_rtx (REG
, qty_mode
[reg_qty
[REGNO (x
)]], first
));
2437 fmt
= GET_RTX_FORMAT (code
);
2438 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2444 rtx
new = canon_reg (XEXP (x
, i
), insn
);
2446 /* If replacing pseudo with hard reg or vice versa, ensure the
2447 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2448 if (insn
!= 0 && new != 0
2449 && GET_CODE (new) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
2450 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2451 != (REGNO (XEXP (x
, i
)) < FIRST_PSEUDO_REGISTER
))
2452 || insn_n_dups
[recog_memoized (insn
)] > 0))
2453 validate_change (insn
, &XEXP (x
, i
), new, 1);
2457 else if (fmt
[i
] == 'E')
2458 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2459 XVECEXP (x
, i
, j
) = canon_reg (XVECEXP (x
, i
, j
), insn
);
2465 /* LOC is a location with INSN that is an operand address (the contents of
2466 a MEM). Find the best equivalent address to use that is valid for this
2469 On most CISC machines, complicated address modes are costly, and rtx_cost
2470 is a good approximation for that cost. However, most RISC machines have
2471 only a few (usually only one) memory reference formats. If an address is
2472 valid at all, it is often just as cheap as any other address. Hence, for
2473 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2474 costs of various addresses. For two addresses of equal cost, choose the one
2475 with the highest `rtx_cost' value as that has the potential of eliminating
2476 the most insns. For equal costs, we choose the first in the equivalence
2477 class. Note that we ignore the fact that pseudo registers are cheaper
2478 than hard registers here because we would also prefer the pseudo registers.
2482 find_best_addr (insn
, loc
)
2486 struct table_elt
*elt
, *p
;
2489 int found_better
= 1;
2490 int save_do_not_record
= do_not_record
;
2491 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2492 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2497 /* Do not try to replace constant addresses or addresses of local and
2498 argument slots. These MEM expressions are made only once and inserted
2499 in many instructions, as well as being used to control symbol table
2500 output. It is not safe to clobber them.
2502 There are some uncommon cases where the address is already in a register
2503 for some reason, but we cannot take advantage of that because we have
2504 no easy way to unshare the MEM. In addition, looking up all stack
2505 addresses is costly. */
2506 if ((GET_CODE (addr
) == PLUS
2507 && GET_CODE (XEXP (addr
, 0)) == REG
2508 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2509 && (regno
= REGNO (XEXP (addr
, 0)),
2510 regno
== FRAME_POINTER_REGNUM
|| regno
== ARG_POINTER_REGNUM
))
2511 || (GET_CODE (addr
) == REG
2512 && (regno
= REGNO (addr
),
2513 regno
== FRAME_POINTER_REGNUM
|| regno
== ARG_POINTER_REGNUM
))
2514 || CONSTANT_ADDRESS_P (addr
))
2517 /* If this address is not simply a register, try to fold it. This will
2518 sometimes simplify the expression. Many simplifications
2519 will not be valid, but some, usually applying the associative rule, will
2520 be valid and produce better code. */
2521 if (GET_CODE (addr
) != REG
2522 && validate_change (insn
, loc
, fold_rtx (addr
, insn
), 0))
2525 /* If this address is not in the hash table, we can't look for equivalences
2526 of the whole address. Also, ignore if volatile. */
2529 hash_code
= HASH (addr
, Pmode
);
2530 addr_volatile
= do_not_record
;
2531 do_not_record
= save_do_not_record
;
2532 hash_arg_in_memory
= save_hash_arg_in_memory
;
2533 hash_arg_in_struct
= save_hash_arg_in_struct
;
2538 elt
= lookup (addr
, hash_code
, Pmode
);
2540 #ifndef ADDRESS_COST
2543 our_cost
= elt
->cost
;
2545 /* Find the lowest cost below ours that works. */
2546 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
2547 if (elt
->cost
< our_cost
2548 && (GET_CODE (elt
->exp
) == REG
2549 || exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
2550 && validate_change (insn
, loc
,
2551 canon_reg (copy_rtx (elt
->exp
), NULL_RTX
), 0))
2558 /* We need to find the best (under the criteria documented above) entry
2559 in the class that is valid. We use the `flag' field to indicate
2560 choices that were invalid and iterate until we can't find a better
2561 one that hasn't already been tried. */
2563 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2566 while (found_better
)
2568 int best_addr_cost
= ADDRESS_COST (*loc
);
2569 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2570 struct table_elt
*best_elt
= elt
;
2573 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2575 && (GET_CODE (p
->exp
) == REG
2576 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2577 && (ADDRESS_COST (p
->exp
) < best_addr_cost
2578 || (ADDRESS_COST (p
->exp
) == best_addr_cost
2579 && (p
->cost
+ 1) >> 1 > best_rtx_cost
)))
2582 best_addr_cost
= ADDRESS_COST (p
->exp
);
2583 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2589 if (validate_change (insn
, loc
,
2590 canon_reg (copy_rtx (best_elt
->exp
),
2599 /* If the address is a binary operation with the first operand a register
2600 and the second a constant, do the same as above, but looking for
2601 equivalences of the register. Then try to simplify before checking for
2602 the best address to use. This catches a few cases: First is when we
2603 have REG+const and the register is another REG+const. We can often merge
2604 the constants and eliminate one insn and one register. It may also be
2605 that a machine has a cheap REG+REG+const. Finally, this improves the
2606 code on the Alpha for unaligned byte stores. */
2608 if (flag_expensive_optimizations
2609 && (GET_RTX_CLASS (GET_CODE (*loc
)) == '2'
2610 || GET_RTX_CLASS (GET_CODE (*loc
)) == 'c')
2611 && GET_CODE (XEXP (*loc
, 0)) == REG
2612 && GET_CODE (XEXP (*loc
, 1)) == CONST_INT
)
2614 rtx c
= XEXP (*loc
, 1);
2617 hash_code
= HASH (XEXP (*loc
, 0), Pmode
);
2618 do_not_record
= save_do_not_record
;
2619 hash_arg_in_memory
= save_hash_arg_in_memory
;
2620 hash_arg_in_struct
= save_hash_arg_in_struct
;
2622 elt
= lookup (XEXP (*loc
, 0), hash_code
, Pmode
);
2626 /* We need to find the best (under the criteria documented above) entry
2627 in the class that is valid. We use the `flag' field to indicate
2628 choices that were invalid and iterate until we can't find a better
2629 one that hasn't already been tried. */
2631 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2634 while (found_better
)
2636 int best_addr_cost
= ADDRESS_COST (*loc
);
2637 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2638 struct table_elt
*best_elt
= elt
;
2639 rtx best_rtx
= *loc
;
2642 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2644 && (GET_CODE (p
->exp
) == REG
2645 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0)))
2647 rtx
new = cse_gen_binary (GET_CODE (*loc
), Pmode
, p
->exp
, c
);
2649 if ((ADDRESS_COST (new) < best_addr_cost
2650 || (ADDRESS_COST (new) == best_addr_cost
2651 && (COST (new) + 1) >> 1 > best_rtx_cost
)))
2654 best_addr_cost
= ADDRESS_COST (new);
2655 best_rtx_cost
= (COST (new) + 1) >> 1;
2663 if (validate_change (insn
, loc
,
2664 canon_reg (copy_rtx (best_rtx
),
2675 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2676 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2677 what values are being compared.
2679 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2680 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2681 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2682 compared to produce cc0.
2684 The return value is the comparison operator and is either the code of
2685 A or the code corresponding to the inverse of the comparison. */
2687 static enum rtx_code
2688 find_comparison_args (code
, parg1
, parg2
, pmode1
, pmode2
)
2691 enum machine_mode
*pmode1
, *pmode2
;
2695 arg1
= *parg1
, arg2
= *parg2
;
2697 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2699 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2701 /* Set non-zero when we find something of interest. */
2703 int reverse_code
= 0;
2704 struct table_elt
*p
= 0;
2706 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2707 On machines with CC0, this is the only case that can occur, since
2708 fold_rtx will return the COMPARE or item being compared with zero
2711 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2714 /* If ARG1 is a comparison operator and CODE is testing for
2715 STORE_FLAG_VALUE, get the inner arguments. */
2717 else if (GET_RTX_CLASS (GET_CODE (arg1
)) == '<')
2720 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2721 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2722 #ifdef FLOAT_STORE_FLAG_VALUE
2723 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2724 && FLOAT_STORE_FLAG_VALUE
< 0)
2729 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2730 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2731 #ifdef FLOAT_STORE_FLAG_VALUE
2732 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2733 && FLOAT_STORE_FLAG_VALUE
< 0)
2736 x
= arg1
, reverse_code
= 1;
2739 /* ??? We could also check for
2741 (ne (and (eq (...) (const_int 1))) (const_int 0))
2743 and related forms, but let's wait until we see them occurring. */
2746 /* Look up ARG1 in the hash table and see if it has an equivalence
2747 that lets us see what is being compared. */
2748 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) % NBUCKETS
,
2750 if (p
) p
= p
->first_same_value
;
2752 for (; p
; p
= p
->next_same_value
)
2754 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2756 /* If the entry isn't valid, skip it. */
2757 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2760 if (GET_CODE (p
->exp
) == COMPARE
2761 /* Another possibility is that this machine has a compare insn
2762 that includes the comparison code. In that case, ARG1 would
2763 be equivalent to a comparison operation that would set ARG1 to
2764 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2765 ORIG_CODE is the actual comparison being done; if it is an EQ,
2766 we must reverse ORIG_CODE. On machine with a negative value
2767 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2770 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2771 && (GET_MODE_BITSIZE (inner_mode
)
2772 <= HOST_BITS_PER_WIDE_INT
)
2773 && (STORE_FLAG_VALUE
2774 & ((HOST_WIDE_INT
) 1
2775 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2776 #ifdef FLOAT_STORE_FLAG_VALUE
2778 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2779 && FLOAT_STORE_FLAG_VALUE
< 0)
2782 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<'))
2787 else if ((code
== EQ
2789 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2790 && (GET_MODE_BITSIZE (inner_mode
)
2791 <= HOST_BITS_PER_WIDE_INT
)
2792 && (STORE_FLAG_VALUE
2793 & ((HOST_WIDE_INT
) 1
2794 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2795 #ifdef FLOAT_STORE_FLAG_VALUE
2797 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2798 && FLOAT_STORE_FLAG_VALUE
< 0)
2801 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<')
2808 /* If this is fp + constant, the equivalent is a better operand since
2809 it may let us predict the value of the comparison. */
2810 else if (NONZERO_BASE_PLUS_P (p
->exp
))
2817 /* If we didn't find a useful equivalence for ARG1, we are done.
2818 Otherwise, set up for the next iteration. */
2822 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
2823 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
2824 code
= GET_CODE (x
);
2827 code
= reverse_condition (code
);
2830 /* Return our results. Return the modes from before fold_rtx
2831 because fold_rtx might produce const_int, and then it's too late. */
2832 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
2833 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
2838 /* Try to simplify a unary operation CODE whose output mode is to be
2839 MODE with input operand OP whose mode was originally OP_MODE.
2840 Return zero if no simplification can be made. */
2843 simplify_unary_operation (code
, mode
, op
, op_mode
)
2845 enum machine_mode mode
;
2847 enum machine_mode op_mode
;
2849 register int width
= GET_MODE_BITSIZE (mode
);
2851 /* The order of these tests is critical so that, for example, we don't
2852 check the wrong mode (input vs. output) for a conversion operation,
2853 such as FIX. At some point, this should be simplified. */
2855 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
2856 if (code
== FLOAT
&& GET_CODE (op
) == CONST_INT
)
2860 #ifdef REAL_ARITHMETIC
2861 REAL_VALUE_FROM_INT (d
, INTVAL (op
), INTVAL (op
) < 0 ? ~0 : 0);
2863 d
= (double) INTVAL (op
);
2865 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2867 else if (code
== UNSIGNED_FLOAT
&& GET_CODE (op
) == CONST_INT
)
2871 #ifdef REAL_ARITHMETIC
2872 REAL_VALUE_FROM_INT (d
, INTVAL (op
), 0);
2874 d
= (double) (unsigned int) INTVAL (op
);
2876 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2879 else if (code
== FLOAT
&& GET_CODE (op
) == CONST_DOUBLE
2880 && GET_MODE (op
) == VOIDmode
)
2884 #ifdef REAL_ARITHMETIC
2885 REAL_VALUE_FROM_INT (d
, CONST_DOUBLE_LOW (op
), CONST_DOUBLE_HIGH (op
));
2887 if (CONST_DOUBLE_HIGH (op
) < 0)
2889 d
= (double) (~ CONST_DOUBLE_HIGH (op
));
2890 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2891 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2892 d
+= (double) (unsigned HOST_WIDE_INT
) (~ CONST_DOUBLE_LOW (op
));
2897 d
= (double) CONST_DOUBLE_HIGH (op
);
2898 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2899 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2900 d
+= (double) (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (op
);
2902 #endif /* REAL_ARITHMETIC */
2903 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2905 else if (code
== UNSIGNED_FLOAT
&& GET_CODE (op
) == CONST_DOUBLE
2906 && GET_MODE (op
) == VOIDmode
)
2910 #ifdef REAL_ARITHMETIC
2911 REAL_VALUE_FROM_UNSIGNED_INT (d
, CONST_DOUBLE_LOW (op
),
2912 CONST_DOUBLE_HIGH (op
));
2914 d
= (double) CONST_DOUBLE_HIGH (op
);
2915 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2916 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2917 d
+= (double) (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (op
);
2918 #endif /* REAL_ARITHMETIC */
2919 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2923 if (GET_CODE (op
) == CONST_INT
2924 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
2926 register HOST_WIDE_INT arg0
= INTVAL (op
);
2927 register HOST_WIDE_INT val
;
2940 val
= (arg0
>= 0 ? arg0
: - arg0
);
2944 /* Don't use ffs here. Instead, get low order bit and then its
2945 number. If arg0 is zero, this will return 0, as desired. */
2946 arg0
&= GET_MODE_MASK (mode
);
2947 val
= exact_log2 (arg0
& (- arg0
)) + 1;
2955 if (op_mode
== VOIDmode
)
2957 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
2959 /* If we were really extending the mode,
2960 we would have to distinguish between zero-extension
2961 and sign-extension. */
2962 if (width
!= GET_MODE_BITSIZE (op_mode
))
2966 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
2967 val
= arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
2973 if (op_mode
== VOIDmode
)
2975 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
2977 /* If we were really extending the mode,
2978 we would have to distinguish between zero-extension
2979 and sign-extension. */
2980 if (width
!= GET_MODE_BITSIZE (op_mode
))
2984 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
2987 = arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
2989 & ((HOST_WIDE_INT
) 1 << (GET_MODE_BITSIZE (op_mode
) - 1)))
2990 val
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3003 /* Clear the bits that don't belong in our mode,
3004 unless they and our sign bit are all one.
3005 So we get either a reasonable negative value or a reasonable
3006 unsigned value for this mode. */
3007 if (width
< HOST_BITS_PER_WIDE_INT
3008 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3009 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3010 val
&= (1 << width
) - 1;
3012 return GEN_INT (val
);
3015 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3016 for a DImode operation on a CONST_INT. */
3017 else if (GET_MODE (op
) == VOIDmode
3018 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
3020 HOST_WIDE_INT l1
, h1
, lv
, hv
;
3022 if (GET_CODE (op
) == CONST_DOUBLE
)
3023 l1
= CONST_DOUBLE_LOW (op
), h1
= CONST_DOUBLE_HIGH (op
);
3025 l1
= INTVAL (op
), h1
= l1
< 0 ? -1 : 0;
3035 neg_double (l1
, h1
, &lv
, &hv
);
3040 neg_double (l1
, h1
, &lv
, &hv
);
3048 lv
= HOST_BITS_PER_WIDE_INT
+ exact_log2 (h1
& (-h1
)) + 1;
3050 lv
= exact_log2 (l1
& (-l1
)) + 1;
3054 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
3055 return GEN_INT (l1
& GET_MODE_MASK (mode
));
3061 if (op_mode
== VOIDmode
3062 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3066 lv
= l1
& GET_MODE_MASK (op_mode
);
3070 if (op_mode
== VOIDmode
3071 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3075 lv
= l1
& GET_MODE_MASK (op_mode
);
3076 if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
3077 && (lv
& ((HOST_WIDE_INT
) 1
3078 << (GET_MODE_BITSIZE (op_mode
) - 1))) != 0)
3079 lv
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3081 hv
= (lv
< 0) ? ~ (HOST_WIDE_INT
) 0 : 0;
3092 return immed_double_const (lv
, hv
, mode
);
3095 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3096 else if (GET_CODE (op
) == CONST_DOUBLE
3097 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3103 if (setjmp (handler
))
3104 /* There used to be a warning here, but that is inadvisable.
3105 People may want to cause traps, and the natural way
3106 to do it should not get a warning. */
3109 set_float_handler (handler
);
3111 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3116 d
= REAL_VALUE_NEGATE (d
);
3120 if (REAL_VALUE_NEGATIVE (d
))
3121 d
= REAL_VALUE_NEGATE (d
);
3124 case FLOAT_TRUNCATE
:
3125 d
= real_value_truncate (mode
, d
);
3129 /* All this does is change the mode. */
3133 d
= REAL_VALUE_RNDZINT (d
);
3137 d
= REAL_VALUE_UNSIGNED_RNDZINT (d
);
3147 x
= immed_real_const_1 (d
, mode
);
3148 set_float_handler (NULL_PTR
);
3151 else if (GET_CODE (op
) == CONST_DOUBLE
&& GET_MODE_CLASS (mode
) == MODE_INT
3152 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3159 if (setjmp (handler
))
3162 set_float_handler (handler
);
3164 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3169 val
= REAL_VALUE_FIX (d
);
3173 val
= REAL_VALUE_UNSIGNED_FIX (d
);
3180 set_float_handler (NULL_PTR
);
3182 /* Clear the bits that don't belong in our mode,
3183 unless they and our sign bit are all one.
3184 So we get either a reasonable negative value or a reasonable
3185 unsigned value for this mode. */
3186 if (width
< HOST_BITS_PER_WIDE_INT
3187 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3188 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3189 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3191 return GEN_INT (val
);
3194 /* This was formerly used only for non-IEEE float.
3195 eggert@twinsun.com says it is safe for IEEE also. */
3198 /* There are some simplifications we can do even if the operands
3204 /* (not (not X)) == X, similarly for NEG. */
3205 if (GET_CODE (op
) == code
)
3206 return XEXP (op
, 0);
3210 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3211 becomes just the MINUS if its mode is MODE. This allows
3212 folding switch statements on machines using casesi (such as
3214 if (GET_CODE (op
) == TRUNCATE
3215 && GET_MODE (XEXP (op
, 0)) == mode
3216 && GET_CODE (XEXP (op
, 0)) == MINUS
3217 && GET_CODE (XEXP (XEXP (op
, 0), 0)) == LABEL_REF
3218 && GET_CODE (XEXP (XEXP (op
, 0), 1)) == LABEL_REF
)
3219 return XEXP (op
, 0);
3227 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3228 and OP1. Return 0 if no simplification is possible.
3230 Don't use this for relational operations such as EQ or LT.
3231 Use simplify_relational_operation instead. */
3234 simplify_binary_operation (code
, mode
, op0
, op1
)
3236 enum machine_mode mode
;
3239 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
3241 int width
= GET_MODE_BITSIZE (mode
);
3244 /* Relational operations don't work here. We must know the mode
3245 of the operands in order to do the comparison correctly.
3246 Assuming a full word can give incorrect results.
3247 Consider comparing 128 with -128 in QImode. */
3249 if (GET_RTX_CLASS (code
) == '<')
3252 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3253 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
3254 && GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
3255 && mode
== GET_MODE (op0
) && mode
== GET_MODE (op1
))
3257 REAL_VALUE_TYPE f0
, f1
, value
;
3260 if (setjmp (handler
))
3263 set_float_handler (handler
);
3265 REAL_VALUE_FROM_CONST_DOUBLE (f0
, op0
);
3266 REAL_VALUE_FROM_CONST_DOUBLE (f1
, op1
);
3267 f0
= real_value_truncate (mode
, f0
);
3268 f1
= real_value_truncate (mode
, f1
);
3270 #ifdef REAL_ARITHMETIC
3271 REAL_ARITHMETIC (value
, rtx_to_tree_code (code
), f0
, f1
);
3285 #ifndef REAL_INFINITY
3292 value
= MIN (f0
, f1
);
3295 value
= MAX (f0
, f1
);
3302 set_float_handler (NULL_PTR
);
3303 value
= real_value_truncate (mode
, value
);
3304 return immed_real_const_1 (value
, mode
);
3306 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3308 /* We can fold some multi-word operations. */
3309 if (GET_MODE_CLASS (mode
) == MODE_INT
3310 && GET_CODE (op0
) == CONST_DOUBLE
3311 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
3313 HOST_WIDE_INT l1
, l2
, h1
, h2
, lv
, hv
;
3315 l1
= CONST_DOUBLE_LOW (op0
), h1
= CONST_DOUBLE_HIGH (op0
);
3317 if (GET_CODE (op1
) == CONST_DOUBLE
)
3318 l2
= CONST_DOUBLE_LOW (op1
), h2
= CONST_DOUBLE_HIGH (op1
);
3320 l2
= INTVAL (op1
), h2
= l2
< 0 ? -1 : 0;
3325 /* A - B == A + (-B). */
3326 neg_double (l2
, h2
, &lv
, &hv
);
3329 /* .. fall through ... */
3332 add_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3336 mul_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3339 case DIV
: case MOD
: case UDIV
: case UMOD
:
3340 /* We'd need to include tree.h to do this and it doesn't seem worth
3345 lv
= l1
& l2
, hv
= h1
& h2
;
3349 lv
= l1
| l2
, hv
= h1
| h2
;
3353 lv
= l1
^ l2
, hv
= h1
^ h2
;
3359 && ((unsigned HOST_WIDE_INT
) l1
3360 < (unsigned HOST_WIDE_INT
) l2
)))
3369 && ((unsigned HOST_WIDE_INT
) l1
3370 > (unsigned HOST_WIDE_INT
) l2
)))
3377 if ((unsigned HOST_WIDE_INT
) h1
< (unsigned HOST_WIDE_INT
) h2
3379 && ((unsigned HOST_WIDE_INT
) l1
3380 < (unsigned HOST_WIDE_INT
) l2
)))
3387 if ((unsigned HOST_WIDE_INT
) h1
> (unsigned HOST_WIDE_INT
) h2
3389 && ((unsigned HOST_WIDE_INT
) l1
3390 > (unsigned HOST_WIDE_INT
) l2
)))
3396 case LSHIFTRT
: case ASHIFTRT
:
3397 case ASHIFT
: case LSHIFT
:
3398 case ROTATE
: case ROTATERT
:
3399 #ifdef SHIFT_COUNT_TRUNCATED
3400 l2
&= (GET_MODE_BITSIZE (mode
) - 1), h2
= 0;
3403 if (h2
!= 0 || l2
< 0 || l2
>= GET_MODE_BITSIZE (mode
))
3406 if (code
== LSHIFTRT
|| code
== ASHIFTRT
)
3407 rshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3409 else if (code
== ASHIFT
|| code
== LSHIFT
)
3410 lshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3412 else if (code
== ROTATE
)
3413 lrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3414 else /* code == ROTATERT */
3415 rrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3422 return immed_double_const (lv
, hv
, mode
);
3425 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3426 || width
> HOST_BITS_PER_WIDE_INT
|| width
== 0)
3428 /* Even if we can't compute a constant result,
3429 there are some cases worth simplifying. */
3434 /* In IEEE floating point, x+0 is not the same as x. Similarly
3435 for the other optimizations below. */
3436 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3437 && GET_MODE_CLASS (mode
) != MODE_INT
)
3440 if (op1
== CONST0_RTX (mode
))
3443 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3444 if (GET_CODE (op0
) == NEG
)
3445 return cse_gen_binary (MINUS
, mode
, op1
, XEXP (op0
, 0));
3446 else if (GET_CODE (op1
) == NEG
)
3447 return cse_gen_binary (MINUS
, mode
, op0
, XEXP (op1
, 0));
3449 /* Handle both-operands-constant cases. We can only add
3450 CONST_INTs to constants since the sum of relocatable symbols
3451 can't be handled by most assemblers. */
3453 if (CONSTANT_P (op0
) && GET_CODE (op1
) == CONST_INT
)
3454 return plus_constant (op0
, INTVAL (op1
));
3455 else if (CONSTANT_P (op1
) && GET_CODE (op0
) == CONST_INT
)
3456 return plus_constant (op1
, INTVAL (op0
));
3458 /* If one of the operands is a PLUS or a MINUS, see if we can
3459 simplify this by the associative law.
3460 Don't use the associative law for floating point.
3461 The inaccuracy makes it nonassociative,
3462 and subtle programs can break if operations are associated. */
3464 if ((GET_MODE_CLASS (mode
) == MODE_INT
3465 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
3466 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3467 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3468 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3474 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3475 using cc0, in which case we want to leave it as a COMPARE
3476 so we can distinguish it from a register-register-copy.
3478 In IEEE floating point, x-0 is not the same as x. */
3480 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3481 || GET_MODE_CLASS (mode
) == MODE_INT
)
3482 && op1
== CONST0_RTX (mode
))
3485 /* Do nothing here. */
3490 /* None of these optimizations can be done for IEEE
3492 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3493 && GET_MODE_CLASS (mode
) != MODE_INT
3494 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
3497 /* We can't assume x-x is 0 even with non-IEEE floating point. */
3498 if (rtx_equal_p (op0
, op1
)
3499 && ! side_effects_p (op0
)
3500 && GET_MODE_CLASS (mode
) != MODE_FLOAT
3501 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
3504 /* Change subtraction from zero into negation. */
3505 if (op0
== CONST0_RTX (mode
))
3506 return gen_rtx (NEG
, mode
, op1
);
3508 /* (-1 - a) is ~a. */
3509 if (op0
== constm1_rtx
)
3510 return gen_rtx (NOT
, mode
, op1
);
3512 /* Subtracting 0 has no effect. */
3513 if (op1
== CONST0_RTX (mode
))
3516 /* (a - (-b)) -> (a + b). */
3517 if (GET_CODE (op1
) == NEG
)
3518 return cse_gen_binary (PLUS
, mode
, op0
, XEXP (op1
, 0));
3520 /* If one of the operands is a PLUS or a MINUS, see if we can
3521 simplify this by the associative law.
3522 Don't use the associative law for floating point.
3523 The inaccuracy makes it nonassociative,
3524 and subtle programs can break if operations are associated. */
3526 if ((GET_MODE_CLASS (mode
) == MODE_INT
3527 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
3528 && (GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
3529 || GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
)
3530 && (tem
= simplify_plus_minus (code
, mode
, op0
, op1
)) != 0)
3533 /* Don't let a relocatable value get a negative coeff. */
3534 if (GET_CODE (op1
) == CONST_INT
)
3535 return plus_constant (op0
, - INTVAL (op1
));
3539 if (op1
== constm1_rtx
)
3541 tem
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3543 return tem
? tem
: gen_rtx (NEG
, mode
, op0
);
3546 /* In IEEE floating point, x*0 is not always 0. */
3547 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3548 || GET_MODE_CLASS (mode
) == MODE_INT
)
3549 && op1
== CONST0_RTX (mode
)
3550 && ! side_effects_p (op0
))
3553 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3554 However, ANSI says we can drop signals,
3555 so we can do this anyway. */
3556 if (op1
== CONST1_RTX (mode
))
3559 /* Convert multiply by constant power of two into shift. */
3560 if (GET_CODE (op1
) == CONST_INT
3561 && (val
= exact_log2 (INTVAL (op1
))) >= 0)
3562 return gen_rtx (ASHIFT
, mode
, op0
, GEN_INT (val
));
3564 if (GET_CODE (op1
) == CONST_DOUBLE
3565 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
)
3569 int op1is2
, op1ism1
;
3571 if (setjmp (handler
))
3574 set_float_handler (handler
);
3575 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3576 op1is2
= REAL_VALUES_EQUAL (d
, dconst2
);
3577 op1ism1
= REAL_VALUES_EQUAL (d
, dconstm1
);
3578 set_float_handler (NULL_PTR
);
3580 /* x*2 is x+x and x*(-1) is -x */
3581 if (op1is2
&& GET_MODE (op0
) == mode
)
3582 return gen_rtx (PLUS
, mode
, op0
, copy_rtx (op0
));
3584 else if (op1ism1
&& GET_MODE (op0
) == mode
)
3585 return gen_rtx (NEG
, mode
, op0
);
3590 if (op1
== const0_rtx
)
3592 if (GET_CODE (op1
) == CONST_INT
3593 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3595 if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3597 /* A | (~A) -> -1 */
3598 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3599 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3600 && ! side_effects_p (op0
))
3605 if (op1
== const0_rtx
)
3607 if (GET_CODE (op1
) == CONST_INT
3608 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3609 return gen_rtx (NOT
, mode
, op0
);
3610 if (op0
== op1
&& ! side_effects_p (op0
))
3615 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3617 if (GET_CODE (op1
) == CONST_INT
3618 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3620 if (op0
== op1
&& ! side_effects_p (op0
))
3623 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3624 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3625 && ! side_effects_p (op0
))
3630 /* Convert divide by power of two into shift (divide by 1 handled
3632 if (GET_CODE (op1
) == CONST_INT
3633 && (arg1
= exact_log2 (INTVAL (op1
))) > 0)
3634 return gen_rtx (LSHIFTRT
, mode
, op0
, GEN_INT (arg1
));
3636 /* ... fall through ... */
3639 if (op1
== CONST1_RTX (mode
))
3642 /* In IEEE floating point, 0/x is not always 0. */
3643 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3644 || GET_MODE_CLASS (mode
) == MODE_INT
)
3645 && op0
== CONST0_RTX (mode
)
3646 && ! side_effects_p (op1
))
3649 #if 0 /* Turned off till an expert says this is a safe thing to do. */
3650 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3651 /* Change division by a constant into multiplication. */
3652 else if (GET_CODE (op1
) == CONST_DOUBLE
3653 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
3654 && op1
!= CONST0_RTX (mode
))
3657 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3658 if (REAL_VALUES_EQUAL (d
, dconst0
))
3660 #if defined (REAL_ARITHMETIC)
3661 REAL_ARITHMETIC (d
, (int) RDIV_EXPR
, dconst1
, d
);
3662 return gen_rtx (MULT
, mode
, op0
,
3663 CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
));
3665 return gen_rtx (MULT
, mode
, op0
,
3666 CONST_DOUBLE_FROM_REAL_VALUE (1./d
, mode
));
3674 /* Handle modulus by power of two (mod with 1 handled below). */
3675 if (GET_CODE (op1
) == CONST_INT
3676 && exact_log2 (INTVAL (op1
)) > 0)
3677 return gen_rtx (AND
, mode
, op0
, GEN_INT (INTVAL (op1
) - 1));
3679 /* ... fall through ... */
3682 if ((op0
== const0_rtx
|| op1
== const1_rtx
)
3683 && ! side_effects_p (op0
) && ! side_effects_p (op1
))
3689 /* Rotating ~0 always results in ~0. */
3690 if (GET_CODE (op0
) == CONST_INT
&& width
<= HOST_BITS_PER_WIDE_INT
3691 && INTVAL (op0
) == GET_MODE_MASK (mode
)
3692 && ! side_effects_p (op1
))
3695 /* ... fall through ... */
3701 if (op1
== const0_rtx
)
3703 if (op0
== const0_rtx
&& ! side_effects_p (op1
))
3708 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3709 && INTVAL (op1
) == (HOST_WIDE_INT
) 1 << (width
-1)
3710 && ! side_effects_p (op0
))
3712 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3717 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3718 && INTVAL (op1
) == (unsigned) GET_MODE_MASK (mode
) >> 1
3719 && ! side_effects_p (op0
))
3721 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3726 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3728 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3733 if (op1
== constm1_rtx
&& ! side_effects_p (op0
))
3735 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3746 /* Get the integer argument values in two forms:
3747 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
3749 arg0
= INTVAL (op0
);
3750 arg1
= INTVAL (op1
);
3752 if (width
< HOST_BITS_PER_WIDE_INT
)
3754 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3755 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3758 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
3759 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
3762 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
3763 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
3771 /* Compute the value of the arithmetic. */
3776 val
= arg0s
+ arg1s
;
3780 val
= arg0s
- arg1s
;
3784 val
= arg0s
* arg1s
;
3790 val
= arg0s
/ arg1s
;
3796 val
= arg0s
% arg1s
;
3802 val
= (unsigned HOST_WIDE_INT
) arg0
/ arg1
;
3808 val
= (unsigned HOST_WIDE_INT
) arg0
% arg1
;
3824 /* If shift count is undefined, don't fold it; let the machine do
3825 what it wants. But truncate it if the machine will do that. */
3829 #ifdef SHIFT_COUNT_TRUNCATED
3830 arg1
&= (BITS_PER_WORD
- 1);
3836 val
= ((unsigned HOST_WIDE_INT
) arg0
) >> arg1
;
3844 #ifdef SHIFT_COUNT_TRUNCATED
3845 arg1
&= (BITS_PER_WORD
- 1);
3851 val
= ((unsigned HOST_WIDE_INT
) arg0
) << arg1
;
3858 #ifdef SHIFT_COUNT_TRUNCATED
3859 arg1
&= (BITS_PER_WORD
- 1);
3865 val
= arg0s
>> arg1
;
3867 /* Bootstrap compiler may not have sign extended the right shift.
3868 Manually extend the sign to insure bootstrap cc matches gcc. */
3869 if (arg0s
< 0 && arg1
> 0)
3870 val
|= ((HOST_WIDE_INT
) -1) << (HOST_BITS_PER_WIDE_INT
- arg1
);
3879 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << (width
- arg1
))
3880 | (((unsigned HOST_WIDE_INT
) arg0
) >> arg1
));
3888 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << arg1
)
3889 | (((unsigned HOST_WIDE_INT
) arg0
) >> (width
- arg1
)));
3893 /* Do nothing here. */
3897 val
= arg0s
<= arg1s
? arg0s
: arg1s
;
3901 val
= ((unsigned HOST_WIDE_INT
) arg0
3902 <= (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
3906 val
= arg0s
> arg1s
? arg0s
: arg1s
;
3910 val
= ((unsigned HOST_WIDE_INT
) arg0
3911 > (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
3918 /* Clear the bits that don't belong in our mode, unless they and our sign
3919 bit are all one. So we get either a reasonable negative value or a
3920 reasonable unsigned value for this mode. */
3921 if (width
< HOST_BITS_PER_WIDE_INT
3922 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3923 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3924 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3926 return GEN_INT (val
);
3929 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
3932 Rather than test for specific case, we do this by a brute-force method
3933 and do all possible simplifications until no more changes occur. Then
3934 we rebuild the operation. */
3937 simplify_plus_minus (code
, mode
, op0
, op1
)
3939 enum machine_mode mode
;
3945 int n_ops
= 2, input_ops
= 2, input_consts
= 0, n_consts
= 0;
3946 int first
= 1, negate
= 0, changed
;
3949 bzero (ops
, sizeof ops
);
3951 /* Set up the two operands and then expand them until nothing has been
3952 changed. If we run out of room in our array, give up; this should
3953 almost never happen. */
3955 ops
[0] = op0
, ops
[1] = op1
, negs
[0] = 0, negs
[1] = (code
== MINUS
);
3962 for (i
= 0; i
< n_ops
; i
++)
3963 switch (GET_CODE (ops
[i
]))
3970 ops
[n_ops
] = XEXP (ops
[i
], 1);
3971 negs
[n_ops
++] = GET_CODE (ops
[i
]) == MINUS
? !negs
[i
] : negs
[i
];
3972 ops
[i
] = XEXP (ops
[i
], 0);
3978 ops
[i
] = XEXP (ops
[i
], 0);
3979 negs
[i
] = ! negs
[i
];
3984 ops
[i
] = XEXP (ops
[i
], 0);
3990 /* ~a -> (-a - 1) */
3993 ops
[n_ops
] = constm1_rtx
;
3994 negs
[n_ops
++] = negs
[i
];
3995 ops
[i
] = XEXP (ops
[i
], 0);
3996 negs
[i
] = ! negs
[i
];
4003 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0, changed
= 1;
4008 /* If we only have two operands, we can't do anything. */
4012 /* Now simplify each pair of operands until nothing changes. The first
4013 time through just simplify constants against each other. */
4020 for (i
= 0; i
< n_ops
- 1; i
++)
4021 for (j
= i
+ 1; j
< n_ops
; j
++)
4022 if (ops
[i
] != 0 && ops
[j
] != 0
4023 && (! first
|| (CONSTANT_P (ops
[i
]) && CONSTANT_P (ops
[j
]))))
4025 rtx lhs
= ops
[i
], rhs
= ops
[j
];
4026 enum rtx_code ncode
= PLUS
;
4028 if (negs
[i
] && ! negs
[j
])
4029 lhs
= ops
[j
], rhs
= ops
[i
], ncode
= MINUS
;
4030 else if (! negs
[i
] && negs
[j
])
4033 tem
= simplify_binary_operation (ncode
, mode
, lhs
, rhs
);
4036 ops
[i
] = tem
, ops
[j
] = 0;
4037 negs
[i
] = negs
[i
] && negs
[j
];
4038 if (GET_CODE (tem
) == NEG
)
4039 ops
[i
] = XEXP (tem
, 0), negs
[i
] = ! negs
[i
];
4041 if (GET_CODE (ops
[i
]) == CONST_INT
&& negs
[i
])
4042 ops
[i
] = GEN_INT (- INTVAL (ops
[i
])), negs
[i
] = 0;
4050 /* Pack all the operands to the lower-numbered entries and give up if
4051 we didn't reduce the number of operands we had. Make sure we
4052 count a CONST as two operands. If we have the same number of
4053 operands, but have made more CONSTs than we had, this is also
4054 an improvement, so accept it. */
4056 for (i
= 0, j
= 0; j
< n_ops
; j
++)
4059 ops
[i
] = ops
[j
], negs
[i
++] = negs
[j
];
4060 if (GET_CODE (ops
[j
]) == CONST
)
4064 if (i
+ n_consts
> input_ops
4065 || (i
+ n_consts
== input_ops
&& n_consts
<= input_consts
))
4070 /* If we have a CONST_INT, put it last. */
4071 for (i
= 0; i
< n_ops
- 1; i
++)
4072 if (GET_CODE (ops
[i
]) == CONST_INT
)
4074 tem
= ops
[n_ops
- 1], ops
[n_ops
- 1] = ops
[i
] , ops
[i
] = tem
;
4075 j
= negs
[n_ops
- 1], negs
[n_ops
- 1] = negs
[i
], negs
[i
] = j
;
4078 /* Put a non-negated operand first. If there aren't any, make all
4079 operands positive and negate the whole thing later. */
4080 for (i
= 0; i
< n_ops
&& negs
[i
]; i
++)
4085 for (i
= 0; i
< n_ops
; i
++)
4091 tem
= ops
[0], ops
[0] = ops
[i
], ops
[i
] = tem
;
4092 j
= negs
[0], negs
[0] = negs
[i
], negs
[i
] = j
;
4095 /* Now make the result by performing the requested operations. */
4097 for (i
= 1; i
< n_ops
; i
++)
4098 result
= cse_gen_binary (negs
[i
] ? MINUS
: PLUS
, mode
, result
, ops
[i
]);
4100 return negate
? gen_rtx (NEG
, mode
, result
) : result
;
4103 /* Make a binary operation by properly ordering the operands and
4104 seeing if the expression folds. */
4107 cse_gen_binary (code
, mode
, op0
, op1
)
4109 enum machine_mode mode
;
4114 /* Put complex operands first and constants second if commutative. */
4115 if (GET_RTX_CLASS (code
) == 'c'
4116 && ((CONSTANT_P (op0
) && GET_CODE (op1
) != CONST_INT
)
4117 || (GET_RTX_CLASS (GET_CODE (op0
)) == 'o'
4118 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')
4119 || (GET_CODE (op0
) == SUBREG
4120 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0
))) == 'o'
4121 && GET_RTX_CLASS (GET_CODE (op1
)) != 'o')))
4122 tem
= op0
, op0
= op1
, op1
= tem
;
4124 /* If this simplifies, do it. */
4125 tem
= simplify_binary_operation (code
, mode
, op0
, op1
);
4130 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4131 just form the operation. */
4133 if (code
== PLUS
&& GET_CODE (op1
) == CONST_INT
4134 && GET_MODE (op0
) != VOIDmode
)
4135 return plus_constant (op0
, INTVAL (op1
));
4136 else if (code
== MINUS
&& GET_CODE (op1
) == CONST_INT
4137 && GET_MODE (op0
) != VOIDmode
)
4138 return plus_constant (op0
, - INTVAL (op1
));
4140 return gen_rtx (code
, mode
, op0
, op1
);
4143 /* Like simplify_binary_operation except used for relational operators.
4144 MODE is the mode of the operands, not that of the result. */
4147 simplify_relational_operation (code
, mode
, op0
, op1
)
4149 enum machine_mode mode
;
4152 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
4154 int width
= GET_MODE_BITSIZE (mode
);
4156 /* If op0 is a compare, extract the comparison arguments from it. */
4157 if (GET_CODE (op0
) == COMPARE
&& op1
== const0_rtx
)
4158 op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4160 /* Unlike the arithmetic operations, we can do the comparison whether
4161 or not WIDTH is larger than HOST_BITS_PER_WIDE_INT because the
4162 CONST_INTs are to be understood as being infinite precision as
4163 is the comparison. So there is no question of overflow. */
4165 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
|| width
== 0)
4167 /* Even if we can't compute a constant result,
4168 there are some cases worth simplifying. */
4170 /* For non-IEEE floating-point, if the two operands are equal, we know
4172 if (rtx_equal_p (op0
, op1
)
4173 && (TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4174 || GET_MODE_CLASS (GET_MODE (op0
)) != MODE_FLOAT
))
4175 return (code
== EQ
|| code
== GE
|| code
== LE
|| code
== LEU
4176 || code
== GEU
) ? const_true_rtx
: const0_rtx
;
4178 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4179 else if (GET_CODE (op0
) == CONST_DOUBLE
4180 && GET_CODE (op1
) == CONST_DOUBLE
4181 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
4183 REAL_VALUE_TYPE d0
, d1
;
4185 int op0lt
, op1lt
, equal
;
4187 if (setjmp (handler
))
4190 set_float_handler (handler
);
4191 REAL_VALUE_FROM_CONST_DOUBLE (d0
, op0
);
4192 REAL_VALUE_FROM_CONST_DOUBLE (d1
, op1
);
4193 equal
= REAL_VALUES_EQUAL (d0
, d1
);
4194 op0lt
= REAL_VALUES_LESS (d0
, d1
);
4195 op1lt
= REAL_VALUES_LESS (d1
, d0
);
4196 set_float_handler (NULL_PTR
);
4201 return equal
? const_true_rtx
: const0_rtx
;
4203 return !equal
? const_true_rtx
: const0_rtx
;
4205 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4207 return op0lt
? const_true_rtx
: const0_rtx
;
4209 return equal
|| op1lt
? const_true_rtx
: const0_rtx
;
4211 return op1lt
? const_true_rtx
: const0_rtx
;
4214 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4216 else if (GET_MODE_CLASS (mode
) == MODE_INT
4217 && width
> HOST_BITS_PER_WIDE_INT
4218 && (GET_CODE (op0
) == CONST_DOUBLE
4219 || GET_CODE (op0
) == CONST_INT
)
4220 && (GET_CODE (op1
) == CONST_DOUBLE
4221 || GET_CODE (op1
) == CONST_INT
))
4223 HOST_WIDE_INT h0
, l0
, h1
, l1
;
4224 unsigned HOST_WIDE_INT uh0
, ul0
, uh1
, ul1
;
4225 int op0lt
, op0ltu
, equal
;
4227 if (GET_CODE (op0
) == CONST_DOUBLE
)
4228 l0
= CONST_DOUBLE_LOW (op0
), h0
= CONST_DOUBLE_HIGH (op0
);
4230 l0
= INTVAL (op0
), h0
= l0
< 0 ? -1 : 0;
4232 if (GET_CODE (op1
) == CONST_DOUBLE
)
4233 l1
= CONST_DOUBLE_LOW (op1
), h1
= CONST_DOUBLE_HIGH (op1
);
4235 l1
= INTVAL (op1
), h1
= l1
< 0 ? -1 : 0;
4237 uh0
= h0
, ul0
= l0
, uh1
= h1
, ul1
= l1
;
4239 equal
= (h0
== h1
&& l0
== l1
);
4240 op0lt
= (h0
< h1
|| (h0
== h1
&& l0
< l1
));
4241 op0ltu
= (uh0
< uh1
|| (uh0
== uh1
&& ul0
< ul1
));
4246 return equal
? const_true_rtx
: const0_rtx
;
4248 return !equal
? const_true_rtx
: const0_rtx
;
4250 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4252 return op0lt
? const_true_rtx
: const0_rtx
;
4254 return !op0lt
? const_true_rtx
: const0_rtx
;
4256 return !equal
&& !op0lt
? const_true_rtx
: const0_rtx
;
4258 return equal
|| op0ltu
? const_true_rtx
: const0_rtx
;
4260 return op0ltu
? const_true_rtx
: const0_rtx
;
4262 return !op0ltu
? const_true_rtx
: const0_rtx
;
4264 return !equal
&& !op0ltu
? const_true_rtx
: const0_rtx
;
4273 /* We can't make this assumption due to #pragma weak */
4274 if (CONSTANT_P (op0
) && op1
== const0_rtx
)
4277 if (NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
4278 /* On some machines, the ap reg can be 0 sometimes. */
4279 && op0
!= arg_pointer_rtx
)
4286 /* We can't make this assumption due to #pragma weak */
4287 if (CONSTANT_P (op0
) && op1
== const0_rtx
)
4288 return const_true_rtx
;
4290 if (NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
4291 /* On some machines, the ap reg can be 0 sometimes. */
4292 && op0
!= arg_pointer_rtx
)
4293 return const_true_rtx
;
4297 /* Unsigned values are never negative, but we must be sure we are
4298 actually comparing a value, not a CC operand. */
4299 if (op1
== const0_rtx
4300 && GET_MODE_CLASS (mode
) == MODE_INT
)
4301 return const_true_rtx
;
4305 if (op1
== const0_rtx
4306 && GET_MODE_CLASS (mode
) == MODE_INT
)
4311 /* Unsigned values are never greater than the largest
4313 if (GET_CODE (op1
) == CONST_INT
4314 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4315 && GET_MODE_CLASS (mode
) == MODE_INT
)
4316 return const_true_rtx
;
4320 if (GET_CODE (op1
) == CONST_INT
4321 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4322 && GET_MODE_CLASS (mode
) == MODE_INT
)
4330 /* Get the integer argument values in two forms:
4331 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4333 arg0
= INTVAL (op0
);
4334 arg1
= INTVAL (op1
);
4336 if (width
< HOST_BITS_PER_WIDE_INT
)
4338 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4339 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4342 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4343 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4346 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4347 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4355 /* Compute the value of the arithmetic. */
4360 val
= arg0
!= arg1
? STORE_FLAG_VALUE
: 0;
4364 val
= arg0
== arg1
? STORE_FLAG_VALUE
: 0;
4368 val
= arg0s
<= arg1s
? STORE_FLAG_VALUE
: 0;
4372 val
= arg0s
< arg1s
? STORE_FLAG_VALUE
: 0;
4376 val
= arg0s
>= arg1s
? STORE_FLAG_VALUE
: 0;
4380 val
= arg0s
> arg1s
? STORE_FLAG_VALUE
: 0;
4384 val
= (((unsigned HOST_WIDE_INT
) arg0
)
4385 <= ((unsigned HOST_WIDE_INT
) arg1
) ? STORE_FLAG_VALUE
: 0);
4389 val
= (((unsigned HOST_WIDE_INT
) arg0
)
4390 < ((unsigned HOST_WIDE_INT
) arg1
) ? STORE_FLAG_VALUE
: 0);
4394 val
= (((unsigned HOST_WIDE_INT
) arg0
)
4395 >= ((unsigned HOST_WIDE_INT
) arg1
) ? STORE_FLAG_VALUE
: 0);
4399 val
= (((unsigned HOST_WIDE_INT
) arg0
)
4400 > ((unsigned HOST_WIDE_INT
) arg1
) ? STORE_FLAG_VALUE
: 0);
4407 /* Clear the bits that don't belong in our mode, unless they and our sign
4408 bit are all one. So we get either a reasonable negative value or a
4409 reasonable unsigned value for this mode. */
4410 if (width
< HOST_BITS_PER_WIDE_INT
4411 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4412 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4413 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4415 return GEN_INT (val
);
4418 /* Simplify CODE, an operation with result mode MODE and three operands,
4419 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4420 a constant. Return 0 if no simplifications is possible. */
4423 simplify_ternary_operation (code
, mode
, op0_mode
, op0
, op1
, op2
)
4425 enum machine_mode mode
, op0_mode
;
4428 int width
= GET_MODE_BITSIZE (mode
);
4430 /* VOIDmode means "infinite" precision. */
4432 width
= HOST_BITS_PER_WIDE_INT
;
4438 if (GET_CODE (op0
) == CONST_INT
4439 && GET_CODE (op1
) == CONST_INT
4440 && GET_CODE (op2
) == CONST_INT
4441 && INTVAL (op1
) + INTVAL (op2
) <= GET_MODE_BITSIZE (op0_mode
)
4442 && width
<= HOST_BITS_PER_WIDE_INT
)
4444 /* Extracting a bit-field from a constant */
4445 HOST_WIDE_INT val
= INTVAL (op0
);
4448 val
>>= (GET_MODE_BITSIZE (op0_mode
) - INTVAL (op2
) - INTVAL (op1
));
4450 val
>>= INTVAL (op2
);
4452 if (HOST_BITS_PER_WIDE_INT
!= INTVAL (op1
))
4454 /* First zero-extend. */
4455 val
&= ((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1;
4456 /* If desired, propagate sign bit. */
4457 if (code
== SIGN_EXTRACT
4458 && (val
& ((HOST_WIDE_INT
) 1 << (INTVAL (op1
) - 1))))
4459 val
|= ~ (((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1);
4462 /* Clear the bits that don't belong in our mode,
4463 unless they and our sign bit are all one.
4464 So we get either a reasonable negative value or a reasonable
4465 unsigned value for this mode. */
4466 if (width
< HOST_BITS_PER_WIDE_INT
4467 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4468 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4469 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4471 return GEN_INT (val
);
4476 if (GET_CODE (op0
) == CONST_INT
)
4477 return op0
!= const0_rtx
? op1
: op2
;
4487 /* If X is a nontrivial arithmetic operation on an argument
4488 for which a constant value can be determined, return
4489 the result of operating on that value, as a constant.
4490 Otherwise, return X, possibly with one or more operands
4491 modified by recursive calls to this function.
4493 If X is a register whose contents are known, we do NOT
4494 return those contents here. equiv_constant is called to
4497 INSN is the insn that we may be modifying. If it is 0, make a copy
4498 of X before modifying it. */
4505 register enum rtx_code code
;
4506 register enum machine_mode mode
;
4513 /* Folded equivalents of first two operands of X. */
4517 /* Constant equivalents of first three operands of X;
4518 0 when no such equivalent is known. */
4523 /* The mode of the first operand of X. We need this for sign and zero
4525 enum machine_mode mode_arg0
;
4530 mode
= GET_MODE (x
);
4531 code
= GET_CODE (x
);
4540 /* No use simplifying an EXPR_LIST
4541 since they are used only for lists of args
4542 in a function call's REG_EQUAL note. */
4548 return prev_insn_cc0
;
4552 /* If the next insn is a CODE_LABEL followed by a jump table,
4553 PC's value is a LABEL_REF pointing to that label. That
4554 lets us fold switch statements on the Vax. */
4555 if (insn
&& GET_CODE (insn
) == JUMP_INSN
)
4557 rtx next
= next_nonnote_insn (insn
);
4559 if (next
&& GET_CODE (next
) == CODE_LABEL
4560 && NEXT_INSN (next
) != 0
4561 && GET_CODE (NEXT_INSN (next
)) == JUMP_INSN
4562 && (GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_VEC
4563 || GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_DIFF_VEC
))
4564 return gen_rtx (LABEL_REF
, Pmode
, next
);
4569 /* See if we previously assigned a constant value to this SUBREG. */
4570 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
4571 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
4574 /* If this is a paradoxical SUBREG, we have no idea what value the
4575 extra bits would have. However, if the operand is equivalent
4576 to a SUBREG whose operand is the same as our mode, and all the
4577 modes are within a word, we can just use the inner operand
4578 because these SUBREGs just say how to treat the register. */
4580 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4582 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
4583 struct table_elt
*elt
;
4585 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
4586 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
4587 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
4590 for (elt
= elt
->first_same_value
;
4591 elt
; elt
= elt
->next_same_value
)
4592 if (GET_CODE (elt
->exp
) == SUBREG
4593 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4594 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4595 return copy_rtx (SUBREG_REG (elt
->exp
));
4601 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4602 We might be able to if the SUBREG is extracting a single word in an
4603 integral mode or extracting the low part. */
4605 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
4606 const_arg0
= equiv_constant (folded_arg0
);
4608 folded_arg0
= const_arg0
;
4610 if (folded_arg0
!= SUBREG_REG (x
))
4614 if (GET_MODE_CLASS (mode
) == MODE_INT
4615 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4616 && GET_MODE (SUBREG_REG (x
)) != VOIDmode
)
4617 new = operand_subword (folded_arg0
, SUBREG_WORD (x
), 0,
4618 GET_MODE (SUBREG_REG (x
)));
4619 if (new == 0 && subreg_lowpart_p (x
))
4620 new = gen_lowpart_if_possible (mode
, folded_arg0
);
4625 /* If this is a narrowing SUBREG and our operand is a REG, see if
4626 we can find an equivalence for REG that is an arithmetic operation
4627 in a wider mode where both operands are paradoxical SUBREGs
4628 from objects of our result mode. In that case, we couldn't report
4629 an equivalent value for that operation, since we don't know what the
4630 extra bits will be. But we can find an equivalence for this SUBREG
4631 by folding that operation is the narrow mode. This allows us to
4632 fold arithmetic in narrow modes when the machine only supports
4633 word-sized arithmetic.
4635 Also look for a case where we have a SUBREG whose operand is the
4636 same as our result. If both modes are smaller than a word, we
4637 are simply interpreting a register in different modes and we
4638 can use the inner value. */
4640 if (GET_CODE (folded_arg0
) == REG
4641 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
))
4642 && subreg_lowpart_p (x
))
4644 struct table_elt
*elt
;
4646 /* We can use HASH here since we know that canon_hash won't be
4648 elt
= lookup (folded_arg0
,
4649 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
4650 GET_MODE (folded_arg0
));
4653 elt
= elt
->first_same_value
;
4655 for (; elt
; elt
= elt
->next_same_value
)
4657 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
4659 /* Just check for unary and binary operations. */
4660 if (GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '1'
4661 && GET_CODE (elt
->exp
) != SIGN_EXTEND
4662 && GET_CODE (elt
->exp
) != ZERO_EXTEND
4663 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4664 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
)
4666 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
4668 if (GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4669 op0
= fold_rtx (op0
, NULL_RTX
);
4671 op0
= equiv_constant (op0
);
4673 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
4676 else if ((GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '2'
4677 || GET_RTX_CLASS (GET_CODE (elt
->exp
)) == 'c')
4678 && eltcode
!= DIV
&& eltcode
!= MOD
4679 && eltcode
!= UDIV
&& eltcode
!= UMOD
4680 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
4681 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
4682 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4683 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
4685 || CONSTANT_P (XEXP (elt
->exp
, 0)))
4686 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
4687 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
4689 || CONSTANT_P (XEXP (elt
->exp
, 1))))
4691 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
4692 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
4694 if (op0
&& GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4695 op0
= fold_rtx (op0
, NULL_RTX
);
4698 op0
= equiv_constant (op0
);
4700 if (op1
&& GET_CODE (op1
) != REG
&& ! CONSTANT_P (op1
))
4701 op1
= fold_rtx (op1
, NULL_RTX
);
4704 op1
= equiv_constant (op1
);
4707 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
,
4711 else if (GET_CODE (elt
->exp
) == SUBREG
4712 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4713 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
4715 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4716 new = copy_rtx (SUBREG_REG (elt
->exp
));
4727 /* If we have (NOT Y), see if Y is known to be (NOT Z).
4728 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
4729 new = lookup_as_function (XEXP (x
, 0), code
);
4731 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
4735 /* If we are not actually processing an insn, don't try to find the
4736 best address. Not only don't we care, but we could modify the
4737 MEM in an invalid way since we have no insn to validate against. */
4739 find_best_addr (insn
, &XEXP (x
, 0));
4742 /* Even if we don't fold in the insn itself,
4743 we can safely do so here, in hopes of getting a constant. */
4744 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
4746 HOST_WIDE_INT offset
= 0;
4748 if (GET_CODE (addr
) == REG
4749 && REGNO_QTY_VALID_P (REGNO (addr
))
4750 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
4751 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
4752 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
4754 /* If address is constant, split it into a base and integer offset. */
4755 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
4757 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
4758 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
4760 base
= XEXP (XEXP (addr
, 0), 0);
4761 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
4763 else if (GET_CODE (addr
) == LO_SUM
4764 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
4765 base
= XEXP (addr
, 1);
4767 /* If this is a constant pool reference, we can fold it into its
4768 constant to allow better value tracking. */
4769 if (base
&& GET_CODE (base
) == SYMBOL_REF
4770 && CONSTANT_POOL_ADDRESS_P (base
))
4772 rtx constant
= get_pool_constant (base
);
4773 enum machine_mode const_mode
= get_pool_mode (base
);
4776 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
4777 constant_pool_entries_cost
= COST (constant
);
4779 /* If we are loading the full constant, we have an equivalence. */
4780 if (offset
== 0 && mode
== const_mode
)
4783 /* If this actually isn't a constant (wierd!), we can't do
4784 anything. Otherwise, handle the two most common cases:
4785 extracting a word from a multi-word constant, and extracting
4786 the low-order bits. Other cases don't seem common enough to
4788 if (! CONSTANT_P (constant
))
4791 if (GET_MODE_CLASS (mode
) == MODE_INT
4792 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4793 && offset
% UNITS_PER_WORD
== 0
4794 && (new = operand_subword (constant
,
4795 offset
/ UNITS_PER_WORD
,
4796 0, const_mode
)) != 0)
4799 if (((BYTES_BIG_ENDIAN
4800 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
4801 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
4802 && (new = gen_lowpart_if_possible (mode
, constant
)) != 0)
4806 /* If this is a reference to a label at a known position in a jump
4807 table, we also know its value. */
4808 if (base
&& GET_CODE (base
) == LABEL_REF
)
4810 rtx label
= XEXP (base
, 0);
4811 rtx table_insn
= NEXT_INSN (label
);
4813 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
4814 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
4816 rtx table
= PATTERN (table_insn
);
4819 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
4820 < XVECLEN (table
, 0)))
4821 return XVECEXP (table
, 0,
4822 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
4824 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
4825 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
4827 rtx table
= PATTERN (table_insn
);
4830 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
4831 < XVECLEN (table
, 1)))
4833 offset
/= GET_MODE_SIZE (GET_MODE (table
));
4834 new = gen_rtx (MINUS
, Pmode
, XVECEXP (table
, 1, offset
),
4837 if (GET_MODE (table
) != Pmode
)
4838 new = gen_rtx (TRUNCATE
, GET_MODE (table
), new);
4852 mode_arg0
= VOIDmode
;
4854 /* Try folding our operands.
4855 Then see which ones have constant values known. */
4857 fmt
= GET_RTX_FORMAT (code
);
4858 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4861 rtx arg
= XEXP (x
, i
);
4862 rtx folded_arg
= arg
, const_arg
= 0;
4863 enum machine_mode mode_arg
= GET_MODE (arg
);
4864 rtx cheap_arg
, expensive_arg
;
4865 rtx replacements
[2];
4868 /* Most arguments are cheap, so handle them specially. */
4869 switch (GET_CODE (arg
))
4872 /* This is the same as calling equiv_constant; it is duplicated
4874 if (REGNO_QTY_VALID_P (REGNO (arg
))
4875 && qty_const
[reg_qty
[REGNO (arg
)]] != 0
4876 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != REG
4877 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != PLUS
)
4879 = gen_lowpart_if_possible (GET_MODE (arg
),
4880 qty_const
[reg_qty
[REGNO (arg
)]]);
4893 folded_arg
= prev_insn_cc0
;
4894 mode_arg
= prev_insn_cc0_mode
;
4895 const_arg
= equiv_constant (folded_arg
);
4900 folded_arg
= fold_rtx (arg
, insn
);
4901 const_arg
= equiv_constant (folded_arg
);
4904 /* For the first three operands, see if the operand
4905 is constant or equivalent to a constant. */
4909 folded_arg0
= folded_arg
;
4910 const_arg0
= const_arg
;
4911 mode_arg0
= mode_arg
;
4914 folded_arg1
= folded_arg
;
4915 const_arg1
= const_arg
;
4918 const_arg2
= const_arg
;
4922 /* Pick the least expensive of the folded argument and an
4923 equivalent constant argument. */
4924 if (const_arg
== 0 || const_arg
== folded_arg
4925 || COST (const_arg
) > COST (folded_arg
))
4926 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
4928 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
4930 /* Try to replace the operand with the cheapest of the two
4931 possibilities. If it doesn't work and this is either of the first
4932 two operands of a commutative operation, try swapping them.
4933 If THAT fails, try the more expensive, provided it is cheaper
4934 than what is already there. */
4936 if (cheap_arg
== XEXP (x
, i
))
4939 if (insn
== 0 && ! copied
)
4945 replacements
[0] = cheap_arg
, replacements
[1] = expensive_arg
;
4947 j
< 2 && replacements
[j
]
4948 && COST (replacements
[j
]) < COST (XEXP (x
, i
));
4951 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
4954 if (code
== NE
|| code
== EQ
|| GET_RTX_CLASS (code
) == 'c')
4956 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
4957 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
4959 if (apply_change_group ())
4961 /* Swap them back to be invalid so that this loop can
4962 continue and flag them to be swapped back later. */
4965 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
4974 else if (fmt
[i
] == 'E')
4975 /* Don't try to fold inside of a vector of expressions.
4976 Doing nothing is harmless. */
4979 /* If a commutative operation, place a constant integer as the second
4980 operand unless the first operand is also a constant integer. Otherwise,
4981 place any constant second unless the first operand is also a constant. */
4983 if (code
== EQ
|| code
== NE
|| GET_RTX_CLASS (code
) == 'c')
4985 if (must_swap
|| (const_arg0
4987 || (GET_CODE (const_arg0
) == CONST_INT
4988 && GET_CODE (const_arg1
) != CONST_INT
))))
4990 register rtx tem
= XEXP (x
, 0);
4992 if (insn
== 0 && ! copied
)
4998 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
4999 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
5000 if (apply_change_group ())
5002 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
5003 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
5008 /* If X is an arithmetic operation, see if we can simplify it. */
5010 switch (GET_RTX_CLASS (code
))
5013 /* We can't simplify extension ops unless we know the original mode. */
5014 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
5015 && mode_arg0
== VOIDmode
)
5017 new = simplify_unary_operation (code
, mode
,
5018 const_arg0
? const_arg0
: folded_arg0
,
5023 /* See what items are actually being compared and set FOLDED_ARG[01]
5024 to those values and CODE to the actual comparison code. If any are
5025 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5026 do anything if both operands are already known to be constant. */
5028 if (const_arg0
== 0 || const_arg1
== 0)
5030 struct table_elt
*p0
, *p1
;
5031 rtx
true = const_true_rtx
, false = const0_rtx
;
5032 enum machine_mode mode_arg1
;
5034 #ifdef FLOAT_STORE_FLAG_VALUE
5035 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5037 true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
);
5038 false = CONST0_RTX (mode
);
5042 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
5043 &mode_arg0
, &mode_arg1
);
5044 const_arg0
= equiv_constant (folded_arg0
);
5045 const_arg1
= equiv_constant (folded_arg1
);
5047 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5048 what kinds of things are being compared, so we can't do
5049 anything with this comparison. */
5051 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
5054 /* If we do not now have two constants being compared, see if we
5055 can nevertheless deduce some things about the comparison. */
5056 if (const_arg0
== 0 || const_arg1
== 0)
5058 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit
5059 constant? These aren't zero, but we don't know their sign. */
5060 if (const_arg1
== const0_rtx
5061 && (NONZERO_BASE_PLUS_P (folded_arg0
)
5062 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5064 || GET_CODE (folded_arg0
) == SYMBOL_REF
5066 || GET_CODE (folded_arg0
) == LABEL_REF
5067 || GET_CODE (folded_arg0
) == CONST
))
5071 else if (code
== NE
)
5075 /* See if the two operands are the same. We don't do this
5076 for IEEE floating-point since we can't assume x == x
5077 since x might be a NaN. */
5079 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
5080 || GET_MODE_CLASS (mode_arg0
) != MODE_FLOAT
)
5081 && (folded_arg0
== folded_arg1
5082 || (GET_CODE (folded_arg0
) == REG
5083 && GET_CODE (folded_arg1
) == REG
5084 && (reg_qty
[REGNO (folded_arg0
)]
5085 == reg_qty
[REGNO (folded_arg1
)]))
5086 || ((p0
= lookup (folded_arg0
,
5087 (safe_hash (folded_arg0
, mode_arg0
)
5088 % NBUCKETS
), mode_arg0
))
5089 && (p1
= lookup (folded_arg1
,
5090 (safe_hash (folded_arg1
, mode_arg0
)
5091 % NBUCKETS
), mode_arg0
))
5092 && p0
->first_same_value
== p1
->first_same_value
)))
5093 return ((code
== EQ
|| code
== LE
|| code
== GE
5094 || code
== LEU
|| code
== GEU
)
5097 /* If FOLDED_ARG0 is a register, see if the comparison we are
5098 doing now is either the same as we did before or the reverse
5099 (we only check the reverse if not floating-point). */
5100 else if (GET_CODE (folded_arg0
) == REG
)
5102 int qty
= reg_qty
[REGNO (folded_arg0
)];
5104 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
))
5105 && (comparison_dominates_p (qty_comparison_code
[qty
], code
)
5106 || (comparison_dominates_p (qty_comparison_code
[qty
],
5107 reverse_condition (code
))
5108 && GET_MODE_CLASS (mode_arg0
) == MODE_INT
))
5109 && (rtx_equal_p (qty_comparison_const
[qty
], folded_arg1
)
5111 && rtx_equal_p (qty_comparison_const
[qty
],
5113 || (GET_CODE (folded_arg1
) == REG
5114 && (reg_qty
[REGNO (folded_arg1
)]
5115 == qty_comparison_qty
[qty
]))))
5116 return (comparison_dominates_p (qty_comparison_code
[qty
],
5123 /* If we are comparing against zero, see if the first operand is
5124 equivalent to an IOR with a constant. If so, we may be able to
5125 determine the result of this comparison. */
5127 if (const_arg1
== const0_rtx
)
5129 rtx y
= lookup_as_function (folded_arg0
, IOR
);
5133 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
5134 && GET_CODE (inner_const
) == CONST_INT
5135 && INTVAL (inner_const
) != 0)
5137 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
5138 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
5139 && (INTVAL (inner_const
)
5140 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
5141 rtx
true = const_true_rtx
, false = const0_rtx
;
5143 #ifdef FLOAT_STORE_FLAG_VALUE
5144 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5146 true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
);
5147 false = CONST0_RTX (mode
);
5169 new = simplify_relational_operation (code
, mode_arg0
,
5170 const_arg0
? const_arg0
: folded_arg0
,
5171 const_arg1
? const_arg1
: folded_arg1
);
5172 #ifdef FLOAT_STORE_FLAG_VALUE
5173 if (new != 0 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5174 new = ((new == const0_rtx
) ? CONST0_RTX (mode
)
5175 : immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
));
5184 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5185 with that LABEL_REF as its second operand. If so, the result is
5186 the first operand of that MINUS. This handles switches with an
5187 ADDR_DIFF_VEC table. */
5188 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
5190 rtx y
= lookup_as_function (folded_arg0
, MINUS
);
5192 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5193 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
5199 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5200 If so, produce (PLUS Z C2-C). */
5201 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
5203 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
5204 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
5205 return fold_rtx (plus_constant (y
, -INTVAL (const_arg1
)),
5209 /* ... fall through ... */
5212 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
5213 case IOR
: case AND
: case XOR
:
5214 case MULT
: case DIV
: case UDIV
:
5215 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
5216 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5217 is known to be of similar form, we may be able to replace the
5218 operation with a combined operation. This may eliminate the
5219 intermediate operation if every use is simplified in this way.
5220 Note that the similar optimization done by combine.c only works
5221 if the intermediate operation's result has only one reference. */
5223 if (GET_CODE (folded_arg0
) == REG
5224 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
5227 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
5228 rtx y
= lookup_as_function (folded_arg0
, code
);
5230 enum rtx_code associate_code
;
5234 || 0 == (inner_const
5235 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
5236 || GET_CODE (inner_const
) != CONST_INT
5237 /* If we have compiled a statement like
5238 "if (x == (x & mask1))", and now are looking at
5239 "x & mask2", we will have a case where the first operand
5240 of Y is the same as our first operand. Unless we detect
5241 this case, an infinite loop will result. */
5242 || XEXP (y
, 0) == folded_arg0
)
5245 /* Don't associate these operations if they are a PLUS with the
5246 same constant and it is a power of two. These might be doable
5247 with a pre- or post-increment. Similarly for two subtracts of
5248 identical powers of two with post decrement. */
5250 if (code
== PLUS
&& INTVAL (const_arg1
) == INTVAL (inner_const
)
5252 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5253 || exact_log2 (INTVAL (const_arg1
)) >= 0
5255 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5256 || exact_log2 (- INTVAL (const_arg1
)) >= 0
5261 /* Compute the code used to compose the constants. For example,
5262 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5265 = (code
== MULT
|| code
== DIV
|| code
== UDIV
? MULT
5266 : is_shift
|| code
== PLUS
|| code
== MINUS
? PLUS
: code
);
5268 new_const
= simplify_binary_operation (associate_code
, mode
,
5269 const_arg1
, inner_const
);
5274 /* If we are associating shift operations, don't let this
5275 produce a shift of larger than the object. This could
5276 occur when we following a sign-extend by a right shift on
5277 a machine that does a sign-extend as a pair of shifts. */
5279 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
5280 && INTVAL (new_const
) > GET_MODE_BITSIZE (mode
))
5283 y
= copy_rtx (XEXP (y
, 0));
5285 /* If Y contains our first operand (the most common way this
5286 can happen is if Y is a MEM), we would do into an infinite
5287 loop if we tried to fold it. So don't in that case. */
5289 if (! reg_mentioned_p (folded_arg0
, y
))
5290 y
= fold_rtx (y
, insn
);
5292 return cse_gen_binary (code
, mode
, y
, new_const
);
5296 new = simplify_binary_operation (code
, mode
,
5297 const_arg0
? const_arg0
: folded_arg0
,
5298 const_arg1
? const_arg1
: folded_arg1
);
5302 /* (lo_sum (high X) X) is simply X. */
5303 if (code
== LO_SUM
&& const_arg0
!= 0
5304 && GET_CODE (const_arg0
) == HIGH
5305 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
5311 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
5312 const_arg0
? const_arg0
: folded_arg0
,
5313 const_arg1
? const_arg1
: folded_arg1
,
5314 const_arg2
? const_arg2
: XEXP (x
, 2));
5318 return new ? new : x
;
5321 /* Return a constant value currently equivalent to X.
5322 Return 0 if we don't know one. */
5328 if (GET_CODE (x
) == REG
5329 && REGNO_QTY_VALID_P (REGNO (x
))
5330 && qty_const
[reg_qty
[REGNO (x
)]])
5331 x
= gen_lowpart_if_possible (GET_MODE (x
), qty_const
[reg_qty
[REGNO (x
)]]);
5333 if (x
!= 0 && CONSTANT_P (x
))
5336 /* If X is a MEM, try to fold it outside the context of any insn to see if
5337 it might be equivalent to a constant. That handles the case where it
5338 is a constant-pool reference. Then try to look it up in the hash table
5339 in case it is something whose value we have seen before. */
5341 if (GET_CODE (x
) == MEM
)
5343 struct table_elt
*elt
;
5345 x
= fold_rtx (x
, NULL_RTX
);
5349 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) % NBUCKETS
, GET_MODE (x
));
5353 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
5354 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
5361 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5362 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5363 least-significant part of X.
5364 MODE specifies how big a part of X to return.
5366 If the requested operation cannot be done, 0 is returned.
5368 This is similar to gen_lowpart in emit-rtl.c. */
5371 gen_lowpart_if_possible (mode
, x
)
5372 enum machine_mode mode
;
5375 rtx result
= gen_lowpart_common (mode
, x
);
5379 else if (GET_CODE (x
) == MEM
)
5381 /* This is the only other case we handle. */
5382 register int offset
= 0;
5385 #if WORDS_BIG_ENDIAN
5386 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
5387 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
5389 #if BYTES_BIG_ENDIAN
5390 /* Adjust the address so that the address-after-the-data
5392 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
5393 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
5395 new = gen_rtx (MEM
, mode
, plus_constant (XEXP (x
, 0), offset
));
5396 if (! memory_address_p (mode
, XEXP (new, 0)))
5398 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x
);
5399 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x
);
5400 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x
);
5407 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5408 branch. It will be zero if not.
5410 In certain cases, this can cause us to add an equivalence. For example,
5411 if we are following the taken case of
5413 we can add the fact that `i' and '2' are now equivalent.
5415 In any case, we can record that this comparison was passed. If the same
5416 comparison is seen later, we will know its value. */
5419 record_jump_equiv (insn
, taken
)
5423 int cond_known_true
;
5425 enum machine_mode mode
, mode0
, mode1
;
5426 int reversed_nonequality
= 0;
5429 /* Ensure this is the right kind of insn. */
5430 if (! condjump_p (insn
) || simplejump_p (insn
))
5433 /* See if this jump condition is known true or false. */
5435 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 2) == pc_rtx
);
5437 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 1) == pc_rtx
);
5439 /* Get the type of comparison being done and the operands being compared.
5440 If we had to reverse a non-equality condition, record that fact so we
5441 know that it isn't valid for floating-point. */
5442 code
= GET_CODE (XEXP (SET_SRC (PATTERN (insn
)), 0));
5443 op0
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 0), insn
);
5444 op1
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 1), insn
);
5446 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
5447 if (! cond_known_true
)
5449 reversed_nonequality
= (code
!= EQ
&& code
!= NE
);
5450 code
= reverse_condition (code
);
5453 /* The mode is the mode of the non-constant. */
5455 if (mode1
!= VOIDmode
)
5458 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
5461 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5462 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5463 Make any useful entries we can with that information. Called from
5464 above function and called recursively. */
5467 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
)
5469 enum machine_mode mode
;
5471 int reversed_nonequality
;
5473 int op0_hash_code
, op1_hash_code
;
5474 int op0_in_memory
, op0_in_struct
, op1_in_memory
, op1_in_struct
;
5475 struct table_elt
*op0_elt
, *op1_elt
;
5477 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5478 we know that they are also equal in the smaller mode (this is also
5479 true for all smaller modes whether or not there is a SUBREG, but
5480 is not worth testing for with no SUBREG. */
5482 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
5483 && GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
))))
5485 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5486 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5488 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5489 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5490 reversed_nonequality
);
5493 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
5494 && GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
))))
5496 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5497 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5499 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5500 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5501 reversed_nonequality
);
5504 /* Similarly, if this is an NE comparison, and either is a SUBREG
5505 making a smaller mode, we know the whole thing is also NE. */
5507 if (code
== NE
&& GET_CODE (op0
) == SUBREG
5508 && subreg_lowpart_p (op0
)
5509 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
))))
5511 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5512 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5514 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5515 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5516 reversed_nonequality
);
5519 if (code
== NE
&& GET_CODE (op1
) == SUBREG
5520 && subreg_lowpart_p (op1
)
5521 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
))))
5523 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5524 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5526 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5527 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5528 reversed_nonequality
);
5531 /* Hash both operands. */
5534 hash_arg_in_memory
= 0;
5535 hash_arg_in_struct
= 0;
5536 op0_hash_code
= HASH (op0
, mode
);
5537 op0_in_memory
= hash_arg_in_memory
;
5538 op0_in_struct
= hash_arg_in_struct
;
5544 hash_arg_in_memory
= 0;
5545 hash_arg_in_struct
= 0;
5546 op1_hash_code
= HASH (op1
, mode
);
5547 op1_in_memory
= hash_arg_in_memory
;
5548 op1_in_struct
= hash_arg_in_struct
;
5553 /* Look up both operands. */
5554 op0_elt
= lookup (op0
, op0_hash_code
, mode
);
5555 op1_elt
= lookup (op1
, op1_hash_code
, mode
);
5557 /* If we aren't setting two things equal all we can do is save this
5558 comparison. Similarly if this is floating-point. In the latter
5559 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5560 If we record the equality, we might inadvertently delete code
5561 whose intent was to change -0 to +0. */
5563 if (code
!= EQ
|| GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
5565 /* If we reversed a floating-point comparison, if OP0 is not a
5566 register, or if OP1 is neither a register or constant, we can't
5569 if (GET_CODE (op1
) != REG
)
5570 op1
= equiv_constant (op1
);
5572 if ((reversed_nonequality
&& GET_MODE_CLASS (mode
) != MODE_INT
)
5573 || GET_CODE (op0
) != REG
|| op1
== 0)
5576 /* Put OP0 in the hash table if it isn't already. This gives it a
5577 new quantity number. */
5580 if (insert_regs (op0
, NULL_PTR
, 0))
5582 rehash_using_reg (op0
);
5583 op0_hash_code
= HASH (op0
, mode
);
5586 op0_elt
= insert (op0
, NULL_PTR
, op0_hash_code
, mode
);
5587 op0_elt
->in_memory
= op0_in_memory
;
5588 op0_elt
->in_struct
= op0_in_struct
;
5591 qty_comparison_code
[reg_qty
[REGNO (op0
)]] = code
;
5592 if (GET_CODE (op1
) == REG
)
5594 /* Put OP1 in the hash table so it gets a new quantity number. */
5597 if (insert_regs (op1
, NULL_PTR
, 0))
5599 rehash_using_reg (op1
);
5600 op1_hash_code
= HASH (op1
, mode
);
5603 op1_elt
= insert (op1
, NULL_PTR
, op1_hash_code
, mode
);
5604 op1_elt
->in_memory
= op1_in_memory
;
5605 op1_elt
->in_struct
= op1_in_struct
;
5608 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = reg_qty
[REGNO (op1
)];
5609 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = 0;
5613 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = -1;
5614 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = op1
;
5620 /* If both are equivalent, merge the two classes. Save this class for
5621 `cse_set_around_loop'. */
5622 if (op0_elt
&& op1_elt
)
5624 merge_equiv_classes (op0_elt
, op1_elt
);
5625 last_jump_equiv_class
= op0_elt
;
5628 /* For whichever side doesn't have an equivalence, make one. */
5631 if (insert_regs (op0
, op1_elt
, 0))
5633 rehash_using_reg (op0
);
5634 op0_hash_code
= HASH (op0
, mode
);
5637 op0_elt
= insert (op0
, op1_elt
, op0_hash_code
, mode
);
5638 op0_elt
->in_memory
= op0_in_memory
;
5639 op0_elt
->in_struct
= op0_in_struct
;
5640 last_jump_equiv_class
= op0_elt
;
5645 if (insert_regs (op1
, op0_elt
, 0))
5647 rehash_using_reg (op1
);
5648 op1_hash_code
= HASH (op1
, mode
);
5651 op1_elt
= insert (op1
, op0_elt
, op1_hash_code
, mode
);
5652 op1_elt
->in_memory
= op1_in_memory
;
5653 op1_elt
->in_struct
= op1_in_struct
;
5654 last_jump_equiv_class
= op1_elt
;
5658 /* CSE processing for one instruction.
5659 First simplify sources and addresses of all assignments
5660 in the instruction, using previously-computed equivalents values.
5661 Then install the new sources and destinations in the table
5662 of available values.
5664 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
5667 /* Data on one SET contained in the instruction. */
5671 /* The SET rtx itself. */
5673 /* The SET_SRC of the rtx (the original value, if it is changing). */
5675 /* The hash-table element for the SET_SRC of the SET. */
5676 struct table_elt
*src_elt
;
5677 /* Hash code for the SET_SRC. */
5679 /* Hash code for the SET_DEST. */
5681 /* The SET_DEST, with SUBREG, etc., stripped. */
5683 /* Place where the pointer to the INNER_DEST was found. */
5684 rtx
*inner_dest_loc
;
5685 /* Nonzero if the SET_SRC is in memory. */
5687 /* Nonzero if the SET_SRC is in a structure. */
5689 /* Nonzero if the SET_SRC contains something
5690 whose value cannot be predicted and understood. */
5692 /* Original machine mode, in case it becomes a CONST_INT. */
5693 enum machine_mode mode
;
5694 /* A constant equivalent for SET_SRC, if any. */
5696 /* Hash code of constant equivalent for SET_SRC. */
5697 int src_const_hash_code
;
5698 /* Table entry for constant equivalent for SET_SRC, if any. */
5699 struct table_elt
*src_const_elt
;
5703 cse_insn (insn
, in_libcall_block
)
5705 int in_libcall_block
;
5707 register rtx x
= PATTERN (insn
);
5710 register int n_sets
= 0;
5712 /* Records what this insn does to set CC0. */
5713 rtx this_insn_cc0
= 0;
5714 enum machine_mode this_insn_cc0_mode
;
5715 struct write_data writes_memory
;
5716 static struct write_data init
= {0, 0, 0, 0};
5719 struct table_elt
*src_eqv_elt
= 0;
5720 int src_eqv_volatile
;
5721 int src_eqv_in_memory
;
5722 int src_eqv_in_struct
;
5723 int src_eqv_hash_code
;
5728 writes_memory
= init
;
5730 /* Find all the SETs and CLOBBERs in this instruction.
5731 Record all the SETs in the array `set' and count them.
5732 Also determine whether there is a CLOBBER that invalidates
5733 all memory references, or all references at varying addresses. */
5735 if (GET_CODE (x
) == SET
)
5737 sets
= (struct set
*) alloca (sizeof (struct set
));
5740 /* Ignore SETs that are unconditional jumps.
5741 They never need cse processing, so this does not hurt.
5742 The reason is not efficiency but rather
5743 so that we can test at the end for instructions
5744 that have been simplified to unconditional jumps
5745 and not be misled by unchanged instructions
5746 that were unconditional jumps to begin with. */
5747 if (SET_DEST (x
) == pc_rtx
5748 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
5751 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
5752 The hard function value register is used only once, to copy to
5753 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
5754 Ensure we invalidate the destination register. On the 80386 no
5755 other code would invalidate it since it is a fixed_reg.
5756 We need not check the return of apply_change_group; see canon_reg. */
5758 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5760 canon_reg (SET_SRC (x
), insn
);
5761 apply_change_group ();
5762 fold_rtx (SET_SRC (x
), insn
);
5763 invalidate (SET_DEST (x
));
5768 else if (GET_CODE (x
) == PARALLEL
)
5770 register int lim
= XVECLEN (x
, 0);
5772 sets
= (struct set
*) alloca (lim
* sizeof (struct set
));
5774 /* Find all regs explicitly clobbered in this insn,
5775 and ensure they are not replaced with any other regs
5776 elsewhere in this insn.
5777 When a reg that is clobbered is also used for input,
5778 we should presume that that is for a reason,
5779 and we should not substitute some other register
5780 which is not supposed to be clobbered.
5781 Therefore, this loop cannot be merged into the one below
5782 because a CALL may precede a CLOBBER and refer to the
5783 value clobbered. We must not let a canonicalization do
5784 anything in that case. */
5785 for (i
= 0; i
< lim
; i
++)
5787 register rtx y
= XVECEXP (x
, 0, i
);
5788 if (GET_CODE (y
) == CLOBBER
5789 && (GET_CODE (XEXP (y
, 0)) == REG
5790 || GET_CODE (XEXP (y
, 0)) == SUBREG
))
5791 invalidate (XEXP (y
, 0));
5794 for (i
= 0; i
< lim
; i
++)
5796 register rtx y
= XVECEXP (x
, 0, i
);
5797 if (GET_CODE (y
) == SET
)
5799 /* As above, we ignore unconditional jumps and call-insns and
5800 ignore the result of apply_change_group. */
5801 if (GET_CODE (SET_SRC (y
)) == CALL
)
5803 canon_reg (SET_SRC (y
), insn
);
5804 apply_change_group ();
5805 fold_rtx (SET_SRC (y
), insn
);
5806 invalidate (SET_DEST (y
));
5808 else if (SET_DEST (y
) == pc_rtx
5809 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
5812 sets
[n_sets
++].rtl
= y
;
5814 else if (GET_CODE (y
) == CLOBBER
)
5816 /* If we clobber memory, take note of that,
5817 and canon the address.
5818 This does nothing when a register is clobbered
5819 because we have already invalidated the reg. */
5820 if (GET_CODE (XEXP (y
, 0)) == MEM
)
5822 canon_reg (XEXP (y
, 0), NULL_RTX
);
5823 note_mem_written (XEXP (y
, 0), &writes_memory
);
5826 else if (GET_CODE (y
) == USE
5827 && ! (GET_CODE (XEXP (y
, 0)) == REG
5828 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
5829 canon_reg (y
, NULL_RTX
);
5830 else if (GET_CODE (y
) == CALL
)
5832 /* The result of apply_change_group can be ignored; see
5834 canon_reg (y
, insn
);
5835 apply_change_group ();
5840 else if (GET_CODE (x
) == CLOBBER
)
5842 if (GET_CODE (XEXP (x
, 0)) == MEM
)
5844 canon_reg (XEXP (x
, 0), NULL_RTX
);
5845 note_mem_written (XEXP (x
, 0), &writes_memory
);
5849 /* Canonicalize a USE of a pseudo register or memory location. */
5850 else if (GET_CODE (x
) == USE
5851 && ! (GET_CODE (XEXP (x
, 0)) == REG
5852 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
5853 canon_reg (XEXP (x
, 0), NULL_RTX
);
5854 else if (GET_CODE (x
) == CALL
)
5856 /* The result of apply_change_group can be ignored; see canon_reg. */
5857 canon_reg (x
, insn
);
5858 apply_change_group ();
5862 if (n_sets
== 1 && REG_NOTES (insn
) != 0)
5864 /* Store the equivalent value in SRC_EQV, if different. */
5865 rtx tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5867 if (tem
&& ! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
)))
5868 src_eqv
= canon_reg (XEXP (tem
, 0), NULL_RTX
);
5871 /* Canonicalize sources and addresses of destinations.
5872 We do this in a separate pass to avoid problems when a MATCH_DUP is
5873 present in the insn pattern. In that case, we want to ensure that
5874 we don't break the duplicate nature of the pattern. So we will replace
5875 both operands at the same time. Otherwise, we would fail to find an
5876 equivalent substitution in the loop calling validate_change below.
5878 We used to suppress canonicalization of DEST if it appears in SRC,
5879 but we don't do this any more. */
5881 for (i
= 0; i
< n_sets
; i
++)
5883 rtx dest
= SET_DEST (sets
[i
].rtl
);
5884 rtx src
= SET_SRC (sets
[i
].rtl
);
5885 rtx
new = canon_reg (src
, insn
);
5887 if ((GET_CODE (new) == REG
&& GET_CODE (src
) == REG
5888 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
5889 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
5890 || insn_n_dups
[recog_memoized (insn
)] > 0)
5891 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
5893 SET_SRC (sets
[i
].rtl
) = new;
5895 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
5897 validate_change (insn
, &XEXP (dest
, 1),
5898 canon_reg (XEXP (dest
, 1), insn
), 1);
5899 validate_change (insn
, &XEXP (dest
, 2),
5900 canon_reg (XEXP (dest
, 2), insn
), 1);
5903 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
5904 || GET_CODE (dest
) == ZERO_EXTRACT
5905 || GET_CODE (dest
) == SIGN_EXTRACT
)
5906 dest
= XEXP (dest
, 0);
5908 if (GET_CODE (dest
) == MEM
)
5909 canon_reg (dest
, insn
);
5912 /* Now that we have done all the replacements, we can apply the change
5913 group and see if they all work. Note that this will cause some
5914 canonicalizations that would have worked individually not to be applied
5915 because some other canonicalization didn't work, but this should not
5918 The result of apply_change_group can be ignored; see canon_reg. */
5920 apply_change_group ();
5922 /* Set sets[i].src_elt to the class each source belongs to.
5923 Detect assignments from or to volatile things
5924 and set set[i] to zero so they will be ignored
5925 in the rest of this function.
5927 Nothing in this loop changes the hash table or the register chains. */
5929 for (i
= 0; i
< n_sets
; i
++)
5931 register rtx src
, dest
;
5932 register rtx src_folded
;
5933 register struct table_elt
*elt
= 0, *p
;
5934 enum machine_mode mode
;
5937 rtx src_related
= 0;
5938 struct table_elt
*src_const_elt
= 0;
5939 int src_cost
= 10000, src_eqv_cost
= 10000, src_folded_cost
= 10000;
5940 int src_related_cost
= 10000, src_elt_cost
= 10000;
5941 /* Set non-zero if we need to call force_const_mem on with the
5942 contents of src_folded before using it. */
5943 int src_folded_force_flag
= 0;
5945 dest
= SET_DEST (sets
[i
].rtl
);
5946 src
= SET_SRC (sets
[i
].rtl
);
5948 /* If SRC is a constant that has no machine mode,
5949 hash it with the destination's machine mode.
5950 This way we can keep different modes separate. */
5952 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5953 sets
[i
].mode
= mode
;
5957 enum machine_mode eqvmode
= mode
;
5958 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5959 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5961 hash_arg_in_memory
= 0;
5962 hash_arg_in_struct
= 0;
5963 src_eqv
= fold_rtx (src_eqv
, insn
);
5964 src_eqv_hash_code
= HASH (src_eqv
, eqvmode
);
5966 /* Find the equivalence class for the equivalent expression. */
5969 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash_code
, eqvmode
);
5971 src_eqv_volatile
= do_not_record
;
5972 src_eqv_in_memory
= hash_arg_in_memory
;
5973 src_eqv_in_struct
= hash_arg_in_struct
;
5976 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5977 value of the INNER register, not the destination. So it is not
5978 a legal substitution for the source. But save it for later. */
5979 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5982 src_eqv_here
= src_eqv
;
5984 /* Simplify and foldable subexpressions in SRC. Then get the fully-
5985 simplified result, which may not necessarily be valid. */
5986 src_folded
= fold_rtx (src
, insn
);
5988 /* If storing a constant in a bitfield, pre-truncate the constant
5989 so we will be able to record it later. */
5990 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5991 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
5993 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5995 if (GET_CODE (src
) == CONST_INT
5996 && GET_CODE (width
) == CONST_INT
5997 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5998 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6000 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
6001 << INTVAL (width
)) - 1));
6004 /* Compute SRC's hash code, and also notice if it
6005 should not be recorded at all. In that case,
6006 prevent any further processing of this assignment. */
6008 hash_arg_in_memory
= 0;
6009 hash_arg_in_struct
= 0;
6012 sets
[i
].src_hash_code
= HASH (src
, mode
);
6013 sets
[i
].src_volatile
= do_not_record
;
6014 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6015 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6018 /* It is no longer clear why we used to do this, but it doesn't
6019 appear to still be needed. So let's try without it since this
6020 code hurts cse'ing widened ops. */
6021 /* If source is a perverse subreg (such as QI treated as an SI),
6022 treat it as volatile. It may do the work of an SI in one context
6023 where the extra bits are not being used, but cannot replace an SI
6025 if (GET_CODE (src
) == SUBREG
6026 && (GET_MODE_SIZE (GET_MODE (src
))
6027 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
6028 sets
[i
].src_volatile
= 1;
6031 /* Locate all possible equivalent forms for SRC. Try to replace
6032 SRC in the insn with each cheaper equivalent.
6034 We have the following types of equivalents: SRC itself, a folded
6035 version, a value given in a REG_EQUAL note, or a value related
6038 Each of these equivalents may be part of an additional class
6039 of equivalents (if more than one is in the table, they must be in
6040 the same class; we check for this).
6042 If the source is volatile, we don't do any table lookups.
6044 We note any constant equivalent for possible later use in a
6047 if (!sets
[i
].src_volatile
)
6048 elt
= lookup (src
, sets
[i
].src_hash_code
, mode
);
6050 sets
[i
].src_elt
= elt
;
6052 if (elt
&& src_eqv_here
&& src_eqv_elt
)
6054 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
6056 /* The REG_EQUAL is indicating that two formerly distinct
6057 classes are now equivalent. So merge them. */
6058 merge_equiv_classes (elt
, src_eqv_elt
);
6059 src_eqv_hash_code
= HASH (src_eqv
, elt
->mode
);
6060 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash_code
, elt
->mode
);
6066 else if (src_eqv_elt
)
6069 /* Try to find a constant somewhere and record it in `src_const'.
6070 Record its table element, if any, in `src_const_elt'. Look in
6071 any known equivalences first. (If the constant is not in the
6072 table, also set `sets[i].src_const_hash_code'). */
6074 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
6078 src_const_elt
= elt
;
6083 && (CONSTANT_P (src_folded
)
6084 /* Consider (minus (label_ref L1) (label_ref L2)) as
6085 "constant" here so we will record it. This allows us
6086 to fold switch statements when an ADDR_DIFF_VEC is used. */
6087 || (GET_CODE (src_folded
) == MINUS
6088 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
6089 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
6090 src_const
= src_folded
, src_const_elt
= elt
;
6091 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
6092 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
6094 /* If we don't know if the constant is in the table, get its
6095 hash code and look it up. */
6096 if (src_const
&& src_const_elt
== 0)
6098 sets
[i
].src_const_hash_code
= HASH (src_const
, mode
);
6099 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash_code
,
6103 sets
[i
].src_const
= src_const
;
6104 sets
[i
].src_const_elt
= src_const_elt
;
6106 /* If the constant and our source are both in the table, mark them as
6107 equivalent. Otherwise, if a constant is in the table but the source
6108 isn't, set ELT to it. */
6109 if (src_const_elt
&& elt
6110 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
6111 merge_equiv_classes (elt
, src_const_elt
);
6112 else if (src_const_elt
&& elt
== 0)
6113 elt
= src_const_elt
;
6115 /* See if there is a register linearly related to a constant
6116 equivalent of SRC. */
6118 && (GET_CODE (src_const
) == CONST
6119 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
6121 src_related
= use_related_value (src_const
, src_const_elt
);
6124 struct table_elt
*src_related_elt
6125 = lookup (src_related
, HASH (src_related
, mode
), mode
);
6126 if (src_related_elt
&& elt
)
6128 if (elt
->first_same_value
6129 != src_related_elt
->first_same_value
)
6130 /* This can occur when we previously saw a CONST
6131 involving a SYMBOL_REF and then see the SYMBOL_REF
6132 twice. Merge the involved classes. */
6133 merge_equiv_classes (elt
, src_related_elt
);
6136 src_related_elt
= 0;
6138 else if (src_related_elt
&& elt
== 0)
6139 elt
= src_related_elt
;
6143 /* See if we have a CONST_INT that is already in a register in a
6146 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
6147 && GET_MODE_CLASS (mode
) == MODE_INT
6148 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
6150 enum machine_mode wider_mode
;
6152 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
6153 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
6154 && src_related
== 0;
6155 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
6157 struct table_elt
*const_elt
6158 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
6163 for (const_elt
= const_elt
->first_same_value
;
6164 const_elt
; const_elt
= const_elt
->next_same_value
)
6165 if (GET_CODE (const_elt
->exp
) == REG
)
6167 src_related
= gen_lowpart_if_possible (mode
,
6174 /* Another possibility is that we have an AND with a constant in
6175 a mode narrower than a word. If so, it might have been generated
6176 as part of an "if" which would narrow the AND. If we already
6177 have done the AND in a wider mode, we can use a SUBREG of that
6180 if (flag_expensive_optimizations
&& ! src_related
6181 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
6182 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6184 enum machine_mode tmode
;
6185 rtx new_and
= gen_rtx (AND
, VOIDmode
, NULL_RTX
, XEXP (src
, 1));
6187 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6188 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6189 tmode
= GET_MODE_WIDER_MODE (tmode
))
6191 rtx inner
= gen_lowpart_if_possible (tmode
, XEXP (src
, 0));
6192 struct table_elt
*larger_elt
;
6196 PUT_MODE (new_and
, tmode
);
6197 XEXP (new_and
, 0) = inner
;
6198 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
6199 if (larger_elt
== 0)
6202 for (larger_elt
= larger_elt
->first_same_value
;
6203 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6204 if (GET_CODE (larger_elt
->exp
) == REG
)
6207 = gen_lowpart_if_possible (mode
, larger_elt
->exp
);
6217 if (src
== src_folded
)
6220 /* At this point, ELT, if non-zero, points to a class of expressions
6221 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6222 and SRC_RELATED, if non-zero, each contain additional equivalent
6223 expressions. Prune these latter expressions by deleting expressions
6224 already in the equivalence class.
6226 Check for an equivalent identical to the destination. If found,
6227 this is the preferred equivalent since it will likely lead to
6228 elimination of the insn. Indicate this by placing it in
6231 if (elt
) elt
= elt
->first_same_value
;
6232 for (p
= elt
; p
; p
= p
->next_same_value
)
6234 enum rtx_code code
= GET_CODE (p
->exp
);
6236 /* If the expression is not valid, ignore it. Then we do not
6237 have to check for validity below. In most cases, we can use
6238 `rtx_equal_p', since canonicalization has already been done. */
6239 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
6242 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
6244 else if (src_folded
&& GET_CODE (src_folded
) == code
6245 && rtx_equal_p (src_folded
, p
->exp
))
6247 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
6248 && rtx_equal_p (src_eqv_here
, p
->exp
))
6250 else if (src_related
&& GET_CODE (src_related
) == code
6251 && rtx_equal_p (src_related
, p
->exp
))
6254 /* This is the same as the destination of the insns, we want
6255 to prefer it. Copy it to src_related. The code below will
6256 then give it a negative cost. */
6257 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
6262 /* Find the cheapest valid equivalent, trying all the available
6263 possibilities. Prefer items not in the hash table to ones
6264 that are when they are equal cost. Note that we can never
6265 worsen an insn as the current contents will also succeed.
6266 If we find an equivalent identical to the destination, use it as best,
6267 since this insn will probably be eliminated in that case. */
6270 if (rtx_equal_p (src
, dest
))
6273 src_cost
= COST (src
);
6278 if (rtx_equal_p (src_eqv_here
, dest
))
6281 src_eqv_cost
= COST (src_eqv_here
);
6286 if (rtx_equal_p (src_folded
, dest
))
6287 src_folded_cost
= -1;
6289 src_folded_cost
= COST (src_folded
);
6294 if (rtx_equal_p (src_related
, dest
))
6295 src_related_cost
= -1;
6297 src_related_cost
= COST (src_related
);
6300 /* If this was an indirect jump insn, a known label will really be
6301 cheaper even though it looks more expensive. */
6302 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
6303 src_folded
= src_const
, src_folded_cost
= -1;
6305 /* Terminate loop when replacement made. This must terminate since
6306 the current contents will be tested and will always be valid. */
6311 /* Skip invalid entries. */
6312 while (elt
&& GET_CODE (elt
->exp
) != REG
6313 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6314 elt
= elt
->next_same_value
;
6316 if (elt
) src_elt_cost
= elt
->cost
;
6318 /* Find cheapest and skip it for the next time. For items
6319 of equal cost, use this order:
6320 src_folded, src, src_eqv, src_related and hash table entry. */
6321 if (src_folded_cost
<= src_cost
6322 && src_folded_cost
<= src_eqv_cost
6323 && src_folded_cost
<= src_related_cost
6324 && src_folded_cost
<= src_elt_cost
)
6326 trial
= src_folded
, src_folded_cost
= 10000;
6327 if (src_folded_force_flag
)
6328 trial
= force_const_mem (mode
, trial
);
6330 else if (src_cost
<= src_eqv_cost
6331 && src_cost
<= src_related_cost
6332 && src_cost
<= src_elt_cost
)
6333 trial
= src
, src_cost
= 10000;
6334 else if (src_eqv_cost
<= src_related_cost
6335 && src_eqv_cost
<= src_elt_cost
)
6336 trial
= src_eqv_here
, src_eqv_cost
= 10000;
6337 else if (src_related_cost
<= src_elt_cost
)
6338 trial
= src_related
, src_related_cost
= 10000;
6341 trial
= copy_rtx (elt
->exp
);
6342 elt
= elt
->next_same_value
;
6343 src_elt_cost
= 10000;
6346 /* We don't normally have an insn matching (set (pc) (pc)), so
6347 check for this separately here. We will delete such an
6350 Tablejump insns contain a USE of the table, so simply replacing
6351 the operand with the constant won't match. This is simply an
6352 unconditional branch, however, and is therefore valid. Just
6353 insert the substitution here and we will delete and re-emit
6356 if (n_sets
== 1 && dest
== pc_rtx
6358 || (GET_CODE (trial
) == LABEL_REF
6359 && ! condjump_p (insn
))))
6361 /* If TRIAL is a label in front of a jump table, we are
6362 really falling through the switch (this is how casesi
6363 insns work), so we must branch around the table. */
6364 if (GET_CODE (trial
) == CODE_LABEL
6365 && NEXT_INSN (trial
) != 0
6366 && GET_CODE (NEXT_INSN (trial
)) == JUMP_INSN
6367 && (GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_DIFF_VEC
6368 || GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_VEC
))
6370 trial
= gen_rtx (LABEL_REF
, Pmode
, get_label_after (trial
));
6372 SET_SRC (sets
[i
].rtl
) = trial
;
6376 /* Look for a substitution that makes a valid insn. */
6377 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
6379 /* The result of apply_change_group can be ignored; see
6382 validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
6383 canon_reg (SET_SRC (sets
[i
].rtl
), insn
),
6385 apply_change_group ();
6389 /* If we previously found constant pool entries for
6390 constants and this is a constant, try making a
6391 pool entry. Put it in src_folded unless we already have done
6392 this since that is where it likely came from. */
6394 else if (constant_pool_entries_cost
6395 && CONSTANT_P (trial
)
6396 && (src_folded
== 0 || GET_CODE (src_folded
) != MEM
)
6397 && GET_MODE_CLASS (mode
) != MODE_CC
)
6399 src_folded_force_flag
= 1;
6401 src_folded_cost
= constant_pool_entries_cost
;
6405 src
= SET_SRC (sets
[i
].rtl
);
6407 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6408 However, there is an important exception: If both are registers
6409 that are not the head of their equivalence class, replace SET_SRC
6410 with the head of the class. If we do not do this, we will have
6411 both registers live over a portion of the basic block. This way,
6412 their lifetimes will likely abut instead of overlapping. */
6413 if (GET_CODE (dest
) == REG
6414 && REGNO_QTY_VALID_P (REGNO (dest
))
6415 && qty_mode
[reg_qty
[REGNO (dest
)]] == GET_MODE (dest
)
6416 && qty_first_reg
[reg_qty
[REGNO (dest
)]] != REGNO (dest
)
6417 && GET_CODE (src
) == REG
&& REGNO (src
) == REGNO (dest
)
6418 /* Don't do this if the original insn had a hard reg as
6420 && (GET_CODE (sets
[i
].src
) != REG
6421 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
))
6422 /* We can't call canon_reg here because it won't do anything if
6423 SRC is a hard register. */
6425 int first
= qty_first_reg
[reg_qty
[REGNO (src
)]];
6427 src
= SET_SRC (sets
[i
].rtl
)
6428 = first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
6429 : gen_rtx (REG
, GET_MODE (src
), first
);
6431 /* If we had a constant that is cheaper than what we are now
6432 setting SRC to, use that constant. We ignored it when we
6433 thought we could make this into a no-op. */
6434 if (src_const
&& COST (src_const
) < COST (src
)
6435 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
), src_const
, 0))
6439 /* If we made a change, recompute SRC values. */
6440 if (src
!= sets
[i
].src
)
6443 hash_arg_in_memory
= 0;
6444 hash_arg_in_struct
= 0;
6446 sets
[i
].src_hash_code
= HASH (src
, mode
);
6447 sets
[i
].src_volatile
= do_not_record
;
6448 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6449 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6450 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash_code
, mode
);
6453 /* If this is a single SET, we are setting a register, and we have an
6454 equivalent constant, we want to add a REG_NOTE. We don't want
6455 to write a REG_EQUAL note for a constant pseudo since verifying that
6456 that pseudo hasn't been eliminated is a pain. Such a note also
6457 won't help anything. */
6458 if (n_sets
== 1 && src_const
&& GET_CODE (dest
) == REG
6459 && GET_CODE (src_const
) != REG
)
6461 rtx tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6463 /* Record the actual constant value in a REG_EQUAL note, making
6464 a new one if one does not already exist. */
6466 XEXP (tem
, 0) = src_const
;
6468 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
6469 src_const
, REG_NOTES (insn
));
6471 /* If storing a constant value in a register that
6472 previously held the constant value 0,
6473 record this fact with a REG_WAS_0 note on this insn.
6475 Note that the *register* is required to have previously held 0,
6476 not just any register in the quantity and we must point to the
6477 insn that set that register to zero.
6479 Rather than track each register individually, we just see if
6480 the last set for this quantity was for this register. */
6482 if (REGNO_QTY_VALID_P (REGNO (dest
))
6483 && qty_const
[reg_qty
[REGNO (dest
)]] == const0_rtx
)
6485 /* See if we previously had a REG_WAS_0 note. */
6486 rtx note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
6487 rtx const_insn
= qty_const_insn
[reg_qty
[REGNO (dest
)]];
6489 if ((tem
= single_set (const_insn
)) != 0
6490 && rtx_equal_p (SET_DEST (tem
), dest
))
6493 XEXP (note
, 0) = const_insn
;
6495 REG_NOTES (insn
) = gen_rtx (INSN_LIST
, REG_WAS_0
,
6496 const_insn
, REG_NOTES (insn
));
6501 /* Now deal with the destination. */
6503 sets
[i
].inner_dest_loc
= &SET_DEST (sets
[0].rtl
);
6505 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
6506 to the MEM or REG within it. */
6507 while (GET_CODE (dest
) == SIGN_EXTRACT
6508 || GET_CODE (dest
) == ZERO_EXTRACT
6509 || GET_CODE (dest
) == SUBREG
6510 || GET_CODE (dest
) == STRICT_LOW_PART
)
6512 sets
[i
].inner_dest_loc
= &XEXP (dest
, 0);
6513 dest
= XEXP (dest
, 0);
6516 sets
[i
].inner_dest
= dest
;
6518 if (GET_CODE (dest
) == MEM
)
6520 dest
= fold_rtx (dest
, insn
);
6522 /* Decide whether we invalidate everything in memory,
6523 or just things at non-fixed places.
6524 Writing a large aggregate must invalidate everything
6525 because we don't know how long it is. */
6526 note_mem_written (dest
, &writes_memory
);
6529 /* Compute the hash code of the destination now,
6530 before the effects of this instruction are recorded,
6531 since the register values used in the address computation
6532 are those before this instruction. */
6533 sets
[i
].dest_hash_code
= HASH (dest
, mode
);
6535 /* Don't enter a bit-field in the hash table
6536 because the value in it after the store
6537 may not equal what was stored, due to truncation. */
6539 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6540 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6542 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6544 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
6545 && GET_CODE (width
) == CONST_INT
6546 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
6547 && ! (INTVAL (src_const
)
6548 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6549 /* Exception: if the value is constant,
6550 and it won't be truncated, record it. */
6554 /* This is chosen so that the destination will be invalidated
6555 but no new value will be recorded.
6556 We must invalidate because sometimes constant
6557 values can be recorded for bitfields. */
6558 sets
[i
].src_elt
= 0;
6559 sets
[i
].src_volatile
= 1;
6565 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
6567 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
6569 PUT_CODE (insn
, NOTE
);
6570 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
6571 NOTE_SOURCE_FILE (insn
) = 0;
6572 cse_jumps_altered
= 1;
6573 /* One less use of the label this insn used to jump to. */
6574 --LABEL_NUSES (JUMP_LABEL (insn
));
6575 /* No more processing for this set. */
6579 /* If this SET is now setting PC to a label, we know it used to
6580 be a conditional or computed branch. So we see if we can follow
6581 it. If it was a computed branch, delete it and re-emit. */
6582 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
6586 /* If this is not in the format for a simple branch and
6587 we are the only SET in it, re-emit it. */
6588 if (! simplejump_p (insn
) && n_sets
== 1)
6590 rtx
new = emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
6591 JUMP_LABEL (new) = XEXP (src
, 0);
6592 LABEL_NUSES (XEXP (src
, 0))++;
6597 /* Now that we've converted this jump to an unconditional jump,
6598 there is dead code after it. Delete the dead code until we
6599 reach a BARRIER, the end of the function, or a label. Do
6600 not delete NOTEs except for NOTE_INSN_DELETED since later
6601 phases assume these notes are retained. */
6605 while (NEXT_INSN (p
) != 0
6606 && GET_CODE (NEXT_INSN (p
)) != BARRIER
6607 && GET_CODE (NEXT_INSN (p
)) != CODE_LABEL
)
6609 if (GET_CODE (NEXT_INSN (p
)) != NOTE
6610 || NOTE_LINE_NUMBER (NEXT_INSN (p
)) == NOTE_INSN_DELETED
)
6611 delete_insn (NEXT_INSN (p
));
6616 /* If we don't have a BARRIER immediately after INSN, put one there.
6617 Much code assumes that there are no NOTEs between a JUMP_INSN and
6620 if (NEXT_INSN (insn
) == 0
6621 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
6622 emit_barrier_after (insn
);
6624 /* We might have two BARRIERs separated by notes. Delete the second
6627 if (p
!= insn
&& NEXT_INSN (p
) != 0
6628 && GET_CODE (NEXT_INSN (p
)) == BARRIER
)
6629 delete_insn (NEXT_INSN (p
));
6631 cse_jumps_altered
= 1;
6635 /* If destination is volatile, invalidate it and then do no further
6636 processing for this assignment. */
6638 else if (do_not_record
)
6640 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
6641 || GET_CODE (dest
) == MEM
)
6646 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
6647 sets
[i
].dest_hash_code
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
6650 /* If setting CC0, record what it was set to, or a constant, if it
6651 is equivalent to a constant. If it is being set to a floating-point
6652 value, make a COMPARE with the appropriate constant of 0. If we
6653 don't do this, later code can interpret this as a test against
6654 const0_rtx, which can cause problems if we try to put it into an
6655 insn as a floating-point operand. */
6656 if (dest
== cc0_rtx
)
6658 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
6659 this_insn_cc0_mode
= mode
;
6660 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
6661 this_insn_cc0
= gen_rtx (COMPARE
, VOIDmode
, this_insn_cc0
,
6667 /* Now enter all non-volatile source expressions in the hash table
6668 if they are not already present.
6669 Record their equivalence classes in src_elt.
6670 This way we can insert the corresponding destinations into
6671 the same classes even if the actual sources are no longer in them
6672 (having been invalidated). */
6674 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
6675 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
6677 register struct table_elt
*elt
;
6678 register struct table_elt
*classp
= sets
[0].src_elt
;
6679 rtx dest
= SET_DEST (sets
[0].rtl
);
6680 enum machine_mode eqvmode
= GET_MODE (dest
);
6682 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6684 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6687 if (insert_regs (src_eqv
, classp
, 0))
6688 src_eqv_hash_code
= HASH (src_eqv
, eqvmode
);
6689 elt
= insert (src_eqv
, classp
, src_eqv_hash_code
, eqvmode
);
6690 elt
->in_memory
= src_eqv_in_memory
;
6691 elt
->in_struct
= src_eqv_in_struct
;
6695 for (i
= 0; i
< n_sets
; i
++)
6696 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
6697 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
6699 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
6701 /* REG_EQUAL in setting a STRICT_LOW_PART
6702 gives an equivalent for the entire destination register,
6703 not just for the subreg being stored in now.
6704 This is a more interesting equivalence, so we arrange later
6705 to treat the entire reg as the destination. */
6706 sets
[i
].src_elt
= src_eqv_elt
;
6707 sets
[i
].src_hash_code
= src_eqv_hash_code
;
6711 /* Insert source and constant equivalent into hash table, if not
6713 register struct table_elt
*classp
= src_eqv_elt
;
6714 register rtx src
= sets
[i
].src
;
6715 register rtx dest
= SET_DEST (sets
[i
].rtl
);
6716 enum machine_mode mode
6717 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6719 if (sets
[i
].src_elt
== 0)
6721 register struct table_elt
*elt
;
6723 /* Note that these insert_regs calls cannot remove
6724 any of the src_elt's, because they would have failed to
6725 match if not still valid. */
6726 if (insert_regs (src
, classp
, 0))
6727 sets
[i
].src_hash_code
= HASH (src
, mode
);
6728 elt
= insert (src
, classp
, sets
[i
].src_hash_code
, mode
);
6729 elt
->in_memory
= sets
[i
].src_in_memory
;
6730 elt
->in_struct
= sets
[i
].src_in_struct
;
6731 sets
[i
].src_elt
= classp
= elt
;
6734 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
6735 && src
!= sets
[i
].src_const
6736 && ! rtx_equal_p (sets
[i
].src_const
, src
))
6737 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
6738 sets
[i
].src_const_hash_code
, mode
);
6741 else if (sets
[i
].src_elt
== 0)
6742 /* If we did not insert the source into the hash table (e.g., it was
6743 volatile), note the equivalence class for the REG_EQUAL value, if any,
6744 so that the destination goes into that class. */
6745 sets
[i
].src_elt
= src_eqv_elt
;
6747 invalidate_from_clobbers (&writes_memory
, x
);
6749 /* Some registers are invalidated by subroutine calls. Memory is
6750 invalidated by non-constant calls. */
6752 if (GET_CODE (insn
) == CALL_INSN
)
6754 static struct write_data everything
= {0, 1, 1, 1};
6756 if (! CONST_CALL_P (insn
))
6757 invalidate_memory (&everything
);
6758 invalidate_for_call ();
6761 /* Now invalidate everything set by this instruction.
6762 If a SUBREG or other funny destination is being set,
6763 sets[i].rtl is still nonzero, so here we invalidate the reg
6764 a part of which is being set. */
6766 for (i
= 0; i
< n_sets
; i
++)
6769 register rtx dest
= sets
[i
].inner_dest
;
6771 /* Needed for registers to remove the register from its
6772 previous quantity's chain.
6773 Needed for memory if this is a nonvarying address, unless
6774 we have just done an invalidate_memory that covers even those. */
6775 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
6776 || (! writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
6780 /* Make sure registers mentioned in destinations
6781 are safe for use in an expression to be inserted.
6782 This removes from the hash table
6783 any invalid entry that refers to one of these registers.
6785 We don't care about the return value from mention_regs because
6786 we are going to hash the SET_DEST values unconditionally. */
6788 for (i
= 0; i
< n_sets
; i
++)
6789 if (sets
[i
].rtl
&& GET_CODE (SET_DEST (sets
[i
].rtl
)) != REG
)
6790 mention_regs (SET_DEST (sets
[i
].rtl
));
6792 /* We may have just removed some of the src_elt's from the hash table.
6793 So replace each one with the current head of the same class. */
6795 for (i
= 0; i
< n_sets
; i
++)
6798 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
6799 /* If elt was removed, find current head of same class,
6800 or 0 if nothing remains of that class. */
6802 register struct table_elt
*elt
= sets
[i
].src_elt
;
6804 while (elt
&& elt
->prev_same_value
)
6805 elt
= elt
->prev_same_value
;
6807 while (elt
&& elt
->first_same_value
== 0)
6808 elt
= elt
->next_same_value
;
6809 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
6813 /* Now insert the destinations into their equivalence classes. */
6815 for (i
= 0; i
< n_sets
; i
++)
6818 register rtx dest
= SET_DEST (sets
[i
].rtl
);
6819 register struct table_elt
*elt
;
6821 /* Don't record value if we are not supposed to risk allocating
6822 floating-point values in registers that might be wider than
6824 if ((flag_float_store
6825 && GET_CODE (dest
) == MEM
6826 && GET_MODE_CLASS (GET_MODE (dest
)) == MODE_FLOAT
)
6827 /* Don't record values of destinations set inside a libcall block
6828 since we might delete the libcall. Things should have been set
6829 up so we won't want to reuse such a value, but we play it safe
6832 /* If we didn't put a REG_EQUAL value or a source into the hash
6833 table, there is no point is recording DEST. */
6834 || sets
[i
].src_elt
== 0)
6837 /* STRICT_LOW_PART isn't part of the value BEING set,
6838 and neither is the SUBREG inside it.
6839 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6840 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6841 dest
= SUBREG_REG (XEXP (dest
, 0));
6843 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
6844 /* Registers must also be inserted into chains for quantities. */
6845 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
6846 /* If `insert_regs' changes something, the hash code must be
6848 sets
[i
].dest_hash_code
= HASH (dest
, GET_MODE (dest
));
6850 elt
= insert (dest
, sets
[i
].src_elt
,
6851 sets
[i
].dest_hash_code
, GET_MODE (dest
));
6852 elt
->in_memory
= GET_CODE (sets
[i
].inner_dest
) == MEM
;
6855 /* This implicitly assumes a whole struct
6856 need not have MEM_IN_STRUCT_P.
6857 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
6858 elt
->in_struct
= (MEM_IN_STRUCT_P (sets
[i
].inner_dest
)
6859 || sets
[i
].inner_dest
!= SET_DEST (sets
[i
].rtl
));
6862 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6863 narrower than M2, and both M1 and M2 are the same number of words,
6864 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6865 make that equivalence as well.
6867 However, BAR may have equivalences for which gen_lowpart_if_possible
6868 will produce a simpler value than gen_lowpart_if_possible applied to
6869 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6870 BAR's equivalences. If we don't get a simplified form, make
6871 the SUBREG. It will not be used in an equivalence, but will
6872 cause two similar assignments to be detected.
6874 Note the loop below will find SUBREG_REG (DEST) since we have
6875 already entered SRC and DEST of the SET in the table. */
6877 if (GET_CODE (dest
) == SUBREG
6878 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) / UNITS_PER_WORD
6879 == GET_MODE_SIZE (GET_MODE (dest
)) / UNITS_PER_WORD
)
6880 && (GET_MODE_SIZE (GET_MODE (dest
))
6881 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6882 && sets
[i
].src_elt
!= 0)
6884 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
6885 struct table_elt
*elt
, *classp
= 0;
6887 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
6888 elt
= elt
->next_same_value
)
6892 struct table_elt
*src_elt
;
6894 /* Ignore invalid entries. */
6895 if (GET_CODE (elt
->exp
) != REG
6896 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6899 new_src
= gen_lowpart_if_possible (new_mode
, elt
->exp
);
6901 new_src
= gen_rtx (SUBREG
, new_mode
, elt
->exp
, 0);
6903 src_hash
= HASH (new_src
, new_mode
);
6904 src_elt
= lookup (new_src
, src_hash
, new_mode
);
6906 /* Put the new source in the hash table is if isn't
6910 if (insert_regs (new_src
, classp
, 0))
6911 src_hash
= HASH (new_src
, new_mode
);
6912 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
6913 src_elt
->in_memory
= elt
->in_memory
;
6914 src_elt
->in_struct
= elt
->in_struct
;
6916 else if (classp
&& classp
!= src_elt
->first_same_value
)
6917 /* Show that two things that we've seen before are
6918 actually the same. */
6919 merge_equiv_classes (src_elt
, classp
);
6921 classp
= src_elt
->first_same_value
;
6926 /* Special handling for (set REG0 REG1)
6927 where REG0 is the "cheapest", cheaper than REG1.
6928 After cse, REG1 will probably not be used in the sequel,
6929 so (if easily done) change this insn to (set REG1 REG0) and
6930 replace REG1 with REG0 in the previous insn that computed their value.
6931 Then REG1 will become a dead store and won't cloud the situation
6932 for later optimizations.
6934 Do not make this change if REG1 is a hard register, because it will
6935 then be used in the sequel and we may be changing a two-operand insn
6936 into a three-operand insn.
6938 Also do not do this if we are operating on a copy of INSN. */
6940 if (n_sets
== 1 && sets
[0].rtl
&& GET_CODE (SET_DEST (sets
[0].rtl
)) == REG
6941 && NEXT_INSN (PREV_INSN (insn
)) == insn
6942 && GET_CODE (SET_SRC (sets
[0].rtl
)) == REG
6943 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
6944 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
)))
6945 && (qty_first_reg
[reg_qty
[REGNO (SET_SRC (sets
[0].rtl
))]]
6946 == REGNO (SET_DEST (sets
[0].rtl
))))
6948 rtx prev
= PREV_INSN (insn
);
6949 while (prev
&& GET_CODE (prev
) == NOTE
)
6950 prev
= PREV_INSN (prev
);
6952 if (prev
&& GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SET
6953 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
))
6955 rtx dest
= SET_DEST (sets
[0].rtl
);
6956 rtx note
= find_reg_note (prev
, REG_EQUIV
, NULL_RTX
);
6958 validate_change (prev
, & SET_DEST (PATTERN (prev
)), dest
, 1);
6959 validate_change (insn
, & SET_DEST (sets
[0].rtl
),
6960 SET_SRC (sets
[0].rtl
), 1);
6961 validate_change (insn
, & SET_SRC (sets
[0].rtl
), dest
, 1);
6962 apply_change_group ();
6964 /* If REG1 was equivalent to a constant, REG0 is not. */
6966 PUT_REG_NOTE_KIND (note
, REG_EQUAL
);
6968 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6969 any REG_WAS_0 note on INSN to PREV. */
6970 note
= find_reg_note (prev
, REG_WAS_0
, NULL_RTX
);
6972 remove_note (prev
, note
);
6974 note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
6977 remove_note (insn
, note
);
6978 XEXP (note
, 1) = REG_NOTES (prev
);
6979 REG_NOTES (prev
) = note
;
6984 /* If this is a conditional jump insn, record any known equivalences due to
6985 the condition being tested. */
6987 last_jump_equiv_class
= 0;
6988 if (GET_CODE (insn
) == JUMP_INSN
6989 && n_sets
== 1 && GET_CODE (x
) == SET
6990 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
6991 record_jump_equiv (insn
, 0);
6994 /* If the previous insn set CC0 and this insn no longer references CC0,
6995 delete the previous insn. Here we use the fact that nothing expects CC0
6996 to be valid over an insn, which is true until the final pass. */
6997 if (prev_insn
&& GET_CODE (prev_insn
) == INSN
6998 && (tem
= single_set (prev_insn
)) != 0
6999 && SET_DEST (tem
) == cc0_rtx
7000 && ! reg_mentioned_p (cc0_rtx
, x
))
7002 PUT_CODE (prev_insn
, NOTE
);
7003 NOTE_LINE_NUMBER (prev_insn
) = NOTE_INSN_DELETED
;
7004 NOTE_SOURCE_FILE (prev_insn
) = 0;
7007 prev_insn_cc0
= this_insn_cc0
;
7008 prev_insn_cc0_mode
= this_insn_cc0_mode
;
7014 /* Store 1 in *WRITES_PTR for those categories of memory ref
7015 that must be invalidated when the expression WRITTEN is stored in.
7016 If WRITTEN is null, say everything must be invalidated. */
7019 note_mem_written (written
, writes_ptr
)
7021 struct write_data
*writes_ptr
;
7023 static struct write_data everything
= {0, 1, 1, 1};
7026 *writes_ptr
= everything
;
7027 else if (GET_CODE (written
) == MEM
)
7029 /* Pushing or popping the stack invalidates just the stack pointer. */
7030 rtx addr
= XEXP (written
, 0);
7031 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
7032 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
7033 && GET_CODE (XEXP (addr
, 0)) == REG
7034 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
7039 else if (GET_MODE (written
) == BLKmode
)
7040 *writes_ptr
= everything
;
7041 else if (cse_rtx_addr_varies_p (written
))
7043 /* A varying address that is a sum indicates an array element,
7044 and that's just as good as a structure element
7045 in implying that we need not invalidate scalar variables.
7046 However, we must allow QImode aliasing of scalars, because the
7047 ANSI C standard allows character pointers to alias anything. */
7048 if (! ((MEM_IN_STRUCT_P (written
)
7049 || GET_CODE (XEXP (written
, 0)) == PLUS
)
7050 && GET_MODE (written
) != QImode
))
7051 writes_ptr
->all
= 1;
7052 writes_ptr
->nonscalar
= 1;
7054 writes_ptr
->var
= 1;
7058 /* Perform invalidation on the basis of everything about an insn
7059 except for invalidating the actual places that are SET in it.
7060 This includes the places CLOBBERed, and anything that might
7061 alias with something that is SET or CLOBBERed.
7063 W points to the writes_memory for this insn, a struct write_data
7064 saying which kinds of memory references must be invalidated.
7065 X is the pattern of the insn. */
7068 invalidate_from_clobbers (w
, x
)
7069 struct write_data
*w
;
7072 /* If W->var is not set, W specifies no action.
7073 If W->all is set, this step gets all memory refs
7074 so they can be ignored in the rest of this function. */
7076 invalidate_memory (w
);
7080 if (reg_tick
[STACK_POINTER_REGNUM
] >= 0)
7081 reg_tick
[STACK_POINTER_REGNUM
]++;
7083 /* This should be *very* rare. */
7084 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
7085 invalidate (stack_pointer_rtx
);
7088 if (GET_CODE (x
) == CLOBBER
)
7090 rtx ref
= XEXP (x
, 0);
7092 && (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7093 || (GET_CODE (ref
) == MEM
&& ! w
->all
)))
7096 else if (GET_CODE (x
) == PARALLEL
)
7099 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
7101 register rtx y
= XVECEXP (x
, 0, i
);
7102 if (GET_CODE (y
) == CLOBBER
)
7104 rtx ref
= XEXP (y
, 0);
7106 &&(GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
7107 || (GET_CODE (ref
) == MEM
&& !w
->all
)))
7114 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7115 and replace any registers in them with either an equivalent constant
7116 or the canonical form of the register. If we are inside an address,
7117 only do this if the address remains valid.
7119 OBJECT is 0 except when within a MEM in which case it is the MEM.
7121 Return the replacement for X. */
7124 cse_process_notes (x
, object
)
7128 enum rtx_code code
= GET_CODE (x
);
7129 char *fmt
= GET_RTX_FORMAT (code
);
7146 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), x
);
7151 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
7152 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
7154 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
7160 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
7161 /* We don't substitute VOIDmode constants into these rtx,
7162 since they would impede folding. */
7163 if (GET_MODE (new) != VOIDmode
)
7164 validate_change (object
, &XEXP (x
, 0), new, 0);
7169 i
= reg_qty
[REGNO (x
)];
7171 /* Return a constant or a constant register. */
7172 if (REGNO_QTY_VALID_P (REGNO (x
))
7173 && qty_const
[i
] != 0
7174 && (CONSTANT_P (qty_const
[i
])
7175 || GET_CODE (qty_const
[i
]) == REG
))
7177 rtx
new = gen_lowpart_if_possible (GET_MODE (x
), qty_const
[i
]);
7182 /* Otherwise, canonicalize this register. */
7183 return canon_reg (x
, NULL_RTX
);
7186 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
7188 validate_change (object
, &XEXP (x
, i
),
7189 cse_process_notes (XEXP (x
, i
), object
), 0);
7194 /* Find common subexpressions between the end test of a loop and the beginning
7195 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7197 Often we have a loop where an expression in the exit test is used
7198 in the body of the loop. For example "while (*p) *q++ = *p++;".
7199 Because of the way we duplicate the loop exit test in front of the loop,
7200 however, we don't detect that common subexpression. This will be caught
7201 when global cse is implemented, but this is a quite common case.
7203 This function handles the most common cases of these common expressions.
7204 It is called after we have processed the basic block ending with the
7205 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7206 jumps to a label used only once. */
7209 cse_around_loop (loop_start
)
7214 struct table_elt
*p
;
7216 /* If the jump at the end of the loop doesn't go to the start, we don't
7218 for (insn
= PREV_INSN (loop_start
);
7219 insn
&& (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) >= 0);
7220 insn
= PREV_INSN (insn
))
7224 || GET_CODE (insn
) != NOTE
7225 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
7228 /* If the last insn of the loop (the end test) was an NE comparison,
7229 we will interpret it as an EQ comparison, since we fell through
7230 the loop. Any equivalences resulting from that comparison are
7231 therefore not valid and must be invalidated. */
7232 if (last_jump_equiv_class
)
7233 for (p
= last_jump_equiv_class
->first_same_value
; p
;
7234 p
= p
->next_same_value
)
7235 if (GET_CODE (p
->exp
) == MEM
|| GET_CODE (p
->exp
) == REG
7236 || GET_CODE (p
->exp
) == SUBREG
)
7237 invalidate (p
->exp
);
7239 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7240 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7242 The only thing we do with SET_DEST is invalidate entries, so we
7243 can safely process each SET in order. It is slightly less efficient
7244 to do so, but we only want to handle the most common cases. */
7246 for (insn
= NEXT_INSN (loop_start
);
7247 GET_CODE (insn
) != CALL_INSN
&& GET_CODE (insn
) != CODE_LABEL
7248 && ! (GET_CODE (insn
) == NOTE
7249 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
7250 insn
= NEXT_INSN (insn
))
7252 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7253 && (GET_CODE (PATTERN (insn
)) == SET
7254 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
7255 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
7256 else if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7257 && GET_CODE (PATTERN (insn
)) == PARALLEL
)
7258 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7259 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
7260 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
7261 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
7266 /* Variable used for communications between the next two routines. */
7268 static struct write_data skipped_writes_memory
;
7270 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7271 since they are done elsewhere. This function is called via note_stores. */
7274 invalidate_skipped_set (dest
, set
)
7278 if (GET_CODE (set
) == CLOBBER
7285 if (GET_CODE (dest
) == MEM
)
7286 note_mem_written (dest
, &skipped_writes_memory
);
7288 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7289 || (! skipped_writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
7293 /* Invalidate all insns from START up to the end of the function or the
7294 next label. This called when we wish to CSE around a block that is
7295 conditionally executed. */
7298 invalidate_skipped_block (start
)
7303 static struct write_data init
= {0, 0, 0, 0};
7304 static struct write_data everything
= {0, 1, 1, 1};
7306 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
7307 insn
= NEXT_INSN (insn
))
7309 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
7312 skipped_writes_memory
= init
;
7314 if (GET_CODE (insn
) == CALL_INSN
)
7316 invalidate_for_call ();
7317 skipped_writes_memory
= everything
;
7320 note_stores (PATTERN (insn
), invalidate_skipped_set
);
7321 invalidate_from_clobbers (&skipped_writes_memory
, PATTERN (insn
));
7325 /* Used for communication between the following two routines; contains a
7326 value to be checked for modification. */
7328 static rtx cse_check_loop_start_value
;
7330 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7331 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7334 cse_check_loop_start (x
, set
)
7338 if (cse_check_loop_start_value
== 0
7339 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
7342 if ((GET_CODE (x
) == MEM
&& GET_CODE (cse_check_loop_start_value
) == MEM
)
7343 || reg_overlap_mentioned_p (x
, cse_check_loop_start_value
))
7344 cse_check_loop_start_value
= 0;
7347 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7348 a loop that starts with the label at LOOP_START.
7350 If X is a SET, we see if its SET_SRC is currently in our hash table.
7351 If so, we see if it has a value equal to some register used only in the
7352 loop exit code (as marked by jump.c).
7354 If those two conditions are true, we search backwards from the start of
7355 the loop to see if that same value was loaded into a register that still
7356 retains its value at the start of the loop.
7358 If so, we insert an insn after the load to copy the destination of that
7359 load into the equivalent register and (try to) replace our SET_SRC with that
7362 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7365 cse_set_around_loop (x
, insn
, loop_start
)
7371 struct table_elt
*src_elt
;
7372 static struct write_data init
= {0, 0, 0, 0};
7373 struct write_data writes_memory
;
7375 writes_memory
= init
;
7377 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7378 are setting PC or CC0 or whose SET_SRC is already a register. */
7379 if (GET_CODE (x
) == SET
7380 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
7381 && GET_CODE (SET_SRC (x
)) != REG
)
7383 src_elt
= lookup (SET_SRC (x
),
7384 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
7385 GET_MODE (SET_DEST (x
)));
7388 for (src_elt
= src_elt
->first_same_value
; src_elt
;
7389 src_elt
= src_elt
->next_same_value
)
7390 if (GET_CODE (src_elt
->exp
) == REG
&& REG_LOOP_TEST_P (src_elt
->exp
)
7391 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
7395 /* Look for an insn in front of LOOP_START that sets
7396 something in the desired mode to SET_SRC (x) before we hit
7397 a label or CALL_INSN. */
7399 for (p
= prev_nonnote_insn (loop_start
);
7400 p
&& GET_CODE (p
) != CALL_INSN
7401 && GET_CODE (p
) != CODE_LABEL
;
7402 p
= prev_nonnote_insn (p
))
7403 if ((set
= single_set (p
)) != 0
7404 && GET_CODE (SET_DEST (set
)) == REG
7405 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
7406 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
7408 /* We now have to ensure that nothing between P
7409 and LOOP_START modified anything referenced in
7410 SET_SRC (x). We know that nothing within the loop
7411 can modify it, or we would have invalidated it in
7415 cse_check_loop_start_value
= SET_SRC (x
);
7416 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
7417 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
7418 note_stores (PATTERN (q
), cse_check_loop_start
);
7420 /* If nothing was changed and we can replace our
7421 SET_SRC, add an insn after P to copy its destination
7422 to what we will be replacing SET_SRC with. */
7423 if (cse_check_loop_start_value
7424 && validate_change (insn
, &SET_SRC (x
),
7426 emit_insn_after (gen_move_insn (src_elt
->exp
,
7434 /* Now invalidate anything modified by X. */
7435 note_mem_written (SET_DEST (x
), &writes_memory
);
7437 if (writes_memory
.var
)
7438 invalidate_memory (&writes_memory
);
7440 /* See comment on similar code in cse_insn for explanation of these tests. */
7441 if (GET_CODE (SET_DEST (x
)) == REG
|| GET_CODE (SET_DEST (x
)) == SUBREG
7442 || (GET_CODE (SET_DEST (x
)) == MEM
&& ! writes_memory
.all
7443 && ! cse_rtx_addr_varies_p (SET_DEST (x
))))
7444 invalidate (SET_DEST (x
));
7447 /* Find the end of INSN's basic block and return its range,
7448 the total number of SETs in all the insns of the block, the last insn of the
7449 block, and the branch path.
7451 The branch path indicates which branches should be followed. If a non-zero
7452 path size is specified, the block should be rescanned and a different set
7453 of branches will be taken. The branch path is only used if
7454 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
7456 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
7457 used to describe the block. It is filled in with the information about
7458 the current block. The incoming structure's branch path, if any, is used
7459 to construct the output branch path. */
7462 cse_end_of_basic_block (insn
, data
, follow_jumps
, after_loop
, skip_blocks
)
7464 struct cse_basic_block_data
*data
;
7471 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
7472 rtx next
= GET_RTX_CLASS (GET_CODE (insn
)) == 'i' ? insn
: next_real_insn (insn
);
7473 int path_size
= data
->path_size
;
7477 /* Update the previous branch path, if any. If the last branch was
7478 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
7479 shorten the path by one and look at the previous branch. We know that
7480 at least one branch must have been taken if PATH_SIZE is non-zero. */
7481 while (path_size
> 0)
7483 if (data
->path
[path_size
- 1].status
!= NOT_TAKEN
)
7485 data
->path
[path_size
- 1].status
= NOT_TAKEN
;
7492 /* Scan to end of this basic block. */
7493 while (p
&& GET_CODE (p
) != CODE_LABEL
)
7495 /* Don't cse out the end of a loop. This makes a difference
7496 only for the unusual loops that always execute at least once;
7497 all other loops have labels there so we will stop in any case.
7498 Cse'ing out the end of the loop is dangerous because it
7499 might cause an invariant expression inside the loop
7500 to be reused after the end of the loop. This would make it
7501 hard to move the expression out of the loop in loop.c,
7502 especially if it is one of several equivalent expressions
7503 and loop.c would like to eliminate it.
7505 If we are running after loop.c has finished, we can ignore
7506 the NOTE_INSN_LOOP_END. */
7508 if (! after_loop
&& GET_CODE (p
) == NOTE
7509 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
7512 /* Don't cse over a call to setjmp; on some machines (eg vax)
7513 the regs restored by the longjmp come from
7514 a later time than the setjmp. */
7515 if (GET_CODE (p
) == NOTE
7516 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
7519 /* A PARALLEL can have lots of SETs in it,
7520 especially if it is really an ASM_OPERANDS. */
7521 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
7522 && GET_CODE (PATTERN (p
)) == PARALLEL
)
7523 nsets
+= XVECLEN (PATTERN (p
), 0);
7524 else if (GET_CODE (p
) != NOTE
)
7527 /* Ignore insns made by CSE; they cannot affect the boundaries of
7530 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
7531 high_cuid
= INSN_CUID (p
);
7532 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
7533 low_cuid
= INSN_CUID (p
);
7535 /* See if this insn is in our branch path. If it is and we are to
7537 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
7539 if (data
->path
[path_entry
].status
!= NOT_TAKEN
)
7542 /* Point to next entry in path, if any. */
7546 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
7547 was specified, we haven't reached our maximum path length, there are
7548 insns following the target of the jump, this is the only use of the
7549 jump label, and the target label is preceded by a BARRIER.
7551 Alternatively, we can follow the jump if it branches around a
7552 block of code and there are no other branches into the block.
7553 In this case invalidate_skipped_block will be called to invalidate any
7554 registers set in the block when following the jump. */
7556 else if ((follow_jumps
|| skip_blocks
) && path_size
< PATHLENGTH
- 1
7557 && GET_CODE (p
) == JUMP_INSN
7558 && GET_CODE (PATTERN (p
)) == SET
7559 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
7560 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
7561 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
7563 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
7564 if ((GET_CODE (q
) != NOTE
7565 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
7566 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_SETJMP
)
7567 && (GET_CODE (q
) != CODE_LABEL
|| LABEL_NUSES (q
) != 0))
7570 /* If we ran into a BARRIER, this code is an extension of the
7571 basic block when the branch is taken. */
7572 if (follow_jumps
&& q
!= 0 && GET_CODE (q
) == BARRIER
)
7574 /* Don't allow ourself to keep walking around an
7575 always-executed loop. */
7576 if (next_real_insn (q
) == next
)
7582 /* Similarly, don't put a branch in our path more than once. */
7583 for (i
= 0; i
< path_entry
; i
++)
7584 if (data
->path
[i
].branch
== p
)
7587 if (i
!= path_entry
)
7590 data
->path
[path_entry
].branch
= p
;
7591 data
->path
[path_entry
++].status
= TAKEN
;
7593 /* This branch now ends our path. It was possible that we
7594 didn't see this branch the last time around (when the
7595 insn in front of the target was a JUMP_INSN that was
7596 turned into a no-op). */
7597 path_size
= path_entry
;
7600 /* Mark block so we won't scan it again later. */
7601 PUT_MODE (NEXT_INSN (p
), QImode
);
7603 /* Detect a branch around a block of code. */
7604 else if (skip_blocks
&& q
!= 0 && GET_CODE (q
) != CODE_LABEL
)
7608 if (next_real_insn (q
) == next
)
7614 for (i
= 0; i
< path_entry
; i
++)
7615 if (data
->path
[i
].branch
== p
)
7618 if (i
!= path_entry
)
7621 /* This is no_labels_between_p (p, q) with an added check for
7622 reaching the end of a function (in case Q precedes P). */
7623 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
7624 if (GET_CODE (tmp
) == CODE_LABEL
)
7629 data
->path
[path_entry
].branch
= p
;
7630 data
->path
[path_entry
++].status
= AROUND
;
7632 path_size
= path_entry
;
7635 /* Mark block so we won't scan it again later. */
7636 PUT_MODE (NEXT_INSN (p
), QImode
);
7643 data
->low_cuid
= low_cuid
;
7644 data
->high_cuid
= high_cuid
;
7645 data
->nsets
= nsets
;
7648 /* If all jumps in the path are not taken, set our path length to zero
7649 so a rescan won't be done. */
7650 for (i
= path_size
- 1; i
>= 0; i
--)
7651 if (data
->path
[i
].status
!= NOT_TAKEN
)
7655 data
->path_size
= 0;
7657 data
->path_size
= path_size
;
7659 /* End the current branch path. */
7660 data
->path
[path_size
].branch
= 0;
7663 /* Perform cse on the instructions of a function.
7664 F is the first instruction.
7665 NREGS is one plus the highest pseudo-reg number used in the instruction.
7667 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7668 (only if -frerun-cse-after-loop).
7670 Returns 1 if jump_optimize should be redone due to simplifications
7671 in conditional jump instructions. */
7674 cse_main (f
, nregs
, after_loop
, file
)
7680 struct cse_basic_block_data val
;
7681 register rtx insn
= f
;
7684 cse_jumps_altered
= 0;
7685 constant_pool_entries_cost
= 0;
7692 all_minus_one
= (int *) alloca (nregs
* sizeof (int));
7693 consec_ints
= (int *) alloca (nregs
* sizeof (int));
7695 for (i
= 0; i
< nregs
; i
++)
7697 all_minus_one
[i
] = -1;
7701 reg_next_eqv
= (int *) alloca (nregs
* sizeof (int));
7702 reg_prev_eqv
= (int *) alloca (nregs
* sizeof (int));
7703 reg_qty
= (int *) alloca (nregs
* sizeof (int));
7704 reg_in_table
= (int *) alloca (nregs
* sizeof (int));
7705 reg_tick
= (int *) alloca (nregs
* sizeof (int));
7707 /* Discard all the free elements of the previous function
7708 since they are allocated in the temporarily obstack. */
7709 bzero (table
, sizeof table
);
7710 free_element_chain
= 0;
7711 n_elements_made
= 0;
7713 /* Find the largest uid. */
7715 max_uid
= get_max_uid ();
7716 uid_cuid
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
7717 bzero (uid_cuid
, (max_uid
+ 1) * sizeof (int));
7719 /* Compute the mapping from uids to cuids.
7720 CUIDs are numbers assigned to insns, like uids,
7721 except that cuids increase monotonically through the code.
7722 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7723 between two insns is not affected by -g. */
7725 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
7727 if (GET_CODE (insn
) != NOTE
7728 || NOTE_LINE_NUMBER (insn
) < 0)
7729 INSN_CUID (insn
) = ++i
;
7731 /* Give a line number note the same cuid as preceding insn. */
7732 INSN_CUID (insn
) = i
;
7735 /* Initialize which registers are clobbered by calls. */
7737 CLEAR_HARD_REG_SET (regs_invalidated_by_call
);
7739 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
7740 if ((call_used_regs
[i
]
7741 /* Used to check !fixed_regs[i] here, but that isn't safe;
7742 fixed regs are still call-clobbered, and sched can get
7743 confused if they can "live across calls".
7745 The frame pointer is always preserved across calls. The arg
7746 pointer is if it is fixed. The stack pointer usually is, unless
7747 RETURN_POPS_ARGS, in which case an explicit CLOBBER
7748 will be present. If we are generating PIC code, the PIC offset
7749 table register is preserved across calls. */
7751 && i
!= STACK_POINTER_REGNUM
7752 && i
!= FRAME_POINTER_REGNUM
7753 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
7754 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
7756 #ifdef PIC_OFFSET_TABLE_REGNUM
7757 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
7761 SET_HARD_REG_BIT (regs_invalidated_by_call
, i
);
7763 /* Loop over basic blocks.
7764 Compute the maximum number of qty's needed for each basic block
7765 (which is 2 for each SET). */
7769 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
7770 flag_cse_skip_blocks
);
7772 /* If this basic block was already processed or has no sets, skip it. */
7773 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
7775 PUT_MODE (insn
, VOIDmode
);
7776 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
7781 cse_basic_block_start
= val
.low_cuid
;
7782 cse_basic_block_end
= val
.high_cuid
;
7783 max_qty
= val
.nsets
* 2;
7786 fprintf (file
, ";; Processing block from %d to %d, %d sets.\n",
7787 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
7790 /* Make MAX_QTY bigger to give us room to optimize
7791 past the end of this basic block, if that should prove useful. */
7797 /* If this basic block is being extended by following certain jumps,
7798 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7799 Otherwise, we start after this basic block. */
7800 if (val
.path_size
> 0)
7801 cse_basic_block (insn
, val
.last
, val
.path
, 0);
7804 int old_cse_jumps_altered
= cse_jumps_altered
;
7807 /* When cse changes a conditional jump to an unconditional
7808 jump, we want to reprocess the block, since it will give
7809 us a new branch path to investigate. */
7810 cse_jumps_altered
= 0;
7811 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
7812 if (cse_jumps_altered
== 0
7813 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
7816 cse_jumps_altered
|= old_cse_jumps_altered
;
7824 /* Tell refers_to_mem_p that qty_const info is not available. */
7827 if (max_elements_made
< n_elements_made
)
7828 max_elements_made
= n_elements_made
;
7830 return cse_jumps_altered
;
7833 /* Process a single basic block. FROM and TO and the limits of the basic
7834 block. NEXT_BRANCH points to the branch path when following jumps or
7835 a null path when not following jumps.
7837 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
7838 loop. This is true when we are being called for the last time on a
7839 block and this CSE pass is before loop.c. */
7842 cse_basic_block (from
, to
, next_branch
, around_loop
)
7843 register rtx from
, to
;
7844 struct branch_path
*next_branch
;
7849 int in_libcall_block
= 0;
7851 /* Each of these arrays is undefined before max_reg, so only allocate
7852 the space actually needed and adjust the start below. */
7854 qty_first_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
7855 qty_last_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
7856 qty_mode
= (enum machine_mode
*) alloca ((max_qty
- max_reg
) * sizeof (enum machine_mode
));
7857 qty_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
7858 qty_const_insn
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
7860 = (enum rtx_code
*) alloca ((max_qty
- max_reg
) * sizeof (enum rtx_code
));
7861 qty_comparison_qty
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
7862 qty_comparison_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
7864 qty_first_reg
-= max_reg
;
7865 qty_last_reg
-= max_reg
;
7866 qty_mode
-= max_reg
;
7867 qty_const
-= max_reg
;
7868 qty_const_insn
-= max_reg
;
7869 qty_comparison_code
-= max_reg
;
7870 qty_comparison_qty
-= max_reg
;
7871 qty_comparison_const
-= max_reg
;
7875 /* TO might be a label. If so, protect it from being deleted. */
7876 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
7879 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
7881 register enum rtx_code code
;
7883 /* See if this is a branch that is part of the path. If so, and it is
7884 to be taken, do so. */
7885 if (next_branch
->branch
== insn
)
7887 enum taken status
= next_branch
++->status
;
7888 if (status
!= NOT_TAKEN
)
7890 if (status
== TAKEN
)
7891 record_jump_equiv (insn
, 1);
7893 invalidate_skipped_block (NEXT_INSN (insn
));
7895 /* Set the last insn as the jump insn; it doesn't affect cc0.
7896 Then follow this branch. */
7901 insn
= JUMP_LABEL (insn
);
7906 code
= GET_CODE (insn
);
7907 if (GET_MODE (insn
) == QImode
)
7908 PUT_MODE (insn
, VOIDmode
);
7910 if (GET_RTX_CLASS (code
) == 'i')
7912 /* Process notes first so we have all notes in canonical forms when
7913 looking for duplicate operations. */
7915 if (REG_NOTES (insn
))
7916 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
7918 /* Track when we are inside in LIBCALL block. Inside such a block,
7919 we do not want to record destinations. The last insn of a
7920 LIBCALL block is not considered to be part of the block, since
7921 its destination is the result of the block and hence should be
7924 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
7925 in_libcall_block
= 1;
7926 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
7927 in_libcall_block
= 0;
7929 cse_insn (insn
, in_libcall_block
);
7932 /* If INSN is now an unconditional jump, skip to the end of our
7933 basic block by pretending that we just did the last insn in the
7934 basic block. If we are jumping to the end of our block, show
7935 that we can have one usage of TO. */
7937 if (simplejump_p (insn
))
7942 if (JUMP_LABEL (insn
) == to
)
7945 /* Maybe TO was deleted because the jump is unconditional.
7946 If so, there is nothing left in this basic block. */
7947 /* ??? Perhaps it would be smarter to set TO
7948 to whatever follows this insn,
7949 and pretend the basic block had always ended here. */
7950 if (INSN_DELETED_P (to
))
7953 insn
= PREV_INSN (to
);
7956 /* See if it is ok to keep on going past the label
7957 which used to end our basic block. Remember that we incremented
7958 the count of that label, so we decrement it here. If we made
7959 a jump unconditional, TO_USAGE will be one; in that case, we don't
7960 want to count the use in that jump. */
7962 if (to
!= 0 && NEXT_INSN (insn
) == to
7963 && GET_CODE (to
) == CODE_LABEL
&& --LABEL_NUSES (to
) == to_usage
)
7965 struct cse_basic_block_data val
;
7967 insn
= NEXT_INSN (to
);
7969 if (LABEL_NUSES (to
) == 0)
7972 /* Find the end of the following block. Note that we won't be
7973 following branches in this case. If TO was the last insn
7974 in the function, we are done. Similarly, if we deleted the
7975 insn after TO, it must have been because it was preceded by
7976 a BARRIER. In that case, we are done with this block because it
7977 has no continuation. */
7979 if (insn
== 0 || INSN_DELETED_P (insn
))
7984 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
7986 /* If the tables we allocated have enough space left
7987 to handle all the SETs in the next basic block,
7988 continue through it. Otherwise, return,
7989 and that block will be scanned individually. */
7990 if (val
.nsets
* 2 + next_qty
> max_qty
)
7993 cse_basic_block_start
= val
.low_cuid
;
7994 cse_basic_block_end
= val
.high_cuid
;
7997 /* Prevent TO from being deleted if it is a label. */
7998 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
8001 /* Back up so we process the first insn in the extension. */
8002 insn
= PREV_INSN (insn
);
8006 if (next_qty
> max_qty
)
8009 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8010 the previous insn is the only insn that branches to the head of a loop,
8011 we can cse into the loop. Don't do this if we changed the jump
8012 structure of a loop unless we aren't going to be following jumps. */
8014 if ((cse_jumps_altered
== 0
8015 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
8016 && around_loop
&& to
!= 0
8017 && GET_CODE (to
) == NOTE
&& NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
8018 && GET_CODE (PREV_INSN (to
)) == JUMP_INSN
8019 && JUMP_LABEL (PREV_INSN (to
)) != 0
8020 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to
))) == 1)
8021 cse_around_loop (JUMP_LABEL (PREV_INSN (to
)));
8023 return to
? NEXT_INSN (to
) : 0;
8026 /* Count the number of times registers are used (not set) in X.
8027 COUNTS is an array in which we accumulate the count, INCR is how much
8028 we count each register usage. */
8031 count_reg_usage (x
, counts
, incr
)
8036 enum rtx_code code
= GET_CODE (x
);
8043 counts
[REGNO (x
)] += incr
;
8057 /* Unless we are setting a REG, count everything in SET_DEST. */
8058 if (GET_CODE (SET_DEST (x
)) != REG
)
8059 count_reg_usage (SET_DEST (x
), counts
, incr
);
8060 count_reg_usage (SET_SRC (x
), counts
, incr
);
8066 count_reg_usage (PATTERN (x
), counts
, incr
);
8068 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8072 count_reg_usage (REG_NOTES (x
), counts
, incr
);
8077 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
8078 count_reg_usage (XEXP (x
, 0), counts
, incr
);
8080 count_reg_usage (XEXP (x
, 1), counts
, incr
);
8084 fmt
= GET_RTX_FORMAT (code
);
8085 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
8088 count_reg_usage (XEXP (x
, i
), counts
, incr
);
8089 else if (fmt
[i
] == 'E')
8090 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8091 count_reg_usage (XVECEXP (x
, i
, j
), counts
, incr
);
8095 /* Scan all the insns and delete any that are dead; i.e., they store a register
8096 that is never used or they copy a register to itself.
8098 This is used to remove insns made obviously dead by cse. It improves the
8099 heuristics in loop since it won't try to move dead invariants out of loops
8100 or make givs for dead quantities. The remaining passes of the compilation
8101 are also sped up. */
8104 delete_dead_from_cse (insns
, nreg
)
8108 int *counts
= (int *) alloca (nreg
* sizeof (int));
8114 /* First count the number of times each register is used. */
8115 bzero (counts
, sizeof (int) * nreg
);
8116 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
8117 count_reg_usage (insn
, counts
, 1);
8119 /* Go from the last insn to the first and delete insns that only set unused
8120 registers or copy a register to itself. As we delete an insn, remove
8121 usage counts for registers it uses. */
8122 for (insn
= prev_real_insn (get_last_insn ()); insn
; insn
= prev
)
8126 prev
= prev_real_insn (insn
);
8128 /* Don't delete any insns that are part of a libcall block.
8129 Flow or loop might get confused if we did that. Remember
8130 that we are scanning backwards. */
8131 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
8136 else if (GET_CODE (PATTERN (insn
)) == SET
)
8138 if (GET_CODE (SET_DEST (PATTERN (insn
))) == REG
8139 && SET_DEST (PATTERN (insn
)) == SET_SRC (PATTERN (insn
)))
8143 else if (GET_CODE (SET_DEST (PATTERN (insn
))) == CC0
8144 && ! side_effects_p (SET_SRC (PATTERN (insn
)))
8145 && ((tem
= next_nonnote_insn (insn
)) == 0
8146 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8147 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8150 else if (GET_CODE (SET_DEST (PATTERN (insn
))) != REG
8151 || REGNO (SET_DEST (PATTERN (insn
))) < FIRST_PSEUDO_REGISTER
8152 || counts
[REGNO (SET_DEST (PATTERN (insn
)))] != 0
8153 || side_effects_p (SET_SRC (PATTERN (insn
))))
8156 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
8157 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
8159 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
8161 if (GET_CODE (elt
) == SET
)
8163 if (GET_CODE (SET_DEST (elt
)) == REG
8164 && SET_DEST (elt
) == SET_SRC (elt
))
8168 else if (GET_CODE (SET_DEST (elt
)) == CC0
8169 && ! side_effects_p (SET_SRC (elt
))
8170 && ((tem
= next_nonnote_insn (insn
)) == 0
8171 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8172 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8175 else if (GET_CODE (SET_DEST (elt
)) != REG
8176 || REGNO (SET_DEST (elt
)) < FIRST_PSEUDO_REGISTER
8177 || counts
[REGNO (SET_DEST (elt
))] != 0
8178 || side_effects_p (SET_SRC (elt
)))
8181 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
8187 /* If this is a dead insn, delete it and show registers in it aren't
8192 count_reg_usage (insn
, counts
, -1);
8196 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))