1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
24 #include "hard-reg-set.h"
27 #include "insn-config.h"
33 /* The basic idea of common subexpression elimination is to go
34 through the code, keeping a record of expressions that would
35 have the same value at the current scan point, and replacing
36 expressions encountered with the cheapest equivalent expression.
38 It is too complicated to keep track of the different possibilities
39 when control paths merge; so, at each label, we forget all that is
40 known and start fresh. This can be described as processing each
41 basic block separately. Note, however, that these are not quite
42 the same as the basic blocks found by a later pass and used for
43 data flow analysis and register packing. We do not need to start fresh
44 after a conditional jump instruction if there is no label there.
46 We use two data structures to record the equivalent expressions:
47 a hash table for most expressions, and several vectors together
48 with "quantity numbers" to record equivalent (pseudo) registers.
50 The use of the special data structure for registers is desirable
51 because it is faster. It is possible because registers references
52 contain a fairly small number, the register number, taken from
53 a contiguously allocated series, and two register references are
54 identical if they have the same number. General expressions
55 do not have any such thing, so the only way to retrieve the
56 information recorded on an expression other than a register
57 is to keep it in a hash table.
59 Registers and "quantity numbers":
61 At the start of each basic block, all of the (hardware and pseudo)
62 registers used in the function are given distinct quantity
63 numbers to indicate their contents. During scan, when the code
64 copies one register into another, we copy the quantity number.
65 When a register is loaded in any other way, we allocate a new
66 quantity number to describe the value generated by this operation.
67 `reg_qty' records what quantity a register is currently thought
70 All real quantity numbers are greater than or equal to `max_reg'.
71 If register N has not been assigned a quantity, reg_qty[N] will equal N.
73 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
74 variables should be referenced with an index below `max_reg'.
76 We also maintain a bidirectional chain of registers for each
77 quantity number. `qty_first_reg', `qty_last_reg',
78 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
80 The first register in a chain is the one whose lifespan is least local.
81 Among equals, it is the one that was seen first.
82 We replace any equivalent register with that one.
84 If two registers have the same quantity number, it must be true that
85 REG expressions with `qty_mode' must be in the hash table for both
86 registers and must be in the same class.
88 The converse is not true. Since hard registers may be referenced in
89 any mode, two REG expressions might be equivalent in the hash table
90 but not have the same quantity number if the quantity number of one
91 of the registers is not the same mode as those expressions.
93 Constants and quantity numbers
95 When a quantity has a known constant value, that value is stored
96 in the appropriate element of qty_const. This is in addition to
97 putting the constant in the hash table as is usual for non-regs.
99 Whether a reg or a constant is preferred is determined by the configuration
100 macro CONST_COSTS and will often depend on the constant value. In any
101 event, expressions containing constants can be simplified, by fold_rtx.
103 When a quantity has a known nearly constant value (such as an address
104 of a stack slot), that value is stored in the appropriate element
107 Integer constants don't have a machine mode. However, cse
108 determines the intended machine mode from the destination
109 of the instruction that moves the constant. The machine mode
110 is recorded in the hash table along with the actual RTL
111 constant expression so that different modes are kept separate.
115 To record known equivalences among expressions in general
116 we use a hash table called `table'. It has a fixed number of buckets
117 that contain chains of `struct table_elt' elements for expressions.
118 These chains connect the elements whose expressions have the same
121 Other chains through the same elements connect the elements which
122 currently have equivalent values.
124 Register references in an expression are canonicalized before hashing
125 the expression. This is done using `reg_qty' and `qty_first_reg'.
126 The hash code of a register reference is computed using the quantity
127 number, not the register number.
129 When the value of an expression changes, it is necessary to remove from the
130 hash table not just that expression but all expressions whose values
131 could be different as a result.
133 1. If the value changing is in memory, except in special cases
134 ANYTHING referring to memory could be changed. That is because
135 nobody knows where a pointer does not point.
136 The function `invalidate_memory' removes what is necessary.
138 The special cases are when the address is constant or is
139 a constant plus a fixed register such as the frame pointer
140 or a static chain pointer. When such addresses are stored in,
141 we can tell exactly which other such addresses must be invalidated
142 due to overlap. `invalidate' does this.
143 All expressions that refer to non-constant
144 memory addresses are also invalidated. `invalidate_memory' does this.
146 2. If the value changing is a register, all expressions
147 containing references to that register, and only those,
150 Because searching the entire hash table for expressions that contain
151 a register is very slow, we try to figure out when it isn't necessary.
152 Precisely, this is necessary only when expressions have been
153 entered in the hash table using this register, and then the value has
154 changed, and then another expression wants to be added to refer to
155 the register's new value. This sequence of circumstances is rare
156 within any one basic block.
158 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
159 reg_tick[i] is incremented whenever a value is stored in register i.
160 reg_in_table[i] holds -1 if no references to register i have been
161 entered in the table; otherwise, it contains the value reg_tick[i] had
162 when the references were entered. If we want to enter a reference
163 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
164 Until we want to enter a new entry, the mere fact that the two vectors
165 don't match makes the entries be ignored if anyone tries to match them.
167 Registers themselves are entered in the hash table as well as in
168 the equivalent-register chains. However, the vectors `reg_tick'
169 and `reg_in_table' do not apply to expressions which are simple
170 register references. These expressions are removed from the table
171 immediately when they become invalid, and this can be done even if
172 we do not immediately search for all the expressions that refer to
175 A CLOBBER rtx in an instruction invalidates its operand for further
176 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
177 invalidates everything that resides in memory.
181 Constant expressions that differ only by an additive integer
182 are called related. When a constant expression is put in
183 the table, the related expression with no constant term
184 is also entered. These are made to point at each other
185 so that it is possible to find out if there exists any
186 register equivalent to an expression related to a given expression. */
188 /* One plus largest register number used in this function. */
192 /* Length of vectors indexed by quantity number.
193 We know in advance we will not need a quantity number this big. */
197 /* Next quantity number to be allocated.
198 This is 1 + the largest number needed so far. */
202 /* Indexed by quantity number, gives the first (or last) (pseudo) register
203 in the chain of registers that currently contain this quantity. */
205 static int *qty_first_reg
;
206 static int *qty_last_reg
;
208 /* Index by quantity number, gives the mode of the quantity. */
210 static enum machine_mode
*qty_mode
;
212 /* Indexed by quantity number, gives the rtx of the constant value of the
213 quantity, or zero if it does not have a known value.
214 A sum of the frame pointer (or arg pointer) plus a constant
215 can also be entered here. */
217 static rtx
*qty_const
;
219 /* Indexed by qty number, gives the insn that stored the constant value
220 recorded in `qty_const'. */
222 static rtx
*qty_const_insn
;
224 /* The next three variables are used to track when a comparison between a
225 quantity and some constant or register has been passed. In that case, we
226 know the results of the comparison in case we see it again. These variables
227 record a comparison that is known to be true. */
229 /* Indexed by qty number, gives the rtx code of a comparison with a known
230 result involving this quantity. If none, it is UNKNOWN. */
231 static enum rtx_code
*qty_comparison_code
;
233 /* Indexed by qty number, gives the constant being compared against in a
234 comparison of known result. If no such comparison, it is undefined.
235 If the comparison is not with a constant, it is zero. */
237 static rtx
*qty_comparison_const
;
239 /* Indexed by qty number, gives the quantity being compared against in a
240 comparison of known result. If no such comparison, if it undefined.
241 If the comparison is not with a register, it is -1. */
243 static int *qty_comparison_qty
;
246 /* For machines that have a CC0, we do not record its value in the hash
247 table since its use is guaranteed to be the insn immediately following
248 its definition and any other insn is presumed to invalidate it.
250 Instead, we store below the value last assigned to CC0. If it should
251 happen to be a constant, it is stored in preference to the actual
252 assigned value. In case it is a constant, we store the mode in which
253 the constant should be interpreted. */
255 static rtx prev_insn_cc0
;
256 static enum machine_mode prev_insn_cc0_mode
;
259 /* Previous actual insn. 0 if at first insn of basic block. */
261 static rtx prev_insn
;
263 /* Insn being scanned. */
265 static rtx this_insn
;
267 /* Index by (pseudo) register number, gives the quantity number
268 of the register's current contents. */
272 /* Index by (pseudo) register number, gives the number of the next (or
273 previous) (pseudo) register in the chain of registers sharing the same
276 Or -1 if this register is at the end of the chain.
278 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
280 static int *reg_next_eqv
;
281 static int *reg_prev_eqv
;
283 /* Index by (pseudo) register number, gives the number of times
284 that register has been altered in the current basic block. */
286 static int *reg_tick
;
288 /* Index by (pseudo) register number, gives the reg_tick value at which
289 rtx's containing this register are valid in the hash table.
290 If this does not equal the current reg_tick value, such expressions
291 existing in the hash table are invalid.
292 If this is -1, no expressions containing this register have been
293 entered in the table. */
295 static int *reg_in_table
;
297 /* A HARD_REG_SET containing all the hard registers for which there is
298 currently a REG expression in the hash table. Note the difference
299 from the above variables, which indicate if the REG is mentioned in some
300 expression in the table. */
302 static HARD_REG_SET hard_regs_in_table
;
304 /* A HARD_REG_SET containing all the hard registers that are invalidated
307 static HARD_REG_SET regs_invalidated_by_call
;
309 /* Two vectors of ints:
310 one containing max_reg -1's; the other max_reg + 500 (an approximation
311 for max_qty) elements where element i contains i.
312 These are used to initialize various other vectors fast. */
314 static int *all_minus_one
;
315 static int *consec_ints
;
317 /* CUID of insn that starts the basic block currently being cse-processed. */
319 static int cse_basic_block_start
;
321 /* CUID of insn that ends the basic block currently being cse-processed. */
323 static int cse_basic_block_end
;
325 /* Vector mapping INSN_UIDs to cuids.
326 The cuids are like uids but increase monotonically always.
327 We use them to see whether a reg is used outside a given basic block. */
329 static int *uid_cuid
;
331 /* Get the cuid of an insn. */
333 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
335 /* Nonzero if cse has altered conditional jump insns
336 in such a way that jump optimization should be redone. */
338 static int cse_jumps_altered
;
340 /* canon_hash stores 1 in do_not_record
341 if it notices a reference to CC0, PC, or some other volatile
344 static int do_not_record
;
346 /* canon_hash stores 1 in hash_arg_in_memory
347 if it notices a reference to memory within the expression being hashed. */
349 static int hash_arg_in_memory
;
351 /* canon_hash stores 1 in hash_arg_in_struct
352 if it notices a reference to memory that's part of a structure. */
354 static int hash_arg_in_struct
;
356 /* The hash table contains buckets which are chains of `struct table_elt's,
357 each recording one expression's information.
358 That expression is in the `exp' field.
360 Those elements with the same hash code are chained in both directions
361 through the `next_same_hash' and `prev_same_hash' fields.
363 Each set of expressions with equivalent values
364 are on a two-way chain through the `next_same_value'
365 and `prev_same_value' fields, and all point with
366 the `first_same_value' field at the first element in
367 that chain. The chain is in order of increasing cost.
368 Each element's cost value is in its `cost' field.
370 The `in_memory' field is nonzero for elements that
371 involve any reference to memory. These elements are removed
372 whenever a write is done to an unidentified location in memory.
373 To be safe, we assume that a memory address is unidentified unless
374 the address is either a symbol constant or a constant plus
375 the frame pointer or argument pointer.
377 The `in_struct' field is nonzero for elements that
378 involve any reference to memory inside a structure or array.
380 The `related_value' field is used to connect related expressions
381 (that differ by adding an integer).
382 The related expressions are chained in a circular fashion.
383 `related_value' is zero for expressions for which this
386 The `cost' field stores the cost of this element's expression.
388 The `is_const' flag is set if the element is a constant (including
391 The `flag' field is used as a temporary during some search routines.
393 The `mode' field is usually the same as GET_MODE (`exp'), but
394 if `exp' is a CONST_INT and has no machine mode then the `mode'
395 field is the mode it was being used as. Each constant is
396 recorded separately for each mode it is used with. */
402 struct table_elt
*next_same_hash
;
403 struct table_elt
*prev_same_hash
;
404 struct table_elt
*next_same_value
;
405 struct table_elt
*prev_same_value
;
406 struct table_elt
*first_same_value
;
407 struct table_elt
*related_value
;
409 enum machine_mode mode
;
418 /* We don't want a lot of buckets, because we rarely have very many
419 things stored in the hash table, and a lot of buckets slows
420 down a lot of loops that happen frequently. */
423 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
424 register (hard registers may require `do_not_record' to be set). */
427 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
428 ? ((((int) REG << 7) + reg_qty[REGNO (X)]) % NBUCKETS) \
429 : canon_hash (X, M) % NBUCKETS)
431 /* Determine whether register number N is considered a fixed register for CSE.
432 It is desirable to replace other regs with fixed regs, to reduce need for
434 A reg wins if it is either the frame pointer or designated as fixed,
435 but not if it is an overlapping register. */
436 #ifdef OVERLAPPING_REGNO_P
437 #define FIXED_REGNO_P(N) \
438 (((N) == FRAME_POINTER_REGNUM || fixed_regs[N]) \
439 && ! OVERLAPPING_REGNO_P ((N)))
441 #define FIXED_REGNO_P(N) \
442 ((N) == FRAME_POINTER_REGNUM || fixed_regs[N])
445 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
446 hard registers are the cheapest with a cost of 0. Next come pseudos
447 with a cost of one and other hard registers with a cost of 2. Aside
448 from these special cases, call `rtx_cost'. */
451 (GET_CODE (X) == REG \
452 ? (REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
453 : (FIXED_REGNO_P (REGNO (X)) \
454 && REGNO_REG_CLASS (REGNO (X)) != NO_REGS) ? 0 \
456 : rtx_cost (X, SET) * 2)
458 /* Determine if the quantity number for register X represents a valid index
459 into the `qty_...' variables. */
461 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
463 static struct table_elt
*table
[NBUCKETS
];
465 /* Chain of `struct table_elt's made so far for this function
466 but currently removed from the table. */
468 static struct table_elt
*free_element_chain
;
470 /* Number of `struct table_elt' structures made so far for this function. */
472 static int n_elements_made
;
474 /* Maximum value `n_elements_made' has had so far in this compilation
475 for functions previously processed. */
477 static int max_elements_made
;
479 /* Surviving equivalence class when two equivalence classes are merged
480 by recording the effects of a jump in the last insn. Zero if the
481 last insn was not a conditional jump. */
483 static struct table_elt
*last_jump_equiv_class
;
485 /* Set to the cost of a constant pool reference if one was found for a
486 symbolic constant. If this was found, it means we should try to
487 convert constants into constant pool entries if they don't fit in
490 static int constant_pool_entries_cost
;
492 /* Bits describing what kind of values in memory must be invalidated
493 for a particular instruction. If all three bits are zero,
494 no memory refs need to be invalidated. Each bit is more powerful
495 than the preceding ones, and if a bit is set then the preceding
498 Here is how the bits are set:
499 Pushing onto the stack invalidates only the stack pointer,
500 writing at a fixed address invalidates only variable addresses,
501 writing in a structure element at variable address
502 invalidates all but scalar variables,
503 and writing in anything else at variable address invalidates everything. */
507 int sp
: 1; /* Invalidate stack pointer. */
508 int var
: 1; /* Invalidate variable addresses. */
509 int nonscalar
: 1; /* Invalidate all but scalar variables. */
510 int all
: 1; /* Invalidate all memory refs. */
513 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
514 virtual regs here because the simplify_*_operation routines are called
515 by integrate.c, which is called before virtual register instantiation. */
517 #define FIXED_BASE_PLUS_P(X) \
518 ((X) == frame_pointer_rtx || (X) == arg_pointer_rtx \
519 || (X) == virtual_stack_vars_rtx \
520 || (X) == virtual_incoming_args_rtx \
521 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
522 && (XEXP (X, 0) == frame_pointer_rtx \
523 || XEXP (X, 0) == arg_pointer_rtx \
524 || XEXP (X, 0) == virtual_stack_vars_rtx \
525 || XEXP (X, 0) == virtual_incoming_args_rtx)))
527 /* Similar, but also allows reference to the stack pointer.
529 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
530 arg_pointer_rtx by itself is nonzero, because on at least one machine,
531 the i960, the arg pointer is zero when it is unused. */
533 #define NONZERO_BASE_PLUS_P(X) \
534 ((X) == frame_pointer_rtx \
535 || (X) == virtual_stack_vars_rtx \
536 || (X) == virtual_incoming_args_rtx \
537 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
538 && (XEXP (X, 0) == frame_pointer_rtx \
539 || XEXP (X, 0) == arg_pointer_rtx \
540 || XEXP (X, 0) == virtual_stack_vars_rtx \
541 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
542 || (X) == stack_pointer_rtx \
543 || (X) == virtual_stack_dynamic_rtx \
544 || (X) == virtual_outgoing_args_rtx \
545 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
546 && (XEXP (X, 0) == stack_pointer_rtx \
547 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
548 || XEXP (X, 0) == virtual_outgoing_args_rtx)))
550 static struct table_elt
*lookup ();
551 static void free_element ();
553 static int insert_regs ();
554 static void rehash_using_reg ();
555 static void remove_invalid_refs ();
556 static int exp_equiv_p ();
558 int refers_to_mem_p ();
559 static void invalidate_from_clobbers ();
560 static int safe_hash ();
561 static int canon_hash ();
562 static rtx
fold_rtx ();
563 static rtx
equiv_constant ();
564 static void record_jump_cond ();
565 static void note_mem_written ();
566 static int cse_rtx_addr_varies_p ();
567 static enum rtx_code
find_comparison_args ();
568 static void cse_insn ();
569 static void cse_set_around_loop ();
571 /* Return an estimate of the cost of computing rtx X.
572 One use is in cse, to decide which expression to keep in the hash table.
573 Another is in rtl generation, to pick the cheapest way to multiply.
574 Other uses like the latter are expected in the future. */
576 /* Return the right cost to give to an operation
577 to make the cost of the corresponding register-to-register instruction
578 N times that of a fast register-to-register instruction. */
580 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
583 rtx_cost (x
, outer_code
)
585 enum rtx_code outer_code
;
588 register enum rtx_code code
;
595 /* Compute the default costs of certain things.
596 Note that RTX_COSTS can override the defaults. */
602 /* Count multiplication by 2**n as a shift,
603 because if we are considering it, we would output it as a shift. */
604 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
605 && exact_log2 (INTVAL (XEXP (x
, 1))) >= 0)
608 total
= COSTS_N_INSNS (5);
614 total
= COSTS_N_INSNS (7);
617 /* Used in loop.c and combine.c as a marker. */
621 /* We don't want these to be used in substitutions because
622 we have no way of validating the resulting insn. So assign
623 anything containing an ASM_OPERANDS a very high cost. */
635 /* If we can't tie these modes, make this expensive. The larger
636 the mode, the more expensive it is. */
637 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
638 return COSTS_N_INSNS (2
639 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
642 RTX_COSTS (x
, code
, outer_code
);
644 CONST_COSTS (x
, code
, outer_code
);
647 /* Sum the costs of the sub-rtx's, plus cost of this operation,
648 which is already in total. */
650 fmt
= GET_RTX_FORMAT (code
);
651 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
653 total
+= rtx_cost (XEXP (x
, i
), code
);
654 else if (fmt
[i
] == 'E')
655 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
656 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
661 /* Clear the hash table and initialize each register with its own quantity,
662 for a new basic block. */
671 bzero (reg_tick
, max_reg
* sizeof (int));
673 bcopy (all_minus_one
, reg_in_table
, max_reg
* sizeof (int));
674 bcopy (consec_ints
, reg_qty
, max_reg
* sizeof (int));
675 CLEAR_HARD_REG_SET (hard_regs_in_table
);
677 /* The per-quantity values used to be initialized here, but it is
678 much faster to initialize each as it is made in `make_new_qty'. */
680 for (i
= 0; i
< NBUCKETS
; i
++)
682 register struct table_elt
*this, *next
;
683 for (this = table
[i
]; this; this = next
)
685 next
= this->next_same_hash
;
690 bzero (table
, sizeof table
);
699 /* Say that register REG contains a quantity not in any register before
700 and initialize that quantity. */
708 if (next_qty
>= max_qty
)
711 q
= reg_qty
[reg
] = next_qty
++;
712 qty_first_reg
[q
] = reg
;
713 qty_last_reg
[q
] = reg
;
714 qty_const
[q
] = qty_const_insn
[q
] = 0;
715 qty_comparison_code
[q
] = UNKNOWN
;
717 reg_next_eqv
[reg
] = reg_prev_eqv
[reg
] = -1;
720 /* Make reg NEW equivalent to reg OLD.
721 OLD is not changing; NEW is. */
724 make_regs_eqv (new, old
)
725 register int new, old
;
727 register int lastr
, firstr
;
728 register int q
= reg_qty
[old
];
730 /* Nothing should become eqv until it has a "non-invalid" qty number. */
731 if (! REGNO_QTY_VALID_P (old
))
735 firstr
= qty_first_reg
[q
];
736 lastr
= qty_last_reg
[q
];
738 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
739 hard regs. Among pseudos, if NEW will live longer than any other reg
740 of the same qty, and that is beyond the current basic block,
741 make it the new canonical replacement for this qty. */
742 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
743 /* Certain fixed registers might be of the class NO_REGS. This means
744 that not only can they not be allocated by the compiler, but
745 they cannot be used in substitutions or canonicalizations
747 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
748 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
749 || (new >= FIRST_PSEUDO_REGISTER
750 && (firstr
< FIRST_PSEUDO_REGISTER
751 || ((uid_cuid
[regno_last_uid
[new]] > cse_basic_block_end
752 || (uid_cuid
[regno_first_uid
[new]]
753 < cse_basic_block_start
))
754 && (uid_cuid
[regno_last_uid
[new]]
755 > uid_cuid
[regno_last_uid
[firstr
]]))))))
757 reg_prev_eqv
[firstr
] = new;
758 reg_next_eqv
[new] = firstr
;
759 reg_prev_eqv
[new] = -1;
760 qty_first_reg
[q
] = new;
764 /* If NEW is a hard reg (known to be non-fixed), insert at end.
765 Otherwise, insert before any non-fixed hard regs that are at the
766 end. Registers of class NO_REGS cannot be used as an
767 equivalent for anything. */
768 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_prev_eqv
[lastr
] >= 0
769 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
770 && new >= FIRST_PSEUDO_REGISTER
)
771 lastr
= reg_prev_eqv
[lastr
];
772 reg_next_eqv
[new] = reg_next_eqv
[lastr
];
773 if (reg_next_eqv
[lastr
] >= 0)
774 reg_prev_eqv
[reg_next_eqv
[lastr
]] = new;
776 qty_last_reg
[q
] = new;
777 reg_next_eqv
[lastr
] = new;
778 reg_prev_eqv
[new] = lastr
;
782 /* Remove REG from its equivalence class. */
785 delete_reg_equiv (reg
)
788 register int n
= reg_next_eqv
[reg
];
789 register int p
= reg_prev_eqv
[reg
];
790 register int q
= reg_qty
[reg
];
792 /* If invalid, do nothing. N and P above are undefined in that case. */
803 qty_first_reg
[q
] = n
;
808 /* Remove any invalid expressions from the hash table
809 that refer to any of the registers contained in expression X.
811 Make sure that newly inserted references to those registers
812 as subexpressions will be considered valid.
814 mention_regs is not called when a register itself
815 is being stored in the table.
817 Return 1 if we have done something that may have changed the hash code
824 register enum rtx_code code
;
827 register int changed
= 0;
835 register int regno
= REGNO (x
);
836 register int endregno
837 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
838 : HARD_REGNO_NREGS (regno
, GET_MODE (x
)));
841 for (i
= regno
; i
< endregno
; i
++)
843 if (reg_in_table
[i
] >= 0 && reg_in_table
[i
] != reg_tick
[i
])
844 remove_invalid_refs (i
);
846 reg_in_table
[i
] = reg_tick
[i
];
852 /* If X is a comparison or a COMPARE and either operand is a register
853 that does not have a quantity, give it one. This is so that a later
854 call to record_jump_equiv won't cause X to be assigned a different
855 hash code and not found in the table after that call.
857 It is not necessary to do this here, since rehash_using_reg can
858 fix up the table later, but doing this here eliminates the need to
859 call that expensive function in the most common case where the only
860 use of the register is in the comparison. */
862 if (code
== COMPARE
|| GET_RTX_CLASS (code
) == '<')
864 if (GET_CODE (XEXP (x
, 0)) == REG
865 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
866 if (insert_regs (XEXP (x
, 0), NULL_PTR
, 0))
868 rehash_using_reg (XEXP (x
, 0));
872 if (GET_CODE (XEXP (x
, 1)) == REG
873 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
874 if (insert_regs (XEXP (x
, 1), NULL_PTR
, 0))
876 rehash_using_reg (XEXP (x
, 1));
881 fmt
= GET_RTX_FORMAT (code
);
882 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
884 changed
|= mention_regs (XEXP (x
, i
));
885 else if (fmt
[i
] == 'E')
886 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
887 changed
|= mention_regs (XVECEXP (x
, i
, j
));
892 /* Update the register quantities for inserting X into the hash table
893 with a value equivalent to CLASSP.
894 (If the class does not contain a REG, it is irrelevant.)
895 If MODIFIED is nonzero, X is a destination; it is being modified.
896 Note that delete_reg_equiv should be called on a register
897 before insert_regs is done on that register with MODIFIED != 0.
899 Nonzero value means that elements of reg_qty have changed
900 so X's hash code may be different. */
903 insert_regs (x
, classp
, modified
)
905 struct table_elt
*classp
;
908 if (GET_CODE (x
) == REG
)
910 register int regno
= REGNO (x
);
913 || ! (REGNO_QTY_VALID_P (regno
)
914 && qty_mode
[reg_qty
[regno
]] == GET_MODE (x
)))
917 for (classp
= classp
->first_same_value
;
919 classp
= classp
->next_same_value
)
920 if (GET_CODE (classp
->exp
) == REG
921 && GET_MODE (classp
->exp
) == GET_MODE (x
))
923 make_regs_eqv (regno
, REGNO (classp
->exp
));
927 make_new_qty (regno
);
928 qty_mode
[reg_qty
[regno
]] = GET_MODE (x
);
933 /* If X is a SUBREG, we will likely be inserting the inner register in the
934 table. If that register doesn't have an assigned quantity number at
935 this point but does later, the insertion that we will be doing now will
936 not be accessible because its hash code will have changed. So assign
937 a quantity number now. */
939 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
940 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
942 insert_regs (SUBREG_REG (x
), NULL_PTR
, 0);
943 mention_regs (SUBREG_REG (x
));
947 return mention_regs (x
);
950 /* Look in or update the hash table. */
952 /* Put the element ELT on the list of free elements. */
956 struct table_elt
*elt
;
958 elt
->next_same_hash
= free_element_chain
;
959 free_element_chain
= elt
;
962 /* Return an element that is free for use. */
964 static struct table_elt
*
967 struct table_elt
*elt
= free_element_chain
;
970 free_element_chain
= elt
->next_same_hash
;
974 return (struct table_elt
*) oballoc (sizeof (struct table_elt
));
977 /* Remove table element ELT from use in the table.
978 HASH is its hash code, made using the HASH macro.
979 It's an argument because often that is known in advance
980 and we save much time not recomputing it. */
983 remove_from_table (elt
, hash
)
984 register struct table_elt
*elt
;
990 /* Mark this element as removed. See cse_insn. */
991 elt
->first_same_value
= 0;
993 /* Remove the table element from its equivalence class. */
996 register struct table_elt
*prev
= elt
->prev_same_value
;
997 register struct table_elt
*next
= elt
->next_same_value
;
999 if (next
) next
->prev_same_value
= prev
;
1002 prev
->next_same_value
= next
;
1005 register struct table_elt
*newfirst
= next
;
1008 next
->first_same_value
= newfirst
;
1009 next
= next
->next_same_value
;
1014 /* Remove the table element from its hash bucket. */
1017 register struct table_elt
*prev
= elt
->prev_same_hash
;
1018 register struct table_elt
*next
= elt
->next_same_hash
;
1020 if (next
) next
->prev_same_hash
= prev
;
1023 prev
->next_same_hash
= next
;
1024 else if (table
[hash
] == elt
)
1028 /* This entry is not in the proper hash bucket. This can happen
1029 when two classes were merged by `merge_equiv_classes'. Search
1030 for the hash bucket that it heads. This happens only very
1031 rarely, so the cost is acceptable. */
1032 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1033 if (table
[hash
] == elt
)
1038 /* Remove the table element from its related-value circular chain. */
1040 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1042 register struct table_elt
*p
= elt
->related_value
;
1043 while (p
->related_value
!= elt
)
1044 p
= p
->related_value
;
1045 p
->related_value
= elt
->related_value
;
1046 if (p
->related_value
== p
)
1047 p
->related_value
= 0;
1053 /* Look up X in the hash table and return its table element,
1054 or 0 if X is not in the table.
1056 MODE is the machine-mode of X, or if X is an integer constant
1057 with VOIDmode then MODE is the mode with which X will be used.
1059 Here we are satisfied to find an expression whose tree structure
1062 static struct table_elt
*
1063 lookup (x
, hash
, mode
)
1066 enum machine_mode mode
;
1068 register struct table_elt
*p
;
1070 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1071 if (mode
== p
->mode
&& ((x
== p
->exp
&& GET_CODE (x
) == REG
)
1072 || exp_equiv_p (x
, p
->exp
, GET_CODE (x
) != REG
, 0)))
1078 /* Like `lookup' but don't care whether the table element uses invalid regs.
1079 Also ignore discrepancies in the machine mode of a register. */
1081 static struct table_elt
*
1082 lookup_for_remove (x
, hash
, mode
)
1085 enum machine_mode mode
;
1087 register struct table_elt
*p
;
1089 if (GET_CODE (x
) == REG
)
1091 int regno
= REGNO (x
);
1092 /* Don't check the machine mode when comparing registers;
1093 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1094 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1095 if (GET_CODE (p
->exp
) == REG
1096 && REGNO (p
->exp
) == regno
)
1101 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1102 if (mode
== p
->mode
&& (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, 0)))
1109 /* Look for an expression equivalent to X and with code CODE.
1110 If one is found, return that expression. */
1113 lookup_as_function (x
, code
)
1117 register struct table_elt
*p
= lookup (x
, safe_hash (x
, VOIDmode
) % NBUCKETS
,
1122 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1124 if (GET_CODE (p
->exp
) == code
1125 /* Make sure this is a valid entry in the table. */
1126 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
1133 /* Insert X in the hash table, assuming HASH is its hash code
1134 and CLASSP is an element of the class it should go in
1135 (or 0 if a new class should be made).
1136 It is inserted at the proper position to keep the class in
1137 the order cheapest first.
1139 MODE is the machine-mode of X, or if X is an integer constant
1140 with VOIDmode then MODE is the mode with which X will be used.
1142 For elements of equal cheapness, the most recent one
1143 goes in front, except that the first element in the list
1144 remains first unless a cheaper element is added. The order of
1145 pseudo-registers does not matter, as canon_reg will be called to
1146 find the cheapest when a register is retrieved from the table.
1148 The in_memory field in the hash table element is set to 0.
1149 The caller must set it nonzero if appropriate.
1151 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1152 and if insert_regs returns a nonzero value
1153 you must then recompute its hash code before calling here.
1155 If necessary, update table showing constant values of quantities. */
1157 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1159 static struct table_elt
*
1160 insert (x
, classp
, hash
, mode
)
1162 register struct table_elt
*classp
;
1164 enum machine_mode mode
;
1166 register struct table_elt
*elt
;
1168 /* If X is a register and we haven't made a quantity for it,
1169 something is wrong. */
1170 if (GET_CODE (x
) == REG
&& ! REGNO_QTY_VALID_P (REGNO (x
)))
1173 /* If X is a hard register, show it is being put in the table. */
1174 if (GET_CODE (x
) == REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1176 int regno
= REGNO (x
);
1177 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1180 for (i
= regno
; i
< endregno
; i
++)
1181 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1185 /* Put an element for X into the right hash bucket. */
1187 elt
= get_element ();
1189 elt
->cost
= COST (x
);
1190 elt
->next_same_value
= 0;
1191 elt
->prev_same_value
= 0;
1192 elt
->next_same_hash
= table
[hash
];
1193 elt
->prev_same_hash
= 0;
1194 elt
->related_value
= 0;
1197 elt
->is_const
= (CONSTANT_P (x
)
1198 /* GNU C++ takes advantage of this for `this'
1199 (and other const values). */
1200 || (RTX_UNCHANGING_P (x
)
1201 && GET_CODE (x
) == REG
1202 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
1203 || FIXED_BASE_PLUS_P (x
));
1206 table
[hash
]->prev_same_hash
= elt
;
1209 /* Put it into the proper value-class. */
1212 classp
= classp
->first_same_value
;
1213 if (CHEAPER (elt
, classp
))
1214 /* Insert at the head of the class */
1216 register struct table_elt
*p
;
1217 elt
->next_same_value
= classp
;
1218 classp
->prev_same_value
= elt
;
1219 elt
->first_same_value
= elt
;
1221 for (p
= classp
; p
; p
= p
->next_same_value
)
1222 p
->first_same_value
= elt
;
1226 /* Insert not at head of the class. */
1227 /* Put it after the last element cheaper than X. */
1228 register struct table_elt
*p
, *next
;
1229 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1231 /* Put it after P and before NEXT. */
1232 elt
->next_same_value
= next
;
1234 next
->prev_same_value
= elt
;
1235 elt
->prev_same_value
= p
;
1236 p
->next_same_value
= elt
;
1237 elt
->first_same_value
= classp
;
1241 elt
->first_same_value
= elt
;
1243 /* If this is a constant being set equivalent to a register or a register
1244 being set equivalent to a constant, note the constant equivalence.
1246 If this is a constant, it cannot be equivalent to a different constant,
1247 and a constant is the only thing that can be cheaper than a register. So
1248 we know the register is the head of the class (before the constant was
1251 If this is a register that is not already known equivalent to a
1252 constant, we must check the entire class.
1254 If this is a register that is already known equivalent to an insn,
1255 update `qty_const_insn' to show that `this_insn' is the latest
1256 insn making that quantity equivalent to the constant. */
1258 if (elt
->is_const
&& classp
&& GET_CODE (classp
->exp
) == REG
)
1260 qty_const
[reg_qty
[REGNO (classp
->exp
)]]
1261 = gen_lowpart_if_possible (qty_mode
[reg_qty
[REGNO (classp
->exp
)]], x
);
1262 qty_const_insn
[reg_qty
[REGNO (classp
->exp
)]] = this_insn
;
1265 else if (GET_CODE (x
) == REG
&& classp
&& ! qty_const
[reg_qty
[REGNO (x
)]])
1267 register struct table_elt
*p
;
1269 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1273 qty_const
[reg_qty
[REGNO (x
)]]
1274 = gen_lowpart_if_possible (GET_MODE (x
), p
->exp
);
1275 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1281 else if (GET_CODE (x
) == REG
&& qty_const
[reg_qty
[REGNO (x
)]]
1282 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]])
1283 qty_const_insn
[reg_qty
[REGNO (x
)]] = this_insn
;
1285 /* If this is a constant with symbolic value,
1286 and it has a term with an explicit integer value,
1287 link it up with related expressions. */
1288 if (GET_CODE (x
) == CONST
)
1290 rtx subexp
= get_related_value (x
);
1292 struct table_elt
*subelt
, *subelt_prev
;
1296 /* Get the integer-free subexpression in the hash table. */
1297 subhash
= safe_hash (subexp
, mode
) % NBUCKETS
;
1298 subelt
= lookup (subexp
, subhash
, mode
);
1300 subelt
= insert (subexp
, NULL_PTR
, subhash
, mode
);
1301 /* Initialize SUBELT's circular chain if it has none. */
1302 if (subelt
->related_value
== 0)
1303 subelt
->related_value
= subelt
;
1304 /* Find the element in the circular chain that precedes SUBELT. */
1305 subelt_prev
= subelt
;
1306 while (subelt_prev
->related_value
!= subelt
)
1307 subelt_prev
= subelt_prev
->related_value
;
1308 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1309 This way the element that follows SUBELT is the oldest one. */
1310 elt
->related_value
= subelt_prev
->related_value
;
1311 subelt_prev
->related_value
= elt
;
1318 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1319 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1320 the two classes equivalent.
1322 CLASS1 will be the surviving class; CLASS2 should not be used after this
1325 Any invalid entries in CLASS2 will not be copied. */
1328 merge_equiv_classes (class1
, class2
)
1329 struct table_elt
*class1
, *class2
;
1331 struct table_elt
*elt
, *next
, *new;
1333 /* Ensure we start with the head of the classes. */
1334 class1
= class1
->first_same_value
;
1335 class2
= class2
->first_same_value
;
1337 /* If they were already equal, forget it. */
1338 if (class1
== class2
)
1341 for (elt
= class2
; elt
; elt
= next
)
1345 enum machine_mode mode
= elt
->mode
;
1347 next
= elt
->next_same_value
;
1349 /* Remove old entry, make a new one in CLASS1's class.
1350 Don't do this for invalid entries as we cannot find their
1351 hash code (it also isn't necessary). */
1352 if (GET_CODE (exp
) == REG
|| exp_equiv_p (exp
, exp
, 1, 0))
1354 hash_arg_in_memory
= 0;
1355 hash_arg_in_struct
= 0;
1356 hash
= HASH (exp
, mode
);
1358 if (GET_CODE (exp
) == REG
)
1359 delete_reg_equiv (REGNO (exp
));
1361 remove_from_table (elt
, hash
);
1363 if (insert_regs (exp
, class1
, 0))
1364 hash
= HASH (exp
, mode
);
1365 new = insert (exp
, class1
, hash
, mode
);
1366 new->in_memory
= hash_arg_in_memory
;
1367 new->in_struct
= hash_arg_in_struct
;
1372 /* Remove from the hash table, or mark as invalid,
1373 all expressions whose values could be altered by storing in X.
1374 X is a register, a subreg, or a memory reference with nonvarying address
1375 (because, when a memory reference with a varying address is stored in,
1376 all memory references are removed by invalidate_memory
1377 so specific invalidation is superfluous).
1379 A nonvarying address may be just a register or just
1380 a symbol reference, or it may be either of those plus
1381 a numeric offset. */
1388 register struct table_elt
*p
;
1390 register HOST_WIDE_INT start
, end
;
1392 /* If X is a register, dependencies on its contents
1393 are recorded through the qty number mechanism.
1394 Just change the qty number of the register,
1395 mark it as invalid for expressions that refer to it,
1396 and remove it itself. */
1398 if (GET_CODE (x
) == REG
)
1400 register int regno
= REGNO (x
);
1401 register int hash
= HASH (x
, GET_MODE (x
));
1403 /* Remove REGNO from any quantity list it might be on and indicate
1404 that it's value might have changed. If it is a pseudo, remove its
1405 entry from the hash table.
1407 For a hard register, we do the first two actions above for any
1408 additional hard registers corresponding to X. Then, if any of these
1409 registers are in the table, we must remove any REG entries that
1410 overlap these registers. */
1412 delete_reg_equiv (regno
);
1415 if (regno
>= FIRST_PSEUDO_REGISTER
)
1416 remove_from_table (lookup_for_remove (x
, hash
, GET_MODE (x
)), hash
);
1419 int in_table
= TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1420 int endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
1421 int tregno
, tendregno
;
1422 register struct table_elt
*p
, *next
;
1424 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1426 for (i
= regno
+ 1; i
< endregno
; i
++)
1428 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, i
);
1429 CLEAR_HARD_REG_BIT (hard_regs_in_table
, i
);
1430 delete_reg_equiv (i
);
1435 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1436 for (p
= table
[hash
]; p
; p
= next
)
1438 next
= p
->next_same_hash
;
1440 if (GET_CODE (p
->exp
) != REG
1441 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1444 tregno
= REGNO (p
->exp
);
1446 = tregno
+ HARD_REGNO_NREGS (tregno
, GET_MODE (p
->exp
));
1447 if (tendregno
> regno
&& tregno
< endregno
)
1448 remove_from_table (p
, hash
);
1455 if (GET_CODE (x
) == SUBREG
)
1457 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1459 invalidate (SUBREG_REG (x
));
1463 /* X is not a register; it must be a memory reference with
1464 a nonvarying address. Remove all hash table elements
1465 that refer to overlapping pieces of memory. */
1467 if (GET_CODE (x
) != MEM
)
1472 /* Registers with nonvarying addresses usually have constant equivalents;
1473 but the frame pointer register is also possible. */
1474 if (GET_CODE (base
) == REG
1475 && REGNO_QTY_VALID_P (REGNO (base
))
1476 && qty_mode
[reg_qty
[REGNO (base
)]] == GET_MODE (base
)
1477 && qty_const
[reg_qty
[REGNO (base
)]] != 0)
1478 base
= qty_const
[reg_qty
[REGNO (base
)]];
1479 else if (GET_CODE (base
) == PLUS
1480 && GET_CODE (XEXP (base
, 1)) == CONST_INT
1481 && GET_CODE (XEXP (base
, 0)) == REG
1482 && REGNO_QTY_VALID_P (REGNO (XEXP (base
, 0)))
1483 && (qty_mode
[reg_qty
[REGNO (XEXP (base
, 0))]]
1484 == GET_MODE (XEXP (base
, 0)))
1485 && qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]])
1487 start
= INTVAL (XEXP (base
, 1));
1488 base
= qty_const
[reg_qty
[REGNO (XEXP (base
, 0))]];
1491 if (GET_CODE (base
) == CONST
)
1492 base
= XEXP (base
, 0);
1493 if (GET_CODE (base
) == PLUS
1494 && GET_CODE (XEXP (base
, 1)) == CONST_INT
)
1496 start
+= INTVAL (XEXP (base
, 1));
1497 base
= XEXP (base
, 0);
1500 end
= start
+ GET_MODE_SIZE (GET_MODE (x
));
1501 for (i
= 0; i
< NBUCKETS
; i
++)
1503 register struct table_elt
*next
;
1504 for (p
= table
[i
]; p
; p
= next
)
1506 next
= p
->next_same_hash
;
1507 if (refers_to_mem_p (p
->exp
, base
, start
, end
))
1508 remove_from_table (p
, i
);
1513 /* Remove all expressions that refer to register REGNO,
1514 since they are already invalid, and we are about to
1515 mark that register valid again and don't want the old
1516 expressions to reappear as valid. */
1519 remove_invalid_refs (regno
)
1523 register struct table_elt
*p
, *next
;
1525 for (i
= 0; i
< NBUCKETS
; i
++)
1526 for (p
= table
[i
]; p
; p
= next
)
1528 next
= p
->next_same_hash
;
1529 if (GET_CODE (p
->exp
) != REG
1530 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, NULL_PTR
))
1531 remove_from_table (p
, i
);
1535 /* Recompute the hash codes of any valid entries in the hash table that
1536 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1538 This is called when we make a jump equivalence. */
1541 rehash_using_reg (x
)
1545 struct table_elt
*p
, *next
;
1548 if (GET_CODE (x
) == SUBREG
)
1551 /* If X is not a register or if the register is known not to be in any
1552 valid entries in the table, we have no work to do. */
1554 if (GET_CODE (x
) != REG
1555 || reg_in_table
[REGNO (x
)] < 0
1556 || reg_in_table
[REGNO (x
)] != reg_tick
[REGNO (x
)])
1559 /* Scan all hash chains looking for valid entries that mention X.
1560 If we find one and it is in the wrong hash chain, move it. We can skip
1561 objects that are registers, since they are handled specially. */
1563 for (i
= 0; i
< NBUCKETS
; i
++)
1564 for (p
= table
[i
]; p
; p
= next
)
1566 next
= p
->next_same_hash
;
1567 if (GET_CODE (p
->exp
) != REG
&& reg_mentioned_p (x
, p
->exp
)
1568 && exp_equiv_p (p
->exp
, p
->exp
, 1, 0)
1569 && i
!= (hash
= safe_hash (p
->exp
, p
->mode
) % NBUCKETS
))
1571 if (p
->next_same_hash
)
1572 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1574 if (p
->prev_same_hash
)
1575 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1577 table
[i
] = p
->next_same_hash
;
1579 p
->next_same_hash
= table
[hash
];
1580 p
->prev_same_hash
= 0;
1582 table
[hash
]->prev_same_hash
= p
;
1588 /* Remove from the hash table all expressions that reference memory,
1589 or some of them as specified by *WRITES. */
1592 invalidate_memory (writes
)
1593 struct write_data
*writes
;
1596 register struct table_elt
*p
, *next
;
1597 int all
= writes
->all
;
1598 int nonscalar
= writes
->nonscalar
;
1600 for (i
= 0; i
< NBUCKETS
; i
++)
1601 for (p
= table
[i
]; p
; p
= next
)
1603 next
= p
->next_same_hash
;
1606 || (nonscalar
&& p
->in_struct
)
1607 || cse_rtx_addr_varies_p (p
->exp
)))
1608 remove_from_table (p
, i
);
1612 /* Remove from the hash table any expression that is a call-clobbered
1613 register. Also update their TICK values. */
1616 invalidate_for_call ()
1618 int regno
, endregno
;
1621 struct table_elt
*p
, *next
;
1624 /* Go through all the hard registers. For each that is clobbered in
1625 a CALL_INSN, remove the register from quantity chains and update
1626 reg_tick if defined. Also see if any of these registers is currently
1629 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
1630 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
1632 delete_reg_equiv (regno
);
1633 if (reg_tick
[regno
] >= 0)
1636 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1639 /* In the case where we have no call-clobbered hard registers in the
1640 table, we are done. Otherwise, scan the table and remove any
1641 entry that overlaps a call-clobbered register. */
1644 for (hash
= 0; hash
< NBUCKETS
; hash
++)
1645 for (p
= table
[hash
]; p
; p
= next
)
1647 next
= p
->next_same_hash
;
1649 if (GET_CODE (p
->exp
) != REG
1650 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1653 regno
= REGNO (p
->exp
);
1654 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (p
->exp
));
1656 for (i
= regno
; i
< endregno
; i
++)
1657 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1659 remove_from_table (p
, hash
);
1665 /* Given an expression X of type CONST,
1666 and ELT which is its table entry (or 0 if it
1667 is not in the hash table),
1668 return an alternate expression for X as a register plus integer.
1669 If none can be found, return 0. */
1672 use_related_value (x
, elt
)
1674 struct table_elt
*elt
;
1676 register struct table_elt
*relt
= 0;
1677 register struct table_elt
*p
, *q
;
1678 HOST_WIDE_INT offset
;
1680 /* First, is there anything related known?
1681 If we have a table element, we can tell from that.
1682 Otherwise, must look it up. */
1684 if (elt
!= 0 && elt
->related_value
!= 0)
1686 else if (elt
== 0 && GET_CODE (x
) == CONST
)
1688 rtx subexp
= get_related_value (x
);
1690 relt
= lookup (subexp
,
1691 safe_hash (subexp
, GET_MODE (subexp
)) % NBUCKETS
,
1698 /* Search all related table entries for one that has an
1699 equivalent register. */
1704 /* This loop is strange in that it is executed in two different cases.
1705 The first is when X is already in the table. Then it is searching
1706 the RELATED_VALUE list of X's class (RELT). The second case is when
1707 X is not in the table. Then RELT points to a class for the related
1710 Ensure that, whatever case we are in, that we ignore classes that have
1711 the same value as X. */
1713 if (rtx_equal_p (x
, p
->exp
))
1716 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
1717 if (GET_CODE (q
->exp
) == REG
)
1723 p
= p
->related_value
;
1725 /* We went all the way around, so there is nothing to be found.
1726 Alternatively, perhaps RELT was in the table for some other reason
1727 and it has no related values recorded. */
1728 if (p
== relt
|| p
== 0)
1735 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
1736 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1737 return plus_constant (q
->exp
, offset
);
1740 /* Hash an rtx. We are careful to make sure the value is never negative.
1741 Equivalent registers hash identically.
1742 MODE is used in hashing for CONST_INTs only;
1743 otherwise the mode of X is used.
1745 Store 1 in do_not_record if any subexpression is volatile.
1747 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1748 which does not have the RTX_UNCHANGING_P bit set.
1749 In this case, also store 1 in hash_arg_in_struct
1750 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1752 Note that cse_insn knows that the hash code of a MEM expression
1753 is just (int) MEM plus the hash code of the address. */
1756 canon_hash (x
, mode
)
1758 enum machine_mode mode
;
1761 register int hash
= 0;
1762 register enum rtx_code code
;
1765 /* repeat is used to turn tail-recursion into iteration. */
1770 code
= GET_CODE (x
);
1775 register int regno
= REGNO (x
);
1777 /* On some machines, we can't record any non-fixed hard register,
1778 because extending its life will cause reload problems. We
1779 consider ap, fp, and sp to be fixed for this purpose.
1780 On all machines, we can't record any global registers. */
1782 if (regno
< FIRST_PSEUDO_REGISTER
1783 && (global_regs
[regno
]
1784 #ifdef SMALL_REGISTER_CLASSES
1785 || (! fixed_regs
[regno
]
1786 && regno
!= FRAME_POINTER_REGNUM
1787 && regno
!= ARG_POINTER_REGNUM
1788 && regno
!= STACK_POINTER_REGNUM
)
1795 return hash
+ ((int) REG
<< 7) + reg_qty
[regno
];
1799 hash
+= ((int) mode
+ ((int) CONST_INT
<< 7)
1800 + INTVAL (x
) + (INTVAL (x
) >> HASHBITS
));
1801 return ((1 << HASHBITS
) - 1) & hash
;
1804 /* This is like the general case, except that it only counts
1805 the integers representing the constant. */
1806 hash
+= (int) code
+ (int) GET_MODE (x
);
1809 for (i
= 2; i
< GET_RTX_LENGTH (CONST_DOUBLE
); i
++)
1811 int tem
= XINT (x
, i
);
1812 hash
+= ((1 << HASHBITS
) - 1) & (tem
+ (tem
>> HASHBITS
));
1817 /* Assume there is only one rtx object for any given label. */
1819 /* Use `and' to ensure a positive number. */
1820 return (hash
+ ((HOST_WIDE_INT
) LABEL_REF
<< 7)
1821 + ((HOST_WIDE_INT
) XEXP (x
, 0) & ((1 << HASHBITS
) - 1)));
1824 return (hash
+ ((HOST_WIDE_INT
) SYMBOL_REF
<< 7)
1825 + ((HOST_WIDE_INT
) XEXP (x
, 0) & ((1 << HASHBITS
) - 1)));
1828 if (MEM_VOLATILE_P (x
))
1833 if (! RTX_UNCHANGING_P (x
))
1835 hash_arg_in_memory
= 1;
1836 if (MEM_IN_STRUCT_P (x
)) hash_arg_in_struct
= 1;
1838 /* Now that we have already found this special case,
1839 might as well speed it up as much as possible. */
1851 case UNSPEC_VOLATILE
:
1856 if (MEM_VOLATILE_P (x
))
1863 i
= GET_RTX_LENGTH (code
) - 1;
1864 hash
+= (int) code
+ (int) GET_MODE (x
);
1865 fmt
= GET_RTX_FORMAT (code
);
1870 rtx tem
= XEXP (x
, i
);
1873 /* If the operand is a REG that is equivalent to a constant, hash
1874 as if we were hashing the constant, since we will be comparing
1876 if (tem
!= 0 && GET_CODE (tem
) == REG
1877 && REGNO_QTY_VALID_P (REGNO (tem
))
1878 && qty_mode
[reg_qty
[REGNO (tem
)]] == GET_MODE (tem
)
1879 && (tem1
= qty_const
[reg_qty
[REGNO (tem
)]]) != 0
1880 && CONSTANT_P (tem1
))
1883 /* If we are about to do the last recursive call
1884 needed at this level, change it into iteration.
1885 This function is called enough to be worth it. */
1891 hash
+= canon_hash (tem
, 0);
1893 else if (fmt
[i
] == 'E')
1894 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1895 hash
+= canon_hash (XVECEXP (x
, i
, j
), 0);
1896 else if (fmt
[i
] == 's')
1898 register char *p
= XSTR (x
, i
);
1902 register int tem
= *p
++;
1903 hash
+= ((1 << HASHBITS
) - 1) & (tem
+ (tem
>> HASHBITS
));
1906 else if (fmt
[i
] == 'i')
1908 register int tem
= XINT (x
, i
);
1909 hash
+= ((1 << HASHBITS
) - 1) & (tem
+ (tem
>> HASHBITS
));
1917 /* Like canon_hash but with no side effects. */
1922 enum machine_mode mode
;
1924 int save_do_not_record
= do_not_record
;
1925 int save_hash_arg_in_memory
= hash_arg_in_memory
;
1926 int save_hash_arg_in_struct
= hash_arg_in_struct
;
1927 int hash
= canon_hash (x
, mode
);
1928 hash_arg_in_memory
= save_hash_arg_in_memory
;
1929 hash_arg_in_struct
= save_hash_arg_in_struct
;
1930 do_not_record
= save_do_not_record
;
1934 /* Return 1 iff X and Y would canonicalize into the same thing,
1935 without actually constructing the canonicalization of either one.
1936 If VALIDATE is nonzero,
1937 we assume X is an expression being processed from the rtl
1938 and Y was found in the hash table. We check register refs
1939 in Y for being marked as valid.
1941 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
1942 that is known to be in the register. Ordinarily, we don't allow them
1943 to match, because letting them match would cause unpredictable results
1944 in all the places that search a hash table chain for an equivalent
1945 for a given value. A possible equivalent that has different structure
1946 has its hash code computed from different data. Whether the hash code
1947 is the same as that of the the given value is pure luck. */
1950 exp_equiv_p (x
, y
, validate
, equal_values
)
1956 register enum rtx_code code
;
1959 /* Note: it is incorrect to assume an expression is equivalent to itself
1960 if VALIDATE is nonzero. */
1961 if (x
== y
&& !validate
)
1963 if (x
== 0 || y
== 0)
1966 code
= GET_CODE (x
);
1967 if (code
!= GET_CODE (y
))
1972 /* If X is a constant and Y is a register or vice versa, they may be
1973 equivalent. We only have to validate if Y is a register. */
1974 if (CONSTANT_P (x
) && GET_CODE (y
) == REG
1975 && REGNO_QTY_VALID_P (REGNO (y
))
1976 && GET_MODE (y
) == qty_mode
[reg_qty
[REGNO (y
)]]
1977 && rtx_equal_p (x
, qty_const
[reg_qty
[REGNO (y
)]])
1978 && (! validate
|| reg_in_table
[REGNO (y
)] == reg_tick
[REGNO (y
)]))
1981 if (CONSTANT_P (y
) && code
== REG
1982 && REGNO_QTY_VALID_P (REGNO (x
))
1983 && GET_MODE (x
) == qty_mode
[reg_qty
[REGNO (x
)]]
1984 && rtx_equal_p (y
, qty_const
[reg_qty
[REGNO (x
)]]))
1990 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1991 if (GET_MODE (x
) != GET_MODE (y
))
2001 return INTVAL (x
) == INTVAL (y
);
2005 return XEXP (x
, 0) == XEXP (y
, 0);
2009 int regno
= REGNO (y
);
2011 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2012 : HARD_REGNO_NREGS (regno
, GET_MODE (y
)));
2015 /* If the quantities are not the same, the expressions are not
2016 equivalent. If there are and we are not to validate, they
2017 are equivalent. Otherwise, ensure all regs are up-to-date. */
2019 if (reg_qty
[REGNO (x
)] != reg_qty
[regno
])
2025 for (i
= regno
; i
< endregno
; i
++)
2026 if (reg_in_table
[i
] != reg_tick
[i
])
2032 /* For commutative operations, check both orders. */
2040 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0), validate
, equal_values
)
2041 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2042 validate
, equal_values
))
2043 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2044 validate
, equal_values
)
2045 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2046 validate
, equal_values
)));
2049 /* Compare the elements. If any pair of corresponding elements
2050 fail to match, return 0 for the whole things. */
2052 fmt
= GET_RTX_FORMAT (code
);
2053 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2058 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
), validate
, equal_values
))
2063 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2065 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2066 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2067 validate
, equal_values
))
2072 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2077 if (XINT (x
, i
) != XINT (y
, i
))
2082 if (XWINT (x
, i
) != XWINT (y
, i
))
2097 /* Return 1 iff any subexpression of X matches Y.
2098 Here we do not require that X or Y be valid (for registers referred to)
2099 for being in the hash table. */
2106 register enum rtx_code code
;
2112 if (x
== 0 || y
== 0)
2115 code
= GET_CODE (x
);
2116 /* If X as a whole has the same code as Y, they may match.
2118 if (code
== GET_CODE (y
))
2120 if (exp_equiv_p (x
, y
, 0, 1))
2124 /* X does not match, so try its subexpressions. */
2126 fmt
= GET_RTX_FORMAT (code
);
2127 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2136 if (refers_to_p (XEXP (x
, i
), y
))
2139 else if (fmt
[i
] == 'E')
2142 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2143 if (refers_to_p (XVECEXP (x
, i
, j
), y
))
2150 /* Return 1 iff any subexpression of X refers to memory
2151 at an address of BASE plus some offset
2152 such that any of the bytes' offsets fall between START (inclusive)
2153 and END (exclusive).
2155 The value is undefined if X is a varying address.
2156 This function is not used in such cases.
2158 When used in the cse pass, `qty_const' is nonzero, and it is used
2159 to treat an address that is a register with a known constant value
2160 as if it were that constant value.
2161 In the loop pass, `qty_const' is zero, so this is not done. */
2164 refers_to_mem_p (x
, base
, start
, end
)
2166 HOST_WIDE_INT start
, end
;
2168 register HOST_WIDE_INT i
;
2169 register enum rtx_code code
;
2172 if (GET_CODE (base
) == CONST_INT
)
2174 start
+= INTVAL (base
);
2175 end
+= INTVAL (base
);
2183 code
= GET_CODE (x
);
2186 register rtx addr
= XEXP (x
, 0); /* Get the address. */
2190 if (GET_CODE (addr
) == REG
2191 /* qty_const is 0 when outside the cse pass;
2192 at such times, this info is not available. */
2194 && REGNO_QTY_VALID_P (REGNO (addr
))
2195 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
2196 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
2197 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
2198 else if (GET_CODE (addr
) == PLUS
2199 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2200 && GET_CODE (XEXP (addr
, 0)) == REG
2202 && REGNO_QTY_VALID_P (REGNO (XEXP (addr
, 0)))
2203 && (GET_MODE (XEXP (addr
, 0))
2204 == qty_mode
[reg_qty
[REGNO (XEXP (addr
, 0))]])
2205 && qty_const
[reg_qty
[REGNO (XEXP (addr
, 0))]])
2207 i
= INTVAL (XEXP (addr
, 1));
2208 addr
= qty_const
[reg_qty
[REGNO (XEXP (addr
, 0))]];
2212 if (GET_CODE (addr
) == CONST
)
2213 addr
= XEXP (addr
, 0);
2215 /* If ADDR is BASE, or BASE plus an integer, put
2216 the integer in I. */
2217 if (GET_CODE (addr
) == PLUS
2218 && XEXP (addr
, 0) == base
2219 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
)
2220 i
+= INTVAL (XEXP (addr
, 1));
2221 else if (GET_CODE (addr
) == LO_SUM
)
2223 if (GET_CODE (base
) != LO_SUM
)
2225 /* The REG component of the LO_SUM is known by the
2226 const value in the XEXP part. */
2227 addr
= XEXP (addr
, 1);
2228 base
= XEXP (base
, 1);
2230 if (GET_CODE (base
) == CONST
)
2231 base
= XEXP (base
, 0);
2232 if (GET_CODE (base
) == PLUS
2233 && GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2235 HOST_WIDE_INT tem
= INTVAL (XEXP (base
, 1));
2238 base
= XEXP (base
, 0);
2242 else if (GET_CODE (base
) == LO_SUM
)
2244 base
= XEXP (base
, 1);
2245 if (GET_CODE (base
) == CONST
)
2246 base
= XEXP (base
, 0);
2247 if (GET_CODE (base
) == PLUS
2248 && GET_CODE (XEXP (base
, 1)) == CONST_INT
)
2250 HOST_WIDE_INT tem
= INTVAL (XEXP (base
, 1));
2253 base
= XEXP (base
, 0);
2257 else if (GET_CODE (addr
) == CONST_INT
&& base
== const0_rtx
)
2259 else if (addr
!= base
)
2262 myend
= i
+ GET_MODE_SIZE (GET_MODE (x
));
2263 return myend
> start
&& i
< end
;
2266 /* X does not match, so try its subexpressions. */
2268 fmt
= GET_RTX_FORMAT (code
);
2269 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2278 if (refers_to_mem_p (XEXP (x
, i
), base
, start
, end
))
2281 else if (fmt
[i
] == 'E')
2284 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2285 if (refers_to_mem_p (XVECEXP (x
, i
, j
), base
, start
, end
))
2292 /* Nonzero if X refers to memory at a varying address;
2293 except that a register which has at the moment a known constant value
2294 isn't considered variable. */
2297 cse_rtx_addr_varies_p (x
)
2300 /* We need not check for X and the equivalence class being of the same
2301 mode because if X is equivalent to a constant in some mode, it
2302 doesn't vary in any mode. */
2304 if (GET_CODE (x
) == MEM
2305 && GET_CODE (XEXP (x
, 0)) == REG
2306 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2307 && GET_MODE (XEXP (x
, 0)) == qty_mode
[reg_qty
[REGNO (XEXP (x
, 0))]]
2308 && qty_const
[reg_qty
[REGNO (XEXP (x
, 0))]] != 0)
2311 if (GET_CODE (x
) == MEM
2312 && GET_CODE (XEXP (x
, 0)) == PLUS
2313 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
2314 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == REG
2315 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x
, 0), 0)))
2316 && (GET_MODE (XEXP (XEXP (x
, 0), 0))
2317 == qty_mode
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2318 && qty_const
[reg_qty
[REGNO (XEXP (XEXP (x
, 0), 0))]])
2321 return rtx_addr_varies_p (x
);
2324 /* Canonicalize an expression:
2325 replace each register reference inside it
2326 with the "oldest" equivalent register.
2328 If INSN is non-zero and we are replacing a pseudo with a hard register
2329 or vice versa, verify that INSN remains valid after we make our
2338 register enum rtx_code code
;
2344 code
= GET_CODE (x
);
2362 /* Never replace a hard reg, because hard regs can appear
2363 in more than one machine mode, and we must preserve the mode
2364 of each occurrence. Also, some hard regs appear in
2365 MEMs that are shared and mustn't be altered. Don't try to
2366 replace any reg that maps to a reg of class NO_REGS. */
2367 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2368 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2371 first
= qty_first_reg
[reg_qty
[REGNO (x
)]];
2372 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2373 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2374 : gen_rtx (REG
, qty_mode
[reg_qty
[REGNO (x
)]], first
));
2378 fmt
= GET_RTX_FORMAT (code
);
2379 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2385 rtx
new = canon_reg (XEXP (x
, i
), insn
);
2387 /* If replacing pseudo with hard reg or vice versa, ensure the
2388 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2389 if (insn
!= 0 && new != 0
2390 && GET_CODE (new) == REG
&& GET_CODE (XEXP (x
, i
)) == REG
2391 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2392 != (REGNO (XEXP (x
, i
)) < FIRST_PSEUDO_REGISTER
))
2393 || insn_n_dups
[recog_memoized (insn
)] > 0))
2394 validate_change (insn
, &XEXP (x
, i
), new, 1);
2398 else if (fmt
[i
] == 'E')
2399 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2400 XVECEXP (x
, i
, j
) = canon_reg (XVECEXP (x
, i
, j
), insn
);
2406 /* LOC is a location with INSN that is an operand address (the contents of
2407 a MEM). Find the best equivalent address to use that is valid for this
2410 On most CISC machines, complicated address modes are costly, and rtx_cost
2411 is a good approximation for that cost. However, most RISC machines have
2412 only a few (usually only one) memory reference formats. If an address is
2413 valid at all, it is often just as cheap as any other address. Hence, for
2414 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2415 costs of various addresses. For two addresses of equal cost, choose the one
2416 with the highest `rtx_cost' value as that has the potential of eliminating
2417 the most insns. For equal costs, we choose the first in the equivalence
2418 class. Note that we ignore the fact that pseudo registers are cheaper
2419 than hard registers here because we would also prefer the pseudo registers.
2423 find_best_addr (insn
, loc
)
2427 struct table_elt
*elt
, *p
;
2430 int found_better
= 1;
2431 int save_do_not_record
= do_not_record
;
2432 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2433 int save_hash_arg_in_struct
= hash_arg_in_struct
;
2438 /* Do not try to replace constant addresses or addresses of local and
2439 argument slots. These MEM expressions are made only once and inserted
2440 in many instructions, as well as being used to control symbol table
2441 output. It is not safe to clobber them.
2443 There are some uncommon cases where the address is already in a register
2444 for some reason, but we cannot take advantage of that because we have
2445 no easy way to unshare the MEM. In addition, looking up all stack
2446 addresses is costly. */
2447 if ((GET_CODE (addr
) == PLUS
2448 && GET_CODE (XEXP (addr
, 0)) == REG
2449 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2450 && (regno
= REGNO (XEXP (addr
, 0)),
2451 regno
== FRAME_POINTER_REGNUM
|| regno
== ARG_POINTER_REGNUM
))
2452 || (GET_CODE (addr
) == REG
2453 && (regno
= REGNO (addr
),
2454 regno
== FRAME_POINTER_REGNUM
|| regno
== ARG_POINTER_REGNUM
))
2455 || CONSTANT_ADDRESS_P (addr
))
2458 /* If this address is not simply a register, try to fold it. This will
2459 sometimes simplify the expression. Many simplifications
2460 will not be valid, but some, usually applying the associative rule, will
2461 be valid and produce better code. */
2462 if (GET_CODE (addr
) != REG
2463 && validate_change (insn
, loc
, fold_rtx (addr
, insn
), 0))
2466 /* If this address is not in the hash table, we can't look for equivalences
2467 of the whole address. Also, ignore if volatile. */
2470 hash_code
= HASH (addr
, Pmode
);
2471 addr_volatile
= do_not_record
;
2472 do_not_record
= save_do_not_record
;
2473 hash_arg_in_memory
= save_hash_arg_in_memory
;
2474 hash_arg_in_struct
= save_hash_arg_in_struct
;
2479 elt
= lookup (addr
, hash_code
, Pmode
);
2481 #ifndef ADDRESS_COST
2484 our_cost
= elt
->cost
;
2486 /* Find the lowest cost below ours that works. */
2487 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
2488 if (elt
->cost
< our_cost
2489 && (GET_CODE (elt
->exp
) == REG
2490 || exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
2491 && validate_change (insn
, loc
,
2492 canon_reg (copy_rtx (elt
->exp
), NULL_RTX
), 0))
2499 /* We need to find the best (under the criteria documented above) entry
2500 in the class that is valid. We use the `flag' field to indicate
2501 choices that were invalid and iterate until we can't find a better
2502 one that hasn't already been tried. */
2504 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2507 while (found_better
)
2509 int best_addr_cost
= ADDRESS_COST (*loc
);
2510 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2511 struct table_elt
*best_elt
= elt
;
2514 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2516 && (GET_CODE (p
->exp
) == REG
2517 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2518 && (ADDRESS_COST (p
->exp
) < best_addr_cost
2519 || (ADDRESS_COST (p
->exp
) == best_addr_cost
2520 && (p
->cost
+ 1) >> 1 > best_rtx_cost
)))
2523 best_addr_cost
= ADDRESS_COST (p
->exp
);
2524 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2530 if (validate_change (insn
, loc
,
2531 canon_reg (copy_rtx (best_elt
->exp
),
2540 /* If the address is a binary operation with the first operand a register
2541 and the second a constant, do the same as above, but looking for
2542 equivalences of the register. Then try to simplify before checking for
2543 the best address to use. This catches a few cases: First is when we
2544 have REG+const and the register is another REG+const. We can often merge
2545 the constants and eliminate one insn and one register. It may also be
2546 that a machine has a cheap REG+REG+const. Finally, this improves the
2547 code on the Alpha for unaligned byte stores. */
2549 if (flag_expensive_optimizations
2550 && (GET_RTX_CLASS (GET_CODE (*loc
)) == '2'
2551 || GET_RTX_CLASS (GET_CODE (*loc
)) == 'c')
2552 && GET_CODE (XEXP (*loc
, 0)) == REG
2553 && GET_CODE (XEXP (*loc
, 1)) == CONST_INT
)
2555 rtx c
= XEXP (*loc
, 1);
2558 hash_code
= HASH (XEXP (*loc
, 0), Pmode
);
2559 do_not_record
= save_do_not_record
;
2560 hash_arg_in_memory
= save_hash_arg_in_memory
;
2561 hash_arg_in_struct
= save_hash_arg_in_struct
;
2563 elt
= lookup (XEXP (*loc
, 0), hash_code
, Pmode
);
2567 /* We need to find the best (under the criteria documented above) entry
2568 in the class that is valid. We use the `flag' field to indicate
2569 choices that were invalid and iterate until we can't find a better
2570 one that hasn't already been tried. */
2572 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2575 while (found_better
)
2577 int best_addr_cost
= ADDRESS_COST (*loc
);
2578 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2579 struct table_elt
*best_elt
= elt
;
2580 rtx best_rtx
= *loc
;
2583 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2585 && (GET_CODE (p
->exp
) == REG
2586 || exp_equiv_p (p
->exp
, p
->exp
, 1, 0)))
2588 rtx
new = simplify_binary_operation (GET_CODE (*loc
), Pmode
,
2592 new = gen_rtx (GET_CODE (*loc
), Pmode
, p
->exp
, c
);
2594 if ((ADDRESS_COST (new) < best_addr_cost
2595 || (ADDRESS_COST (new) == best_addr_cost
2596 && (COST (new) + 1) >> 1 > best_rtx_cost
)))
2599 best_addr_cost
= ADDRESS_COST (new);
2600 best_rtx_cost
= (COST (new) + 1) >> 1;
2608 if (validate_change (insn
, loc
,
2609 canon_reg (copy_rtx (best_rtx
),
2620 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2621 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2622 what values are being compared.
2624 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2625 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2626 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2627 compared to produce cc0.
2629 The return value is the comparison operator and is either the code of
2630 A or the code corresponding to the inverse of the comparison. */
2632 static enum rtx_code
2633 find_comparison_args (code
, parg1
, parg2
, pmode1
, pmode2
)
2636 enum machine_mode
*pmode1
, *pmode2
;
2640 arg1
= *parg1
, arg2
= *parg2
;
2642 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2644 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2646 /* Set non-zero when we find something of interest. */
2648 int reverse_code
= 0;
2649 struct table_elt
*p
= 0;
2651 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2652 On machines with CC0, this is the only case that can occur, since
2653 fold_rtx will return the COMPARE or item being compared with zero
2656 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2659 /* If ARG1 is a comparison operator and CODE is testing for
2660 STORE_FLAG_VALUE, get the inner arguments. */
2662 else if (GET_RTX_CLASS (GET_CODE (arg1
)) == '<')
2665 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2666 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2667 #ifdef FLOAT_STORE_FLAG_VALUE
2668 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2669 && FLOAT_STORE_FLAG_VALUE
< 0)
2674 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2675 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2676 #ifdef FLOAT_STORE_FLAG_VALUE
2677 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
2678 && FLOAT_STORE_FLAG_VALUE
< 0)
2681 x
= arg1
, reverse_code
= 1;
2684 /* ??? We could also check for
2686 (ne (and (eq (...) (const_int 1))) (const_int 0))
2688 and related forms, but let's wait until we see them occurring. */
2691 /* Look up ARG1 in the hash table and see if it has an equivalence
2692 that lets us see what is being compared. */
2693 p
= lookup (arg1
, safe_hash (arg1
, GET_MODE (arg1
)) % NBUCKETS
,
2695 if (p
) p
= p
->first_same_value
;
2697 for (; p
; p
= p
->next_same_value
)
2699 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
2701 /* If the entry isn't valid, skip it. */
2702 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
2705 if (GET_CODE (p
->exp
) == COMPARE
2706 /* Another possibility is that this machine has a compare insn
2707 that includes the comparison code. In that case, ARG1 would
2708 be equivalent to a comparison operation that would set ARG1 to
2709 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2710 ORIG_CODE is the actual comparison being done; if it is an EQ,
2711 we must reverse ORIG_CODE. On machine with a negative value
2712 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2715 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2716 && (GET_MODE_BITSIZE (inner_mode
)
2717 <= HOST_BITS_PER_WIDE_INT
)
2718 && (STORE_FLAG_VALUE
2719 & ((HOST_WIDE_INT
) 1
2720 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2721 #ifdef FLOAT_STORE_FLAG_VALUE
2723 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2724 && FLOAT_STORE_FLAG_VALUE
< 0)
2727 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<'))
2732 else if ((code
== EQ
2734 && GET_MODE_CLASS (inner_mode
) == MODE_INT
2735 && (GET_MODE_BITSIZE (inner_mode
)
2736 <= HOST_BITS_PER_WIDE_INT
)
2737 && (STORE_FLAG_VALUE
2738 & ((HOST_WIDE_INT
) 1
2739 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
2740 #ifdef FLOAT_STORE_FLAG_VALUE
2742 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
2743 && FLOAT_STORE_FLAG_VALUE
< 0)
2746 && GET_RTX_CLASS (GET_CODE (p
->exp
)) == '<')
2753 /* If this is fp + constant, the equivalent is a better operand since
2754 it may let us predict the value of the comparison. */
2755 else if (NONZERO_BASE_PLUS_P (p
->exp
))
2762 /* If we didn't find a useful equivalence for ARG1, we are done.
2763 Otherwise, set up for the next iteration. */
2767 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
2768 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
2769 code
= GET_CODE (x
);
2772 code
= reverse_condition (code
);
2775 /* Return our results. Return the modes from before fold_rtx
2776 because fold_rtx might produce const_int, and then it's too late. */
2777 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
2778 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
2783 /* Try to simplify a unary operation CODE whose output mode is to be
2784 MODE with input operand OP whose mode was originally OP_MODE.
2785 Return zero if no simplification can be made. */
2788 simplify_unary_operation (code
, mode
, op
, op_mode
)
2790 enum machine_mode mode
;
2792 enum machine_mode op_mode
;
2794 register int width
= GET_MODE_BITSIZE (mode
);
2796 /* The order of these tests is critical so that, for example, we don't
2797 check the wrong mode (input vs. output) for a conversion operation,
2798 such as FIX. At some point, this should be simplified. */
2800 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
2801 if (code
== FLOAT
&& GET_CODE (op
) == CONST_INT
)
2805 #ifdef REAL_ARITHMETIC
2806 REAL_VALUE_FROM_INT (d
, INTVAL (op
), INTVAL (op
) < 0 ? ~0 : 0);
2808 d
= (double) INTVAL (op
);
2810 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2812 else if (code
== UNSIGNED_FLOAT
&& GET_CODE (op
) == CONST_INT
)
2816 #ifdef REAL_ARITHMETIC
2817 REAL_VALUE_FROM_INT (d
, INTVAL (op
), 0);
2819 d
= (double) (unsigned int) INTVAL (op
);
2821 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2824 else if (code
== FLOAT
&& GET_CODE (op
) == CONST_DOUBLE
2825 && GET_MODE (op
) == VOIDmode
)
2829 #ifdef REAL_ARITHMETIC
2830 REAL_VALUE_FROM_INT (d
, CONST_DOUBLE_LOW (op
), CONST_DOUBLE_HIGH (op
));
2832 if (CONST_DOUBLE_HIGH (op
) < 0)
2834 d
= (double) (~ CONST_DOUBLE_HIGH (op
));
2835 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2836 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2837 d
+= (double) (unsigned HOST_WIDE_INT
) (~ CONST_DOUBLE_LOW (op
));
2842 d
= (double) CONST_DOUBLE_HIGH (op
);
2843 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2844 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2845 d
+= (double) (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (op
);
2847 #endif /* REAL_ARITHMETIC */
2848 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2850 else if (code
== UNSIGNED_FLOAT
&& GET_CODE (op
) == CONST_DOUBLE
2851 && GET_MODE (op
) == VOIDmode
)
2855 #ifdef REAL_ARITHMETIC
2856 REAL_VALUE_FROM_UNSIGNED_INT (d
, CONST_DOUBLE_LOW (op
),
2857 CONST_DOUBLE_HIGH (op
));
2859 d
= (double) CONST_DOUBLE_HIGH (op
);
2860 d
*= ((double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2))
2861 * (double) ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
/ 2)));
2862 d
+= (double) (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (op
);
2863 #endif /* REAL_ARITHMETIC */
2864 return CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
);
2868 if (GET_CODE (op
) == CONST_INT
2869 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
2871 register HOST_WIDE_INT arg0
= INTVAL (op
);
2872 register HOST_WIDE_INT val
;
2885 val
= (arg0
>= 0 ? arg0
: - arg0
);
2889 /* Don't use ffs here. Instead, get low order bit and then its
2890 number. If arg0 is zero, this will return 0, as desired. */
2891 arg0
&= GET_MODE_MASK (mode
);
2892 val
= exact_log2 (arg0
& (- arg0
)) + 1;
2900 if (op_mode
== VOIDmode
)
2902 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
2904 /* If we were really extending the mode,
2905 we would have to distinguish between zero-extension
2906 and sign-extension. */
2907 if (width
!= GET_MODE_BITSIZE (op_mode
))
2911 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
2912 val
= arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
2918 if (op_mode
== VOIDmode
)
2920 if (GET_MODE_BITSIZE (op_mode
) == HOST_BITS_PER_WIDE_INT
)
2922 /* If we were really extending the mode,
2923 we would have to distinguish between zero-extension
2924 and sign-extension. */
2925 if (width
!= GET_MODE_BITSIZE (op_mode
))
2929 else if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
)
2932 = arg0
& ~((HOST_WIDE_INT
) (-1) << GET_MODE_BITSIZE (op_mode
));
2934 & ((HOST_WIDE_INT
) 1 << (GET_MODE_BITSIZE (op_mode
) - 1)))
2935 val
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
2948 /* Clear the bits that don't belong in our mode,
2949 unless they and our sign bit are all one.
2950 So we get either a reasonable negative value or a reasonable
2951 unsigned value for this mode. */
2952 if (width
< HOST_BITS_PER_WIDE_INT
2953 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
2954 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
2955 val
&= (1 << width
) - 1;
2957 return GEN_INT (val
);
2960 /* We can do some operations on integer CONST_DOUBLEs. Also allow
2961 for a DImode operation on a CONST_INT. */
2962 else if (GET_MODE (op
) == VOIDmode
2963 && (GET_CODE (op
) == CONST_DOUBLE
|| GET_CODE (op
) == CONST_INT
))
2965 HOST_WIDE_INT l1
, h1
, lv
, hv
;
2967 if (GET_CODE (op
) == CONST_DOUBLE
)
2968 l1
= CONST_DOUBLE_LOW (op
), h1
= CONST_DOUBLE_HIGH (op
);
2970 l1
= INTVAL (op
), h1
= l1
< 0 ? -1 : 0;
2980 neg_double (l1
, h1
, &lv
, &hv
);
2985 neg_double (l1
, h1
, &lv
, &hv
);
2993 lv
= HOST_BITS_PER_WIDE_INT
+ exact_log2 (h1
& (-h1
)) + 1;
2995 lv
= exact_log2 (l1
& (-l1
)) + 1;
2999 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
3000 return GEN_INT (l1
& GET_MODE_MASK (mode
));
3006 if (op_mode
== VOIDmode
3007 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3011 lv
= l1
& GET_MODE_MASK (op_mode
);
3015 if (op_mode
== VOIDmode
3016 || GET_MODE_BITSIZE (op_mode
) > HOST_BITS_PER_WIDE_INT
)
3020 lv
= l1
& GET_MODE_MASK (op_mode
);
3021 if (GET_MODE_BITSIZE (op_mode
) < HOST_BITS_PER_WIDE_INT
3022 && (lv
& ((HOST_WIDE_INT
) 1
3023 << (GET_MODE_BITSIZE (op_mode
) - 1))) != 0)
3024 lv
-= (HOST_WIDE_INT
) 1 << GET_MODE_BITSIZE (op_mode
);
3026 hv
= (lv
< 0) ? ~ (HOST_WIDE_INT
) 0 : 0;
3037 return immed_double_const (lv
, hv
, mode
);
3040 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3041 else if (GET_CODE (op
) == CONST_DOUBLE
3042 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3048 if (setjmp (handler
))
3049 /* There used to be a warning here, but that is inadvisable.
3050 People may want to cause traps, and the natural way
3051 to do it should not get a warning. */
3054 set_float_handler (handler
);
3056 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3061 d
= REAL_VALUE_NEGATE (d
);
3065 if (REAL_VALUE_NEGATIVE (d
))
3066 d
= REAL_VALUE_NEGATE (d
);
3069 case FLOAT_TRUNCATE
:
3070 d
= (double) real_value_truncate (mode
, d
);
3074 /* All this does is change the mode. */
3078 d
= (double) REAL_VALUE_FIX_TRUNCATE (d
);
3082 d
= (double) REAL_VALUE_UNSIGNED_FIX_TRUNCATE (d
);
3092 x
= immed_real_const_1 (d
, mode
);
3093 set_float_handler (NULL_PTR
);
3096 else if (GET_CODE (op
) == CONST_DOUBLE
&& GET_MODE_CLASS (mode
) == MODE_INT
3097 && width
<= HOST_BITS_PER_WIDE_INT
&& width
> 0)
3104 if (setjmp (handler
))
3107 set_float_handler (handler
);
3109 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
3114 val
= REAL_VALUE_FIX (d
);
3118 val
= REAL_VALUE_UNSIGNED_FIX (d
);
3125 set_float_handler (NULL_PTR
);
3127 /* Clear the bits that don't belong in our mode,
3128 unless they and our sign bit are all one.
3129 So we get either a reasonable negative value or a reasonable
3130 unsigned value for this mode. */
3131 if (width
< HOST_BITS_PER_WIDE_INT
3132 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
3133 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
3134 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3136 return GEN_INT (val
);
3139 /* This was formerly used only for non-IEEE float.
3140 eggert@twinsun.com says it is safe for IEEE also. */
3143 /* There are some simplifications we can do even if the operands
3149 /* (not (not X)) == X, similarly for NEG. */
3150 if (GET_CODE (op
) == code
)
3151 return XEXP (op
, 0);
3155 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3156 becomes just the MINUS if its mode is MODE. This allows
3157 folding switch statements on machines using casesi (such as
3159 if (GET_CODE (op
) == TRUNCATE
3160 && GET_MODE (XEXP (op
, 0)) == mode
3161 && GET_CODE (XEXP (op
, 0)) == MINUS
3162 && GET_CODE (XEXP (XEXP (op
, 0), 0)) == LABEL_REF
3163 && GET_CODE (XEXP (XEXP (op
, 0), 1)) == LABEL_REF
)
3164 return XEXP (op
, 0);
3172 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3173 and OP1. Return 0 if no simplification is possible.
3175 Don't use this for relational operations such as EQ or LT.
3176 Use simplify_relational_operation instead. */
3179 simplify_binary_operation (code
, mode
, op0
, op1
)
3181 enum machine_mode mode
;
3184 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
3186 int width
= GET_MODE_BITSIZE (mode
);
3188 /* Relational operations don't work here. We must know the mode
3189 of the operands in order to do the comparison correctly.
3190 Assuming a full word can give incorrect results.
3191 Consider comparing 128 with -128 in QImode. */
3193 if (GET_RTX_CLASS (code
) == '<')
3196 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3197 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
3198 && GET_CODE (op0
) == CONST_DOUBLE
&& GET_CODE (op1
) == CONST_DOUBLE
3199 && mode
== GET_MODE (op0
) && mode
== GET_MODE (op1
))
3201 REAL_VALUE_TYPE f0
, f1
, value
;
3204 if (setjmp (handler
))
3207 set_float_handler (handler
);
3209 REAL_VALUE_FROM_CONST_DOUBLE (f0
, op0
);
3210 REAL_VALUE_FROM_CONST_DOUBLE (f1
, op1
);
3211 f0
= real_value_truncate (mode
, f0
);
3212 f1
= real_value_truncate (mode
, f1
);
3214 #ifdef REAL_ARITHMETIC
3215 REAL_ARITHMETIC (value
, code
, f0
, f1
);
3229 #ifndef REAL_INFINITY
3236 value
= MIN (f0
, f1
);
3239 value
= MAX (f0
, f1
);
3246 set_float_handler (NULL_PTR
);
3247 value
= real_value_truncate (mode
, value
);
3248 return immed_real_const_1 (value
, mode
);
3251 /* We can fold some multi-word operations. */
3252 else if (GET_MODE_CLASS (mode
) == MODE_INT
3253 && GET_CODE (op0
) == CONST_DOUBLE
3254 && (GET_CODE (op1
) == CONST_DOUBLE
|| GET_CODE (op1
) == CONST_INT
))
3256 HOST_WIDE_INT l1
, l2
, h1
, h2
, lv
, hv
;
3258 l1
= CONST_DOUBLE_LOW (op0
), h1
= CONST_DOUBLE_HIGH (op0
);
3260 if (GET_CODE (op1
) == CONST_DOUBLE
)
3261 l2
= CONST_DOUBLE_LOW (op1
), h2
= CONST_DOUBLE_HIGH (op1
);
3263 l2
= INTVAL (op1
), h2
= l2
< 0 ? -1 : 0;
3268 /* A - B == A + (-B). */
3269 neg_double (l2
, h2
, &lv
, &hv
);
3272 /* .. fall through ... */
3275 add_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3279 mul_double (l1
, h1
, l2
, h2
, &lv
, &hv
);
3282 case DIV
: case MOD
: case UDIV
: case UMOD
:
3283 /* We'd need to include tree.h to do this and it doesn't seem worth
3288 lv
= l1
& l2
, hv
= h1
& h2
;
3292 lv
= l1
| l2
, hv
= h1
| h2
;
3296 lv
= l1
^ l2
, hv
= h1
^ h2
;
3302 && ((unsigned HOST_WIDE_INT
) l1
3303 < (unsigned HOST_WIDE_INT
) l2
)))
3312 && ((unsigned HOST_WIDE_INT
) l1
3313 > (unsigned HOST_WIDE_INT
) l2
)))
3320 if ((unsigned HOST_WIDE_INT
) h1
< (unsigned HOST_WIDE_INT
) h2
3322 && ((unsigned HOST_WIDE_INT
) l1
3323 < (unsigned HOST_WIDE_INT
) l2
)))
3330 if ((unsigned HOST_WIDE_INT
) h1
> (unsigned HOST_WIDE_INT
) h2
3332 && ((unsigned HOST_WIDE_INT
) l1
3333 > (unsigned HOST_WIDE_INT
) l2
)))
3339 case LSHIFTRT
: case ASHIFTRT
:
3340 case ASHIFT
: case LSHIFT
:
3341 case ROTATE
: case ROTATERT
:
3342 #ifdef SHIFT_COUNT_TRUNCATED
3343 l2
&= (GET_MODE_BITSIZE (mode
) - 1), h2
= 0;
3346 if (h2
!= 0 || l2
< 0 || l2
>= GET_MODE_BITSIZE (mode
))
3349 if (code
== LSHIFTRT
|| code
== ASHIFTRT
)
3350 rshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3352 else if (code
== ASHIFT
|| code
== LSHIFT
)
3353 lshift_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
,
3355 else if (code
== ROTATE
)
3356 lrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3357 else /* code == ROTATERT */
3358 rrotate_double (l1
, h1
, l2
, GET_MODE_BITSIZE (mode
), &lv
, &hv
);
3365 return immed_double_const (lv
, hv
, mode
);
3367 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3369 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
3370 || width
> HOST_BITS_PER_WIDE_INT
|| width
== 0)
3372 /* Even if we can't compute a constant result,
3373 there are some cases worth simplifying. */
3378 /* In IEEE floating point, x+0 is not the same as x. Similarly
3379 for the other optimizations below. */
3380 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3381 && GET_MODE_CLASS (mode
) != MODE_INT
)
3384 if (op1
== CONST0_RTX (mode
))
3387 /* Strip off any surrounding CONSTs. They don't matter in any of
3389 if (GET_CODE (op0
) == CONST
)
3390 op0
= XEXP (op0
, 0);
3391 if (GET_CODE (op1
) == CONST
)
3392 op1
= XEXP (op1
, 0);
3394 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3395 if (GET_CODE (op0
) == NEG
)
3397 rtx tem
= simplify_binary_operation (MINUS
, mode
,
3398 op1
, XEXP (op0
, 0));
3399 return tem
? tem
: gen_rtx (MINUS
, mode
, op1
, XEXP (op0
, 0));
3401 else if (GET_CODE (op1
) == NEG
)
3403 rtx tem
= simplify_binary_operation (MINUS
, mode
,
3404 op0
, XEXP (op1
, 0));
3405 return tem
? tem
: gen_rtx (MINUS
, mode
, op0
, XEXP (op1
, 0));
3408 /* Don't use the associative law for floating point.
3409 The inaccuracy makes it nonassociative,
3410 and subtle programs can break if operations are associated. */
3411 if (GET_MODE_CLASS (mode
) != MODE_INT
)
3414 /* (a - b) + b -> a, similarly a + (b - a) -> a */
3415 if (GET_CODE (op0
) == MINUS
3416 && rtx_equal_p (XEXP (op0
, 1), op1
) && ! side_effects_p (op1
))
3417 return XEXP (op0
, 0);
3419 if (GET_CODE (op1
) == MINUS
3420 && rtx_equal_p (XEXP (op1
, 1), op0
) && ! side_effects_p (op0
))
3421 return XEXP (op1
, 0);
3423 /* (c1 - a) + c2 becomes (c1 + c2) - a. */
3424 if (GET_CODE (op1
) == CONST_INT
&& GET_CODE (op0
) == MINUS
3425 && GET_CODE (XEXP (op0
, 0)) == CONST_INT
)
3427 rtx tem
= simplify_binary_operation (PLUS
, mode
, op1
,
3430 return tem
? gen_rtx (MINUS
, mode
, tem
, XEXP (op0
, 1)) : 0;
3433 /* Handle both-operands-constant cases. */
3434 if (CONSTANT_P (op0
) && CONSTANT_P (op1
)
3435 && GET_CODE (op0
) != CONST_DOUBLE
3436 && GET_CODE (op1
) != CONST_DOUBLE
3437 && GET_MODE_CLASS (mode
) == MODE_INT
)
3439 if (GET_CODE (op1
) == CONST_INT
)
3440 return plus_constant (op0
, INTVAL (op1
));
3441 else if (GET_CODE (op0
) == CONST_INT
)
3442 return plus_constant (op1
, INTVAL (op0
));
3445 #if 0 /* No good, because this can produce the sum of two relocatable
3446 symbols, in an assembler instruction. Most UNIX assemblers can't
3449 return gen_rtx (CONST
, mode
,
3450 gen_rtx (PLUS
, mode
,
3451 GET_CODE (op0
) == CONST
3452 ? XEXP (op0
, 0) : op0
,
3453 GET_CODE (op1
) == CONST
3454 ? XEXP (op1
, 0) : op1
));
3457 else if (GET_CODE (op1
) == CONST_INT
3458 && GET_CODE (op0
) == PLUS
3459 && (CONSTANT_P (XEXP (op0
, 0))
3460 || CONSTANT_P (XEXP (op0
, 1))))
3461 /* constant + (variable + constant)
3462 can result if an index register is made constant.
3463 We simplify this by adding the constants.
3464 If we did not, it would become an invalid address. */
3465 return plus_constant (op0
, INTVAL (op1
));
3470 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3471 using cc0, in which case we want to leave it as a COMPARE
3472 so we can distinguish it from a register-register-copy.
3474 In IEEE floating point, x-0 is not the same as x. */
3476 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3477 || GET_MODE_CLASS (mode
) == MODE_INT
)
3478 && op1
== CONST0_RTX (mode
))
3481 /* Do nothing here. */
3486 /* None of these optimizations can be done for IEEE
3488 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
3489 && GET_MODE_CLASS (mode
) != MODE_INT
)
3492 /* We can't assume x-x is 0 even with non-IEEE floating point. */
3493 if (rtx_equal_p (op0
, op1
)
3494 && ! side_effects_p (op0
)
3495 && GET_MODE_CLASS (mode
) != MODE_FLOAT
)
3498 /* Change subtraction from zero into negation. */
3499 if (op0
== CONST0_RTX (mode
))
3500 return gen_rtx (NEG
, mode
, op1
);
3502 /* Subtracting 0 has no effect. */
3503 if (op1
== CONST0_RTX (mode
))
3506 /* Strip off any surrounding CONSTs. They don't matter in any of
3508 if (GET_CODE (op0
) == CONST
)
3509 op0
= XEXP (op0
, 0);
3510 if (GET_CODE (op1
) == CONST
)
3511 op1
= XEXP (op1
, 0);
3513 /* (a - (-b)) -> (a + b). */
3514 if (GET_CODE (op1
) == NEG
)
3516 rtx tem
= simplify_binary_operation (PLUS
, mode
,
3517 op0
, XEXP (op1
, 0));
3518 return tem
? tem
: gen_rtx (PLUS
, mode
, op0
, XEXP (op1
, 0));
3521 /* Don't use the associative law for floating point.
3522 The inaccuracy makes it nonassociative,
3523 and subtle programs can break if operations are associated. */
3524 if (GET_MODE_CLASS (mode
) != MODE_INT
)
3527 /* (a + b) - a -> b, and (b - (a + b)) -> -a */
3528 if (GET_CODE (op0
) == PLUS
3529 && rtx_equal_p (XEXP (op0
, 0), op1
)
3530 && ! side_effects_p (op1
))
3531 return XEXP (op0
, 1);
3532 else if (GET_CODE (op0
) == PLUS
3533 && rtx_equal_p (XEXP (op0
, 1), op1
)
3534 && ! side_effects_p (op1
))
3535 return XEXP (op0
, 0);
3537 if (GET_CODE (op1
) == PLUS
3538 && rtx_equal_p (XEXP (op1
, 0), op0
)
3539 && ! side_effects_p (op0
))
3541 rtx tem
= simplify_unary_operation (NEG
, mode
, XEXP (op1
, 1),
3544 return tem
? tem
: gen_rtx (NEG
, mode
, XEXP (op1
, 1));
3546 else if (GET_CODE (op1
) == PLUS
3547 && rtx_equal_p (XEXP (op1
, 1), op0
)
3548 && ! side_effects_p (op0
))
3550 rtx tem
= simplify_unary_operation (NEG
, mode
, XEXP (op1
, 0),
3553 return tem
? tem
: gen_rtx (NEG
, mode
, XEXP (op1
, 0));
3556 /* a - (a - b) -> b */
3557 if (GET_CODE (op1
) == MINUS
&& rtx_equal_p (op0
, XEXP (op1
, 0))
3558 && ! side_effects_p (op0
))
3559 return XEXP (op1
, 1);
3561 /* (a +/- b) - (a +/- c) can be simplified. Do variants of
3562 this involving commutativity. The most common case is
3563 (a + C1) - (a + C2), but it's not hard to do all the cases. */
3564 if ((GET_CODE (op0
) == PLUS
|| GET_CODE (op0
) == MINUS
)
3565 && (GET_CODE (op1
) == PLUS
|| GET_CODE (op1
) == MINUS
))
3567 rtx lhs0
= XEXP (op0
, 0), lhs1
= XEXP (op0
, 1);
3568 rtx rhs0
= XEXP (op1
, 0), rhs1
= XEXP (op1
, 1);
3569 int lhs_neg
= GET_CODE (op0
) == MINUS
;
3570 int rhs_neg
= GET_CODE (op1
) == MINUS
;
3571 rtx lhs
= 0, rhs
= 0;
3573 /* Set LHS and RHS to the two different terms. */
3574 if (rtx_equal_p (lhs0
, rhs0
) && ! side_effects_p (lhs0
))
3575 lhs
= lhs1
, rhs
= rhs1
;
3576 else if (! rhs_neg
&& rtx_equal_p (lhs0
, rhs1
)
3577 && ! side_effects_p (lhs0
))
3578 lhs
= lhs1
, rhs
= rhs0
;
3579 else if (! lhs_neg
&& rtx_equal_p (lhs1
, rhs0
)
3580 && ! side_effects_p (lhs1
))
3581 lhs
= lhs0
, rhs
= rhs1
;
3582 else if (! lhs_neg
&& ! rhs_neg
&& rtx_equal_p (lhs1
, rhs1
)
3583 && ! side_effects_p (lhs1
))
3584 lhs
= lhs0
, rhs
= rhs0
;
3586 /* The RHS is the operand of a MINUS, so its negation
3587 status should be complemented. */
3588 rhs_neg
= ! rhs_neg
;
3590 /* If we found two values equal, form the sum or difference
3591 of the remaining two terms. */
3594 rtx tem
= simplify_binary_operation (lhs_neg
== rhs_neg
3597 lhs_neg
? rhs
: lhs
,
3598 lhs_neg
? lhs
: rhs
);
3600 tem
= gen_rtx (lhs_neg
== rhs_neg
3602 mode
, lhs_neg
? rhs
: lhs
,
3603 lhs_neg
? lhs
: rhs
);
3605 /* If both sides negated, negate result. */
3606 if (lhs_neg
&& rhs_neg
)
3609 = simplify_unary_operation (NEG
, mode
, tem
, mode
);
3611 tem1
= gen_rtx (NEG
, mode
, tem
);
3621 /* c1 - (a + c2) becomes (c1 - c2) - a. */
3622 if (GET_CODE (op0
) == CONST_INT
&& GET_CODE (op1
) == PLUS
3623 && GET_CODE (XEXP (op1
, 1)) == CONST_INT
)
3625 rtx tem
= simplify_binary_operation (MINUS
, mode
, op0
,
3628 return tem
? gen_rtx (MINUS
, mode
, tem
, XEXP (op1
, 0)) : 0;
3631 /* c1 - (c2 - a) becomes (c1 - c2) + a. */
3632 if (GET_CODE (op0
) == CONST_INT
&& GET_CODE (op1
) == MINUS
3633 && GET_CODE (XEXP (op1
, 0)) == CONST_INT
)
3635 rtx tem
= simplify_binary_operation (MINUS
, mode
, op0
,
3638 return (tem
&& GET_CODE (tem
) == CONST_INT
3639 ? plus_constant (XEXP (op1
, 1), INTVAL (tem
))
3643 /* Don't let a relocatable value get a negative coeff. */
3644 if (GET_CODE (op1
) == CONST_INT
)
3645 return plus_constant (op0
, - INTVAL (op1
));
3649 if (op1
== constm1_rtx
)
3651 rtx tem
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3653 return tem
? tem
: gen_rtx (NEG
, mode
, op0
);
3656 /* In IEEE floating point, x*0 is not always 0. */
3657 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3658 || GET_MODE_CLASS (mode
) == MODE_INT
)
3659 && op1
== CONST0_RTX (mode
)
3660 && ! side_effects_p (op0
))
3663 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3664 However, ANSI says we can drop signals,
3665 so we can do this anyway. */
3666 if (op1
== CONST1_RTX (mode
))
3669 /* Convert multiply by constant power of two into shift. */
3670 if (GET_CODE (op1
) == CONST_INT
3671 && (val
= exact_log2 (INTVAL (op1
))) >= 0)
3672 return gen_rtx (ASHIFT
, mode
, op0
, GEN_INT (val
));
3674 if (GET_CODE (op1
) == CONST_DOUBLE
3675 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
)
3678 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3680 /* x*2 is x+x and x*(-1) is -x */
3681 if (REAL_VALUES_EQUAL (d
, dconst2
)
3682 && GET_MODE (op0
) == mode
)
3683 return gen_rtx (PLUS
, mode
, op0
, copy_rtx (op0
));
3685 else if (REAL_VALUES_EQUAL (d
, dconstm1
)
3686 && GET_MODE (op0
) == mode
)
3687 return gen_rtx (NEG
, mode
, op0
);
3692 if (op1
== const0_rtx
)
3694 if (GET_CODE (op1
) == CONST_INT
3695 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3697 if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3699 /* A | (~A) -> -1 */
3700 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3701 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3702 && ! side_effects_p (op0
))
3707 if (op1
== const0_rtx
)
3709 if (GET_CODE (op1
) == CONST_INT
3710 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3711 return gen_rtx (NOT
, mode
, op0
);
3712 if (op0
== op1
&& ! side_effects_p (op0
))
3717 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3719 if (GET_CODE (op1
) == CONST_INT
3720 && (INTVAL (op1
) & GET_MODE_MASK (mode
)) == GET_MODE_MASK (mode
))
3722 if (op0
== op1
&& ! side_effects_p (op0
))
3725 if (((GET_CODE (op0
) == NOT
&& rtx_equal_p (XEXP (op0
, 0), op1
))
3726 || (GET_CODE (op1
) == NOT
&& rtx_equal_p (XEXP (op1
, 0), op0
)))
3727 && ! side_effects_p (op0
))
3732 /* Convert divide by power of two into shift (divide by 1 handled
3734 if (GET_CODE (op1
) == CONST_INT
3735 && (arg1
= exact_log2 (INTVAL (op1
))) > 0)
3736 return gen_rtx (LSHIFTRT
, mode
, op0
, GEN_INT (arg1
));
3738 /* ... fall through ... */
3741 if (op1
== CONST1_RTX (mode
))
3744 /* In IEEE floating point, 0/x is not always 0. */
3745 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
3746 || GET_MODE_CLASS (mode
) == MODE_INT
)
3747 && op0
== CONST0_RTX (mode
)
3748 && ! side_effects_p (op1
))
3751 #if 0 /* Turned off till an expert says this is a safe thing to do. */
3752 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3753 /* Change division by a constant into multiplication. */
3754 else if (GET_CODE (op1
) == CONST_DOUBLE
3755 && GET_MODE_CLASS (GET_MODE (op1
)) == MODE_FLOAT
3756 && op1
!= CONST0_RTX (mode
))
3759 REAL_VALUE_FROM_CONST_DOUBLE (d
, op1
);
3760 if (REAL_VALUES_EQUAL (d
, dconst0
))
3762 #if defined (REAL_ARITHMETIC)
3763 REAL_ARITHMETIC (d
, RDIV_EXPR
, dconst1
, d
);
3764 return gen_rtx (MULT
, mode
, op0
,
3765 CONST_DOUBLE_FROM_REAL_VALUE (d
, mode
));
3767 return gen_rtx (MULT
, mode
, op0
,
3768 CONST_DOUBLE_FROM_REAL_VALUE (1./d
, mode
));
3776 /* Handle modulus by power of two (mod with 1 handled below). */
3777 if (GET_CODE (op1
) == CONST_INT
3778 && exact_log2 (INTVAL (op1
)) > 0)
3779 return gen_rtx (AND
, mode
, op0
, GEN_INT (INTVAL (op1
) - 1));
3781 /* ... fall through ... */
3784 if ((op0
== const0_rtx
|| op1
== const1_rtx
)
3785 && ! side_effects_p (op0
) && ! side_effects_p (op1
))
3791 /* Rotating ~0 always results in ~0. */
3792 if (GET_CODE (op0
) == CONST_INT
&& width
<= HOST_BITS_PER_WIDE_INT
3793 && INTVAL (op0
) == GET_MODE_MASK (mode
)
3794 && ! side_effects_p (op1
))
3797 /* ... fall through ... */
3803 if (op1
== const0_rtx
)
3805 if (op0
== const0_rtx
&& ! side_effects_p (op1
))
3810 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3811 && INTVAL (op1
) == (HOST_WIDE_INT
) 1 << (width
-1)
3812 && ! side_effects_p (op0
))
3814 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3819 if (width
<= HOST_BITS_PER_WIDE_INT
&& GET_CODE (op1
) == CONST_INT
3820 && INTVAL (op1
) == GET_MODE_MASK (mode
) >> 1
3821 && ! side_effects_p (op0
))
3823 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3828 if (op1
== const0_rtx
&& ! side_effects_p (op0
))
3830 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3835 if (op1
== constm1_rtx
&& ! side_effects_p (op0
))
3837 else if (rtx_equal_p (op0
, op1
) && ! side_effects_p (op0
))
3848 /* Get the integer argument values in two forms:
3849 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
3851 arg0
= INTVAL (op0
);
3852 arg1
= INTVAL (op1
);
3854 if (width
< HOST_BITS_PER_WIDE_INT
)
3856 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3857 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
3860 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
3861 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
3864 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
3865 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
3873 /* Compute the value of the arithmetic. */
3878 val
= arg0s
+ arg1s
;
3882 val
= arg0s
- arg1s
;
3886 val
= arg0s
* arg1s
;
3892 val
= arg0s
/ arg1s
;
3898 val
= arg0s
% arg1s
;
3904 val
= (unsigned HOST_WIDE_INT
) arg0
/ arg1
;
3910 val
= (unsigned HOST_WIDE_INT
) arg0
% arg1
;
3926 /* If shift count is undefined, don't fold it; let the machine do
3927 what it wants. But truncate it if the machine will do that. */
3931 #ifdef SHIFT_COUNT_TRUNCATED
3932 arg1
&= (BITS_PER_WORD
- 1);
3938 val
= ((unsigned HOST_WIDE_INT
) arg0
) >> arg1
;
3946 #ifdef SHIFT_COUNT_TRUNCATED
3947 arg1
&= (BITS_PER_WORD
- 1);
3953 val
= ((unsigned HOST_WIDE_INT
) arg0
) << arg1
;
3960 #ifdef SHIFT_COUNT_TRUNCATED
3961 arg1
&= (BITS_PER_WORD
- 1);
3967 val
= arg0s
>> arg1
;
3969 /* Bootstrap compiler may not have sign extended the right shift.
3970 Manually extend the sign to insure bootstrap cc matches gcc. */
3971 if (arg0s
< 0 && arg1
> 0)
3972 val
|= ((HOST_WIDE_INT
) -1) << (HOST_BITS_PER_WIDE_INT
- arg1
);
3981 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << (width
- arg1
))
3982 | (((unsigned HOST_WIDE_INT
) arg0
) >> arg1
));
3990 val
= ((((unsigned HOST_WIDE_INT
) arg0
) << arg1
)
3991 | (((unsigned HOST_WIDE_INT
) arg0
) >> (width
- arg1
)));
3995 /* Do nothing here. */
3999 val
= arg0s
<= arg1s
? arg0s
: arg1s
;
4003 val
= ((unsigned HOST_WIDE_INT
) arg0
4004 <= (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4008 val
= arg0s
> arg1s
? arg0s
: arg1s
;
4012 val
= ((unsigned HOST_WIDE_INT
) arg0
4013 > (unsigned HOST_WIDE_INT
) arg1
? arg0
: arg1
);
4020 /* Clear the bits that don't belong in our mode, unless they and our sign
4021 bit are all one. So we get either a reasonable negative value or a
4022 reasonable unsigned value for this mode. */
4023 if (width
< HOST_BITS_PER_WIDE_INT
4024 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4025 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4026 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4028 return GEN_INT (val
);
4031 /* Like simplify_binary_operation except used for relational operators.
4032 MODE is the mode of the operands, not that of the result. */
4035 simplify_relational_operation (code
, mode
, op0
, op1
)
4037 enum machine_mode mode
;
4040 register HOST_WIDE_INT arg0
, arg1
, arg0s
, arg1s
;
4042 int width
= GET_MODE_BITSIZE (mode
);
4044 /* If op0 is a compare, extract the comparison arguments from it. */
4045 if (GET_CODE (op0
) == COMPARE
&& op1
== const0_rtx
)
4046 op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4048 if (GET_CODE (op0
) != CONST_INT
|| GET_CODE (op1
) != CONST_INT
4049 || width
> HOST_BITS_PER_WIDE_INT
|| width
== 0)
4051 /* Even if we can't compute a constant result,
4052 there are some cases worth simplifying. */
4054 /* For non-IEEE floating-point, if the two operands are equal, we know
4056 if (rtx_equal_p (op0
, op1
)
4057 && (TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4058 || GET_MODE_CLASS (GET_MODE (op0
)) != MODE_FLOAT
))
4059 return (code
== EQ
|| code
== GE
|| code
== LE
|| code
== LEU
4060 || code
== GEU
) ? const_true_rtx
: const0_rtx
;
4061 else if (GET_CODE (op0
) == CONST_DOUBLE
4062 && GET_CODE (op1
) == CONST_DOUBLE
4063 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
4065 REAL_VALUE_TYPE d0
, d1
;
4067 int op0lt
, op1lt
, equal
;
4069 if (setjmp (handler
))
4072 set_float_handler (handler
);
4073 REAL_VALUE_FROM_CONST_DOUBLE (d0
, op0
);
4074 REAL_VALUE_FROM_CONST_DOUBLE (d1
, op1
);
4075 equal
= REAL_VALUES_EQUAL (d0
, d1
);
4076 op0lt
= REAL_VALUES_LESS (d0
, d1
);
4077 op1lt
= REAL_VALUES_LESS (d1
, d0
);
4078 set_float_handler (NULL_PTR
);
4083 return equal
? const_true_rtx
: const0_rtx
;
4085 return !equal
? const_true_rtx
: const0_rtx
;
4087 return equal
|| op0lt
? const_true_rtx
: const0_rtx
;
4089 return op0lt
? const_true_rtx
: const0_rtx
;
4091 return equal
|| op1lt
? const_true_rtx
: const0_rtx
;
4093 return op1lt
? const_true_rtx
: const0_rtx
;
4102 /* We can't make this assumption due to #pragma weak */
4103 if (CONSTANT_P (op0
) && op1
== const0_rtx
)
4106 if (NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
4107 /* On some machines, the ap reg can be 0 sometimes. */
4108 && op0
!= arg_pointer_rtx
)
4115 /* We can't make this assumption due to #pragma weak */
4116 if (CONSTANT_P (op0
) && op1
== const0_rtx
)
4117 return const_true_rtx
;
4119 if (NONZERO_BASE_PLUS_P (op0
) && op1
== const0_rtx
4120 /* On some machines, the ap reg can be 0 sometimes. */
4121 && op0
!= arg_pointer_rtx
)
4122 return const_true_rtx
;
4126 /* Unsigned values are never negative, but we must be sure we are
4127 actually comparing a value, not a CC operand. */
4128 if (op1
== const0_rtx
4129 && GET_MODE_CLASS (mode
) == MODE_INT
)
4130 return const_true_rtx
;
4134 if (op1
== const0_rtx
4135 && GET_MODE_CLASS (mode
) == MODE_INT
)
4140 /* Unsigned values are never greater than the largest
4142 if (GET_CODE (op1
) == CONST_INT
4143 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4144 && GET_MODE_CLASS (mode
) == MODE_INT
)
4145 return const_true_rtx
;
4149 if (GET_CODE (op1
) == CONST_INT
4150 && INTVAL (op1
) == GET_MODE_MASK (mode
)
4151 && GET_MODE_CLASS (mode
) == MODE_INT
)
4159 /* Get the integer argument values in two forms:
4160 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4162 arg0
= INTVAL (op0
);
4163 arg1
= INTVAL (op1
);
4165 if (width
< HOST_BITS_PER_WIDE_INT
)
4167 arg0
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4168 arg1
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4171 if (arg0s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4172 arg0s
|= ((HOST_WIDE_INT
) (-1) << width
);
4175 if (arg1s
& ((HOST_WIDE_INT
) 1 << (width
- 1)))
4176 arg1s
|= ((HOST_WIDE_INT
) (-1) << width
);
4184 /* Compute the value of the arithmetic. */
4189 val
= arg0
!= arg1
? STORE_FLAG_VALUE
: 0;
4193 val
= arg0
== arg1
? STORE_FLAG_VALUE
: 0;
4197 val
= arg0s
<= arg1s
? STORE_FLAG_VALUE
: 0;
4201 val
= arg0s
< arg1s
? STORE_FLAG_VALUE
: 0;
4205 val
= arg0s
>= arg1s
? STORE_FLAG_VALUE
: 0;
4209 val
= arg0s
> arg1s
? STORE_FLAG_VALUE
: 0;
4213 val
= (((unsigned HOST_WIDE_INT
) arg0
)
4214 <= ((unsigned HOST_WIDE_INT
) arg1
) ? STORE_FLAG_VALUE
: 0);
4218 val
= (((unsigned HOST_WIDE_INT
) arg0
)
4219 < ((unsigned HOST_WIDE_INT
) arg1
) ? STORE_FLAG_VALUE
: 0);
4223 val
= (((unsigned HOST_WIDE_INT
) arg0
)
4224 >= ((unsigned HOST_WIDE_INT
) arg1
) ? STORE_FLAG_VALUE
: 0);
4228 val
= (((unsigned HOST_WIDE_INT
) arg0
)
4229 > ((unsigned HOST_WIDE_INT
) arg1
) ? STORE_FLAG_VALUE
: 0);
4236 /* Clear the bits that don't belong in our mode, unless they and our sign
4237 bit are all one. So we get either a reasonable negative value or a
4238 reasonable unsigned value for this mode. */
4239 if (width
< HOST_BITS_PER_WIDE_INT
4240 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4241 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4242 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4244 return GEN_INT (val
);
4247 /* Simplify CODE, an operation with result mode MODE and three operands,
4248 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4249 a constant. Return 0 if no simplifications is possible. */
4252 simplify_ternary_operation (code
, mode
, op0_mode
, op0
, op1
, op2
)
4254 enum machine_mode mode
, op0_mode
;
4257 int width
= GET_MODE_BITSIZE (mode
);
4259 /* VOIDmode means "infinite" precision. */
4261 width
= HOST_BITS_PER_WIDE_INT
;
4267 if (GET_CODE (op0
) == CONST_INT
4268 && GET_CODE (op1
) == CONST_INT
4269 && GET_CODE (op2
) == CONST_INT
4270 && INTVAL (op1
) + INTVAL (op2
) <= GET_MODE_BITSIZE (op0_mode
)
4271 && width
<= HOST_BITS_PER_WIDE_INT
)
4273 /* Extracting a bit-field from a constant */
4274 HOST_WIDE_INT val
= INTVAL (op0
);
4277 val
>>= (GET_MODE_BITSIZE (op0_mode
) - INTVAL (op2
) - INTVAL (op1
));
4279 val
>>= INTVAL (op2
);
4281 if (HOST_BITS_PER_WIDE_INT
!= INTVAL (op1
))
4283 /* First zero-extend. */
4284 val
&= ((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1;
4285 /* If desired, propagate sign bit. */
4286 if (code
== SIGN_EXTRACT
4287 && (val
& ((HOST_WIDE_INT
) 1 << (INTVAL (op1
) - 1))))
4288 val
|= ~ (((HOST_WIDE_INT
) 1 << INTVAL (op1
)) - 1);
4291 /* Clear the bits that don't belong in our mode,
4292 unless they and our sign bit are all one.
4293 So we get either a reasonable negative value or a reasonable
4294 unsigned value for this mode. */
4295 if (width
< HOST_BITS_PER_WIDE_INT
4296 && ((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
4297 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
4298 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
4300 return GEN_INT (val
);
4305 if (GET_CODE (op0
) == CONST_INT
)
4306 return op0
!= const0_rtx
? op1
: op2
;
4316 /* If X is a nontrivial arithmetic operation on an argument
4317 for which a constant value can be determined, return
4318 the result of operating on that value, as a constant.
4319 Otherwise, return X, possibly with one or more operands
4320 modified by recursive calls to this function.
4322 If X is a register whose contents are known, we do NOT
4323 return those contents. This is because an instruction that
4324 uses a register is usually faster than one that uses a constant.
4326 INSN is the insn that we may be modifying. If it is 0, make a copy
4327 of X before modifying it. */
4334 register enum rtx_code code
;
4335 register enum machine_mode mode
;
4342 /* Folded equivalents of first two operands of X. */
4346 /* Constant equivalents of first three operands of X;
4347 0 when no such equivalent is known. */
4352 /* The mode of the first operand of X. We need this for sign and zero
4354 enum machine_mode mode_arg0
;
4359 mode
= GET_MODE (x
);
4360 code
= GET_CODE (x
);
4369 /* No use simplifying an EXPR_LIST
4370 since they are used only for lists of args
4371 in a function call's REG_EQUAL note. */
4377 return prev_insn_cc0
;
4381 /* If the next insn is a CODE_LABEL followed by a jump table,
4382 PC's value is a LABEL_REF pointing to that label. That
4383 lets us fold switch statements on the Vax. */
4384 if (insn
&& GET_CODE (insn
) == JUMP_INSN
)
4386 rtx next
= next_nonnote_insn (insn
);
4388 if (next
&& GET_CODE (next
) == CODE_LABEL
4389 && NEXT_INSN (next
) != 0
4390 && GET_CODE (NEXT_INSN (next
)) == JUMP_INSN
4391 && (GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_VEC
4392 || GET_CODE (PATTERN (NEXT_INSN (next
))) == ADDR_DIFF_VEC
))
4393 return gen_rtx (LABEL_REF
, Pmode
, next
);
4398 /* See if we previously assigned a constant value to this SUBREG. */
4399 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
4400 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
4403 /* If this is a paradoxical SUBREG, we have no idea what value the
4404 extra bits would have. However, if the operand is equivalent
4405 to a SUBREG whose operand is the same as our mode, and all the
4406 modes are within a word, we can just use the inner operand
4407 because these SUBREGs just say how to treat the register. */
4409 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4411 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
4412 struct table_elt
*elt
;
4414 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
4415 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
4416 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
4419 for (elt
= elt
->first_same_value
;
4420 elt
; elt
= elt
->next_same_value
)
4421 if (GET_CODE (elt
->exp
) == SUBREG
4422 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4423 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4424 return copy_rtx (SUBREG_REG (elt
->exp
));
4430 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4431 We might be able to if the SUBREG is extracting a single word in an
4432 integral mode or extracting the low part. */
4434 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
4435 const_arg0
= equiv_constant (folded_arg0
);
4437 folded_arg0
= const_arg0
;
4439 if (folded_arg0
!= SUBREG_REG (x
))
4443 if (GET_MODE_CLASS (mode
) == MODE_INT
4444 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4445 && GET_MODE (SUBREG_REG (x
)) != VOIDmode
)
4446 new = operand_subword (folded_arg0
, SUBREG_WORD (x
), 0,
4447 GET_MODE (SUBREG_REG (x
)));
4448 if (new == 0 && subreg_lowpart_p (x
))
4449 new = gen_lowpart_if_possible (mode
, folded_arg0
);
4454 /* If this is a narrowing SUBREG and our operand is a REG, see if
4455 we can find an equivalence for REG that is an arithmetic operation
4456 in a wider mode where both operands are paradoxical SUBREGs
4457 from objects of our result mode. In that case, we couldn't report
4458 an equivalent value for that operation, since we don't know what the
4459 extra bits will be. But we can find an equivalence for this SUBREG
4460 by folding that operation is the narrow mode. This allows us to
4461 fold arithmetic in narrow modes when the machine only supports
4462 word-sized arithmetic.
4464 Also look for a case where we have a SUBREG whose operand is the
4465 same as our result. If both modes are smaller than a word, we
4466 are simply interpreting a register in different modes and we
4467 can use the inner value. */
4469 if (GET_CODE (folded_arg0
) == REG
4470 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
))
4471 && subreg_lowpart_p (x
))
4473 struct table_elt
*elt
;
4475 /* We can use HASH here since we know that canon_hash won't be
4477 elt
= lookup (folded_arg0
,
4478 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
4479 GET_MODE (folded_arg0
));
4482 elt
= elt
->first_same_value
;
4484 for (; elt
; elt
= elt
->next_same_value
)
4486 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
4488 /* Just check for unary and binary operations. */
4489 if (GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '1'
4490 && GET_CODE (elt
->exp
) != SIGN_EXTEND
4491 && GET_CODE (elt
->exp
) != ZERO_EXTEND
4492 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4493 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
)
4495 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
4497 if (GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4498 op0
= fold_rtx (op0
, NULL_RTX
);
4500 op0
= equiv_constant (op0
);
4502 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
4505 else if ((GET_RTX_CLASS (GET_CODE (elt
->exp
)) == '2'
4506 || GET_RTX_CLASS (GET_CODE (elt
->exp
)) == 'c')
4507 && eltcode
!= DIV
&& eltcode
!= MOD
4508 && eltcode
!= UDIV
&& eltcode
!= UMOD
4509 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
4510 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
4511 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
4512 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
4514 || CONSTANT_P (XEXP (elt
->exp
, 0)))
4515 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
4516 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
4518 || CONSTANT_P (XEXP (elt
->exp
, 1))))
4520 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
4521 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
4523 if (op0
&& GET_CODE (op0
) != REG
&& ! CONSTANT_P (op0
))
4524 op0
= fold_rtx (op0
, NULL_RTX
);
4527 op0
= equiv_constant (op0
);
4529 if (op1
&& GET_CODE (op1
) != REG
&& ! CONSTANT_P (op1
))
4530 op1
= fold_rtx (op1
, NULL_RTX
);
4533 op1
= equiv_constant (op1
);
4536 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
,
4540 else if (GET_CODE (elt
->exp
) == SUBREG
4541 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
4542 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
4544 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
4545 new = copy_rtx (SUBREG_REG (elt
->exp
));
4556 /* If we have (NOT Y), see if Y is known to be (NOT Z).
4557 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
4558 new = lookup_as_function (XEXP (x
, 0), code
);
4560 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
4564 /* If we are not actually processing an insn, don't try to find the
4565 best address. Not only don't we care, but we could modify the
4566 MEM in an invalid way since we have no insn to validate against. */
4568 find_best_addr (insn
, &XEXP (x
, 0));
4571 /* Even if we don't fold in the insn itself,
4572 we can safely do so here, in hopes of getting a constant. */
4573 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
4575 HOST_WIDE_INT offset
= 0;
4577 if (GET_CODE (addr
) == REG
4578 && REGNO_QTY_VALID_P (REGNO (addr
))
4579 && GET_MODE (addr
) == qty_mode
[reg_qty
[REGNO (addr
)]]
4580 && qty_const
[reg_qty
[REGNO (addr
)]] != 0)
4581 addr
= qty_const
[reg_qty
[REGNO (addr
)]];
4583 /* If address is constant, split it into a base and integer offset. */
4584 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
4586 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
4587 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
4589 base
= XEXP (XEXP (addr
, 0), 0);
4590 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
4592 else if (GET_CODE (addr
) == LO_SUM
4593 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
4594 base
= XEXP (addr
, 1);
4596 /* If this is a constant pool reference, we can fold it into its
4597 constant to allow better value tracking. */
4598 if (base
&& GET_CODE (base
) == SYMBOL_REF
4599 && CONSTANT_POOL_ADDRESS_P (base
))
4601 rtx constant
= get_pool_constant (base
);
4602 enum machine_mode const_mode
= get_pool_mode (base
);
4605 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
4606 constant_pool_entries_cost
= COST (constant
);
4608 /* If we are loading the full constant, we have an equivalence. */
4609 if (offset
== 0 && mode
== const_mode
)
4612 /* If this actually isn't a constant (wierd!), we can't do
4613 anything. Otherwise, handle the two most common cases:
4614 extracting a word from a multi-word constant, and extracting
4615 the low-order bits. Other cases don't seem common enough to
4617 if (! CONSTANT_P (constant
))
4620 if (GET_MODE_CLASS (mode
) == MODE_INT
4621 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
4622 && offset
% UNITS_PER_WORD
== 0
4623 && (new = operand_subword (constant
,
4624 offset
/ UNITS_PER_WORD
,
4625 0, const_mode
)) != 0)
4628 if (((BYTES_BIG_ENDIAN
4629 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
4630 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
4631 && (new = gen_lowpart_if_possible (mode
, constant
)) != 0)
4635 /* If this is a reference to a label at a known position in a jump
4636 table, we also know its value. */
4637 if (base
&& GET_CODE (base
) == LABEL_REF
)
4639 rtx label
= XEXP (base
, 0);
4640 rtx table_insn
= NEXT_INSN (label
);
4642 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
4643 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
4645 rtx table
= PATTERN (table_insn
);
4648 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
4649 < XVECLEN (table
, 0)))
4650 return XVECEXP (table
, 0,
4651 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
4653 if (table_insn
&& GET_CODE (table_insn
) == JUMP_INSN
4654 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
4656 rtx table
= PATTERN (table_insn
);
4659 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
4660 < XVECLEN (table
, 1)))
4662 offset
/= GET_MODE_SIZE (GET_MODE (table
));
4663 new = gen_rtx (MINUS
, Pmode
, XVECEXP (table
, 1, offset
),
4666 if (GET_MODE (table
) != Pmode
)
4667 new = gen_rtx (TRUNCATE
, GET_MODE (table
), new);
4681 mode_arg0
= VOIDmode
;
4683 /* Try folding our operands.
4684 Then see which ones have constant values known. */
4686 fmt
= GET_RTX_FORMAT (code
);
4687 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4690 rtx arg
= XEXP (x
, i
);
4691 rtx folded_arg
= arg
, const_arg
= 0;
4692 enum machine_mode mode_arg
= GET_MODE (arg
);
4693 rtx cheap_arg
, expensive_arg
;
4694 rtx replacements
[2];
4697 /* Most arguments are cheap, so handle them specially. */
4698 switch (GET_CODE (arg
))
4701 /* This is the same as calling equiv_constant; it is duplicated
4703 if (REGNO_QTY_VALID_P (REGNO (arg
))
4704 && qty_const
[reg_qty
[REGNO (arg
)]] != 0
4705 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != REG
4706 && GET_CODE (qty_const
[reg_qty
[REGNO (arg
)]]) != PLUS
)
4708 = gen_lowpart_if_possible (GET_MODE (arg
),
4709 qty_const
[reg_qty
[REGNO (arg
)]]);
4722 folded_arg
= prev_insn_cc0
;
4723 mode_arg
= prev_insn_cc0_mode
;
4724 const_arg
= equiv_constant (folded_arg
);
4729 folded_arg
= fold_rtx (arg
, insn
);
4730 const_arg
= equiv_constant (folded_arg
);
4733 /* For the first three operands, see if the operand
4734 is constant or equivalent to a constant. */
4738 folded_arg0
= folded_arg
;
4739 const_arg0
= const_arg
;
4740 mode_arg0
= mode_arg
;
4743 folded_arg1
= folded_arg
;
4744 const_arg1
= const_arg
;
4747 const_arg2
= const_arg
;
4751 /* Pick the least expensive of the folded argument and an
4752 equivalent constant argument. */
4753 if (const_arg
== 0 || const_arg
== folded_arg
4754 || COST (const_arg
) > COST (folded_arg
))
4755 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
4757 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
4759 /* Try to replace the operand with the cheapest of the two
4760 possibilities. If it doesn't work and this is either of the first
4761 two operands of a commutative operation, try swapping them.
4762 If THAT fails, try the more expensive, provided it is cheaper
4763 than what is already there. */
4765 if (cheap_arg
== XEXP (x
, i
))
4768 if (insn
== 0 && ! copied
)
4774 replacements
[0] = cheap_arg
, replacements
[1] = expensive_arg
;
4776 j
< 2 && replacements
[j
]
4777 && COST (replacements
[j
]) < COST (XEXP (x
, i
));
4780 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
4783 if (code
== NE
|| code
== EQ
|| GET_RTX_CLASS (code
) == 'c')
4785 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
4786 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
4788 if (apply_change_group ())
4790 /* Swap them back to be invalid so that this loop can
4791 continue and flag them to be swapped back later. */
4794 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
4803 else if (fmt
[i
] == 'E')
4804 /* Don't try to fold inside of a vector of expressions.
4805 Doing nothing is harmless. */
4808 /* If a commutative operation, place a constant integer as the second
4809 operand unless the first operand is also a constant integer. Otherwise,
4810 place any constant second unless the first operand is also a constant. */
4812 if (code
== EQ
|| code
== NE
|| GET_RTX_CLASS (code
) == 'c')
4814 if (must_swap
|| (const_arg0
4816 || (GET_CODE (const_arg0
) == CONST_INT
4817 && GET_CODE (const_arg1
) != CONST_INT
))))
4819 register rtx tem
= XEXP (x
, 0);
4821 if (insn
== 0 && ! copied
)
4827 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
4828 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
4829 if (apply_change_group ())
4831 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
4832 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
4837 /* If X is an arithmetic operation, see if we can simplify it. */
4839 switch (GET_RTX_CLASS (code
))
4842 /* We can't simplify extension ops unless we know the original mode. */
4843 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
4844 && mode_arg0
== VOIDmode
)
4846 new = simplify_unary_operation (code
, mode
,
4847 const_arg0
? const_arg0
: folded_arg0
,
4852 /* See what items are actually being compared and set FOLDED_ARG[01]
4853 to those values and CODE to the actual comparison code. If any are
4854 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
4855 do anything if both operands are already known to be constant. */
4857 if (const_arg0
== 0 || const_arg1
== 0)
4859 struct table_elt
*p0
, *p1
;
4860 rtx
true = const_true_rtx
, false = const0_rtx
;
4861 enum machine_mode mode_arg1
;
4863 #ifdef FLOAT_STORE_FLAG_VALUE
4864 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
4866 true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
);
4867 false = CONST0_RTX (mode
);
4871 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
4872 &mode_arg0
, &mode_arg1
);
4873 const_arg0
= equiv_constant (folded_arg0
);
4874 const_arg1
= equiv_constant (folded_arg1
);
4876 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
4877 what kinds of things are being compared, so we can't do
4878 anything with this comparison. */
4880 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
4883 /* If we do not now have two constants being compared, see if we
4884 can nevertheless deduce some things about the comparison. */
4885 if (const_arg0
== 0 || const_arg1
== 0)
4887 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit
4888 constant? These aren't zero, but we don't know their sign. */
4889 if (const_arg1
== const0_rtx
4890 && (NONZERO_BASE_PLUS_P (folded_arg0
)
4891 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
4893 || GET_CODE (folded_arg0
) == SYMBOL_REF
4895 || GET_CODE (folded_arg0
) == LABEL_REF
4896 || GET_CODE (folded_arg0
) == CONST
))
4900 else if (code
== NE
)
4904 /* See if the two operands are the same. We don't do this
4905 for IEEE floating-point since we can't assume x == x
4906 since x might be a NaN. */
4908 if ((TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
4909 || GET_MODE_CLASS (mode_arg0
) != MODE_FLOAT
)
4910 && (folded_arg0
== folded_arg1
4911 || (GET_CODE (folded_arg0
) == REG
4912 && GET_CODE (folded_arg1
) == REG
4913 && (reg_qty
[REGNO (folded_arg0
)]
4914 == reg_qty
[REGNO (folded_arg1
)]))
4915 || ((p0
= lookup (folded_arg0
,
4916 (safe_hash (folded_arg0
, mode_arg0
)
4917 % NBUCKETS
), mode_arg0
))
4918 && (p1
= lookup (folded_arg1
,
4919 (safe_hash (folded_arg1
, mode_arg0
)
4920 % NBUCKETS
), mode_arg0
))
4921 && p0
->first_same_value
== p1
->first_same_value
)))
4922 return ((code
== EQ
|| code
== LE
|| code
== GE
4923 || code
== LEU
|| code
== GEU
)
4926 /* If FOLDED_ARG0 is a register, see if the comparison we are
4927 doing now is either the same as we did before or the reverse
4928 (we only check the reverse if not floating-point). */
4929 else if (GET_CODE (folded_arg0
) == REG
)
4931 int qty
= reg_qty
[REGNO (folded_arg0
)];
4933 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
))
4934 && (comparison_dominates_p (qty_comparison_code
[qty
], code
)
4935 || (comparison_dominates_p (qty_comparison_code
[qty
],
4936 reverse_condition (code
))
4937 && GET_MODE_CLASS (mode_arg0
) == MODE_INT
))
4938 && (rtx_equal_p (qty_comparison_const
[qty
], folded_arg1
)
4940 && rtx_equal_p (qty_comparison_const
[qty
],
4942 || (GET_CODE (folded_arg1
) == REG
4943 && (reg_qty
[REGNO (folded_arg1
)]
4944 == qty_comparison_qty
[qty
]))))
4945 return (comparison_dominates_p (qty_comparison_code
[qty
],
4952 /* If we are comparing against zero, see if the first operand is
4953 equivalent to an IOR with a constant. If so, we may be able to
4954 determine the result of this comparison. */
4956 if (const_arg1
== const0_rtx
)
4958 rtx y
= lookup_as_function (folded_arg0
, IOR
);
4962 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
4963 && GET_CODE (inner_const
) == CONST_INT
4964 && INTVAL (inner_const
) != 0)
4966 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
4967 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
4968 && (INTVAL (inner_const
)
4969 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
4970 rtx
true = const_true_rtx
, false = const0_rtx
;
4972 #ifdef FLOAT_STORE_FLAG_VALUE
4973 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
4975 true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
);
4976 false = CONST0_RTX (mode
);
4998 new = simplify_relational_operation (code
, mode_arg0
,
4999 const_arg0
? const_arg0
: folded_arg0
,
5000 const_arg1
? const_arg1
: folded_arg1
);
5001 #ifdef FLOAT_STORE_FLAG_VALUE
5002 if (new != 0 && GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5003 new = ((new == const0_rtx
) ? CONST0_RTX (mode
)
5004 : immed_real_const_1 (FLOAT_STORE_FLAG_VALUE
, mode
));
5013 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5014 with that LABEL_REF as its second operand. If so, the result is
5015 the first operand of that MINUS. This handles switches with an
5016 ADDR_DIFF_VEC table. */
5017 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
5019 rtx y
= lookup_as_function (folded_arg0
, MINUS
);
5021 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
5022 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
5028 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5029 If so, produce (PLUS Z C2-C). */
5030 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
5032 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
5033 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
5034 return fold_rtx (plus_constant (y
, -INTVAL (const_arg1
)));
5037 /* ... fall through ... */
5040 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
5041 case IOR
: case AND
: case XOR
:
5042 case MULT
: case DIV
: case UDIV
:
5043 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
5044 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5045 is known to be of similar form, we may be able to replace the
5046 operation with a combined operation. This may eliminate the
5047 intermediate operation if every use is simplified in this way.
5048 Note that the similar optimization done by combine.c only works
5049 if the intermediate operation's result has only one reference. */
5051 if (GET_CODE (folded_arg0
) == REG
5052 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
5055 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
5056 rtx y
= lookup_as_function (folded_arg0
, code
);
5058 enum rtx_code associate_code
;
5062 || 0 == (inner_const
5063 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
5064 || GET_CODE (inner_const
) != CONST_INT
5065 /* If we have compiled a statement like
5066 "if (x == (x & mask1))", and now are looking at
5067 "x & mask2", we will have a case where the first operand
5068 of Y is the same as our first operand. Unless we detect
5069 this case, an infinite loop will result. */
5070 || XEXP (y
, 0) == folded_arg0
)
5073 /* Don't associate these operations if they are a PLUS with the
5074 same constant and it is a power of two. These might be doable
5075 with a pre- or post-increment. Similarly for two subtracts of
5076 identical powers of two with post decrement. */
5078 if (code
== PLUS
&& INTVAL (const_arg1
) == INTVAL (inner_const
)
5080 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5081 || exact_log2 (INTVAL (const_arg1
)) >= 0
5083 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5084 || exact_log2 (- INTVAL (const_arg1
)) >= 0
5089 /* Compute the code used to compose the constants. For example,
5090 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5093 = (code
== MULT
|| code
== DIV
|| code
== UDIV
? MULT
5094 : is_shift
|| code
== PLUS
|| code
== MINUS
? PLUS
: code
);
5096 new_const
= simplify_binary_operation (associate_code
, mode
,
5097 const_arg1
, inner_const
);
5102 /* If we are associating shift operations, don't let this
5103 produce a shift of larger than the object. This could
5104 occur when we following a sign-extend by a right shift on
5105 a machine that does a sign-extend as a pair of shifts. */
5107 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
5108 && INTVAL (new_const
) > GET_MODE_BITSIZE (mode
))
5111 y
= copy_rtx (XEXP (y
, 0));
5113 /* If Y contains our first operand (the most common way this
5114 can happen is if Y is a MEM), we would do into an infinite
5115 loop if we tried to fold it. So don't in that case. */
5117 if (! reg_mentioned_p (folded_arg0
, y
))
5118 y
= fold_rtx (y
, insn
);
5120 new = simplify_binary_operation (code
, mode
, y
, new_const
);
5124 return gen_rtx (code
, mode
, y
, new_const
);
5128 new = simplify_binary_operation (code
, mode
,
5129 const_arg0
? const_arg0
: folded_arg0
,
5130 const_arg1
? const_arg1
: folded_arg1
);
5134 /* (lo_sum (high X) X) is simply X. */
5135 if (code
== LO_SUM
&& const_arg0
!= 0
5136 && GET_CODE (const_arg0
) == HIGH
5137 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
5143 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
5144 const_arg0
? const_arg0
: folded_arg0
,
5145 const_arg1
? const_arg1
: folded_arg1
,
5146 const_arg2
? const_arg2
: XEXP (x
, 2));
5150 return new ? new : x
;
5153 /* Return a constant value currently equivalent to X.
5154 Return 0 if we don't know one. */
5160 if (GET_CODE (x
) == REG
5161 && REGNO_QTY_VALID_P (REGNO (x
))
5162 && qty_const
[reg_qty
[REGNO (x
)]])
5163 x
= gen_lowpart_if_possible (GET_MODE (x
), qty_const
[reg_qty
[REGNO (x
)]]);
5165 if (x
!= 0 && CONSTANT_P (x
))
5168 /* If X is a MEM, try to fold it outside the context of any insn to see if
5169 it might be equivalent to a constant. That handles the case where it
5170 is a constant-pool reference. Then try to look it up in the hash table
5171 in case it is something whose value we have seen before. */
5173 if (GET_CODE (x
) == MEM
)
5175 struct table_elt
*elt
;
5177 x
= fold_rtx (x
, NULL_RTX
);
5181 elt
= lookup (x
, safe_hash (x
, GET_MODE (x
)) % NBUCKETS
, GET_MODE (x
));
5185 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
5186 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
5193 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5194 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5195 least-significant part of X.
5196 MODE specifies how big a part of X to return.
5198 If the requested operation cannot be done, 0 is returned.
5200 This is similar to gen_lowpart in emit-rtl.c. */
5203 gen_lowpart_if_possible (mode
, x
)
5204 enum machine_mode mode
;
5207 rtx result
= gen_lowpart_common (mode
, x
);
5211 else if (GET_CODE (x
) == MEM
)
5213 /* This is the only other case we handle. */
5214 register int offset
= 0;
5217 #if WORDS_BIG_ENDIAN
5218 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
5219 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
5221 #if BYTES_BIG_ENDIAN
5222 /* Adjust the address so that the address-after-the-data
5224 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
5225 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
5227 new = gen_rtx (MEM
, mode
, plus_constant (XEXP (x
, 0), offset
));
5228 if (! memory_address_p (mode
, XEXP (new, 0)))
5230 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x
);
5231 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x
);
5232 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x
);
5239 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5240 branch. It will be zero if not.
5242 In certain cases, this can cause us to add an equivalence. For example,
5243 if we are following the taken case of
5245 we can add the fact that `i' and '2' are now equivalent.
5247 In any case, we can record that this comparison was passed. If the same
5248 comparison is seen later, we will know its value. */
5251 record_jump_equiv (insn
, taken
)
5255 int cond_known_true
;
5257 enum machine_mode mode
, mode0
, mode1
;
5258 int reversed_nonequality
= 0;
5261 /* Ensure this is the right kind of insn. */
5262 if (! condjump_p (insn
) || simplejump_p (insn
))
5265 /* See if this jump condition is known true or false. */
5267 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 2) == pc_rtx
);
5269 cond_known_true
= (XEXP (SET_SRC (PATTERN (insn
)), 1) == pc_rtx
);
5271 /* Get the type of comparison being done and the operands being compared.
5272 If we had to reverse a non-equality condition, record that fact so we
5273 know that it isn't valid for floating-point. */
5274 code
= GET_CODE (XEXP (SET_SRC (PATTERN (insn
)), 0));
5275 op0
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 0), insn
);
5276 op1
= fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn
)), 0), 1), insn
);
5278 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
5279 if (! cond_known_true
)
5281 reversed_nonequality
= (code
!= EQ
&& code
!= NE
);
5282 code
= reverse_condition (code
);
5285 /* The mode is the mode of the non-constant. */
5287 if (mode1
!= VOIDmode
)
5290 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
5293 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5294 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5295 Make any useful entries we can with that information. Called from
5296 above function and called recursively. */
5299 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
)
5301 enum machine_mode mode
;
5303 int reversed_nonequality
;
5305 int op0_hash_code
, op1_hash_code
;
5306 int op0_in_memory
, op0_in_struct
, op1_in_memory
, op1_in_struct
;
5307 struct table_elt
*op0_elt
, *op1_elt
;
5309 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5310 we know that they are also equal in the smaller mode (this is also
5311 true for all smaller modes whether or not there is a SUBREG, but
5312 is not worth testing for with no SUBREG. */
5314 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
5315 && GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
))))
5317 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5318 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5320 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5321 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5322 reversed_nonequality
);
5325 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
5326 && GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
))))
5328 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5329 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5331 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5332 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5333 reversed_nonequality
);
5336 /* Similarly, if this is an NE comparison, and either is a SUBREG
5337 making a smaller mode, we know the whole thing is also NE. */
5339 if (code
== NE
&& GET_CODE (op0
) == SUBREG
5340 && subreg_lowpart_p (op0
)
5341 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
))))
5343 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
5344 rtx tem
= gen_lowpart_if_possible (inner_mode
, op1
);
5346 record_jump_cond (code
, mode
, SUBREG_REG (op0
),
5347 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op1
, 0),
5348 reversed_nonequality
);
5351 if (code
== NE
&& GET_CODE (op1
) == SUBREG
5352 && subreg_lowpart_p (op1
)
5353 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
))))
5355 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
5356 rtx tem
= gen_lowpart_if_possible (inner_mode
, op0
);
5358 record_jump_cond (code
, mode
, SUBREG_REG (op1
),
5359 tem
? tem
: gen_rtx (SUBREG
, inner_mode
, op0
, 0),
5360 reversed_nonequality
);
5363 /* Hash both operands. */
5366 hash_arg_in_memory
= 0;
5367 hash_arg_in_struct
= 0;
5368 op0_hash_code
= HASH (op0
, mode
);
5369 op0_in_memory
= hash_arg_in_memory
;
5370 op0_in_struct
= hash_arg_in_struct
;
5376 hash_arg_in_memory
= 0;
5377 hash_arg_in_struct
= 0;
5378 op1_hash_code
= HASH (op1
, mode
);
5379 op1_in_memory
= hash_arg_in_memory
;
5380 op1_in_struct
= hash_arg_in_struct
;
5385 /* Look up both operands. */
5386 op0_elt
= lookup (op0
, op0_hash_code
, mode
);
5387 op1_elt
= lookup (op1
, op1_hash_code
, mode
);
5389 /* If we aren't setting two things equal all we can do is save this
5390 comparison. Similarly if this is floating-point. In the latter
5391 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5392 If we record the equality, we might inadvertently delete code
5393 whose intent was to change -0 to +0. */
5395 if (code
!= EQ
|| GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
5397 /* If we reversed a floating-point comparison, if OP0 is not a
5398 register, or if OP1 is neither a register or constant, we can't
5401 if (GET_CODE (op1
) != REG
)
5402 op1
= equiv_constant (op1
);
5404 if ((reversed_nonequality
&& GET_MODE_CLASS (mode
) != MODE_INT
)
5405 || GET_CODE (op0
) != REG
|| op1
== 0)
5408 /* Put OP0 in the hash table if it isn't already. This gives it a
5409 new quantity number. */
5412 if (insert_regs (op0
, NULL_PTR
, 0))
5414 rehash_using_reg (op0
);
5415 op0_hash_code
= HASH (op0
, mode
);
5418 op0_elt
= insert (op0
, NULL_PTR
, op0_hash_code
, mode
);
5419 op0_elt
->in_memory
= op0_in_memory
;
5420 op0_elt
->in_struct
= op0_in_struct
;
5423 qty_comparison_code
[reg_qty
[REGNO (op0
)]] = code
;
5424 if (GET_CODE (op1
) == REG
)
5426 /* Put OP1 in the hash table so it gets a new quantity number. */
5429 if (insert_regs (op1
, NULL_PTR
, 0))
5431 rehash_using_reg (op1
);
5432 op1_hash_code
= HASH (op1
, mode
);
5435 op1_elt
= insert (op1
, NULL_PTR
, op1_hash_code
, mode
);
5436 op1_elt
->in_memory
= op1_in_memory
;
5437 op1_elt
->in_struct
= op1_in_struct
;
5440 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = reg_qty
[REGNO (op1
)];
5441 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = 0;
5445 qty_comparison_qty
[reg_qty
[REGNO (op0
)]] = -1;
5446 qty_comparison_const
[reg_qty
[REGNO (op0
)]] = op1
;
5452 /* If both are equivalent, merge the two classes. Save this class for
5453 `cse_set_around_loop'. */
5454 if (op0_elt
&& op1_elt
)
5456 merge_equiv_classes (op0_elt
, op1_elt
);
5457 last_jump_equiv_class
= op0_elt
;
5460 /* For whichever side doesn't have an equivalence, make one. */
5463 if (insert_regs (op0
, op1_elt
, 0))
5465 rehash_using_reg (op0
);
5466 op0_hash_code
= HASH (op0
, mode
);
5469 op0_elt
= insert (op0
, op1_elt
, op0_hash_code
, mode
);
5470 op0_elt
->in_memory
= op0_in_memory
;
5471 op0_elt
->in_struct
= op0_in_struct
;
5472 last_jump_equiv_class
= op0_elt
;
5477 if (insert_regs (op1
, op0_elt
, 0))
5479 rehash_using_reg (op1
);
5480 op1_hash_code
= HASH (op1
, mode
);
5483 op1_elt
= insert (op1
, op0_elt
, op1_hash_code
, mode
);
5484 op1_elt
->in_memory
= op1_in_memory
;
5485 op1_elt
->in_struct
= op1_in_struct
;
5486 last_jump_equiv_class
= op1_elt
;
5490 /* CSE processing for one instruction.
5491 First simplify sources and addresses of all assignments
5492 in the instruction, using previously-computed equivalents values.
5493 Then install the new sources and destinations in the table
5494 of available values.
5496 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
5499 /* Data on one SET contained in the instruction. */
5503 /* The SET rtx itself. */
5505 /* The SET_SRC of the rtx (the original value, if it is changing). */
5507 /* The hash-table element for the SET_SRC of the SET. */
5508 struct table_elt
*src_elt
;
5509 /* Hash code for the SET_SRC. */
5511 /* Hash code for the SET_DEST. */
5513 /* The SET_DEST, with SUBREG, etc., stripped. */
5515 /* Place where the pointer to the INNER_DEST was found. */
5516 rtx
*inner_dest_loc
;
5517 /* Nonzero if the SET_SRC is in memory. */
5519 /* Nonzero if the SET_SRC is in a structure. */
5521 /* Nonzero if the SET_SRC contains something
5522 whose value cannot be predicted and understood. */
5524 /* Original machine mode, in case it becomes a CONST_INT. */
5525 enum machine_mode mode
;
5526 /* A constant equivalent for SET_SRC, if any. */
5528 /* Hash code of constant equivalent for SET_SRC. */
5529 int src_const_hash_code
;
5530 /* Table entry for constant equivalent for SET_SRC, if any. */
5531 struct table_elt
*src_const_elt
;
5535 cse_insn (insn
, in_libcall_block
)
5537 int in_libcall_block
;
5539 register rtx x
= PATTERN (insn
);
5542 register int n_sets
= 0;
5544 /* Records what this insn does to set CC0. */
5545 rtx this_insn_cc0
= 0;
5546 enum machine_mode this_insn_cc0_mode
;
5547 struct write_data writes_memory
;
5548 static struct write_data init
= {0, 0, 0, 0};
5551 struct table_elt
*src_eqv_elt
= 0;
5552 int src_eqv_volatile
;
5553 int src_eqv_in_memory
;
5554 int src_eqv_in_struct
;
5555 int src_eqv_hash_code
;
5560 writes_memory
= init
;
5562 /* Find all the SETs and CLOBBERs in this instruction.
5563 Record all the SETs in the array `set' and count them.
5564 Also determine whether there is a CLOBBER that invalidates
5565 all memory references, or all references at varying addresses. */
5567 if (GET_CODE (x
) == SET
)
5569 sets
= (struct set
*) alloca (sizeof (struct set
));
5572 /* Ignore SETs that are unconditional jumps.
5573 They never need cse processing, so this does not hurt.
5574 The reason is not efficiency but rather
5575 so that we can test at the end for instructions
5576 that have been simplified to unconditional jumps
5577 and not be misled by unchanged instructions
5578 that were unconditional jumps to begin with. */
5579 if (SET_DEST (x
) == pc_rtx
5580 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
5583 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
5584 The hard function value register is used only once, to copy to
5585 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
5586 Ensure we invalidate the destination register. On the 80386 no
5587 other code would invalidate it since it is a fixed_reg. */
5589 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5591 canon_reg (SET_SRC (x
), insn
);
5592 apply_change_group ();
5593 fold_rtx (SET_SRC (x
), insn
);
5594 invalidate (SET_DEST (x
));
5599 else if (GET_CODE (x
) == PARALLEL
)
5601 register int lim
= XVECLEN (x
, 0);
5603 sets
= (struct set
*) alloca (lim
* sizeof (struct set
));
5605 /* Find all regs explicitly clobbered in this insn,
5606 and ensure they are not replaced with any other regs
5607 elsewhere in this insn.
5608 When a reg that is clobbered is also used for input,
5609 we should presume that that is for a reason,
5610 and we should not substitute some other register
5611 which is not supposed to be clobbered.
5612 Therefore, this loop cannot be merged into the one below
5613 because a CALL may precede a CLOBBER and refer to the
5614 value clobbered. We must not let a canonicalization do
5615 anything in that case. */
5616 for (i
= 0; i
< lim
; i
++)
5618 register rtx y
= XVECEXP (x
, 0, i
);
5619 if (GET_CODE (y
) == CLOBBER
5620 && (GET_CODE (XEXP (y
, 0)) == REG
5621 || GET_CODE (XEXP (y
, 0)) == SUBREG
))
5622 invalidate (XEXP (y
, 0));
5625 for (i
= 0; i
< lim
; i
++)
5627 register rtx y
= XVECEXP (x
, 0, i
);
5628 if (GET_CODE (y
) == SET
)
5630 /* As above, we ignore unconditional jumps and call-insns. */
5631 if (GET_CODE (SET_SRC (y
)) == CALL
)
5633 canon_reg (SET_SRC (y
), insn
);
5634 apply_change_group ();
5635 fold_rtx (SET_SRC (y
), insn
);
5636 invalidate (SET_DEST (y
));
5638 else if (SET_DEST (y
) == pc_rtx
5639 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
5642 sets
[n_sets
++].rtl
= y
;
5644 else if (GET_CODE (y
) == CLOBBER
)
5646 /* If we clobber memory, take note of that,
5647 and canon the address.
5648 This does nothing when a register is clobbered
5649 because we have already invalidated the reg. */
5650 if (GET_CODE (XEXP (y
, 0)) == MEM
)
5652 canon_reg (XEXP (y
, 0), NULL_RTX
);
5653 note_mem_written (XEXP (y
, 0), &writes_memory
);
5656 else if (GET_CODE (y
) == USE
5657 && ! (GET_CODE (XEXP (y
, 0)) == REG
5658 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
5659 canon_reg (y
, NULL_RTX
);
5660 else if (GET_CODE (y
) == CALL
)
5662 canon_reg (y
, insn
);
5663 apply_change_group ();
5668 else if (GET_CODE (x
) == CLOBBER
)
5670 if (GET_CODE (XEXP (x
, 0)) == MEM
)
5672 canon_reg (XEXP (x
, 0), NULL_RTX
);
5673 note_mem_written (XEXP (x
, 0), &writes_memory
);
5677 /* Canonicalize a USE of a pseudo register or memory location. */
5678 else if (GET_CODE (x
) == USE
5679 && ! (GET_CODE (XEXP (x
, 0)) == REG
5680 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
5681 canon_reg (XEXP (x
, 0), NULL_RTX
);
5682 else if (GET_CODE (x
) == CALL
)
5684 canon_reg (x
, insn
);
5685 apply_change_group ();
5689 if (n_sets
== 1 && REG_NOTES (insn
) != 0)
5691 /* Store the equivalent value in SRC_EQV, if different. */
5692 rtx tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5694 if (tem
&& ! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
)))
5695 src_eqv
= canon_reg (XEXP (tem
, 0), NULL_RTX
);
5698 /* Canonicalize sources and addresses of destinations.
5699 We do this in a separate pass to avoid problems when a MATCH_DUP is
5700 present in the insn pattern. In that case, we want to ensure that
5701 we don't break the duplicate nature of the pattern. So we will replace
5702 both operands at the same time. Otherwise, we would fail to find an
5703 equivalent substitution in the loop calling validate_change below.
5705 We used to suppress canonicalization of DEST if it appears in SRC,
5706 but we don't do this any more. */
5708 for (i
= 0; i
< n_sets
; i
++)
5710 rtx dest
= SET_DEST (sets
[i
].rtl
);
5711 rtx src
= SET_SRC (sets
[i
].rtl
);
5712 rtx
new = canon_reg (src
, insn
);
5714 if ((GET_CODE (new) == REG
&& GET_CODE (src
) == REG
5715 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
5716 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
5717 || insn_n_dups
[recog_memoized (insn
)] > 0)
5718 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
5720 SET_SRC (sets
[i
].rtl
) = new;
5722 if (GET_CODE (dest
) == ZERO_EXTRACT
|| GET_CODE (dest
) == SIGN_EXTRACT
)
5724 validate_change (insn
, &XEXP (dest
, 1),
5725 canon_reg (XEXP (dest
, 1), insn
), 1);
5726 validate_change (insn
, &XEXP (dest
, 2),
5727 canon_reg (XEXP (dest
, 2), insn
), 1);
5730 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
5731 || GET_CODE (dest
) == ZERO_EXTRACT
5732 || GET_CODE (dest
) == SIGN_EXTRACT
)
5733 dest
= XEXP (dest
, 0);
5735 if (GET_CODE (dest
) == MEM
)
5736 canon_reg (dest
, insn
);
5739 /* Now that we have done all the replacements, we can apply the change
5740 group and see if they all work. Note that this will cause some
5741 canonicalizations that would have worked individually not to be applied
5742 because some other canonicalization didn't work, but this should not
5745 apply_change_group ();
5747 /* Set sets[i].src_elt to the class each source belongs to.
5748 Detect assignments from or to volatile things
5749 and set set[i] to zero so they will be ignored
5750 in the rest of this function.
5752 Nothing in this loop changes the hash table or the register chains. */
5754 for (i
= 0; i
< n_sets
; i
++)
5756 register rtx src
, dest
;
5757 register rtx src_folded
;
5758 register struct table_elt
*elt
= 0, *p
;
5759 enum machine_mode mode
;
5762 rtx src_related
= 0;
5763 struct table_elt
*src_const_elt
= 0;
5764 int src_cost
= 10000, src_eqv_cost
= 10000, src_folded_cost
= 10000;
5765 int src_related_cost
= 10000, src_elt_cost
= 10000;
5766 /* Set non-zero if we need to call force_const_mem on with the
5767 contents of src_folded before using it. */
5768 int src_folded_force_flag
= 0;
5770 dest
= SET_DEST (sets
[i
].rtl
);
5771 src
= SET_SRC (sets
[i
].rtl
);
5773 /* If SRC is a constant that has no machine mode,
5774 hash it with the destination's machine mode.
5775 This way we can keep different modes separate. */
5777 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5778 sets
[i
].mode
= mode
;
5782 enum machine_mode eqvmode
= mode
;
5783 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5784 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5786 hash_arg_in_memory
= 0;
5787 hash_arg_in_struct
= 0;
5788 src_eqv
= fold_rtx (src_eqv
, insn
);
5789 src_eqv_hash_code
= HASH (src_eqv
, eqvmode
);
5791 /* Find the equivalence class for the equivalent expression. */
5794 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash_code
, eqvmode
);
5796 src_eqv_volatile
= do_not_record
;
5797 src_eqv_in_memory
= hash_arg_in_memory
;
5798 src_eqv_in_struct
= hash_arg_in_struct
;
5801 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5802 value of the INNER register, not the destination. So it is not
5803 a legal substitution for the source. But save it for later. */
5804 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5807 src_eqv_here
= src_eqv
;
5809 /* Simplify and foldable subexpressions in SRC. Then get the fully-
5810 simplified result, which may not necessarily be valid. */
5811 src_folded
= fold_rtx (src
, insn
);
5813 /* If storing a constant in a bitfield, pre-truncate the constant
5814 so we will be able to record it later. */
5815 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5816 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
5818 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5820 if (GET_CODE (src
) == CONST_INT
5821 && GET_CODE (width
) == CONST_INT
5822 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5823 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5825 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
5826 << INTVAL (width
)) - 1));
5829 /* Compute SRC's hash code, and also notice if it
5830 should not be recorded at all. In that case,
5831 prevent any further processing of this assignment. */
5833 hash_arg_in_memory
= 0;
5834 hash_arg_in_struct
= 0;
5837 sets
[i
].src_hash_code
= HASH (src
, mode
);
5838 sets
[i
].src_volatile
= do_not_record
;
5839 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5840 sets
[i
].src_in_struct
= hash_arg_in_struct
;
5843 /* It is no longer clear why we used to do this, but it doesn't
5844 appear to still be needed. So let's try without it since this
5845 code hurts cse'ing widened ops. */
5846 /* If source is a perverse subreg (such as QI treated as an SI),
5847 treat it as volatile. It may do the work of an SI in one context
5848 where the extra bits are not being used, but cannot replace an SI
5850 if (GET_CODE (src
) == SUBREG
5851 && (GET_MODE_SIZE (GET_MODE (src
))
5852 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
5853 sets
[i
].src_volatile
= 1;
5856 /* Locate all possible equivalent forms for SRC. Try to replace
5857 SRC in the insn with each cheaper equivalent.
5859 We have the following types of equivalents: SRC itself, a folded
5860 version, a value given in a REG_EQUAL note, or a value related
5863 Each of these equivalents may be part of an additional class
5864 of equivalents (if more than one is in the table, they must be in
5865 the same class; we check for this).
5867 If the source is volatile, we don't do any table lookups.
5869 We note any constant equivalent for possible later use in a
5872 if (!sets
[i
].src_volatile
)
5873 elt
= lookup (src
, sets
[i
].src_hash_code
, mode
);
5875 sets
[i
].src_elt
= elt
;
5877 if (elt
&& src_eqv_here
&& src_eqv_elt
)
5879 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
5881 /* The REG_EQUAL is indicating that two formerly distinct
5882 classes are now equivalent. So merge them. */
5883 merge_equiv_classes (elt
, src_eqv_elt
);
5884 src_eqv_hash_code
= HASH (src_eqv
, elt
->mode
);
5885 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash_code
, elt
->mode
);
5891 else if (src_eqv_elt
)
5894 /* Try to find a constant somewhere and record it in `src_const'.
5895 Record its table element, if any, in `src_const_elt'. Look in
5896 any known equivalences first. (If the constant is not in the
5897 table, also set `sets[i].src_const_hash_code'). */
5899 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
5903 src_const_elt
= elt
;
5908 && (CONSTANT_P (src_folded
)
5909 /* Consider (minus (label_ref L1) (label_ref L2)) as
5910 "constant" here so we will record it. This allows us
5911 to fold switch statements when an ADDR_DIFF_VEC is used. */
5912 || (GET_CODE (src_folded
) == MINUS
5913 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
5914 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
5915 src_const
= src_folded
, src_const_elt
= elt
;
5916 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
5917 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
5919 /* If we don't know if the constant is in the table, get its
5920 hash code and look it up. */
5921 if (src_const
&& src_const_elt
== 0)
5923 sets
[i
].src_const_hash_code
= HASH (src_const
, mode
);
5924 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash_code
,
5928 sets
[i
].src_const
= src_const
;
5929 sets
[i
].src_const_elt
= src_const_elt
;
5931 /* If the constant and our source are both in the table, mark them as
5932 equivalent. Otherwise, if a constant is in the table but the source
5933 isn't, set ELT to it. */
5934 if (src_const_elt
&& elt
5935 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
5936 merge_equiv_classes (elt
, src_const_elt
);
5937 else if (src_const_elt
&& elt
== 0)
5938 elt
= src_const_elt
;
5940 /* See if there is a register linearly related to a constant
5941 equivalent of SRC. */
5943 && (GET_CODE (src_const
) == CONST
5944 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
5946 src_related
= use_related_value (src_const
, src_const_elt
);
5949 struct table_elt
*src_related_elt
5950 = lookup (src_related
, HASH (src_related
, mode
), mode
);
5951 if (src_related_elt
&& elt
)
5953 if (elt
->first_same_value
5954 != src_related_elt
->first_same_value
)
5955 /* This can occur when we previously saw a CONST
5956 involving a SYMBOL_REF and then see the SYMBOL_REF
5957 twice. Merge the involved classes. */
5958 merge_equiv_classes (elt
, src_related_elt
);
5961 src_related_elt
= 0;
5963 else if (src_related_elt
&& elt
== 0)
5964 elt
= src_related_elt
;
5968 /* See if we have a CONST_INT that is already in a register in a
5971 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
5972 && GET_MODE_CLASS (mode
) == MODE_INT
5973 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
5975 enum machine_mode wider_mode
;
5977 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
5978 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
5979 && src_related
== 0;
5980 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
5982 struct table_elt
*const_elt
5983 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
5988 for (const_elt
= const_elt
->first_same_value
;
5989 const_elt
; const_elt
= const_elt
->next_same_value
)
5990 if (GET_CODE (const_elt
->exp
) == REG
)
5992 src_related
= gen_lowpart_if_possible (mode
,
5999 /* Another possibility is that we have an AND with a constant in
6000 a mode narrower than a word. If so, it might have been generated
6001 as part of an "if" which would narrow the AND. If we already
6002 have done the AND in a wider mode, we can use a SUBREG of that
6005 if (flag_expensive_optimizations
&& ! src_related
6006 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
6007 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
6009 enum machine_mode tmode
;
6010 rtx new_and
= gen_rtx (AND
, VOIDmode
, NULL_RTX
, XEXP (src
, 1));
6012 for (tmode
= GET_MODE_WIDER_MODE (mode
);
6013 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
6014 tmode
= GET_MODE_WIDER_MODE (tmode
))
6016 rtx inner
= gen_lowpart_if_possible (tmode
, XEXP (src
, 0));
6017 struct table_elt
*larger_elt
;
6021 PUT_MODE (new_and
, tmode
);
6022 XEXP (new_and
, 0) = inner
;
6023 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
6024 if (larger_elt
== 0)
6027 for (larger_elt
= larger_elt
->first_same_value
;
6028 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
6029 if (GET_CODE (larger_elt
->exp
) == REG
)
6032 = gen_lowpart_if_possible (mode
, larger_elt
->exp
);
6042 if (src
== src_folded
)
6045 /* At this point, ELT, if non-zero, points to a class of expressions
6046 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6047 and SRC_RELATED, if non-zero, each contain additional equivalent
6048 expressions. Prune these latter expressions by deleting expressions
6049 already in the equivalence class.
6051 Check for an equivalent identical to the destination. If found,
6052 this is the preferred equivalent since it will likely lead to
6053 elimination of the insn. Indicate this by placing it in
6056 if (elt
) elt
= elt
->first_same_value
;
6057 for (p
= elt
; p
; p
= p
->next_same_value
)
6059 enum rtx_code code
= GET_CODE (p
->exp
);
6061 /* If the expression is not valid, ignore it. Then we do not
6062 have to check for validity below. In most cases, we can use
6063 `rtx_equal_p', since canonicalization has already been done. */
6064 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, 0))
6067 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
6069 else if (src_folded
&& GET_CODE (src_folded
) == code
6070 && rtx_equal_p (src_folded
, p
->exp
))
6072 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
6073 && rtx_equal_p (src_eqv_here
, p
->exp
))
6075 else if (src_related
&& GET_CODE (src_related
) == code
6076 && rtx_equal_p (src_related
, p
->exp
))
6079 /* This is the same as the destination of the insns, we want
6080 to prefer it. Copy it to src_related. The code below will
6081 then give it a negative cost. */
6082 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
6087 /* Find the cheapest valid equivalent, trying all the available
6088 possibilities. Prefer items not in the hash table to ones
6089 that are when they are equal cost. Note that we can never
6090 worsen an insn as the current contents will also succeed.
6091 If we find an equivalent identical to the destination, use it as best,
6092 since this insn will probably be eliminated in that case. */
6095 if (rtx_equal_p (src
, dest
))
6098 src_cost
= COST (src
);
6103 if (rtx_equal_p (src_eqv_here
, dest
))
6106 src_eqv_cost
= COST (src_eqv_here
);
6111 if (rtx_equal_p (src_folded
, dest
))
6112 src_folded_cost
= -1;
6114 src_folded_cost
= COST (src_folded
);
6119 if (rtx_equal_p (src_related
, dest
))
6120 src_related_cost
= -1;
6122 src_related_cost
= COST (src_related
);
6125 /* If this was an indirect jump insn, a known label will really be
6126 cheaper even though it looks more expensive. */
6127 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
6128 src_folded
= src_const
, src_folded_cost
= -1;
6130 /* Terminate loop when replacement made. This must terminate since
6131 the current contents will be tested and will always be valid. */
6136 /* Skip invalid entries. */
6137 while (elt
&& GET_CODE (elt
->exp
) != REG
6138 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6139 elt
= elt
->next_same_value
;
6141 if (elt
) src_elt_cost
= elt
->cost
;
6143 /* Find cheapest and skip it for the next time. For items
6144 of equal cost, use this order:
6145 src_folded, src, src_eqv, src_related and hash table entry. */
6146 if (src_folded_cost
<= src_cost
6147 && src_folded_cost
<= src_eqv_cost
6148 && src_folded_cost
<= src_related_cost
6149 && src_folded_cost
<= src_elt_cost
)
6151 trial
= src_folded
, src_folded_cost
= 10000;
6152 if (src_folded_force_flag
)
6153 trial
= force_const_mem (mode
, trial
);
6155 else if (src_cost
<= src_eqv_cost
6156 && src_cost
<= src_related_cost
6157 && src_cost
<= src_elt_cost
)
6158 trial
= src
, src_cost
= 10000;
6159 else if (src_eqv_cost
<= src_related_cost
6160 && src_eqv_cost
<= src_elt_cost
)
6161 trial
= src_eqv_here
, src_eqv_cost
= 10000;
6162 else if (src_related_cost
<= src_elt_cost
)
6163 trial
= src_related
, src_related_cost
= 10000;
6166 trial
= copy_rtx (elt
->exp
);
6167 elt
= elt
->next_same_value
;
6168 src_elt_cost
= 10000;
6171 /* We don't normally have an insn matching (set (pc) (pc)), so
6172 check for this separately here. We will delete such an
6175 Tablejump insns contain a USE of the table, so simply replacing
6176 the operand with the constant won't match. This is simply an
6177 unconditional branch, however, and is therefore valid. Just
6178 insert the substitution here and we will delete and re-emit
6181 if (n_sets
== 1 && dest
== pc_rtx
6183 || (GET_CODE (trial
) == LABEL_REF
6184 && ! condjump_p (insn
))))
6186 /* If TRIAL is a label in front of a jump table, we are
6187 really falling through the switch (this is how casesi
6188 insns work), so we must branch around the table. */
6189 if (GET_CODE (trial
) == CODE_LABEL
6190 && NEXT_INSN (trial
) != 0
6191 && GET_CODE (NEXT_INSN (trial
)) == JUMP_INSN
6192 && (GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_DIFF_VEC
6193 || GET_CODE (PATTERN (NEXT_INSN (trial
))) == ADDR_VEC
))
6195 trial
= gen_rtx (LABEL_REF
, Pmode
, get_label_after (trial
));
6197 SET_SRC (sets
[i
].rtl
) = trial
;
6201 /* Look for a substitution that makes a valid insn. */
6202 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
6204 SET_SRC (sets
[i
].rtl
) = canon_reg (SET_SRC (sets
[i
].rtl
), insn
);
6205 apply_change_group ();
6209 /* If we previously found constant pool entries for
6210 constants and this is a constant, try making a
6211 pool entry. Put it in src_folded unless we already have done
6212 this since that is where it likely came from. */
6214 else if (constant_pool_entries_cost
6215 && CONSTANT_P (trial
)
6216 && (src_folded
== 0 || GET_CODE (src_folded
) != MEM
)
6217 && GET_MODE_CLASS (mode
) != MODE_CC
)
6219 src_folded_force_flag
= 1;
6221 src_folded_cost
= constant_pool_entries_cost
;
6225 src
= SET_SRC (sets
[i
].rtl
);
6227 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6228 However, there is an important exception: If both are registers
6229 that are not the head of their equivalence class, replace SET_SRC
6230 with the head of the class. If we do not do this, we will have
6231 both registers live over a portion of the basic block. This way,
6232 their lifetimes will likely abut instead of overlapping. */
6233 if (GET_CODE (dest
) == REG
6234 && REGNO_QTY_VALID_P (REGNO (dest
))
6235 && qty_mode
[reg_qty
[REGNO (dest
)]] == GET_MODE (dest
)
6236 && qty_first_reg
[reg_qty
[REGNO (dest
)]] != REGNO (dest
)
6237 && GET_CODE (src
) == REG
&& REGNO (src
) == REGNO (dest
)
6238 /* Don't do this if the original insn had a hard reg as
6240 && (GET_CODE (sets
[i
].src
) != REG
6241 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
))
6242 /* We can't call canon_reg here because it won't do anything if
6243 SRC is a hard register. */
6245 int first
= qty_first_reg
[reg_qty
[REGNO (src
)]];
6247 src
= SET_SRC (sets
[i
].rtl
)
6248 = first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
6249 : gen_rtx (REG
, GET_MODE (src
), first
);
6251 /* If we had a constant that is cheaper than what we are now
6252 setting SRC to, use that constant. We ignored it when we
6253 thought we could make this into a no-op. */
6254 if (src_const
&& COST (src_const
) < COST (src
)
6255 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
), src_const
, 0))
6259 /* If we made a change, recompute SRC values. */
6260 if (src
!= sets
[i
].src
)
6263 hash_arg_in_memory
= 0;
6264 hash_arg_in_struct
= 0;
6266 sets
[i
].src_hash_code
= HASH (src
, mode
);
6267 sets
[i
].src_volatile
= do_not_record
;
6268 sets
[i
].src_in_memory
= hash_arg_in_memory
;
6269 sets
[i
].src_in_struct
= hash_arg_in_struct
;
6270 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash_code
, mode
);
6273 /* If this is a single SET, we are setting a register, and we have an
6274 equivalent constant, we want to add a REG_NOTE. We don't want
6275 to write a REG_EQUAL note for a constant pseudo since verifying that
6276 that pseudo hasn't been eliminated is a pain. Such a note also
6277 won't help anything. */
6278 if (n_sets
== 1 && src_const
&& GET_CODE (dest
) == REG
6279 && GET_CODE (src_const
) != REG
)
6281 rtx tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6283 /* Record the actual constant value in a REG_EQUAL note, making
6284 a new one if one does not already exist. */
6286 XEXP (tem
, 0) = src_const
;
6288 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_EQUAL
,
6289 src_const
, REG_NOTES (insn
));
6291 /* If storing a constant value in a register that
6292 previously held the constant value 0,
6293 record this fact with a REG_WAS_0 note on this insn.
6295 Note that the *register* is required to have previously held 0,
6296 not just any register in the quantity and we must point to the
6297 insn that set that register to zero.
6299 Rather than track each register individually, we just see if
6300 the last set for this quantity was for this register. */
6302 if (REGNO_QTY_VALID_P (REGNO (dest
))
6303 && qty_const
[reg_qty
[REGNO (dest
)]] == const0_rtx
)
6305 /* See if we previously had a REG_WAS_0 note. */
6306 rtx note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
6307 rtx const_insn
= qty_const_insn
[reg_qty
[REGNO (dest
)]];
6309 if ((tem
= single_set (const_insn
)) != 0
6310 && rtx_equal_p (SET_DEST (tem
), dest
))
6313 XEXP (note
, 0) = const_insn
;
6315 REG_NOTES (insn
) = gen_rtx (INSN_LIST
, REG_WAS_0
,
6316 const_insn
, REG_NOTES (insn
));
6321 /* Now deal with the destination. */
6323 sets
[i
].inner_dest_loc
= &SET_DEST (sets
[0].rtl
);
6325 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
6326 to the MEM or REG within it. */
6327 while (GET_CODE (dest
) == SIGN_EXTRACT
6328 || GET_CODE (dest
) == ZERO_EXTRACT
6329 || GET_CODE (dest
) == SUBREG
6330 || GET_CODE (dest
) == STRICT_LOW_PART
)
6332 sets
[i
].inner_dest_loc
= &XEXP (dest
, 0);
6333 dest
= XEXP (dest
, 0);
6336 sets
[i
].inner_dest
= dest
;
6338 if (GET_CODE (dest
) == MEM
)
6340 dest
= fold_rtx (dest
, insn
);
6342 /* Decide whether we invalidate everything in memory,
6343 or just things at non-fixed places.
6344 Writing a large aggregate must invalidate everything
6345 because we don't know how long it is. */
6346 note_mem_written (dest
, &writes_memory
);
6349 /* Compute the hash code of the destination now,
6350 before the effects of this instruction are recorded,
6351 since the register values used in the address computation
6352 are those before this instruction. */
6353 sets
[i
].dest_hash_code
= HASH (dest
, mode
);
6355 /* Don't enter a bit-field in the hash table
6356 because the value in it after the store
6357 may not equal what was stored, due to truncation. */
6359 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
6360 || GET_CODE (SET_DEST (sets
[i
].rtl
)) == SIGN_EXTRACT
)
6362 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
6364 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
6365 && GET_CODE (width
) == CONST_INT
6366 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
6367 && ! (INTVAL (src_const
)
6368 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
6369 /* Exception: if the value is constant,
6370 and it won't be truncated, record it. */
6374 /* This is chosen so that the destination will be invalidated
6375 but no new value will be recorded.
6376 We must invalidate because sometimes constant
6377 values can be recorded for bitfields. */
6378 sets
[i
].src_elt
= 0;
6379 sets
[i
].src_volatile
= 1;
6385 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
6387 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
6389 PUT_CODE (insn
, NOTE
);
6390 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
6391 NOTE_SOURCE_FILE (insn
) = 0;
6392 cse_jumps_altered
= 1;
6393 /* One less use of the label this insn used to jump to. */
6394 --LABEL_NUSES (JUMP_LABEL (insn
));
6395 /* No more processing for this set. */
6399 /* If this SET is now setting PC to a label, we know it used to
6400 be a conditional or computed branch. So we see if we can follow
6401 it. If it was a computed branch, delete it and re-emit. */
6402 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
)
6406 /* If this is not in the format for a simple branch and
6407 we are the only SET in it, re-emit it. */
6408 if (! simplejump_p (insn
) && n_sets
== 1)
6410 rtx
new = emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
6411 JUMP_LABEL (new) = XEXP (src
, 0);
6412 LABEL_NUSES (XEXP (src
, 0))++;
6417 /* Now that we've converted this jump to an unconditional jump,
6418 there is dead code after it. Delete the dead code until we
6419 reach a BARRIER, the end of the function, or a label. Do
6420 not delete NOTEs except for NOTE_INSN_DELETED since later
6421 phases assume these notes are retained. */
6425 while (NEXT_INSN (p
) != 0
6426 && GET_CODE (NEXT_INSN (p
)) != BARRIER
6427 && GET_CODE (NEXT_INSN (p
)) != CODE_LABEL
)
6429 if (GET_CODE (NEXT_INSN (p
)) != NOTE
6430 || NOTE_LINE_NUMBER (NEXT_INSN (p
)) == NOTE_INSN_DELETED
)
6431 delete_insn (NEXT_INSN (p
));
6436 /* If we don't have a BARRIER immediately after INSN, put one there.
6437 Much code assumes that there are no NOTEs between a JUMP_INSN and
6440 if (NEXT_INSN (insn
) == 0
6441 || GET_CODE (NEXT_INSN (insn
)) != BARRIER
)
6442 emit_barrier_after (insn
);
6444 /* We might have two BARRIERs separated by notes. Delete the second
6447 if (p
!= insn
&& NEXT_INSN (p
) != 0
6448 && GET_CODE (NEXT_INSN (p
)) == BARRIER
)
6449 delete_insn (NEXT_INSN (p
));
6451 cse_jumps_altered
= 1;
6455 /* If destination is volatile, invalidate it and then do no further
6456 processing for this assignment. */
6458 else if (do_not_record
)
6460 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
6461 || GET_CODE (dest
) == MEM
)
6466 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
6467 sets
[i
].dest_hash_code
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
6470 /* If setting CC0, record what it was set to, or a constant, if it
6471 is equivalent to a constant. If it is being set to a floating-point
6472 value, make a COMPARE with the appropriate constant of 0. If we
6473 don't do this, later code can interpret this as a test against
6474 const0_rtx, which can cause problems if we try to put it into an
6475 insn as a floating-point operand. */
6476 if (dest
== cc0_rtx
)
6478 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
6479 this_insn_cc0_mode
= mode
;
6480 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
6481 this_insn_cc0
= gen_rtx (COMPARE
, VOIDmode
, this_insn_cc0
,
6487 /* Now enter all non-volatile source expressions in the hash table
6488 if they are not already present.
6489 Record their equivalence classes in src_elt.
6490 This way we can insert the corresponding destinations into
6491 the same classes even if the actual sources are no longer in them
6492 (having been invalidated). */
6494 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
6495 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
6497 register struct table_elt
*elt
;
6498 register struct table_elt
*classp
= sets
[0].src_elt
;
6499 rtx dest
= SET_DEST (sets
[0].rtl
);
6500 enum machine_mode eqvmode
= GET_MODE (dest
);
6502 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6504 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
6507 if (insert_regs (src_eqv
, classp
, 0))
6508 src_eqv_hash_code
= HASH (src_eqv
, eqvmode
);
6509 elt
= insert (src_eqv
, classp
, src_eqv_hash_code
, eqvmode
);
6510 elt
->in_memory
= src_eqv_in_memory
;
6511 elt
->in_struct
= src_eqv_in_struct
;
6515 for (i
= 0; i
< n_sets
; i
++)
6516 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
6517 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
6519 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
6521 /* REG_EQUAL in setting a STRICT_LOW_PART
6522 gives an equivalent for the entire destination register,
6523 not just for the subreg being stored in now.
6524 This is a more interesting equivalence, so we arrange later
6525 to treat the entire reg as the destination. */
6526 sets
[i
].src_elt
= src_eqv_elt
;
6527 sets
[i
].src_hash_code
= src_eqv_hash_code
;
6531 /* Insert source and constant equivalent into hash table, if not
6533 register struct table_elt
*classp
= src_eqv_elt
;
6534 register rtx src
= sets
[i
].src
;
6535 register rtx dest
= SET_DEST (sets
[i
].rtl
);
6536 enum machine_mode mode
6537 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6539 if (sets
[i
].src_elt
== 0)
6541 register struct table_elt
*elt
;
6543 /* Note that these insert_regs calls cannot remove
6544 any of the src_elt's, because they would have failed to
6545 match if not still valid. */
6546 if (insert_regs (src
, classp
, 0))
6547 sets
[i
].src_hash_code
= HASH (src
, mode
);
6548 elt
= insert (src
, classp
, sets
[i
].src_hash_code
, mode
);
6549 elt
->in_memory
= sets
[i
].src_in_memory
;
6550 elt
->in_struct
= sets
[i
].src_in_struct
;
6551 sets
[i
].src_elt
= classp
= elt
;
6554 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
6555 && src
!= sets
[i
].src_const
6556 && ! rtx_equal_p (sets
[i
].src_const
, src
))
6557 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
6558 sets
[i
].src_const_hash_code
, mode
);
6561 else if (sets
[i
].src_elt
== 0)
6562 /* If we did not insert the source into the hash table (e.g., it was
6563 volatile), note the equivalence class for the REG_EQUAL value, if any,
6564 so that the destination goes into that class. */
6565 sets
[i
].src_elt
= src_eqv_elt
;
6567 invalidate_from_clobbers (&writes_memory
, x
);
6569 /* Some registers are invalidated by subroutine calls. Memory is
6570 invalidated by non-constant calls. */
6572 if (GET_CODE (insn
) == CALL_INSN
)
6574 static struct write_data everything
= {0, 1, 1, 1};
6576 if (! CONST_CALL_P (insn
))
6577 invalidate_memory (&everything
);
6578 invalidate_for_call ();
6581 /* Now invalidate everything set by this instruction.
6582 If a SUBREG or other funny destination is being set,
6583 sets[i].rtl is still nonzero, so here we invalidate the reg
6584 a part of which is being set. */
6586 for (i
= 0; i
< n_sets
; i
++)
6589 register rtx dest
= sets
[i
].inner_dest
;
6591 /* Needed for registers to remove the register from its
6592 previous quantity's chain.
6593 Needed for memory if this is a nonvarying address, unless
6594 we have just done an invalidate_memory that covers even those. */
6595 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
6596 || (! writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
6600 /* Make sure registers mentioned in destinations
6601 are safe for use in an expression to be inserted.
6602 This removes from the hash table
6603 any invalid entry that refers to one of these registers.
6605 We don't care about the return value from mention_regs because
6606 we are going to hash the SET_DEST values unconditionally. */
6608 for (i
= 0; i
< n_sets
; i
++)
6609 if (sets
[i
].rtl
&& GET_CODE (SET_DEST (sets
[i
].rtl
)) != REG
)
6610 mention_regs (SET_DEST (sets
[i
].rtl
));
6612 /* We may have just removed some of the src_elt's from the hash table.
6613 So replace each one with the current head of the same class. */
6615 for (i
= 0; i
< n_sets
; i
++)
6618 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
6619 /* If elt was removed, find current head of same class,
6620 or 0 if nothing remains of that class. */
6622 register struct table_elt
*elt
= sets
[i
].src_elt
;
6624 while (elt
&& elt
->prev_same_value
)
6625 elt
= elt
->prev_same_value
;
6627 while (elt
&& elt
->first_same_value
== 0)
6628 elt
= elt
->next_same_value
;
6629 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
6633 /* Now insert the destinations into their equivalence classes. */
6635 for (i
= 0; i
< n_sets
; i
++)
6638 register rtx dest
= SET_DEST (sets
[i
].rtl
);
6639 register struct table_elt
*elt
;
6641 /* Don't record value if we are not supposed to risk allocating
6642 floating-point values in registers that might be wider than
6644 if ((flag_float_store
6645 && GET_CODE (dest
) == MEM
6646 && GET_MODE_CLASS (GET_MODE (dest
)) == MODE_FLOAT
)
6647 /* Don't record values of destinations set inside a libcall block
6648 since we might delete the libcall. Things should have been set
6649 up so we won't want to reuse such a value, but we play it safe
6652 /* If we didn't put a REG_EQUAL value or a source into the hash
6653 table, there is no point is recording DEST. */
6654 || sets
[i
].src_elt
== 0)
6657 /* STRICT_LOW_PART isn't part of the value BEING set,
6658 and neither is the SUBREG inside it.
6659 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6660 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6661 dest
= SUBREG_REG (XEXP (dest
, 0));
6663 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
)
6664 /* Registers must also be inserted into chains for quantities. */
6665 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
6666 /* If `insert_regs' changes something, the hash code must be
6668 sets
[i
].dest_hash_code
= HASH (dest
, GET_MODE (dest
));
6670 elt
= insert (dest
, sets
[i
].src_elt
,
6671 sets
[i
].dest_hash_code
, GET_MODE (dest
));
6672 elt
->in_memory
= GET_CODE (sets
[i
].inner_dest
) == MEM
;
6675 /* This implicitly assumes a whole struct
6676 need not have MEM_IN_STRUCT_P.
6677 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
6678 elt
->in_struct
= (MEM_IN_STRUCT_P (sets
[i
].inner_dest
)
6679 || sets
[i
].inner_dest
!= SET_DEST (sets
[i
].rtl
));
6682 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6683 narrower than M2, and both M1 and M2 are the same number of words,
6684 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6685 make that equivalence as well.
6687 However, BAR may have equivalences for which gen_lowpart_if_possible
6688 will produce a simpler value than gen_lowpart_if_possible applied to
6689 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6690 BAR's equivalences. If we don't get a simplified form, make
6691 the SUBREG. It will not be used in an equivalence, but will
6692 cause two similar assignments to be detected.
6694 Note the loop below will find SUBREG_REG (DEST) since we have
6695 already entered SRC and DEST of the SET in the table. */
6697 if (GET_CODE (dest
) == SUBREG
6698 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) / UNITS_PER_WORD
6699 == GET_MODE_SIZE (GET_MODE (dest
)) / UNITS_PER_WORD
)
6700 && (GET_MODE_SIZE (GET_MODE (dest
))
6701 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6702 && sets
[i
].src_elt
!= 0)
6704 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
6705 struct table_elt
*elt
, *classp
= 0;
6707 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
6708 elt
= elt
->next_same_value
)
6712 struct table_elt
*src_elt
;
6714 /* Ignore invalid entries. */
6715 if (GET_CODE (elt
->exp
) != REG
6716 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, 0))
6719 new_src
= gen_lowpart_if_possible (new_mode
, elt
->exp
);
6721 new_src
= gen_rtx (SUBREG
, new_mode
, elt
->exp
, 0);
6723 src_hash
= HASH (new_src
, new_mode
);
6724 src_elt
= lookup (new_src
, src_hash
, new_mode
);
6726 /* Put the new source in the hash table is if isn't
6730 if (insert_regs (new_src
, classp
, 0))
6731 src_hash
= HASH (new_src
, new_mode
);
6732 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
6733 src_elt
->in_memory
= elt
->in_memory
;
6734 src_elt
->in_struct
= elt
->in_struct
;
6736 else if (classp
&& classp
!= src_elt
->first_same_value
)
6737 /* Show that two things that we've seen before are
6738 actually the same. */
6739 merge_equiv_classes (src_elt
, classp
);
6741 classp
= src_elt
->first_same_value
;
6746 /* Special handling for (set REG0 REG1)
6747 where REG0 is the "cheapest", cheaper than REG1.
6748 After cse, REG1 will probably not be used in the sequel,
6749 so (if easily done) change this insn to (set REG1 REG0) and
6750 replace REG1 with REG0 in the previous insn that computed their value.
6751 Then REG1 will become a dead store and won't cloud the situation
6752 for later optimizations.
6754 Do not make this change if REG1 is a hard register, because it will
6755 then be used in the sequel and we may be changing a two-operand insn
6756 into a three-operand insn.
6758 Also do not do this if we are operating on a copy of INSN. */
6760 if (n_sets
== 1 && sets
[0].rtl
&& GET_CODE (SET_DEST (sets
[0].rtl
)) == REG
6761 && NEXT_INSN (PREV_INSN (insn
)) == insn
6762 && GET_CODE (SET_SRC (sets
[0].rtl
)) == REG
6763 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
6764 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
)))
6765 && (qty_first_reg
[reg_qty
[REGNO (SET_SRC (sets
[0].rtl
))]]
6766 == REGNO (SET_DEST (sets
[0].rtl
))))
6768 rtx prev
= PREV_INSN (insn
);
6769 while (prev
&& GET_CODE (prev
) == NOTE
)
6770 prev
= PREV_INSN (prev
);
6772 if (prev
&& GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SET
6773 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
))
6775 rtx dest
= SET_DEST (sets
[0].rtl
);
6776 rtx note
= find_reg_note (prev
, REG_EQUIV
, NULL_RTX
);
6778 validate_change (prev
, & SET_DEST (PATTERN (prev
)), dest
, 1);
6779 validate_change (insn
, & SET_DEST (sets
[0].rtl
),
6780 SET_SRC (sets
[0].rtl
), 1);
6781 validate_change (insn
, & SET_SRC (sets
[0].rtl
), dest
, 1);
6782 apply_change_group ();
6784 /* If REG1 was equivalent to a constant, REG0 is not. */
6786 PUT_REG_NOTE_KIND (note
, REG_EQUAL
);
6788 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6789 any REG_WAS_0 note on INSN to PREV. */
6790 note
= find_reg_note (prev
, REG_WAS_0
, NULL_RTX
);
6792 remove_note (prev
, note
);
6794 note
= find_reg_note (insn
, REG_WAS_0
, NULL_RTX
);
6797 remove_note (insn
, note
);
6798 XEXP (note
, 1) = REG_NOTES (prev
);
6799 REG_NOTES (prev
) = note
;
6804 /* If this is a conditional jump insn, record any known equivalences due to
6805 the condition being tested. */
6807 last_jump_equiv_class
= 0;
6808 if (GET_CODE (insn
) == JUMP_INSN
6809 && n_sets
== 1 && GET_CODE (x
) == SET
6810 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
6811 record_jump_equiv (insn
, 0);
6814 /* If the previous insn set CC0 and this insn no longer references CC0,
6815 delete the previous insn. Here we use the fact that nothing expects CC0
6816 to be valid over an insn, which is true until the final pass. */
6817 if (prev_insn
&& GET_CODE (prev_insn
) == INSN
6818 && (tem
= single_set (prev_insn
)) != 0
6819 && SET_DEST (tem
) == cc0_rtx
6820 && ! reg_mentioned_p (cc0_rtx
, x
))
6822 PUT_CODE (prev_insn
, NOTE
);
6823 NOTE_LINE_NUMBER (prev_insn
) = NOTE_INSN_DELETED
;
6824 NOTE_SOURCE_FILE (prev_insn
) = 0;
6827 prev_insn_cc0
= this_insn_cc0
;
6828 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6834 /* Store 1 in *WRITES_PTR for those categories of memory ref
6835 that must be invalidated when the expression WRITTEN is stored in.
6836 If WRITTEN is null, say everything must be invalidated. */
6839 note_mem_written (written
, writes_ptr
)
6841 struct write_data
*writes_ptr
;
6843 static struct write_data everything
= {0, 1, 1, 1};
6846 *writes_ptr
= everything
;
6847 else if (GET_CODE (written
) == MEM
)
6849 /* Pushing or popping the stack invalidates just the stack pointer. */
6850 rtx addr
= XEXP (written
, 0);
6851 if ((GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
6852 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
6853 && GET_CODE (XEXP (addr
, 0)) == REG
6854 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
6859 else if (GET_MODE (written
) == BLKmode
)
6860 *writes_ptr
= everything
;
6861 else if (cse_rtx_addr_varies_p (written
))
6863 /* A varying address that is a sum indicates an array element,
6864 and that's just as good as a structure element
6865 in implying that we need not invalidate scalar variables. */
6866 if (!(MEM_IN_STRUCT_P (written
)
6867 || GET_CODE (XEXP (written
, 0)) == PLUS
))
6868 writes_ptr
->all
= 1;
6869 writes_ptr
->nonscalar
= 1;
6871 writes_ptr
->var
= 1;
6875 /* Perform invalidation on the basis of everything about an insn
6876 except for invalidating the actual places that are SET in it.
6877 This includes the places CLOBBERed, and anything that might
6878 alias with something that is SET or CLOBBERed.
6880 W points to the writes_memory for this insn, a struct write_data
6881 saying which kinds of memory references must be invalidated.
6882 X is the pattern of the insn. */
6885 invalidate_from_clobbers (w
, x
)
6886 struct write_data
*w
;
6889 /* If W->var is not set, W specifies no action.
6890 If W->all is set, this step gets all memory refs
6891 so they can be ignored in the rest of this function. */
6893 invalidate_memory (w
);
6897 if (reg_tick
[STACK_POINTER_REGNUM
] >= 0)
6898 reg_tick
[STACK_POINTER_REGNUM
]++;
6900 /* This should be *very* rare. */
6901 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
6902 invalidate (stack_pointer_rtx
);
6905 if (GET_CODE (x
) == CLOBBER
)
6907 rtx ref
= XEXP (x
, 0);
6909 && (GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
6910 || (GET_CODE (ref
) == MEM
&& ! w
->all
)))
6913 else if (GET_CODE (x
) == PARALLEL
)
6916 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6918 register rtx y
= XVECEXP (x
, 0, i
);
6919 if (GET_CODE (y
) == CLOBBER
)
6921 rtx ref
= XEXP (y
, 0);
6923 &&(GET_CODE (ref
) == REG
|| GET_CODE (ref
) == SUBREG
6924 || (GET_CODE (ref
) == MEM
&& !w
->all
)))
6931 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6932 and replace any registers in them with either an equivalent constant
6933 or the canonical form of the register. If we are inside an address,
6934 only do this if the address remains valid.
6936 OBJECT is 0 except when within a MEM in which case it is the MEM.
6938 Return the replacement for X. */
6941 cse_process_notes (x
, object
)
6945 enum rtx_code code
= GET_CODE (x
);
6946 char *fmt
= GET_RTX_FORMAT (code
);
6963 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), x
);
6968 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
6969 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
6971 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
6977 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
6978 /* We don't substitute VOIDmode constants into these rtx,
6979 since they would impede folding. */
6980 if (GET_MODE (new) != VOIDmode
)
6981 validate_change (object
, &XEXP (x
, 0), new, 0);
6986 i
= reg_qty
[REGNO (x
)];
6988 /* Return a constant or a constant register. */
6989 if (REGNO_QTY_VALID_P (REGNO (x
))
6990 && qty_const
[i
] != 0
6991 && (CONSTANT_P (qty_const
[i
])
6992 || GET_CODE (qty_const
[i
]) == REG
))
6994 rtx
new = gen_lowpart_if_possible (GET_MODE (x
), qty_const
[i
]);
6999 /* Otherwise, canonicalize this register. */
7000 return canon_reg (x
, NULL_RTX
);
7003 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
7005 validate_change (object
, &XEXP (x
, i
),
7006 cse_process_notes (XEXP (x
, i
), object
), NULL_RTX
);
7011 /* Find common subexpressions between the end test of a loop and the beginning
7012 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7014 Often we have a loop where an expression in the exit test is used
7015 in the body of the loop. For example "while (*p) *q++ = *p++;".
7016 Because of the way we duplicate the loop exit test in front of the loop,
7017 however, we don't detect that common subexpression. This will be caught
7018 when global cse is implemented, but this is a quite common case.
7020 This function handles the most common cases of these common expressions.
7021 It is called after we have processed the basic block ending with the
7022 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7023 jumps to a label used only once. */
7026 cse_around_loop (loop_start
)
7031 struct table_elt
*p
;
7033 /* If the jump at the end of the loop doesn't go to the start, we don't
7035 for (insn
= PREV_INSN (loop_start
);
7036 insn
&& (GET_CODE (insn
) == NOTE
&& NOTE_LINE_NUMBER (insn
) >= 0);
7037 insn
= PREV_INSN (insn
))
7041 || GET_CODE (insn
) != NOTE
7042 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
)
7045 /* If the last insn of the loop (the end test) was an NE comparison,
7046 we will interpret it as an EQ comparison, since we fell through
7047 the loop. Any equivalences resulting from that comparison are
7048 therefore not valid and must be invalidated. */
7049 if (last_jump_equiv_class
)
7050 for (p
= last_jump_equiv_class
->first_same_value
; p
;
7051 p
= p
->next_same_value
)
7052 if (GET_CODE (p
->exp
) == MEM
|| GET_CODE (p
->exp
) == REG
7053 || GET_CODE (p
->exp
) == SUBREG
)
7054 invalidate (p
->exp
);
7056 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7057 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7059 The only thing we do with SET_DEST is invalidate entries, so we
7060 can safely process each SET in order. It is slightly less efficient
7061 to do so, but we only want to handle the most common cases. */
7063 for (insn
= NEXT_INSN (loop_start
);
7064 GET_CODE (insn
) != CALL_INSN
&& GET_CODE (insn
) != CODE_LABEL
7065 && ! (GET_CODE (insn
) == NOTE
7066 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
);
7067 insn
= NEXT_INSN (insn
))
7069 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7070 && (GET_CODE (PATTERN (insn
)) == SET
7071 || GET_CODE (PATTERN (insn
)) == CLOBBER
))
7072 cse_set_around_loop (PATTERN (insn
), insn
, loop_start
);
7073 else if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
7074 && GET_CODE (PATTERN (insn
)) == PARALLEL
)
7075 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7076 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
7077 || GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
7078 cse_set_around_loop (XVECEXP (PATTERN (insn
), 0, i
), insn
,
7083 /* Variable used for communications between the next two routines. */
7085 static struct write_data skipped_writes_memory
;
7087 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7088 since they are done elsewhere. This function is called via note_stores. */
7091 invalidate_skipped_set (dest
, set
)
7095 if (GET_CODE (set
) == CLOBBER
7102 if (GET_CODE (dest
) == MEM
)
7103 note_mem_written (dest
, &skipped_writes_memory
);
7105 if (GET_CODE (dest
) == REG
|| GET_CODE (dest
) == SUBREG
7106 || (! skipped_writes_memory
.all
&& ! cse_rtx_addr_varies_p (dest
)))
7110 /* Invalidate all insns from START up to the end of the function or the
7111 next label. This called when we wish to CSE around a block that is
7112 conditionally executed. */
7115 invalidate_skipped_block (start
)
7120 static struct write_data init
= {0, 0, 0, 0};
7121 static struct write_data everything
= {0, 1, 1, 1};
7123 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
7124 insn
= NEXT_INSN (insn
))
7126 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
7129 skipped_writes_memory
= init
;
7131 if (GET_CODE (insn
) == CALL_INSN
)
7133 invalidate_for_call ();
7134 skipped_writes_memory
= everything
;
7137 note_stores (PATTERN (insn
), invalidate_skipped_set
);
7138 invalidate_from_clobbers (&skipped_writes_memory
, PATTERN (insn
));
7142 /* Used for communication between the following two routines; contains a
7143 value to be checked for modification. */
7145 static rtx cse_check_loop_start_value
;
7147 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7148 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7151 cse_check_loop_start (x
, set
)
7155 if (cse_check_loop_start_value
== 0
7156 || GET_CODE (x
) == CC0
|| GET_CODE (x
) == PC
)
7159 if ((GET_CODE (x
) == MEM
&& GET_CODE (cse_check_loop_start_value
) == MEM
)
7160 || reg_overlap_mentioned_p (x
, cse_check_loop_start_value
))
7161 cse_check_loop_start_value
= 0;
7164 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7165 a loop that starts with the label at LOOP_START.
7167 If X is a SET, we see if its SET_SRC is currently in our hash table.
7168 If so, we see if it has a value equal to some register used only in the
7169 loop exit code (as marked by jump.c).
7171 If those two conditions are true, we search backwards from the start of
7172 the loop to see if that same value was loaded into a register that still
7173 retains its value at the start of the loop.
7175 If so, we insert an insn after the load to copy the destination of that
7176 load into the equivalent register and (try to) replace our SET_SRC with that
7179 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7182 cse_set_around_loop (x
, insn
, loop_start
)
7188 struct table_elt
*src_elt
;
7189 static struct write_data init
= {0, 0, 0, 0};
7190 struct write_data writes_memory
;
7192 writes_memory
= init
;
7194 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7195 are setting PC or CC0 or whose SET_SRC is already a register. */
7196 if (GET_CODE (x
) == SET
7197 && GET_CODE (SET_DEST (x
)) != PC
&& GET_CODE (SET_DEST (x
)) != CC0
7198 && GET_CODE (SET_SRC (x
)) != REG
)
7200 src_elt
= lookup (SET_SRC (x
),
7201 HASH (SET_SRC (x
), GET_MODE (SET_DEST (x
))),
7202 GET_MODE (SET_DEST (x
)));
7205 for (src_elt
= src_elt
->first_same_value
; src_elt
;
7206 src_elt
= src_elt
->next_same_value
)
7207 if (GET_CODE (src_elt
->exp
) == REG
&& REG_LOOP_TEST_P (src_elt
->exp
)
7208 && COST (src_elt
->exp
) < COST (SET_SRC (x
)))
7212 /* Look for an insn in front of LOOP_START that sets
7213 something in the desired mode to SET_SRC (x) before we hit
7214 a label or CALL_INSN. */
7216 for (p
= prev_nonnote_insn (loop_start
);
7217 p
&& GET_CODE (p
) != CALL_INSN
7218 && GET_CODE (p
) != CODE_LABEL
;
7219 p
= prev_nonnote_insn (p
))
7220 if ((set
= single_set (p
)) != 0
7221 && GET_CODE (SET_DEST (set
)) == REG
7222 && GET_MODE (SET_DEST (set
)) == src_elt
->mode
7223 && rtx_equal_p (SET_SRC (set
), SET_SRC (x
)))
7225 /* We now have to ensure that nothing between P
7226 and LOOP_START modified anything referenced in
7227 SET_SRC (x). We know that nothing within the loop
7228 can modify it, or we would have invalidated it in
7232 cse_check_loop_start_value
= SET_SRC (x
);
7233 for (q
= p
; q
!= loop_start
; q
= NEXT_INSN (q
))
7234 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
7235 note_stores (PATTERN (q
), cse_check_loop_start
);
7237 /* If nothing was changed and we can replace our
7238 SET_SRC, add an insn after P to copy its destination
7239 to what we will be replacing SET_SRC with. */
7240 if (cse_check_loop_start_value
7241 && validate_change (insn
, &SET_SRC (x
),
7243 emit_insn_after (gen_move_insn (src_elt
->exp
,
7251 /* Now invalidate anything modified by X. */
7252 note_mem_written (SET_DEST (x
), &writes_memory
);
7254 if (writes_memory
.var
)
7255 invalidate_memory (&writes_memory
);
7257 /* See comment on similar code in cse_insn for explanation of these tests. */
7258 if (GET_CODE (SET_DEST (x
)) == REG
|| GET_CODE (SET_DEST (x
)) == SUBREG
7259 || (GET_CODE (SET_DEST (x
)) == MEM
&& ! writes_memory
.all
7260 && ! cse_rtx_addr_varies_p (SET_DEST (x
))))
7261 invalidate (SET_DEST (x
));
7264 /* Find the end of INSN's basic block and return its range,
7265 the total number of SETs in all the insns of the block, the last insn of the
7266 block, and the branch path.
7268 The branch path indicates which branches should be followed. If a non-zero
7269 path size is specified, the block should be rescanned and a different set
7270 of branches will be taken. The branch path is only used if
7271 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
7273 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
7274 used to describe the block. It is filled in with the information about
7275 the current block. The incoming structure's branch path, if any, is used
7276 to construct the output branch path. */
7278 /* Define maximum length of a branch path. */
7280 #define PATHLENGTH 10
7282 struct cse_basic_block_data
{
7283 /* Lowest CUID value of insns in block. */
7285 /* Highest CUID value of insns in block. */
7287 /* Total number of SETs in block. */
7289 /* Last insn in the block. */
7291 /* Size of current branch path, if any. */
7293 /* Current branch path, indicating which branches will be taken. */
7294 struct branch_path
{
7295 /* The branch insn. */
7297 /* Whether it should be taken or not. AROUND is the same as taken
7298 except that it is used when the destination label is not preceded
7300 enum taken
{TAKEN
, NOT_TAKEN
, AROUND
} status
;
7305 cse_end_of_basic_block (insn
, data
, follow_jumps
, after_loop
, skip_blocks
)
7307 struct cse_basic_block_data
*data
;
7314 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
7315 rtx next
= GET_RTX_CLASS (GET_CODE (insn
)) == 'i' ? insn
: next_real_insn (insn
);
7316 int path_size
= data
->path_size
;
7320 /* Update the previous branch path, if any. If the last branch was
7321 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
7322 shorten the path by one and look at the previous branch. We know that
7323 at least one branch must have been taken if PATH_SIZE is non-zero. */
7324 while (path_size
> 0)
7326 if (data
->path
[path_size
- 1].status
!= NOT_TAKEN
)
7328 data
->path
[path_size
- 1].status
= NOT_TAKEN
;
7335 /* Scan to end of this basic block. */
7336 while (p
&& GET_CODE (p
) != CODE_LABEL
)
7338 /* Don't cse out the end of a loop. This makes a difference
7339 only for the unusual loops that always execute at least once;
7340 all other loops have labels there so we will stop in any case.
7341 Cse'ing out the end of the loop is dangerous because it
7342 might cause an invariant expression inside the loop
7343 to be reused after the end of the loop. This would make it
7344 hard to move the expression out of the loop in loop.c,
7345 especially if it is one of several equivalent expressions
7346 and loop.c would like to eliminate it.
7348 If we are running after loop.c has finished, we can ignore
7349 the NOTE_INSN_LOOP_END. */
7351 if (! after_loop
&& GET_CODE (p
) == NOTE
7352 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
7355 /* Don't cse over a call to setjmp; on some machines (eg vax)
7356 the regs restored by the longjmp come from
7357 a later time than the setjmp. */
7358 if (GET_CODE (p
) == NOTE
7359 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
7362 /* A PARALLEL can have lots of SETs in it,
7363 especially if it is really an ASM_OPERANDS. */
7364 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
7365 && GET_CODE (PATTERN (p
)) == PARALLEL
)
7366 nsets
+= XVECLEN (PATTERN (p
), 0);
7367 else if (GET_CODE (p
) != NOTE
)
7370 if (INSN_CUID (p
) > high_cuid
)
7371 high_cuid
= INSN_CUID (p
);
7372 if (INSN_CUID (p
) < low_cuid
)
7373 low_cuid
= INSN_CUID(p
);
7375 /* See if this insn is in our branch path. If it is and we are to
7377 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
7379 if (data
->path
[path_entry
].status
!= NOT_TAKEN
)
7382 /* Point to next entry in path, if any. */
7386 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
7387 was specified, we haven't reached our maximum path length, there are
7388 insns following the target of the jump, this is the only use of the
7389 jump label, and the target label is preceded by a BARRIER.
7391 Alternatively, we can follow the jump if it branches around a
7392 block of code and there are no other branches into the block.
7393 In this case invalidate_skipped_block will be called to invalidate any
7394 registers set in the block when following the jump. */
7396 else if ((follow_jumps
|| skip_blocks
) && path_size
< PATHLENGTH
- 1
7397 && GET_CODE (p
) == JUMP_INSN
7398 && GET_CODE (PATTERN (p
)) == SET
7399 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
7400 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
7401 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
7403 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
7404 if ((GET_CODE (q
) != NOTE
7405 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
7406 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_SETJMP
)
7407 && (GET_CODE (q
) != CODE_LABEL
|| LABEL_NUSES (q
) != 0))
7410 /* If we ran into a BARRIER, this code is an extension of the
7411 basic block when the branch is taken. */
7412 if (follow_jumps
&& q
!= 0 && GET_CODE (q
) == BARRIER
)
7414 /* Don't allow ourself to keep walking around an
7415 always-executed loop. */
7416 if (next_real_insn (q
) == next
)
7422 /* Similarly, don't put a branch in our path more than once. */
7423 for (i
= 0; i
< path_entry
; i
++)
7424 if (data
->path
[i
].branch
== p
)
7427 if (i
!= path_entry
)
7430 data
->path
[path_entry
].branch
= p
;
7431 data
->path
[path_entry
++].status
= TAKEN
;
7433 /* This branch now ends our path. It was possible that we
7434 didn't see this branch the last time around (when the
7435 insn in front of the target was a JUMP_INSN that was
7436 turned into a no-op). */
7437 path_size
= path_entry
;
7440 /* Mark block so we won't scan it again later. */
7441 PUT_MODE (NEXT_INSN (p
), QImode
);
7443 /* Detect a branch around a block of code. */
7444 else if (skip_blocks
&& q
!= 0 && GET_CODE (q
) != CODE_LABEL
)
7448 if (next_real_insn (q
) == next
)
7454 for (i
= 0; i
< path_entry
; i
++)
7455 if (data
->path
[i
].branch
== p
)
7458 if (i
!= path_entry
)
7461 /* This is no_labels_between_p (p, q) with an added check for
7462 reaching the end of a function (in case Q precedes P). */
7463 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
7464 if (GET_CODE (tmp
) == CODE_LABEL
)
7469 data
->path
[path_entry
].branch
= p
;
7470 data
->path
[path_entry
++].status
= AROUND
;
7472 path_size
= path_entry
;
7475 /* Mark block so we won't scan it again later. */
7476 PUT_MODE (NEXT_INSN (p
), QImode
);
7483 data
->low_cuid
= low_cuid
;
7484 data
->high_cuid
= high_cuid
;
7485 data
->nsets
= nsets
;
7488 /* If all jumps in the path are not taken, set our path length to zero
7489 so a rescan won't be done. */
7490 for (i
= path_size
- 1; i
>= 0; i
--)
7491 if (data
->path
[i
].status
!= NOT_TAKEN
)
7495 data
->path_size
= 0;
7497 data
->path_size
= path_size
;
7499 /* End the current branch path. */
7500 data
->path
[path_size
].branch
= 0;
7503 static rtx
cse_basic_block ();
7505 /* Perform cse on the instructions of a function.
7506 F is the first instruction.
7507 NREGS is one plus the highest pseudo-reg number used in the instruction.
7509 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7510 (only if -frerun-cse-after-loop).
7512 Returns 1 if jump_optimize should be redone due to simplifications
7513 in conditional jump instructions. */
7516 cse_main (f
, nregs
, after_loop
, file
)
7522 struct cse_basic_block_data val
;
7523 register rtx insn
= f
;
7526 cse_jumps_altered
= 0;
7527 constant_pool_entries_cost
= 0;
7534 all_minus_one
= (int *) alloca (nregs
* sizeof (int));
7535 consec_ints
= (int *) alloca (nregs
* sizeof (int));
7537 for (i
= 0; i
< nregs
; i
++)
7539 all_minus_one
[i
] = -1;
7543 reg_next_eqv
= (int *) alloca (nregs
* sizeof (int));
7544 reg_prev_eqv
= (int *) alloca (nregs
* sizeof (int));
7545 reg_qty
= (int *) alloca (nregs
* sizeof (int));
7546 reg_in_table
= (int *) alloca (nregs
* sizeof (int));
7547 reg_tick
= (int *) alloca (nregs
* sizeof (int));
7549 /* Discard all the free elements of the previous function
7550 since they are allocated in the temporarily obstack. */
7551 bzero (table
, sizeof table
);
7552 free_element_chain
= 0;
7553 n_elements_made
= 0;
7555 /* Find the largest uid. */
7558 uid_cuid
= (int *) alloca ((i
+ 1) * sizeof (int));
7559 bzero (uid_cuid
, (i
+ 1) * sizeof (int));
7561 /* Compute the mapping from uids to cuids.
7562 CUIDs are numbers assigned to insns, like uids,
7563 except that cuids increase monotonically through the code.
7564 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7565 between two insns is not affected by -g. */
7567 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
7569 if (GET_CODE (insn
) != NOTE
7570 || NOTE_LINE_NUMBER (insn
) < 0)
7571 INSN_CUID (insn
) = ++i
;
7573 /* Give a line number note the same cuid as preceding insn. */
7574 INSN_CUID (insn
) = i
;
7577 /* Initialize which registers are clobbered by calls. */
7579 CLEAR_HARD_REG_SET (regs_invalidated_by_call
);
7581 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
7582 if ((call_used_regs
[i
]
7583 /* Used to check !fixed_regs[i] here, but that isn't safe;
7584 fixed regs are still call-clobbered, and sched can get
7585 confused if they can "live across calls".
7587 The frame pointer is always preserved across calls. The arg
7588 pointer is if it is fixed. The stack pointer usually is, unless
7589 RETURN_POPS_ARGS, in which case an explicit CLOBBER
7590 will be present. If we are generating PIC code, the PIC offset
7591 table register is preserved across calls. */
7593 && i
!= STACK_POINTER_REGNUM
7594 && i
!= FRAME_POINTER_REGNUM
7595 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
7596 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
7598 #ifdef PIC_OFFSET_TABLE_REGNUM
7599 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
7603 SET_HARD_REG_BIT (regs_invalidated_by_call
, i
);
7605 /* Loop over basic blocks.
7606 Compute the maximum number of qty's needed for each basic block
7607 (which is 2 for each SET). */
7611 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
, after_loop
,
7612 flag_cse_skip_blocks
);
7614 /* If this basic block was already processed or has no sets, skip it. */
7615 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
7617 PUT_MODE (insn
, VOIDmode
);
7618 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
7623 cse_basic_block_start
= val
.low_cuid
;
7624 cse_basic_block_end
= val
.high_cuid
;
7625 max_qty
= val
.nsets
* 2;
7628 fprintf (file
, ";; Processing block from %d to %d, %d sets.\n",
7629 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
7632 /* Make MAX_QTY bigger to give us room to optimize
7633 past the end of this basic block, if that should prove useful. */
7639 /* If this basic block is being extended by following certain jumps,
7640 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7641 Otherwise, we start after this basic block. */
7642 if (val
.path_size
> 0)
7643 cse_basic_block (insn
, val
.last
, val
.path
, 0);
7646 int old_cse_jumps_altered
= cse_jumps_altered
;
7649 /* When cse changes a conditional jump to an unconditional
7650 jump, we want to reprocess the block, since it will give
7651 us a new branch path to investigate. */
7652 cse_jumps_altered
= 0;
7653 temp
= cse_basic_block (insn
, val
.last
, val
.path
, ! after_loop
);
7654 if (cse_jumps_altered
== 0
7655 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
7658 cse_jumps_altered
|= old_cse_jumps_altered
;
7666 /* Tell refers_to_mem_p that qty_const info is not available. */
7669 if (max_elements_made
< n_elements_made
)
7670 max_elements_made
= n_elements_made
;
7672 return cse_jumps_altered
;
7675 /* Process a single basic block. FROM and TO and the limits of the basic
7676 block. NEXT_BRANCH points to the branch path when following jumps or
7677 a null path when not following jumps.
7679 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
7680 loop. This is true when we are being called for the last time on a
7681 block and this CSE pass is before loop.c. */
7684 cse_basic_block (from
, to
, next_branch
, around_loop
)
7685 register rtx from
, to
;
7686 struct branch_path
*next_branch
;
7691 int in_libcall_block
= 0;
7693 /* Each of these arrays is undefined before max_reg, so only allocate
7694 the space actually needed and adjust the start below. */
7696 qty_first_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
7697 qty_last_reg
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
7698 qty_mode
= (enum machine_mode
*) alloca ((max_qty
- max_reg
) * sizeof (enum machine_mode
));
7699 qty_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
7700 qty_const_insn
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
7702 = (enum rtx_code
*) alloca ((max_qty
- max_reg
) * sizeof (enum rtx_code
));
7703 qty_comparison_qty
= (int *) alloca ((max_qty
- max_reg
) * sizeof (int));
7704 qty_comparison_const
= (rtx
*) alloca ((max_qty
- max_reg
) * sizeof (rtx
));
7706 qty_first_reg
-= max_reg
;
7707 qty_last_reg
-= max_reg
;
7708 qty_mode
-= max_reg
;
7709 qty_const
-= max_reg
;
7710 qty_const_insn
-= max_reg
;
7711 qty_comparison_code
-= max_reg
;
7712 qty_comparison_qty
-= max_reg
;
7713 qty_comparison_const
-= max_reg
;
7717 /* TO might be a label. If so, protect it from being deleted. */
7718 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
7721 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
7723 register enum rtx_code code
;
7725 /* See if this is a branch that is part of the path. If so, and it is
7726 to be taken, do so. */
7727 if (next_branch
->branch
== insn
)
7729 enum taken status
= next_branch
++->status
;
7730 if (status
!= NOT_TAKEN
)
7732 if (status
== TAKEN
)
7733 record_jump_equiv (insn
, 1);
7735 invalidate_skipped_block (NEXT_INSN (insn
));
7737 /* Set the last insn as the jump insn; it doesn't affect cc0.
7738 Then follow this branch. */
7743 insn
= JUMP_LABEL (insn
);
7748 code
= GET_CODE (insn
);
7749 if (GET_MODE (insn
) == QImode
)
7750 PUT_MODE (insn
, VOIDmode
);
7752 if (GET_RTX_CLASS (code
) == 'i')
7754 /* Process notes first so we have all notes in canonical forms when
7755 looking for duplicate operations. */
7757 if (REG_NOTES (insn
))
7758 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
7760 /* Track when we are inside in LIBCALL block. Inside such a block,
7761 we do not want to record destinations. The last insn of a
7762 LIBCALL block is not considered to be part of the block, since
7763 its destination is the result of the block and hence should be
7766 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
7767 in_libcall_block
= 1;
7768 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
7769 in_libcall_block
= 0;
7771 cse_insn (insn
, in_libcall_block
);
7774 /* If INSN is now an unconditional jump, skip to the end of our
7775 basic block by pretending that we just did the last insn in the
7776 basic block. If we are jumping to the end of our block, show
7777 that we can have one usage of TO. */
7779 if (simplejump_p (insn
))
7784 if (JUMP_LABEL (insn
) == to
)
7787 /* Maybe TO was deleted because the jump is unconditional.
7788 If so, there is nothing left in this basic block. */
7789 /* ??? Perhaps it would be smarter to set TO
7790 to whatever follows this insn,
7791 and pretend the basic block had always ended here. */
7792 if (INSN_DELETED_P (to
))
7795 insn
= PREV_INSN (to
);
7798 /* See if it is ok to keep on going past the label
7799 which used to end our basic block. Remember that we incremented
7800 the count of that label, so we decrement it here. If we made
7801 a jump unconditional, TO_USAGE will be one; in that case, we don't
7802 want to count the use in that jump. */
7804 if (to
!= 0 && NEXT_INSN (insn
) == to
7805 && GET_CODE (to
) == CODE_LABEL
&& --LABEL_NUSES (to
) == to_usage
)
7807 struct cse_basic_block_data val
;
7809 insn
= NEXT_INSN (to
);
7811 if (LABEL_NUSES (to
) == 0)
7814 /* Find the end of the following block. Note that we won't be
7815 following branches in this case. If TO was the last insn
7816 in the function, we are done. Similarly, if we deleted the
7817 insn after TO, it must have been because it was preceded by
7818 a BARRIER. In that case, we are done with this block because it
7819 has no continuation. */
7821 if (insn
== 0 || INSN_DELETED_P (insn
))
7826 cse_end_of_basic_block (insn
, &val
, 0, 0, 0);
7828 /* If the tables we allocated have enough space left
7829 to handle all the SETs in the next basic block,
7830 continue through it. Otherwise, return,
7831 and that block will be scanned individually. */
7832 if (val
.nsets
* 2 + next_qty
> max_qty
)
7835 cse_basic_block_start
= val
.low_cuid
;
7836 cse_basic_block_end
= val
.high_cuid
;
7839 /* Prevent TO from being deleted if it is a label. */
7840 if (to
!= 0 && GET_CODE (to
) == CODE_LABEL
)
7843 /* Back up so we process the first insn in the extension. */
7844 insn
= PREV_INSN (insn
);
7848 if (next_qty
> max_qty
)
7851 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7852 the previous insn is the only insn that branches to the head of a loop,
7853 we can cse into the loop. Don't do this if we changed the jump
7854 structure of a loop unless we aren't going to be following jumps. */
7856 if ((cse_jumps_altered
== 0
7857 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
7858 && around_loop
&& to
!= 0
7859 && GET_CODE (to
) == NOTE
&& NOTE_LINE_NUMBER (to
) == NOTE_INSN_LOOP_END
7860 && GET_CODE (PREV_INSN (to
)) == JUMP_INSN
7861 && JUMP_LABEL (PREV_INSN (to
)) != 0
7862 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to
))) == 1)
7863 cse_around_loop (JUMP_LABEL (PREV_INSN (to
)));
7865 return to
? NEXT_INSN (to
) : 0;
7868 /* Count the number of times registers are used (not set) in X.
7869 COUNTS is an array in which we accumulate the count, INCR is how much
7870 we count each register usage. */
7873 count_reg_usage (x
, counts
, incr
)
7878 enum rtx_code code
= GET_CODE (x
);
7885 counts
[REGNO (x
)] += incr
;
7899 /* Unless we are setting a REG, count everything in SET_DEST. */
7900 if (GET_CODE (SET_DEST (x
)) != REG
)
7901 count_reg_usage (SET_DEST (x
), counts
, incr
);
7902 count_reg_usage (SET_SRC (x
), counts
, incr
);
7908 count_reg_usage (PATTERN (x
), counts
, incr
);
7910 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7914 count_reg_usage (REG_NOTES (x
), counts
, incr
);
7919 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
7920 count_reg_usage (XEXP (x
, 0), counts
, incr
);
7922 count_reg_usage (XEXP (x
, 1), counts
, incr
);
7926 fmt
= GET_RTX_FORMAT (code
);
7927 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7930 count_reg_usage (XEXP (x
, i
), counts
, incr
);
7931 else if (fmt
[i
] == 'E')
7932 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7933 count_reg_usage (XVECEXP (x
, i
, j
), counts
, incr
);
7937 /* Scan all the insns and delete any that are dead; i.e., they store a register
7938 that is never used or they copy a register to itself.
7940 This is used to remove insns made obviously dead by cse. It improves the
7941 heuristics in loop since it won't try to move dead invariants out of loops
7942 or make givs for dead quantities. The remaining passes of the compilation
7943 are also sped up. */
7946 delete_dead_from_cse (insns
, nreg
)
7950 int *counts
= (int *) alloca (nreg
* sizeof (int));
7956 /* First count the number of times each register is used. */
7957 bzero (counts
, sizeof (int) * nreg
);
7958 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
7959 count_reg_usage (insn
, counts
, 1);
7961 /* Go from the last insn to the first and delete insns that only set unused
7962 registers or copy a register to itself. As we delete an insn, remove
7963 usage counts for registers it uses. */
7964 for (insn
= prev_real_insn (get_last_insn ()); insn
; insn
= prev
)
7968 prev
= prev_real_insn (insn
);
7970 /* Don't delete any insns that are part of a libcall block.
7971 Flow or loop might get confused if we did that. Remember
7972 that we are scanning backwards. */
7973 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
7978 else if (GET_CODE (PATTERN (insn
)) == SET
)
7980 if (GET_CODE (SET_DEST (PATTERN (insn
))) == REG
7981 && SET_DEST (PATTERN (insn
)) == SET_SRC (PATTERN (insn
)))
7985 else if (GET_CODE (SET_DEST (PATTERN (insn
))) == CC0
7986 && ! side_effects_p (SET_SRC (PATTERN (insn
)))
7987 && ((tem
= next_nonnote_insn (insn
)) == 0
7988 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
7989 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
7992 else if (GET_CODE (SET_DEST (PATTERN (insn
))) != REG
7993 || REGNO (SET_DEST (PATTERN (insn
))) < FIRST_PSEUDO_REGISTER
7994 || counts
[REGNO (SET_DEST (PATTERN (insn
)))] != 0
7995 || side_effects_p (SET_SRC (PATTERN (insn
))))
7998 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7999 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
8001 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
8003 if (GET_CODE (elt
) == SET
)
8005 if (GET_CODE (SET_DEST (elt
)) == REG
8006 && SET_DEST (elt
) == SET_SRC (elt
))
8010 else if (GET_CODE (SET_DEST (elt
)) == CC0
8011 && ! side_effects_p (SET_SRC (elt
))
8012 && ((tem
= next_nonnote_insn (insn
)) == 0
8013 || GET_RTX_CLASS (GET_CODE (tem
)) != 'i'
8014 || ! reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
8017 else if (GET_CODE (SET_DEST (elt
)) != REG
8018 || REGNO (SET_DEST (elt
)) < FIRST_PSEUDO_REGISTER
8019 || counts
[REGNO (SET_DEST (elt
))] != 0
8020 || side_effects_p (SET_SRC (elt
)))
8023 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
8029 /* If this is a dead insn, delete it and show registers in it aren't
8034 count_reg_usage (insn
, counts
, -1);
8038 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))