1 /* Definitions of target machine for GNU compiler. NEC V850 series
2 Copyright (C) 1996-2015 Free Software Foundation, Inc.
3 Contributed by Jeff Law (law@cygnus.com).
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GCC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 Under Section 7 of GPL version 3, you are granted additional
18 permissions described in the GCC Runtime Library Exception, version
19 3.1, as published by the Free Software Foundation.
21 You should have received a copy of the GNU General Public License and
22 a copy of the GCC Runtime Library Exception along with this program;
23 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
24 <http://www.gnu.org/licenses/>. */
29 extern GTY(()) rtx v850_compare_op0
;
30 extern GTY(()) rtx v850_compare_op1
;
33 #define LIB_SPEC "%{!shared:%{!symbolic:--start-group -lc -lgcc --end-group}}"
40 #define TARGET_CPU_generic 1
41 #define TARGET_CPU_v850e 2
42 #define TARGET_CPU_v850e1 3
43 #define TARGET_CPU_v850e2 4
44 #define TARGET_CPU_v850e2v3 5
45 #define TARGET_CPU_v850e3v5 6
47 #ifndef TARGET_CPU_DEFAULT
48 #define TARGET_CPU_DEFAULT TARGET_CPU_generic
51 #define MASK_DEFAULT MASK_V850
52 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850}"
53 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850__}"
55 /* Choose which processor will be the default.
56 We must pass a -mv850xx option to the assembler if no explicit -mv* option
57 is given, because the assembler's processor default may not be correct. */
58 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e
60 #define MASK_DEFAULT MASK_V850E
61 #undef SUBTARGET_ASM_SPEC
62 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e}"
63 #undef SUBTARGET_CPP_SPEC
64 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e__}"
67 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e1
69 #define MASK_DEFAULT MASK_V850E /* No practical difference. */
70 #undef SUBTARGET_ASM_SPEC
71 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e1}"
72 #undef SUBTARGET_CPP_SPEC
73 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e1__} %{mv850e1:-D__v850e1__}"
76 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e2
78 #define MASK_DEFAULT MASK_V850E2
79 #undef SUBTARGET_ASM_SPEC
80 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e2}"
81 #undef SUBTARGET_CPP_SPEC
82 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e2__} %{mv850e2:-D__v850e2__}"
85 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e2v3
87 #define MASK_DEFAULT MASK_V850E2V3
88 #undef SUBTARGET_ASM_SPEC
89 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e2v3}"
90 #undef SUBTARGET_CPP_SPEC
91 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e2v3__} %{mv850e2v3:-D__v850e2v3__}"
94 #if TARGET_CPU_DEFAULT == TARGET_CPU_v850e3v5
96 #define MASK_DEFAULT MASK_V850E3V5
97 #undef SUBTARGET_ASM_SPEC
98 #define SUBTARGET_ASM_SPEC "%{!mv*:-mv850e3v5}"
99 #undef SUBTARGET_CPP_SPEC
100 #define SUBTARGET_CPP_SPEC "%{!mv*:-D__v850e3v5__} %{mv850e3v5:-D__v850e3v5__}"
101 #undef TARGET_VERSION
102 #define TARGET_VERSION fprintf (stderr, " (Renesas V850E3V5)");
105 #define TARGET_V850E3V5_UP ((TARGET_V850E3V5))
106 #define TARGET_V850E2V3_UP ((TARGET_V850E2V3) || TARGET_V850E3V5_UP)
107 #define TARGET_V850E2_UP ((TARGET_V850E2) || TARGET_V850E2V3_UP)
108 #define TARGET_V850E_UP ((TARGET_V850E) || TARGET_V850E2_UP)
109 #define TARGET_ALL ((TARGET_V850) || TARGET_V850E_UP)
111 #define ASM_SPEC "%{m850es:-mv850e1}%{!mv850es:%{mv*:-mv%*}} \
113 %{m8byte-align:-m8byte-align} \
114 %{mgcc-abi:-mgcc-abi}"
116 #define LINK_SPEC "%{mgcc-abi:-m v850}"
119 %{mv850e3v5:-D__v850e3v5__} \
120 %{mv850e2v3:-D__v850e2v3__} \
121 %{mv850e2:-D__v850e2__} \
122 %{mv850es:-D__v850e1__} \
123 %{mv850e1:-D__v850e1__} \
124 %{mv850e:-D__v850e__} \
125 %{mv850:-D__v850__} \
126 %(subtarget_cpp_spec) \
129 #define EXTRA_SPECS \
130 { "subtarget_asm_spec", SUBTARGET_ASM_SPEC }, \
131 { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC }
134 /* Macro to decide when FPU instructions can be used. */
135 #define TARGET_USE_FPU (TARGET_V850E2V3_UP && ! TARGET_SOFT_FLOAT)
137 #define TARGET_CPU_CPP_BUILTINS() \
140 builtin_define( "__v851__" ); \
141 builtin_define( "__v850" ); \
142 builtin_define( "__v850__" ); \
143 builtin_assert( "machine=v850" ); \
144 builtin_assert( "cpu=v850" ); \
146 builtin_define ("__EP__"); \
147 if (TARGET_GCC_ABI) \
148 builtin_define ("__V850_GCC_ABI__"); \
150 builtin_define ("__V850_RH850_ABI__"); \
151 if (! TARGET_DISABLE_CALLT) \
152 builtin_define ("__V850_CALLT__"); \
153 if (TARGET_8BYTE_ALIGN) \
154 builtin_define ("__V850_8BYTE_ALIGN__");\
155 builtin_define (TARGET_USE_FPU ? \
156 "__FPU_OK__" : "__NO_FPU__");\
160 #define MASK_CPU (MASK_V850 | MASK_V850E | MASK_V850E1 | MASK_V850E2 | MASK_V850E2V3 | MASK_V850E3V5)
162 /* Target machine storage layout */
164 /* Define this if most significant bit is lowest numbered
165 in instructions that operate on numbered bit-fields.
166 This is not true on the NEC V850. */
167 #define BITS_BIG_ENDIAN 0
169 /* Define this if most significant byte of a word is the lowest numbered. */
170 /* This is not true on the NEC V850. */
171 #define BYTES_BIG_ENDIAN 0
173 /* Define this if most significant word of a multiword number is lowest
175 This is not true on the NEC V850. */
176 #define WORDS_BIG_ENDIAN 0
178 /* Width of a word, in units (bytes). */
179 #define UNITS_PER_WORD 4
181 /* Define this macro if it is advisable to hold scalars in registers
182 in a wider mode than that declared by the program. In such cases,
183 the value is constrained to be within the bounds of the declared
184 type, but kept valid in the wider mode. The signedness of the
185 extension may differ from that of the type.
187 Some simple experiments have shown that leaving UNSIGNEDP alone
188 generates the best overall code. */
190 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
191 if (GET_MODE_CLASS (MODE) == MODE_INT \
192 && GET_MODE_SIZE (MODE) < 4) \
195 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
196 #define PARM_BOUNDARY 32
198 /* The stack goes in 32-bit lumps. */
199 #define STACK_BOUNDARY BIGGEST_ALIGNMENT
201 /* Allocation boundary (in *bits*) for the code of a function.
202 16 is the minimum boundary; 32 would give better performance. */
203 #define FUNCTION_BOUNDARY (((! TARGET_GCC_ABI) || optimize_size) ? 16 : 32)
205 /* No data type wants to be aligned rounder than this. */
206 #define BIGGEST_ALIGNMENT (TARGET_8BYTE_ALIGN ? 64 : 32)
208 /* Alignment of field after `int : 0' in a structure. */
209 #define EMPTY_FIELD_BOUNDARY 32
211 /* No structure field wants to be aligned rounder than this. */
212 #define BIGGEST_FIELD_ALIGNMENT BIGGEST_ALIGNMENT
214 /* Define this if move instructions will actually fail to work
215 when given unaligned data. */
216 #define STRICT_ALIGNMENT (!TARGET_NO_STRICT_ALIGN)
218 /* Define this as 1 if `char' should by default be signed; else as 0.
220 On the NEC V850, loads do sign extension, so make this default. */
221 #define DEFAULT_SIGNED_CHAR 1
224 #define SIZE_TYPE "unsigned int"
227 #define PTRDIFF_TYPE "int"
230 #define WCHAR_TYPE "long int"
232 #undef WCHAR_TYPE_SIZE
233 #define WCHAR_TYPE_SIZE BITS_PER_WORD
235 /* Standard register usage. */
237 /* Number of actual hardware registers.
238 The hardware registers are assigned numbers for the compiler
239 from 0 to just below FIRST_PSEUDO_REGISTER.
241 All registers that the compiler knows about must be given numbers,
242 even those that are not normally considered general registers. */
244 #define FIRST_PSEUDO_REGISTER 36
246 /* 1 for registers that have pervasive standard uses
247 and are not available for the register allocator. */
249 #define FIXED_REGISTERS \
250 { 1, 1, 1, 1, 1, 1, 0, 0, \
251 0, 0, 0, 0, 0, 0, 0, 0, \
252 0, 0, 0, 0, 0, 0, 0, 0, \
253 0, 0, 0, 0, 0, 0, 1, 0, \
257 /* 1 for registers not available across function calls.
258 These must include the FIXED_REGISTERS and also any
259 registers that can be used without being saved.
260 The latter must include the registers where values are returned
261 and the register where structure-value addresses are passed.
262 Aside from that, you can include as many other registers as you
265 #define CALL_USED_REGISTERS \
266 { 1, 1, 1, 1, 1, 1, 1, 1, \
267 1, 1, 1, 1, 1, 1, 1, 1, \
268 1, 1, 1, 1, 0, 0, 0, 0, \
269 0, 0, 0, 0, 0, 0, 1, 1, \
273 /* List the order in which to allocate registers. Each register must be
274 listed once, even those in FIXED_REGISTERS.
276 On the 850, we make the return registers first, then all of the volatile
277 registers, then the saved registers in reverse order to better save the
278 registers with an out of line function, and finally the fixed
281 #define REG_ALLOC_ORDER \
283 10, 11, /* return registers */ \
284 12, 13, 14, 15, 16, 17, 18, 19, /* scratch registers */ \
285 6, 7, 8, 9, 31, /* argument registers */ \
286 29, 28, 27, 26, 25, 24, 23, 22, /* saved registers */ \
288 0, 1, 3, 4, 5, 30, 32, 33, /* fixed registers */ \
292 /* Return number of consecutive hard regs needed starting at reg REGNO
293 to hold something of mode MODE.
295 This is ordinarily the length in words of a value of mode MODE
296 but can be less for certain modes in special long registers. */
298 #define HARD_REGNO_NREGS(REGNO, MODE) \
299 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
301 /* Value is 1 if hard register REGNO can hold a value of machine-mode
304 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
305 ((GET_MODE_SIZE (MODE) <= 4) || (((REGNO) & 1) == 0 && (REGNO) != 0))
307 /* Value is 1 if it is a good idea to tie two pseudo registers
308 when one has mode MODE1 and one has mode MODE2.
309 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
310 for any hard reg, then this must be 0 for correct output. */
311 #define MODES_TIEABLE_P(MODE1, MODE2) \
312 (MODE1 == MODE2 || (GET_MODE_SIZE (MODE1) <= 4 && GET_MODE_SIZE (MODE2) <= 4))
315 /* Define the classes of registers for register constraints in the
316 machine description. Also define ranges of constants.
318 One of the classes must always be named ALL_REGS and include all hard regs.
319 If there is more than one class, another class must be named NO_REGS
320 and contain no registers.
322 The name GENERAL_REGS must be the name of a class (or an alias for
323 another name such as ALL_REGS). This is the class of registers
324 that is allowed by "g" or "r" in a register constraint.
325 Also, registers outside this class are allocated only when
326 instructions express preferences for them.
328 The classes must be numbered in nondecreasing order; that is,
329 a larger-numbered class must never be contained completely
330 in a smaller-numbered class.
332 For any two classes, it is very desirable that there be another
333 class that represents their union. */
337 NO_REGS
, EVEN_REGS
, GENERAL_REGS
, ALL_REGS
, LIM_REG_CLASSES
340 #define N_REG_CLASSES (int) LIM_REG_CLASSES
342 /* Give names of register classes as strings for dump file. */
344 #define REG_CLASS_NAMES \
345 { "NO_REGS", "EVEN_REGS", "GENERAL_REGS", "ALL_REGS", "LIM_REGS" }
347 /* Define which registers fit in which classes.
348 This is an initializer for a vector of HARD_REG_SET
349 of length N_REG_CLASSES. */
351 #define REG_CLASS_CONTENTS \
353 { 0x00000000,0x0 }, /* NO_REGS */ \
354 { 0x55555554,0x0 }, /* EVEN_REGS */ \
355 { 0xfffffffe,0x0 }, /* GENERAL_REGS */ \
356 { 0xffffffff,0x0 }, /* ALL_REGS */ \
359 /* The same information, inverted:
360 Return the class number of the smallest class containing
361 reg number REGNO. This could be a conditional expression
362 or could index an array. */
364 #define REGNO_REG_CLASS(REGNO) ((REGNO == CC_REGNUM || REGNO == FCC_REGNUM) ? NO_REGS : GENERAL_REGS)
366 /* The class value for index registers, and the one for base regs. */
368 #define INDEX_REG_CLASS NO_REGS
369 #define BASE_REG_CLASS GENERAL_REGS
371 /* Macros to check register numbers against specific register classes. */
373 /* These assume that REGNO is a hard or pseudo reg number.
374 They give nonzero only if REGNO is a hard reg of the suitable class
375 or a pseudo reg currently allocated to a suitable hard reg.
376 Since they use reg_renumber, they are safe only once reg_renumber
377 has been allocated, which happens in reginfo.c during register
380 #define REGNO_OK_FOR_BASE_P(regno) \
381 (((regno) < FIRST_PSEUDO_REGISTER \
382 && (regno) != CC_REGNUM \
383 && (regno) != FCC_REGNUM) \
384 || reg_renumber[regno] >= 0)
386 #define REGNO_OK_FOR_INDEX_P(regno) 0
388 /* Convenience wrappers around insn_const_int_ok_for_constraint. */
390 #define CONST_OK_FOR_I(VALUE) \
391 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_I)
392 #define CONST_OK_FOR_J(VALUE) \
393 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_J)
394 #define CONST_OK_FOR_K(VALUE) \
395 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_K)
396 #define CONST_OK_FOR_L(VALUE) \
397 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_L)
398 #define CONST_OK_FOR_M(VALUE) \
399 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_M)
400 #define CONST_OK_FOR_N(VALUE) \
401 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_N)
402 #define CONST_OK_FOR_O(VALUE) \
403 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_O)
404 #define CONST_OK_FOR_W(VALUE) \
405 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_W)
407 /* Stack layout; function entry, exit and calling. */
409 /* Define this if pushing a word on the stack
410 makes the stack pointer a smaller address. */
412 #define STACK_GROWS_DOWNWARD
414 /* Define this to nonzero if the nominal address of the stack frame
415 is at the high-address end of the local variables;
416 that is, each additional local variable allocated
417 goes at a more negative offset in the frame. */
419 #define FRAME_GROWS_DOWNWARD 1
421 /* Offset within stack frame to start allocating local variables at.
422 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
423 first local allocated. Otherwise, it is the offset to the BEGINNING
424 of the first local allocated. */
426 #define STARTING_FRAME_OFFSET 0
428 /* Offset of first parameter from the argument pointer register value. */
429 /* Is equal to the size of the saved fp + pc, even if an fp isn't
430 saved since the value is used before we know. */
432 #define FIRST_PARM_OFFSET(FNDECL) 0
434 /* Specify the registers used for certain standard purposes.
435 The values of these macros are register numbers. */
437 /* Register to use for pushing function arguments. */
438 #define STACK_POINTER_REGNUM SP_REGNUM
440 /* Base register for access to local variables of the function. */
441 #define FRAME_POINTER_REGNUM 34
443 /* Register containing return address from latest function call. */
444 #define LINK_POINTER_REGNUM LP_REGNUM
446 /* On some machines the offset between the frame pointer and starting
447 offset of the automatic variables is not known until after register
448 allocation has been done (for example, because the saved registers
449 are between these two locations). On those machines, define
450 `FRAME_POINTER_REGNUM' the number of a special, fixed register to
451 be used internally until the offset is known, and define
452 `HARD_FRAME_POINTER_REGNUM' to be actual the hard register number
453 used for the frame pointer.
455 You should define this macro only in the very rare circumstances
456 when it is not possible to calculate the offset between the frame
457 pointer and the automatic variables until after register
458 allocation has been completed. When this macro is defined, you
459 must also indicate in your definition of `ELIMINABLE_REGS' how to
460 eliminate `FRAME_POINTER_REGNUM' into either
461 `HARD_FRAME_POINTER_REGNUM' or `STACK_POINTER_REGNUM'.
463 Do not define this macro if it would be the same as
464 `FRAME_POINTER_REGNUM'. */
465 #undef HARD_FRAME_POINTER_REGNUM
466 #define HARD_FRAME_POINTER_REGNUM 29
468 /* Base register for access to arguments of the function. */
469 #define ARG_POINTER_REGNUM 35
471 /* Register in which static-chain is passed to a function. */
472 #define STATIC_CHAIN_REGNUM 20
474 /* If defined, this macro specifies a table of register pairs used to
475 eliminate unneeded registers that point into the stack frame. If
476 it is not defined, the only elimination attempted by the compiler
477 is to replace references to the frame pointer with references to
480 The definition of this macro is a list of structure
481 initializations, each of which specifies an original and
482 replacement register.
484 On some machines, the position of the argument pointer is not
485 known until the compilation is completed. In such a case, a
486 separate hard register must be used for the argument pointer.
487 This register can be eliminated by replacing it with either the
488 frame pointer or the argument pointer, depending on whether or not
489 the frame pointer has been eliminated.
491 In this case, you might specify:
492 #define ELIMINABLE_REGS \
493 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
494 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
495 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
497 Note that the elimination of the argument pointer with the stack
498 pointer is specified first since that is the preferred elimination. */
500 #define ELIMINABLE_REGS \
501 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
502 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
503 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
504 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }} \
506 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
507 specifies the initial difference between the specified pair of
508 registers. This macro must be defined if `ELIMINABLE_REGS' is
511 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
513 if ((FROM) == FRAME_POINTER_REGNUM) \
514 (OFFSET) = get_frame_size () + crtl->outgoing_args_size; \
515 else if ((FROM) == ARG_POINTER_REGNUM) \
516 (OFFSET) = compute_frame_size (get_frame_size (), (long *)0); \
518 gcc_unreachable (); \
521 /* Keep the stack pointer constant throughout the function. */
522 #define ACCUMULATE_OUTGOING_ARGS 1
524 #define RETURN_ADDR_RTX(COUNT, FP) v850_return_addr (COUNT)
526 /* Define a data type for recording info about an argument list
527 during the scan of that argument list. This data type should
528 hold all necessary information about the function itself
529 and about the args processed so far, enough to enable macros
530 such as FUNCTION_ARG to determine where the next arg should go. */
532 #define CUMULATIVE_ARGS struct cum_arg
533 struct cum_arg
{ int nbytes
; };
535 /* Initialize a variable CUM of type CUMULATIVE_ARGS
536 for a call to a function whose data type is FNTYPE.
537 For a library call, FNTYPE is 0. */
539 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
540 do { (CUM).nbytes = 0; } while (0)
542 /* When a parameter is passed in a register, stack space is still
544 #define REG_PARM_STACK_SPACE(DECL) 0
546 /* 1 if N is a possible register number for function argument passing. */
548 #define FUNCTION_ARG_REGNO_P(N) (N >= 6 && N <= 9)
550 /* Define how to find the value returned by a library function
551 assuming the value has mode MODE. */
553 #define LIBCALL_VALUE(MODE) \
554 gen_rtx_REG (MODE, 10)
556 #define DEFAULT_PCC_STRUCT_RETURN 0
558 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
559 the stack pointer does not matter. The value is tested only in
560 functions that have frame pointers.
561 No definition is equivalent to always zero. */
563 #define EXIT_IGNORE_STACK 1
565 /* Define this macro as a C expression that is nonzero for registers
566 used by the epilogue or the `return' pattern. */
568 #define EPILOGUE_USES(REGNO) \
569 (reload_completed && (REGNO) == LINK_POINTER_REGNUM)
571 /* Output assembler code to FILE to increment profiler label # LABELNO
572 for profiling a function entry. */
574 #define FUNCTION_PROFILER(FILE, LABELNO) ;
576 /* Length in units of the trampoline for entering a nested function. */
578 #define TRAMPOLINE_SIZE 24
580 /* Addressing modes, and classification of registers for them. */
583 /* 1 if X is an rtx for a constant that is a valid address. */
585 /* ??? This seems too exclusive. May get better code by accepting more
586 possibilities here, in particular, should accept ZDA_NAME SYMBOL_REFs. */
588 #define CONSTANT_ADDRESS_P(X) constraint_satisfied_p (X, CONSTRAINT_K)
590 /* Maximum number of registers that can appear in a valid memory address. */
592 #define MAX_REGS_PER_ADDRESS 1
594 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
595 and check its validity for a certain class.
596 We have two alternate definitions for each of them.
597 The usual definition accepts all pseudo regs; the other rejects
598 them unless they have been allocated suitable hard regs.
599 The symbol REG_OK_STRICT causes the latter definition to be used.
601 Most source files want to accept pseudo regs in the hope that
602 they will get allocated to the class that the insn wants them to be in.
603 Source files for reload pass need to be strict.
604 After reload, it makes no difference, since pseudo regs have
605 been eliminated by then. */
607 #ifndef REG_OK_STRICT
609 /* Nonzero if X is a hard reg that can be used as an index
610 or if it is a pseudo reg. */
611 #define REG_OK_FOR_INDEX_P(X) 0
612 /* Nonzero if X is a hard reg that can be used as a base reg
613 or if it is a pseudo reg. */
614 #define REG_OK_FOR_BASE_P(X) 1
615 #define REG_OK_FOR_INDEX_P_STRICT(X) 0
616 #define REG_OK_FOR_BASE_P_STRICT(X) REGNO_OK_FOR_BASE_P (REGNO (X))
621 /* Nonzero if X is a hard reg that can be used as an index. */
622 #define REG_OK_FOR_INDEX_P(X) 0
623 /* Nonzero if X is a hard reg that can be used as a base reg. */
624 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
630 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
631 that is a valid memory address for an instruction.
632 The MODE argument is the machine mode for the MEM expression
633 that wants to use this address.
635 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
636 except for CONSTANT_ADDRESS_P which is actually
637 machine-independent. */
639 /* Accept either REG or SUBREG where a register is valid. */
641 #define RTX_OK_FOR_BASE_P(X) \
642 ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
643 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \
644 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
646 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
648 if (RTX_OK_FOR_BASE_P (X)) \
650 if (CONSTANT_ADDRESS_P (X) \
651 && (MODE == QImode || INTVAL (X) % 2 == 0) \
652 && (GET_MODE_SIZE (MODE) <= 4 || INTVAL (X) % 4 == 0)) \
654 if (GET_CODE (X) == LO_SUM \
655 && REG_P (XEXP (X, 0)) \
656 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
657 && CONSTANT_P (XEXP (X, 1)) \
658 && (GET_CODE (XEXP (X, 1)) != CONST_INT \
659 || ((MODE == QImode || INTVAL (XEXP (X, 1)) % 2 == 0) \
660 && CONST_OK_FOR_K (INTVAL (XEXP (X, 1))))) \
661 && GET_MODE_SIZE (MODE) <= GET_MODE_SIZE (word_mode)) \
663 if (special_symbolref_operand (X, MODE) \
664 && (GET_MODE_SIZE (MODE) <= GET_MODE_SIZE (word_mode))) \
666 if (GET_CODE (X) == PLUS \
667 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
668 && constraint_satisfied_p (XEXP (X,1), CONSTRAINT_K) \
669 && ((MODE == QImode || INTVAL (XEXP (X, 1)) % 2 == 0) \
670 && CONST_OK_FOR_K (INTVAL (XEXP (X, 1)) \
671 + (GET_MODE_NUNITS (MODE) * UNITS_PER_WORD)))) \
676 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
677 return the mode to be used for the comparison.
679 For floating-point equality comparisons, CCFPEQmode should be used.
680 VOIDmode should be used in all other cases.
682 For integer comparisons against zero, reduce to CCNOmode or CCZmode if
683 possible, to allow for more combinations. */
685 #define SELECT_CC_MODE(OP, X, Y) v850_select_cc_mode (OP, X, Y)
687 /* Tell final.c how to eliminate redundant test instructions. */
689 /* Here we define machine-dependent flags and fields in cc_status
690 (see `conditions.h'). No extra ones are needed for the VAX. */
692 /* Store in cc_status the expressions
693 that the condition codes will describe
694 after execution of an instruction whose pattern is EXP.
695 Do not alter them if the instruction would not alter the cc's. */
697 #define CC_OVERFLOW_UNUSABLE 0x200
698 #define CC_NO_CARRY CC_NO_OVERFLOW
699 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
701 /* Nonzero if access to memory by bytes or half words is no faster
702 than accessing full words. */
703 #define SLOW_BYTE_ACCESS 1
705 /* According expr.c, a value of around 6 should minimize code size, and
706 for the V850 series, that's our primary concern. */
707 #define MOVE_RATIO(speed) 6
709 /* Indirect calls are expensive, never turn a direct call
710 into an indirect call. */
711 #define NO_FUNCTION_CSE
713 /* The four different data regions on the v850. */
722 #define TEXT_SECTION_ASM_OP "\t.section .text"
723 #define DATA_SECTION_ASM_OP "\t.section .data"
724 #define BSS_SECTION_ASM_OP "\t.section .bss"
725 #define SDATA_SECTION_ASM_OP "\t.section .sdata,\"aw\""
726 #define SBSS_SECTION_ASM_OP "\t.section .sbss,\"aw\""
728 #define SCOMMON_ASM_OP "\t.scomm\t"
729 #define ZCOMMON_ASM_OP "\t.zcomm\t"
730 #define TCOMMON_ASM_OP "\t.tcomm\t"
732 #define ASM_COMMENT_START "#"
734 /* Output to assembler file text saying following lines
735 may contain character constants, extra white space, comments, etc. */
737 #define ASM_APP_ON "#APP\n"
739 /* Output to assembler file text saying following lines
740 no longer contain unusual constructs. */
742 #define ASM_APP_OFF "#NO_APP\n"
744 #undef USER_LABEL_PREFIX
745 #define USER_LABEL_PREFIX "_"
747 /* This says how to output the assembler to define a global
748 uninitialized but not common symbol. */
750 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
751 asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
753 #undef ASM_OUTPUT_ALIGNED_BSS
754 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
755 v850_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
757 /* This says how to output the assembler to define a global
758 uninitialized, common symbol. */
759 #undef ASM_OUTPUT_ALIGNED_COMMON
760 #undef ASM_OUTPUT_COMMON
761 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \
762 v850_output_common (FILE, DECL, NAME, SIZE, ALIGN)
764 /* This says how to output the assembler to define a local
765 uninitialized symbol. */
766 #undef ASM_OUTPUT_ALIGNED_LOCAL
767 #undef ASM_OUTPUT_LOCAL
768 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN) \
769 v850_output_local (FILE, DECL, NAME, SIZE, ALIGN)
771 /* Globalizing directive for a label. */
772 #define GLOBAL_ASM_OP "\t.global "
774 #define ASM_PN_FORMAT "%s___%lu"
776 /* This is how we tell the assembler that two symbols have the same value. */
778 #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \
779 do { assemble_name(FILE, NAME1); \
780 fputs(" = ", FILE); \
781 assemble_name(FILE, NAME2); \
782 fputc('\n', FILE); } while (0)
785 /* How to refer to registers in assembler output.
786 This sequence is indexed by compiler's hard-register-number (see above). */
788 #define REGISTER_NAMES \
789 { "r0", "r1", "r2", "sp", "gp", "r5", "r6" , "r7", \
790 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
791 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
792 "r24", "r25", "r26", "r27", "r28", "r29", "ep", "r31", \
796 /* Register numbers */
798 #define ADDITIONAL_REGISTER_NAMES \
799 { { "zero", ZERO_REGNUM }, \
808 /* This is how to output an element of a case-vector that is absolute. */
810 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
811 fprintf (FILE, "\t%s .L%d\n", \
812 (TARGET_BIG_SWITCH ? ".long" : ".short"), VALUE)
814 /* This is how to output an element of a case-vector that is relative. */
816 /* Disable the shift, which is for the currently disabled "switch"
817 opcode. Se casesi in v850.md. */
819 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
820 fprintf (FILE, "\t%s %s.L%d-.L%d%s\n", \
821 (TARGET_BIG_SWITCH ? ".long" : ".short"), \
822 (0 && ! TARGET_BIG_SWITCH && (TARGET_V850E_UP) ? "(" : ""), \
824 (0 && ! TARGET_BIG_SWITCH && (TARGET_V850E_UP) ? ")>>1" : ""))
826 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
828 fprintf (FILE, "\t.align %d\n", (LOG))
830 /* We don't have to worry about dbx compatibility for the v850. */
831 #define DEFAULT_GDB_EXTENSIONS 1
833 /* Use dwarf2 debugging info by default. */
834 #undef PREFERRED_DEBUGGING_TYPE
835 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
837 #define DWARF2_FRAME_INFO 1
838 #define DWARF2_UNWIND_INFO 0
839 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LINK_POINTER_REGNUM)
840 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_POINTER_REGNUM)
842 #ifndef ASM_GENERATE_INTERNAL_LABEL
843 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
844 sprintf (STRING, "*.%s%u", PREFIX, (unsigned int)(NUM))
847 /* Specify the machine mode that this machine uses
848 for the index in the tablejump instruction. */
849 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : HImode)
851 /* Define as C expression which evaluates to nonzero if the tablejump
852 instruction expects the table to contain offsets from the address of the
854 Do not define this if the table should contain absolute addresses. */
855 #define CASE_VECTOR_PC_RELATIVE 1
857 /* The switch instruction requires that the jump table immediately follow
859 #define JUMP_TABLES_IN_TEXT_SECTION (!TARGET_JUMP_TABLES_IN_DATA_SECTION)
861 #undef ASM_OUTPUT_BEFORE_CASE_LABEL
862 #define ASM_OUTPUT_BEFORE_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \
863 ASM_OUTPUT_ALIGN ((FILE), (TARGET_BIG_SWITCH ? 2 : 1));
865 #define WORD_REGISTER_OPERATIONS
867 /* Byte and short loads sign extend the value to a word. */
868 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
870 /* Max number of bytes we can move from memory to memory
871 in one reasonably fast instruction. */
874 /* Define if shifts truncate the shift count
875 which implies one can omit a sign-extension or zero-extension
877 #define SHIFT_COUNT_TRUNCATED 1
879 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
880 is done just by pretending it is already truncated. */
881 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
883 /* Specify the machine mode that pointers have.
884 After generation of rtl, the compiler makes no further distinction
885 between pointers and any other objects of this machine mode. */
888 /* A function address in a call instruction
889 is a byte address (for indexing purposes)
890 so give the MEM rtx a byte's mode. */
891 #define FUNCTION_MODE QImode
893 /* Tell compiler we want to support GHS pragmas */
894 #define REGISTER_TARGET_PRAGMAS() do { \
895 c_register_pragma ("ghs", "interrupt", ghs_pragma_interrupt); \
896 c_register_pragma ("ghs", "section", ghs_pragma_section); \
897 c_register_pragma ("ghs", "starttda", ghs_pragma_starttda); \
898 c_register_pragma ("ghs", "startsda", ghs_pragma_startsda); \
899 c_register_pragma ("ghs", "startzda", ghs_pragma_startzda); \
900 c_register_pragma ("ghs", "endtda", ghs_pragma_endtda); \
901 c_register_pragma ("ghs", "endsda", ghs_pragma_endsda); \
902 c_register_pragma ("ghs", "endzda", ghs_pragma_endzda); \
905 /* enum GHS_SECTION_KIND is an enumeration of the kinds of sections that
906 can appear in the "ghs section" pragma. These names are used to index
907 into the GHS_default_section_names[] and GHS_current_section_names[]
908 that are defined in v850.c, and so the ordering of each must remain
911 These arrays give the default and current names for each kind of
912 section defined by the GHS pragmas. The current names can be changed
913 by the "ghs section" pragma. If the current names are null, use
914 the default names. Note that the two arrays have different types.
916 For the *normal* section kinds (like .data, .text, etc.) we do not
917 want to explicitly force the name of these sections, but would rather
918 let the linker (or at least the back end) choose the name of the
919 section, UNLESS the user has forced a specific name for these section
920 kinds. To accomplish this set the name in ghs_default_section_names
923 enum GHS_section_kind
925 GHS_SECTION_KIND_DEFAULT
,
927 GHS_SECTION_KIND_TEXT
,
928 GHS_SECTION_KIND_DATA
,
929 GHS_SECTION_KIND_RODATA
,
930 GHS_SECTION_KIND_BSS
,
931 GHS_SECTION_KIND_SDATA
,
932 GHS_SECTION_KIND_ROSDATA
,
933 GHS_SECTION_KIND_TDATA
,
934 GHS_SECTION_KIND_ZDATA
,
935 GHS_SECTION_KIND_ROZDATA
,
937 COUNT_OF_GHS_SECTION_KINDS
/* must be last */
940 /* The following code is for handling pragmas supported by the
941 v850 compiler produced by Green Hills Software. This is at
942 the specific request of a customer. */
944 typedef struct data_area_stack_element
946 struct data_area_stack_element
* prev
;
947 v850_data_area data_area
; /* Current default data area. */
948 } data_area_stack_element
;
950 /* Track the current data area set by the
951 data area pragma (which can be nested). */
952 extern data_area_stack_element
* data_area_stack
;
954 /* Names of the various data areas used on the v850. */
955 extern const char * GHS_default_section_names
[(int) COUNT_OF_GHS_SECTION_KINDS
];
956 extern const char * GHS_current_section_names
[(int) COUNT_OF_GHS_SECTION_KINDS
];
958 /* The assembler op to start the file. */
960 #define FILE_ASM_OP "\t.file\n"
962 /* Implement ZDA, TDA, and SDA */
964 #define EP_REGNUM 30 /* ep register number */
966 #define SYMBOL_FLAG_ZDA (SYMBOL_FLAG_MACH_DEP << 0)
967 #define SYMBOL_FLAG_TDA (SYMBOL_FLAG_MACH_DEP << 1)
968 #define SYMBOL_FLAG_SDA (SYMBOL_FLAG_MACH_DEP << 2)
969 #define SYMBOL_REF_ZDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ZDA) != 0)
970 #define SYMBOL_REF_TDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_TDA) != 0)
971 #define SYMBOL_REF_SDA_P(X) ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_SDA) != 0)
973 #define TARGET_ASM_INIT_SECTIONS v850_asm_init_sections
975 /* Define this so that the cc1plus will not think that system header files
976 need an implicit 'extern "C" { ... }' assumed. This breaks testing C++
977 in a build directory where the libstdc++ header files are found via a
978 -isystem <path-to-build-dir>. */
979 #define NO_IMPLICIT_EXTERN_C
981 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
982 ((LENGTH) = v850_adjust_insn_length ((INSN), (LENGTH)))
984 #endif /* ! GCC_V850_H */