1 /* Definitions of target machine for GNU compiler, for Sun SPARC.
2 Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@cygnus.com).
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* Note that some other tm.h files include this one and then override
22 many of the definitions that relate to assembler syntax. */
24 #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} %{g:-lg}"
26 /* Provide required defaults for linker -e and -d switches. */
29 "%{nostdlib:%{!e*:-e start}} -dc -dp %{static:-Bstatic} %{assert*}"
31 /* Special flags to the Sun-4 assembler when using pipe for input. */
33 #define ASM_SPEC " %{pipe:-} %{fpic:-k} %{fPIC:-k}"
35 /* Prevent error on `-sun4' and `-target sun4' options. */
36 /* This used to translate -dalign to -malign, but that is no good
37 because it can't turn off the usual meaning of making debugging dumps. */
39 #define CC1_SPEC "%{sun4:} %{target:}"
41 #define PTRDIFF_TYPE "int"
42 #define SIZE_TYPE "int"
43 #define WCHAR_TYPE "short unsigned int"
44 #define WCHAR_TYPE_SIZE 16
46 /* Omit frame pointer at high optimization levels. */
48 #define OPTIMIZATION_OPTIONS(OPTIMIZE) \
52 flag_omit_frame_pointer = 1; \
56 /* These compiler options take an argument. We ignore -target for now. */
58 #define WORD_SWITCH_TAKES_ARG(STR) \
59 (!strcmp (STR, "Tdata") || !strcmp (STR, "include") \
60 || !strcmp (STR, "imacros") || !strcmp (STR, "target") \
61 || !strcmp (STR, "assert") || !strcmp (STR, "aux-info"))
63 /* Names to predefine in the preprocessor for this target machine. */
65 #define CPP_PREDEFINES "-Dsparc -Dsun -Dunix"
67 /* Print subsidiary information on the compiler version in use. */
69 #define TARGET_VERSION fprintf (stderr, " (sparc)");
71 /* Generate DBX debugging information. */
73 #define DBX_DEBUGGING_INFO
75 /* Run-time compilation parameters selecting different hardware subsets. */
77 extern int target_flags
;
79 /* Nonzero if we should generate code to use the fpu. */
80 #define TARGET_FPU (target_flags & 1)
82 /* Nonzero if we should use FUNCTION_EPILOGUE. Otherwise, we
83 use fast return insns, but lose some generality. */
84 #define TARGET_EPILOGUE (target_flags & 2)
86 /* Nonzero means that reference doublewords as if they were guaranteed
87 to be aligned...if they aren't, too bad for the user!
88 Like -dalign in Sun cc. */
89 #define TARGET_HOPE_ALIGN (target_flags & 16)
91 /* Nonzero means make sure all doubles are on 8-byte boundaries.
92 This option results in a calling convention that is incompatible with
93 every other sparc compiler in the world, and thus should only ever be
94 used for experimenting. Also, varargs won't work with it, but it doesn't
95 seem worth trying to fix. */
96 #define TARGET_FORCE_ALIGN (target_flags & 32)
98 /* Macro to define tables used to set the flags.
99 This is a list in braces of pairs in braces,
100 each pair being { "NAME", VALUE }
101 where VALUE is the bits to set or minus the bits to clear.
102 An empty string NAME is used to identify the default VALUE. */
104 #define TARGET_SWITCHES \
106 {"soft-float", -1}, \
108 {"no-epilogue", -2}, \
109 {"hope-align", 16}, \
110 {"force-align", 48}, \
111 { "", TARGET_DEFAULT}}
113 #define TARGET_DEFAULT 3
115 /* target machine storage layout */
117 /* Define this if most significant bit is lowest numbered
118 in instructions that operate on numbered bit-fields. */
119 #define BITS_BIG_ENDIAN 1
121 /* Define this if most significant byte of a word is the lowest numbered. */
122 /* This is true on the SPARC. */
123 #define BYTES_BIG_ENDIAN 1
125 /* Define this if most significant word of a multiword number is the lowest
127 /* Doubles are stored in memory with the high order word first. This
128 matters when cross-compiling. */
129 #define WORDS_BIG_ENDIAN 1
131 /* number of bits in an addressable storage unit */
132 #define BITS_PER_UNIT 8
134 /* Width in bits of a "word", which is the contents of a machine register.
135 Note that this is not necessarily the width of data type `int';
136 if using 16-bit ints on a 68000, this would still be 32.
137 But on a machine with 16-bit registers, this would be 16. */
138 #define BITS_PER_WORD 32
139 #define MAX_BITS_PER_WORD 32
141 /* Width of a word, in units (bytes). */
142 #define UNITS_PER_WORD 4
144 /* Width in bits of a pointer.
145 See also the macro `Pmode' defined below. */
146 #define POINTER_SIZE 32
148 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
149 #define PARM_BOUNDARY 32
151 /* Boundary (in *bits*) on which stack pointer should be aligned. */
152 #define STACK_BOUNDARY 64
154 /* Allocation boundary (in *bits*) for the code of a function. */
155 #define FUNCTION_BOUNDARY 32
157 /* Alignment of field after `int : 0' in a structure. */
158 #define EMPTY_FIELD_BOUNDARY 32
160 /* Every structure's size must be a multiple of this. */
161 #define STRUCTURE_SIZE_BOUNDARY 8
163 /* A bitfield declared as `int' forces `int' alignment for the struct. */
164 #define PCC_BITFIELD_TYPE_MATTERS 1
166 /* No data type wants to be aligned rounder than this. */
167 #define BIGGEST_ALIGNMENT 64
169 /* Make strings word-aligned so strcpy from constants will be faster. */
170 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
171 (TREE_CODE (EXP) == STRING_CST \
172 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
174 /* Make arrays of chars word-aligned for the same reasons. */
175 #define DATA_ALIGNMENT(TYPE, ALIGN) \
176 (TREE_CODE (TYPE) == ARRAY_TYPE \
177 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
178 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
180 /* Set this nonzero if move instructions will actually fail to work
181 when given unaligned data. */
182 #define STRICT_ALIGNMENT 1
184 /* Things that must be doubleword aligned cannot go in the text section,
185 because the linker fails to align the text section enough!
186 Put them in the data section. */
187 #define MAX_TEXT_ALIGN 32
189 #define SELECT_SECTION(T,RELOC) \
191 if (TREE_CODE (T) == VAR_DECL) \
193 if (TREE_READONLY (T) && ! TREE_SIDE_EFFECTS (T) \
194 && DECL_ALIGN (T) <= MAX_TEXT_ALIGN \
195 && ! (flag_pic && (RELOC))) \
200 else if (TREE_CODE (T) == CONSTRUCTOR) \
202 if (flag_pic != 0 && (RELOC) != 0) \
205 else if (*tree_code_type[(int) TREE_CODE (T)] == 'c') \
207 if ((TREE_CODE (T) == STRING_CST && flag_writable_strings) \
208 || TYPE_ALIGN (TREE_TYPE (T)) > MAX_TEXT_ALIGN) \
215 /* Use text section for a constant
216 unless we need more alignment than that offers. */
217 #define SELECT_RTX_SECTION(MODE, X) \
219 if (GET_MODE_BITSIZE (MODE) <= MAX_TEXT_ALIGN \
220 && ! (flag_pic && symbolic_operand (X))) \
226 /* Standard register usage. */
228 /* Number of actual hardware registers.
229 The hardware registers are assigned numbers for the compiler
230 from 0 to just below FIRST_PSEUDO_REGISTER.
231 All registers that the compiler knows about must be given numbers,
232 even those that are not normally considered general registers.
234 SPARC has 32 integer registers and 32 floating point registers. */
236 #define FIRST_PSEUDO_REGISTER 64
238 /* 1 for registers that have pervasive standard uses
239 and are not available for the register allocator.
240 0 is used for the condition code and not to represent %g0, which is
241 hardwired to 0, so reg 0 is *not* fixed.
242 2 and 3 are free to use as temporaries.
243 4 through 7 are expected to become usefully defined in the future.
244 Your milage may vary. */
245 #define FIXED_REGISTERS \
246 {0, 0, 0, 0, 1, 1, 1, 1, \
247 0, 0, 0, 0, 0, 0, 1, 0, \
248 0, 0, 0, 0, 0, 0, 0, 0, \
249 0, 0, 0, 0, 0, 0, 1, 1, \
251 0, 0, 0, 0, 0, 0, 0, 0, \
252 0, 0, 0, 0, 0, 0, 0, 0, \
253 0, 0, 0, 0, 0, 0, 0, 0, \
254 0, 0, 0, 0, 0, 0, 0, 0}
256 /* 1 for registers not available across function calls.
257 These must include the FIXED_REGISTERS and also any
258 registers that can be used without being saved.
259 The latter must include the registers where values are returned
260 and the register where structure-value addresses are passed.
261 Aside from that, you can include as many other registers as you like. */
262 #define CALL_USED_REGISTERS \
263 {1, 1, 1, 1, 1, 1, 1, 1, \
264 1, 1, 1, 1, 1, 1, 1, 1, \
265 0, 0, 0, 0, 0, 0, 0, 0, \
266 0, 0, 0, 0, 0, 0, 1, 1, \
268 1, 1, 1, 1, 1, 1, 1, 1, \
269 1, 1, 1, 1, 1, 1, 1, 1, \
270 1, 1, 1, 1, 1, 1, 1, 1, \
271 1, 1, 1, 1, 1, 1, 1, 1}
273 /* Return number of consecutive hard regs needed starting at reg REGNO
274 to hold something of mode MODE.
275 This is ordinarily the length in words of a value of mode MODE
276 but can be less for certain modes in special long registers.
278 On SPARC, ordinary registers hold 32 bits worth;
279 this means both integer and floating point registers.
281 We use vectors to keep this information about registers. */
283 /* How many hard registers it takes to make a register of this mode. */
284 extern int hard_regno_nregs
[];
286 #define HARD_REGNO_NREGS(REGNO, MODE) \
287 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
289 /* Value is 1 if register/mode pair is acceptable on sparc. */
290 extern int hard_regno_mode_ok
[FIRST_PSEUDO_REGISTER
];
292 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
293 On SPARC, the cpu registers can hold any mode but the float registers
294 can only hold SFmode or DFmode. See sparc.c for how we
296 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
297 ((hard_regno_mode_ok[REGNO] & (1<<(int)(MODE))) != 0)
299 /* Value is 1 if it is a good idea to tie two pseudo registers
300 when one has mode MODE1 and one has mode MODE2.
301 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
302 for any hard reg, then this must be 0 for correct output. */
303 #define MODES_TIEABLE_P(MODE1, MODE2) \
304 ((MODE1) == (MODE2) || GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
306 /* Specify the registers used for certain standard purposes.
307 The values of these macros are register numbers. */
309 /* SPARC pc isn't overloaded on a register that the compiler knows about. */
310 /* #define PC_REGNUM */
312 /* Register to use for pushing function arguments. */
313 #define STACK_POINTER_REGNUM 14
315 /* Actual top-of-stack address is 92 greater than the contents
316 of the stack pointer register. 92 = 68 + 24. 64 bytes reserving space
317 for the ins and local registers, 4 byte for structure return address, and
318 24 bytes for the 6 register parameters. */
319 #define STACK_POINTER_OFFSET FIRST_PARM_OFFSET(0)
321 /* Base register for access to local variables of the function. */
322 #define FRAME_POINTER_REGNUM 30
325 /* Register that is used for the return address. */
326 #define RETURN_ADDR_REGNUM 15
329 /* Value should be nonzero if functions must have frame pointers.
330 Zero means the frame pointer need not be set up (and parms
331 may be accessed via the stack pointer) in functions that seem suitable.
332 This is computed in `reload', in reload1.c.
334 Used in flow.c, global-alloc.c, and reload1.c. */
335 extern int leaf_function
;
337 #define FRAME_POINTER_REQUIRED \
338 (! (leaf_function_p () && only_leaf_regs_used ()))
340 /* C statement to store the difference between the frame pointer
341 and the stack pointer values immediately after the function prologue.
343 Note, we always pretend that this is a leaf function because if
344 it's not, there's no point in trying to eliminate the
345 frame pointer. If it is a leaf function, we guessed right! */
346 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
347 do { (VAR) = compute_frame_size (get_frame_size (), 1); } while (0)
349 /* Base register for access to arguments of the function. */
350 #define ARG_POINTER_REGNUM 30
352 /* Register in which static-chain is passed to a function. */
354 #define STATIC_CHAIN_REGNUM 1
356 /* Register which holds offset table for position-independent
359 #define PIC_OFFSET_TABLE_REGNUM 23
361 #define INITIALIZE_PIC initialize_pic ()
362 #define FINALIZE_PIC finalize_pic ()
364 /* Functions which return large structures get the address
365 to place the wanted value at offset 64 from the frame.
366 Must reserve 64 bytes for the in and local registers. */
367 /* Used only in other #defines in this file. */
368 #define STRUCT_VALUE_OFFSET 64
370 #define STRUCT_VALUE \
371 gen_rtx (MEM, Pmode, \
372 gen_rtx (PLUS, Pmode, stack_pointer_rtx, \
373 gen_rtx (CONST_INT, VOIDmode, STRUCT_VALUE_OFFSET)))
374 #define STRUCT_VALUE_INCOMING \
375 gen_rtx (MEM, Pmode, \
376 gen_rtx (PLUS, Pmode, frame_pointer_rtx, \
377 gen_rtx (CONST_INT, VOIDmode, STRUCT_VALUE_OFFSET)))
379 /* Define the classes of registers for register constraints in the
380 machine description. Also define ranges of constants.
382 One of the classes must always be named ALL_REGS and include all hard regs.
383 If there is more than one class, another class must be named NO_REGS
384 and contain no registers.
386 The name GENERAL_REGS must be the name of a class (or an alias for
387 another name such as ALL_REGS). This is the class of registers
388 that is allowed by "g" or "r" in a register constraint.
389 Also, registers outside this class are allocated only when
390 instructions express preferences for them.
392 The classes must be numbered in nondecreasing order; that is,
393 a larger-numbered class must never be contained completely
394 in a smaller-numbered class.
396 For any two classes, it is very desirable that there be another
397 class that represents their union. */
399 /* The SPARC has two kinds of registers, general and floating point. */
401 enum reg_class
{ NO_REGS
, GENERAL_REGS
, FP_REGS
, ALL_REGS
, LIM_REG_CLASSES
};
403 #define N_REG_CLASSES (int) LIM_REG_CLASSES
405 /* Give names of register classes as strings for dump file. */
407 #define REG_CLASS_NAMES \
408 {"NO_REGS", "GENERAL_REGS", "FP_REGS", "ALL_REGS" }
410 /* Define which registers fit in which classes.
411 This is an initializer for a vector of HARD_REG_SET
412 of length N_REG_CLASSES. */
414 #if 0 && defined (__GNUC__)
415 #define REG_CLASS_CONTENTS {0LL, 0xfffffffeLL, 0xffffffff00000000LL, 0xfffffffffffffffeLL}
417 #define REG_CLASS_CONTENTS {{0, 0}, {-2, 0}, {0, -1}, {-2, -1}}
420 /* The same information, inverted:
421 Return the class number of the smallest class containing
422 reg number REGNO. This could be a conditional expression
423 or could index an array. */
425 #define REGNO_REG_CLASS(REGNO) \
426 ((REGNO) >= 32 ? FP_REGS : (REGNO) == 0 ? NO_REGS : GENERAL_REGS)
428 /* This is the order in which to allocate registers
430 #define REG_ALLOC_ORDER \
431 { 8, 9, 10, 11, 12, 13, 2, 3, \
432 15, 16, 17, 18, 19, 20, 21, 22, \
433 23, 24, 25, 26, 27, 28, 29, 31, \
434 32, 33, 34, 35, 36, 37, 38, 39, \
435 40, 41, 42, 43, 44, 45, 46, 47, \
436 48, 49, 50, 51, 52, 53, 54, 55, \
437 56, 57, 58, 59, 60, 61, 62, 63, \
438 1, 4, 5, 6, 7, 0, 14, 30}
440 /* This is the order in which to allocate registers for
441 leaf functions. If all registers can fit in the "i" registers,
442 then we have the possibility of having a leaf function. */
443 #define REG_LEAF_ALLOC_ORDER \
444 { 2, 3, 24, 25, 26, 27, 28, 29, \
445 15, 8, 9, 10, 11, 12, 13, \
446 16, 17, 18, 19, 20, 21, 22, 23, \
447 32, 33, 34, 35, 36, 37, 38, 39, \
448 40, 41, 42, 43, 44, 45, 46, 47, \
449 48, 49, 50, 51, 52, 53, 54, 55, \
450 56, 57, 58, 59, 60, 61, 62, 63, \
451 1, 4, 5, 6, 7, 0, 14, 30, 31}
453 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
455 #define LEAF_REGISTERS \
456 { 1, 1, 1, 1, 1, 1, 1, 1, \
457 0, 0, 0, 0, 0, 0, 1, 0, \
458 0, 0, 0, 0, 0, 0, 0, 0, \
459 1, 1, 1, 1, 1, 1, 0, 1, \
460 1, 1, 1, 1, 1, 1, 1, 1, \
461 1, 1, 1, 1, 1, 1, 1, 1, \
462 1, 1, 1, 1, 1, 1, 1, 1, \
463 1, 1, 1, 1, 1, 1, 1, 1}
465 extern char leaf_reg_remap
[];
466 #define LEAF_REG_REMAP(REGNO) (leaf_reg_remap[REGNO])
467 extern char leaf_reg_backmap
[];
468 #define LEAF_REG_BACKMAP(REGNO) (leaf_reg_backmap[REGNO])
470 #define REG_USED_SO_FAR(REGNO) \
471 ((REGNO) >= 24 && (REGNO) < 30 \
472 ? (regs_ever_live[24] \
473 || regs_ever_live[25] \
474 || regs_ever_live[26] \
475 || regs_ever_live[27] \
476 || regs_ever_live[28] \
477 || regs_ever_live[29]) : 0)
479 /* The class value for index registers, and the one for base regs. */
480 #define INDEX_REG_CLASS GENERAL_REGS
481 #define BASE_REG_CLASS GENERAL_REGS
483 /* Get reg_class from a letter such as appears in the machine description. */
485 #define REG_CLASS_FROM_LETTER(C) \
486 ((C) == 'f' ? FP_REGS : (C) == 'r' ? GENERAL_REGS : NO_REGS)
488 /* The letters I, J, K, L and M in a register constraint string
489 can be used to stand for particular ranges of immediate operands.
490 This macro defines what the ranges are.
491 C is the letter, and VALUE is a constant value.
492 Return 1 if VALUE is in the range specified by C.
494 For SPARC, `I' is used for the range of constants an insn
495 can actually contain.
496 `J' is used for the range which is just zero (since that is R0).
497 `K' is used for the 5-bit operand of a compare insns. */
499 #define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x1000) < 0x2000)
501 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
502 ((C) == 'I' ? (unsigned) ((VALUE) + 0x1000) < 0x2000 \
503 : (C) == 'J' ? (VALUE) == 0 \
504 : (C) == 'K' ? ((VALUE) & 0x3ff) == 0 \
507 /* Similar, but for floating constants, and defining letters G and H.
508 Here VALUE is the CONST_DOUBLE rtx itself. */
510 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
511 ((C) == 'G' ? CONST_DOUBLE_HIGH (VALUE) == 0 \
512 && CONST_DOUBLE_LOW (VALUE) == 0 \
513 : (C) == 'H' ? arith_double_operand (VALUE, DImode) \
516 /* Given an rtx X being reloaded into a reg required to be
517 in class CLASS, return the class of reg to actually use.
518 In general this is just CLASS; but on some machines
519 in some cases it is preferable to use a more restrictive class. */
520 #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
522 /* Return the register class of a scratch register needed to load IN into
523 a register of class CLASS in MODE.
525 On the SPARC, when PIC, we need a temporary when loading some addresses
528 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
529 (flag_pic && pic_address_needs_scratch (IN) ? GENERAL_REGS : NO_REGS)
531 /* Return the maximum number of consecutive registers
532 needed to represent mode MODE in a register of class CLASS. */
533 /* On SPARC, this is the size of MODE in words. */
534 #define CLASS_MAX_NREGS(CLASS, MODE) \
535 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
537 /* Stack layout; function entry, exit and calling. */
539 /* Define the number of register that can hold parameters.
540 These two macros are used only in other macro definitions below. */
543 /* Define this if pushing a word on the stack
544 makes the stack pointer a smaller address. */
545 #define STACK_GROWS_DOWNWARD
547 /* Define this if the nominal address of the stack frame
548 is at the high-address end of the local variables;
549 that is, each additional local variable allocated
550 goes at a more negative offset in the frame. */
551 #define FRAME_GROWS_DOWNWARD
553 /* Offset within stack frame to start allocating local variables at.
554 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
555 first local allocated. Otherwise, it is the offset to the BEGINNING
556 of the first local allocated. */
557 #define STARTING_FRAME_OFFSET (-16)
559 /* If we generate an insn to push BYTES bytes,
560 this says how many the stack pointer really advances by.
561 On SPARC, don't define this because there are no push insns. */
562 /* #define PUSH_ROUNDING(BYTES) */
564 /* Offset of first parameter from the argument pointer register value.
565 This is 64 for the ins and locals, plus 4 for the struct-return reg
566 even if this function isn't going to use it.
567 If TARGET_FORCE_ALIGN, we must reserve 4 more bytes to ensure that the
568 stack remains aligned. */
569 #define FIRST_PARM_OFFSET(FNDECL) \
570 (STRUCT_VALUE_OFFSET + UNITS_PER_WORD + (TARGET_FORCE_ALIGN ? 4 : 0))
572 /* When a parameter is passed in a register, stack space is still
574 #define REG_PARM_STACK_SPACE(DECL) (NPARM_REGS * UNITS_PER_WORD)
576 /* Keep the stack pointer constant throughout the function.
577 This is both an optimization and a necessity: longjmp
578 doesn't behave itself when the stack pointer moves within
580 #define ACCUMULATE_OUTGOING_ARGS
582 /* Value is the number of bytes of arguments automatically
583 popped when returning from a subroutine call.
584 FUNTYPE is the data type of the function (as a tree),
585 or for a library call it is an identifier node for the subroutine name.
586 SIZE is the number of bytes of arguments passed on the stack. */
588 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
590 /* Some subroutine macros specific to this machine. */
591 #define BASE_RETURN_VALUE_REG(MODE) \
592 ((MODE) == SFmode || (MODE) == DFmode ? 32 : 8)
593 #define BASE_OUTGOING_VALUE_REG(MODE) \
594 ((MODE) == SFmode || (MODE) == DFmode ? 32 : 24)
595 #define BASE_PASSING_ARG_REG(MODE) (8)
596 #define BASE_INCOMING_ARG_REG(MODE) (24)
598 /* Define how to find the value returned by a function.
599 VALTYPE is the data type of the value (as a tree).
600 If the precise function being called is known, FUNC is its FUNCTION_DECL;
601 otherwise, FUNC is 0. */
603 /* On SPARC the value is found in the first "output" register. */
605 #define FUNCTION_VALUE(VALTYPE, FUNC) \
606 gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG (TYPE_MODE (VALTYPE)))
608 /* But the called function leaves it in the first "input" register. */
610 #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
611 gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_OUTGOING_VALUE_REG (TYPE_MODE (VALTYPE)))
613 /* Define how to find the value returned by a library function
614 assuming the value has mode MODE. */
616 #define LIBCALL_VALUE(MODE) \
617 gen_rtx (REG, MODE, BASE_RETURN_VALUE_REG (MODE))
619 /* 1 if N is a possible register number for a function value
620 as seen by the caller.
621 On SPARC, the first "output" reg is used for integer values,
622 and the first floating point register is used for floating point values. */
624 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 8 || (N) == 32)
626 /* 1 if N is a possible register number for function argument passing.
627 On SPARC, these are the "output" registers. */
629 #define FUNCTION_ARG_REGNO_P(N) ((N) < 14 && (N) > 7)
631 /* Define a data type for recording info about an argument list
632 during the scan of that argument list. This data type should
633 hold all necessary information about the function itself
634 and about the args processed so far, enough to enable macros
635 such as FUNCTION_ARG to determine where the next arg should go.
637 On SPARC, this is a single integer, which is a number of words
638 of arguments scanned so far (including the invisible argument,
639 if any, which holds the structure-value-address).
640 Thus 7 or more means all following args should go on the stack. */
642 #define CUMULATIVE_ARGS int
644 #define ROUND_ADVANCE(SIZE) \
645 ((SIZE + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
647 /* Round a register number up to a proper boundary for an arg of mode MODE.
648 Note that we need an odd/even pair for a two-word arg,
649 since that will become 8-byte aligned when stored in memory. */
650 #define ROUND_REG(X, MODE) \
651 (TARGET_FORCE_ALIGN && GET_MODE_UNIT_SIZE ((MODE)) > 4 \
652 ? ((X) + ! ((X) & 1)) : (X))
654 /* Initialize a variable CUM of type CUMULATIVE_ARGS
655 for a call to a function whose data type is FNTYPE.
656 For a library call, FNTYPE is 0.
658 On SPARC, the offset always starts at 0: the first parm reg is always
661 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) ((CUM) = 0)
663 /* Update the data in CUM to advance over an argument
664 of mode MODE and data type TYPE.
665 (TYPE is null for libcalls where that information may not be available.) */
667 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
668 ((CUM) = (ROUND_REG ((CUM), (MODE)) \
669 + ((MODE) != BLKmode \
670 ? ROUND_ADVANCE (GET_MODE_SIZE (MODE)) \
671 : ROUND_ADVANCE (int_size_in_bytes (TYPE)))))
673 /* Determine where to put an argument to a function.
674 Value is zero to push the argument on the stack,
675 or a hard register in which to store the argument.
677 MODE is the argument's machine mode.
678 TYPE is the data type of the argument (as a tree).
679 This is null for libcalls where that information may
681 CUM is a variable of type CUMULATIVE_ARGS which gives info about
682 the preceding args and about the function being called.
683 NAMED is nonzero if this argument is a named parameter
684 (otherwise it is an extra parameter matching an ellipsis). */
686 /* On SPARC the first six args are normally in registers
687 and the rest are pushed. Any arg that starts within the first 6 words
688 is at least partially passed in a register unless its data type forbids. */
690 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
691 (ROUND_REG ((CUM), (MODE)) < NPARM_REGS \
692 && ((TYPE)==0 || ! TREE_ADDRESSABLE ((tree)(TYPE))) \
693 && ((TYPE)==0 || (MODE) != BLKmode \
694 || (TYPE_ALIGN ((TYPE)) % PARM_BOUNDARY == 0)) \
695 ? gen_rtx (REG, (MODE), \
696 (BASE_PASSING_ARG_REG (MODE) + ROUND_REG ((CUM), (MODE)))) \
699 /* Define where a function finds its arguments.
700 This is different from FUNCTION_ARG because of register windows. */
702 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
703 (ROUND_REG ((CUM), (MODE)) < NPARM_REGS \
704 && ((TYPE)==0 || ! TREE_ADDRESSABLE ((tree)(TYPE))) \
705 && ((TYPE)==0 || (MODE) != BLKmode \
706 || (TYPE_ALIGN ((TYPE)) % PARM_BOUNDARY == 0)) \
707 ? gen_rtx (REG, (MODE), \
708 (BASE_INCOMING_ARG_REG (MODE) + ROUND_REG ((CUM), (MODE)))) \
711 /* For an arg passed partly in registers and partly in memory,
712 this is the number of registers used.
713 For args passed entirely in registers or entirely in memory, zero.
714 Any arg that starts in the first 6 regs but won't entirely fit in them
715 needs partial registers on the Sparc. */
717 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
718 ((ROUND_REG ((CUM), (MODE)) < NPARM_REGS \
719 && ((TYPE)==0 || ! TREE_ADDRESSABLE ((tree)(TYPE))) \
720 && ((TYPE)==0 || (MODE) != BLKmode \
721 || (TYPE_ALIGN ((TYPE)) % PARM_BOUNDARY == 0)) \
722 && (ROUND_REG ((CUM), (MODE)) \
723 + ((MODE) == BLKmode \
724 ? ROUND_ADVANCE (int_size_in_bytes (TYPE)) \
725 : ROUND_ADVANCE (GET_MODE_SIZE (MODE)))) - NPARM_REGS > 0) \
726 ? (NPARM_REGS - ROUND_REG ((CUM), (MODE))) \
729 /* The SPARC ABI stipulates passing struct arguments (of any size)
730 by invisible reference. */
731 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
732 (TYPE && (TREE_CODE (TYPE) == RECORD_TYPE || TREE_CODE (TYPE) == UNION_TYPE))
734 /* If defined, a C expression that gives the alignment boundary, in
735 bits, of an argument with the specified mode and type. If it is
736 not defined, `PARM_BOUNDARY' is used for all arguments.
738 This definition does nothing special unless TARGET_FORCE_ALIGN;
739 in that case, it aligns each arg to the natural boundary. */
741 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
742 (! TARGET_FORCE_ALIGN \
745 ? (TYPE_ALIGN (TYPE) <= PARM_BOUNDARY \
747 : TYPE_ALIGN (TYPE)) \
748 : (GET_MODE_ALIGNMENT (MODE) <= PARM_BOUNDARY \
750 : GET_MODE_ALIGNMENT (MODE))))
752 /* Define the information needed to generate branch and scc insns. This is
753 stored from the compare operation. Note that we can't use "rtx" here
754 since it hasn't been defined! */
756 extern struct rtx_def
*sparc_compare_op0
, *sparc_compare_op1
;
758 /* Define the function that build the compare insn for scc and bcc. */
760 extern struct rtx_def
*gen_compare_reg ();
762 /* Generate the special assembly code needed to tell the assembler whatever
763 it might need to know about the return value of a function.
765 For Sparc assemblers, we need to output a .proc pseudo-op which conveys
766 information to the assembler relating to peephole optimization (done in
769 #define ASM_DECLARE_RESULT(FILE, RESULT) \
770 fprintf ((FILE), "\t.proc\t0%o\n", sparc_type_code (TREE_TYPE (RESULT)))
772 /* Output the label for a function definition. */
774 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
776 ASM_DECLARE_RESULT (FILE, DECL_RESULT (DECL)); \
777 ASM_OUTPUT_LABEL (FILE, NAME); \
780 /* Two views of the size of the current frame. */
781 extern int actual_fsize
;
782 extern int apparent_fsize
;
784 /* This macro generates the assembly code for function entry.
785 FILE is a stdio stream to output the code to.
786 SIZE is an int: how many units of temporary storage to allocate.
787 Refer to the array `regs_ever_live' to determine which registers
788 to save; `regs_ever_live[I]' is nonzero if register number I
789 is ever used in the function. This macro is responsible for
790 knowing which registers should not be saved even if used. */
792 /* On SPARC, move-double insns between fpu and cpu need an 8-byte block
793 of memory. If any fpu reg is used in the function, we allocate
794 such a block here, at the bottom of the frame, just in case it's needed.
796 If this function is a leaf procedure, then we may choose not
797 to do a "save" insn. The decision about whether or not
798 to do this is made in regclass.c. */
800 #define FUNCTION_PROLOGUE(FILE, SIZE) \
801 output_function_prologue (FILE, SIZE, leaf_function)
803 /* Output assembler code to FILE to increment profiler label # LABELNO
804 for profiling a function entry. */
806 #define FUNCTION_PROFILER(FILE, LABELNO) \
807 fprintf (FILE, "\tsethi %%hi(LP%d),%%o0\n\tcall mcount\n\tor %%lo(LP%d),%%o0,%%o0\n", \
808 (LABELNO), (LABELNO))
810 /* Output assembler code to FILE to initialize this source file's
811 basic block profiling info, if that has not already been done. */
813 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
814 fprintf (FILE, "\tsethi %%hi(LPBX0),%%o0\n\tld [%%lo(LPBX0)+%%o0],%%o1\n\ttst %%o1\n\tbne LPY%d\n\tadd %%o0,%%lo(LPBX0),%%o0\n\tcall ___bb_init_func\n\tnop\nLPY%d:\n", \
815 (LABELNO), (LABELNO))
817 /* Output assembler code to FILE to increment the entry-count for
818 the BLOCKNO'th basic block in this source file. */
820 #define BLOCK_PROFILER(FILE, BLOCKNO) \
822 int blockn = (BLOCKNO); \
823 fprintf (FILE, "\tsethi %%hi(LPBX2+%d),%%g1\n\tld [%%lo(LPBX2+%d)+%%g1],%%g2\n\
824 \tadd %%g2,1,%%g2\n\tst %%g2,[%%lo(LPBX2+%d)+%%g1]\n", \
825 4 * blockn, 4 * blockn, 4 * blockn); \
828 /* Output rtl to increment the entry-count for the LABELNO'th instrumented
829 arc in this source file. */
831 #define ARC_PROFILER(ARCNO, INSERT_AFTER) \
832 output_arc_profiler (ARCNO, INSERT_AFTER)
834 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
835 the stack pointer does not matter. The value is tested only in
836 functions that have frame pointers.
837 No definition is equivalent to always zero. */
839 extern int current_function_calls_alloca
;
840 extern int current_function_outgoing_args_size
;
842 #define EXIT_IGNORE_STACK \
843 (get_frame_size () != 0 \
844 || current_function_calls_alloca || current_function_outgoing_args_size)
846 /* This macro generates the assembly code for function exit,
847 on machines that need it. If FUNCTION_EPILOGUE is not defined
848 then individual return instructions are generated for each
849 return statement. Args are same as for FUNCTION_PROLOGUE.
851 The function epilogue should not depend on the current stack pointer!
852 It should use the frame pointer only. This is mandatory because
853 of alloca; we also take advantage of it to omit stack adjustments
856 /* This declaration is needed due to traditional/ANSI
857 incompatibilities which cannot be #ifdefed away
858 because they occur inside of macros. Sigh. */
859 extern union tree_node
*current_function_decl
;
861 #define FUNCTION_EPILOGUE(FILE, SIZE) \
862 output_function_epilogue (FILE, SIZE, leaf_function)
864 #define DELAY_SLOTS_FOR_EPILOGUE 1
865 #define ELIGIBLE_FOR_EPILOGUE_DELAY(trial, slots_filled) \
866 eligible_for_epilogue_delay (trial, slots_filled)
868 /* Output assembler code for a block containing the constant parts
869 of a trampoline, leaving space for the variable parts. */
871 /* On the sparc, the trampoline contains five instructions:
872 sethi #TOP_OF_FUNCTION,%g2
873 or #BOTTOM_OF_FUNCTION,%g2,%g2
874 sethi #TOP_OF_STATIC,%g1
876 or #BOTTOM_OF_STATIC,%g1,%g1 */
877 #define TRAMPOLINE_TEMPLATE(FILE) \
879 ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); \
880 ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); \
881 ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); \
882 ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x81C08000)); \
883 ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); \
886 /* Length in units of the trampoline for entering a nested function. */
888 #define TRAMPOLINE_SIZE 20
890 /* Emit RTL insns to initialize the variable parts of a trampoline.
891 FNADDR is an RTX for the address of the function's pure code.
892 CXT is an RTX for the static chain value for the function.
894 This takes 16 insns: 2 shifts & 2 ands (to split up addresses), 4 sethi
895 (to load in opcodes), 4 iors (to merge address and opcodes), and 4 writes
896 (to store insns). This is a bit excessive. Perhaps a different
897 mechanism would be better here. */
899 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
901 rtx high_cxt = expand_shift (RSHIFT_EXPR, SImode, CXT, \
902 size_int (10), 0, 1); \
903 rtx high_fn = expand_shift (RSHIFT_EXPR, SImode, FNADDR, \
904 size_int (10), 0, 1); \
905 rtx low_cxt = expand_and (CXT, gen_rtx (CONST_INT, VOIDmode, 0x3ff), 0); \
906 rtx low_fn = expand_and (FNADDR, gen_rtx (CONST_INT, VOIDmode, 0x3ff), 0); \
907 rtx g1_sethi = gen_rtx (HIGH, SImode, \
908 gen_rtx (CONST_INT, VOIDmode, 0x03000000)); \
909 rtx g2_sethi = gen_rtx (HIGH, SImode, \
910 gen_rtx (CONST_INT, VOIDmode, 0x05000000)); \
911 rtx g1_ori = gen_rtx (HIGH, SImode, \
912 gen_rtx (CONST_INT, VOIDmode, 0x82106000)); \
913 rtx g2_ori = gen_rtx (HIGH, SImode, \
914 gen_rtx (CONST_INT, VOIDmode, 0x8410A000)); \
915 rtx tem = gen_reg_rtx (SImode); \
916 emit_move_insn (tem, g2_sethi); \
917 emit_insn (gen_iorsi3 (high_fn, high_fn, tem)); \
918 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 0)), high_fn);\
919 emit_move_insn (tem, g2_ori); \
920 emit_insn (gen_iorsi3 (low_fn, low_fn, tem)); \
921 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 4)), low_fn);\
922 emit_move_insn (tem, g1_sethi); \
923 emit_insn (gen_iorsi3 (high_cxt, high_cxt, tem)); \
924 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 8)), high_cxt);\
925 emit_move_insn (tem, g1_ori); \
926 emit_insn (gen_iorsi3 (low_cxt, low_cxt, tem)); \
927 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 16)), low_cxt);\
930 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
931 reference the 6 input registers. Ordinarily they are not call used
932 registers, but they are for _builtin_saveregs, so we must make this
935 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) \
936 (emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, TImode, 24))), \
937 emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, DImode, 28))), \
938 expand_call (exp, target, ignore))
940 /* Addressing modes, and classification of registers for them. */
942 /* #define HAVE_POST_INCREMENT */
943 /* #define HAVE_POST_DECREMENT */
945 /* #define HAVE_PRE_DECREMENT */
946 /* #define HAVE_PRE_INCREMENT */
948 /* Macros to check register numbers against specific register classes. */
950 /* These assume that REGNO is a hard or pseudo reg number.
951 They give nonzero only if REGNO is a hard reg of the suitable class
952 or a pseudo reg currently allocated to a suitable hard reg.
953 Since they use reg_renumber, they are safe only once reg_renumber
954 has been allocated, which happens in local-alloc.c. */
956 #define REGNO_OK_FOR_INDEX_P(REGNO) \
957 (((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32) && (REGNO) != 0)
958 #define REGNO_OK_FOR_BASE_P(REGNO) \
959 (((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32) && (REGNO) != 0)
960 #define REGNO_OK_FOR_FP_P(REGNO) \
961 (((REGNO) ^ 0x20) < 32 \
962 || (((REGNO) != 0) && (unsigned) (reg_renumber[REGNO] ^ 0x20) < 32))
964 /* Now macros that check whether X is a register and also,
965 strictly, whether it is in a specified class.
967 These macros are specific to the SPARC, and may be used only
968 in code for printing assembler insns and in conditions for
969 define_optimization. */
971 /* 1 if X is an fp register. */
973 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
975 /* Maximum number of registers that can appear in a valid memory address. */
977 #define MAX_REGS_PER_ADDRESS 2
979 /* Recognize any constant value that is a valid address. */
981 #define CONSTANT_ADDRESS_P(X) (CONSTANT_P (X))
983 /* Nonzero if the constant value X is a legitimate general operand.
984 Anything can be made to work except floating point constants. */
986 #define LEGITIMATE_CONSTANT_P(X) \
987 (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode)
989 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
990 and check its validity for a certain class.
991 We have two alternate definitions for each of them.
992 The usual definition accepts all pseudo regs; the other rejects
993 them unless they have been allocated suitable hard regs.
994 The symbol REG_OK_STRICT causes the latter definition to be used.
996 Most source files want to accept pseudo regs in the hope that
997 they will get allocated to the class that the insn wants them to be in.
998 Source files for reload pass need to be strict.
999 After reload, it makes no difference, since pseudo regs have
1000 been eliminated by then. */
1002 /* Optional extra constraints for this machine. Borrowed from romp.h.
1004 For the SPARC, `Q' means that this is a memory operand but not a
1005 symbolic memory operand. Note that an unassigned pseudo register
1006 is such a memory operand. Needed because reload will generate
1007 these things in insns and then not re-recognize the insns, causing
1008 constrain_operands to fail.
1010 `R' handles the LO_SUM which can be an address for `Q'.
1012 `S' handles constraints for calls. */
1014 #ifndef REG_OK_STRICT
1016 /* Nonzero if X is a hard reg that can be used as an index
1017 or if it is a pseudo reg. */
1018 #define REG_OK_FOR_INDEX_P(X) (((unsigned) REGNO (X)) - 32 >= 32 && REGNO (X) != 0)
1019 /* Nonzero if X is a hard reg that can be used as a base reg
1020 or if it is a pseudo reg. */
1021 #define REG_OK_FOR_BASE_P(X) (((unsigned) REGNO (X)) - 32 >= 32 && REGNO (X) != 0)
1023 #define EXTRA_CONSTRAINT(OP, C) \
1025 ((GET_CODE (OP) == MEM \
1026 && memory_address_p (GET_MODE (OP), XEXP (OP, 0)) \
1027 && ! symbolic_memory_operand (OP, VOIDmode))) \
1029 (GET_CODE (OP) == LO_SUM \
1030 && GET_CODE (XEXP (OP, 0)) == REG \
1031 && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \
1033 ? CONSTANT_P (OP) || memory_address_p (Pmode, OP) : 0)))
1037 /* Nonzero if X is a hard reg that can be used as an index. */
1038 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1039 /* Nonzero if X is a hard reg that can be used as a base reg. */
1040 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1042 #define EXTRA_CONSTRAINT(OP, C) \
1044 (GET_CODE (OP) == REG ? \
1045 (REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1046 && reg_renumber[REGNO (OP)] < 0) \
1047 : GET_CODE (OP) == MEM) \
1049 (GET_CODE (OP) == LO_SUM \
1050 && GET_CODE (XEXP (OP, 0)) == REG \
1051 && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \
1053 ? (CONSTANT_P (OP) \
1054 || (GET_CODE (OP) == REG && reg_renumber[REGNO (OP)] > 0)\
1055 || strict_memory_address_p (Pmode, OP)) : 0)))
1058 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1059 that is a valid memory address for an instruction.
1060 The MODE argument is the machine mode for the MEM expression
1061 that wants to use this address.
1063 On SPARC, the actual legitimate addresses must be REG+REG or REG+SMALLINT
1064 ordinarily. This changes a bit when generating PIC.
1066 If you change this, execute "rm explow.o recog.o reload.o". */
1068 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1069 { if (GET_CODE (X) == REG) \
1070 { if (REG_OK_FOR_BASE_P (X)) goto ADDR; } \
1071 else if (GET_CODE (X) == PLUS) \
1073 if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1075 if (GET_CODE (XEXP (X, 1)) == REG \
1076 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1078 else if (flag_pic == 1 \
1079 && GET_CODE (XEXP (X, 1)) != REG \
1080 && GET_CODE (XEXP (X, 1)) != LO_SUM \
1081 && GET_CODE (XEXP (X, 1)) != MEM) \
1084 else if (GET_CODE (XEXP (X, 0)) == REG \
1085 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1087 if (GET_CODE (XEXP (X, 1)) == REG \
1088 && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \
1090 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1091 && INTVAL (XEXP (X, 1)) >= -0x1000 \
1092 && INTVAL (XEXP (X, 1)) < 0x1000) \
1095 else if (GET_CODE (XEXP (X, 1)) == REG \
1096 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1098 if (GET_CODE (XEXP (X, 0)) == REG \
1099 && REG_OK_FOR_INDEX_P (XEXP (X, 0))) \
1101 if (GET_CODE (XEXP (X, 0)) == CONST_INT \
1102 && INTVAL (XEXP (X, 0)) >= -0x1000 \
1103 && INTVAL (XEXP (X, 0)) < 0x1000) \
1107 else if (GET_CODE (X) == LO_SUM \
1108 && GET_CODE (XEXP (X, 0)) == REG \
1109 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1110 && CONSTANT_P (XEXP (X, 1))) \
1112 else if (GET_CODE (X) == LO_SUM \
1113 && GET_CODE (XEXP (X, 0)) == SUBREG \
1114 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1115 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1116 && CONSTANT_P (XEXP (X, 1))) \
1118 else if (GET_CODE (X) == CONST_INT && SMALL_INT (X)) \
1122 /* Try machine-dependent ways of modifying an illegitimate address
1123 to be legitimate. If we find one, return the new, valid address.
1124 This macro is used in only one place: `memory_address' in explow.c.
1126 OLDX is the address as it was before break_out_memory_refs was called.
1127 In some cases it is useful to look at this to decide what needs to be done.
1129 MODE and WIN are passed so that this macro can use
1130 GO_IF_LEGITIMATE_ADDRESS.
1132 It is always safe for this macro to do nothing. It exists to recognize
1133 opportunities to optimize the output. */
1135 /* On SPARC, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
1136 extern struct rtx_def
*legitimize_pic_address ();
1137 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1138 { rtx sparc_x = (X); \
1139 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
1140 (X) = gen_rtx (PLUS, Pmode, XEXP (X, 1), \
1141 force_operand (XEXP (X, 0), 0)); \
1142 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
1143 (X) = gen_rtx (PLUS, Pmode, XEXP (X, 0), \
1144 force_operand (XEXP (X, 1), 0)); \
1145 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \
1146 (X) = gen_rtx (PLUS, Pmode, force_operand (XEXP (X, 0), 0),\
1148 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \
1149 (X) = gen_rtx (PLUS, Pmode, XEXP (X, 0), \
1150 force_operand (XEXP (X, 1), 0)); \
1151 if (sparc_x != (X) && memory_address_p (MODE, X)) \
1153 if (flag_pic) (X) = legitimize_pic_address (X, MODE, 0, 0); \
1154 else if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1155 (X) = gen_rtx (PLUS, Pmode, XEXP (X, 0), \
1156 copy_to_mode_reg (Pmode, XEXP (X, 1))); \
1157 else if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
1158 (X) = gen_rtx (PLUS, Pmode, XEXP (X, 1), \
1159 copy_to_mode_reg (Pmode, XEXP (X, 0))); \
1160 else if (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \
1161 || GET_CODE (X) == LABEL_REF) \
1162 (X) = gen_rtx (LO_SUM, Pmode, \
1163 copy_to_mode_reg (Pmode, gen_rtx (HIGH, Pmode, X)), X); \
1164 if (memory_address_p (MODE, X)) \
1167 /* Go to LABEL if ADDR (a legitimate address expression)
1168 has an effect that depends on the machine mode it is used for.
1169 On the SPARC this is never true. */
1171 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
1173 /* Specify the machine mode that this machine uses
1174 for the index in the tablejump instruction. */
1175 #define CASE_VECTOR_MODE SImode
1177 /* Define this if the tablejump instruction expects the table
1178 to contain offsets from the address of the table.
1179 Do not define this if the table should contain absolute addresses. */
1180 /* #define CASE_VECTOR_PC_RELATIVE */
1182 /* Specify the tree operation to be used to convert reals to integers. */
1183 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1185 /* This is the kind of divide that is easiest to do in the general case. */
1186 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1188 /* Define this as 1 if `char' should by default be signed; else as 0. */
1189 #define DEFAULT_SIGNED_CHAR 1
1191 /* Max number of bytes we can move from memory to memory
1192 in one reasonably fast instruction. */
1195 /* Define if normal loads of shorter-than-word items from memory clears
1196 the rest of the bigs in the register. */
1197 #define BYTE_LOADS_ZERO_EXTEND
1199 /* Nonzero if access to memory by bytes is slow and undesirable.
1200 For RISC chips, it means that access to memory by bytes is no
1201 better than access by words when possible, so grab a whole word
1202 and maybe make use of that. */
1203 #define SLOW_BYTE_ACCESS 1
1205 /* We assume that the store-condition-codes instructions store 0 for false
1206 and some other value for true. This is the value stored for true. */
1208 #define STORE_FLAG_VALUE 1
1210 /* When a prototype says `char' or `short', really pass an `int'. */
1211 #define PROMOTE_PROTOTYPES
1213 /* Define if shifts truncate the shift count
1214 which implies one can omit a sign-extension or zero-extension
1215 of a shift count. */
1216 #define SHIFT_COUNT_TRUNCATED
1218 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1219 is done just by pretending it is already truncated. */
1220 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1222 /* Specify the machine mode that pointers have.
1223 After generation of rtl, the compiler makes no further distinction
1224 between pointers and any other objects of this machine mode. */
1225 #define Pmode SImode
1227 /* Generate calls to memcpy, memcmp and memset. */
1228 #define TARGET_MEM_FUNCTIONS
1230 /* Add any extra modes needed to represent the condition code.
1232 On the Sparc, we have a "no-overflow" mode which is used when an add or
1233 subtract insn is used to set the condition code. Different branches are
1234 used in this case for some operations.
1236 We also have a mode to indicate that the relevant condition code is
1237 in the floating-point condition code. This really should be a separate
1238 register, but we don't want to go to 65 registers. */
1239 #define EXTRA_CC_MODES CC_NOOVmode, CCFPmode
1241 /* Define the names for the modes specified above. */
1242 #define EXTRA_CC_NAMES "CC_NOOV", "CCFP"
1244 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1245 return the mode to be used for the comparison. For floating-point, CCFPmode
1246 should be used. CC_NOOVmode should be used when the first operand is a
1247 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1249 #define SELECT_CC_MODE(OP,X) \
1250 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \
1251 : (GET_CODE (X) == PLUS || GET_CODE (X) == MINUS || GET_CODE (X) == NEG) \
1252 ? CC_NOOVmode : CCmode)
1254 /* A function address in a call instruction
1255 is a byte address (for indexing purposes)
1256 so give the MEM rtx a byte's mode. */
1257 #define FUNCTION_MODE SImode
1259 /* Define this if addresses of constant functions
1260 shouldn't be put through pseudo regs where they can be cse'd.
1261 Desirable on machines where ordinary constants are expensive
1262 but a CALL with constant address is cheap. */
1263 #define NO_FUNCTION_CSE
1265 /* alloca should avoid clobbering the old register save area. */
1266 #define SETJMP_VIA_SAVE_AREA
1268 /* Define subroutines to call to handle multiply and divide.
1269 Use the subroutines that Sun's library provides.
1270 The `*' prevents an underscore from being prepended by the compiler. */
1272 #define DIVSI3_LIBCALL "*.div"
1273 #define UDIVSI3_LIBCALL "*.udiv"
1274 #define MODSI3_LIBCALL "*.rem"
1275 #define UMODSI3_LIBCALL "*.urem"
1276 /* .umul is a little faster than .mul. */
1277 #define MULSI3_LIBCALL "*.umul"
1279 /* Compute the cost of computing a constant rtl expression RTX
1280 whose rtx-code is CODE. The body of this macro is a portion
1281 of a switch statement. If the code is computed here,
1282 return it with a return statement. Otherwise, break from the switch. */
1284 #define CONST_COSTS(RTX,CODE) \
1286 if (INTVAL (RTX) == 0) \
1288 if (INTVAL (RTX) < 0x1000 && INTVAL (RTX) >= -0x1000) \
1296 case CONST_DOUBLE: \
1297 if (GET_MODE (RTX) == DImode) \
1298 if ((XINT (RTX, 3) == 0 \
1299 && (unsigned) XINT (RTX, 2) < 0x1000) \
1300 || (XINT (RTX, 3) == -1 \
1301 && XINT (RTX, 2) < 0 \
1302 && XINT (RTX, 2) >= -0x1000)) \
1306 /* SPARC offers addressing modes which are "as cheap as a register".
1307 See sparc.c (or gcc.texinfo) for details. */
1309 #define ADDRESS_COST(RTX) \
1310 (GET_CODE (RTX) == REG ? 1 : sparc_address_cost (RTX))
1312 /* Compute extra cost of moving data between one register class
1314 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1315 (((CLASS1 == FP_REGS && CLASS2 == GENERAL_REGS) \
1316 || (CLASS1 == GENERAL_REGS && CLASS2 == FP_REGS)) ? 6 : 2)
1318 /* Provide the costs of a rtl expression. This is in the body of a
1319 switch on CODE. The purpose for the cost of MULT is to encourage
1320 `synth_mult' to find a synthetic multiply when reasonable.
1322 If we need more than 12 insns to do a multiply, then go out-of-line,
1323 since the call overhead will be < 10% of the cost of the multiply. */
1325 #define RTX_COSTS(X,CODE) \
1327 return COSTS_N_INSNS (25); \
1332 return COSTS_N_INSNS (20); \
1333 /* Make FLOAT more expensive than CONST_DOUBLE, \
1334 so that cse will favor the latter. */ \
1338 /* Conditional branches with empty delay slots have a length of two. */
1339 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1340 if (GET_CODE (INSN) == CALL_INSN \
1341 || (GET_CODE (INSN) == JUMP_INSN && ! simplejump_p (insn))) \
1344 /* Control the assembler format that we output. */
1346 /* Output at beginning of assembler file. */
1348 #define ASM_FILE_START(file)
1350 /* Output to assembler file text saying following lines
1351 may contain character constants, extra white space, comments, etc. */
1353 #define ASM_APP_ON ""
1355 /* Output to assembler file text saying following lines
1356 no longer contain unusual constructs. */
1358 #define ASM_APP_OFF ""
1360 /* Output before read-only data. */
1362 #define TEXT_SECTION_ASM_OP ".text"
1364 /* Output before writable data. */
1366 #define DATA_SECTION_ASM_OP ".data"
1368 /* How to refer to registers in assembler output.
1369 This sequence is indexed by compiler's hard-register-number (see above). */
1371 #define REGISTER_NAMES \
1372 {"%g0", "%g1", "%g2", "%g3", "%g4", "%g5", "%g6", "%g7", \
1373 "%o0", "%o1", "%o2", "%o3", "%o4", "%o5", "%sp", "%o7", \
1374 "%l0", "%l1", "%l2", "%l3", "%l4", "%l5", "%l6", "%l7", \
1375 "%i0", "%i1", "%i2", "%i3", "%i4", "%i5", "%fp", "%i7", \
1376 "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", \
1377 "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", \
1378 "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", \
1379 "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31"}
1381 /* How to renumber registers for dbx and gdb. */
1383 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1385 /* On Sun 4, this limit is 2048. We use 1500 to be safe,
1386 since the length can run past this up to a continuation point. */
1387 #define DBX_CONTIN_LENGTH 1500
1389 /* This is how to output a note to DBX telling it the line number
1390 to which the following sequence of instructions corresponds.
1392 This is needed for SunOS 4.0, and should not hurt for 3.2
1394 #define ASM_OUTPUT_SOURCE_LINE(file, line) \
1395 { static int sym_lineno = 1; \
1396 fprintf (file, ".stabn 68,0,%d,LM%d\nLM%d:\n", \
1397 line, sym_lineno, sym_lineno); \
1400 /* This is how to output the definition of a user-level label named NAME,
1401 such as the label on a static function or variable NAME. */
1403 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1404 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1406 /* This is how to output a command to make the user-level label named NAME
1407 defined for reference from other files. */
1409 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1410 do { fputs ("\t.global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1412 /* This is how to output a reference to a user-level label named NAME.
1413 `assemble_name' uses this. */
1415 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1416 fprintf (FILE, "_%s", NAME)
1418 /* This is how to output an internal numbered label where
1419 PREFIX is the class of label and NUM is the number within the class. */
1421 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1422 fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1424 /* This is how to store into the string LABEL
1425 the symbol_ref name of an internal numbered label where
1426 PREFIX is the class of label and NUM is the number within the class.
1427 This is suitable for output with `assemble_name'. */
1429 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1430 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1432 /* This is how to output an assembler line defining a `double' constant. */
1434 /* Assemblers (both gas 1.35 and as in 4.0.3)
1435 seem to treat -0.0 as if it were 0.0.
1436 They reject 99e9999, but accept inf. */
1437 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1439 if (REAL_VALUE_ISINF (VALUE)) \
1440 fprintf (FILE, "\t.double 0r%sinf\n", (VALUE) > 0 ? "" : "-"); \
1441 else if (REAL_VALUE_ISNAN (VALUE) \
1442 || REAL_VALUE_MINUS_ZERO (VALUE)) \
1444 union { double d; long l[2];} t; \
1446 fprintf (FILE, "\t.word 0x%lx\n\t.word 0x%lx\n", t.l[0], t.l[1]); \
1449 fprintf (FILE, "\t.double 0r%.17g\n", VALUE); \
1452 /* This is how to output an assembler line defining a `float' constant. */
1454 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1456 if (REAL_VALUE_ISINF (VALUE)) \
1457 fprintf (FILE, "\t.single 0r%sinf\n", (VALUE) > 0 ? "" : "-"); \
1458 else if (REAL_VALUE_ISNAN (VALUE) \
1459 || REAL_VALUE_MINUS_ZERO (VALUE)) \
1461 union { float f; long l;} t; \
1463 fprintf (FILE, "\t.word 0x%lx\n", t.l); \
1466 fprintf (FILE, "\t.single 0r%.9g\n", VALUE); \
1469 /* This is how to output an assembler line defining an `int' constant. */
1471 #define ASM_OUTPUT_INT(FILE,VALUE) \
1472 ( fprintf (FILE, "\t.word "), \
1473 output_addr_const (FILE, (VALUE)), \
1474 fprintf (FILE, "\n"))
1476 /* This is how to output an assembler line defining a DImode constant. */
1477 #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \
1478 output_double_int (FILE, VALUE)
1480 /* Likewise for `char' and `short' constants. */
1482 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1483 ( fprintf (FILE, "\t.half "), \
1484 output_addr_const (FILE, (VALUE)), \
1485 fprintf (FILE, "\n"))
1487 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1488 ( fprintf (FILE, "\t.byte "), \
1489 output_addr_const (FILE, (VALUE)), \
1490 fprintf (FILE, "\n"))
1492 /* This is how to output an assembler line for a numeric constant byte. */
1494 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1495 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1497 /* This is how to output an element of a case-vector that is absolute. */
1499 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1502 ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \
1503 fprintf (FILE, "\t.word\t"); \
1504 assemble_name (FILE, label); \
1505 fprintf (FILE, "\n"); \
1508 /* This is how to output an element of a case-vector that is relative.
1509 (SPARC uses such vectors only when generating PIC.) */
1511 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1514 ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \
1515 fprintf (FILE, "\t.word\t"); \
1516 assemble_name (FILE, label); \
1517 fprintf (FILE, "-1b\n"); \
1520 /* This is how to output an assembler line
1521 that says to advance the location counter
1522 to a multiple of 2**LOG bytes. */
1524 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1526 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1528 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1529 fprintf (FILE, "\t.skip %u\n", (SIZE))
1531 /* This says how to output an assembler line
1532 to define a global common symbol. */
1534 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1535 ( fputs ("\t.global ", (FILE)), \
1536 assemble_name ((FILE), (NAME)), \
1537 fputs ("\n\t.common ", (FILE)), \
1538 assemble_name ((FILE), (NAME)), \
1539 fprintf ((FILE), ",%u,\"bss\"\n", (ROUNDED)))
1541 /* This says how to output an assembler line
1542 to define a local common symbol. */
1544 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1545 ( fputs ("\n\t.reserve ", (FILE)), \
1546 assemble_name ((FILE), (NAME)), \
1547 fprintf ((FILE), ",%u,\"bss\"\n", (ROUNDED)))
1549 /* Store in OUTPUT a string (made with alloca) containing
1550 an assembler-name for a local static variable named NAME.
1551 LABELNO is an integer which is different for each call. */
1553 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1554 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1555 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1557 /* Define the parentheses used to group arithmetic operations
1558 in assembler code. */
1560 #define ASM_OPEN_PAREN "("
1561 #define ASM_CLOSE_PAREN ")"
1563 /* Define results of standard character escape sequences. */
1564 #define TARGET_BELL 007
1565 #define TARGET_BS 010
1566 #define TARGET_TAB 011
1567 #define TARGET_NEWLINE 012
1568 #define TARGET_VT 013
1569 #define TARGET_FF 014
1570 #define TARGET_CR 015
1572 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1573 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1575 /* Print operand X (an rtx) in assembler syntax to file FILE.
1576 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1577 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1579 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1581 /* Print a memory address as an operand to reference that memory location. */
1583 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1584 { register rtx base, index = 0; \
1586 register rtx addr = ADDR; \
1587 if (GET_CODE (addr) == REG) \
1588 fputs (reg_names[REGNO (addr)], FILE); \
1589 else if (GET_CODE (addr) == PLUS) \
1591 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1592 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1);\
1593 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1594 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0);\
1596 base = XEXP (addr, 0), index = XEXP (addr, 1); \
1597 fputs (reg_names[REGNO (base)], FILE); \
1599 fprintf (FILE, "%+d", offset); \
1600 else if (GET_CODE (index) == REG) \
1601 fprintf (FILE, "+%s", reg_names[REGNO (index)]); \
1602 else if (GET_CODE (index) == SYMBOL_REF) \
1603 fputc ('+', FILE), output_addr_const (FILE, index); \
1606 else if (GET_CODE (addr) == MINUS \
1607 && GET_CODE (XEXP (addr, 1)) == LABEL_REF) \
1609 output_addr_const (FILE, XEXP (addr, 0)); \
1610 fputs ("-(", FILE); \
1611 output_addr_const (FILE, XEXP (addr, 1)); \
1612 fputs ("-.)", FILE); \
1614 else if (GET_CODE (addr) == LO_SUM) \
1616 output_operand (XEXP (addr, 0), 0); \
1617 fputs ("+%lo(", FILE); \
1618 output_address (XEXP (addr, 1)); \
1619 fputc (')', FILE); \
1621 else if (flag_pic && GET_CODE (addr) == CONST \
1622 && GET_CODE (XEXP (addr, 0)) == MINUS \
1623 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST \
1624 && GET_CODE (XEXP (XEXP (XEXP (addr, 0), 1), 0)) == MINUS \
1625 && XEXP (XEXP (XEXP (XEXP (addr, 0), 1), 0), 1) == pc_rtx) \
1627 addr = XEXP (addr, 0); \
1628 output_addr_const (FILE, XEXP (addr, 0)); \
1629 /* Group the args of the second CONST in parenthesis. */ \
1630 fputs ("-(", FILE); \
1631 /* Skip past the second CONST--it does nothing for us. */\
1632 output_addr_const (FILE, XEXP (XEXP (addr, 1), 0)); \
1633 /* Close the parenthesis. */ \
1634 fputc (')', FILE); \
1638 output_addr_const (FILE, addr); \
1642 /* Declare functions defined in sparc.c and used in templates. */
1644 extern char *singlemove_string ();
1645 extern char *output_move_double ();
1646 extern char *output_fp_move_double ();
1647 extern char *output_block_move ();
1648 extern char *output_scc_insn ();
1649 extern char *output_cbranch ();
1650 extern char *output_return ();
1651 extern char *output_floatsisf2 ();
1652 extern char *output_floatsidf2 ();
1654 /* Defined in flags.h, but insn-emit.c does not include flags.h. */
1656 extern int flag_pic
;