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1 /* Copyright (C) 1994, 95, 97, 98, 1999, 2000 Free Software Foundation, Inc.
2
3 This file is free software; you can redistribute it and/or modify it
4 under the terms of the GNU General Public License as published by the
5 Free Software Foundation; either version 2, or (at your option) any
6 later version.
7
8 In addition to the permissions in the GNU General Public License, the
9 Free Software Foundation gives you unlimited permission to link the
10 compiled version of this file into combinations with other programs,
11 and to distribute those combinations without any restriction coming
12 from the use of this file. (The General Public License restrictions
13 do apply in other respects; for example, they cover modification of
14 the file, and distribution when not linked into a combine
15 executable.)
16
17 This file is distributed in the hope that it will be useful, but
18 WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; see the file COPYING. If not, write to
24 the Free Software Foundation, 59 Temple Place - Suite 330,
25 Boston, MA 02111-1307, USA. */
26
27 !! libgcc1 routines for the Hitachi SH cpu.
28 !! Contributed by Steve Chamberlain.
29 !! sac@cygnus.com
30
31 !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
32 !! recoded in assembly by Toshiyasu Morita
33 !! tm@netcom.com
34
35 /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
36 ELF local label prefixes by J"orn Rennecke
37 amylaar@cygnus.com */
38
39 #ifdef __ELF__
40 #define LOCAL(X) .L_##X
41 #else
42 #define LOCAL(X) L_##X
43 #endif
44
45 #ifdef L_ashiftrt
46 .global ___ashiftrt_r4_0
47 .global ___ashiftrt_r4_1
48 .global ___ashiftrt_r4_2
49 .global ___ashiftrt_r4_3
50 .global ___ashiftrt_r4_4
51 .global ___ashiftrt_r4_5
52 .global ___ashiftrt_r4_6
53 .global ___ashiftrt_r4_7
54 .global ___ashiftrt_r4_8
55 .global ___ashiftrt_r4_9
56 .global ___ashiftrt_r4_10
57 .global ___ashiftrt_r4_11
58 .global ___ashiftrt_r4_12
59 .global ___ashiftrt_r4_13
60 .global ___ashiftrt_r4_14
61 .global ___ashiftrt_r4_15
62 .global ___ashiftrt_r4_16
63 .global ___ashiftrt_r4_17
64 .global ___ashiftrt_r4_18
65 .global ___ashiftrt_r4_19
66 .global ___ashiftrt_r4_20
67 .global ___ashiftrt_r4_21
68 .global ___ashiftrt_r4_22
69 .global ___ashiftrt_r4_23
70 .global ___ashiftrt_r4_24
71 .global ___ashiftrt_r4_25
72 .global ___ashiftrt_r4_26
73 .global ___ashiftrt_r4_27
74 .global ___ashiftrt_r4_28
75 .global ___ashiftrt_r4_29
76 .global ___ashiftrt_r4_30
77 .global ___ashiftrt_r4_31
78 .global ___ashiftrt_r4_32
79
80 .align 1
81 ___ashiftrt_r4_32:
82 ___ashiftrt_r4_31:
83 rotcl r4
84 rts
85 subc r4,r4
86
87 ___ashiftrt_r4_30:
88 shar r4
89 ___ashiftrt_r4_29:
90 shar r4
91 ___ashiftrt_r4_28:
92 shar r4
93 ___ashiftrt_r4_27:
94 shar r4
95 ___ashiftrt_r4_26:
96 shar r4
97 ___ashiftrt_r4_25:
98 shar r4
99 ___ashiftrt_r4_24:
100 shlr16 r4
101 shlr8 r4
102 rts
103 exts.b r4,r4
104
105 ___ashiftrt_r4_23:
106 shar r4
107 ___ashiftrt_r4_22:
108 shar r4
109 ___ashiftrt_r4_21:
110 shar r4
111 ___ashiftrt_r4_20:
112 shar r4
113 ___ashiftrt_r4_19:
114 shar r4
115 ___ashiftrt_r4_18:
116 shar r4
117 ___ashiftrt_r4_17:
118 shar r4
119 ___ashiftrt_r4_16:
120 shlr16 r4
121 rts
122 exts.w r4,r4
123
124 ___ashiftrt_r4_15:
125 shar r4
126 ___ashiftrt_r4_14:
127 shar r4
128 ___ashiftrt_r4_13:
129 shar r4
130 ___ashiftrt_r4_12:
131 shar r4
132 ___ashiftrt_r4_11:
133 shar r4
134 ___ashiftrt_r4_10:
135 shar r4
136 ___ashiftrt_r4_9:
137 shar r4
138 ___ashiftrt_r4_8:
139 shar r4
140 ___ashiftrt_r4_7:
141 shar r4
142 ___ashiftrt_r4_6:
143 shar r4
144 ___ashiftrt_r4_5:
145 shar r4
146 ___ashiftrt_r4_4:
147 shar r4
148 ___ashiftrt_r4_3:
149 shar r4
150 ___ashiftrt_r4_2:
151 shar r4
152 ___ashiftrt_r4_1:
153 rts
154 shar r4
155
156 ___ashiftrt_r4_0:
157 rts
158 nop
159 #endif
160
161 #ifdef L_ashiftrt_n
162
163 !
164 ! ___ashrsi3
165 !
166 ! Entry:
167 !
168 ! r4: Value to shift
169 ! r5: Shifts
170 !
171 ! Exit:
172 !
173 ! r0: Result
174 !
175 ! Destroys:
176 !
177 ! (none)
178 !
179
180 .global ___ashrsi3
181 .align 2
182 ___ashrsi3:
183 mov #31,r0
184 and r0,r5
185 mova LOCAL(ashrsi3_table),r0
186 mov.b @(r0,r5),r5
187 #ifdef __sh1__
188 add r5,r0
189 jmp @r0
190 #else
191 braf r5
192 #endif
193 mov r4,r0
194
195 .align 2
196 LOCAL(ashrsi3_table):
197 .byte LOCAL(ashrsi3_0)-LOCAL(ashrsi3_table)
198 .byte LOCAL(ashrsi3_1)-LOCAL(ashrsi3_table)
199 .byte LOCAL(ashrsi3_2)-LOCAL(ashrsi3_table)
200 .byte LOCAL(ashrsi3_3)-LOCAL(ashrsi3_table)
201 .byte LOCAL(ashrsi3_4)-LOCAL(ashrsi3_table)
202 .byte LOCAL(ashrsi3_5)-LOCAL(ashrsi3_table)
203 .byte LOCAL(ashrsi3_6)-LOCAL(ashrsi3_table)
204 .byte LOCAL(ashrsi3_7)-LOCAL(ashrsi3_table)
205 .byte LOCAL(ashrsi3_8)-LOCAL(ashrsi3_table)
206 .byte LOCAL(ashrsi3_9)-LOCAL(ashrsi3_table)
207 .byte LOCAL(ashrsi3_10)-LOCAL(ashrsi3_table)
208 .byte LOCAL(ashrsi3_11)-LOCAL(ashrsi3_table)
209 .byte LOCAL(ashrsi3_12)-LOCAL(ashrsi3_table)
210 .byte LOCAL(ashrsi3_13)-LOCAL(ashrsi3_table)
211 .byte LOCAL(ashrsi3_14)-LOCAL(ashrsi3_table)
212 .byte LOCAL(ashrsi3_15)-LOCAL(ashrsi3_table)
213 .byte LOCAL(ashrsi3_16)-LOCAL(ashrsi3_table)
214 .byte LOCAL(ashrsi3_17)-LOCAL(ashrsi3_table)
215 .byte LOCAL(ashrsi3_18)-LOCAL(ashrsi3_table)
216 .byte LOCAL(ashrsi3_19)-LOCAL(ashrsi3_table)
217 .byte LOCAL(ashrsi3_20)-LOCAL(ashrsi3_table)
218 .byte LOCAL(ashrsi3_21)-LOCAL(ashrsi3_table)
219 .byte LOCAL(ashrsi3_22)-LOCAL(ashrsi3_table)
220 .byte LOCAL(ashrsi3_23)-LOCAL(ashrsi3_table)
221 .byte LOCAL(ashrsi3_24)-LOCAL(ashrsi3_table)
222 .byte LOCAL(ashrsi3_25)-LOCAL(ashrsi3_table)
223 .byte LOCAL(ashrsi3_26)-LOCAL(ashrsi3_table)
224 .byte LOCAL(ashrsi3_27)-LOCAL(ashrsi3_table)
225 .byte LOCAL(ashrsi3_28)-LOCAL(ashrsi3_table)
226 .byte LOCAL(ashrsi3_29)-LOCAL(ashrsi3_table)
227 .byte LOCAL(ashrsi3_30)-LOCAL(ashrsi3_table)
228 .byte LOCAL(ashrsi3_31)-LOCAL(ashrsi3_table)
229
230 LOCAL(ashrsi3_31):
231 rotcl r0
232 rts
233 subc r0,r0
234
235 LOCAL(ashrsi3_30):
236 shar r0
237 LOCAL(ashrsi3_29):
238 shar r0
239 LOCAL(ashrsi3_28):
240 shar r0
241 LOCAL(ashrsi3_27):
242 shar r0
243 LOCAL(ashrsi3_26):
244 shar r0
245 LOCAL(ashrsi3_25):
246 shar r0
247 LOCAL(ashrsi3_24):
248 shlr16 r0
249 shlr8 r0
250 rts
251 exts.b r0,r0
252
253 LOCAL(ashrsi3_23):
254 shar r0
255 LOCAL(ashrsi3_22):
256 shar r0
257 LOCAL(ashrsi3_21):
258 shar r0
259 LOCAL(ashrsi3_20):
260 shar r0
261 LOCAL(ashrsi3_19):
262 shar r0
263 LOCAL(ashrsi3_18):
264 shar r0
265 LOCAL(ashrsi3_17):
266 shar r0
267 LOCAL(ashrsi3_16):
268 shlr16 r0
269 rts
270 exts.w r0,r0
271
272 LOCAL(ashrsi3_15):
273 shar r0
274 LOCAL(ashrsi3_14):
275 shar r0
276 LOCAL(ashrsi3_13):
277 shar r0
278 LOCAL(ashrsi3_12):
279 shar r0
280 LOCAL(ashrsi3_11):
281 shar r0
282 LOCAL(ashrsi3_10):
283 shar r0
284 LOCAL(ashrsi3_9):
285 shar r0
286 LOCAL(ashrsi3_8):
287 shar r0
288 LOCAL(ashrsi3_7):
289 shar r0
290 LOCAL(ashrsi3_6):
291 shar r0
292 LOCAL(ashrsi3_5):
293 shar r0
294 LOCAL(ashrsi3_4):
295 shar r0
296 LOCAL(ashrsi3_3):
297 shar r0
298 LOCAL(ashrsi3_2):
299 shar r0
300 LOCAL(ashrsi3_1):
301 rts
302 shar r0
303
304 LOCAL(ashrsi3_0):
305 rts
306 nop
307
308 #endif
309
310 #ifdef L_ashiftlt
311
312 !
313 ! ___ashlsi3
314 !
315 ! Entry:
316 !
317 ! r4: Value to shift
318 ! r5: Shifts
319 !
320 ! Exit:
321 !
322 ! r0: Result
323 !
324 ! Destroys:
325 !
326 ! (none)
327 !
328 .global ___ashlsi3
329 .align 2
330 ___ashlsi3:
331 mov #31,r0
332 and r0,r5
333 mova LOCAL(ashlsi3_table),r0
334 mov.b @(r0,r5),r5
335 #ifdef __sh1__
336 add r5,r0
337 jmp @r0
338 #else
339 braf r5
340 #endif
341 mov r4,r0
342
343 .align 2
344 LOCAL(ashlsi3_table):
345 .byte LOCAL(ashlsi3_0)-LOCAL(ashlsi3_table)
346 .byte LOCAL(ashlsi3_1)-LOCAL(ashlsi3_table)
347 .byte LOCAL(ashlsi3_2)-LOCAL(ashlsi3_table)
348 .byte LOCAL(ashlsi3_3)-LOCAL(ashlsi3_table)
349 .byte LOCAL(ashlsi3_4)-LOCAL(ashlsi3_table)
350 .byte LOCAL(ashlsi3_5)-LOCAL(ashlsi3_table)
351 .byte LOCAL(ashlsi3_6)-LOCAL(ashlsi3_table)
352 .byte LOCAL(ashlsi3_7)-LOCAL(ashlsi3_table)
353 .byte LOCAL(ashlsi3_8)-LOCAL(ashlsi3_table)
354 .byte LOCAL(ashlsi3_9)-LOCAL(ashlsi3_table)
355 .byte LOCAL(ashlsi3_10)-LOCAL(ashlsi3_table)
356 .byte LOCAL(ashlsi3_11)-LOCAL(ashlsi3_table)
357 .byte LOCAL(ashlsi3_12)-LOCAL(ashlsi3_table)
358 .byte LOCAL(ashlsi3_13)-LOCAL(ashlsi3_table)
359 .byte LOCAL(ashlsi3_14)-LOCAL(ashlsi3_table)
360 .byte LOCAL(ashlsi3_15)-LOCAL(ashlsi3_table)
361 .byte LOCAL(ashlsi3_16)-LOCAL(ashlsi3_table)
362 .byte LOCAL(ashlsi3_17)-LOCAL(ashlsi3_table)
363 .byte LOCAL(ashlsi3_18)-LOCAL(ashlsi3_table)
364 .byte LOCAL(ashlsi3_19)-LOCAL(ashlsi3_table)
365 .byte LOCAL(ashlsi3_20)-LOCAL(ashlsi3_table)
366 .byte LOCAL(ashlsi3_21)-LOCAL(ashlsi3_table)
367 .byte LOCAL(ashlsi3_22)-LOCAL(ashlsi3_table)
368 .byte LOCAL(ashlsi3_23)-LOCAL(ashlsi3_table)
369 .byte LOCAL(ashlsi3_24)-LOCAL(ashlsi3_table)
370 .byte LOCAL(ashlsi3_25)-LOCAL(ashlsi3_table)
371 .byte LOCAL(ashlsi3_26)-LOCAL(ashlsi3_table)
372 .byte LOCAL(ashlsi3_27)-LOCAL(ashlsi3_table)
373 .byte LOCAL(ashlsi3_28)-LOCAL(ashlsi3_table)
374 .byte LOCAL(ashlsi3_29)-LOCAL(ashlsi3_table)
375 .byte LOCAL(ashlsi3_30)-LOCAL(ashlsi3_table)
376 .byte LOCAL(ashlsi3_31)-LOCAL(ashlsi3_table)
377
378 LOCAL(ashlsi3_6):
379 shll2 r0
380 LOCAL(ashlsi3_4):
381 shll2 r0
382 LOCAL(ashlsi3_2):
383 rts
384 shll2 r0
385
386 LOCAL(ashlsi3_7):
387 shll2 r0
388 LOCAL(ashlsi3_5):
389 shll2 r0
390 LOCAL(ashlsi3_3):
391 shll2 r0
392 LOCAL(ashlsi3_1):
393 rts
394 shll r0
395
396 LOCAL(ashlsi3_14):
397 shll2 r0
398 LOCAL(ashlsi3_12):
399 shll2 r0
400 LOCAL(ashlsi3_10):
401 shll2 r0
402 LOCAL(ashlsi3_8):
403 rts
404 shll8 r0
405
406 LOCAL(ashlsi3_15):
407 shll2 r0
408 LOCAL(ashlsi3_13):
409 shll2 r0
410 LOCAL(ashlsi3_11):
411 shll2 r0
412 LOCAL(ashlsi3_9):
413 shll8 r0
414 rts
415 shll r0
416
417 LOCAL(ashlsi3_22):
418 shll2 r0
419 LOCAL(ashlsi3_20):
420 shll2 r0
421 LOCAL(ashlsi3_18):
422 shll2 r0
423 LOCAL(ashlsi3_16):
424 rts
425 shll16 r0
426
427 LOCAL(ashlsi3_23):
428 shll2 r0
429 LOCAL(ashlsi3_21):
430 shll2 r0
431 LOCAL(ashlsi3_19):
432 shll2 r0
433 LOCAL(ashlsi3_17):
434 shll16 r0
435 rts
436 shll r0
437
438 LOCAL(ashlsi3_30):
439 shll2 r0
440 LOCAL(ashlsi3_28):
441 shll2 r0
442 LOCAL(ashlsi3_26):
443 shll2 r0
444 LOCAL(ashlsi3_24):
445 shll16 r0
446 rts
447 shll8 r0
448
449 LOCAL(ashlsi3_31):
450 shll2 r0
451 LOCAL(ashlsi3_29):
452 shll2 r0
453 LOCAL(ashlsi3_27):
454 shll2 r0
455 LOCAL(ashlsi3_25):
456 shll16 r0
457 shll8 r0
458 rts
459 shll r0
460
461 LOCAL(ashlsi3_0):
462 rts
463 nop
464
465 #endif
466
467 #ifdef L_lshiftrt
468
469 !
470 ! ___lshrsi3
471 !
472 ! Entry:
473 !
474 ! r4: Value to shift
475 ! r5: Shifts
476 !
477 ! Exit:
478 !
479 ! r0: Result
480 !
481 ! Destroys:
482 !
483 ! (none)
484 !
485 .global ___lshrsi3
486 .align 2
487 ___lshrsi3:
488 mov #31,r0
489 and r0,r5
490 mova LOCAL(lshrsi3_table),r0
491 mov.b @(r0,r5),r5
492 #ifdef __sh1__
493 add r5,r0
494 jmp @r0
495 #else
496 braf r5
497 #endif
498 mov r4,r0
499
500 .align 2
501 LOCAL(lshrsi3_table):
502 .byte LOCAL(lshrsi3_0)-LOCAL(lshrsi3_table)
503 .byte LOCAL(lshrsi3_1)-LOCAL(lshrsi3_table)
504 .byte LOCAL(lshrsi3_2)-LOCAL(lshrsi3_table)
505 .byte LOCAL(lshrsi3_3)-LOCAL(lshrsi3_table)
506 .byte LOCAL(lshrsi3_4)-LOCAL(lshrsi3_table)
507 .byte LOCAL(lshrsi3_5)-LOCAL(lshrsi3_table)
508 .byte LOCAL(lshrsi3_6)-LOCAL(lshrsi3_table)
509 .byte LOCAL(lshrsi3_7)-LOCAL(lshrsi3_table)
510 .byte LOCAL(lshrsi3_8)-LOCAL(lshrsi3_table)
511 .byte LOCAL(lshrsi3_9)-LOCAL(lshrsi3_table)
512 .byte LOCAL(lshrsi3_10)-LOCAL(lshrsi3_table)
513 .byte LOCAL(lshrsi3_11)-LOCAL(lshrsi3_table)
514 .byte LOCAL(lshrsi3_12)-LOCAL(lshrsi3_table)
515 .byte LOCAL(lshrsi3_13)-LOCAL(lshrsi3_table)
516 .byte LOCAL(lshrsi3_14)-LOCAL(lshrsi3_table)
517 .byte LOCAL(lshrsi3_15)-LOCAL(lshrsi3_table)
518 .byte LOCAL(lshrsi3_16)-LOCAL(lshrsi3_table)
519 .byte LOCAL(lshrsi3_17)-LOCAL(lshrsi3_table)
520 .byte LOCAL(lshrsi3_18)-LOCAL(lshrsi3_table)
521 .byte LOCAL(lshrsi3_19)-LOCAL(lshrsi3_table)
522 .byte LOCAL(lshrsi3_20)-LOCAL(lshrsi3_table)
523 .byte LOCAL(lshrsi3_21)-LOCAL(lshrsi3_table)
524 .byte LOCAL(lshrsi3_22)-LOCAL(lshrsi3_table)
525 .byte LOCAL(lshrsi3_23)-LOCAL(lshrsi3_table)
526 .byte LOCAL(lshrsi3_24)-LOCAL(lshrsi3_table)
527 .byte LOCAL(lshrsi3_25)-LOCAL(lshrsi3_table)
528 .byte LOCAL(lshrsi3_26)-LOCAL(lshrsi3_table)
529 .byte LOCAL(lshrsi3_27)-LOCAL(lshrsi3_table)
530 .byte LOCAL(lshrsi3_28)-LOCAL(lshrsi3_table)
531 .byte LOCAL(lshrsi3_29)-LOCAL(lshrsi3_table)
532 .byte LOCAL(lshrsi3_30)-LOCAL(lshrsi3_table)
533 .byte LOCAL(lshrsi3_31)-LOCAL(lshrsi3_table)
534
535 LOCAL(lshrsi3_6):
536 shlr2 r0
537 LOCAL(lshrsi3_4):
538 shlr2 r0
539 LOCAL(lshrsi3_2):
540 rts
541 shlr2 r0
542
543 LOCAL(lshrsi3_7):
544 shlr2 r0
545 LOCAL(lshrsi3_5):
546 shlr2 r0
547 LOCAL(lshrsi3_3):
548 shlr2 r0
549 LOCAL(lshrsi3_1):
550 rts
551 shlr r0
552
553 LOCAL(lshrsi3_14):
554 shlr2 r0
555 LOCAL(lshrsi3_12):
556 shlr2 r0
557 LOCAL(lshrsi3_10):
558 shlr2 r0
559 LOCAL(lshrsi3_8):
560 rts
561 shlr8 r0
562
563 LOCAL(lshrsi3_15):
564 shlr2 r0
565 LOCAL(lshrsi3_13):
566 shlr2 r0
567 LOCAL(lshrsi3_11):
568 shlr2 r0
569 LOCAL(lshrsi3_9):
570 shlr8 r0
571 rts
572 shlr r0
573
574 LOCAL(lshrsi3_22):
575 shlr2 r0
576 LOCAL(lshrsi3_20):
577 shlr2 r0
578 LOCAL(lshrsi3_18):
579 shlr2 r0
580 LOCAL(lshrsi3_16):
581 rts
582 shlr16 r0
583
584 LOCAL(lshrsi3_23):
585 shlr2 r0
586 LOCAL(lshrsi3_21):
587 shlr2 r0
588 LOCAL(lshrsi3_19):
589 shlr2 r0
590 LOCAL(lshrsi3_17):
591 shlr16 r0
592 rts
593 shlr r0
594
595 LOCAL(lshrsi3_30):
596 shlr2 r0
597 LOCAL(lshrsi3_28):
598 shlr2 r0
599 LOCAL(lshrsi3_26):
600 shlr2 r0
601 LOCAL(lshrsi3_24):
602 shlr16 r0
603 rts
604 shlr8 r0
605
606 LOCAL(lshrsi3_31):
607 shlr2 r0
608 LOCAL(lshrsi3_29):
609 shlr2 r0
610 LOCAL(lshrsi3_27):
611 shlr2 r0
612 LOCAL(lshrsi3_25):
613 shlr16 r0
614 shlr8 r0
615 rts
616 shlr r0
617
618 LOCAL(lshrsi3_0):
619 rts
620 nop
621
622 #endif
623
624 #ifdef L_movstr
625 .text
626 ! done all the large groups, do the remainder
627
628 ! jump to movstr+
629 done:
630 add #64,r5
631 mova ___movstrSI0,r0
632 shll2 r6
633 add r6,r0
634 jmp @r0
635 add #64,r4
636 .align 4
637 .global ___movstrSI64
638 ___movstrSI64:
639 mov.l @(60,r5),r0
640 mov.l r0,@(60,r4)
641 .global ___movstrSI60
642 ___movstrSI60:
643 mov.l @(56,r5),r0
644 mov.l r0,@(56,r4)
645 .global ___movstrSI56
646 ___movstrSI56:
647 mov.l @(52,r5),r0
648 mov.l r0,@(52,r4)
649 .global ___movstrSI52
650 ___movstrSI52:
651 mov.l @(48,r5),r0
652 mov.l r0,@(48,r4)
653 .global ___movstrSI48
654 ___movstrSI48:
655 mov.l @(44,r5),r0
656 mov.l r0,@(44,r4)
657 .global ___movstrSI44
658 ___movstrSI44:
659 mov.l @(40,r5),r0
660 mov.l r0,@(40,r4)
661 .global ___movstrSI40
662 ___movstrSI40:
663 mov.l @(36,r5),r0
664 mov.l r0,@(36,r4)
665 .global ___movstrSI36
666 ___movstrSI36:
667 mov.l @(32,r5),r0
668 mov.l r0,@(32,r4)
669 .global ___movstrSI32
670 ___movstrSI32:
671 mov.l @(28,r5),r0
672 mov.l r0,@(28,r4)
673 .global ___movstrSI28
674 ___movstrSI28:
675 mov.l @(24,r5),r0
676 mov.l r0,@(24,r4)
677 .global ___movstrSI24
678 ___movstrSI24:
679 mov.l @(20,r5),r0
680 mov.l r0,@(20,r4)
681 .global ___movstrSI20
682 ___movstrSI20:
683 mov.l @(16,r5),r0
684 mov.l r0,@(16,r4)
685 .global ___movstrSI16
686 ___movstrSI16:
687 mov.l @(12,r5),r0
688 mov.l r0,@(12,r4)
689 .global ___movstrSI12
690 ___movstrSI12:
691 mov.l @(8,r5),r0
692 mov.l r0,@(8,r4)
693 .global ___movstrSI8
694 ___movstrSI8:
695 mov.l @(4,r5),r0
696 mov.l r0,@(4,r4)
697 .global ___movstrSI4
698 ___movstrSI4:
699 mov.l @(0,r5),r0
700 mov.l r0,@(0,r4)
701 ___movstrSI0:
702 rts
703 nop
704
705 .align 4
706
707 .global ___movstr
708 ___movstr:
709 mov.l @(60,r5),r0
710 mov.l r0,@(60,r4)
711
712 mov.l @(56,r5),r0
713 mov.l r0,@(56,r4)
714
715 mov.l @(52,r5),r0
716 mov.l r0,@(52,r4)
717
718 mov.l @(48,r5),r0
719 mov.l r0,@(48,r4)
720
721 mov.l @(44,r5),r0
722 mov.l r0,@(44,r4)
723
724 mov.l @(40,r5),r0
725 mov.l r0,@(40,r4)
726
727 mov.l @(36,r5),r0
728 mov.l r0,@(36,r4)
729
730 mov.l @(32,r5),r0
731 mov.l r0,@(32,r4)
732
733 mov.l @(28,r5),r0
734 mov.l r0,@(28,r4)
735
736 mov.l @(24,r5),r0
737 mov.l r0,@(24,r4)
738
739 mov.l @(20,r5),r0
740 mov.l r0,@(20,r4)
741
742 mov.l @(16,r5),r0
743 mov.l r0,@(16,r4)
744
745 mov.l @(12,r5),r0
746 mov.l r0,@(12,r4)
747
748 mov.l @(8,r5),r0
749 mov.l r0,@(8,r4)
750
751 mov.l @(4,r5),r0
752 mov.l r0,@(4,r4)
753
754 mov.l @(0,r5),r0
755 mov.l r0,@(0,r4)
756
757 add #-16,r6
758 cmp/pl r6
759 bf done
760
761 add #64,r5
762 bra ___movstr
763 add #64,r4
764 #endif
765
766 #ifdef L_movstr_i4
767 #if defined(__SH4__) || defined(__SH4_SINGLE__) || defined(__SH4_SINGLE_ONLY__)
768 .text
769 .global ___movstr_i4_even
770 .global ___movstr_i4_odd
771 .global ___movstrSI12_i4
772
773 .p2align 5
774 L_movstr_2mod4_end:
775 mov.l r0,@(16,r4)
776 rts
777 mov.l r1,@(20,r4)
778
779 .p2align 2
780
781 ___movstr_i4_odd:
782 mov.l @r5+,r1
783 add #-4,r4
784 mov.l @r5+,r2
785 mov.l @r5+,r3
786 mov.l r1,@(4,r4)
787 mov.l r2,@(8,r4)
788
789 L_movstr_loop:
790 mov.l r3,@(12,r4)
791 dt r6
792 mov.l @r5+,r0
793 bt/s L_movstr_2mod4_end
794 mov.l @r5+,r1
795 add #16,r4
796 L_movstr_start_even:
797 mov.l @r5+,r2
798 mov.l @r5+,r3
799 mov.l r0,@r4
800 dt r6
801 mov.l r1,@(4,r4)
802 bf/s L_movstr_loop
803 mov.l r2,@(8,r4)
804 rts
805 mov.l r3,@(12,r4)
806
807 ___movstr_i4_even:
808 mov.l @r5+,r0
809 bra L_movstr_start_even
810 mov.l @r5+,r1
811
812 .p2align 4
813 ___movstrSI12_i4:
814 mov.l @r5,r0
815 mov.l @(4,r5),r1
816 mov.l @(8,r5),r2
817 mov.l r0,@r4
818 mov.l r1,@(4,r4)
819 rts
820 mov.l r2,@(8,r4)
821 #endif /* ! __SH4__ */
822 #endif
823
824 #ifdef L_mulsi3
825
826
827 .global ___mulsi3
828
829 ! r4 = aabb
830 ! r5 = ccdd
831 ! r0 = aabb*ccdd via partial products
832 !
833 ! if aa == 0 and cc = 0
834 ! r0 = bb*dd
835 !
836 ! else
837 ! aa = bb*dd + (aa*dd*65536) + (cc*bb*65536)
838 !
839
840 ___mulsi3:
841 mulu r4,r5 ! multiply the lsws macl=bb*dd
842 mov r5,r3 ! r3 = ccdd
843 swap.w r4,r2 ! r2 = bbaa
844 xtrct r2,r3 ! r3 = aacc
845 tst r3,r3 ! msws zero ?
846 bf hiset
847 rts ! yes - then we have the answer
848 sts macl,r0
849
850 hiset: sts macl,r0 ! r0 = bb*dd
851 mulu r2,r5 ! brewing macl = aa*dd
852 sts macl,r1
853 mulu r3,r4 ! brewing macl = cc*bb
854 sts macl,r2
855 add r1,r2
856 shll16 r2
857 rts
858 add r2,r0
859
860
861 #endif
862 #ifdef L_sdivsi3_i4
863 .title "SH DIVIDE"
864 !! 4 byte integer Divide code for the Hitachi SH
865 #ifdef __SH4__
866 !! args in r4 and r5, result in fpul, clobber dr0, dr2
867
868 .global ___sdivsi3_i4
869 ___sdivsi3_i4:
870 lds r4,fpul
871 float fpul,dr0
872 lds r5,fpul
873 float fpul,dr2
874 fdiv dr2,dr0
875 rts
876 ftrc dr0,fpul
877
878 #elif defined(__SH4_SINGLE__) || defined(__SH4_SINGLE_ONLY__)
879 !! args in r4 and r5, result in fpul, clobber r2, dr0, dr2
880
881 .global ___sdivsi3_i4
882 ___sdivsi3_i4:
883 sts.l fpscr,@-r15
884 mov #8,r2
885 swap.w r2,r2
886 lds r2,fpscr
887 lds r4,fpul
888 float fpul,dr0
889 lds r5,fpul
890 float fpul,dr2
891 fdiv dr2,dr0
892 ftrc dr0,fpul
893 rts
894 lds.l @r15+,fpscr
895
896 #endif /* ! __SH4__ */
897 #endif
898
899 #ifdef L_sdivsi3
900 /* __SH4_SINGLE_ONLY__ keeps this part for link compatibility with
901 sh3e code. */
902 #if ! defined(__SH4__) && ! defined (__SH4_SINGLE__)
903 !!
904 !! Steve Chamberlain
905 !! sac@cygnus.com
906 !!
907 !!
908
909 !! args in r4 and r5, result in r0 clobber r1,r2,r3
910
911 .global ___sdivsi3
912 ___sdivsi3:
913 mov r4,r1
914 mov r5,r0
915
916 tst r0,r0
917 bt div0
918 mov #0,r2
919 div0s r2,r1
920 subc r3,r3
921 subc r2,r1
922 div0s r0,r3
923 rotcl r1
924 div1 r0,r3
925 rotcl r1
926 div1 r0,r3
927 rotcl r1
928 div1 r0,r3
929 rotcl r1
930 div1 r0,r3
931 rotcl r1
932 div1 r0,r3
933 rotcl r1
934 div1 r0,r3
935 rotcl r1
936 div1 r0,r3
937 rotcl r1
938 div1 r0,r3
939 rotcl r1
940 div1 r0,r3
941 rotcl r1
942 div1 r0,r3
943 rotcl r1
944 div1 r0,r3
945 rotcl r1
946 div1 r0,r3
947 rotcl r1
948 div1 r0,r3
949 rotcl r1
950 div1 r0,r3
951 rotcl r1
952 div1 r0,r3
953 rotcl r1
954 div1 r0,r3
955 rotcl r1
956 div1 r0,r3
957 rotcl r1
958 div1 r0,r3
959 rotcl r1
960 div1 r0,r3
961 rotcl r1
962 div1 r0,r3
963 rotcl r1
964 div1 r0,r3
965 rotcl r1
966 div1 r0,r3
967 rotcl r1
968 div1 r0,r3
969 rotcl r1
970 div1 r0,r3
971 rotcl r1
972 div1 r0,r3
973 rotcl r1
974 div1 r0,r3
975 rotcl r1
976 div1 r0,r3
977 rotcl r1
978 div1 r0,r3
979 rotcl r1
980 div1 r0,r3
981 rotcl r1
982 div1 r0,r3
983 rotcl r1
984 div1 r0,r3
985 rotcl r1
986 div1 r0,r3
987 rotcl r1
988 addc r2,r1
989 rts
990 mov r1,r0
991
992
993 div0: rts
994 mov #0,r0
995
996 #endif /* ! __SH4__ */
997 #endif
998 #ifdef L_udivsi3_i4
999
1000 .title "SH DIVIDE"
1001 !! 4 byte integer Divide code for the Hitachi SH
1002 #ifdef __SH4__
1003 !! args in r4 and r5, result in fpul, clobber r0, r1, r4, r5, dr0, dr2, dr4
1004
1005 .global ___udivsi3_i4
1006 ___udivsi3_i4:
1007 mov #1,r1
1008 cmp/hi r1,r5
1009 bf trivial
1010 rotr r1
1011 xor r1,r4
1012 lds r4,fpul
1013 mova L1,r0
1014 #ifdef FMOVD_WORKS
1015 fmov.d @r0+,dr4
1016 #else
1017 #ifdef __LITTLE_ENDIAN__
1018 fmov.s @r0+,fr5
1019 fmov.s @r0,fr4
1020 #else
1021 fmov.s @r0+,fr4
1022 fmov.s @r0,fr5
1023 #endif
1024 #endif
1025 float fpul,dr0
1026 xor r1,r5
1027 lds r5,fpul
1028 float fpul,dr2
1029 fadd dr4,dr0
1030 fadd dr4,dr2
1031 fdiv dr2,dr0
1032 rts
1033 ftrc dr0,fpul
1034
1035 trivial:
1036 rts
1037 lds r4,fpul
1038
1039 .align 2
1040 #ifdef FMOVD_WORKS
1041 .align 3 ! make double below 8 byte aligned.
1042 #endif
1043 L1:
1044 .double 2147483648
1045
1046 #elif defined(__SH4_SINGLE__) || defined(__SH4_SINGLE_ONLY__)
1047 !! args in r4 and r5, result in fpul, clobber r0, r1, r4, r5, dr0, dr2, dr4
1048
1049 .global ___udivsi3_i4
1050 ___udivsi3_i4:
1051 mov #1,r1
1052 cmp/hi r1,r5
1053 bf trivial
1054 sts.l fpscr,@-r15
1055 mova L1,r0
1056 lds.l @r0+,fpscr
1057 rotr r1
1058 xor r1,r4
1059 lds r4,fpul
1060 #ifdef FMOVD_WORKS
1061 fmov.d @r0+,dr4
1062 #else
1063 #ifdef __LITTLE_ENDIAN__
1064 fmov.s @r0+,fr5
1065 fmov.s @r0,fr4
1066 #else
1067 fmov.s @r0+,fr4
1068 fmov.s @r0,fr5
1069 #endif
1070 #endif
1071 float fpul,dr0
1072 xor r1,r5
1073 lds r5,fpul
1074 float fpul,dr2
1075 fadd dr4,dr0
1076 fadd dr4,dr2
1077 fdiv dr2,dr0
1078 ftrc dr0,fpul
1079 rts
1080 lds.l @r15+,fpscr
1081
1082 #ifdef FMOVD_WORKS
1083 .align 3 ! make double below 8 byte aligned.
1084 #endif
1085 trivial:
1086 rts
1087 lds r4,fpul
1088
1089 .align 2
1090 L1:
1091 #ifndef FMOVD_WORKS
1092 .long 0x80000
1093 #else
1094 .long 0x180000
1095 #endif
1096 .double 2147483648
1097
1098 #endif /* ! __SH4__ */
1099 #endif
1100
1101 #ifdef L_udivsi3
1102 /* __SH4_SINGLE_ONLY__ keeps this part for link compatibility with
1103 sh3e code. */
1104 #if ! defined(__SH4__) && ! defined (__SH4_SINGLE__)
1105 !!
1106 !! Steve Chamberlain
1107 !! sac@cygnus.com
1108 !!
1109 !!
1110
1111 !! args in r4 and r5, result in r0, clobbers r4, pr, and t bit
1112 .global ___udivsi3
1113
1114 ___udivsi3:
1115 longway:
1116 mov #0,r0
1117 div0u
1118 ! get one bit from the msb of the numerator into the T
1119 ! bit and divide it by whats in r5. Put the answer bit
1120 ! into the T bit so it can come out again at the bottom
1121
1122 rotcl r4 ; div1 r5,r0
1123 rotcl r4 ; div1 r5,r0
1124 rotcl r4 ; div1 r5,r0
1125 rotcl r4 ; div1 r5,r0
1126 rotcl r4 ; div1 r5,r0
1127 rotcl r4 ; div1 r5,r0
1128 rotcl r4 ; div1 r5,r0
1129 rotcl r4 ; div1 r5,r0
1130
1131 rotcl r4 ; div1 r5,r0
1132 rotcl r4 ; div1 r5,r0
1133 rotcl r4 ; div1 r5,r0
1134 rotcl r4 ; div1 r5,r0
1135 rotcl r4 ; div1 r5,r0
1136 rotcl r4 ; div1 r5,r0
1137 rotcl r4 ; div1 r5,r0
1138 rotcl r4 ; div1 r5,r0
1139 shortway:
1140 rotcl r4 ; div1 r5,r0
1141 rotcl r4 ; div1 r5,r0
1142 rotcl r4 ; div1 r5,r0
1143 rotcl r4 ; div1 r5,r0
1144 rotcl r4 ; div1 r5,r0
1145 rotcl r4 ; div1 r5,r0
1146 rotcl r4 ; div1 r5,r0
1147 rotcl r4 ; div1 r5,r0
1148
1149 vshortway:
1150 rotcl r4 ; div1 r5,r0
1151 rotcl r4 ; div1 r5,r0
1152 rotcl r4 ; div1 r5,r0
1153 rotcl r4 ; div1 r5,r0
1154 rotcl r4 ; div1 r5,r0
1155 rotcl r4 ; div1 r5,r0
1156 rotcl r4 ; div1 r5,r0
1157 rotcl r4 ; div1 r5,r0
1158 rotcl r4
1159 ret: rts
1160 mov r4,r0
1161
1162 #endif /* __SH4__ */
1163 #endif
1164 #ifdef L_set_fpscr
1165 #if defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__)
1166 .global ___set_fpscr
1167 ___set_fpscr:
1168 lds r4,fpscr
1169 mov.l ___set_fpscr_L1,r1
1170 swap.w r4,r0
1171 or #24,r0
1172 #ifndef FMOVD_WORKS
1173 xor #16,r0
1174 #endif
1175 #if defined(__SH4__)
1176 swap.w r0,r3
1177 mov.l r3,@(4,r1)
1178 #else /* defined(__SH3E__) || defined(__SH4_SINGLE*__) */
1179 swap.w r0,r2
1180 mov.l r2,@r1
1181 #endif
1182 #ifndef FMOVD_WORKS
1183 xor #8,r0
1184 #else
1185 xor #24,r0
1186 #endif
1187 #if defined(__SH4__)
1188 swap.w r0,r2
1189 rts
1190 mov.l r2,@r1
1191 #else /* defined(__SH3E__) || defined(__SH4_SINGLE*__) */
1192 swap.w r0,r3
1193 rts
1194 mov.l r3,@(4,r1)
1195 #endif
1196 .align 2
1197 ___set_fpscr_L1:
1198 .long ___fpscr_values
1199 #ifdef __ELF__
1200 .comm ___fpscr_values,8,4
1201 #else
1202 .comm ___fpscr_values,8
1203 #endif /* ELF */
1204 #endif /* SH3E / SH4 */
1205 #endif /* L_set_fpscr */
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