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1 /* Definitions of target machine for GNU compiler, for IBM RS/6000.
2 Copyright (C) 1992 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@nyu.edu)
4
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20
21
22 /* Note that some other tm.h files include this one and then override
23 many of the definitions that relate to assembler syntax. */
24
25
26 /* Names to predefine in the preprocessor for this target machine. */
27
28 #define CPP_PREDEFINES "-D_IBMR2 -D_AIX"
29
30 /* Print subsidiary information on the compiler version in use. */
31 #define TARGET_VERSION ;
32
33 /* Tell the assembler to assume that all undefined names are external.
34
35 Don't do this until the fixed IBM assembler is more generally available.
36 When this becomes permanently defined, the ASM_OUTPUT_EXTERNAL,
37 ASM_OUTPUT_EXTERNAL_LIBCALL, and RS6000_OUTPUT_BASENAME macros will no
38 longer be needed. Also, the extern declaration of mcount in ASM_FILE_START
39 will no longer be needed. */
40
41 /* #define ASM_SPEC "-u" */
42
43 /* Define the options for the binder: Start text at 512, align all segments
44 to 512 bytes, and warn if there is text relocation.
45
46 The -bhalt:4 option supposedly changes the level at which ld will abort,
47 but it also suppresses warnings about multiply defined symbols and is
48 used by the AIX cc command. So we use it here.
49
50 -bnodelcsect undoes a poor choice of default relating to multiply-defined
51 csects. See AIX documentation for more information about this. */
52
53 #define LINK_SPEC "-T512 -H512 -btextro -bhalt:4 -bnodelcsect\
54 %{static:-bnso -bI:/lib/syscalls.exp}"
55
56 /* Profiled library versions are used by linking with special directories. */
57 #define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\
58 %{p:-L/lib/profiled -L/usr/lib/profiled} %{g*:-lg} -lc"
59
60 /* gcc must do the search itself to find libgcc.a, not use -l. */
61 #define LINK_LIBGCC_SPECIAL_1
62
63 /* Don't turn -B into -L if the argument specifies a relative file name. */
64 #define RELATIVE_PREFIX_NOT_LINKDIR
65
66 /* Run-time compilation parameters selecting different hardware subsets. */
67
68 /* Flag to allow putting fp constants in the TOC; can be turned off when
69 the TOC overflows. */
70
71 #define TARGET_FP_IN_TOC (target_flags & 1)
72
73 extern int target_flags;
74
75 /* Macro to define tables used to set the flags.
76 This is a list in braces of pairs in braces,
77 each pair being { "NAME", VALUE }
78 where VALUE is the bits to set or minus the bits to clear.
79 An empty string NAME is used to identify the default VALUE. */
80
81 #define TARGET_SWITCHES \
82 {{"fp-in-toc", 1}, \
83 {"no-fp-in-toc", -1}, \
84 { "", TARGET_DEFAULT}}
85
86 #define TARGET_DEFAULT 1
87
88 /* On the RS/6000, we turn on various flags if optimization is selected. */
89
90 #define OPTIMIZATION_OPTIONS(LEVEL) \
91 { \
92 if ((LEVEL) > 0) \
93 { \
94 flag_force_mem = 1; \
95 flag_omit_frame_pointer = 1; \
96 } \
97 }
98
99 /* Define this to modify the options specified by the user. */
100
101 #define OVERRIDE_OPTIONS \
102 { \
103 profile_block_flag = 0; \
104 }
105 \f
106 /* target machine storage layout */
107
108 /* Define this macro if it is advisable to hold scalars in registers
109 in a wider mode than that declared by the program. In such cases,
110 the value is constrained to be within the bounds of the declared
111 type, but kept valid in the wider mode. The signedness of the
112 extension may differ from that of the type. */
113
114 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
115 if (GET_MODE_CLASS (MODE) == MODE_INT \
116 && GET_MODE_SIZE (MODE) < 4) \
117 (MODE) = SImode;
118
119 /* Define this if most significant bit is lowest numbered
120 in instructions that operate on numbered bit-fields. */
121 /* That is true on RS/6000. */
122 #define BITS_BIG_ENDIAN 1
123
124 /* Define this if most significant byte of a word is the lowest numbered. */
125 /* That is true on RS/6000. */
126 #define BYTES_BIG_ENDIAN 1
127
128 /* Define this if most significant word of a multiword number is lowest
129 numbered.
130
131 For RS/6000 we can decide arbitrarily since there are no machine
132 instructions for them. Might as well be consistent with bits and bytes. */
133 #define WORDS_BIG_ENDIAN 1
134
135 /* number of bits in an addressable storage unit */
136 #define BITS_PER_UNIT 8
137
138 /* Width in bits of a "word", which is the contents of a machine register.
139 Note that this is not necessarily the width of data type `int';
140 if using 16-bit ints on a 68000, this would still be 32.
141 But on a machine with 16-bit registers, this would be 16. */
142 #define BITS_PER_WORD 32
143
144 /* Width of a word, in units (bytes). */
145 #define UNITS_PER_WORD 4
146
147 /* Type used for ptrdiff_t, as a string used in a declaration. */
148 #define PTRDIFF_TYPE "int"
149
150 /* Type used for wchar_t, as a string used in a declaration. */
151 #define WCHAR_TYPE "short unsigned int"
152
153 /* Width of wchar_t in bits. */
154 #define WCHAR_TYPE_SIZE 16
155
156 /* Width in bits of a pointer.
157 See also the macro `Pmode' defined below. */
158 #define POINTER_SIZE 32
159
160 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
161 #define PARM_BOUNDARY 32
162
163 /* Boundary (in *bits*) on which stack pointer should be aligned. */
164 #define STACK_BOUNDARY 64
165
166 /* Allocation boundary (in *bits*) for the code of a function. */
167 #define FUNCTION_BOUNDARY 32
168
169 /* No data type wants to be aligned rounder than this. */
170 #define BIGGEST_ALIGNMENT 32
171
172 /* Alignment of field after `int : 0' in a structure. */
173 #define EMPTY_FIELD_BOUNDARY 32
174
175 /* Every structure's size must be a multiple of this. */
176 #define STRUCTURE_SIZE_BOUNDARY 8
177
178 /* A bitfield declared as `int' forces `int' alignment for the struct. */
179 #define PCC_BITFIELD_TYPE_MATTERS 1
180
181 /* Make strings word-aligned so strcpy from constants will be faster. */
182 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
183 (TREE_CODE (EXP) == STRING_CST \
184 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
185
186 /* Make arrays of chars word-aligned for the same reasons. */
187 #define DATA_ALIGNMENT(TYPE, ALIGN) \
188 (TREE_CODE (TYPE) == ARRAY_TYPE \
189 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
190 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
191
192 /* Non-zero if move instructions will actually fail to work
193 when given unaligned data. */
194 #define STRICT_ALIGNMENT 0
195 \f
196 /* Standard register usage. */
197
198 /* Number of actual hardware registers.
199 The hardware registers are assigned numbers for the compiler
200 from 0 to just below FIRST_PSEUDO_REGISTER.
201 All registers that the compiler knows about must be given numbers,
202 even those that are not normally considered general registers.
203
204 RS/6000 has 32 fixed-point registers, 32 floating-point registers,
205 an MQ register, a count register, a link register, and 8 condition
206 register fields, which we view here as separate registers.
207
208 In addition, the difference between the frame and argument pointers is
209 a function of the number of registers saved, so we need to have a
210 register for AP that will later be eliminated in favor of SP or FP.
211 This is a normal register, but it is fixed. */
212
213 #define FIRST_PSEUDO_REGISTER 76
214
215 /* 1 for registers that have pervasive standard uses
216 and are not available for the register allocator.
217
218 On RS/6000, r1 is used for the stack and r2 is used as the TOC pointer.
219
220 cr5 is not supposed to be used. */
221
222 #define FIXED_REGISTERS \
223 {0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
224 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
225 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
226 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
227 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0}
228
229 /* 1 for registers not available across function calls.
230 These must include the FIXED_REGISTERS and also any
231 registers that can be used without being saved.
232 The latter must include the registers where values are returned
233 and the register where structure-value addresses are passed.
234 Aside from that, you can include as many other registers as you like. */
235
236 #define CALL_USED_REGISTERS \
237 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, \
238 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
239 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
240 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
241 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1}
242
243 /* List the order in which to allocate registers. Each register must be
244 listed once, even those in FIXED_REGISTERS.
245
246 We allocate in the following order:
247 fp0 (not saved or used for anything)
248 fp13 - fp2 (not saved; incoming fp arg registers)
249 fp1 (not saved; return value)
250 fp31 - fp14 (saved; order given to save least number)
251 cr1, cr6, cr7 (not saved or special)
252 cr0 (not saved, but used for arithmetic operations)
253 cr2, cr3, cr4 (saved)
254 r0 (not saved; cannot be base reg)
255 r9 (not saved; best for TImode)
256 r11, r10, r8-r4 (not saved; highest used first to make less conflict)
257 r3 (not saved; return value register)
258 r31 - r13 (saved; order given to save least number)
259 r12 (not saved; if used for DImode or DFmode would use r13)
260 mq (not saved; best to use it if we can)
261 ctr (not saved; when we have the choice ctr is better)
262 lr (saved)
263 cr5, r1, r2, ap (fixed) */
264
265 #define REG_ALLOC_ORDER \
266 {32, \
267 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, \
268 33, \
269 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \
270 50, 49, 48, 47, 46, \
271 69, 74, 75, 68, 70, 71, 72, \
272 0, \
273 9, 11, 10, 8, 7, 6, 5, 4, \
274 3, \
275 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, \
276 18, 17, 16, 15, 14, 13, 12, \
277 64, 66, 65, \
278 73, 1, 2, 67}
279
280 /* True if register is floating-point. */
281 #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 63)
282
283 /* True if register is a condition register. */
284 #define CR_REGNO_P(N) ((N) >= 68 && (N) <= 75)
285
286 /* True if register is an integer register. */
287 #define INT_REGNO_P(N) ((N) <= 31 || (N) == 67)
288
289 /* Return number of consecutive hard regs needed starting at reg REGNO
290 to hold something of mode MODE.
291 This is ordinarily the length in words of a value of mode MODE
292 but can be less for certain modes in special long registers.
293
294 On RS/6000, ordinary registers hold 32 bits worth;
295 a single floating point register holds 64 bits worth. */
296
297 #define HARD_REGNO_NREGS(REGNO, MODE) \
298 (FP_REGNO_P (REGNO) \
299 ? ((GET_MODE_SIZE (MODE) + 2 * UNITS_PER_WORD - 1) / (2 * UNITS_PER_WORD)) \
300 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
301
302 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
303 On RS/6000, the cpu registers can hold any mode but the float registers
304 can hold only floating modes and CR register can only hold CC modes. We
305 cannot put DImode or TImode anywhere except general register and they
306 must be able to fit within the register set. */
307
308 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
309 (FP_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_FLOAT \
310 : CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \
311 : ! INT_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_INT \
312 : 1)
313
314 /* Value is 1 if it is a good idea to tie two pseudo registers
315 when one has mode MODE1 and one has mode MODE2.
316 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
317 for any hard reg, then this must be 0 for correct output. */
318 #define MODES_TIEABLE_P(MODE1, MODE2) \
319 (GET_MODE_CLASS (MODE1) == MODE_FLOAT \
320 ? GET_MODE_CLASS (MODE2) == MODE_FLOAT \
321 : GET_MODE_CLASS (MODE2) == MODE_FLOAT \
322 ? GET_MODE_CLASS (MODE1) == MODE_FLOAT \
323 : GET_MODE_CLASS (MODE1) == MODE_CC \
324 ? GET_MODE_CLASS (MODE2) == MODE_CC \
325 : GET_MODE_CLASS (MODE2) == MODE_CC \
326 ? GET_MODE_CLASS (MODE1) == MODE_CC \
327 : 1)
328
329 /* A C expression returning the cost of moving data from a register of class
330 CLASS1 to one of CLASS2.
331
332 On the RS/6000, copying between floating-point and fixed-point
333 registers is expensive. */
334
335 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
336 ((CLASS1) == FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 2 \
337 : (CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS ? 10 \
338 : (CLASS1) != FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 10 \
339 : 2)
340
341 /* A C expressions returning the cost of moving data of MODE from a register to
342 or from memory.
343
344 On the RS/6000, bump this up a bit. */
345
346 #define MEMORY_MOVE_COST(MODE) 6
347
348 /* Specify the cost of a branch insn; roughly the number of extra insns that
349 should be added to avoid a branch.
350
351 Set this to 3 on the RS/6000 since that is roughly the average cost of an
352 unscheduled conditional branch. */
353
354 #define BRANCH_COST 3
355
356 /* A C statement (sans semicolon) to update the integer variable COST
357 based on the relationship between INSN that is dependent on
358 DEP_INSN through the dependence LINK. The default is to make no
359 adjustment to COST. On the RS/6000, ignore the cost of anti- and
360 output-dependencies. In fact, output dependencies on the CR do have
361 a cost, but it is probably not worthwhile to track it. */
362
363 #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
364 if (REG_NOTE_KIND (LINK) != 0) \
365 (COST) = 0; /* Anti or output dependence. */
366
367 /* Specify the registers used for certain standard purposes.
368 The values of these macros are register numbers. */
369
370 /* RS/6000 pc isn't overloaded on a register that the compiler knows about. */
371 /* #define PC_REGNUM */
372
373 /* Register to use for pushing function arguments. */
374 #define STACK_POINTER_REGNUM 1
375
376 /* Base register for access to local variables of the function. */
377 #define FRAME_POINTER_REGNUM 31
378
379 /* Value should be nonzero if functions must have frame pointers.
380 Zero means the frame pointer need not be set up (and parms
381 may be accessed via the stack pointer) in functions that seem suitable.
382 This is computed in `reload', in reload1.c. */
383 #define FRAME_POINTER_REQUIRED 0
384
385 /* Base register for access to arguments of the function. */
386 #define ARG_POINTER_REGNUM 67
387
388 /* Place to put static chain when calling a function that requires it. */
389 #define STATIC_CHAIN_REGNUM 11
390
391 /* Place that structure value return address is placed.
392
393 On the RS/6000, it is passed as an extra parameter. */
394 #define STRUCT_VALUE 0
395 \f
396 /* Define the classes of registers for register constraints in the
397 machine description. Also define ranges of constants.
398
399 One of the classes must always be named ALL_REGS and include all hard regs.
400 If there is more than one class, another class must be named NO_REGS
401 and contain no registers.
402
403 The name GENERAL_REGS must be the name of a class (or an alias for
404 another name such as ALL_REGS). This is the class of registers
405 that is allowed by "g" or "r" in a register constraint.
406 Also, registers outside this class are allocated only when
407 instructions express preferences for them.
408
409 The classes must be numbered in nondecreasing order; that is,
410 a larger-numbered class must never be contained completely
411 in a smaller-numbered class.
412
413 For any two classes, it is very desirable that there be another
414 class that represents their union. */
415
416 /* The RS/6000 has three types of registers, fixed-point, floating-point,
417 and condition registers, plus three special registers, MQ, CTR, and the
418 link register.
419
420 However, r0 is special in that it cannot be used as a base register.
421 So make a class for registers valid as base registers.
422
423 Also, cr0 is the only condition code register that can be used in
424 arithmetic insns, so make a separate class for it. */
425
426 enum reg_class { NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS,
427 NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS,
428 SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS, CR_REGS, NON_FLOAT_REGS,
429 ALL_REGS, LIM_REG_CLASSES };
430
431 #define N_REG_CLASSES (int) LIM_REG_CLASSES
432
433 /* Give names of register classes as strings for dump file. */
434
435 #define REG_CLASS_NAMES \
436 { "NO_REGS", "BASE_REGS", "GENERAL_REGS", "FLOAT_REGS", \
437 "NON_SPECIAL_REGS", "MQ_REGS", "LINK_REGS", "CTR_REGS", \
438 "LINK_OR_CTR_REGS", "SPECIAL_REGS", "SPEC_OR_GEN_REGS", \
439 "CR0_REGS", "CR_REGS", "NON_FLOAT_REGS", "ALL_REGS" }
440
441 /* Define which registers fit in which classes.
442 This is an initializer for a vector of HARD_REG_SET
443 of length N_REG_CLASSES. */
444
445 #define REG_CLASS_CONTENTS \
446 { {0, 0, 0}, {0xfffffffe, 0, 8}, {~0, 0, 8}, \
447 {0, ~0, 0}, {~0, ~0, 8}, {0, 0, 1}, {0, 0, 2}, \
448 {0, 0, 4}, {0, 0, 6}, {0, 0, 7}, {~0, 0, 15}, \
449 {0, 0, 16}, {0, 0, 0xff0}, {~0, 0, 0xffff}, \
450 {~0, ~0, 0xffff} }
451
452 /* The same information, inverted:
453 Return the class number of the smallest class containing
454 reg number REGNO. This could be a conditional expression
455 or could index an array. */
456
457 #define REGNO_REG_CLASS(REGNO) \
458 ((REGNO) == 0 ? GENERAL_REGS \
459 : (REGNO) < 32 ? BASE_REGS \
460 : FP_REGNO_P (REGNO) ? FLOAT_REGS \
461 : (REGNO) == 68 ? CR0_REGS \
462 : CR_REGNO_P (REGNO) ? CR_REGS \
463 : (REGNO) == 64 ? MQ_REGS \
464 : (REGNO) == 65 ? LINK_REGS \
465 : (REGNO) == 66 ? CTR_REGS \
466 : (REGNO) == 67 ? BASE_REGS \
467 : NO_REGS)
468
469 /* The class value for index registers, and the one for base regs. */
470 #define INDEX_REG_CLASS GENERAL_REGS
471 #define BASE_REG_CLASS BASE_REGS
472
473 /* Get reg_class from a letter such as appears in the machine description. */
474
475 #define REG_CLASS_FROM_LETTER(C) \
476 ((C) == 'f' ? FLOAT_REGS \
477 : (C) == 'b' ? BASE_REGS \
478 : (C) == 'h' ? SPECIAL_REGS \
479 : (C) == 'q' ? MQ_REGS \
480 : (C) == 'c' ? CTR_REGS \
481 : (C) == 'l' ? LINK_REGS \
482 : (C) == 'x' ? CR0_REGS \
483 : (C) == 'y' ? CR_REGS \
484 : NO_REGS)
485
486 /* The letters I, J, K, L, M, N, and P in a register constraint string
487 can be used to stand for particular ranges of immediate operands.
488 This macro defines what the ranges are.
489 C is the letter, and VALUE is a constant value.
490 Return 1 if VALUE is in the range specified by C.
491
492 `I' is signed 16-bit constants
493 `J' is a constant with only the high-order 16 bits non-zero
494 `K' is a constant with only the low-order 16 bits non-zero
495 `L' is a constant that can be placed into a mask operand
496 `M' is a constant that is greater than 31
497 `N' is a constant that is an exact power of two
498 `O' is the constant zero
499 `P' is a constant whose negation is a signed 16-bit constant */
500
501 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
502 ( (C) == 'I' ? (unsigned) ((VALUE) + 0x8000) < 0x10000 \
503 : (C) == 'J' ? ((VALUE) & 0xffff) == 0 \
504 : (C) == 'K' ? ((VALUE) & 0xffff0000) == 0 \
505 : (C) == 'L' ? mask_constant (VALUE) \
506 : (C) == 'M' ? (VALUE) > 31 \
507 : (C) == 'N' ? exact_log2 (VALUE) >= 0 \
508 : (C) == 'O' ? (VALUE) == 0 \
509 : (C) == 'P' ? (unsigned) ((- (VALUE)) + 0x8000) < 0x1000 \
510 : 0)
511
512 /* Similar, but for floating constants, and defining letters G and H.
513 Here VALUE is the CONST_DOUBLE rtx itself.
514
515 We flag for special constants when we can copy the constant into
516 a general register in two insns for DF and one insn for SF. */
517
518 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
519 ((C) == 'G' ? easy_fp_constant (VALUE, GET_MODE (VALUE)) : 0)
520
521 /* Optional extra constraints for this machine.
522
523 For the RS/6000, `Q' means that this is a memory operand that is just
524 an offset from a register. */
525
526 #define EXTRA_CONSTRAINT(OP, C) \
527 ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \
528 : 0)
529
530 /* Given an rtx X being reloaded into a reg required to be
531 in class CLASS, return the class of reg to actually use.
532 In general this is just CLASS; but on some machines
533 in some cases it is preferable to use a more restrictive class.
534
535 On the RS/6000, we have to return NO_REGS when we want to reload a
536 floating-point CONST_DOUBLE to force it to be copied to memory. */
537
538 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
539 ((GET_CODE (X) == CONST_DOUBLE \
540 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
541 ? NO_REGS : (CLASS))
542
543 /* Return the register class of a scratch register needed to copy IN into
544 or out of a register in CLASS in MODE. If it can be done directly,
545 NO_REGS is returned. */
546
547 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
548 secondary_reload_class (CLASS, MODE, IN)
549
550 /* Return the maximum number of consecutive registers
551 needed to represent mode MODE in a register of class CLASS.
552
553 On RS/6000, this is the size of MODE in words,
554 except in the FP regs, where a single reg is enough for two words. */
555 #define CLASS_MAX_NREGS(CLASS, MODE) \
556 ((CLASS) == FLOAT_REGS \
557 ? ((GET_MODE_SIZE (MODE) + 2 * UNITS_PER_WORD - 1) / (2 * UNITS_PER_WORD)) \
558 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
559 \f
560 /* Stack layout; function entry, exit and calling. */
561
562 /* Define this if pushing a word on the stack
563 makes the stack pointer a smaller address. */
564 #define STACK_GROWS_DOWNWARD
565
566 /* Define this if the nominal address of the stack frame
567 is at the high-address end of the local variables;
568 that is, each additional local variable allocated
569 goes at a more negative offset in the frame.
570
571 On the RS/6000, we grow upwards, from the area after the outgoing
572 arguments. */
573 /* #define FRAME_GROWS_DOWNWARD */
574
575 /* Offset within stack frame to start allocating local variables at.
576 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
577 first local allocated. Otherwise, it is the offset to the BEGINNING
578 of the first local allocated.
579
580 On the RS/6000, the frame pointer is the same as the stack pointer,
581 except for dynamic allocations. So we start after the fixed area and
582 outgoing parameter area. */
583
584 #define STARTING_FRAME_OFFSET (current_function_outgoing_args_size + 24)
585
586 /* If we generate an insn to push BYTES bytes,
587 this says how many the stack pointer really advances by.
588 On RS/6000, don't define this because there are no push insns. */
589 /* #define PUSH_ROUNDING(BYTES) */
590
591 /* Offset of first parameter from the argument pointer register value.
592 On the RS/6000, we define the argument pointer to the start of the fixed
593 area. */
594 #define FIRST_PARM_OFFSET(FNDECL) 24
595
596 /* Define this if stack space is still allocated for a parameter passed
597 in a register. The value is the number of bytes allocated to this
598 area. */
599 #define REG_PARM_STACK_SPACE(FNDECL) 32
600
601 /* Define this if the above stack space is to be considered part of the
602 space allocated by the caller. */
603 #define OUTGOING_REG_PARM_STACK_SPACE
604
605 /* This is the difference between the logical top of stack and the actual sp.
606
607 For the RS/6000, sp points past the fixed area. */
608 #define STACK_POINTER_OFFSET 24
609
610 /* Define this if the maximum size of all the outgoing args is to be
611 accumulated and pushed during the prologue. The amount can be
612 found in the variable current_function_outgoing_args_size. */
613 #define ACCUMULATE_OUTGOING_ARGS
614
615 /* Value is the number of bytes of arguments automatically
616 popped when returning from a subroutine call.
617 FUNTYPE is the data type of the function (as a tree),
618 or for a library call it is an identifier node for the subroutine name.
619 SIZE is the number of bytes of arguments passed on the stack. */
620
621 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
622
623 /* Define how to find the value returned by a function.
624 VALTYPE is the data type of the value (as a tree).
625 If the precise function being called is known, FUNC is its FUNCTION_DECL;
626 otherwise, FUNC is 0.
627
628 On RS/6000 an integer value is in r3 and a floating-point value is in
629 fp1. */
630
631 #define FUNCTION_VALUE(VALTYPE, FUNC) \
632 gen_rtx (REG, TYPE_MODE (VALTYPE), \
633 TREE_CODE (VALTYPE) == REAL_TYPE ? 33 : 3)
634
635 /* Define how to find the value returned by a library function
636 assuming the value has mode MODE. */
637
638 #define LIBCALL_VALUE(MODE) \
639 gen_rtx (REG, MODE, GET_MODE_CLASS (MODE) == MODE_FLOAT ? 33 : 3)
640
641 /* The definition of this macro implies that there are cases where
642 a scalar value cannot be returned in registers.
643
644 For the RS/6000, any structure or union type is returned in memory. */
645
646 #define RETURN_IN_MEMORY(TYPE) \
647 (TYPE_MODE (TYPE) == BLKmode)
648
649 /* 1 if N is a possible register number for a function value
650 as seen by the caller.
651
652 On RS/6000, this is r3 and fp1. */
653
654 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 3 || ((N) == 33))
655
656 /* 1 if N is a possible register number for function argument passing.
657 On RS/6000, these are r3-r10 and fp1-fp13. */
658
659 #define FUNCTION_ARG_REGNO_P(N) \
660 (((N) <= 10 && (N) >= 3) || ((N) >= 33 && (N) <= 45))
661 \f
662 /* Define a data type for recording info about an argument list
663 during the scan of that argument list. This data type should
664 hold all necessary information about the function itself
665 and about the args processed so far, enough to enable macros
666 such as FUNCTION_ARG to determine where the next arg should go.
667
668 On the RS/6000, this is a structure. The first element is the number of
669 total argument words, the second is used to store the next
670 floating-point register number, and the third says how many more args we
671 have prototype types for. */
672
673 struct rs6000_args {int words, fregno, nargs_prototype; };
674 #define CUMULATIVE_ARGS struct rs6000_args
675
676 /* Define intermediate macro to compute the size (in registers) of an argument
677 for the RS/6000. */
678
679 #define RS6000_ARG_SIZE(MODE, TYPE, NAMED) \
680 (! (NAMED) ? 0 \
681 : (MODE) != BLKmode \
682 ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
683 : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
684
685 /* Initialize a variable CUM of type CUMULATIVE_ARGS
686 for a call to a function whose data type is FNTYPE.
687 For a library call, FNTYPE is 0. */
688
689 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
690 (CUM).words = 0, \
691 (CUM).fregno = 33, \
692 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
693 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
694 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
695 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
696 : 0)
697
698 /* Similar, but when scanning the definition of a procedure. We always
699 set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */
700
701 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
702 (CUM).words = 0, \
703 (CUM).fregno = 33, \
704 (CUM).nargs_prototype = 1000
705
706 /* Update the data in CUM to advance over an argument
707 of mode MODE and data type TYPE.
708 (TYPE is null for libcalls where that information may not be available.) */
709
710 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
711 { (CUM).nargs_prototype--; \
712 if (NAMED) \
713 { \
714 (CUM).words += RS6000_ARG_SIZE (MODE, TYPE, NAMED); \
715 if (GET_MODE_CLASS (MODE) == MODE_FLOAT) \
716 (CUM).fregno++; \
717 } \
718 }
719
720 /* Non-zero if we can use a floating-point register to pass this arg. */
721 #define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \
722 (GET_MODE_CLASS (MODE) == MODE_FLOAT && (CUM).fregno < 46)
723
724 /* Determine where to put an argument to a function.
725 Value is zero to push the argument on the stack,
726 or a hard register in which to store the argument.
727
728 MODE is the argument's machine mode.
729 TYPE is the data type of the argument (as a tree).
730 This is null for libcalls where that information may
731 not be available.
732 CUM is a variable of type CUMULATIVE_ARGS which gives info about
733 the preceding args and about the function being called.
734 NAMED is nonzero if this argument is a named parameter
735 (otherwise it is an extra parameter matching an ellipsis).
736
737 On RS/6000 the first eight words of non-FP are normally in registers
738 and the rest are pushed. The first 13 FP args are in registers.
739
740 If this is floating-point and no prototype is specified, we use
741 both an FP and integer register (or possibly FP reg and stack). Library
742 functions (when TYPE is zero) always have the proper types for args,
743 so we can pass the FP value just in one register. emit_library_function
744 doesn't support EXPR_LIST anyway. */
745
746 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
747 (! (NAMED) ? 0 \
748 : ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST) ? 0 \
749 : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) \
750 ? ((CUM).nargs_prototype > 0 || (TYPE) == 0 \
751 ? gen_rtx (REG, MODE, (CUM).fregno) \
752 : ((CUM).words < 8 \
753 ? gen_rtx (EXPR_LIST, VOIDmode, \
754 gen_rtx (REG, (MODE), 3 + (CUM).words), \
755 gen_rtx (REG, (MODE), (CUM).fregno)) \
756 : gen_rtx (EXPR_LIST, VOIDmode, 0, \
757 gen_rtx (REG, (MODE), (CUM).fregno)))) \
758 : (CUM).words < 8 ? gen_rtx(REG, (MODE), 3 + (CUM).words) : 0)
759
760 /* For an arg passed partly in registers and partly in memory,
761 this is the number of registers used.
762 For args passed entirely in registers or entirely in memory, zero. */
763
764 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
765 (! (NAMED) ? 0 \
766 : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) && (CUM).nargs_prototype >= 0 ? 0 \
767 : (((CUM).words < 8 \
768 && 8 < ((CUM).words + RS6000_ARG_SIZE (MODE, TYPE, NAMED))) \
769 ? 8 - (CUM).words : 0))
770
771 /* Perform any needed actions needed for a function that is receiving a
772 variable number of arguments.
773
774 CUM is as above.
775
776 MODE and TYPE are the mode and type of the current parameter.
777
778 PRETEND_SIZE is a variable that should be set to the amount of stack
779 that must be pushed by the prolog to pretend that our caller pushed
780 it.
781
782 Normally, this macro will push all remaining incoming registers on the
783 stack and set PRETEND_SIZE to the length of the registers pushed. */
784
785 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
786 { if ((CUM).words < 8) \
787 { \
788 int first_reg_offset = (CUM).words; \
789 \
790 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
791 first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \
792 \
793 if (first_reg_offset > 8) \
794 first_reg_offset = 8; \
795 \
796 if (! (NO_RTL) && first_reg_offset != 8) \
797 move_block_from_reg \
798 (3 + first_reg_offset, \
799 gen_rtx (MEM, BLKmode, \
800 plus_constant (virtual_incoming_args_rtx, \
801 first_reg_offset * 4)), \
802 8 - first_reg_offset); \
803 PRETEND_SIZE = (8 - first_reg_offset) * UNITS_PER_WORD; \
804 } \
805 }
806
807 /* This macro generates the assembly code for function entry.
808 FILE is a stdio stream to output the code to.
809 SIZE is an int: how many units of temporary storage to allocate.
810 Refer to the array `regs_ever_live' to determine which registers
811 to save; `regs_ever_live[I]' is nonzero if register number I
812 is ever used in the function. This macro is responsible for
813 knowing which registers should not be saved even if used. */
814
815 #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
816
817 /* Output assembler code to FILE to increment profiler label # LABELNO
818 for profiling a function entry. */
819
820 #define FUNCTION_PROFILER(FILE, LABELNO) \
821 output_function_profiler ((FILE), (LABELNO));
822
823 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
824 the stack pointer does not matter. No definition is equivalent to
825 always zero.
826
827 On the RS/6000, this is non-zero because we can restore the stack from
828 its backpointer, which we maintain. */
829 #define EXIT_IGNORE_STACK 1
830
831 /* This macro generates the assembly code for function exit,
832 on machines that need it. If FUNCTION_EPILOGUE is not defined
833 then individual return instructions are generated for each
834 return statement. Args are same as for FUNCTION_PROLOGUE.
835
836 The function epilogue should not depend on the current stack pointer!
837 It should use the frame pointer only. This is mandatory because
838 of alloca; we also take advantage of it to omit stack adjustments
839 before returning. */
840
841 #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
842 \f
843 /* Output assembler code for a block containing the constant parts
844 of a trampoline, leaving space for the variable parts.
845
846 The trampoline should set the static chain pointer to value placed
847 into the trampoline and should branch to the specified routine.
848
849 On the RS/6000, this is not code at all, but merely a data area,
850 since that is the way all functions are called. The first word is
851 the address of the function, the second word is the TOC pointer (r2),
852 and the third word is the static chain value. */
853
854 #define TRAMPOLINE_TEMPLATE(FILE) { fprintf (FILE, "\t.long 0, 0, 0\n"); }
855
856 /* Length in units of the trampoline for entering a nested function. */
857
858 #define TRAMPOLINE_SIZE 12
859
860 /* Emit RTL insns to initialize the variable parts of a trampoline.
861 FNADDR is an RTX for the address of the function's pure code.
862 CXT is an RTX for the static chain value for the function. */
863
864 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
865 { \
866 emit_move_insn (gen_rtx (MEM, SImode, \
867 memory_address (SImode, (ADDR))), \
868 gen_rtx (MEM, SImode, \
869 memory_address (SImode, (FNADDR)))); \
870 emit_move_insn (gen_rtx (MEM, SImode, \
871 memory_address (SImode, \
872 plus_constant ((ADDR), 4))), \
873 gen_rtx (MEM, SImode, \
874 memory_address (SImode, \
875 plus_constant ((FNADDR), 4)))); \
876 emit_move_insn (gen_rtx (MEM, SImode, \
877 memory_address (SImode, \
878 plus_constant ((ADDR), 8))), \
879 force_reg (SImode, (CXT))); \
880 }
881 \f
882 /* Definitions for register eliminations.
883
884 We have two registers that can be eliminated on the RS/6000. First, the
885 frame pointer register can often be eliminated in favor of the stack
886 pointer register. Secondly, the argument pointer register can always be
887 eliminated; it is replaced with either the stack or frame pointer. */
888
889 /* This is an array of structures. Each structure initializes one pair
890 of eliminable registers. The "from" register number is given first,
891 followed by "to". Eliminations of the same "from" register are listed
892 in order of preference. */
893 #define ELIMINABLE_REGS \
894 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
895 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
896 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM} }
897
898 /* Given FROM and TO register numbers, say whether this elimination is allowed.
899 Frame pointer elimination is automatically handled.
900
901 For the RS/6000, if frame pointer elimination is being done, we would like
902 to convert ap into fp, not sp. */
903
904 #define CAN_ELIMINATE(FROM, TO) \
905 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
906 ? ! frame_pointer_needed \
907 : 1)
908
909 /* Define the offset between two registers, one to be eliminated, and the other
910 its replacement, at the start of a routine. */
911 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
912 { \
913 int total_stack_size = (rs6000_sa_size () + get_frame_size () \
914 + current_function_outgoing_args_size); \
915 \
916 total_stack_size = (total_stack_size + 7) & ~7; \
917 \
918 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
919 { \
920 if (rs6000_pushes_stack ()) \
921 (OFFSET) = 0; \
922 else \
923 (OFFSET) = - total_stack_size; \
924 } \
925 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
926 (OFFSET) = total_stack_size; \
927 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
928 { \
929 if (rs6000_pushes_stack ()) \
930 (OFFSET) = total_stack_size; \
931 else \
932 (OFFSET) = 0; \
933 } \
934 else \
935 abort (); \
936 }
937 \f
938 /* Addressing modes, and classification of registers for them. */
939
940 /* #define HAVE_POST_INCREMENT */
941 /* #define HAVE_POST_DECREMENT */
942
943 #define HAVE_PRE_DECREMENT
944 #define HAVE_PRE_INCREMENT
945
946 /* Macros to check register numbers against specific register classes. */
947
948 /* These assume that REGNO is a hard or pseudo reg number.
949 They give nonzero only if REGNO is a hard reg of the suitable class
950 or a pseudo reg currently allocated to a suitable hard reg.
951 Since they use reg_renumber, they are safe only once reg_renumber
952 has been allocated, which happens in local-alloc.c. */
953
954 #define REGNO_OK_FOR_INDEX_P(REGNO) \
955 ((REGNO) < FIRST_PSEUDO_REGISTER \
956 ? (REGNO) <= 31 || (REGNO) == 67 \
957 : (reg_renumber[REGNO] >= 0 \
958 && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67)))
959
960 #define REGNO_OK_FOR_BASE_P(REGNO) \
961 ((REGNO) < FIRST_PSEUDO_REGISTER \
962 ? ((REGNO) > 0 && (REGNO) <= 31) || (REGNO) == 67 \
963 : (reg_renumber[REGNO] > 0 \
964 && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67)))
965 \f
966 /* Maximum number of registers that can appear in a valid memory address. */
967
968 #define MAX_REGS_PER_ADDRESS 2
969
970 /* Recognize any constant value that is a valid address. */
971
972 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
973
974 /* Nonzero if the constant value X is a legitimate general operand.
975 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
976
977 On the RS/6000, all integer constants are acceptable, most won't be valid
978 for particular insns, though. Only easy FP constants are
979 acceptable. */
980
981 #define LEGITIMATE_CONSTANT_P(X) \
982 (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \
983 || easy_fp_constant (X, GET_MODE (X)))
984
985 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
986 and check its validity for a certain class.
987 We have two alternate definitions for each of them.
988 The usual definition accepts all pseudo regs; the other rejects
989 them unless they have been allocated suitable hard regs.
990 The symbol REG_OK_STRICT causes the latter definition to be used.
991
992 Most source files want to accept pseudo regs in the hope that
993 they will get allocated to the class that the insn wants them to be in.
994 Source files for reload pass need to be strict.
995 After reload, it makes no difference, since pseudo regs have
996 been eliminated by then. */
997
998 #ifndef REG_OK_STRICT
999
1000 /* Nonzero if X is a hard reg that can be used as an index
1001 or if it is a pseudo reg. */
1002 #define REG_OK_FOR_INDEX_P(X) \
1003 (REGNO (X) <= 31 || REGNO (X) == 67 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1004
1005 /* Nonzero if X is a hard reg that can be used as a base reg
1006 or if it is a pseudo reg. */
1007 #define REG_OK_FOR_BASE_P(X) \
1008 (REGNO (X) > 0 && REG_OK_FOR_INDEX_P (X))
1009
1010 #else
1011
1012 /* Nonzero if X is a hard reg that can be used as an index. */
1013 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1014 /* Nonzero if X is a hard reg that can be used as a base reg. */
1015 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1016
1017 #endif
1018 \f
1019 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1020 that is a valid memory address for an instruction.
1021 The MODE argument is the machine mode for the MEM expression
1022 that wants to use this address.
1023
1024 On the RS/6000, there are four valid address: a SYMBOL_REF that
1025 refers to a constant pool entry of an address (or the sum of it
1026 plus a constant), a short (16-bit signed) constant plus a register,
1027 the sum of two registers, or a register indirect, possibly with an
1028 auto-increment. For DFmode and DImode with an constant plus register,
1029 we must ensure that both words are addressable. */
1030
1031 #define LEGITIMATE_CONSTANT_POOL_BASE_P(X) \
1032 (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X) \
1033 && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (X)))
1034
1035 #define LEGITIMATE_CONSTANT_POOL_ADDRESS_P(X) \
1036 (LEGITIMATE_CONSTANT_POOL_BASE_P (X) \
1037 || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \
1038 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
1039 && LEGITIMATE_CONSTANT_POOL_BASE_P (XEXP (XEXP (X, 0), 0))))
1040
1041 #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \
1042 (GET_CODE (X) == CONST_INT \
1043 && (unsigned) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000)
1044
1045 #define LEGITIMATE_OFFSET_ADDRESS_P(MODE,X) \
1046 (GET_CODE (X) == PLUS \
1047 && GET_CODE (XEXP (X, 0)) == REG \
1048 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1049 && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \
1050 && (((MODE) != DFmode && (MODE) != DImode) \
1051 || LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4)))
1052
1053 #define LEGITIMATE_INDEXED_ADDRESS_P(X) \
1054 (GET_CODE (X) == PLUS \
1055 && GET_CODE (XEXP (X, 0)) == REG \
1056 && GET_CODE (XEXP (X, 1)) == REG \
1057 && ((REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1058 && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \
1059 || (REG_OK_FOR_BASE_P (XEXP (X, 1)) \
1060 && REG_OK_FOR_INDEX_P (XEXP (X, 0)))))
1061
1062 #define LEGITIMATE_INDIRECT_ADDRESS_P(X) \
1063 (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))
1064
1065 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1066 { if (LEGITIMATE_INDIRECT_ADDRESS_P (X)) \
1067 goto ADDR; \
1068 if (GET_CODE (X) == PRE_INC \
1069 && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \
1070 goto ADDR; \
1071 if (GET_CODE (X) == PRE_DEC \
1072 && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \
1073 goto ADDR; \
1074 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (X)) \
1075 goto ADDR; \
1076 if (LEGITIMATE_OFFSET_ADDRESS_P (MODE, X)) \
1077 goto ADDR; \
1078 if ((MODE) != DImode && (MODE) != TImode \
1079 && LEGITIMATE_INDEXED_ADDRESS_P (X)) \
1080 goto ADDR; \
1081 }
1082 \f
1083 /* Try machine-dependent ways of modifying an illegitimate address
1084 to be legitimate. If we find one, return the new, valid address.
1085 This macro is used in only one place: `memory_address' in explow.c.
1086
1087 OLDX is the address as it was before break_out_memory_refs was called.
1088 In some cases it is useful to look at this to decide what needs to be done.
1089
1090 MODE and WIN are passed so that this macro can use
1091 GO_IF_LEGITIMATE_ADDRESS.
1092
1093 It is always safe for this macro to do nothing. It exists to recognize
1094 opportunities to optimize the output.
1095
1096 On RS/6000, first check for the sum of a register with a constant
1097 integer that is out of range. If so, generate code to add the
1098 constant with the low-order 16 bits masked to the register and force
1099 this result into another register (this can be done with `cau').
1100 Then generate an address of REG+(CONST&0xffff), allowing for the
1101 possibility of bit 16 being a one.
1102
1103 Then check for the sum of a register and something not constant, try to
1104 load the other things into a register and return the sum. */
1105
1106 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1107 { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1108 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1109 && (unsigned) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \
1110 { int high_int, low_int; \
1111 high_int = INTVAL (XEXP (X, 1)) >> 16; \
1112 low_int = INTVAL (XEXP (X, 1)) & 0xffff; \
1113 if (low_int & 0x8000) \
1114 high_int += 1, low_int |= 0xffff0000; \
1115 (X) = gen_rtx (PLUS, SImode, \
1116 force_operand \
1117 (gen_rtx (PLUS, SImode, XEXP (X, 0), \
1118 gen_rtx (CONST_INT, VOIDmode, \
1119 high_int << 16)), 0),\
1120 gen_rtx (CONST_INT, VOIDmode, low_int)); \
1121 goto WIN; \
1122 } \
1123 else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1124 && GET_CODE (XEXP (X, 1)) != CONST_INT \
1125 && (MODE) != DImode && (MODE) != TImode) \
1126 { \
1127 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1128 force_reg (SImode, force_operand (XEXP (X, 1), 0))); \
1129 goto WIN; \
1130 } \
1131 }
1132
1133 /* Go to LABEL if ADDR (a legitimate address expression)
1134 has an effect that depends on the machine mode it is used for.
1135
1136 On the RS/6000 this is true if the address is valid with a zero offset
1137 but not with an offset of four (this means it cannot be used as an
1138 address for DImode or DFmode) or is a pre-increment or decrement. Since
1139 we know it is valid, we just check for an address that is not valid with
1140 an offset of four. */
1141
1142 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1143 { if (GET_CODE (ADDR) == PLUS \
1144 && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 0) \
1145 && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 4)) \
1146 goto LABEL; \
1147 if (GET_CODE (ADDR) == PRE_INC) \
1148 goto LABEL; \
1149 if (GET_CODE (ADDR) == PRE_DEC) \
1150 goto LABEL; \
1151 }
1152 \f
1153 /* Define this if some processing needs to be done immediately before
1154 emitting code for an insn. */
1155
1156 /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */
1157
1158 /* Specify the machine mode that this machine uses
1159 for the index in the tablejump instruction. */
1160 #define CASE_VECTOR_MODE SImode
1161
1162 /* Define this if the tablejump instruction expects the table
1163 to contain offsets from the address of the table.
1164 Do not define this if the table should contain absolute addresses. */
1165 #define CASE_VECTOR_PC_RELATIVE
1166
1167 /* Specify the tree operation to be used to convert reals to integers. */
1168 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1169
1170 /* This is the kind of divide that is easiest to do in the general case. */
1171 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1172
1173 /* Define this as 1 if `char' should by default be signed; else as 0. */
1174 #define DEFAULT_SIGNED_CHAR 0
1175
1176 /* This flag, if defined, says the same insns that convert to a signed fixnum
1177 also convert validly to an unsigned one. */
1178
1179 /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */
1180
1181 /* Max number of bytes we can move from memory to memory
1182 in one reasonably fast instruction. */
1183 #define MOVE_MAX 16
1184
1185 /* Nonzero if access to memory by bytes is no faster than for words.
1186 Also non-zero if doing byte operations (specifically shifts) in registers
1187 is undesirable. */
1188 #define SLOW_BYTE_ACCESS 1
1189
1190 /* Define if normal loads of shorter-than-word items from memory clears
1191 the rest of the bigs in the register. */
1192 #define BYTE_LOADS_ZERO_EXTEND
1193 \f
1194 /* The RS/6000 uses the XCOFF format. */
1195
1196 #define XCOFF_DEBUGGING_INFO
1197
1198 /* Define if the object format being used is COFF or a superset. */
1199 #define OBJECT_FORMAT_COFF
1200
1201 /* Define the magic numbers that we recognize as COFF. */
1202
1203 #define MY_ISCOFF(magic) \
1204 ((magic) == U802WRMAGIC || (magic) == U802ROMAGIC || (magic) == U802TOCMAGIC)
1205
1206 /* This is the only version of nm that collect2 can work with. */
1207 #define REAL_NM_FILE_NAME "/usr/ucb/nm"
1208
1209 /* We don't have GAS for the RS/6000 yet, so don't write out special
1210 .stabs in cc1plus. */
1211
1212 #define FASCIST_ASSEMBLER
1213
1214 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1215 is done just by pretending it is already truncated. */
1216 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1217
1218 /* Specify the machine mode that pointers have.
1219 After generation of rtl, the compiler makes no further distinction
1220 between pointers and any other objects of this machine mode. */
1221 #define Pmode SImode
1222
1223 /* Mode of a function address in a call instruction (for indexing purposes).
1224
1225 Doesn't matter on RS/6000. */
1226 #define FUNCTION_MODE SImode
1227
1228 /* Define this if addresses of constant functions
1229 shouldn't be put through pseudo regs where they can be cse'd.
1230 Desirable on machines where ordinary constants are expensive
1231 but a CALL with constant address is cheap. */
1232 #define NO_FUNCTION_CSE
1233
1234 /* Define this if shift instructions ignore all but the low-order
1235 few bits. */
1236 #define SHIFT_COUNT_TRUNCATED
1237
1238 /* Use atexit for static constructors/destructors, instead of defining
1239 our own exit function. */
1240 #define HAVE_ATEXIT
1241
1242 /* Compute the cost of computing a constant rtl expression RTX
1243 whose rtx-code is CODE. The body of this macro is a portion
1244 of a switch statement. If the code is computed here,
1245 return it with a return statement. Otherwise, break from the switch.
1246
1247 On the RS/6000, if it is legal in the insn, it is free. So this
1248 always returns 0. */
1249
1250 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1251 case CONST_INT: \
1252 case CONST: \
1253 case LABEL_REF: \
1254 case SYMBOL_REF: \
1255 case CONST_DOUBLE: \
1256 return 0;
1257
1258 /* Provide the costs of a rtl expression. This is in the body of a
1259 switch on CODE. */
1260
1261 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1262 case MULT: \
1263 return (GET_CODE (XEXP (X, 1)) != CONST_INT \
1264 ? COSTS_N_INSNS (5) \
1265 : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \
1266 ? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \
1267 case DIV: \
1268 case MOD: \
1269 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1270 && exact_log2 (INTVAL (XEXP (X, 1))) >= 0) \
1271 return COSTS_N_INSNS (2); \
1272 /* otherwise fall through to normal divide. */ \
1273 case UDIV: \
1274 case UMOD: \
1275 return COSTS_N_INSNS (19); \
1276 case MEM: \
1277 /* MEM should be slightly more expensive than (plus (reg) (const)) */ \
1278 return 5;
1279
1280 /* Compute the cost of an address. This is meant to approximate the size
1281 and/or execution delay of an insn using that address. If the cost is
1282 approximated by the RTL complexity, including CONST_COSTS above, as
1283 is usually the case for CISC machines, this macro should not be defined.
1284 For aggressively RISCy machines, only one insn format is allowed, so
1285 this macro should be a constant. The value of this macro only matters
1286 for valid addresses.
1287
1288 For the RS/6000, everything is cost 0. */
1289
1290 #define ADDRESS_COST(RTX) 0
1291
1292 /* Adjust the length of an INSN. LENGTH is the currently-computed length and
1293 should be adjusted to reflect any required changes. This macro is used when
1294 there is some systematic length adjustment required that would be difficult
1295 to express in the length attribute. */
1296
1297 /* #define ADJUST_INSN_LENGTH(X,LENGTH) */
1298
1299 /* Add any extra modes needed to represent the condition code.
1300
1301 For the RS/6000, we need separate modes when unsigned (logical) comparisons
1302 are being done and we need a separate mode for floating-point. We also
1303 use a mode for the case when we are comparing the results of two
1304 comparisons. */
1305
1306 #define EXTRA_CC_MODES CCUNSmode, CCFPmode, CCEQmode
1307
1308 /* Define the names for the modes specified above. */
1309 #define EXTRA_CC_NAMES "CCUNS", "CCFP", "CCEQ"
1310
1311 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1312 return the mode to be used for the comparison. For floating-point, CCFPmode
1313 should be used. CCUNSmode should be used for unsigned comparisons.
1314 CCEQmode should be used when we are doing an inequality comparison on
1315 the result of a comparison. CCmode should be used in all other cases. */
1316
1317 #define SELECT_CC_MODE(OP,X,Y) \
1318 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \
1319 : (OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU ? CCUNSmode \
1320 : (((OP) == EQ || (OP) == NE) && GET_RTX_CLASS (GET_CODE (X)) == '<' \
1321 ? CCEQmode : CCmode))
1322
1323 /* Define the information needed to generate branch and scc insns. This is
1324 stored from the compare operation. Note that we can't use "rtx" here
1325 since it hasn't been defined! */
1326
1327 extern struct rtx_def *rs6000_compare_op0, *rs6000_compare_op1;
1328 extern int rs6000_compare_fp_p;
1329
1330 /* Set to non-zero by "fix" operation to indicate that itrunc and
1331 uitrunc must be defined. */
1332
1333 extern int rs6000_trunc_used;
1334 \f
1335 /* Control the assembler format that we output. */
1336
1337 /* Output at beginning of assembler file.
1338
1339 Initialize the section names for the RS/6000 at this point.
1340
1341 We want to go into the TOC section so at least one .toc will be emitted.
1342 Also, in order to output proper .bs/.es pairs, we need at least one static
1343 [RW] section emitted.
1344
1345 We then switch back to text to force the gcc2_compiled. label and the space
1346 allocated after it (when profiling) into the text section.
1347
1348 Finally, declare mcount when profiling to make the assembler happy. */
1349
1350 #define ASM_FILE_START(FILE) \
1351 { \
1352 rs6000_gen_section_name (&xcoff_bss_section_name, \
1353 main_input_filename, ".bss_"); \
1354 rs6000_gen_section_name (&xcoff_private_data_section_name, \
1355 main_input_filename, ".rw_"); \
1356 rs6000_gen_section_name (&xcoff_read_only_section_name, \
1357 main_input_filename, ".ro_"); \
1358 \
1359 toc_section (); \
1360 if (write_symbols != NO_DEBUG) \
1361 private_data_section (); \
1362 text_section (); \
1363 if (profile_flag) \
1364 fprintf (FILE, "\t.extern .mcount\n"); \
1365 }
1366
1367 /* Output at end of assembler file.
1368
1369 On the RS/6000, referencing data should automatically pull in text. */
1370
1371 #define ASM_FILE_END(FILE) \
1372 { \
1373 text_section (); \
1374 fprintf (FILE, "_section_.text:\n"); \
1375 data_section (); \
1376 fprintf (FILE, "\t.long _section_.text\n"); \
1377 }
1378
1379 /* We define this to prevent the name mangler from putting dollar signs into
1380 function names. */
1381
1382 #define NO_DOLLAR_IN_LABEL
1383
1384 /* We define this to 0 so that gcc will never accept a dollar sign in a
1385 variable name. This is needed because the AIX assembler will not accept
1386 dollar signs. */
1387
1388 #define DOLLARS_IN_IDENTIFIERS 0
1389
1390 /* Implicit library calls should use memcpy, not bcopy, etc. */
1391
1392 #define TARGET_MEM_FUNCTIONS
1393
1394 /* Define the extra sections we need. We define three: one is the read-only
1395 data section which is used for constants. This is a csect whose name is
1396 derived from the name of the input file. The second is for initialized
1397 global variables. This is a csect whose name is that of the variable.
1398 The third is the TOC. */
1399
1400 #define EXTRA_SECTIONS \
1401 read_only_data, private_data, read_only_private_data, toc, bss
1402
1403 /* Define the name of our readonly data section. */
1404
1405 #define READONLY_DATA_SECTION read_only_data_section
1406
1407 /* Indicate that jump tables go in the text section. */
1408
1409 #define JUMP_TABLES_IN_TEXT_SECTION
1410
1411 /* Define the routines to implement these extra sections. */
1412
1413 #define EXTRA_SECTION_FUNCTIONS \
1414 \
1415 void \
1416 read_only_data_section () \
1417 { \
1418 if (in_section != read_only_data) \
1419 { \
1420 fprintf (asm_out_file, "\t.csect %s[RO]\n", \
1421 xcoff_read_only_section_name); \
1422 in_section = read_only_data; \
1423 } \
1424 } \
1425 \
1426 void \
1427 private_data_section () \
1428 { \
1429 if (in_section != private_data) \
1430 { \
1431 fprintf (asm_out_file, "\t.csect %s[RW]\n", \
1432 xcoff_private_data_section_name); \
1433 \
1434 in_section = private_data; \
1435 } \
1436 } \
1437 \
1438 void \
1439 read_only_private_data_section () \
1440 { \
1441 if (in_section != read_only_private_data) \
1442 { \
1443 fprintf (asm_out_file, "\t.csect %s[RO]\n", \
1444 xcoff_private_data_section_name); \
1445 in_section = read_only_private_data; \
1446 } \
1447 } \
1448 \
1449 void \
1450 toc_section () \
1451 { \
1452 if (in_section != toc) \
1453 fprintf (asm_out_file, "\t.toc\n"); \
1454 \
1455 in_section = toc; \
1456 }
1457
1458 /* This macro produces the initial definition of a function name.
1459 On the RS/6000, we need to place an extra '.' in the function name and
1460 output the function descriptor.
1461
1462 The csect for the function will have already been created by the
1463 `text_section' call previously done. We do have to go back to that
1464 csect, however. */
1465
1466 /* ??? What do the 16 and 044 in the .function line really mean? */
1467
1468 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
1469 { if (TREE_PUBLIC (DECL)) \
1470 { \
1471 fprintf (FILE, "\t.globl ."); \
1472 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1473 fprintf (FILE, "\n"); \
1474 } \
1475 else if (write_symbols == XCOFF_DEBUG) \
1476 { \
1477 fprintf (FILE, "\t.lglobl ."); \
1478 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1479 fprintf (FILE, "\n"); \
1480 } \
1481 fprintf (FILE, "\t.csect "); \
1482 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1483 fprintf (FILE, "[DS]\n"); \
1484 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1485 fprintf (FILE, ":\n"); \
1486 fprintf (FILE, "\t.long ."); \
1487 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1488 fprintf (FILE, ", TOC[tc0], 0\n"); \
1489 fprintf (FILE, "\t.csect [PR]\n."); \
1490 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1491 fprintf (FILE, ":\n"); \
1492 if (write_symbols == XCOFF_DEBUG) \
1493 xcoffout_declare_function (FILE, DECL, NAME); \
1494 }
1495
1496 /* Return non-zero if this entry is to be written into the constant pool
1497 in a special way. We do so if this is a SYMBOL_REF, LABEL_REF or a CONST
1498 containing one of them. If -mfp-in-toc (the default), we also do
1499 this for floating-point constants. We actually can only do this
1500 if the FP formats of the target and host machines are the same, but
1501 we can't check that since not every file that uses
1502 GO_IF_LEGITIMATE_ADDRESS_P includes real.h. */
1503
1504 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY_P(X) \
1505 (GET_CODE (X) == SYMBOL_REF \
1506 || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \
1507 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF) \
1508 || GET_CODE (X) == LABEL_REF \
1509 || (TARGET_FP_IN_TOC && GET_CODE (X) == CONST_DOUBLE \
1510 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1511 && BITS_PER_WORD == HOST_BITS_PER_INT))
1512
1513 /* Select section for constant in constant pool.
1514
1515 On RS/6000, all constants are in the private read-only data area.
1516 However, if this is being placed in the TOC it must be output as a
1517 toc entry. */
1518
1519 #define SELECT_RTX_SECTION(MODE, X) \
1520 { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \
1521 toc_section (); \
1522 else \
1523 read_only_private_data_section (); \
1524 }
1525
1526 /* Macro to output a special constant pool entry. Go to WIN if we output
1527 it. Otherwise, it is written the usual way.
1528
1529 On the RS/6000, toc entries are handled this way. */
1530
1531 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, X, MODE, ALIGN, LABELNO, WIN) \
1532 { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \
1533 { \
1534 output_toc (FILE, X, LABELNO); \
1535 goto WIN; \
1536 } \
1537 }
1538
1539 /* Select the section for an initialized data object.
1540
1541 On the RS/6000, we have a special section for all variables except those
1542 that are static. */
1543
1544 #define SELECT_SECTION(EXP,RELOC) \
1545 { \
1546 if ((TREE_READONLY (EXP) \
1547 || (TREE_CODE (EXP) == STRING_CST \
1548 && !flag_writable_strings)) \
1549 && ! TREE_THIS_VOLATILE (EXP) \
1550 && ! (RELOC)) \
1551 { \
1552 if (TREE_PUBLIC (EXP)) \
1553 read_only_data_section (); \
1554 else \
1555 read_only_private_data_section (); \
1556 } \
1557 else \
1558 { \
1559 if (TREE_PUBLIC (EXP)) \
1560 data_section (); \
1561 else \
1562 private_data_section (); \
1563 } \
1564 }
1565
1566 /* This outputs NAME to FILE up to the first null or '['. */
1567
1568 #define RS6000_OUTPUT_BASENAME(FILE, NAME) \
1569 if ((NAME)[0] == '*') \
1570 assemble_name (FILE, NAME); \
1571 else \
1572 { \
1573 char *_p; \
1574 for (_p = (NAME); *_p && *_p != '['; _p++) \
1575 fputc (*_p, FILE); \
1576 }
1577
1578 /* Output something to declare an external symbol to the assembler. Most
1579 assemblers don't need this.
1580
1581 If we haven't already, add "[RW]" (or "[DS]" for a function) to the
1582 name. Normally we write this out along with the name. In the few cases
1583 where we can't, it gets stripped off. */
1584
1585 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1586 { rtx _symref = XEXP (DECL_RTL (DECL), 0); \
1587 if ((TREE_CODE (DECL) == VAR_DECL \
1588 || TREE_CODE (DECL) == FUNCTION_DECL) \
1589 && (NAME)[0] != '*' \
1590 && (NAME)[strlen (NAME) - 1] != ']') \
1591 { \
1592 char *_name = (char *) permalloc (strlen (XSTR (_symref, 0)) + 5); \
1593 strcpy (_name, XSTR (_symref, 0)); \
1594 strcat (_name, TREE_CODE (DECL) == FUNCTION_DECL ? "[DS]" : "[RW]"); \
1595 XSTR (_symref, 0) = _name; \
1596 } \
1597 fprintf (FILE, "\t.extern "); \
1598 assemble_name (FILE, XSTR (_symref, 0)); \
1599 if (TREE_CODE (DECL) == FUNCTION_DECL) \
1600 { \
1601 fprintf (FILE, "\n\t.extern ."); \
1602 RS6000_OUTPUT_BASENAME (FILE, XSTR (_symref, 0)); \
1603 } \
1604 fprintf (FILE, "\n"); \
1605 }
1606
1607 /* Similar, but for libcall. We only have to worry about the function name,
1608 not that of the descriptor. */
1609
1610 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \
1611 { fprintf (FILE, "\t.extern ."); \
1612 assemble_name (FILE, XSTR (FUN, 0)); \
1613 fprintf (FILE, "\n"); \
1614 }
1615
1616 /* Output to assembler file text saying following lines
1617 may contain character constants, extra white space, comments, etc. */
1618
1619 #define ASM_APP_ON ""
1620
1621 /* Output to assembler file text saying following lines
1622 no longer contain unusual constructs. */
1623
1624 #define ASM_APP_OFF ""
1625
1626 /* Output before instructions. */
1627
1628 #define TEXT_SECTION_ASM_OP ".csect [PR]"
1629
1630 /* Output before writable data. */
1631
1632 #define DATA_SECTION_ASM_OP ".csect .data[RW]"
1633
1634 /* How to refer to registers in assembler output.
1635 This sequence is indexed by compiler's hard-register-number (see above). */
1636
1637 #define REGISTER_NAMES \
1638 {"0", "1", "2", "3", "4", "5", "6", "7", \
1639 "8", "9", "10", "11", "12", "13", "14", "15", \
1640 "16", "17", "18", "19", "20", "21", "22", "23", \
1641 "24", "25", "26", "27", "28", "29", "30", "31", \
1642 "0", "1", "2", "3", "4", "5", "6", "7", \
1643 "8", "9", "10", "11", "12", "13", "14", "15", \
1644 "16", "17", "18", "19", "20", "21", "22", "23", \
1645 "24", "25", "26", "27", "28", "29", "30", "31", \
1646 "mq", "lr", "ctr", "ap", \
1647 "0", "1", "2", "3", "4", "5", "6", "7" }
1648
1649 /* Table of additional register names to use in user input. */
1650
1651 #define ADDITIONAL_REGISTER_NAMES \
1652 {"r0", 0, "r1", 1, "r2", 2, "r3", 3, \
1653 "r4", 4, "r5", 5, "r6", 6, "r7", 7, \
1654 "r8", 8, "r9", 9, "r10", 10, "r11", 11, \
1655 "r12", 12, "r13", 13, "r14", 14, "r15", 15, \
1656 "r16", 16, "r17", 17, "r18", 18, "r19", 19, \
1657 "r20", 20, "r21", 21, "r22", 22, "r23", 23, \
1658 "r24", 24, "r25", 25, "r26", 26, "r27", 27, \
1659 "r28", 28, "r29", 29, "r30", 30, "r31", 31, \
1660 "fr0", 32, "fr1", 33, "fr2", 34, "fr3", 35, \
1661 "fr4", 36, "fr5", 37, "fr6", 38, "fr7", 39, \
1662 "fr8", 40, "fr9", 41, "fr10", 42, "fr11", 43, \
1663 "fr12", 44, "fr13", 45, "fr14", 46, "fr15", 47, \
1664 "fr16", 48, "fr17", 49, "fr18", 50, "fr19", 51, \
1665 "fr20", 52, "fr21", 53, "fr22", 54, "fr23", 55, \
1666 "fr24", 56, "fr25", 57, "fr26", 58, "fr27", 59, \
1667 "fr28", 60, "fr29", 61, "fr30", 62, "fr31", 63, \
1668 /* no additional names for: mq, lr, ctr, ap */ \
1669 "cr0", 68, "cr1", 69, "cr2", 70, "cr3", 71, \
1670 "cr4", 72, "cr5", 73, "cr6", 74, "cr7", 75, \
1671 "cc", 68 }
1672
1673 /* How to renumber registers for dbx and gdb. */
1674
1675 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1676
1677 /* This is how to output the definition of a user-level label named NAME,
1678 such as the label on a static function or variable NAME. */
1679
1680 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1681 do { RS6000_OUTPUT_BASENAME (FILE, NAME); fputs (":\n", FILE); } while (0)
1682
1683 /* This is how to output a command to make the user-level label named NAME
1684 defined for reference from other files. */
1685
1686 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1687 do { fputs ("\t.globl ", FILE); \
1688 RS6000_OUTPUT_BASENAME (FILE, NAME); fputs ("\n", FILE);} while (0)
1689
1690 /* This is how to output a reference to a user-level label named NAME.
1691 `assemble_name' uses this. */
1692
1693 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1694 fprintf (FILE, NAME)
1695
1696 /* This is how to output an internal numbered label where
1697 PREFIX is the class of label and NUM is the number within the class. */
1698
1699 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1700 fprintf (FILE, "%s..%d:\n", PREFIX, NUM)
1701
1702 /* This is how to output a label for a jump table. Arguments are the same as
1703 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1704 passed. */
1705
1706 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1707 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1708
1709 /* This is how to store into the string LABEL
1710 the symbol_ref name of an internal numbered label where
1711 PREFIX is the class of label and NUM is the number within the class.
1712 This is suitable for output with `assemble_name'. */
1713
1714 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1715 sprintf (LABEL, "%s..%d", PREFIX, NUM)
1716
1717 /* This is how to output an assembler line defining a `double' constant. */
1718
1719 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1720 fprintf (FILE, "\t.double 0d%.20e\n", (VALUE))
1721
1722 /* This is how to output an assembler line defining a `float' constant. */
1723
1724 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1725 fprintf (FILE, "\t.float 0d%.20e\n", (VALUE))
1726
1727 /* This is how to output an assembler line defining an `int' constant. */
1728
1729 #define ASM_OUTPUT_INT(FILE,VALUE) \
1730 ( fprintf (FILE, "\t.long "), \
1731 output_addr_const (FILE, (VALUE)), \
1732 fprintf (FILE, "\n"))
1733
1734 /* Likewise for `char' and `short' constants. */
1735
1736 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1737 ( fprintf (FILE, "\t.short "), \
1738 output_addr_const (FILE, (VALUE)), \
1739 fprintf (FILE, "\n"))
1740
1741 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1742 ( fprintf (FILE, "\t.byte "), \
1743 output_addr_const (FILE, (VALUE)), \
1744 fprintf (FILE, "\n"))
1745
1746 /* This is how to output an assembler line for a numeric constant byte. */
1747
1748 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1749 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1750
1751 /* This is how to output an assembler line to define N characters starting
1752 at P to FILE. */
1753
1754 #define ASM_OUTPUT_ASCII(FILE, P, N) output_ascii ((FILE), (P), (N))
1755
1756 /* This is how to output code to push a register on the stack.
1757 It need not be very fast code. */
1758
1759 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1760 fprintf (FILE, "\tstu %s,-4(r1)\n", reg_names[REGNO]);
1761
1762 /* This is how to output an insn to pop a register from the stack.
1763 It need not be very fast code. */
1764
1765 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1766 fprintf (FILE, "\tl %s,0(r1)\n\tai r1,r1,4\n", reg_names[REGNO])
1767
1768 /* This is how to output an element of a case-vector that is absolute.
1769 (RS/6000 does not use such vectors, but we must define this macro
1770 anyway.) */
1771
1772 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1773 fprintf (FILE, "\t.long L..%d\n", VALUE)
1774
1775 /* This is how to output an element of a case-vector that is relative. */
1776
1777 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1778 fprintf (FILE, "\t.long L..%d-L..%d\n", VALUE, REL)
1779
1780 /* This is how to output an assembler line
1781 that says to advance the location counter
1782 to a multiple of 2**LOG bytes. */
1783
1784 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1785 if ((LOG) != 0) \
1786 fprintf (FILE, "\t.align %d\n", (LOG))
1787
1788 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1789 fprintf (FILE, "\t.space %d\n", (SIZE))
1790
1791 /* This says how to output an assembler line
1792 to define a global common symbol. */
1793
1794 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1795 do { fputs (".comm ", (FILE)); \
1796 RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \
1797 fprintf ((FILE), ",%d\n", (SIZE)); } while (0)
1798
1799 /* This says how to output an assembler line
1800 to define a local common symbol. */
1801
1802 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1803 do { fputs (".lcomm ", (FILE)); \
1804 RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \
1805 fprintf ((FILE), ",%d,%s\n", (SIZE), xcoff_bss_section_name); \
1806 } while (0)
1807
1808 /* Store in OUTPUT a string (made with alloca) containing
1809 an assembler-name for a local static variable named NAME.
1810 LABELNO is an integer which is different for each call. */
1811
1812 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1813 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1814 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1815
1816 /* Define the parentheses used to group arithmetic operations
1817 in assembler code. */
1818
1819 #define ASM_OPEN_PAREN "("
1820 #define ASM_CLOSE_PAREN ")"
1821
1822 /* Define results of standard character escape sequences. */
1823 #define TARGET_BELL 007
1824 #define TARGET_BS 010
1825 #define TARGET_TAB 011
1826 #define TARGET_NEWLINE 012
1827 #define TARGET_VT 013
1828 #define TARGET_FF 014
1829 #define TARGET_CR 015
1830
1831 /* Print operand X (an rtx) in assembler syntax to file FILE.
1832 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1833 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1834
1835 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1836
1837 /* Define which CODE values are valid. */
1838
1839 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0
1840
1841 /* Print a memory address as an operand to reference that memory location. */
1842
1843 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1844
1845 /* Define the codes that are matched by predicates in rs6000.c. */
1846
1847 #define PREDICATE_CODES \
1848 {"short_cint_operand", {CONST_INT}}, \
1849 {"u_short_cint_operand", {CONST_INT}}, \
1850 {"non_short_cint_operand", {CONST_INT}}, \
1851 {"gpc_reg_operand", {SUBREG, REG}}, \
1852 {"cc_reg_operand", {SUBREG, REG}}, \
1853 {"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, \
1854 {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \
1855 {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \
1856 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1857 {"easy_fp_constant", {CONST_DOUBLE}}, \
1858 {"reg_or_mem_operand", {SUBREG, MEM, REG}}, \
1859 {"fp_reg_or_mem_operand", {SUBREG, MEM, REG}}, \
1860 {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \
1861 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1862 {"non_add_cint_operand", {CONST_INT}}, \
1863 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1864 {"non_and_cint_operand", {CONST_INT}}, \
1865 {"logical_operand", {SUBREG, REG, CONST_INT}}, \
1866 {"non_logical_cint_operand", {CONST_INT}}, \
1867 {"mask_operand", {CONST_INT}}, \
1868 {"call_operand", {SYMBOL_REF, REG}}, \
1869 {"input_operand", {SUBREG, MEM, REG, CONST_INT}}, \
1870 {"branch_comparison_operation", {EQ, NE, LE, LT, GE, \
1871 LT, LEU, LTU, GEU, GTU}}, \
1872 {"scc_comparison_operation", {EQ, NE, LE, LT, GE, \
1873 LT, LEU, LTU, GEU, GTU}},
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