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1 /* Definitions of target machine for GNU compiler, for IBM RS/6000.
2 Copyright (C) 1992 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@nyu.edu)
4
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20
21
22 /* Note that some other tm.h files include this one and then override
23 many of the definitions that relate to assembler syntax. */
24
25
26 /* Names to predefine in the preprocessor for this target machine. */
27
28 #define CPP_PREDEFINES "-D_IBMR2 -D_AIX"
29
30 /* Print subsidiary information on the compiler version in use. */
31 #define TARGET_VERSION ;
32
33 /* Tell the assembler to assume that all undefined names are external.
34
35 Don't do this until the fixed IBM assembler is more generally available.
36 When this becomes permanently defined, the ASM_OUTPUT_EXTERNAL,
37 ASM_OUTPUT_EXTERNAL_LIBCALL, and RS6000_OUTPUT_BASENAME macros will no
38 longer be needed. Also, the extern declaration of mcount in ASM_FILE_START
39 will no longer be needed. */
40
41 /* #define ASM_SPEC "-u" */
42
43 /* Define the options for the binder: Start text at 512, align all segments
44 to 512 bytes, and warn if there is text relocation.
45
46 The -bhalt:4 option supposedly changes the level at which ld will abort,
47 but it also suppresses warnings about multiply defined symbols and is
48 used by the AIX cc command. So we use it here.
49
50 -bnodelcsect undoes a poor choice of default relating to multiply-defined
51 csects. See AIX documentation for more information about this. */
52
53 #define LINK_SPEC "-T512 -H512 -btextro -bhalt:4 -bnodelcsect\
54 %{static:-bnso -bI:/lib/syscalls.exp}"
55
56 /* Profiled library versions are used by linking with special directories. */
57 #define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\
58 %{p:-L/lib/profiled -L/usr/lib/profiled} %{g*:-lg} -lc"
59
60 /* gcc must do the search itself to find libgcc.a, not use -l. */
61 #define LINK_LIBGCC_SPECIAL_1
62
63 /* Don't turn -B into -L if the argument specifies a relative file name. */
64 #define RELATIVE_PREFIX_NOT_LINKDIR
65
66 /* Run-time compilation parameters selecting different hardware subsets. */
67
68 /* Flag to allow putting fp constants in the TOC; can be turned off when
69 the TOC overflows. */
70
71 #define TARGET_FP_IN_TOC (target_flags & 1)
72
73 extern int target_flags;
74
75 /* Macro to define tables used to set the flags.
76 This is a list in braces of pairs in braces,
77 each pair being { "NAME", VALUE }
78 where VALUE is the bits to set or minus the bits to clear.
79 An empty string NAME is used to identify the default VALUE. */
80
81 #define TARGET_SWITCHES \
82 {{"fp-in-toc", 1}, \
83 {"no-fp-in-toc", -1}, \
84 { "", TARGET_DEFAULT}}
85
86 #define TARGET_DEFAULT 1
87
88 /* On the RS/6000, we turn on various flags if optimization is selected. */
89
90 #define OPTIMIZATION_OPTIONS(LEVEL) \
91 { \
92 if ((LEVEL) > 0) \
93 { \
94 flag_force_mem = 1; \
95 flag_omit_frame_pointer = 1; \
96 } \
97 }
98
99 /* Define this to modify the options specified by the user. */
100
101 #define OVERRIDE_OPTIONS \
102 { \
103 profile_block_flag = 0; \
104 }
105 \f
106 /* target machine storage layout */
107
108 /* Define this macro if it is advisable to hold scalars in registers
109 in a wider mode than that declared by the program. In such cases,
110 the value is constrained to be within the bounds of the declared
111 type, but kept valid in the wider mode. The signedness of the
112 extension may differ from that of the type. */
113
114 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
115 if (GET_MODE_CLASS (MODE) == MODE_INT \
116 && GET_MODE_SIZE (MODE) < 4) \
117 (MODE) == SImode;
118
119 /* Define this if most significant bit is lowest numbered
120 in instructions that operate on numbered bit-fields. */
121 /* That is true on RS/6000. */
122 #define BITS_BIG_ENDIAN 1
123
124 /* Define this if most significant byte of a word is the lowest numbered. */
125 /* That is true on RS/6000. */
126 #define BYTES_BIG_ENDIAN 1
127
128 /* Define this if most significant word of a multiword number is lowest
129 numbered.
130
131 For RS/6000 we can decide arbitrarily since there are no machine
132 instructions for them. Might as well be consistent with bits and bytes. */
133 #define WORDS_BIG_ENDIAN 1
134
135 /* number of bits in an addressable storage unit */
136 #define BITS_PER_UNIT 8
137
138 /* Width in bits of a "word", which is the contents of a machine register.
139 Note that this is not necessarily the width of data type `int';
140 if using 16-bit ints on a 68000, this would still be 32.
141 But on a machine with 16-bit registers, this would be 16. */
142 #define BITS_PER_WORD 32
143
144 /* Width of a word, in units (bytes). */
145 #define UNITS_PER_WORD 4
146
147 /* Type used for ptrdiff_t, as a string used in a declaration. */
148 #define PTRDIFF_TYPE "int"
149
150 /* Type used for wchar_t, as a string used in a declaration. */
151 #define WCHAR_TYPE "short unsigned int"
152
153 /* Width of wchar_t in bits. */
154 #define WCHAR_TYPE_SIZE 16
155
156 /* Width in bits of a pointer.
157 See also the macro `Pmode' defined below. */
158 #define POINTER_SIZE 32
159
160 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
161 #define PARM_BOUNDARY 32
162
163 /* Boundary (in *bits*) on which stack pointer should be aligned. */
164 #define STACK_BOUNDARY 64
165
166 /* Allocation boundary (in *bits*) for the code of a function. */
167 #define FUNCTION_BOUNDARY 32
168
169 /* No data type wants to be aligned rounder than this. */
170 #define BIGGEST_ALIGNMENT 32
171
172 /* Alignment of field after `int : 0' in a structure. */
173 #define EMPTY_FIELD_BOUNDARY 32
174
175 /* Every structure's size must be a multiple of this. */
176 #define STRUCTURE_SIZE_BOUNDARY 8
177
178 /* A bitfield declared as `int' forces `int' alignment for the struct. */
179 #define PCC_BITFIELD_TYPE_MATTERS 1
180
181 /* Make strings word-aligned so strcpy from constants will be faster. */
182 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
183 (TREE_CODE (EXP) == STRING_CST \
184 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
185
186 /* Make arrays of chars word-aligned for the same reasons. */
187 #define DATA_ALIGNMENT(TYPE, ALIGN) \
188 (TREE_CODE (TYPE) == ARRAY_TYPE \
189 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
190 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
191
192 /* Non-zero if move instructions will actually fail to work
193 when given unaligned data. */
194 #define STRICT_ALIGNMENT 0
195 \f
196 /* Standard register usage. */
197
198 /* Number of actual hardware registers.
199 The hardware registers are assigned numbers for the compiler
200 from 0 to just below FIRST_PSEUDO_REGISTER.
201 All registers that the compiler knows about must be given numbers,
202 even those that are not normally considered general registers.
203
204 RS/6000 has 32 fixed-point registers, 32 floating-point registers,
205 an MQ register, a count register, a link register, and 8 condition
206 register fields, which we view here as separate registers.
207
208 In addition, the difference between the frame and argument pointers is
209 a function of the number of registers saved, so we need to have a
210 register for AP that will later be eliminated in favor of SP or FP.
211 This is a normal register, but it is fixed. */
212
213 #define FIRST_PSEUDO_REGISTER 76
214
215 /* 1 for registers that have pervasive standard uses
216 and are not available for the register allocator.
217
218 On RS/6000, r1 is used for the stack and r2 is used as the TOC pointer.
219
220 cr5 is not supposed to be used. */
221
222 #define FIXED_REGISTERS \
223 {0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
224 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
225 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
226 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
227 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0}
228
229 /* 1 for registers not available across function calls.
230 These must include the FIXED_REGISTERS and also any
231 registers that can be used without being saved.
232 The latter must include the registers where values are returned
233 and the register where structure-value addresses are passed.
234 Aside from that, you can include as many other registers as you like. */
235
236 #define CALL_USED_REGISTERS \
237 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, \
238 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
239 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
240 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
241 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1}
242
243 /* List the order in which to allocate registers. Each register must be
244 listed once, even those in FIXED_REGISTERS.
245
246 We allocate in the following order:
247 fp0 (not saved or used for anything)
248 fp13 - fp2 (not saved; incoming fp arg registers)
249 fp1 (not saved; return value)
250 fp31 - fp14 (saved; order given to save least number)
251 cr1, cr6, cr7 (not saved or special)
252 cr0 (not saved, but used for arithmetic operations)
253 cr2, cr3, cr4 (saved)
254 r0 (not saved; cannot be base reg)
255 r9 (not saved; best for TImode)
256 r11, r10, r8-r4 (not saved; highest used first to make less conflict)
257 r3 (not saved; return value register)
258 r31 - r13 (saved; order given to save least number)
259 r12 (not saved; if used for DImode or DFmode would use r13)
260 mq (not saved; best to use it if we can)
261 ctr (not saved; when we have the choice ctr is better)
262 lr (saved)
263 cr5, r1, r2, ap (fixed) */
264
265 #define REG_ALLOC_ORDER \
266 {32, \
267 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, \
268 33, \
269 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \
270 50, 49, 48, 47, 46, \
271 69, 74, 75, 68, 70, 71, 72, \
272 0, \
273 9, 11, 10, 8, 7, 6, 5, 4, \
274 3, \
275 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, \
276 18, 17, 16, 15, 14, 13, 12, \
277 64, 66, 65, \
278 73, 1, 2, 67}
279
280 /* True if register is floating-point. */
281 #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 63)
282
283 /* True if register is a condition register. */
284 #define CR_REGNO_P(N) ((N) >= 68 && (N) <= 75)
285
286 /* True if register is an integer register. */
287 #define INT_REGNO_P(N) ((N) <= 31 || (N) == 67)
288
289 /* Return number of consecutive hard regs needed starting at reg REGNO
290 to hold something of mode MODE.
291 This is ordinarily the length in words of a value of mode MODE
292 but can be less for certain modes in special long registers.
293
294 On RS/6000, ordinary registers hold 32 bits worth;
295 a single floating point register holds 64 bits worth. */
296
297 #define HARD_REGNO_NREGS(REGNO, MODE) \
298 (FP_REGNO_P (REGNO) \
299 ? ((GET_MODE_SIZE (MODE) + 2 * UNITS_PER_WORD - 1) / (2 * UNITS_PER_WORD)) \
300 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
301
302 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
303 On RS/6000, the cpu registers can hold any mode but the float registers
304 can hold only floating modes and CR register can only hold CC modes. We
305 cannot put DImode or TImode anywhere except general register and they
306 must be able to fit within the register set. */
307
308 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
309 (FP_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_FLOAT \
310 : CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \
311 : ! INT_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_INT \
312 : 1)
313
314 /* Value is 1 if it is a good idea to tie two pseudo registers
315 when one has mode MODE1 and one has mode MODE2.
316 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
317 for any hard reg, then this must be 0 for correct output. */
318 #define MODES_TIEABLE_P(MODE1, MODE2) \
319 (GET_MODE_CLASS (MODE1) == MODE_FLOAT \
320 ? GET_MODE_CLASS (MODE2) == MODE_FLOAT \
321 : GET_MODE_CLASS (MODE2) == MODE_FLOAT \
322 ? GET_MODE_CLASS (MODE1) == MODE_FLOAT \
323 : GET_MODE_CLASS (MODE1) == MODE_CC \
324 ? GET_MODE_CLASS (MODE2) == MODE_CC \
325 : GET_MODE_CLASS (MODE2) == MODE_CC \
326 ? GET_MODE_CLASS (MODE1) == MODE_CC \
327 : 1)
328
329 /* A C expression returning the cost of moving data from a register of class
330 CLASS1 to one of CLASS2.
331
332 On the RS/6000, copying between floating-point and fixed-point
333 registers is expensive. */
334
335 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
336 ((CLASS1) == FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 2 \
337 : (CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS ? 10 \
338 : (CLASS1) != FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 10 \
339 : 2)
340
341 /* A C expressions returning the cost of moving data of MODE from a register to
342 or from memory.
343
344 On the RS/6000, bump this up a bit. */
345
346 #define MEMORY_MOVE_COST(MODE) 6
347
348 /* Specify the cost of a branch insn; roughly the number of extra insns that
349 should be added to avoid a branch.
350
351 Set this to 3 on the RS/6000 since that is roughly the average cost of an
352 unscheduled conditional branch. */
353
354 #define BRANCH_COST 3
355
356 /* A C statement (sans semicolon) to update the integer variable COST
357 based on the relationship between INSN that is dependent on
358 DEP_INSN through the dependence LINK. The default is to make no
359 adjustment to COST. On the RS/6000, ignore the cost of anti- and
360 output-dependencies. In fact, output dependencies on the CR do have
361 a cost, but it is probably not worthwhile to track it. */
362
363 #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
364 if (REG_NOTE_KIND (LINK) != 0) \
365 (COST) = 0; /* Anti or output dependence. */
366
367 /* Specify the registers used for certain standard purposes.
368 The values of these macros are register numbers. */
369
370 /* RS/6000 pc isn't overloaded on a register that the compiler knows about. */
371 /* #define PC_REGNUM */
372
373 /* Register to use for pushing function arguments. */
374 #define STACK_POINTER_REGNUM 1
375
376 /* Base register for access to local variables of the function. */
377 #define FRAME_POINTER_REGNUM 31
378
379 /* Value should be nonzero if functions must have frame pointers.
380 Zero means the frame pointer need not be set up (and parms
381 may be accessed via the stack pointer) in functions that seem suitable.
382 This is computed in `reload', in reload1.c. */
383 #define FRAME_POINTER_REQUIRED 0
384
385 /* Base register for access to arguments of the function. */
386 #define ARG_POINTER_REGNUM 67
387
388 /* Place to put static chain when calling a function that requires it. */
389 #define STATIC_CHAIN_REGNUM 11
390
391 /* Place that structure value return address is placed.
392
393 On the RS/6000, it is passed as an extra parameter. */
394 #define STRUCT_VALUE 0
395 \f
396 /* Define the classes of registers for register constraints in the
397 machine description. Also define ranges of constants.
398
399 One of the classes must always be named ALL_REGS and include all hard regs.
400 If there is more than one class, another class must be named NO_REGS
401 and contain no registers.
402
403 The name GENERAL_REGS must be the name of a class (or an alias for
404 another name such as ALL_REGS). This is the class of registers
405 that is allowed by "g" or "r" in a register constraint.
406 Also, registers outside this class are allocated only when
407 instructions express preferences for them.
408
409 The classes must be numbered in nondecreasing order; that is,
410 a larger-numbered class must never be contained completely
411 in a smaller-numbered class.
412
413 For any two classes, it is very desirable that there be another
414 class that represents their union. */
415
416 /* The RS/6000 has three types of registers, fixed-point, floating-point,
417 and condition registers, plus three special registers, MQ, CTR, and the
418 link register.
419
420 However, r0 is special in that it cannot be used as a base register.
421 So make a class for registers valid as base registers.
422
423 Also, cr0 is the only condition code register that can be used in
424 arithmetic insns, so make a separate class for it. */
425
426 enum reg_class { NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS,
427 NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS,
428 SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS, CR_REGS, NON_FLOAT_REGS,
429 ALL_REGS, LIM_REG_CLASSES };
430
431 #define N_REG_CLASSES (int) LIM_REG_CLASSES
432
433 /* Give names of register classes as strings for dump file. */
434
435 #define REG_CLASS_NAMES \
436 { "NO_REGS", "BASE_REGS", "GENERAL_REGS", "FLOAT_REGS", \
437 "NON_SPECIAL_REGS", "MQ_REGS", "LINK_REGS", "CTR_REGS", \
438 "LINK_OR_CTR_REGS", "SPECIAL_REGS", "SPEC_OR_GEN_REGS", \
439 "CR0_REGS", "CR_REGS", "NON_FLOAT_REGS", "ALL_REGS" }
440
441 /* Define which registers fit in which classes.
442 This is an initializer for a vector of HARD_REG_SET
443 of length N_REG_CLASSES. */
444
445 #define REG_CLASS_CONTENTS \
446 { {0, 0, 0}, {0xfffffffe, 0, 8}, {~0, 0, 8}, \
447 {0, ~0, 0}, {~0, ~0, 8}, {0, 0, 1}, {0, 0, 2}, \
448 {0, 0, 4}, {0, 0, 6}, {0, 0, 7}, {~0, 0, 15}, \
449 {0, 0, 16}, {0, 0, 0xff0}, {~0, 0, 0xffff}, \
450 {~0, ~0, 0xffff} }
451
452 /* The same information, inverted:
453 Return the class number of the smallest class containing
454 reg number REGNO. This could be a conditional expression
455 or could index an array. */
456
457 #define REGNO_REG_CLASS(REGNO) \
458 ((REGNO) == 0 ? GENERAL_REGS \
459 : (REGNO) < 32 ? BASE_REGS \
460 : FP_REGNO_P (REGNO) ? FLOAT_REGS \
461 : (REGNO) == 68 ? CR0_REGS \
462 : CR_REGNO_P (REGNO) ? CR_REGS \
463 : (REGNO) == 64 ? MQ_REGS \
464 : (REGNO) == 65 ? LINK_REGS \
465 : (REGNO) == 66 ? CTR_REGS \
466 : (REGNO) == 67 ? BASE_REGS \
467 : NO_REGS)
468
469 /* The class value for index registers, and the one for base regs. */
470 #define INDEX_REG_CLASS GENERAL_REGS
471 #define BASE_REG_CLASS BASE_REGS
472
473 /* Get reg_class from a letter such as appears in the machine description. */
474
475 #define REG_CLASS_FROM_LETTER(C) \
476 ((C) == 'f' ? FLOAT_REGS \
477 : (C) == 'b' ? BASE_REGS \
478 : (C) == 'h' ? SPECIAL_REGS \
479 : (C) == 'q' ? MQ_REGS \
480 : (C) == 'c' ? CTR_REGS \
481 : (C) == 'l' ? LINK_REGS \
482 : (C) == 'x' ? CR0_REGS \
483 : (C) == 'y' ? CR_REGS \
484 : NO_REGS)
485
486 /* The letters I, J, K, L, M, N, and P in a register constraint string
487 can be used to stand for particular ranges of immediate operands.
488 This macro defines what the ranges are.
489 C is the letter, and VALUE is a constant value.
490 Return 1 if VALUE is in the range specified by C.
491
492 `I' is signed 16-bit constants
493 `J' is a constant with only the high-order 16 bits non-zero
494 `K' is a constant with only the low-order 16 bits non-zero
495 `L' is a constant that can be placed into a mask operand
496 `M' is a constant that is greater than 31
497 `N' is a constant that is an exact power of two
498 `O' is the constant zero
499 `P' is a constant whose negation is a signed 16-bit constant */
500
501 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
502 ( (C) == 'I' ? (unsigned) ((VALUE) + 0x8000) < 0x10000 \
503 : (C) == 'J' ? ((VALUE) & 0xffff) == 0 \
504 : (C) == 'K' ? ((VALUE) & 0xffff0000) == 0 \
505 : (C) == 'L' ? mask_constant (VALUE) \
506 : (C) == 'M' ? (VALUE) > 31 \
507 : (C) == 'N' ? exact_log2 (VALUE) >= 0 \
508 : (C) == 'O' ? (VALUE) == 0 \
509 : (C) == 'P' ? (unsigned) ((- (VALUE)) + 0x8000) < 0x1000 \
510 : 0)
511
512 /* Similar, but for floating constants, and defining letters G and H.
513 Here VALUE is the CONST_DOUBLE rtx itself.
514
515 We flag for special constants when we can copy the constant into
516 a general register in two insns for DF and one insn for SF. */
517
518 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
519 ((C) == 'G' ? easy_fp_constant (VALUE, GET_MODE (VALUE)) : 0)
520
521 /* Optional extra constraints for this machine.
522
523 For the RS/6000, `Q' means that this is a memory operand that is just
524 an offset from a register. */
525
526 #define EXTRA_CONSTRAINT(OP, C) \
527 ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \
528 : 0)
529
530 /* Given an rtx X being reloaded into a reg required to be
531 in class CLASS, return the class of reg to actually use.
532 In general this is just CLASS; but on some machines
533 in some cases it is preferable to use a more restrictive class.
534
535 On the RS/6000, we have to return NO_REGS when we want to reload a
536 floating-point CONST_DOUBLE to force it to be copied to memory. */
537
538 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
539 ((GET_CODE (X) == CONST_DOUBLE \
540 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
541 ? NO_REGS : (CLASS))
542
543 /* Return the register class of a scratch register needed to copy IN into
544 or out of a register in CLASS in MODE. If it can be done directly,
545 NO_REGS is returned. */
546
547 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
548 secondary_reload_class (CLASS, MODE, IN)
549
550 /* Return the maximum number of consecutive registers
551 needed to represent mode MODE in a register of class CLASS.
552
553 On RS/6000, this is the size of MODE in words,
554 except in the FP regs, where a single reg is enough for two words. */
555 #define CLASS_MAX_NREGS(CLASS, MODE) \
556 ((CLASS) == FLOAT_REGS \
557 ? ((GET_MODE_SIZE (MODE) + 2 * UNITS_PER_WORD - 1) / (2 * UNITS_PER_WORD)) \
558 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
559 \f
560 /* Stack layout; function entry, exit and calling. */
561
562 /* Define this if pushing a word on the stack
563 makes the stack pointer a smaller address. */
564 #define STACK_GROWS_DOWNWARD
565
566 /* Define this if the nominal address of the stack frame
567 is at the high-address end of the local variables;
568 that is, each additional local variable allocated
569 goes at a more negative offset in the frame.
570
571 On the RS/6000, we grow upwards, from the area after the outgoing
572 arguments. */
573 /* #define FRAME_GROWS_DOWNWARD */
574
575 /* Offset within stack frame to start allocating local variables at.
576 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
577 first local allocated. Otherwise, it is the offset to the BEGINNING
578 of the first local allocated.
579
580 On the RS/6000, the frame pointer is the same as the stack pointer,
581 except for dynamic allocations. So we start after the fixed area and
582 outgoing parameter area. */
583
584 #define STARTING_FRAME_OFFSET (current_function_outgoing_args_size + 24)
585
586 /* If we generate an insn to push BYTES bytes,
587 this says how many the stack pointer really advances by.
588 On RS/6000, don't define this because there are no push insns. */
589 /* #define PUSH_ROUNDING(BYTES) */
590
591 /* Offset of first parameter from the argument pointer register value.
592 On the RS/6000, we define the argument pointer to the start of the fixed
593 area. */
594 #define FIRST_PARM_OFFSET(FNDECL) 24
595
596 /* Define this if stack space is still allocated for a parameter passed
597 in a register. The value is the number of bytes allocated to this
598 area. */
599 #define REG_PARM_STACK_SPACE(FNDECL) 32
600
601 /* Define this if the above stack space is to be considered part of the
602 space allocated by the caller. */
603 #define OUTGOING_REG_PARM_STACK_SPACE
604
605 /* This is the difference between the logical top of stack and the actual sp.
606
607 For the RS/6000, sp points past the fixed area. */
608 #define STACK_POINTER_OFFSET 24
609
610 /* Define this if the maximum size of all the outgoing args is to be
611 accumulated and pushed during the prologue. The amount can be
612 found in the variable current_function_outgoing_args_size. */
613 #define ACCUMULATE_OUTGOING_ARGS
614
615 /* Value is the number of bytes of arguments automatically
616 popped when returning from a subroutine call.
617 FUNTYPE is the data type of the function (as a tree),
618 or for a library call it is an identifier node for the subroutine name.
619 SIZE is the number of bytes of arguments passed on the stack. */
620
621 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
622
623 /* Define how to find the value returned by a function.
624 VALTYPE is the data type of the value (as a tree).
625 If the precise function being called is known, FUNC is its FUNCTION_DECL;
626 otherwise, FUNC is 0.
627
628 On RS/6000 an integer value is in r3 and a floating-point value is in
629 fp1. */
630
631 #define FUNCTION_VALUE(VALTYPE, FUNC) \
632 gen_rtx (REG, TYPE_MODE (VALTYPE), \
633 TREE_CODE (VALTYPE) == REAL_TYPE ? 33 : 3)
634
635 /* Define how to find the value returned by a library function
636 assuming the value has mode MODE. */
637
638 #define LIBCALL_VALUE(MODE) \
639 gen_rtx (REG, MODE, GET_MODE_CLASS (MODE) == MODE_FLOAT ? 33 : 3)
640
641 /* The definition of this macro implies that there are cases where
642 a scalar value cannot be returned in registers.
643
644 For the RS/6000, any structure or union type is returned in memory. */
645
646 #define RETURN_IN_MEMORY(TYPE) \
647 (TYPE_MODE (TYPE) == BLKmode \
648 || TREE_CODE (TYPE) == RECORD_TYPE || TREE_CODE (TYPE) == UNION_TYPE)
649
650 /* 1 if N is a possible register number for a function value
651 as seen by the caller.
652
653 On RS/6000, this is r3 and fp1. */
654
655 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 3 || ((N) == 33))
656
657 /* 1 if N is a possible register number for function argument passing.
658 On RS/6000, these are r3-r10 and fp1-fp13. */
659
660 #define FUNCTION_ARG_REGNO_P(N) \
661 (((N) <= 10 && (N) >= 3) || ((N) >= 33 && (N) <= 45))
662 \f
663 /* Define a data type for recording info about an argument list
664 during the scan of that argument list. This data type should
665 hold all necessary information about the function itself
666 and about the args processed so far, enough to enable macros
667 such as FUNCTION_ARG to determine where the next arg should go.
668
669 On the RS/6000, this is a structure. The first element is the number of
670 total argument words, the second is used to store the next
671 floating-point register number, and the third says how many more args we
672 have prototype types for. */
673
674 struct rs6000_args {int words, fregno, nargs_prototype; };
675 #define CUMULATIVE_ARGS struct rs6000_args
676
677 /* Define intermediate macro to compute the size (in registers) of an argument
678 for the RS/6000. */
679
680 #define RS6000_ARG_SIZE(MODE, TYPE, NAMED) \
681 (! (NAMED) ? 0 \
682 : (MODE) != BLKmode \
683 ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
684 : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
685
686 /* Initialize a variable CUM of type CUMULATIVE_ARGS
687 for a call to a function whose data type is FNTYPE.
688 For a library call, FNTYPE is 0. */
689
690 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
691 (CUM).words = 0, \
692 (CUM).fregno = 33, \
693 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
694 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
695 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
696 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
697 : 0)
698
699 /* Similar, but when scanning the definition of a procedure. We always
700 set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */
701
702 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
703 (CUM).words = 0, \
704 (CUM).fregno = 33, \
705 (CUM).nargs_prototype = 1000
706
707 /* Update the data in CUM to advance over an argument
708 of mode MODE and data type TYPE.
709 (TYPE is null for libcalls where that information may not be available.) */
710
711 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
712 { (CUM).nargs_prototype--; \
713 if (NAMED) \
714 { \
715 (CUM).words += RS6000_ARG_SIZE (MODE, TYPE, NAMED); \
716 if (GET_MODE_CLASS (MODE) == MODE_FLOAT) \
717 (CUM).fregno++; \
718 } \
719 }
720
721 /* Non-zero if we can use a floating-point register to pass this arg. */
722 #define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \
723 (GET_MODE_CLASS (MODE) == MODE_FLOAT && (CUM).fregno < 46)
724
725 /* Determine where to put an argument to a function.
726 Value is zero to push the argument on the stack,
727 or a hard register in which to store the argument.
728
729 MODE is the argument's machine mode.
730 TYPE is the data type of the argument (as a tree).
731 This is null for libcalls where that information may
732 not be available.
733 CUM is a variable of type CUMULATIVE_ARGS which gives info about
734 the preceding args and about the function being called.
735 NAMED is nonzero if this argument is a named parameter
736 (otherwise it is an extra parameter matching an ellipsis).
737
738 On RS/6000 the first eight words of non-FP are normally in registers
739 and the rest are pushed. The first 13 FP args are in registers.
740
741 If this is floating-point and no prototype is specified, we use
742 both an FP and integer register (or possibly FP reg and stack). Library
743 functions (when TYPE is zero) always have the proper types for args,
744 so we can pass the FP value just in one register. emit_library_function
745 doesn't support EXPR_LIST anyway. */
746
747 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
748 (! (NAMED) ? 0 \
749 : ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST) ? 0 \
750 : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) \
751 ? ((CUM).nargs_prototype > 0 || (TYPE) == 0 \
752 ? gen_rtx (REG, MODE, (CUM).fregno) \
753 : ((CUM).words < 8 \
754 ? gen_rtx (EXPR_LIST, VOIDmode, \
755 gen_rtx (REG, (MODE), 3 + (CUM).words), \
756 gen_rtx (REG, (MODE), (CUM).fregno)) \
757 : gen_rtx (EXPR_LIST, VOIDmode, 0, \
758 gen_rtx (REG, (MODE), (CUM).fregno)))) \
759 : (CUM).words < 8 ? gen_rtx(REG, (MODE), 3 + (CUM).words) : 0)
760
761 /* For an arg passed partly in registers and partly in memory,
762 this is the number of registers used.
763 For args passed entirely in registers or entirely in memory, zero. */
764
765 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
766 (! (NAMED) ? 0 \
767 : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) && (CUM).nargs_prototype >= 0 ? 0 \
768 : (((CUM).words < 8 \
769 && 8 < ((CUM).words + RS6000_ARG_SIZE (MODE, TYPE, NAMED))) \
770 ? 8 - (CUM).words : 0))
771
772 /* Perform any needed actions needed for a function that is receiving a
773 variable number of arguments.
774
775 CUM is as above.
776
777 MODE and TYPE are the mode and type of the current parameter.
778
779 PRETEND_SIZE is a variable that should be set to the amount of stack
780 that must be pushed by the prolog to pretend that our caller pushed
781 it.
782
783 Normally, this macro will push all remaining incoming registers on the
784 stack and set PRETEND_SIZE to the length of the registers pushed. */
785
786 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
787 { if ((CUM).words < 8) \
788 { \
789 int first_reg_offset = (CUM).words; \
790 \
791 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
792 first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \
793 \
794 if (first_reg_offset > 8) \
795 first_reg_offset = 8; \
796 \
797 if (! (NO_RTL) && first_reg_offset != 8) \
798 move_block_from_reg \
799 (3 + first_reg_offset, \
800 gen_rtx (MEM, BLKmode, \
801 plus_constant (virtual_incoming_args_rtx, \
802 first_reg_offset * 4)), \
803 8 - first_reg_offset); \
804 PRETEND_SIZE = (8 - first_reg_offset) * UNITS_PER_WORD; \
805 } \
806 }
807
808 /* This macro generates the assembly code for function entry.
809 FILE is a stdio stream to output the code to.
810 SIZE is an int: how many units of temporary storage to allocate.
811 Refer to the array `regs_ever_live' to determine which registers
812 to save; `regs_ever_live[I]' is nonzero if register number I
813 is ever used in the function. This macro is responsible for
814 knowing which registers should not be saved even if used. */
815
816 #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
817
818 /* Output assembler code to FILE to increment profiler label # LABELNO
819 for profiling a function entry. */
820
821 #define FUNCTION_PROFILER(FILE, LABELNO) \
822 output_function_profiler ((FILE), (LABELNO));
823
824 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
825 the stack pointer does not matter. No definition is equivalent to
826 always zero.
827
828 On the RS/6000, this is non-zero because we can restore the stack from
829 its backpointer, which we maintain. */
830 #define EXIT_IGNORE_STACK 1
831
832 /* This macro generates the assembly code for function exit,
833 on machines that need it. If FUNCTION_EPILOGUE is not defined
834 then individual return instructions are generated for each
835 return statement. Args are same as for FUNCTION_PROLOGUE.
836
837 The function epilogue should not depend on the current stack pointer!
838 It should use the frame pointer only. This is mandatory because
839 of alloca; we also take advantage of it to omit stack adjustments
840 before returning. */
841
842 #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
843 \f
844 /* Output assembler code for a block containing the constant parts
845 of a trampoline, leaving space for the variable parts.
846
847 The trampoline should set the static chain pointer to value placed
848 into the trampoline and should branch to the specified routine.
849
850 On the RS/6000, this is not code at all, but merely a data area,
851 since that is the way all functions are called. The first word is
852 the address of the function, the second word is the TOC pointer (r2),
853 and the third word is the static chain value. */
854
855 #define TRAMPOLINE_TEMPLATE(FILE) { fprintf (FILE, "\t.long 0, 0, 0\n"); }
856
857 /* Length in units of the trampoline for entering a nested function. */
858
859 #define TRAMPOLINE_SIZE 12
860
861 /* Emit RTL insns to initialize the variable parts of a trampoline.
862 FNADDR is an RTX for the address of the function's pure code.
863 CXT is an RTX for the static chain value for the function. */
864
865 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
866 { \
867 emit_move_insn (gen_rtx (MEM, SImode, \
868 memory_address (SImode, (ADDR))), \
869 gen_rtx (MEM, SImode, \
870 memory_address (SImode, (FNADDR)))); \
871 emit_move_insn (gen_rtx (MEM, SImode, \
872 memory_address (SImode, \
873 plus_constant ((ADDR), 4))), \
874 gen_rtx (MEM, SImode, \
875 memory_address (SImode, \
876 plus_constant ((FNADDR), 4)))); \
877 emit_move_insn (gen_rtx (MEM, SImode, \
878 memory_address (SImode, \
879 plus_constant ((ADDR), 8))), \
880 force_reg (SImode, (CXT))); \
881 }
882 \f
883 /* Definitions for register eliminations.
884
885 We have two registers that can be eliminated on the RS/6000. First, the
886 frame pointer register can often be eliminated in favor of the stack
887 pointer register. Secondly, the argument pointer register can always be
888 eliminated; it is replaced with either the stack or frame pointer. */
889
890 /* This is an array of structures. Each structure initializes one pair
891 of eliminable registers. The "from" register number is given first,
892 followed by "to". Eliminations of the same "from" register are listed
893 in order of preference. */
894 #define ELIMINABLE_REGS \
895 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
896 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
897 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM} }
898
899 /* Given FROM and TO register numbers, say whether this elimination is allowed.
900 Frame pointer elimination is automatically handled.
901
902 For the RS/6000, if frame pointer elimination is being done, we would like
903 to convert ap into fp, not sp. */
904
905 #define CAN_ELIMINATE(FROM, TO) \
906 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
907 ? ! frame_pointer_needed \
908 : 1)
909
910 /* Define the offset between two registers, one to be eliminated, and the other
911 its replacement, at the start of a routine. */
912 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
913 { \
914 int total_stack_size = (rs6000_sa_size () + get_frame_size () \
915 + current_function_outgoing_args_size); \
916 \
917 total_stack_size = (total_stack_size + 7) & ~7; \
918 \
919 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
920 { \
921 if (rs6000_pushes_stack ()) \
922 (OFFSET) = 0; \
923 else \
924 (OFFSET) = - total_stack_size; \
925 } \
926 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
927 (OFFSET) = total_stack_size; \
928 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
929 { \
930 if (rs6000_pushes_stack ()) \
931 (OFFSET) = total_stack_size; \
932 else \
933 (OFFSET) = 0; \
934 } \
935 else \
936 abort (); \
937 }
938 \f
939 /* Addressing modes, and classification of registers for them. */
940
941 /* #define HAVE_POST_INCREMENT */
942 /* #define HAVE_POST_DECREMENT */
943
944 #define HAVE_PRE_DECREMENT
945 #define HAVE_PRE_INCREMENT
946
947 /* Macros to check register numbers against specific register classes. */
948
949 /* These assume that REGNO is a hard or pseudo reg number.
950 They give nonzero only if REGNO is a hard reg of the suitable class
951 or a pseudo reg currently allocated to a suitable hard reg.
952 Since they use reg_renumber, they are safe only once reg_renumber
953 has been allocated, which happens in local-alloc.c. */
954
955 #define REGNO_OK_FOR_INDEX_P(REGNO) \
956 ((REGNO) < FIRST_PSEUDO_REGISTER \
957 ? (REGNO) <= 31 || (REGNO) == 67 \
958 : (reg_renumber[REGNO] >= 0 \
959 && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67)))
960
961 #define REGNO_OK_FOR_BASE_P(REGNO) \
962 ((REGNO) < FIRST_PSEUDO_REGISTER \
963 ? ((REGNO) > 0 && (REGNO) <= 31) || (REGNO) == 67 \
964 : (reg_renumber[REGNO] > 0 \
965 && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67)))
966 \f
967 /* Maximum number of registers that can appear in a valid memory address. */
968
969 #define MAX_REGS_PER_ADDRESS 2
970
971 /* Recognize any constant value that is a valid address. */
972
973 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
974
975 /* Nonzero if the constant value X is a legitimate general operand.
976 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
977
978 On the RS/6000, all integer constants are acceptable, most won't be valid
979 for particular insns, though. Only easy FP constants are
980 acceptable. */
981
982 #define LEGITIMATE_CONSTANT_P(X) \
983 (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \
984 || easy_fp_constant (X, GET_MODE (X)))
985
986 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
987 and check its validity for a certain class.
988 We have two alternate definitions for each of them.
989 The usual definition accepts all pseudo regs; the other rejects
990 them unless they have been allocated suitable hard regs.
991 The symbol REG_OK_STRICT causes the latter definition to be used.
992
993 Most source files want to accept pseudo regs in the hope that
994 they will get allocated to the class that the insn wants them to be in.
995 Source files for reload pass need to be strict.
996 After reload, it makes no difference, since pseudo regs have
997 been eliminated by then. */
998
999 #ifndef REG_OK_STRICT
1000
1001 /* Nonzero if X is a hard reg that can be used as an index
1002 or if it is a pseudo reg. */
1003 #define REG_OK_FOR_INDEX_P(X) \
1004 (REGNO (X) <= 31 || REGNO (X) == 67 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1005
1006 /* Nonzero if X is a hard reg that can be used as a base reg
1007 or if it is a pseudo reg. */
1008 #define REG_OK_FOR_BASE_P(X) \
1009 (REGNO (X) > 0 && REG_OK_FOR_INDEX_P (X))
1010
1011 #else
1012
1013 /* Nonzero if X is a hard reg that can be used as an index. */
1014 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1015 /* Nonzero if X is a hard reg that can be used as a base reg. */
1016 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1017
1018 #endif
1019 \f
1020 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1021 that is a valid memory address for an instruction.
1022 The MODE argument is the machine mode for the MEM expression
1023 that wants to use this address.
1024
1025 On the RS/6000, there are four valid address: a SYMBOL_REF that
1026 refers to a constant pool entry of an address (or the sum of it
1027 plus a constant), a short (16-bit signed) constant plus a register,
1028 the sum of two registers, or a register indirect, possibly with an
1029 auto-increment. For DFmode and DImode with an constant plus register,
1030 we must ensure that both words are addressable. */
1031
1032 #define LEGITIMATE_CONSTANT_POOL_BASE_P(X) \
1033 (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X) \
1034 && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (X)))
1035
1036 #define LEGITIMATE_CONSTANT_POOL_ADDRESS_P(X) \
1037 (LEGITIMATE_CONSTANT_POOL_BASE_P (X) \
1038 || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \
1039 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
1040 && LEGITIMATE_CONSTANT_POOL_BASE_P (XEXP (XEXP (X, 0), 0))))
1041
1042 #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \
1043 (GET_CODE (X) == CONST_INT \
1044 && (unsigned) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000)
1045
1046 #define LEGITIMATE_OFFSET_ADDRESS_P(MODE,X) \
1047 (GET_CODE (X) == PLUS \
1048 && GET_CODE (XEXP (X, 0)) == REG \
1049 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1050 && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \
1051 && (((MODE) != DFmode && (MODE) != DImode) \
1052 || LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4)))
1053
1054 #define LEGITIMATE_INDEXED_ADDRESS_P(X) \
1055 (GET_CODE (X) == PLUS \
1056 && GET_CODE (XEXP (X, 0)) == REG \
1057 && GET_CODE (XEXP (X, 1)) == REG \
1058 && ((REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1059 && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \
1060 || (REG_OK_FOR_BASE_P (XEXP (X, 1)) \
1061 && REG_OK_FOR_INDEX_P (XEXP (X, 0)))))
1062
1063 #define LEGITIMATE_INDIRECT_ADDRESS_P(X) \
1064 (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))
1065
1066 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1067 { if (LEGITIMATE_INDIRECT_ADDRESS_P (X)) \
1068 goto ADDR; \
1069 if (GET_CODE (X) == PRE_INC \
1070 && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \
1071 goto ADDR; \
1072 if (GET_CODE (X) == PRE_DEC \
1073 && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \
1074 goto ADDR; \
1075 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (X)) \
1076 goto ADDR; \
1077 if (LEGITIMATE_OFFSET_ADDRESS_P (MODE, X)) \
1078 goto ADDR; \
1079 if ((MODE) != DImode && (MODE) != TImode \
1080 && LEGITIMATE_INDEXED_ADDRESS_P (X)) \
1081 goto ADDR; \
1082 }
1083 \f
1084 /* Try machine-dependent ways of modifying an illegitimate address
1085 to be legitimate. If we find one, return the new, valid address.
1086 This macro is used in only one place: `memory_address' in explow.c.
1087
1088 OLDX is the address as it was before break_out_memory_refs was called.
1089 In some cases it is useful to look at this to decide what needs to be done.
1090
1091 MODE and WIN are passed so that this macro can use
1092 GO_IF_LEGITIMATE_ADDRESS.
1093
1094 It is always safe for this macro to do nothing. It exists to recognize
1095 opportunities to optimize the output.
1096
1097 On RS/6000, first check for the sum of a register with a constant
1098 integer that is out of range. If so, generate code to add the
1099 constant with the low-order 16 bits masked to the register and force
1100 this result into another register (this can be done with `cau').
1101 Then generate an address of REG+(CONST&0xffff), allowing for the
1102 possibility of bit 16 being a one.
1103
1104 Then check for the sum of a register and something not constant, try to
1105 load the other things into a register and return the sum. */
1106
1107 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1108 { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1109 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1110 && (unsigned) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \
1111 { int high_int, low_int; \
1112 high_int = INTVAL (XEXP (X, 1)) >> 16; \
1113 low_int = INTVAL (XEXP (X, 1)) & 0xffff; \
1114 if (low_int & 0x8000) \
1115 high_int += 1, low_int |= 0xffff0000; \
1116 (X) = gen_rtx (PLUS, SImode, \
1117 force_operand \
1118 (gen_rtx (PLUS, SImode, XEXP (X, 0), \
1119 gen_rtx (CONST_INT, VOIDmode, \
1120 high_int << 16)), 0),\
1121 gen_rtx (CONST_INT, VOIDmode, low_int)); \
1122 goto WIN; \
1123 } \
1124 else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1125 && GET_CODE (XEXP (X, 1)) != CONST_INT \
1126 && (MODE) != DImode && (MODE) != TImode) \
1127 { \
1128 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1129 force_reg (SImode, force_operand (XEXP (X, 1), 0))); \
1130 goto WIN; \
1131 } \
1132 }
1133
1134 /* Go to LABEL if ADDR (a legitimate address expression)
1135 has an effect that depends on the machine mode it is used for.
1136
1137 On the RS/6000 this is true if the address is valid with a zero offset
1138 but not with an offset of four (this means it cannot be used as an
1139 address for DImode or DFmode) or is a pre-increment or decrement. Since
1140 we know it is valid, we just check for an address that is not valid with
1141 an offset of four. */
1142
1143 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1144 { if (GET_CODE (ADDR) == PLUS \
1145 && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 0) \
1146 && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 4)) \
1147 goto LABEL; \
1148 if (GET_CODE (ADDR) == PRE_INC) \
1149 goto LABEL; \
1150 if (GET_CODE (ADDR) == PRE_DEC) \
1151 goto LABEL; \
1152 }
1153 \f
1154 /* Define this if some processing needs to be done immediately before
1155 emitting code for an insn. */
1156
1157 /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */
1158
1159 /* Specify the machine mode that this machine uses
1160 for the index in the tablejump instruction. */
1161 #define CASE_VECTOR_MODE SImode
1162
1163 /* Define this if the tablejump instruction expects the table
1164 to contain offsets from the address of the table.
1165 Do not define this if the table should contain absolute addresses. */
1166 #define CASE_VECTOR_PC_RELATIVE
1167
1168 /* Specify the tree operation to be used to convert reals to integers. */
1169 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1170
1171 /* This is the kind of divide that is easiest to do in the general case. */
1172 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1173
1174 /* Define this as 1 if `char' should by default be signed; else as 0. */
1175 #define DEFAULT_SIGNED_CHAR 0
1176
1177 /* This flag, if defined, says the same insns that convert to a signed fixnum
1178 also convert validly to an unsigned one. */
1179
1180 /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */
1181
1182 /* Max number of bytes we can move from memory to memory
1183 in one reasonably fast instruction. */
1184 #define MOVE_MAX 16
1185
1186 /* Nonzero if access to memory by bytes is no faster than for words.
1187 Also non-zero if doing byte operations (specifically shifts) in registers
1188 is undesirable. */
1189 #define SLOW_BYTE_ACCESS 1
1190
1191 /* Define if normal loads of shorter-than-word items from memory clears
1192 the rest of the bigs in the register. */
1193 #define BYTE_LOADS_ZERO_EXTEND
1194 \f
1195 /* The RS/6000 uses the XCOFF format. */
1196
1197 #define XCOFF_DEBUGGING_INFO
1198
1199 /* Define if the object format being used is COFF or a superset. */
1200 #define OBJECT_FORMAT_COFF
1201
1202 /* Define the magic numbers that we recognize as COFF. */
1203
1204 #define MY_ISCOFF(magic) \
1205 ((magic) == U802WRMAGIC || (magic) == U802ROMAGIC || (magic) == U802TOCMAGIC)
1206
1207 /* This is the only version of nm that collect2 can work with. */
1208 #define REAL_NM_FILE_NAME "/usr/ucb/nm"
1209
1210 /* We don't have GAS for the RS/6000 yet, so don't write out special
1211 .stabs in cc1plus. */
1212
1213 #define FASCIST_ASSEMBLER
1214
1215 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1216 is done just by pretending it is already truncated. */
1217 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1218
1219 /* Specify the machine mode that pointers have.
1220 After generation of rtl, the compiler makes no further distinction
1221 between pointers and any other objects of this machine mode. */
1222 #define Pmode SImode
1223
1224 /* Mode of a function address in a call instruction (for indexing purposes).
1225
1226 Doesn't matter on RS/6000. */
1227 #define FUNCTION_MODE SImode
1228
1229 /* Define this if addresses of constant functions
1230 shouldn't be put through pseudo regs where they can be cse'd.
1231 Desirable on machines where ordinary constants are expensive
1232 but a CALL with constant address is cheap. */
1233 #define NO_FUNCTION_CSE
1234
1235 /* Define this if shift instructions ignore all but the low-order
1236 few bits. */
1237 #define SHIFT_COUNT_TRUNCATED
1238
1239 /* Use atexit for static constructors/destructors, instead of defining
1240 our own exit function. */
1241 #define HAVE_ATEXIT
1242
1243 /* Compute the cost of computing a constant rtl expression RTX
1244 whose rtx-code is CODE. The body of this macro is a portion
1245 of a switch statement. If the code is computed here,
1246 return it with a return statement. Otherwise, break from the switch.
1247
1248 On the RS/6000, if it is legal in the insn, it is free. So this
1249 always returns 0. */
1250
1251 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1252 case CONST_INT: \
1253 case CONST: \
1254 case LABEL_REF: \
1255 case SYMBOL_REF: \
1256 case CONST_DOUBLE: \
1257 return 0;
1258
1259 /* Provide the costs of a rtl expression. This is in the body of a
1260 switch on CODE. */
1261
1262 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1263 case MULT: \
1264 return (GET_CODE (XEXP (X, 1)) != CONST_INT \
1265 ? COSTS_N_INSNS (5) \
1266 : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \
1267 ? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \
1268 case DIV: \
1269 case MOD: \
1270 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1271 && exact_log2 (INTVAL (XEXP (X, 1))) >= 0) \
1272 return COSTS_N_INSNS (2); \
1273 /* otherwise fall through to normal divide. */ \
1274 case UDIV: \
1275 case UMOD: \
1276 return COSTS_N_INSNS (19); \
1277 case MEM: \
1278 /* MEM should be slightly more expensive than (plus (reg) (const)) */ \
1279 return 5;
1280
1281 /* Compute the cost of an address. This is meant to approximate the size
1282 and/or execution delay of an insn using that address. If the cost is
1283 approximated by the RTL complexity, including CONST_COSTS above, as
1284 is usually the case for CISC machines, this macro should not be defined.
1285 For aggressively RISCy machines, only one insn format is allowed, so
1286 this macro should be a constant. The value of this macro only matters
1287 for valid addresses.
1288
1289 For the RS/6000, everything is cost 0. */
1290
1291 #define ADDRESS_COST(RTX) 0
1292
1293 /* Adjust the length of an INSN. LENGTH is the currently-computed length and
1294 should be adjusted to reflect any required changes. This macro is used when
1295 there is some systematic length adjustment required that would be difficult
1296 to express in the length attribute. */
1297
1298 /* #define ADJUST_INSN_LENGTH(X,LENGTH) */
1299
1300 /* Add any extra modes needed to represent the condition code.
1301
1302 For the RS/6000, we need separate modes when unsigned (logical) comparisons
1303 are being done and we need a separate mode for floating-point. We also
1304 use a mode for the case when we are comparing the results of two
1305 comparisons. */
1306
1307 #define EXTRA_CC_MODES CCUNSmode, CCFPmode, CCEQmode
1308
1309 /* Define the names for the modes specified above. */
1310 #define EXTRA_CC_NAMES "CCUNS", "CCFP", "CCEQ"
1311
1312 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1313 return the mode to be used for the comparison. For floating-point, CCFPmode
1314 should be used. CCUNSmode should be used for unsigned comparisons.
1315 CCEQmode should be used when we are doing an inequality comparison on
1316 the result of a comparison. CCmode should be used in all other cases. */
1317
1318 #define SELECT_CC_MODE(OP,X,Y) \
1319 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \
1320 : (OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU ? CCUNSmode \
1321 : (((OP) == EQ || (OP) == NE) && GET_RTX_CLASS (GET_CODE (X)) == '<' \
1322 ? CCEQmode : CCmode))
1323
1324 /* Define the information needed to generate branch and scc insns. This is
1325 stored from the compare operation. Note that we can't use "rtx" here
1326 since it hasn't been defined! */
1327
1328 extern struct rtx_def *rs6000_compare_op0, *rs6000_compare_op1;
1329 extern int rs6000_compare_fp_p;
1330
1331 /* Set to non-zero by "fix" operation to indicate that itrunc and
1332 uitrunc must be defined. */
1333
1334 extern int rs6000_trunc_used;
1335 \f
1336 /* Control the assembler format that we output. */
1337
1338 /* Output at beginning of assembler file.
1339
1340 Initialize the section names for the RS/6000 at this point.
1341
1342 We want to go into the TOC section so at least one .toc will be emitted.
1343 Also, in order to output proper .bs/.es pairs, we need at least one static
1344 [RW] section emitted.
1345
1346 We then switch back to text to force the gcc2_compiled. label and the space
1347 allocated after it (when profiling) into the text section.
1348
1349 Finally, declare mcount when profiling to make the assembler happy. */
1350
1351 #define ASM_FILE_START(FILE) \
1352 { \
1353 rs6000_gen_section_name (&xcoff_bss_section_name, \
1354 main_input_filename, ".bss_"); \
1355 rs6000_gen_section_name (&xcoff_private_data_section_name, \
1356 main_input_filename, ".rw_"); \
1357 rs6000_gen_section_name (&xcoff_read_only_section_name, \
1358 main_input_filename, ".ro_"); \
1359 \
1360 toc_section (); \
1361 if (write_symbols != NO_DEBUG) \
1362 private_data_section (); \
1363 text_section (); \
1364 if (profile_flag) \
1365 fprintf (FILE, "\t.extern .mcount\n"); \
1366 }
1367
1368 /* Output at end of assembler file.
1369
1370 On the RS/6000, referencing data should automatically pull in text. */
1371
1372 #define ASM_FILE_END(FILE) \
1373 { \
1374 text_section (); \
1375 fprintf (FILE, "_section_.text:\n"); \
1376 data_section (); \
1377 fprintf (FILE, "\t.long _section_.text\n"); \
1378 }
1379
1380 /* We define this to prevent the name mangler from putting dollar signs into
1381 function names. */
1382
1383 #define NO_DOLLAR_IN_LABEL
1384
1385 /* We define this to 0 so that gcc will never accept a dollar sign in a
1386 variable name. This is needed because the AIX assembler will not accept
1387 dollar signs. */
1388
1389 #define DOLLARS_IN_IDENTIFIERS 0
1390
1391 /* Implicit library calls should use memcpy, not bcopy, etc. */
1392
1393 #define TARGET_MEM_FUNCTIONS
1394
1395 /* Define the extra sections we need. We define three: one is the read-only
1396 data section which is used for constants. This is a csect whose name is
1397 derived from the name of the input file. The second is for initialized
1398 global variables. This is a csect whose name is that of the variable.
1399 The third is the TOC. */
1400
1401 #define EXTRA_SECTIONS \
1402 read_only_data, private_data, read_only_private_data, toc, bss
1403
1404 /* Define the name of our readonly data section. */
1405
1406 #define READONLY_DATA_SECTION read_only_data_section
1407
1408 /* Indicate that jump tables go in the text section. */
1409
1410 #define JUMP_TABLES_IN_TEXT_SECTION
1411
1412 /* Define the routines to implement these extra sections. */
1413
1414 #define EXTRA_SECTION_FUNCTIONS \
1415 \
1416 void \
1417 read_only_data_section () \
1418 { \
1419 if (in_section != read_only_data) \
1420 { \
1421 fprintf (asm_out_file, "\t.csect %s[RO]\n", \
1422 xcoff_read_only_section_name); \
1423 in_section = read_only_data; \
1424 } \
1425 } \
1426 \
1427 void \
1428 private_data_section () \
1429 { \
1430 if (in_section != private_data) \
1431 { \
1432 fprintf (asm_out_file, "\t.csect %s[RW]\n", \
1433 xcoff_private_data_section_name); \
1434 \
1435 in_section = private_data; \
1436 } \
1437 } \
1438 \
1439 void \
1440 read_only_private_data_section () \
1441 { \
1442 if (in_section != read_only_private_data) \
1443 { \
1444 fprintf (asm_out_file, "\t.csect %s[RO]\n", \
1445 xcoff_private_data_section_name); \
1446 in_section = read_only_private_data; \
1447 } \
1448 } \
1449 \
1450 void \
1451 toc_section () \
1452 { \
1453 if (in_section != toc) \
1454 fprintf (asm_out_file, "\t.toc\n"); \
1455 \
1456 in_section = toc; \
1457 }
1458
1459 /* This macro produces the initial definition of a function name.
1460 On the RS/6000, we need to place an extra '.' in the function name and
1461 output the function descriptor.
1462
1463 The csect for the function will have already been created by the
1464 `text_section' call previously done. We do have to go back to that
1465 csect, however. */
1466
1467 /* ??? What do the 16 and 044 in the .function line really mean? */
1468
1469 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
1470 { if (TREE_PUBLIC (DECL)) \
1471 { \
1472 fprintf (FILE, "\t.globl ."); \
1473 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1474 fprintf (FILE, "\n"); \
1475 } \
1476 else if (write_symbols == XCOFF_DEBUG) \
1477 { \
1478 fprintf (FILE, "\t.lglobl ."); \
1479 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1480 fprintf (FILE, "\n"); \
1481 } \
1482 fprintf (FILE, "\t.csect "); \
1483 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1484 fprintf (FILE, "[DS]\n"); \
1485 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1486 fprintf (FILE, ":\n"); \
1487 fprintf (FILE, "\t.long ."); \
1488 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1489 fprintf (FILE, ", TOC[tc0], 0\n"); \
1490 fprintf (FILE, "\t.csect [PR]\n."); \
1491 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1492 fprintf (FILE, ":\n"); \
1493 if (write_symbols == XCOFF_DEBUG) \
1494 xcoffout_declare_function (FILE, DECL, NAME); \
1495 }
1496
1497 /* Return non-zero if this entry is to be written into the constant pool
1498 in a special way. We do so if this is a SYMBOL_REF, LABEL_REF or a CONST
1499 containing one of them. If -mfp-in-toc (the default), we also do
1500 this for floating-point constants. We actually can only do this
1501 if the FP formats of the target and host machines are the same, but
1502 we can't check that since not every file that uses
1503 GO_IF_LEGITIMATE_ADDRESS_P includes real.h. */
1504
1505 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY_P(X) \
1506 (GET_CODE (X) == SYMBOL_REF \
1507 || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \
1508 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF) \
1509 || GET_CODE (X) == LABEL_REF \
1510 || (TARGET_FP_IN_TOC && GET_CODE (X) == CONST_DOUBLE \
1511 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1512 && BITS_PER_WORD == HOST_BITS_PER_INT))
1513
1514 /* Select section for constant in constant pool.
1515
1516 On RS/6000, all constants are in the private read-only data area.
1517 However, if this is being placed in the TOC it must be output as a
1518 toc entry. */
1519
1520 #define SELECT_RTX_SECTION(MODE, X) \
1521 { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \
1522 toc_section (); \
1523 else \
1524 read_only_private_data_section (); \
1525 }
1526
1527 /* Macro to output a special constant pool entry. Go to WIN if we output
1528 it. Otherwise, it is written the usual way.
1529
1530 On the RS/6000, toc entries are handled this way. */
1531
1532 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, X, MODE, ALIGN, LABELNO, WIN) \
1533 { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \
1534 { \
1535 output_toc (FILE, X, LABELNO); \
1536 goto WIN; \
1537 } \
1538 }
1539
1540 /* Select the section for an initialized data object.
1541
1542 On the RS/6000, we have a special section for all variables except those
1543 that are static. */
1544
1545 #define SELECT_SECTION(EXP,RELOC) \
1546 { \
1547 if ((TREE_READONLY (EXP) \
1548 || (TREE_CODE (EXP) == STRING_CST \
1549 && !flag_writable_strings)) \
1550 && ! TREE_THIS_VOLATILE (EXP) \
1551 && ! (RELOC)) \
1552 { \
1553 if (TREE_PUBLIC (EXP)) \
1554 read_only_data_section (); \
1555 else \
1556 read_only_private_data_section (); \
1557 } \
1558 else \
1559 { \
1560 if (TREE_PUBLIC (EXP)) \
1561 data_section (); \
1562 else \
1563 private_data_section (); \
1564 } \
1565 }
1566
1567 /* This outputs NAME to FILE up to the first null or '['. */
1568
1569 #define RS6000_OUTPUT_BASENAME(FILE, NAME) \
1570 if ((NAME)[0] == '*') \
1571 assemble_name (FILE, NAME); \
1572 else \
1573 { \
1574 char *_p; \
1575 for (_p = (NAME); *_p && *_p != '['; _p++) \
1576 fputc (*_p, FILE); \
1577 }
1578
1579 /* Output something to declare an external symbol to the assembler. Most
1580 assemblers don't need this.
1581
1582 If we haven't already, add "[RW]" (or "[DS]" for a function) to the
1583 name. Normally we write this out along with the name. In the few cases
1584 where we can't, it gets stripped off. */
1585
1586 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1587 { rtx _symref = XEXP (DECL_RTL (DECL), 0); \
1588 if ((TREE_CODE (DECL) == VAR_DECL \
1589 || TREE_CODE (DECL) == FUNCTION_DECL) \
1590 && (NAME)[0] != '*' \
1591 && (NAME)[strlen (NAME) - 1] != ']') \
1592 { \
1593 char *_name = (char *) permalloc (strlen (XSTR (_symref, 0)) + 5); \
1594 strcpy (_name, XSTR (_symref, 0)); \
1595 strcat (_name, TREE_CODE (DECL) == FUNCTION_DECL ? "[DS]" : "[RW]"); \
1596 XSTR (_symref, 0) = _name; \
1597 } \
1598 fprintf (FILE, "\t.extern "); \
1599 assemble_name (FILE, XSTR (_symref, 0)); \
1600 if (TREE_CODE (DECL) == FUNCTION_DECL) \
1601 { \
1602 fprintf (FILE, "\n\t.extern ."); \
1603 RS6000_OUTPUT_BASENAME (FILE, XSTR (_symref, 0)); \
1604 } \
1605 fprintf (FILE, "\n"); \
1606 }
1607
1608 /* Similar, but for libcall. We only have to worry about the function name,
1609 not that of the descriptor. */
1610
1611 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \
1612 { fprintf (FILE, "\t.extern ."); \
1613 assemble_name (FILE, XSTR (FUN, 0)); \
1614 fprintf (FILE, "\n"); \
1615 }
1616
1617 /* Output to assembler file text saying following lines
1618 may contain character constants, extra white space, comments, etc. */
1619
1620 #define ASM_APP_ON ""
1621
1622 /* Output to assembler file text saying following lines
1623 no longer contain unusual constructs. */
1624
1625 #define ASM_APP_OFF ""
1626
1627 /* Output before instructions. */
1628
1629 #define TEXT_SECTION_ASM_OP ".csect [PR]"
1630
1631 /* Output before writable data. */
1632
1633 #define DATA_SECTION_ASM_OP ".csect .data[RW]"
1634
1635 /* How to refer to registers in assembler output.
1636 This sequence is indexed by compiler's hard-register-number (see above). */
1637
1638 #define REGISTER_NAMES \
1639 {"0", "1", "2", "3", "4", "5", "6", "7", \
1640 "8", "9", "10", "11", "12", "13", "14", "15", \
1641 "16", "17", "18", "19", "20", "21", "22", "23", \
1642 "24", "25", "26", "27", "28", "29", "30", "31", \
1643 "0", "1", "2", "3", "4", "5", "6", "7", \
1644 "8", "9", "10", "11", "12", "13", "14", "15", \
1645 "16", "17", "18", "19", "20", "21", "22", "23", \
1646 "24", "25", "26", "27", "28", "29", "30", "31", \
1647 "mq", "lr", "ctr", "ap", \
1648 "0", "1", "2", "3", "4", "5", "6", "7" }
1649
1650 /* Table of additional register names to use in user input. */
1651
1652 #define ADDITIONAL_REGISTER_NAMES \
1653 {"r0", 0, "r1", 1, "r2", 2, "r3", 3, \
1654 "r4", 4, "r5", 5, "r6", 6, "r7", 7, \
1655 "r8", 8, "r9", 9, "r10", 10, "r11", 11, \
1656 "r12", 12, "r13", 13, "r14", 14, "r15", 15, \
1657 "r16", 16, "r17", 17, "r18", 18, "r19", 19, \
1658 "r20", 20, "r21", 21, "r22", 22, "r23", 23, \
1659 "r24", 24, "r25", 25, "r26", 26, "r27", 27, \
1660 "r28", 28, "r29", 29, "r30", 30, "r31", 31, \
1661 "fr0", 32, "fr1", 33, "fr2", 34, "fr3", 35, \
1662 "fr4", 36, "fr5", 37, "fr6", 38, "fr7", 39, \
1663 "fr8", 40, "fr9", 41, "fr10", 42, "fr11", 43, \
1664 "fr12", 44, "fr13", 45, "fr14", 46, "fr15", 47, \
1665 "fr16", 48, "fr17", 49, "fr18", 50, "fr19", 51, \
1666 "fr20", 52, "fr21", 53, "fr22", 54, "fr23", 55, \
1667 "fr24", 56, "fr25", 57, "fr26", 58, "fr27", 59, \
1668 "fr28", 60, "fr29", 61, "fr30", 62, "fr31", 63, \
1669 /* no additional names for: mq, lr, ctr, ap */ \
1670 "cr0", 68, "cr1", 69, "cr2", 70, "cr3", 71, \
1671 "cr4", 72, "cr5", 73, "cr6", 74, "cr7", 75, \
1672 "cc", 68 }
1673
1674 /* How to renumber registers for dbx and gdb. */
1675
1676 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1677
1678 /* This is how to output the definition of a user-level label named NAME,
1679 such as the label on a static function or variable NAME. */
1680
1681 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1682 do { RS6000_OUTPUT_BASENAME (FILE, NAME); fputs (":\n", FILE); } while (0)
1683
1684 /* This is how to output a command to make the user-level label named NAME
1685 defined for reference from other files. */
1686
1687 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1688 do { fputs ("\t.globl ", FILE); \
1689 RS6000_OUTPUT_BASENAME (FILE, NAME); fputs ("\n", FILE);} while (0)
1690
1691 /* This is how to output a reference to a user-level label named NAME.
1692 `assemble_name' uses this. */
1693
1694 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1695 fprintf (FILE, NAME)
1696
1697 /* This is how to output an internal numbered label where
1698 PREFIX is the class of label and NUM is the number within the class. */
1699
1700 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1701 fprintf (FILE, "%s..%d:\n", PREFIX, NUM)
1702
1703 /* This is how to output a label for a jump table. Arguments are the same as
1704 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1705 passed. */
1706
1707 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1708 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1709
1710 /* This is how to store into the string LABEL
1711 the symbol_ref name of an internal numbered label where
1712 PREFIX is the class of label and NUM is the number within the class.
1713 This is suitable for output with `assemble_name'. */
1714
1715 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1716 sprintf (LABEL, "%s..%d", PREFIX, NUM)
1717
1718 /* This is how to output an assembler line defining a `double' constant. */
1719
1720 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1721 fprintf (FILE, "\t.double 0d%.20e\n", (VALUE))
1722
1723 /* This is how to output an assembler line defining a `float' constant. */
1724
1725 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1726 fprintf (FILE, "\t.float 0d%.20e\n", (VALUE))
1727
1728 /* This is how to output an assembler line defining an `int' constant. */
1729
1730 #define ASM_OUTPUT_INT(FILE,VALUE) \
1731 ( fprintf (FILE, "\t.long "), \
1732 output_addr_const (FILE, (VALUE)), \
1733 fprintf (FILE, "\n"))
1734
1735 /* Likewise for `char' and `short' constants. */
1736
1737 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1738 ( fprintf (FILE, "\t.short "), \
1739 output_addr_const (FILE, (VALUE)), \
1740 fprintf (FILE, "\n"))
1741
1742 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1743 ( fprintf (FILE, "\t.byte "), \
1744 output_addr_const (FILE, (VALUE)), \
1745 fprintf (FILE, "\n"))
1746
1747 /* This is how to output an assembler line for a numeric constant byte. */
1748
1749 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1750 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1751
1752 /* This is how to output an assembler line to define N characters starting
1753 at P to FILE. */
1754
1755 #define ASM_OUTPUT_ASCII(FILE, P, N) output_ascii ((FILE), (P), (N))
1756
1757 /* This is how to output code to push a register on the stack.
1758 It need not be very fast code. */
1759
1760 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1761 fprintf (FILE, "\tstu %s,-4(r1)\n", reg_names[REGNO]);
1762
1763 /* This is how to output an insn to pop a register from the stack.
1764 It need not be very fast code. */
1765
1766 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1767 fprintf (FILE, "\tl %s,0(r1)\n\tai r1,r1,4\n", reg_names[REGNO])
1768
1769 /* This is how to output an element of a case-vector that is absolute.
1770 (RS/6000 does not use such vectors, but we must define this macro
1771 anyway.) */
1772
1773 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1774 fprintf (FILE, "\t.long L..%d\n", VALUE)
1775
1776 /* This is how to output an element of a case-vector that is relative. */
1777
1778 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1779 fprintf (FILE, "\t.long L..%d-L..%d\n", VALUE, REL)
1780
1781 /* This is how to output an assembler line
1782 that says to advance the location counter
1783 to a multiple of 2**LOG bytes. */
1784
1785 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1786 if ((LOG) != 0) \
1787 fprintf (FILE, "\t.align %d\n", (LOG))
1788
1789 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1790 fprintf (FILE, "\t.space %d\n", (SIZE))
1791
1792 /* This says how to output an assembler line
1793 to define a global common symbol. */
1794
1795 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1796 do { fputs (".comm ", (FILE)); \
1797 RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \
1798 fprintf ((FILE), ",%d\n", (SIZE)); } while (0)
1799
1800 /* This says how to output an assembler line
1801 to define a local common symbol. */
1802
1803 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1804 do { fputs (".lcomm ", (FILE)); \
1805 RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \
1806 fprintf ((FILE), ",%d,%s\n", (SIZE), xcoff_bss_section_name); \
1807 } while (0)
1808
1809 /* Store in OUTPUT a string (made with alloca) containing
1810 an assembler-name for a local static variable named NAME.
1811 LABELNO is an integer which is different for each call. */
1812
1813 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1814 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1815 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1816
1817 /* Define the parentheses used to group arithmetic operations
1818 in assembler code. */
1819
1820 #define ASM_OPEN_PAREN "("
1821 #define ASM_CLOSE_PAREN ")"
1822
1823 /* Define results of standard character escape sequences. */
1824 #define TARGET_BELL 007
1825 #define TARGET_BS 010
1826 #define TARGET_TAB 011
1827 #define TARGET_NEWLINE 012
1828 #define TARGET_VT 013
1829 #define TARGET_FF 014
1830 #define TARGET_CR 015
1831
1832 /* Print operand X (an rtx) in assembler syntax to file FILE.
1833 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1834 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1835
1836 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1837
1838 /* Define which CODE values are valid. */
1839
1840 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0
1841
1842 /* Print a memory address as an operand to reference that memory location. */
1843
1844 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1845
1846 /* Define the codes that are matched by predicates in rs6000.c. */
1847
1848 #define PREDICATE_CODES \
1849 {"short_cint_operand", {CONST_INT}}, \
1850 {"u_short_cint_operand", {CONST_INT}}, \
1851 {"non_short_cint_operand", {CONST_INT}}, \
1852 {"gpc_reg_operand", {SUBREG, REG}}, \
1853 {"cc_reg_operand", {SUBREG, REG}}, \
1854 {"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, \
1855 {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \
1856 {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \
1857 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1858 {"easy_fp_constant", {CONST_DOUBLE}}, \
1859 {"reg_or_mem_operand", {SUBREG, MEM, REG}}, \
1860 {"fp_reg_or_mem_operand", {SUBREG, MEM, REG}}, \
1861 {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \
1862 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1863 {"non_add_cint_operand", {CONST_INT}}, \
1864 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1865 {"non_and_cint_operand", {CONST_INT}}, \
1866 {"logical_operand", {SUBREG, REG, CONST_INT}}, \
1867 {"non_logical_cint_operand", {CONST_INT}}, \
1868 {"mask_operand", {CONST_INT}}, \
1869 {"call_operand", {SYMBOL_REF, REG}}, \
1870 {"input_operand", {SUBREG, MEM, REG, CONST_INT}}, \
1871 {"branch_comparison_operation", {EQ, NE, LE, LT, GE, \
1872 LT, LEU, LTU, GEU, GTU}}, \
1873 {"scc_comparison_operation", {EQ, NE, LE, LT, GE, \
1874 LT, LEU, LTU, GEU, GTU}},
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