1 /* Definitions of target machine for GNU compiler, for IBM RS/6000.
2 Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* Note that some other tm.h files include this one and then override
23 many of the definitions that relate to assembler syntax. */
26 /* Names to predefine in the preprocessor for this target machine. */
28 #define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 \
29 -Asystem(unix) -Asystem(aix) -Acpu(rs6000) -Amachine(rs6000)"
31 /* Print subsidiary information on the compiler version in use. */
32 #define TARGET_VERSION ;
34 /* Tell the assembler to assume that all undefined names are external.
36 Don't do this until the fixed IBM assembler is more generally available.
37 When this becomes permanently defined, the ASM_OUTPUT_EXTERNAL,
38 ASM_OUTPUT_EXTERNAL_LIBCALL, and RS6000_OUTPUT_BASENAME macros will no
39 longer be needed. Also, the extern declaration of mcount in ASM_FILE_START
40 will no longer be needed. */
42 /* #define ASM_SPEC "-u" */
44 /* Define appropriate architecture macros for preprocessor depending on
48 %{posix: -D_POSIX_SOURCE} \
50 %{mpower: %{!mpower2: -D_ARCH_PWR}} \
51 %{mpower2: -D_ARCH_PWR2} \
52 %{mpowerpc*: -D_ARCH_PPC} \
53 %{mno-power: %{!mpowerpc*: -D_ARCH_COM}} \
54 %{!mno-power: %{!mpower2: -D_ARCH_PWR}}} \
55 %{mcpu=common: -D_ARCH_COM} \
56 %{mcpu=power: -D_ARCH_PWR} \
57 %{mcpu=powerpc: -D_ARCH_PPC} \
58 %{mcpu=rios: -D_ARCH_PWR} \
59 %{mcpu=rios1: -D_ARCH_PWR} \
60 %{mcpu=rios2: -D_ARCH_PWR2} \
61 %{mcpu=rsc: -D_ARCH_PWR} \
62 %{mcpu=rsc1: -D_ARCH_PWR} \
63 %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
64 %{mcpu=mpc601: -D_ARCH_PPC -D_ARCH_PWR} \
65 %{mcpu=ppc601: -D_ARCH_PPC -D_ARCH_PWR} \
66 %{mcpu=603: -D_ARCH_PPC} \
67 %{mcpu=mpc603: -D_ARCH_PPC} \
68 %{mcpu=ppc603: -D_ARCH_PPC} \
69 %{mcpu=604: -D_ARCH_PPC} \
70 %{mcpu=mpc604: -D_ARCH_PPC} \
71 %{mcpu=ppc604: -D_ARCH_PPC}"
73 /* Define the options for the binder: Start text at 512, align all segments
74 to 512 bytes, and warn if there is text relocation.
76 The -bhalt:4 option supposedly changes the level at which ld will abort,
77 but it also suppresses warnings about multiply defined symbols and is
78 used by the AIX cc command. So we use it here.
80 -bnodelcsect undoes a poor choice of default relating to multiply-defined
81 csects. See AIX documentation for more information about this.
83 -bM:SRE tells the linker that the output file is Shared REusable. Note
84 that to actually build a shared library you will also need to specify an
85 export list with the -Wl,-bE option. */
87 #define LINK_SPEC "-T512 -H512 %{!r:-btextro} -bhalt:4 -bnodelcsect\
88 %{static:-bnso -bI:/lib/syscalls.exp} %{g*:-bexport:/usr/lib/libg.exp}\
91 /* Profiled library versions are used by linking with special directories. */
92 #define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\
93 %{p:-L/lib/profiled -L/usr/lib/profiled} %{g*:-lg} -lc"
95 /* gcc must do the search itself to find libgcc.a, not use -l. */
96 #define LIBGCC_SPEC "%{!shared:libgcc.a%s}"
98 /* Don't turn -B into -L if the argument specifies a relative file name. */
99 #define RELATIVE_PREFIX_NOT_LINKDIR
101 /* The AIX linker will discard static constructors in object files before
102 collect has a chance to see them, so scan the object files directly. */
103 #define COLLECT_SCAN_OBJECTS
105 /* Architecture type. */
107 extern int target_flags
;
109 /* Use POWER architecture instructions and MQ register. */
110 #define MASK_POWER 0x01
112 /* Use POWER2 extensions to POWER architecture. */
113 #define MASK_POWER2 0x02
115 /* Use PowerPC architecture instructions. */
116 #define MASK_POWERPC 0x04
118 /* Use PowerPC General Purpose group optional instructions, e.g. fsqrt. */
119 #define MASK_PPC_GPOPT 0x08
121 /* Use PowerPC Graphics group optional instructions, e.g. fsel. */
122 #define MASK_PPC_GFXOPT 0x10
124 /* Use PowerPC-64 architecture instructions. */
125 #define MASK_POWERPC64 0x20
127 /* Use revised mnemonic names defined for PowerPC architecture. */
128 #define MASK_NEW_MNEMONICS 0x40
130 /* Disable placing fp constants in the TOC; can be turned on when the
132 #define MASK_NO_FP_IN_TOC 0x80
134 /* Disable placing symbol+offset constants in the TOC; can be turned on when
135 the TOC overflows. */
136 #define MASK_NO_SUM_IN_TOC 0x100
138 /* Output only one TOC entry per module. Normally linking fails if
139 there are more than 16K unique variables/constants in an executable. With
140 this option, linking fails only if there are more than 16K modules, or
141 if there are more than 16K unique variables/constant in a single module.
143 This is at the cost of having 2 extra loads and one extra store per
144 function, and one less allocatable register. */
145 #define MASK_MINIMAL_TOC 0x200
147 /* Nonzero for the 64bit model: ints, longs, and pointers are 64 bits. */
148 #define MASK_64BIT 0x400
150 /* Disable use of FPRs. */
151 #define MASK_NO_FPR 0x800
153 /* Enable load/store multiple, even on powerpc */
154 #define MASK_MULTIPLE 0x1000
156 #define TARGET_POWER (target_flags & MASK_POWER)
157 #define TARGET_POWER2 (target_flags & MASK_POWER2)
158 #define TARGET_POWERPC (target_flags & MASK_POWERPC)
159 #define TARGET_PPC_GPOPT (target_flags & MASK_PPC_GPOPT)
160 #define TARGET_PPC_GFXOPT (target_flags & MASK_PPC_GFXOPT)
161 #define TARGET_POWERPC64 (target_flags & MASK_POWERPC64)
162 #define TARGET_NEW_MNEMONICS (target_flags & MASK_NEW_MNEMONICS)
163 #define TARGET_NO_FP_IN_TOC (target_flags & MASK_NO_FP_IN_TOC)
164 #define TARGET_NO_SUM_IN_TOC (target_flags & MASK_NO_SUM_IN_TOC)
165 #define TARGET_MINIMAL_TOC (target_flags & MASK_MINIMAL_TOC)
166 #define TARGET_64BIT (target_flags & MASK_64BIT)
167 #define TARGET_NO_FPR (target_flags & MASK_NO_FPR)
168 #define TARGET_MULTIPLE (target_flags & MASK_MULTIPLE)
170 /* Run-time compilation parameters selecting different hardware subsets.
172 Macro to define tables used to set the flags.
173 This is a list in braces of pairs in braces,
174 each pair being { "NAME", VALUE }
175 where VALUE is the bits to set or minus the bits to clear.
176 An empty string NAME is used to identify the default VALUE. */
178 /* This is meant to be redefined in the host dependent files */
179 #ifndef SUBTARGET_SWITCHES
180 #define SUBTARGET_SWITCHES
183 #define TARGET_SWITCHES \
184 {{"power", MASK_POWER}, \
185 {"power2", MASK_POWER | MASK_POWER2}, \
186 {"no-power2", - MASK_POWER2}, \
187 {"no-power", - (MASK_POWER | MASK_POWER2)}, \
188 {"powerpc", MASK_POWERPC}, \
189 {"no-powerpc", - (MASK_POWERPC | MASK_PPC_GPOPT \
190 | MASK_PPC_GFXOPT | MASK_POWERPC64)}, \
191 {"powerpc-gpopt", MASK_POWERPC | MASK_PPC_GPOPT}, \
192 {"no-powerpc-gpopt", - MASK_PPC_GPOPT}, \
193 {"powerpc-gfxopt", MASK_POWERPC | MASK_PPC_GFXOPT}, \
194 {"no-powerpc-gfxopt", - MASK_PPC_GFXOPT}, \
195 {"new-mnemonics", MASK_NEW_MNEMONICS}, \
196 {"old-mnemonics", -MASK_NEW_MNEMONICS}, \
197 {"full-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC \
198 | MASK_MINIMAL_TOC)}, \
199 {"fp-in-toc", - MASK_NO_FP_IN_TOC}, \
200 {"no-fp-in-toc", MASK_NO_FP_IN_TOC}, \
201 {"sum-in-toc", - MASK_NO_SUM_IN_TOC}, \
202 {"no-sum-in-toc", MASK_NO_SUM_IN_TOC}, \
203 {"minimal-toc", MASK_MINIMAL_TOC}, \
204 {"minimal-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC)}, \
205 {"no-minimal-toc", - MASK_MINIMAL_TOC}, \
206 {"fp-regs", - MASK_NO_FPR}, \
207 {"no-fp-regs", MASK_NO_FPR}, \
208 {"multiple", MASK_MULTIPLE}, \
209 {"no-multiple", - MASK_MULTIPLE}, \
211 {"", TARGET_DEFAULT}}
213 #define TARGET_DEFAULT (MASK_POWER | MASK_MULTIPLE)
215 /* Processor type. */
224 extern enum processor_type rs6000_cpu
;
226 /* Recast the processor type to the cpu attribute. */
227 #define rs6000_cpu_attr ((enum attr_cpu)rs6000_cpu)
229 /* Define generic processor types based upon current deployment. */
230 #define PROCESSOR_COMMON PROCESSOR_PPC601
231 #define PROCESSOR_POWER PROCESSOR_RIOS1
232 #define PROCESSOR_POWERPC PROCESSOR_PPC601
234 /* Define the default processor. This is overridden by other tm.h files. */
235 #define PROCESSOR_DEFAULT PROCESSOR_RIOS1
237 /* Specify the dialect of assembler to use. New mnemonics is dialect one
238 and the old mnemonics are dialect zero. */
239 #define ASSEMBLER_DIALECT TARGET_NEW_MNEMONICS ? 1 : 0
241 /* This macro is similar to `TARGET_SWITCHES' but defines names of
242 command options that have values. Its definition is an
243 initializer with a subgrouping for each command option.
245 Each subgrouping contains a string constant, that defines the
246 fixed part of the option name, and the address of a variable.
247 The variable, type `char *', is set to the variable part of the
248 given option if the fixed part matches. The actual option name
249 is made by appending `-m' to the specified name.
251 Here is an example which defines `-mshort-data-NUMBER'. If the
252 given option is `-mshort-data-512', the variable `m88k_short_data'
253 will be set to the string `"512"'.
255 extern char *m88k_short_data;
256 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
258 #define TARGET_OPTIONS \
259 { {"cpu=", &rs6000_cpu_string}}
261 extern char *rs6000_cpu_string
;
263 /* Sometimes certain combinations of command options do not make sense
264 on a particular target machine. You can define a macro
265 `OVERRIDE_OPTIONS' to take account of this. This macro, if
266 defined, is executed once just after all the command options have
269 On the RS/6000 this is used to define the target cpu type. */
271 #define OVERRIDE_OPTIONS \
273 rs6000_override_options (); \
274 SUBTARGET_OVERRIDE_OPTIONS; \
277 /* For OS-dependent options */
278 #ifndef SUBTARGET_OVERRIDE_OPTIONS
279 #define SUBTARGET_OVERRIDE_OPTIONS
282 /* Show we can debug even without a frame pointer. */
283 #define CAN_DEBUG_WITHOUT_FP
285 /* target machine storage layout */
287 /* Define to support cross compilation to an RS6000 target. */
288 #define REAL_ARITHMETIC
290 /* Define this macro if it is advisable to hold scalars in registers
291 in a wider mode than that declared by the program. In such cases,
292 the value is constrained to be within the bounds of the declared
293 type, but kept valid in the wider mode. The signedness of the
294 extension may differ from that of the type. */
296 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
297 if (GET_MODE_CLASS (MODE) == MODE_INT \
298 && GET_MODE_SIZE (MODE) < 4) \
301 /* Define this if most significant bit is lowest numbered
302 in instructions that operate on numbered bit-fields. */
303 /* That is true on RS/6000. */
304 #define BITS_BIG_ENDIAN 1
306 /* Define this if most significant byte of a word is the lowest numbered. */
307 /* That is true on RS/6000. */
308 #define BYTES_BIG_ENDIAN 1
310 /* Define this if most significant word of a multiword number is lowest
313 For RS/6000 we can decide arbitrarily since there are no machine
314 instructions for them. Might as well be consistent with bits and bytes. */
315 #define WORDS_BIG_ENDIAN 1
317 /* number of bits in an addressable storage unit */
318 #define BITS_PER_UNIT 8
320 /* Width in bits of a "word", which is the contents of a machine register.
321 Note that this is not necessarily the width of data type `int';
322 if using 16-bit ints on a 68000, this would still be 32.
323 But on a machine with 16-bit registers, this would be 16. */
324 #define BITS_PER_WORD (TARGET_POWERPC64 ? 64 : 32)
325 #define MAX_BITS_PER_WORD 64
327 /* Width of a word, in units (bytes). */
328 #define UNITS_PER_WORD (TARGET_POWERPC64 ? 8 : 4)
329 #define MIN_UNITS_PER_WORD 4
330 #define UNITS_PER_FP_WORD 8
332 /* Type used for ptrdiff_t, as a string used in a declaration. */
333 #define PTRDIFF_TYPE "int"
335 /* Type used for wchar_t, as a string used in a declaration. */
336 #define WCHAR_TYPE "short unsigned int"
338 /* Width of wchar_t in bits. */
339 #define WCHAR_TYPE_SIZE 16
341 /* A C expression for the size in bits of the type `short' on the
342 target machine. If you don't define this, the default is half a
343 word. (If this would be less than one storage unit, it is
344 rounded up to one unit.) */
345 #define SHORT_TYPE_SIZE 16
347 /* A C expression for the size in bits of the type `int' on the
348 target machine. If you don't define this, the default is one
350 #define INT_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
351 #define MAX_INT_TYPE_SIZE 64
353 /* A C expression for the size in bits of the type `long' on the
354 target machine. If you don't define this, the default is one
356 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
357 #define MAX_LONG_TYPE_SIZE 64
359 /* A C expression for the size in bits of the type `long long' on the
360 target machine. If you don't define this, the default is two
362 #define LONG_LONG_TYPE_SIZE 64
364 /* A C expression for the size in bits of the type `char' on the
365 target machine. If you don't define this, the default is one
366 quarter of a word. (If this would be less than one storage unit,
367 it is rounded up to one unit.) */
368 #define CHAR_TYPE_SIZE BITS_PER_UNIT
370 /* A C expression for the size in bits of the type `float' on the
371 target machine. If you don't define this, the default is one
373 #define FLOAT_TYPE_SIZE 32
375 /* A C expression for the size in bits of the type `double' on the
376 target machine. If you don't define this, the default is two
378 #define DOUBLE_TYPE_SIZE 64
380 /* A C expression for the size in bits of the type `long double' on
381 the target machine. If you don't define this, the default is two
383 #define LONG_DOUBLE_TYPE_SIZE 64
385 /* Width in bits of a pointer.
386 See also the macro `Pmode' defined below. */
387 #define POINTER_SIZE (TARGET_64BIT ? 64 : 32)
389 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
390 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
392 /* Boundary (in *bits*) on which stack pointer should be aligned. */
393 #define STACK_BOUNDARY 64
395 /* Allocation boundary (in *bits*) for the code of a function. */
396 #define FUNCTION_BOUNDARY 32
398 /* No data type wants to be aligned rounder than this. */
399 #define BIGGEST_ALIGNMENT (TARGET_64BIT ? 64 : 32)
401 /* Alignment of field after `int : 0' in a structure. */
402 #define EMPTY_FIELD_BOUNDARY 32
404 /* Every structure's size must be a multiple of this. */
405 #define STRUCTURE_SIZE_BOUNDARY 8
407 /* A bitfield declared as `int' forces `int' alignment for the struct. */
408 #define PCC_BITFIELD_TYPE_MATTERS 1
410 /* Make strings word-aligned so strcpy from constants will be faster. */
411 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
412 (TREE_CODE (EXP) == STRING_CST \
413 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
415 /* Make arrays of chars word-aligned for the same reasons. */
416 #define DATA_ALIGNMENT(TYPE, ALIGN) \
417 (TREE_CODE (TYPE) == ARRAY_TYPE \
418 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
419 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
421 /* Non-zero if move instructions will actually fail to work
422 when given unaligned data. */
423 #define STRICT_ALIGNMENT 0
425 /* Standard register usage. */
427 /* Number of actual hardware registers.
428 The hardware registers are assigned numbers for the compiler
429 from 0 to just below FIRST_PSEUDO_REGISTER.
430 All registers that the compiler knows about must be given numbers,
431 even those that are not normally considered general registers.
433 RS/6000 has 32 fixed-point registers, 32 floating-point registers,
434 an MQ register, a count register, a link register, and 8 condition
435 register fields, which we view here as separate registers.
437 In addition, the difference between the frame and argument pointers is
438 a function of the number of registers saved, so we need to have a
439 register for AP that will later be eliminated in favor of SP or FP.
440 This is a normal register, but it is fixed. */
442 #define FIRST_PSEUDO_REGISTER 76
444 /* 1 for registers that have pervasive standard uses
445 and are not available for the register allocator.
447 On RS/6000, r1 is used for the stack and r2 is used as the TOC pointer.
449 cr5 is not supposed to be used. */
451 #define FIXED_REGISTERS \
452 {0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
453 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
454 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
455 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
456 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0}
458 /* 1 for registers not available across function calls.
459 These must include the FIXED_REGISTERS and also any
460 registers that can be used without being saved.
461 The latter must include the registers where values are returned
462 and the register where structure-value addresses are passed.
463 Aside from that, you can include as many other registers as you like. */
465 #define CALL_USED_REGISTERS \
466 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, \
467 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
468 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
469 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
470 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1}
472 /* List the order in which to allocate registers. Each register must be
473 listed once, even those in FIXED_REGISTERS.
475 We allocate in the following order:
476 fp0 (not saved or used for anything)
477 fp13 - fp2 (not saved; incoming fp arg registers)
478 fp1 (not saved; return value)
479 fp31 - fp14 (saved; order given to save least number)
480 cr1, cr6, cr7 (not saved or special)
481 cr0 (not saved, but used for arithmetic operations)
482 cr2, cr3, cr4 (saved)
483 r0 (not saved; cannot be base reg)
484 r9 (not saved; best for TImode)
485 r11, r10, r8-r4 (not saved; highest used first to make less conflict)
486 r3 (not saved; return value register)
487 r31 - r13 (saved; order given to save least number)
488 r12 (not saved; if used for DImode or DFmode would use r13)
489 mq (not saved; best to use it if we can)
490 ctr (not saved; when we have the choice ctr is better)
492 cr5, r1, r2, ap (fixed) */
494 #define REG_ALLOC_ORDER \
496 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, \
498 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \
499 50, 49, 48, 47, 46, \
500 69, 74, 75, 68, 70, 71, 72, \
502 9, 11, 10, 8, 7, 6, 5, 4, \
504 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, \
505 18, 17, 16, 15, 14, 13, 12, \
509 /* True if register is floating-point. */
510 #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 63)
512 /* True if register is a condition register. */
513 #define CR_REGNO_P(N) ((N) >= 68 && (N) <= 75)
515 /* True if register is an integer register. */
516 #define INT_REGNO_P(N) ((N) <= 31 || (N) == 67)
518 /* Return number of consecutive hard regs needed starting at reg REGNO
519 to hold something of mode MODE.
520 This is ordinarily the length in words of a value of mode MODE
521 but can be less for certain modes in special long registers.
523 On RS/6000, ordinary registers hold 32 bits worth;
524 a single floating point register holds 64 bits worth. */
526 #define HARD_REGNO_NREGS(REGNO, MODE) \
527 (FP_REGNO_P (REGNO) \
528 ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \
529 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
531 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
532 For POWER and PowerPC, the GPRs can hold any mode, but the float
533 registers only can hold floating modes and DImode, and CR register only
534 can hold CC modes. We cannot put TImode anywhere except general
535 register and it must be able to fit within the register set. */
537 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
538 (FP_REGNO_P (REGNO) ? \
539 (GET_MODE_CLASS (MODE) == MODE_FLOAT \
540 || (GET_MODE_CLASS (MODE) == MODE_INT \
541 && GET_MODE_SIZE (MODE) == UNITS_PER_FP_WORD)) \
542 : CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \
543 : ! INT_REGNO_P (REGNO) ? (GET_MODE_CLASS (MODE) == MODE_INT \
544 && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \
547 /* Value is 1 if it is a good idea to tie two pseudo registers
548 when one has mode MODE1 and one has mode MODE2.
549 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
550 for any hard reg, then this must be 0 for correct output. */
551 #define MODES_TIEABLE_P(MODE1, MODE2) \
552 (GET_MODE_CLASS (MODE1) == MODE_FLOAT \
553 ? GET_MODE_CLASS (MODE2) == MODE_FLOAT \
554 : GET_MODE_CLASS (MODE2) == MODE_FLOAT \
555 ? GET_MODE_CLASS (MODE1) == MODE_FLOAT \
556 : GET_MODE_CLASS (MODE1) == MODE_CC \
557 ? GET_MODE_CLASS (MODE2) == MODE_CC \
558 : GET_MODE_CLASS (MODE2) == MODE_CC \
559 ? GET_MODE_CLASS (MODE1) == MODE_CC \
562 /* A C expression returning the cost of moving data from a register of class
563 CLASS1 to one of CLASS2.
565 On the RS/6000, copying between floating-point and fixed-point
566 registers is expensive. */
568 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
569 ((CLASS1) == FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 2 \
570 : (CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS ? 10 \
571 : (CLASS1) != FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 10 \
572 : (((CLASS1) == SPECIAL_REGS || (CLASS1) == MQ_REGS \
573 || (CLASS1) == LINK_REGS || (CLASS1) == CTR_REGS \
574 || (CLASS1) == LINK_OR_CTR_REGS) \
575 && ((CLASS2) == SPECIAL_REGS || (CLASS2) == MQ_REGS \
576 || (CLASS2) == LINK_REGS || (CLASS2) == CTR_REGS \
577 || (CLASS2) == LINK_OR_CTR_REGS)) ? 10 \
580 /* A C expressions returning the cost of moving data of MODE from a register to
583 On the RS/6000, bump this up a bit. */
585 #define MEMORY_MOVE_COST(MODE) \
586 ((GET_MODE_CLASS (MODE) == MODE_FLOAT \
587 && (rs6000_cpu == PROCESSOR_RIOS1 || rs6000_cpu == PROCESSOR_PPC601) \
591 /* Specify the cost of a branch insn; roughly the number of extra insns that
592 should be added to avoid a branch.
594 Set this to 3 on the RS/6000 since that is roughly the average cost of an
595 unscheduled conditional branch. */
597 #define BRANCH_COST 3
599 /* A C statement (sans semicolon) to update the integer variable COST
600 based on the relationship between INSN that is dependent on
601 DEP_INSN through the dependence LINK. The default is to make no
602 adjustment to COST. On the RS/6000, ignore the cost of anti- and
603 output-dependencies. In fact, output dependencies on the CR do have
604 a cost, but it is probably not worthwhile to track it. */
606 #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
607 (COST) = rs6000_adjust_cost (INSN,LINK,DEP_INSN,COST)
609 /* Define this macro to change register usage conditional on target flags.
610 Set MQ register fixed (already call_used) if not POWER architecture
611 (RIOS1, RIOS2, RSC, and PPC601) so that it will not be allocated.
612 Conditionally disable FPRs. */
614 #define CONDITIONAL_REGISTER_USAGE \
616 if (! TARGET_POWER) \
617 fixed_regs[64] = 1; \
619 for (i = 32; i < 64; i++) \
620 fixed_regs[i] = call_used_regs[i] = 1; \
623 /* Specify the registers used for certain standard purposes.
624 The values of these macros are register numbers. */
626 /* RS/6000 pc isn't overloaded on a register that the compiler knows about. */
627 /* #define PC_REGNUM */
629 /* Register to use for pushing function arguments. */
630 #define STACK_POINTER_REGNUM 1
632 /* Base register for access to local variables of the function. */
633 #define FRAME_POINTER_REGNUM 31
635 /* Value should be nonzero if functions must have frame pointers.
636 Zero means the frame pointer need not be set up (and parms
637 may be accessed via the stack pointer) in functions that seem suitable.
638 This is computed in `reload', in reload1.c. */
639 #define FRAME_POINTER_REQUIRED 0
641 /* Base register for access to arguments of the function. */
642 #define ARG_POINTER_REGNUM 67
644 /* Place to put static chain when calling a function that requires it. */
645 #define STATIC_CHAIN_REGNUM 11
647 /* Place that structure value return address is placed.
649 On the RS/6000, it is passed as an extra parameter. */
650 #define STRUCT_VALUE 0
652 /* Define the classes of registers for register constraints in the
653 machine description. Also define ranges of constants.
655 One of the classes must always be named ALL_REGS and include all hard regs.
656 If there is more than one class, another class must be named NO_REGS
657 and contain no registers.
659 The name GENERAL_REGS must be the name of a class (or an alias for
660 another name such as ALL_REGS). This is the class of registers
661 that is allowed by "g" or "r" in a register constraint.
662 Also, registers outside this class are allocated only when
663 instructions express preferences for them.
665 The classes must be numbered in nondecreasing order; that is,
666 a larger-numbered class must never be contained completely
667 in a smaller-numbered class.
669 For any two classes, it is very desirable that there be another
670 class that represents their union. */
672 /* The RS/6000 has three types of registers, fixed-point, floating-point,
673 and condition registers, plus three special registers, MQ, CTR, and the
676 However, r0 is special in that it cannot be used as a base register.
677 So make a class for registers valid as base registers.
679 Also, cr0 is the only condition code register that can be used in
680 arithmetic insns, so make a separate class for it. */
682 enum reg_class
{ NO_REGS
, BASE_REGS
, GENERAL_REGS
, FLOAT_REGS
,
683 NON_SPECIAL_REGS
, MQ_REGS
, LINK_REGS
, CTR_REGS
, LINK_OR_CTR_REGS
,
684 SPECIAL_REGS
, SPEC_OR_GEN_REGS
, CR0_REGS
, CR_REGS
, NON_FLOAT_REGS
,
685 ALL_REGS
, LIM_REG_CLASSES
};
687 #define N_REG_CLASSES (int) LIM_REG_CLASSES
689 /* Give names of register classes as strings for dump file. */
691 #define REG_CLASS_NAMES \
692 { "NO_REGS", "BASE_REGS", "GENERAL_REGS", "FLOAT_REGS", \
693 "NON_SPECIAL_REGS", "MQ_REGS", "LINK_REGS", "CTR_REGS", \
694 "LINK_OR_CTR_REGS", "SPECIAL_REGS", "SPEC_OR_GEN_REGS", \
695 "CR0_REGS", "CR_REGS", "NON_FLOAT_REGS", "ALL_REGS" }
697 /* Define which registers fit in which classes.
698 This is an initializer for a vector of HARD_REG_SET
699 of length N_REG_CLASSES. */
701 #define REG_CLASS_CONTENTS \
702 { {0, 0, 0}, {0xfffffffe, 0, 8}, {~0, 0, 8}, \
703 {0, ~0, 0}, {~0, ~0, 8}, {0, 0, 1}, {0, 0, 2}, \
704 {0, 0, 4}, {0, 0, 6}, {0, 0, 7}, {~0, 0, 15}, \
705 {0, 0, 16}, {0, 0, 0xff0}, {~0, 0, 0xffff}, \
708 /* The same information, inverted:
709 Return the class number of the smallest class containing
710 reg number REGNO. This could be a conditional expression
711 or could index an array. */
713 #define REGNO_REG_CLASS(REGNO) \
714 ((REGNO) == 0 ? GENERAL_REGS \
715 : (REGNO) < 32 ? BASE_REGS \
716 : FP_REGNO_P (REGNO) ? FLOAT_REGS \
717 : (REGNO) == 68 ? CR0_REGS \
718 : CR_REGNO_P (REGNO) ? CR_REGS \
719 : (REGNO) == 64 ? MQ_REGS \
720 : (REGNO) == 65 ? LINK_REGS \
721 : (REGNO) == 66 ? CTR_REGS \
722 : (REGNO) == 67 ? BASE_REGS \
725 /* The class value for index registers, and the one for base regs. */
726 #define INDEX_REG_CLASS GENERAL_REGS
727 #define BASE_REG_CLASS BASE_REGS
729 /* Get reg_class from a letter such as appears in the machine description. */
731 #define REG_CLASS_FROM_LETTER(C) \
732 ((C) == 'f' ? FLOAT_REGS \
733 : (C) == 'b' ? BASE_REGS \
734 : (C) == 'h' ? SPECIAL_REGS \
735 : (C) == 'q' ? MQ_REGS \
736 : (C) == 'c' ? CTR_REGS \
737 : (C) == 'l' ? LINK_REGS \
738 : (C) == 'x' ? CR0_REGS \
739 : (C) == 'y' ? CR_REGS \
742 /* The letters I, J, K, L, M, N, and P in a register constraint string
743 can be used to stand for particular ranges of immediate operands.
744 This macro defines what the ranges are.
745 C is the letter, and VALUE is a constant value.
746 Return 1 if VALUE is in the range specified by C.
748 `I' is signed 16-bit constants
749 `J' is a constant with only the high-order 16 bits non-zero
750 `K' is a constant with only the low-order 16 bits non-zero
751 `L' is a constant that can be placed into a mask operand
752 `M' is a constant that is greater than 31
753 `N' is a constant that is an exact power of two
754 `O' is the constant zero
755 `P' is a constant whose negation is a signed 16-bit constant */
757 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
758 ( (C) == 'I' ? (unsigned) ((VALUE) + 0x8000) < 0x10000 \
759 : (C) == 'J' ? ((VALUE) & 0xffff) == 0 \
760 : (C) == 'K' ? ((VALUE) & 0xffff0000) == 0 \
761 : (C) == 'L' ? mask_constant (VALUE) \
762 : (C) == 'M' ? (VALUE) > 31 \
763 : (C) == 'N' ? exact_log2 (VALUE) >= 0 \
764 : (C) == 'O' ? (VALUE) == 0 \
765 : (C) == 'P' ? (unsigned) ((- (VALUE)) + 0x8000) < 0x1000 \
768 /* Similar, but for floating constants, and defining letters G and H.
769 Here VALUE is the CONST_DOUBLE rtx itself.
771 We flag for special constants when we can copy the constant into
772 a general register in two insns for DF and one insn for SF. */
774 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
775 ((C) == 'G' ? easy_fp_constant (VALUE, GET_MODE (VALUE)) : 0)
777 /* Optional extra constraints for this machine.
779 For the RS/6000, `Q' means that this is a memory operand that is just
780 an offset from a register. */
782 #define EXTRA_CONSTRAINT(OP, C) \
783 ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \
784 : (C) == 'R' ? LEGITIMATE_CONSTANT_POOL_ADDRESS_P (OP) \
787 /* Given an rtx X being reloaded into a reg required to be
788 in class CLASS, return the class of reg to actually use.
789 In general this is just CLASS; but on some machines
790 in some cases it is preferable to use a more restrictive class.
792 On the RS/6000, we have to return NO_REGS when we want to reload a
793 floating-point CONST_DOUBLE to force it to be copied to memory. */
795 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
796 ((GET_CODE (X) == CONST_DOUBLE \
797 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
800 /* Return the register class of a scratch register needed to copy IN into
801 or out of a register in CLASS in MODE. If it can be done directly,
802 NO_REGS is returned. */
804 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
805 secondary_reload_class (CLASS, MODE, IN)
807 /* If we are copying between FP registers and anything else, we need a memory
810 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
811 ((CLASS1) != (CLASS2) && ((CLASS1) == FLOAT_REGS || (CLASS2) == FLOAT_REGS))
813 /* Return the maximum number of consecutive registers
814 needed to represent mode MODE in a register of class CLASS.
816 On RS/6000, this is the size of MODE in words,
817 except in the FP regs, where a single reg is enough for two words. */
818 #define CLASS_MAX_NREGS(CLASS, MODE) \
819 ((CLASS) == FLOAT_REGS \
820 ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \
821 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
823 /* If defined, gives a class of registers that cannot be used as the
824 operand of a SUBREG that changes the size of the object. */
826 #define CLASS_CANNOT_CHANGE_SIZE FLOAT_REGS
828 /* Stack layout; function entry, exit and calling. */
830 /* Define this if pushing a word on the stack
831 makes the stack pointer a smaller address. */
832 #define STACK_GROWS_DOWNWARD
834 /* Define this if the nominal address of the stack frame
835 is at the high-address end of the local variables;
836 that is, each additional local variable allocated
837 goes at a more negative offset in the frame.
839 On the RS/6000, we grow upwards, from the area after the outgoing
841 /* #define FRAME_GROWS_DOWNWARD */
843 /* Offset within stack frame to start allocating local variables at.
844 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
845 first local allocated. Otherwise, it is the offset to the BEGINNING
846 of the first local allocated.
848 On the RS/6000, the frame pointer is the same as the stack pointer,
849 except for dynamic allocations. So we start after the fixed area and
850 outgoing parameter area. */
852 #define STARTING_FRAME_OFFSET (current_function_outgoing_args_size \
853 + (TARGET_64BIT ? 48 : 24))
855 /* If we generate an insn to push BYTES bytes,
856 this says how many the stack pointer really advances by.
857 On RS/6000, don't define this because there are no push insns. */
858 /* #define PUSH_ROUNDING(BYTES) */
860 /* Offset of first parameter from the argument pointer register value.
861 On the RS/6000, we define the argument pointer to the start of the fixed
863 #define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? 48 : 24)
865 /* Define this if stack space is still allocated for a parameter passed
866 in a register. The value is the number of bytes allocated to this
868 #define REG_PARM_STACK_SPACE(FNDECL) (TARGET_64BIT ? 64 : 32)
870 /* Define this if the above stack space is to be considered part of the
871 space allocated by the caller. */
872 #define OUTGOING_REG_PARM_STACK_SPACE
874 /* This is the difference between the logical top of stack and the actual sp.
876 For the RS/6000, sp points past the fixed area. */
877 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 48 : 24)
879 /* Define this if the maximum size of all the outgoing args is to be
880 accumulated and pushed during the prologue. The amount can be
881 found in the variable current_function_outgoing_args_size. */
882 #define ACCUMULATE_OUTGOING_ARGS
884 /* Value is the number of bytes of arguments automatically
885 popped when returning from a subroutine call.
886 FUNTYPE is the data type of the function (as a tree),
887 or for a library call it is an identifier node for the subroutine name.
888 SIZE is the number of bytes of arguments passed on the stack. */
890 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
892 /* Define how to find the value returned by a function.
893 VALTYPE is the data type of the value (as a tree).
894 If the precise function being called is known, FUNC is its FUNCTION_DECL;
895 otherwise, FUNC is 0.
897 On RS/6000 an integer value is in r3 and a floating-point value is in
900 #define FUNCTION_VALUE(VALTYPE, FUNC) \
901 gen_rtx (REG, TYPE_MODE (VALTYPE), \
902 TREE_CODE (VALTYPE) == REAL_TYPE ? 33 : 3)
904 /* Define how to find the value returned by a library function
905 assuming the value has mode MODE. */
907 #define LIBCALL_VALUE(MODE) \
908 gen_rtx (REG, MODE, GET_MODE_CLASS (MODE) == MODE_FLOAT ? 33 : 3)
910 /* The definition of this macro implies that there are cases where
911 a scalar value cannot be returned in registers.
913 For the RS/6000, any structure or union type is returned in memory. */
915 #define RETURN_IN_MEMORY(TYPE) \
916 (TYPE_MODE (TYPE) == BLKmode)
918 /* 1 if N is a possible register number for a function value
919 as seen by the caller.
921 On RS/6000, this is r3 and fp1. */
923 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 3 || ((N) == 33))
925 /* 1 if N is a possible register number for function argument passing.
926 On RS/6000, these are r3-r10 and fp1-fp13. */
928 #define FUNCTION_ARG_REGNO_P(N) \
929 (((N) <= 10 && (N) >= 3) || ((N) >= 33 && (N) <= 45))
931 /* Define a data type for recording info about an argument list
932 during the scan of that argument list. This data type should
933 hold all necessary information about the function itself
934 and about the args processed so far, enough to enable macros
935 such as FUNCTION_ARG to determine where the next arg should go.
937 On the RS/6000, this is a structure. The first element is the number of
938 total argument words, the second is used to store the next
939 floating-point register number, and the third says how many more args we
940 have prototype types for. */
942 struct rs6000_args
{int words
, fregno
, nargs_prototype
; };
943 #define CUMULATIVE_ARGS struct rs6000_args
945 /* Define intermediate macro to compute the size (in registers) of an argument
948 #define RS6000_ARG_SIZE(MODE, TYPE, NAMED) \
950 : (MODE) != BLKmode \
951 ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
952 : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
954 /* Initialize a variable CUM of type CUMULATIVE_ARGS
955 for a call to a function whose data type is FNTYPE.
956 For a library call, FNTYPE is 0. */
958 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
961 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
962 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
963 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
964 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
967 /* Similar, but when scanning the definition of a procedure. We always
968 set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */
970 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
973 (CUM).nargs_prototype = 1000
975 /* Update the data in CUM to advance over an argument
976 of mode MODE and data type TYPE.
977 (TYPE is null for libcalls where that information may not be available.) */
979 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
980 { (CUM).nargs_prototype--; \
983 (CUM).words += RS6000_ARG_SIZE (MODE, TYPE, NAMED); \
984 if (GET_MODE_CLASS (MODE) == MODE_FLOAT) \
989 /* Non-zero if we can use a floating-point register to pass this arg. */
990 #define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \
991 (GET_MODE_CLASS (MODE) == MODE_FLOAT && (CUM).fregno < 46)
993 /* Determine where to put an argument to a function.
994 Value is zero to push the argument on the stack,
995 or a hard register in which to store the argument.
997 MODE is the argument's machine mode.
998 TYPE is the data type of the argument (as a tree).
999 This is null for libcalls where that information may
1001 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1002 the preceding args and about the function being called.
1003 NAMED is nonzero if this argument is a named parameter
1004 (otherwise it is an extra parameter matching an ellipsis).
1006 On RS/6000 the first eight words of non-FP are normally in registers
1007 and the rest are pushed. The first 13 FP args are in registers.
1009 If this is floating-point and no prototype is specified, we use
1010 both an FP and integer register (or possibly FP reg and stack). Library
1011 functions (when TYPE is zero) always have the proper types for args,
1012 so we can pass the FP value just in one register. emit_library_function
1013 doesn't support EXPR_LIST anyway. */
1015 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1017 : ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST) ? 0 \
1018 : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) \
1019 ? ((CUM).nargs_prototype > 0 || (TYPE) == 0 \
1020 ? gen_rtx (REG, MODE, (CUM).fregno) \
1021 : ((CUM).words < 8 \
1022 ? gen_rtx (EXPR_LIST, VOIDmode, \
1023 gen_rtx (REG, (MODE), 3 + (CUM).words), \
1024 gen_rtx (REG, (MODE), (CUM).fregno)) \
1025 : gen_rtx (EXPR_LIST, VOIDmode, 0, \
1026 gen_rtx (REG, (MODE), (CUM).fregno)))) \
1027 : (CUM).words < 8 ? gen_rtx(REG, (MODE), 3 + (CUM).words) : 0)
1029 /* For an arg passed partly in registers and partly in memory,
1030 this is the number of registers used.
1031 For args passed entirely in registers or entirely in memory, zero. */
1033 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1035 : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) && (CUM).nargs_prototype >= 0 ? 0 \
1036 : (((CUM).words < 8 \
1037 && 8 < ((CUM).words + RS6000_ARG_SIZE (MODE, TYPE, NAMED))) \
1038 ? 8 - (CUM).words : 0))
1040 /* Perform any needed actions needed for a function that is receiving a
1041 variable number of arguments.
1045 MODE and TYPE are the mode and type of the current parameter.
1047 PRETEND_SIZE is a variable that should be set to the amount of stack
1048 that must be pushed by the prolog to pretend that our caller pushed
1051 Normally, this macro will push all remaining incoming registers on the
1052 stack and set PRETEND_SIZE to the length of the registers pushed. */
1054 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
1055 { if ((CUM).words < 8) \
1057 int first_reg_offset = (CUM).words; \
1059 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
1060 first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \
1062 if (first_reg_offset > 8) \
1063 first_reg_offset = 8; \
1065 if (! (NO_RTL) && first_reg_offset != 8) \
1066 move_block_from_reg \
1067 (3 + first_reg_offset, \
1068 gen_rtx (MEM, BLKmode, \
1069 plus_constant (virtual_incoming_args_rtx, \
1070 first_reg_offset * 4)), \
1071 8 - first_reg_offset, (8 - first_reg_offset) * UNITS_PER_WORD); \
1072 PRETEND_SIZE = (8 - first_reg_offset) * UNITS_PER_WORD; \
1076 /* This macro generates the assembly code for function entry.
1077 FILE is a stdio stream to output the code to.
1078 SIZE is an int: how many units of temporary storage to allocate.
1079 Refer to the array `regs_ever_live' to determine which registers
1080 to save; `regs_ever_live[I]' is nonzero if register number I
1081 is ever used in the function. This macro is responsible for
1082 knowing which registers should not be saved even if used. */
1084 #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
1086 /* Output assembler code to FILE to increment profiler label # LABELNO
1087 for profiling a function entry. */
1089 #define FUNCTION_PROFILER(FILE, LABELNO) \
1090 output_function_profiler ((FILE), (LABELNO));
1092 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1093 the stack pointer does not matter. No definition is equivalent to
1096 On the RS/6000, this is non-zero because we can restore the stack from
1097 its backpointer, which we maintain. */
1098 #define EXIT_IGNORE_STACK 1
1100 /* This macro generates the assembly code for function exit,
1101 on machines that need it. If FUNCTION_EPILOGUE is not defined
1102 then individual return instructions are generated for each
1103 return statement. Args are same as for FUNCTION_PROLOGUE.
1105 The function epilogue should not depend on the current stack pointer!
1106 It should use the frame pointer only. This is mandatory because
1107 of alloca; we also take advantage of it to omit stack adjustments
1108 before returning. */
1110 #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
1112 /* Output assembler code for a block containing the constant parts
1113 of a trampoline, leaving space for the variable parts.
1115 The trampoline should set the static chain pointer to value placed
1116 into the trampoline and should branch to the specified routine.
1118 On the RS/6000, this is not code at all, but merely a data area,
1119 since that is the way all functions are called. The first word is
1120 the address of the function, the second word is the TOC pointer (r2),
1121 and the third word is the static chain value. */
1123 #define TRAMPOLINE_TEMPLATE(FILE) { fprintf (FILE, "\t.long 0, 0, 0\n"); }
1125 /* Length in units of the trampoline for entering a nested function. */
1127 #define TRAMPOLINE_SIZE 12
1129 /* Emit RTL insns to initialize the variable parts of a trampoline.
1130 FNADDR is an RTX for the address of the function's pure code.
1131 CXT is an RTX for the static chain value for the function. */
1133 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
1135 emit_move_insn (gen_rtx (MEM, SImode, \
1136 memory_address (SImode, (ADDR))), \
1137 gen_rtx (MEM, SImode, \
1138 memory_address (SImode, (FNADDR)))); \
1139 emit_move_insn (gen_rtx (MEM, SImode, \
1140 memory_address (SImode, \
1141 plus_constant ((ADDR), 4))), \
1142 gen_rtx (MEM, SImode, \
1143 memory_address (SImode, \
1144 plus_constant ((FNADDR), 4)))); \
1145 emit_move_insn (gen_rtx (MEM, SImode, \
1146 memory_address (SImode, \
1147 plus_constant ((ADDR), 8))), \
1148 force_reg (SImode, (CXT))); \
1151 /* Definitions for register eliminations.
1153 We have two registers that can be eliminated on the RS/6000. First, the
1154 frame pointer register can often be eliminated in favor of the stack
1155 pointer register. Secondly, the argument pointer register can always be
1156 eliminated; it is replaced with either the stack or frame pointer.
1158 In addition, we use the elimination mechanism to see if r30 is needed
1159 Initially we assume that it isn't. If it is, we spill it. This is done
1160 by making it an eliminable register. We replace it with itself so that
1161 if it isn't needed, then existing uses won't be modified. */
1163 /* This is an array of structures. Each structure initializes one pair
1164 of eliminable registers. The "from" register number is given first,
1165 followed by "to". Eliminations of the same "from" register are listed
1166 in order of preference. */
1167 #define ELIMINABLE_REGS \
1168 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1169 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1170 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1173 /* Given FROM and TO register numbers, say whether this elimination is allowed.
1174 Frame pointer elimination is automatically handled.
1176 For the RS/6000, if frame pointer elimination is being done, we would like
1177 to convert ap into fp, not sp.
1179 We need r30 if -mmininal-toc was specified, and there are constant pool
1182 #define CAN_ELIMINATE(FROM, TO) \
1183 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1184 ? ! frame_pointer_needed \
1185 : (FROM) == 30 ? ! TARGET_MINIMAL_TOC || get_pool_size () == 0 \
1188 /* Define the offset between two registers, one to be eliminated, and the other
1189 its replacement, at the start of a routine. */
1190 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1192 int total_stack_size = (rs6000_sa_size () + get_frame_size () \
1193 + current_function_outgoing_args_size); \
1195 total_stack_size = (total_stack_size + 7) & ~7; \
1197 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1199 if (rs6000_pushes_stack ()) \
1202 (OFFSET) = - total_stack_size; \
1204 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1205 (OFFSET) = total_stack_size; \
1206 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1208 if (rs6000_pushes_stack ()) \
1209 (OFFSET) = total_stack_size; \
1213 else if ((FROM) == 30) \
1219 /* Addressing modes, and classification of registers for them. */
1221 /* #define HAVE_POST_INCREMENT */
1222 /* #define HAVE_POST_DECREMENT */
1224 #define HAVE_PRE_DECREMENT
1225 #define HAVE_PRE_INCREMENT
1227 /* Macros to check register numbers against specific register classes. */
1229 /* These assume that REGNO is a hard or pseudo reg number.
1230 They give nonzero only if REGNO is a hard reg of the suitable class
1231 or a pseudo reg currently allocated to a suitable hard reg.
1232 Since they use reg_renumber, they are safe only once reg_renumber
1233 has been allocated, which happens in local-alloc.c. */
1235 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1236 ((REGNO) < FIRST_PSEUDO_REGISTER \
1237 ? (REGNO) <= 31 || (REGNO) == 67 \
1238 : (reg_renumber[REGNO] >= 0 \
1239 && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67)))
1241 #define REGNO_OK_FOR_BASE_P(REGNO) \
1242 ((REGNO) < FIRST_PSEUDO_REGISTER \
1243 ? ((REGNO) > 0 && (REGNO) <= 31) || (REGNO) == 67 \
1244 : (reg_renumber[REGNO] > 0 \
1245 && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67)))
1247 /* Maximum number of registers that can appear in a valid memory address. */
1249 #define MAX_REGS_PER_ADDRESS 2
1251 /* Recognize any constant value that is a valid address. */
1253 #define CONSTANT_ADDRESS_P(X) \
1254 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1255 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1256 || GET_CODE (X) == HIGH)
1258 /* Nonzero if the constant value X is a legitimate general operand.
1259 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
1261 On the RS/6000, all integer constants are acceptable, most won't be valid
1262 for particular insns, though. Only easy FP constants are
1265 #define LEGITIMATE_CONSTANT_P(X) \
1266 (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \
1267 || easy_fp_constant (X, GET_MODE (X)))
1269 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1270 and check its validity for a certain class.
1271 We have two alternate definitions for each of them.
1272 The usual definition accepts all pseudo regs; the other rejects
1273 them unless they have been allocated suitable hard regs.
1274 The symbol REG_OK_STRICT causes the latter definition to be used.
1276 Most source files want to accept pseudo regs in the hope that
1277 they will get allocated to the class that the insn wants them to be in.
1278 Source files for reload pass need to be strict.
1279 After reload, it makes no difference, since pseudo regs have
1280 been eliminated by then. */
1282 #ifndef REG_OK_STRICT
1284 /* Nonzero if X is a hard reg that can be used as an index
1285 or if it is a pseudo reg. */
1286 #define REG_OK_FOR_INDEX_P(X) \
1287 (REGNO (X) <= 31 || REGNO (X) == 67 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1289 /* Nonzero if X is a hard reg that can be used as a base reg
1290 or if it is a pseudo reg. */
1291 #define REG_OK_FOR_BASE_P(X) \
1292 (REGNO (X) > 0 && REG_OK_FOR_INDEX_P (X))
1296 /* Nonzero if X is a hard reg that can be used as an index. */
1297 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1298 /* Nonzero if X is a hard reg that can be used as a base reg. */
1299 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1303 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1304 that is a valid memory address for an instruction.
1305 The MODE argument is the machine mode for the MEM expression
1306 that wants to use this address.
1308 On the RS/6000, there are four valid address: a SYMBOL_REF that
1309 refers to a constant pool entry of an address (or the sum of it
1310 plus a constant), a short (16-bit signed) constant plus a register,
1311 the sum of two registers, or a register indirect, possibly with an
1312 auto-increment. For DFmode and DImode with an constant plus register,
1313 we must ensure that both words are addressable. */
1315 #define LEGITIMATE_CONSTANT_POOL_BASE_P(X) \
1316 (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X) \
1317 && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (X)))
1319 #define LEGITIMATE_CONSTANT_POOL_ADDRESS_P(X) \
1320 (LEGITIMATE_CONSTANT_POOL_BASE_P (X) \
1321 || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \
1322 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
1323 && LEGITIMATE_CONSTANT_POOL_BASE_P (XEXP (XEXP (X, 0), 0))))
1325 #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \
1326 (GET_CODE (X) == CONST_INT \
1327 && (unsigned) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000)
1329 #define LEGITIMATE_OFFSET_ADDRESS_P(MODE,X) \
1330 (GET_CODE (X) == PLUS \
1331 && GET_CODE (XEXP (X, 0)) == REG \
1332 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1333 && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \
1334 && (((MODE) != DFmode && (MODE) != DImode) \
1335 || LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4)))
1337 #define LEGITIMATE_INDEXED_ADDRESS_P(X) \
1338 (GET_CODE (X) == PLUS \
1339 && GET_CODE (XEXP (X, 0)) == REG \
1340 && GET_CODE (XEXP (X, 1)) == REG \
1341 && ((REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1342 && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \
1343 || (REG_OK_FOR_BASE_P (XEXP (X, 1)) \
1344 && REG_OK_FOR_INDEX_P (XEXP (X, 0)))))
1346 #define LEGITIMATE_INDIRECT_ADDRESS_P(X) \
1347 (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))
1349 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1350 { if (LEGITIMATE_INDIRECT_ADDRESS_P (X)) \
1352 if (GET_CODE (X) == PRE_INC \
1353 && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \
1355 if (GET_CODE (X) == PRE_DEC \
1356 && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \
1358 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (X)) \
1360 if (LEGITIMATE_OFFSET_ADDRESS_P (MODE, X)) \
1362 if ((MODE) != DImode && (MODE) != TImode \
1363 && LEGITIMATE_INDEXED_ADDRESS_P (X)) \
1367 /* Try machine-dependent ways of modifying an illegitimate address
1368 to be legitimate. If we find one, return the new, valid address.
1369 This macro is used in only one place: `memory_address' in explow.c.
1371 OLDX is the address as it was before break_out_memory_refs was called.
1372 In some cases it is useful to look at this to decide what needs to be done.
1374 MODE and WIN are passed so that this macro can use
1375 GO_IF_LEGITIMATE_ADDRESS.
1377 It is always safe for this macro to do nothing. It exists to recognize
1378 opportunities to optimize the output.
1380 On RS/6000, first check for the sum of a register with a constant
1381 integer that is out of range. If so, generate code to add the
1382 constant with the low-order 16 bits masked to the register and force
1383 this result into another register (this can be done with `cau').
1384 Then generate an address of REG+(CONST&0xffff), allowing for the
1385 possibility of bit 16 being a one.
1387 Then check for the sum of a register and something not constant, try to
1388 load the other things into a register and return the sum. */
1390 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1391 { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1392 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1393 && (unsigned) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \
1394 { int high_int, low_int; \
1395 high_int = INTVAL (XEXP (X, 1)) >> 16; \
1396 low_int = INTVAL (XEXP (X, 1)) & 0xffff; \
1397 if (low_int & 0x8000) \
1398 high_int += 1, low_int |= 0xffff0000; \
1399 (X) = gen_rtx (PLUS, SImode, \
1401 (gen_rtx (PLUS, SImode, XEXP (X, 0), \
1402 gen_rtx (CONST_INT, VOIDmode, \
1403 high_int << 16)), 0),\
1404 gen_rtx (CONST_INT, VOIDmode, low_int)); \
1407 else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1408 && GET_CODE (XEXP (X, 1)) != CONST_INT \
1409 && (MODE) != DImode && (MODE) != TImode) \
1411 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1412 force_reg (SImode, force_operand (XEXP (X, 1), 0))); \
1417 /* Go to LABEL if ADDR (a legitimate address expression)
1418 has an effect that depends on the machine mode it is used for.
1420 On the RS/6000 this is true if the address is valid with a zero offset
1421 but not with an offset of four (this means it cannot be used as an
1422 address for DImode or DFmode) or is a pre-increment or decrement. Since
1423 we know it is valid, we just check for an address that is not valid with
1424 an offset of four. */
1426 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1427 { if (GET_CODE (ADDR) == PLUS \
1428 && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 0) \
1429 && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 4)) \
1431 if (GET_CODE (ADDR) == PRE_INC) \
1433 if (GET_CODE (ADDR) == PRE_DEC) \
1437 /* Define this if some processing needs to be done immediately before
1438 emitting code for an insn. */
1440 /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */
1442 /* Specify the machine mode that this machine uses
1443 for the index in the tablejump instruction. */
1444 #define CASE_VECTOR_MODE SImode
1446 /* Define this if the tablejump instruction expects the table
1447 to contain offsets from the address of the table.
1448 Do not define this if the table should contain absolute addresses. */
1449 #define CASE_VECTOR_PC_RELATIVE
1451 /* Specify the tree operation to be used to convert reals to integers. */
1452 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1454 /* This is the kind of divide that is easiest to do in the general case. */
1455 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1457 /* Define this as 1 if `char' should by default be signed; else as 0. */
1458 #define DEFAULT_SIGNED_CHAR 0
1460 /* This flag, if defined, says the same insns that convert to a signed fixnum
1461 also convert validly to an unsigned one. */
1463 /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */
1465 /* Max number of bytes we can move from memory to memory
1466 in one reasonably fast instruction. */
1467 #define MOVE_MAX (TARGET_POWER ? 16 : (TARGET_POWERPC64 ? 8 : 4))
1468 #define MAX_MOVE_MAX 16
1470 /* Nonzero if access to memory by bytes is no faster than for words.
1471 Also non-zero if doing byte operations (specifically shifts) in registers
1473 #define SLOW_BYTE_ACCESS 1
1475 /* Define if operations between registers always perform the operation
1476 on the full register even if a narrower mode is specified. */
1477 #define WORD_REGISTER_OPERATIONS
1479 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1480 will either zero-extend or sign-extend. The value of this macro should
1481 be the code that says which one of the two operations is implicitly
1482 done, NIL if none. */
1483 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1485 /* Define if loading short immediate values into registers sign extends. */
1486 #define SHORT_IMMEDIATES_SIGN_EXTEND
1488 /* The RS/6000 uses the XCOFF format. */
1490 #define XCOFF_DEBUGGING_INFO
1492 /* Define if the object format being used is COFF or a superset. */
1493 #define OBJECT_FORMAT_COFF
1495 /* Define the magic numbers that we recognize as COFF. */
1497 #define MY_ISCOFF(magic) \
1498 ((magic) == U802WRMAGIC || (magic) == U802ROMAGIC || (magic) == U802TOCMAGIC)
1500 /* This is the only version of nm that collect2 can work with. */
1501 #define REAL_NM_FILE_NAME "/usr/ucb/nm"
1503 /* We don't have GAS for the RS/6000 yet, so don't write out special
1504 .stabs in cc1plus. */
1506 #define FASCIST_ASSEMBLER
1508 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1509 is done just by pretending it is already truncated. */
1510 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1512 /* Specify the machine mode that pointers have.
1513 After generation of rtl, the compiler makes no further distinction
1514 between pointers and any other objects of this machine mode. */
1515 #define Pmode (TARGET_64BIT ? DImode : SImode)
1517 /* Mode of a function address in a call instruction (for indexing purposes).
1519 Doesn't matter on RS/6000. */
1520 #define FUNCTION_MODE (TARGET_64BIT ? DImode : SImode)
1522 /* Define this if addresses of constant functions
1523 shouldn't be put through pseudo regs where they can be cse'd.
1524 Desirable on machines where ordinary constants are expensive
1525 but a CALL with constant address is cheap. */
1526 #define NO_FUNCTION_CSE
1528 /* Define this to be nonzero if shift instructions ignore all but the low-order
1531 The sle and sre instructions which allow SHIFT_COUNT_TRUNCATED
1532 have been dropped from the PowerPC architecture. */
1534 #define SHIFT_COUNT_TRUNCATED TARGET_POWER ? 1 : 0
1536 /* Use atexit for static constructors/destructors, instead of defining
1537 our own exit function. */
1540 /* Compute the cost of computing a constant rtl expression RTX
1541 whose rtx-code is CODE. The body of this macro is a portion
1542 of a switch statement. If the code is computed here,
1543 return it with a return statement. Otherwise, break from the switch.
1545 On the RS/6000, if it is valid in the insn, it is free. So this
1546 always returns 0. */
1548 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1553 case CONST_DOUBLE: \
1556 /* Provide the costs of a rtl expression. This is in the body of a
1559 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1561 switch (rs6000_cpu) \
1563 case PROCESSOR_RIOS1: \
1564 return (GET_CODE (XEXP (X, 1)) != CONST_INT \
1565 ? COSTS_N_INSNS (5) \
1566 : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \
1567 ? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \
1568 case PROCESSOR_RIOS2: \
1569 return COSTS_N_INSNS (2); \
1570 case PROCESSOR_PPC601: \
1571 case PROCESSOR_PPC603: \
1572 return COSTS_N_INSNS (5); \
1573 case PROCESSOR_PPC604: \
1574 case PROCESSOR_PPC620: \
1575 return COSTS_N_INSNS (4); \
1579 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1580 && exact_log2 (INTVAL (XEXP (X, 1))) >= 0) \
1581 return COSTS_N_INSNS (2); \
1582 /* otherwise fall through to normal divide. */ \
1585 switch (rs6000_cpu) \
1587 case PROCESSOR_RIOS1: \
1588 return COSTS_N_INSNS (19); \
1589 case PROCESSOR_RIOS2: \
1590 return COSTS_N_INSNS (13); \
1591 case PROCESSOR_PPC601: \
1592 return COSTS_N_INSNS (36); \
1593 case PROCESSOR_PPC603: \
1594 return COSTS_N_INSNS (37); \
1595 case PROCESSOR_PPC604: \
1596 case PROCESSOR_PPC620: \
1597 return COSTS_N_INSNS (20); \
1600 /* MEM should be slightly more expensive than (plus (reg) (const)) */ \
1603 /* Compute the cost of an address. This is meant to approximate the size
1604 and/or execution delay of an insn using that address. If the cost is
1605 approximated by the RTL complexity, including CONST_COSTS above, as
1606 is usually the case for CISC machines, this macro should not be defined.
1607 For aggressively RISCy machines, only one insn format is allowed, so
1608 this macro should be a constant. The value of this macro only matters
1609 for valid addresses.
1611 For the RS/6000, everything is cost 0. */
1613 #define ADDRESS_COST(RTX) 0
1615 /* Adjust the length of an INSN. LENGTH is the currently-computed length and
1616 should be adjusted to reflect any required changes. This macro is used when
1617 there is some systematic length adjustment required that would be difficult
1618 to express in the length attribute. */
1620 /* #define ADJUST_INSN_LENGTH(X,LENGTH) */
1622 /* Add any extra modes needed to represent the condition code.
1624 For the RS/6000, we need separate modes when unsigned (logical) comparisons
1625 are being done and we need a separate mode for floating-point. We also
1626 use a mode for the case when we are comparing the results of two
1629 #define EXTRA_CC_MODES CCUNSmode, CCFPmode, CCEQmode
1631 /* Define the names for the modes specified above. */
1632 #define EXTRA_CC_NAMES "CCUNS", "CCFP", "CCEQ"
1634 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1635 return the mode to be used for the comparison. For floating-point, CCFPmode
1636 should be used. CCUNSmode should be used for unsigned comparisons.
1637 CCEQmode should be used when we are doing an inequality comparison on
1638 the result of a comparison. CCmode should be used in all other cases. */
1640 #define SELECT_CC_MODE(OP,X,Y) \
1641 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \
1642 : (OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU ? CCUNSmode \
1643 : (((OP) == EQ || (OP) == NE) && GET_RTX_CLASS (GET_CODE (X)) == '<' \
1644 ? CCEQmode : CCmode))
1646 /* Define the information needed to generate branch and scc insns. This is
1647 stored from the compare operation. Note that we can't use "rtx" here
1648 since it hasn't been defined! */
1650 extern struct rtx_def
*rs6000_compare_op0
, *rs6000_compare_op1
;
1651 extern int rs6000_compare_fp_p
;
1653 /* Set to non-zero by "fix" operation to indicate that itrunc and
1654 uitrunc must be defined. */
1656 extern int rs6000_trunc_used
;
1658 /* Function names to call to do floating point truncation. */
1660 #define RS6000_ITRUNC "itrunc"
1661 #define RS6000_UITRUNC "uitrunc"
1663 /* Prefix and suffix to use to saving floating point */
1664 #ifndef SAVE_FP_PREFIX
1665 #define SAVE_FP_PREFIX "._savef"
1666 #define SAVE_FP_SUFFIX ""
1669 /* Prefix and suffix to use to restoring floating point */
1670 #ifndef RESTORE_FP_PREFIX
1671 #define RESTORE_FP_PREFIX "._restf"
1672 #define RESTORE_FP_SUFFIX ""
1676 /* Control the assembler format that we output. */
1678 /* Output at beginning of assembler file.
1680 Initialize the section names for the RS/6000 at this point.
1682 Specify filename to assembler.
1684 We want to go into the TOC section so at least one .toc will be emitted.
1685 Also, in order to output proper .bs/.es pairs, we need at least one static
1686 [RW] section emitted.
1688 We then switch back to text to force the gcc2_compiled. label and the space
1689 allocated after it (when profiling) into the text section.
1691 Finally, declare mcount when profiling to make the assembler happy. */
1693 #define ASM_FILE_START(FILE) \
1695 rs6000_gen_section_name (&xcoff_bss_section_name, \
1696 main_input_filename, ".bss_"); \
1697 rs6000_gen_section_name (&xcoff_private_data_section_name, \
1698 main_input_filename, ".rw_"); \
1699 rs6000_gen_section_name (&xcoff_read_only_section_name, \
1700 main_input_filename, ".ro_"); \
1702 output_file_directive (FILE, main_input_filename); \
1704 if (write_symbols != NO_DEBUG) \
1705 private_data_section (); \
1708 fprintf (FILE, "\t.extern .mcount\n"); \
1711 /* Output at end of assembler file.
1713 On the RS/6000, referencing data should automatically pull in text. */
1715 #define ASM_FILE_END(FILE) \
1718 fprintf (FILE, "_section_.text:\n"); \
1720 fprintf (FILE, "\t.long _section_.text\n"); \
1723 /* We define this to prevent the name mangler from putting dollar signs into
1726 #define NO_DOLLAR_IN_LABEL
1728 /* We define this to 0 so that gcc will never accept a dollar sign in a
1729 variable name. This is needed because the AIX assembler will not accept
1732 #define DOLLARS_IN_IDENTIFIERS 0
1734 /* Implicit library calls should use memcpy, not bcopy, etc. */
1736 #define TARGET_MEM_FUNCTIONS
1738 /* Define the extra sections we need. We define three: one is the read-only
1739 data section which is used for constants. This is a csect whose name is
1740 derived from the name of the input file. The second is for initialized
1741 global variables. This is a csect whose name is that of the variable.
1742 The third is the TOC. */
1744 #define EXTRA_SECTIONS \
1745 read_only_data, private_data, read_only_private_data, toc, bss
1747 /* Define the name of our readonly data section. */
1749 #define READONLY_DATA_SECTION read_only_data_section
1751 /* If we are referencing a function that is static or is known to be
1752 in this file, make the SYMBOL_REF special. We can use this to indicate
1753 that we can branch to this function without emitting a no-op after the
1756 #define ENCODE_SECTION_INFO(DECL) \
1757 if (TREE_CODE (DECL) == FUNCTION_DECL \
1758 && (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL))) \
1759 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
1761 /* Indicate that jump tables go in the text section. */
1763 #define JUMP_TABLES_IN_TEXT_SECTION
1765 /* Define the routines to implement these extra sections. */
1767 #define EXTRA_SECTION_FUNCTIONS \
1770 read_only_data_section () \
1772 if (in_section != read_only_data) \
1774 fprintf (asm_out_file, ".csect %s[RO]\n", \
1775 xcoff_read_only_section_name); \
1776 in_section = read_only_data; \
1781 private_data_section () \
1783 if (in_section != private_data) \
1785 fprintf (asm_out_file, ".csect %s[RW]\n", \
1786 xcoff_private_data_section_name); \
1788 in_section = private_data; \
1793 read_only_private_data_section () \
1795 if (in_section != read_only_private_data) \
1797 fprintf (asm_out_file, ".csect %s[RO]\n", \
1798 xcoff_private_data_section_name); \
1799 in_section = read_only_private_data; \
1806 if (TARGET_MINIMAL_TOC) \
1808 static int toc_initialized = 0; \
1810 /* toc_section is always called at least once from ASM_FILE_START, \
1811 so this is guaranteed to always be defined once and only once \
1813 if (! toc_initialized) \
1815 fprintf (asm_out_file, ".toc\nLCTOC..0:\n"); \
1816 fprintf (asm_out_file, "\t.tc toc_table[TC],toc_table[RW]\n"); \
1817 toc_initialized = 1; \
1820 if (in_section != toc) \
1821 fprintf (asm_out_file, ".csect toc_table[RW]\n"); \
1825 if (in_section != toc) \
1826 fprintf (asm_out_file, ".toc\n"); \
1831 /* This macro produces the initial definition of a function name.
1832 On the RS/6000, we need to place an extra '.' in the function name and
1833 output the function descriptor.
1835 The csect for the function will have already been created by the
1836 `text_section' call previously done. We do have to go back to that
1839 /* ??? What do the 16 and 044 in the .function line really mean? */
1841 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
1842 { if (TREE_PUBLIC (DECL)) \
1844 fprintf (FILE, "\t.globl ."); \
1845 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1846 fprintf (FILE, "\n"); \
1850 fprintf (FILE, "\t.lglobl ."); \
1851 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1852 fprintf (FILE, "\n"); \
1854 fprintf (FILE, ".csect "); \
1855 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1856 fprintf (FILE, "[DS]\n"); \
1857 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1858 fprintf (FILE, ":\n"); \
1859 fprintf (FILE, "\t.long ."); \
1860 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1861 fprintf (FILE, ", TOC[tc0], 0\n"); \
1862 fprintf (FILE, ".csect .text[PR]\n."); \
1863 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1864 fprintf (FILE, ":\n"); \
1865 if (write_symbols == XCOFF_DEBUG) \
1866 xcoffout_declare_function (FILE, DECL, NAME); \
1869 /* Return non-zero if this entry is to be written into the constant pool
1870 in a special way. We do so if this is a SYMBOL_REF, LABEL_REF or a CONST
1871 containing one of them. If -mfp-in-toc (the default), we also do
1872 this for floating-point constants. We actually can only do this
1873 if the FP formats of the target and host machines are the same, but
1874 we can't check that since not every file that uses
1875 GO_IF_LEGITIMATE_ADDRESS_P includes real.h. */
1877 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY_P(X) \
1878 (GET_CODE (X) == SYMBOL_REF \
1879 || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \
1880 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF) \
1881 || GET_CODE (X) == LABEL_REF \
1882 || (! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC) \
1883 && GET_CODE (X) == CONST_DOUBLE \
1884 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1885 && BITS_PER_WORD == HOST_BITS_PER_INT))
1887 /* Select section for constant in constant pool.
1889 On RS/6000, all constants are in the private read-only data area.
1890 However, if this is being placed in the TOC it must be output as a
1893 #define SELECT_RTX_SECTION(MODE, X) \
1894 { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \
1897 read_only_private_data_section (); \
1900 /* Macro to output a special constant pool entry. Go to WIN if we output
1901 it. Otherwise, it is written the usual way.
1903 On the RS/6000, toc entries are handled this way. */
1905 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, X, MODE, ALIGN, LABELNO, WIN) \
1906 { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \
1908 output_toc (FILE, X, LABELNO); \
1913 /* Select the section for an initialized data object.
1915 On the RS/6000, we have a special section for all variables except those
1918 #define SELECT_SECTION(EXP,RELOC) \
1920 if ((TREE_CODE (EXP) == STRING_CST \
1921 && !flag_writable_strings) \
1922 || (TREE_READONLY (EXP) && ! TREE_THIS_VOLATILE (EXP) \
1923 && DECL_INITIAL (EXP) \
1924 && (DECL_INITIAL (EXP) == error_mark_node \
1925 || TREE_CONSTANT (DECL_INITIAL (EXP))) \
1928 if (TREE_PUBLIC (EXP)) \
1929 read_only_data_section (); \
1931 read_only_private_data_section (); \
1935 if (TREE_PUBLIC (EXP)) \
1938 private_data_section (); \
1942 /* This outputs NAME to FILE up to the first null or '['. */
1944 #define RS6000_OUTPUT_BASENAME(FILE, NAME) \
1945 if ((NAME)[0] == '*' || (NAME)[strlen (NAME) - 1] != ']') \
1946 assemble_name (FILE, NAME); \
1949 int _len = strlen (NAME); \
1950 char *_p = alloca (_len + 1); \
1952 strcpy (_p, NAME); \
1953 _p[_len - 4] = '\0'; \
1954 assemble_name (FILE, _p); \
1957 /* Output something to declare an external symbol to the assembler. Most
1958 assemblers don't need this.
1960 If we haven't already, add "[RW]" (or "[DS]" for a function) to the
1961 name. Normally we write this out along with the name. In the few cases
1962 where we can't, it gets stripped off. */
1964 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1965 { rtx _symref = XEXP (DECL_RTL (DECL), 0); \
1966 if ((TREE_CODE (DECL) == VAR_DECL \
1967 || TREE_CODE (DECL) == FUNCTION_DECL) \
1968 && (NAME)[0] != '*' \
1969 && (NAME)[strlen (NAME) - 1] != ']') \
1971 char *_name = (char *) permalloc (strlen (XSTR (_symref, 0)) + 5); \
1972 strcpy (_name, XSTR (_symref, 0)); \
1973 strcat (_name, TREE_CODE (DECL) == FUNCTION_DECL ? "[DS]" : "[RW]"); \
1974 XSTR (_symref, 0) = _name; \
1976 fprintf (FILE, "\t.extern "); \
1977 assemble_name (FILE, XSTR (_symref, 0)); \
1978 if (TREE_CODE (DECL) == FUNCTION_DECL) \
1980 fprintf (FILE, "\n\t.extern ."); \
1981 RS6000_OUTPUT_BASENAME (FILE, XSTR (_symref, 0)); \
1983 fprintf (FILE, "\n"); \
1986 /* Similar, but for libcall. We only have to worry about the function name,
1987 not that of the descriptor. */
1989 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \
1990 { fprintf (FILE, "\t.extern ."); \
1991 assemble_name (FILE, XSTR (FUN, 0)); \
1992 fprintf (FILE, "\n"); \
1995 /* Output to assembler file text saying following lines
1996 may contain character constants, extra white space, comments, etc. */
1998 #define ASM_APP_ON ""
2000 /* Output to assembler file text saying following lines
2001 no longer contain unusual constructs. */
2003 #define ASM_APP_OFF ""
2005 /* Output before instructions. */
2007 #define TEXT_SECTION_ASM_OP ".csect .text[PR]"
2009 /* Output before writable data. */
2011 #define DATA_SECTION_ASM_OP ".csect .data[RW]"
2013 /* How to refer to registers in assembler output.
2014 This sequence is indexed by compiler's hard-register-number (see above). */
2016 #define REGISTER_NAMES \
2017 {"0", "1", "2", "3", "4", "5", "6", "7", \
2018 "8", "9", "10", "11", "12", "13", "14", "15", \
2019 "16", "17", "18", "19", "20", "21", "22", "23", \
2020 "24", "25", "26", "27", "28", "29", "30", "31", \
2021 "0", "1", "2", "3", "4", "5", "6", "7", \
2022 "8", "9", "10", "11", "12", "13", "14", "15", \
2023 "16", "17", "18", "19", "20", "21", "22", "23", \
2024 "24", "25", "26", "27", "28", "29", "30", "31", \
2025 "mq", "lr", "ctr", "ap", \
2026 "0", "1", "2", "3", "4", "5", "6", "7" }
2028 /* Table of additional register names to use in user input. */
2030 #define ADDITIONAL_REGISTER_NAMES \
2031 {"r0", 0, "r1", 1, "r2", 2, "r3", 3, \
2032 "r4", 4, "r5", 5, "r6", 6, "r7", 7, \
2033 "r8", 8, "r9", 9, "r10", 10, "r11", 11, \
2034 "r12", 12, "r13", 13, "r14", 14, "r15", 15, \
2035 "r16", 16, "r17", 17, "r18", 18, "r19", 19, \
2036 "r20", 20, "r21", 21, "r22", 22, "r23", 23, \
2037 "r24", 24, "r25", 25, "r26", 26, "r27", 27, \
2038 "r28", 28, "r29", 29, "r30", 30, "r31", 31, \
2039 "fr0", 32, "fr1", 33, "fr2", 34, "fr3", 35, \
2040 "fr4", 36, "fr5", 37, "fr6", 38, "fr7", 39, \
2041 "fr8", 40, "fr9", 41, "fr10", 42, "fr11", 43, \
2042 "fr12", 44, "fr13", 45, "fr14", 46, "fr15", 47, \
2043 "fr16", 48, "fr17", 49, "fr18", 50, "fr19", 51, \
2044 "fr20", 52, "fr21", 53, "fr22", 54, "fr23", 55, \
2045 "fr24", 56, "fr25", 57, "fr26", 58, "fr27", 59, \
2046 "fr28", 60, "fr29", 61, "fr30", 62, "fr31", 63, \
2047 /* no additional names for: mq, lr, ctr, ap */ \
2048 "cr0", 68, "cr1", 69, "cr2", 70, "cr3", 71, \
2049 "cr4", 72, "cr5", 73, "cr6", 74, "cr7", 75, \
2052 /* How to renumber registers for dbx and gdb. */
2054 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
2056 /* Text to write out after a CALL that may be replaced by glue code by
2057 the loader. This depends on the AIX version. */
2058 #define RS6000_CALL_GLUE "cror 31,31,31"
2060 /* This is how to output the definition of a user-level label named NAME,
2061 such as the label on a static function or variable NAME. */
2063 #define ASM_OUTPUT_LABEL(FILE,NAME) \
2064 do { RS6000_OUTPUT_BASENAME (FILE, NAME); fputs (":\n", FILE); } while (0)
2066 /* This is how to output a command to make the user-level label named NAME
2067 defined for reference from other files. */
2069 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
2070 do { fputs ("\t.globl ", FILE); \
2071 RS6000_OUTPUT_BASENAME (FILE, NAME); fputs ("\n", FILE);} while (0)
2073 /* This is how to output a reference to a user-level label named NAME.
2074 `assemble_name' uses this. */
2076 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
2077 fprintf (FILE, NAME)
2079 /* This is how to output an internal numbered label where
2080 PREFIX is the class of label and NUM is the number within the class. */
2082 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
2083 fprintf (FILE, "%s..%d:\n", PREFIX, NUM)
2085 /* This is how to output an internal label prefix. rs6000.c uses this
2086 when generating traceback tables. */
2088 #define ASM_OUTPUT_INTERNAL_LABEL_PREFIX(FILE,PREFIX) \
2089 fprintf (FILE, "%s..", PREFIX)
2091 /* This is how to output a label for a jump table. Arguments are the same as
2092 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
2095 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
2096 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
2098 /* This is how to store into the string LABEL
2099 the symbol_ref name of an internal numbered label where
2100 PREFIX is the class of label and NUM is the number within the class.
2101 This is suitable for output with `assemble_name'. */
2103 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
2104 sprintf (LABEL, "%s..%d", PREFIX, NUM)
2106 /* This is how to output an assembler line defining a `double' constant. */
2108 #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
2110 if (REAL_VALUE_ISINF (VALUE) \
2111 || REAL_VALUE_ISNAN (VALUE) \
2112 || REAL_VALUE_MINUS_ZERO (VALUE)) \
2115 REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \
2116 fprintf (FILE, "\t.long 0x%lx\n\t.long 0x%lx\n", \
2117 t[0] & 0xffffffff, t[1] & 0xffffffff); \
2122 REAL_VALUE_TO_DECIMAL (VALUE, "%.20e", str); \
2123 fprintf (FILE, "\t.double 0d%s\n", str); \
2127 /* This is how to output an assembler line defining a `float' constant. */
2129 #define ASM_OUTPUT_FLOAT(FILE, VALUE) \
2131 if (REAL_VALUE_ISINF (VALUE) \
2132 || REAL_VALUE_ISNAN (VALUE) \
2133 || REAL_VALUE_MINUS_ZERO (VALUE)) \
2136 REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \
2137 fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \
2142 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \
2143 fprintf (FILE, "\t.float 0d%s\n", str); \
2147 /* This is how to output an assembler line defining an `int' constant. */
2149 #define ASM_OUTPUT_INT(FILE,VALUE) \
2150 ( fprintf (FILE, "\t.long "), \
2151 output_addr_const (FILE, (VALUE)), \
2152 fprintf (FILE, "\n"))
2154 /* Likewise for `char' and `short' constants. */
2156 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2157 ( fprintf (FILE, "\t.short "), \
2158 output_addr_const (FILE, (VALUE)), \
2159 fprintf (FILE, "\n"))
2161 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
2162 ( fprintf (FILE, "\t.byte "), \
2163 output_addr_const (FILE, (VALUE)), \
2164 fprintf (FILE, "\n"))
2166 /* This is how to output an assembler line for a numeric constant byte. */
2168 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
2169 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
2171 /* This is how to output an assembler line to define N characters starting
2174 #define ASM_OUTPUT_ASCII(FILE, P, N) output_ascii ((FILE), (P), (N))
2176 /* This is how to output code to push a register on the stack.
2177 It need not be very fast code. */
2179 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2180 asm_fprintf (FILE, "\{tstu|stwu} %s,-4(r1)\n", reg_names[REGNO]);
2182 /* This is how to output an insn to pop a register from the stack.
2183 It need not be very fast code. */
2185 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2186 asm_fprintf (FILE, "\t{l|lwz} %s,0(r1)\n\t{ai|addic} r1,r1,4\n", \
2189 /* This is how to output an element of a case-vector that is absolute.
2190 (RS/6000 does not use such vectors, but we must define this macro
2193 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2194 do { char buf[100]; \
2195 fprintf (FILE, "\t.long "); \
2196 ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \
2197 assemble_name (FILE, buf); \
2198 fprintf (FILE, "\n"); \
2201 /* This is how to output an element of a case-vector that is relative. */
2203 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
2204 do { char buf[100]; \
2205 fprintf (FILE, "\t.long "); \
2206 ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \
2207 assemble_name (FILE, buf); \
2208 fprintf (FILE, "-"); \
2209 ASM_GENERATE_INTERNAL_LABEL (buf, "L", REL); \
2210 assemble_name (FILE, buf); \
2211 fprintf (FILE, "\n"); \
2214 /* This is how to output an assembler line
2215 that says to advance the location counter
2216 to a multiple of 2**LOG bytes. */
2218 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
2220 fprintf (FILE, "\t.align %d\n", (LOG))
2222 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
2223 fprintf (FILE, "\t.space %d\n", (SIZE))
2225 /* This says how to output an assembler line
2226 to define a global common symbol. */
2228 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
2229 do { fputs (".comm ", (FILE)); \
2230 RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \
2231 fprintf ((FILE), ",%d\n", (SIZE)); } while (0)
2233 /* This says how to output an assembler line
2234 to define a local common symbol. */
2236 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
2237 do { fputs (".lcomm ", (FILE)); \
2238 RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \
2239 fprintf ((FILE), ",%d,%s\n", (SIZE), xcoff_bss_section_name); \
2242 /* Store in OUTPUT a string (made with alloca) containing
2243 an assembler-name for a local static variable named NAME.
2244 LABELNO is an integer which is different for each call. */
2246 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2247 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2248 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2250 /* Define the parentheses used to group arithmetic operations
2251 in assembler code. */
2253 #define ASM_OPEN_PAREN "("
2254 #define ASM_CLOSE_PAREN ")"
2256 /* Define results of standard character escape sequences. */
2257 #define TARGET_BELL 007
2258 #define TARGET_BS 010
2259 #define TARGET_TAB 011
2260 #define TARGET_NEWLINE 012
2261 #define TARGET_VT 013
2262 #define TARGET_FF 014
2263 #define TARGET_CR 015
2265 /* Print operand X (an rtx) in assembler syntax to file FILE.
2266 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2267 For `%' followed by punctuation, CODE is the punctuation and X is null. */
2269 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2271 /* Define which CODE values are valid. */
2273 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '.' || (CODE) == '*')
2275 /* Print a memory address as an operand to reference that memory location. */
2277 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
2279 /* Define the codes that are matched by predicates in rs6000.c. */
2281 #define PREDICATE_CODES \
2282 {"short_cint_operand", {CONST_INT}}, \
2283 {"u_short_cint_operand", {CONST_INT}}, \
2284 {"non_short_cint_operand", {CONST_INT}}, \
2285 {"gpc_reg_operand", {SUBREG, REG}}, \
2286 {"cc_reg_operand", {SUBREG, REG}}, \
2287 {"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, \
2288 {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \
2289 {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \
2290 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
2291 {"easy_fp_constant", {CONST_DOUBLE}}, \
2292 {"reg_or_mem_operand", {SUBREG, MEM, REG}}, \
2293 {"lwa_operand", {SUBREG, MEM, REG}}, \
2294 {"fp_reg_or_mem_operand", {SUBREG, MEM, REG}}, \
2295 {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \
2296 {"add_operand", {SUBREG, REG, CONST_INT}}, \
2297 {"non_add_cint_operand", {CONST_INT}}, \
2298 {"and_operand", {SUBREG, REG, CONST_INT}}, \
2299 {"non_and_cint_operand", {CONST_INT}}, \
2300 {"logical_operand", {SUBREG, REG, CONST_INT}}, \
2301 {"non_logical_cint_operand", {CONST_INT}}, \
2302 {"mask_operand", {CONST_INT}}, \
2303 {"call_operand", {SYMBOL_REF, REG}}, \
2304 {"current_file_function_operand", {SYMBOL_REF}}, \
2305 {"input_operand", {SUBREG, MEM, REG, CONST_INT, SYMBOL_REF}}, \
2306 {"load_multiple_operation", {PARALLEL}}, \
2307 {"store_multiple_operation", {PARALLEL}}, \
2308 {"branch_comparison_operator", {EQ, NE, LE, LT, GE, \
2309 GT, LEU, LTU, GEU, GTU}}, \
2310 {"scc_comparison_operator", {EQ, NE, LE, LT, GE, \
2311 GT, LEU, LTU, GEU, GTU}},