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1 /* Definitions of target machine for GNU compiler, for IBM RS/6000.
2 Copyright (C) 1992 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@nyu.edu)
4
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20
21
22 /* Note that some other tm.h files include this one and then override
23 many of the definitions that relate to assembler syntax. */
24
25
26 /* Names to predefine in the preprocessor for this target machine. */
27
28 #define CPP_PREDEFINES "-D_IBMR2 -D_AIX"
29
30 /* Print subsidiary information on the compiler version in use. */
31 #define TARGET_VERSION ;
32
33 /* Tell the assembler to assume that all undefined names are external.
34
35 Don't do this until the fixed IBM assembler is more generally available.
36 When this becomes permanently defined, the ASM_OUTPUT_EXTERNAL,
37 ASM_OUTPUT_EXTERNAL_LIBCALL, and RS6000_OUTPUT_BASENAME macros will no
38 longer be needed. */
39
40 /* #define ASM_SPEC "-u" */
41
42 /* Define the options for the binder: Start text at 512, align all segments
43 to 512 bytes, and warn if there is text relocation.
44
45 The -bhalt:4 option supposedly changes the level at which ld will abort,
46 but it also suppresses warnings about multiply defined symbols and is
47 used by the AIX cc command. So we use it here.
48
49 -bnodelcsect undoes a poor choice of default relating to multiply-defined
50 csects. See AIX documentation for more information about this. */
51
52 #define LINK_SPEC "-T512 -H512 -btextro -bhalt:4 -bnodelcsect"
53
54 /* Profiled library versions are used by linking with special directories. */
55 #define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\
56 %{p:-L/lib/profiled -L/usr/lib/profiled} %{g*:-lg} -lc"
57
58 /* gcc must do the search itself to find libgcc.a, not use -l. */
59 #define LINK_LIBGCC_SPECIAL
60
61 /* Don't turn -B into -L if the argument specifies a relative file name. */
62 #define RELATIVE_PREFIX_NOT_LINKDIR
63
64 /* Run-time compilation parameters selecting different hardware subsets. */
65
66 /* Flag to allow putting fp constants in the TOC; can be turned off when
67 the TOC overflows. */
68
69 #define TARGET_FP_IN_TOC (target_flags & 1)
70
71 extern int target_flags;
72
73 /* Macro to define tables used to set the flags.
74 This is a list in braces of pairs in braces,
75 each pair being { "NAME", VALUE }
76 where VALUE is the bits to set or minus the bits to clear.
77 An empty string NAME is used to identify the default VALUE. */
78
79 #define TARGET_SWITCHES \
80 {{"fp-in-toc", 1}, \
81 {"no-fp-in-toc", -1}, \
82 { "", TARGET_DEFAULT}}
83
84 #define TARGET_DEFAULT 1
85
86 /* On the RS/6000, we turn on various flags if optimization is selected. */
87
88 #define OPTIMIZATION_OPTIONS(LEVEL) \
89 { \
90 if ((LEVEL) > 0) \
91 { \
92 flag_force_mem = 1; \
93 flag_omit_frame_pointer = 1; \
94 } \
95 }
96
97 /* Define this to modify the options specified by the user. */
98
99 #define OVERRIDE_OPTIONS \
100 { \
101 profile_block_flag = 0; \
102 }
103 \f
104 /* target machine storage layout */
105
106 /* Define this if most significant bit is lowest numbered
107 in instructions that operate on numbered bit-fields. */
108 /* That is true on RS/6000. */
109 #define BITS_BIG_ENDIAN 1
110
111 /* Define this if most significant byte of a word is the lowest numbered. */
112 /* That is true on RS/6000. */
113 #define BYTES_BIG_ENDIAN 1
114
115 /* Define this if most significant word of a multiword number is lowest
116 numbered.
117
118 For RS/6000 we can decide arbitrarily since there are no machine
119 instructions for them. Might as well be consistent with bits and bytes. */
120 #define WORDS_BIG_ENDIAN 1
121
122 /* number of bits in an addressable storage unit */
123 #define BITS_PER_UNIT 8
124
125 /* Width in bits of a "word", which is the contents of a machine register.
126 Note that this is not necessarily the width of data type `int';
127 if using 16-bit ints on a 68000, this would still be 32.
128 But on a machine with 16-bit registers, this would be 16. */
129 #define BITS_PER_WORD 32
130
131 /* Width of a word, in units (bytes). */
132 #define UNITS_PER_WORD 4
133
134 /* Type used for ptrdiff_t, as a string used in a declaration. */
135 #define PTRDIFF_TYPE "int"
136
137 /* Type used for wchar_t, as a string used in a declaration. */
138 #define WCHAR_TYPE "short unsigned int"
139
140 /* Width of wchar_t in bits. */
141 #define WCHAR_TYPE_SIZE 16
142
143 /* Width in bits of a pointer.
144 See also the macro `Pmode' defined below. */
145 #define POINTER_SIZE 32
146
147 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
148 #define PARM_BOUNDARY 32
149
150 /* Boundary (in *bits*) on which stack pointer should be aligned. */
151 #define STACK_BOUNDARY 64
152
153 /* Allocation boundary (in *bits*) for the code of a function. */
154 #define FUNCTION_BOUNDARY 32
155
156 /* No data type wants to be aligned rounder than this. */
157 #define BIGGEST_ALIGNMENT 32
158
159 /* Alignment of field after `int : 0' in a structure. */
160 #define EMPTY_FIELD_BOUNDARY 32
161
162 /* Every structure's size must be a multiple of this. */
163 #define STRUCTURE_SIZE_BOUNDARY 8
164
165 /* A bitfield declared as `int' forces `int' alignment for the struct. */
166 #define PCC_BITFIELD_TYPE_MATTERS 1
167
168 /* Make strings word-aligned so strcpy from constants will be faster. */
169 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
170 (TREE_CODE (EXP) == STRING_CST \
171 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
172
173 /* Make arrays of chars word-aligned for the same reasons. */
174 #define DATA_ALIGNMENT(TYPE, ALIGN) \
175 (TREE_CODE (TYPE) == ARRAY_TYPE \
176 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
177 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
178
179 /* Non-zero if move instructions will actually fail to work
180 when given unaligned data. */
181 #define STRICT_ALIGNMENT 0
182 \f
183 /* Standard register usage. */
184
185 /* Number of actual hardware registers.
186 The hardware registers are assigned numbers for the compiler
187 from 0 to just below FIRST_PSEUDO_REGISTER.
188 All registers that the compiler knows about must be given numbers,
189 even those that are not normally considered general registers.
190
191 RS/6000 has 32 fixed-point registers, 32 floating-point registers,
192 an MQ register, a count register, a link register, and 8 condition
193 register fields, which we view here as separate registers.
194
195 In addition, the difference between the frame and argument pointers is
196 a function of the number of registers saved, so we need to have a
197 register for AP that will later be eliminated in favor of SP or FP.
198 This is a normal register, but it is fixed. */
199
200 #define FIRST_PSEUDO_REGISTER 76
201
202 /* 1 for registers that have pervasive standard uses
203 and are not available for the register allocator.
204
205 On RS/6000, r1 is used for the stack and r2 is used as the TOC pointer.
206
207 cr5 is not supposed to be used. */
208
209 #define FIXED_REGISTERS \
210 {0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
211 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
212 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
213 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
214 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0}
215
216 /* 1 for registers not available across function calls.
217 These must include the FIXED_REGISTERS and also any
218 registers that can be used without being saved.
219 The latter must include the registers where values are returned
220 and the register where structure-value addresses are passed.
221 Aside from that, you can include as many other registers as you like. */
222
223 #define CALL_USED_REGISTERS \
224 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, \
225 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
226 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
227 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
228 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1}
229
230 /* List the order in which to allocate registers. Each register must be
231 listed once, even those in FIXED_REGISTERS.
232
233 We allocate in the following order:
234 fp0 (not saved or used for anything)
235 fp13 - fp2 (not saved; incoming fp arg registers)
236 fp1 (not saved; return value)
237 fp31 - fp14 (saved; order given to save least number)
238 cr1, cr6, cr7 (not saved or special)
239 cr0 (not saved, but used for arithmetic operations)
240 cr2, cr3, cr4 (saved)
241 r0 (not saved; cannot be base reg)
242 r9 (not saved; best for TImode)
243 r11, r10, r8-r4 (not saved; highest used first to make less conflict)
244 r3 (not saved; return value register)
245 r31 - r13 (saved; order given to save least number)
246 r12 (not saved; if used for DImode or DFmode would use r13)
247 mq (not saved; best to use it if we can)
248 ctr (not saved; when we have the choice ctr is better)
249 lr (saved)
250 cr5, r1, r2, ap (fixed) */
251
252 #define REG_ALLOC_ORDER \
253 {32, \
254 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, \
255 33, \
256 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \
257 50, 49, 48, 47, 46, \
258 69, 74, 75, 68, 70, 71, 72, \
259 0, \
260 9, 11, 10, 8, 7, 6, 5, 4, \
261 3, \
262 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, \
263 18, 17, 16, 15, 14, 13, 12, \
264 64, 66, 65, \
265 73, 1, 2, 67}
266
267 /* True if register is floating-point. */
268 #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 63)
269
270 /* True if register is a condition register. */
271 #define CR_REGNO_P(N) ((N) >= 68 && (N) <= 75)
272
273 /* True if register is an integer register. */
274 #define INT_REGNO_P(N) ((N) <= 31 || (N) == 67)
275
276 /* Return number of consecutive hard regs needed starting at reg REGNO
277 to hold something of mode MODE.
278 This is ordinarily the length in words of a value of mode MODE
279 but can be less for certain modes in special long registers.
280
281 On RS/6000, ordinary registers hold 32 bits worth;
282 a single floating point register holds 64 bits worth. */
283
284 #define HARD_REGNO_NREGS(REGNO, MODE) \
285 (FP_REGNO_P (REGNO) \
286 ? ((GET_MODE_SIZE (MODE) + 2 * UNITS_PER_WORD - 1) / (2 * UNITS_PER_WORD)) \
287 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
288
289 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
290 On RS/6000, the cpu registers can hold any mode but the float registers
291 can hold only floating modes and CR register can only hold CC modes. We
292 cannot put DImode or TImode anywhere except general register and they
293 must be able to fit within the register set. */
294
295 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
296 (FP_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_FLOAT \
297 : CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \
298 : ! INT_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_INT \
299 : 1)
300
301 /* Value is 1 if it is a good idea to tie two pseudo registers
302 when one has mode MODE1 and one has mode MODE2.
303 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
304 for any hard reg, then this must be 0 for correct output. */
305 #define MODES_TIEABLE_P(MODE1, MODE2) \
306 (GET_MODE_CLASS (MODE1) == MODE_FLOAT \
307 ? GET_MODE_CLASS (MODE2) == MODE_FLOAT \
308 : GET_MODE_CLASS (MODE2) == MODE_FLOAT \
309 ? GET_MODE_CLASS (MODE1) == MODE_FLOAT \
310 : GET_MODE_CLASS (MODE1) == MODE_CC \
311 ? GET_MODE_CLASS (MODE2) == MODE_CC \
312 : GET_MODE_CLASS (MODE2) == MODE_CC \
313 ? GET_MODE_CLASS (MODE1) == MODE_CC \
314 : 1)
315
316 /* A C expression returning the cost of moving data from a register of class
317 CLASS1 to one of CLASS2.
318
319 On the RS/6000, copying between floating-point and fixed-point
320 registers is expensive. */
321
322 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
323 ((CLASS1) == FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 2 \
324 : (CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS ? 10 \
325 : (CLASS1) != FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 10 \
326 : 2)
327
328 /* A C expressions returning the cost of moving data of MODE from a register to
329 or from memory.
330
331 On the RS/6000, bump this up a bit. */
332
333 #define MEMORY_MOVE_COST(MODE) 4
334
335 /* Specify the cost of a branch insn; roughly the number of extra insns that
336 should be added to avoid a branch.
337
338 Set this to 2 on the RS/6000 since that is roughly the average cost of an
339 unscheduled conditional branch. */
340
341 #define BRANCH_COST 2
342
343 /* Specify the registers used for certain standard purposes.
344 The values of these macros are register numbers. */
345
346 /* RS/6000 pc isn't overloaded on a register that the compiler knows about. */
347 /* #define PC_REGNUM */
348
349 /* Register to use for pushing function arguments. */
350 #define STACK_POINTER_REGNUM 1
351
352 /* Base register for access to local variables of the function. */
353 #define FRAME_POINTER_REGNUM 31
354
355 /* Value should be nonzero if functions must have frame pointers.
356 Zero means the frame pointer need not be set up (and parms
357 may be accessed via the stack pointer) in functions that seem suitable.
358 This is computed in `reload', in reload1.c. */
359 #define FRAME_POINTER_REQUIRED 0
360
361 /* Base register for access to arguments of the function. */
362 #define ARG_POINTER_REGNUM 67
363
364 /* Place to put static chain when calling a function that requires it. */
365 #define STATIC_CHAIN_REGNUM 11
366
367 /* Place that structure value return address is placed.
368
369 On the RS/6000, it is passed as an extra parameter. */
370 #define STRUCT_VALUE 0
371 \f
372 /* Define the classes of registers for register constraints in the
373 machine description. Also define ranges of constants.
374
375 One of the classes must always be named ALL_REGS and include all hard regs.
376 If there is more than one class, another class must be named NO_REGS
377 and contain no registers.
378
379 The name GENERAL_REGS must be the name of a class (or an alias for
380 another name such as ALL_REGS). This is the class of registers
381 that is allowed by "g" or "r" in a register constraint.
382 Also, registers outside this class are allocated only when
383 instructions express preferences for them.
384
385 The classes must be numbered in nondecreasing order; that is,
386 a larger-numbered class must never be contained completely
387 in a smaller-numbered class.
388
389 For any two classes, it is very desirable that there be another
390 class that represents their union. */
391
392 /* The RS/6000 has three types of registers, fixed-point, floating-point,
393 and condition registers, plus three special registers, MQ, CTR, and the
394 link register.
395
396 However, r0 is special in that it cannot be used as a base register.
397 So make a class for registers valid as base registers.
398
399 Also, cr0 is the only condition code register that can be used in
400 arithmetic insns, so make a separate class for it. */
401
402 enum reg_class { NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS,
403 NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS,
404 SPECIAL_REGS, CR0_REGS, CR_REGS, ALL_REGS, LIM_REG_CLASSES };
405
406 #define N_REG_CLASSES (int) LIM_REG_CLASSES
407
408 /* Give names of register classes as strings for dump file. */
409
410 #define REG_CLASS_NAMES \
411 { "NO_REGS", "BASE_REGS", "GENERAL_REGS", "FLOAT_REGS", \
412 "NON_SPECIAL_REGS", "MQ_REGS", "LINK_REGS", "CTR_REGS", \
413 "LINK_OR_CTR_REGS", "SPECIAL_REGS", "CR0_REGS", "CR_REGS", "ALL_REGS" }
414
415 /* Define which registers fit in which classes.
416 This is an initializer for a vector of HARD_REG_SET
417 of length N_REG_CLASSES. */
418
419 #define REG_CLASS_CONTENTS \
420 { {0, 0, 0}, {0xfffffffe, 0, 8}, {~0, 0, 8}, \
421 {0, ~0, 0}, {~0, ~0, 0}, {0, 0, 1}, {0, 0, 2}, \
422 {0, 0, 4}, {0, 0, 6}, {0, 0, 7}, {0, 0, 16}, \
423 {0, 0, 0xff0}, {~0, ~0, 0xfff5} }
424
425 /* The same information, inverted:
426 Return the class number of the smallest class containing
427 reg number REGNO. This could be a conditional expression
428 or could index an array. */
429
430 #define REGNO_REG_CLASS(REGNO) \
431 ((REGNO) == 0 ? GENERAL_REGS \
432 : (REGNO) < 32 ? BASE_REGS \
433 : FP_REGNO_P (REGNO) ? FLOAT_REGS \
434 : (REGNO) == 68 ? CR0_REGS \
435 : CR_REGNO_P (REGNO) ? CR_REGS \
436 : (REGNO) == 64 ? MQ_REGS \
437 : (REGNO) == 65 ? LINK_REGS \
438 : (REGNO) == 66 ? CTR_REGS \
439 : (REGNO) == 67 ? BASE_REGS \
440 : NO_REGS)
441
442 /* The class value for index registers, and the one for base regs. */
443 #define INDEX_REG_CLASS GENERAL_REGS
444 #define BASE_REG_CLASS BASE_REGS
445
446 /* Get reg_class from a letter such as appears in the machine description. */
447
448 #define REG_CLASS_FROM_LETTER(C) \
449 ((C) == 'f' ? FLOAT_REGS \
450 : (C) == 'b' ? BASE_REGS \
451 : (C) == 'h' ? SPECIAL_REGS \
452 : (C) == 'q' ? MQ_REGS \
453 : (C) == 'c' ? CTR_REGS \
454 : (C) == 'l' ? LINK_REGS \
455 : (C) == 'x' ? CR0_REGS \
456 : (C) == 'y' ? CR_REGS \
457 : NO_REGS)
458
459 /* The letters I, J, K, L, M, N, and P in a register constraint string
460 can be used to stand for particular ranges of immediate operands.
461 This macro defines what the ranges are.
462 C is the letter, and VALUE is a constant value.
463 Return 1 if VALUE is in the range specified by C.
464
465 `I' is signed 16-bit constants
466 `J' is a constant with only the high-order 16 bits non-zero
467 `K' is a constant with only the low-order 16 bits non-zero
468 `L' is a constant that can be placed into a mask operand
469 `M' is a constant that is greater than 31
470 `N' is a constant that is an exact power of two
471 `O' is the constant zero
472 `P' is a constant whose negation is a signed 16-bit constant */
473
474 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
475 ( (C) == 'I' ? (unsigned) ((VALUE) + 0x8000) < 0x10000 \
476 : (C) == 'J' ? ((VALUE) & 0xffff) == 0 \
477 : (C) == 'K' ? ((VALUE) & 0xffff0000) == 0 \
478 : (C) == 'L' ? mask_constant (VALUE) \
479 : (C) == 'M' ? (VALUE) > 31 \
480 : (C) == 'N' ? exact_log2 (VALUE) >= 0 \
481 : (C) == 'O' ? (VALUE) == 0 \
482 : (C) == 'P' ? (unsigned) ((- (VALUE)) + 0x8000) < 0x1000 \
483 : 0)
484
485 /* Similar, but for floating constants, and defining letters G and H.
486 Here VALUE is the CONST_DOUBLE rtx itself.
487
488 We flag for special constants when we can copy the constant into
489 a general register in two insns for DF and one insn for SF. */
490
491 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
492 ((C) == 'G' ? easy_fp_constant (VALUE, GET_MODE (VALUE)) : 0)
493
494 /* Optional extra constraints for this machine.
495
496 For the RS/6000, `Q' means that this is a memory operand that is just
497 an offset from a register. */
498
499 #define EXTRA_CONSTRAINT(OP, C) \
500 ((C) == 'Q' ? indirect_operand (OP, VOIDmode) : 0)
501
502 /* Given an rtx X being reloaded into a reg required to be
503 in class CLASS, return the class of reg to actually use.
504 In general this is just CLASS; but on some machines
505 in some cases it is preferable to use a more restrictive class.
506
507 On the RS/6000, we have to return NO_REGS when we want to reload a
508 floating-point CONST_DOUBLE to force it to be copied to memory. */
509
510 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
511 ((GET_CODE (X) == CONST_DOUBLE \
512 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
513 ? NO_REGS : (CLASS))
514
515 /* Return the register class of a scratch register needed to copy IN into
516 or out of a register in CLASS in MODE. If it can be done directly,
517 NO_REGS is returned. */
518
519 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
520 secondary_reload_class (CLASS, MODE, IN)
521
522 /* Return the maximum number of consecutive registers
523 needed to represent mode MODE in a register of class CLASS.
524
525 On RS/6000, this is the size of MODE in words,
526 except in the FP regs, where a single reg is enough for two words. */
527 #define CLASS_MAX_NREGS(CLASS, MODE) \
528 ((CLASS) == FLOAT_REGS \
529 ? ((GET_MODE_SIZE (MODE) + 2 * UNITS_PER_WORD - 1) / (2 * UNITS_PER_WORD)) \
530 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
531 \f
532 /* Stack layout; function entry, exit and calling. */
533
534 /* Define this if pushing a word on the stack
535 makes the stack pointer a smaller address. */
536 #define STACK_GROWS_DOWNWARD
537
538 /* Define this if the nominal address of the stack frame
539 is at the high-address end of the local variables;
540 that is, each additional local variable allocated
541 goes at a more negative offset in the frame.
542
543 On the RS/6000, we grow upwards, from the area after the outgoing
544 arguments. */
545 /* #define FRAME_GROWS_DOWNWARD */
546
547 /* Offset within stack frame to start allocating local variables at.
548 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
549 first local allocated. Otherwise, it is the offset to the BEGINNING
550 of the first local allocated.
551
552 On the RS/6000, the frame pointer is the same as the stack pointer,
553 except for dynamic allocations. So we start after the fixed area and
554 outgoing parameter area. */
555
556 #define STARTING_FRAME_OFFSET (current_function_outgoing_args_size + 24)
557
558 /* If we generate an insn to push BYTES bytes,
559 this says how many the stack pointer really advances by.
560 On RS/6000, don't define this because there are no push insns. */
561 /* #define PUSH_ROUNDING(BYTES) */
562
563 /* Offset of first parameter from the argument pointer register value.
564 On the RS/6000, we define the argument pointer to the start of the fixed
565 area. */
566 #define FIRST_PARM_OFFSET(FNDECL) 24
567
568 /* Define this if stack space is still allocated for a parameter passed
569 in a register. The value is the number of bytes allocated to this
570 area. */
571 #define REG_PARM_STACK_SPACE(FNDECL) 32
572
573 /* Define this if the above stack space is to be considered part of the
574 space allocated by the caller. */
575 #define OUTGOING_REG_PARM_STACK_SPACE
576
577 /* This is the difference between the logical top of stack and the actual sp.
578
579 For the RS/6000, sp points past the fixed area. */
580 #define STACK_POINTER_OFFSET 24
581
582 /* Define this if the maximum size of all the outgoing args is to be
583 accumulated and pushed during the prologue. The amount can be
584 found in the variable current_function_outgoing_args_size. */
585 #define ACCUMULATE_OUTGOING_ARGS
586
587 /* Value is the number of bytes of arguments automatically
588 popped when returning from a subroutine call.
589 FUNTYPE is the data type of the function (as a tree),
590 or for a library call it is an identifier node for the subroutine name.
591 SIZE is the number of bytes of arguments passed on the stack. */
592
593 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
594
595 /* Define how to find the value returned by a function.
596 VALTYPE is the data type of the value (as a tree).
597 If the precise function being called is known, FUNC is its FUNCTION_DECL;
598 otherwise, FUNC is 0.
599
600 On RS/6000 an integer value is in r3 and a floating-point value is in
601 fp1. */
602
603 #define FUNCTION_VALUE(VALTYPE, FUNC) \
604 gen_rtx (REG, TYPE_MODE (VALTYPE), \
605 TREE_CODE (VALTYPE) == REAL_TYPE ? 33 : 3)
606
607 /* Define how to find the value returned by a library function
608 assuming the value has mode MODE. */
609
610 #define LIBCALL_VALUE(MODE) \
611 gen_rtx (REG, MODE, GET_MODE_CLASS (MODE) == MODE_FLOAT ? 33 : 3)
612
613 /* The definition of this macro implies that there are cases where
614 a scalar value cannot be returned in registers.
615
616 For the RS/6000, any structure or union type is returned in memory. */
617
618 #define RETURN_IN_MEMORY(TYPE) \
619 (TREE_CODE (TYPE) == RECORD_TYPE || TREE_CODE (TYPE) == UNION_TYPE)
620
621 /* 1 if N is a possible register number for a function value
622 as seen by the caller.
623
624 On RS/6000, this is r3 and fp1. */
625
626 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 3 || ((N) == 33))
627
628 /* 1 if N is a possible register number for function argument passing.
629 On RS/6000, these are r3-r10 and fp1-fp13. */
630
631 #define FUNCTION_ARG_REGNO_P(N) \
632 (((N) <= 10 && (N) >= 3) || ((N) >= 33 && (N) <= 45))
633 \f
634 /* Define a data type for recording info about an argument list
635 during the scan of that argument list. This data type should
636 hold all necessary information about the function itself
637 and about the args processed so far, enough to enable macros
638 such as FUNCTION_ARG to determine where the next arg should go.
639
640 On the RS/6000, this is a structure. The first element is the number of
641 total argument words, the second is used to store the next
642 floating-point register number, and the third says how many more args we
643 have prototype types for. */
644
645 struct rs6000_args {int words, fregno, nargs_prototype; };
646 #define CUMULATIVE_ARGS struct rs6000_args
647
648 /* Define intermediate macro to compute the size (in registers) of an argument
649 for the RS/6000. */
650
651 #define RS6000_ARG_SIZE(MODE, TYPE, NAMED) \
652 (! (NAMED) ? 0 \
653 : (MODE) != BLKmode \
654 ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
655 : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
656
657 /* Initialize a variable CUM of type CUMULATIVE_ARGS
658 for a call to a function whose data type is FNTYPE.
659 For a library call, FNTYPE is 0. */
660
661 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
662 (CUM).words = 0, \
663 (CUM).fregno = 33, \
664 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
665 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
666 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
667 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
668 : 0)
669
670 /* Similar, but when scanning the definition of a procedure. We always
671 set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */
672
673 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
674 (CUM).words = 0, \
675 (CUM).fregno = 33, \
676 (CUM).nargs_prototype = 1000
677
678 /* Update the data in CUM to advance over an argument
679 of mode MODE and data type TYPE.
680 (TYPE is null for libcalls where that information may not be available.) */
681
682 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
683 { (CUM).nargs_prototype--; \
684 if (NAMED) \
685 { \
686 (CUM).words += RS6000_ARG_SIZE (MODE, TYPE, NAMED); \
687 if (GET_MODE_CLASS (MODE) == MODE_FLOAT) \
688 (CUM).fregno++; \
689 } \
690 }
691
692 /* Non-zero if we can use a floating-point register to pass this arg. */
693 #define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \
694 (GET_MODE_CLASS (MODE) == MODE_FLOAT && (CUM).fregno < 46)
695
696 /* Determine where to put an argument to a function.
697 Value is zero to push the argument on the stack,
698 or a hard register in which to store the argument.
699
700 MODE is the argument's machine mode.
701 TYPE is the data type of the argument (as a tree).
702 This is null for libcalls where that information may
703 not be available.
704 CUM is a variable of type CUMULATIVE_ARGS which gives info about
705 the preceding args and about the function being called.
706 NAMED is nonzero if this argument is a named parameter
707 (otherwise it is an extra parameter matching an ellipsis).
708
709 On RS/6000 the first eight words of non-FP are normally in registers
710 and the rest are pushed. The first 13 FP args are in registers.
711
712 If this is floating-point and no prototype is specified, we use
713 both an FP and integer register (or possibly FP reg and stack). */
714
715 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
716 (! (NAMED) ? 0 \
717 : ((TYPE) != 0 && TREE_CODE (TYPE_CODE (TYPE)) != INTEGER_CST) \
718 : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) \
719 ? ((CUM).nargs_prototype > 0 \
720 ? gen_rtx (REG, MODE, (CUM).fregno) \
721 : ((CUM).words < 8 \
722 ? gen_rtx (EXPR_LIST, VOIDmode, \
723 gen_rtx (REG, (MODE), 3 + (CUM).words), \
724 gen_rtx (REG, (MODE), (CUM).fregno)) \
725 : gen_rtx (EXPR_LIST, VOIDmode, 0, \
726 gen_rtx (REG, (MODE), (CUM).fregno)))) \
727 : (CUM).words < 8 ? gen_rtx(REG, (MODE), 3 + (CUM).words) : 0)
728
729 /* For an arg passed partly in registers and partly in memory,
730 this is the number of registers used.
731 For args passed entirely in registers or entirely in memory, zero. */
732
733 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
734 (! (NAMED) ? 0 \
735 : USE_FP_FOR_ARG_P (CUM, MODE, TYPE) && (CUM).nargs_prototype >= 0 ? 0 \
736 : (((CUM).words < 8 \
737 && 8 < ((CUM).words + RS6000_ARG_SIZE (MODE, TYPE, NAMED))) \
738 ? 8 - (CUM).words : 0))
739
740 /* Perform any needed actions needed for a function that is receiving a
741 variable number of arguments.
742
743 CUM is as above.
744
745 MODE and TYPE are the mode and type of the current parameter.
746
747 PRETEND_SIZE is a variable that should be set to the amount of stack
748 that must be pushed by the prolog to pretend that our caller pushed
749 it.
750
751 Normally, this macro will push all remaining incoming registers on the
752 stack and set PRETEND_SIZE to the length of the registers pushed. */
753
754 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
755 { if ((CUM).words < 8) \
756 { \
757 int first_reg_offset = (CUM).words; \
758 \
759 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
760 first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \
761 \
762 if (first_reg_offset > 8) \
763 first_reg_offset = 8; \
764 \
765 if (! (NO_RTL) && first_reg_offset != 8) \
766 move_block_from_reg \
767 (3 + first_reg_offset, \
768 gen_rtx (MEM, BLKmode, \
769 plus_constant (virtual_incoming_args_rtx, \
770 first_reg_offset * 4)), \
771 8 - first_reg_offset); \
772 PRETEND_SIZE = (8 - first_reg_offset) * UNITS_PER_WORD; \
773 } \
774 }
775
776 /* This macro generates the assembly code for function entry.
777 FILE is a stdio stream to output the code to.
778 SIZE is an int: how many units of temporary storage to allocate.
779 Refer to the array `regs_ever_live' to determine which registers
780 to save; `regs_ever_live[I]' is nonzero if register number I
781 is ever used in the function. This macro is responsible for
782 knowing which registers should not be saved even if used. */
783
784 #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
785
786 /* Output assembler code to FILE to increment profiler label # LABELNO
787 for profiling a function entry. */
788
789 #define FUNCTION_PROFILER(FILE, LABELNO) \
790 output_function_profiler ((FILE), (LABELNO));
791
792 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
793 the stack pointer does not matter. No definition is equivalent to
794 always zero.
795
796 On the RS/6000, this is non-zero because we can restore the stack from
797 its backpointer, which we maintain. */
798 #define EXIT_IGNORE_STACK 1
799
800 /* This macro generates the assembly code for function exit,
801 on machines that need it. If FUNCTION_EPILOGUE is not defined
802 then individual return instructions are generated for each
803 return statement. Args are same as for FUNCTION_PROLOGUE.
804
805 The function epilogue should not depend on the current stack pointer!
806 It should use the frame pointer only. This is mandatory because
807 of alloca; we also take advantage of it to omit stack adjustments
808 before returning. */
809
810 #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
811 \f
812 /* Output assembler code for a block containing the constant parts
813 of a trampoline, leaving space for the variable parts.
814
815 The trampoline should set the static chain pointer to value placed
816 into the trampoline and should branch to the specified routine.
817
818 On the RS/6000, this is not code at all, but merely a data area,
819 since that is the way all functions are called. The first word is
820 the address of the function, the second word is the TOC pointer (r2),
821 and the third word is the static chain value. */
822
823 #define TRAMPOLINE_TEMPLATE(FILE) { fprintf (FILE, "\t.long 0, 0, 0\n"); }
824
825 /* Length in units of the trampoline for entering a nested function. */
826
827 #define TRAMPOLINE_SIZE 12
828
829 /* Emit RTL insns to initialize the variable parts of a trampoline.
830 FNADDR is an RTX for the address of the function's pure code.
831 CXT is an RTX for the static chain value for the function. */
832
833 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
834 { \
835 emit_move_insn (gen_rtx (MEM, SImode, memory_address (SImode, ADDR)), \
836 force_reg (SImode, FNADDR)); \
837 emit_move_insn (gen_rtx (MEM, SImode, \
838 memory_address (SImode, plus_constant (ADDR, 4))), \
839 gen_rtx (REG, SImode, 2)); \
840 emit_move_insn (gen_rtx (MEM, SImode, \
841 memory_address (SImode, plus_constant (ADDR, 8))), \
842 force_reg (SImode, CXT)); \
843 }
844 \f
845 /* Definitions for register eliminations.
846
847 We have two registers that can be eliminated on the RS/6000. First, the
848 frame pointer register can often be eliminated in favor of the stack
849 pointer register. Secondly, the argument pointer register can always be
850 eliminated; it is replaced with either the stack or frame pointer. */
851
852 /* This is an array of structures. Each structure initializes one pair
853 of eliminable registers. The "from" register number is given first,
854 followed by "to". Eliminations of the same "from" register are listed
855 in order of preference. */
856 #define ELIMINABLE_REGS \
857 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
858 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
859 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM} }
860
861 /* Given FROM and TO register numbers, say whether this elimination is allowed.
862 Frame pointer elimination is automatically handled.
863
864 For the RS/6000, if frame pointer elimination is being done, we would like
865 to convert ap into fp, not sp. */
866
867 #define CAN_ELIMINATE(FROM, TO) \
868 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
869 ? ! frame_pointer_needed \
870 : 1)
871
872 /* Define the offset between two registers, one to be eliminated, and the other
873 its replacement, at the start of a routine. */
874 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
875 { \
876 int total_stack_size = (rs6000_sa_size () + get_frame_size () \
877 + current_function_outgoing_args_size); \
878 \
879 total_stack_size = (total_stack_size + 7) & ~7; \
880 \
881 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
882 { \
883 if (rs6000_pushes_stack ()) \
884 (OFFSET) = 0; \
885 else \
886 (OFFSET) = - total_stack_size; \
887 } \
888 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
889 (OFFSET) = total_stack_size; \
890 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
891 { \
892 if (rs6000_pushes_stack ()) \
893 (OFFSET) = total_stack_size; \
894 else \
895 (OFFSET) = 0; \
896 } \
897 else \
898 abort (); \
899 }
900 \f
901 /* Addressing modes, and classification of registers for them. */
902
903 /* #define HAVE_POST_INCREMENT */
904 /* #define HAVE_POST_DECREMENT */
905
906 #define HAVE_PRE_DECREMENT
907 #define HAVE_PRE_INCREMENT
908
909 /* Macros to check register numbers against specific register classes. */
910
911 /* These assume that REGNO is a hard or pseudo reg number.
912 They give nonzero only if REGNO is a hard reg of the suitable class
913 or a pseudo reg currently allocated to a suitable hard reg.
914 Since they use reg_renumber, they are safe only once reg_renumber
915 has been allocated, which happens in local-alloc.c. */
916
917 #define REGNO_OK_FOR_INDEX_P(REGNO) \
918 ((REGNO) < FIRST_PSEUDO_REGISTER \
919 ? (REGNO) <= 31 || (REGNO) == 67 \
920 : (reg_renumber[REGNO] >= 0 \
921 && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67)))
922
923 #define REGNO_OK_FOR_BASE_P(REGNO) \
924 ((REGNO) < FIRST_PSEUDO_REGISTER \
925 ? ((REGNO) > 0 && (REGNO) <= 31) || (REGNO) == 67 \
926 : (reg_renumber[REGNO] > 0 \
927 && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67)))
928 \f
929 /* Maximum number of registers that can appear in a valid memory address. */
930
931 #define MAX_REGS_PER_ADDRESS 2
932
933 /* Recognize any constant value that is a valid address. */
934
935 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
936
937 /* Nonzero if the constant value X is a legitimate general operand.
938 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
939
940 On the RS/6000, all integer constants are acceptable, most won't be valid
941 for particular insns, though. Only easy FP constants are
942 acceptable. */
943
944 #define LEGITIMATE_CONSTANT_P(X) \
945 (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \
946 || easy_fp_constant (X, GET_MODE (X)))
947
948 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
949 and check its validity for a certain class.
950 We have two alternate definitions for each of them.
951 The usual definition accepts all pseudo regs; the other rejects
952 them unless they have been allocated suitable hard regs.
953 The symbol REG_OK_STRICT causes the latter definition to be used.
954
955 Most source files want to accept pseudo regs in the hope that
956 they will get allocated to the class that the insn wants them to be in.
957 Source files for reload pass need to be strict.
958 After reload, it makes no difference, since pseudo regs have
959 been eliminated by then. */
960
961 #ifndef REG_OK_STRICT
962
963 /* Nonzero if X is a hard reg that can be used as an index
964 or if it is a pseudo reg. */
965 #define REG_OK_FOR_INDEX_P(X) \
966 (REGNO (X) <= 31 || REGNO (X) == 67 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
967
968 /* Nonzero if X is a hard reg that can be used as a base reg
969 or if it is a pseudo reg. */
970 #define REG_OK_FOR_BASE_P(X) \
971 (REGNO (X) > 0 && REG_OK_FOR_INDEX_P (X))
972
973 #else
974
975 /* Nonzero if X is a hard reg that can be used as an index. */
976 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
977 /* Nonzero if X is a hard reg that can be used as a base reg. */
978 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
979
980 #endif
981 \f
982 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
983 that is a valid memory address for an instruction.
984 The MODE argument is the machine mode for the MEM expression
985 that wants to use this address.
986
987 On the RS/6000, there are four valid address: a SYMBOL_REF that
988 refers to a constant pool entry of an address (or the sum of it
989 plus a constant), a short (16-bit signed) constant plus a register,
990 the sum of two registers, or a register indirect, possibly with an
991 auto-increment. For DFmode and DImode with an constant plus register,
992 we must ensure that both words are addressable. */
993
994 #define LEGITIMATE_CONSTANT_POOL_BASE_P(X) \
995 (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X) \
996 && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (X)))
997
998 #define LEGITIMATE_CONSTANT_POOL_ADDRESS_P(X) \
999 (LEGITIMATE_CONSTANT_POOL_BASE_P (X) \
1000 || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \
1001 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
1002 && LEGITIMATE_CONSTANT_POOL_BASE_P (XEXP (XEXP (X, 0), 0))))
1003
1004 #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \
1005 (GET_CODE (X) == CONST_INT \
1006 && (unsigned) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000)
1007
1008 #define LEGITIMATE_OFFSET_ADDRESS_P(MODE,X) \
1009 (GET_CODE (X) == PLUS \
1010 && GET_CODE (XEXP (X, 0)) == REG \
1011 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1012 && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \
1013 && (((MODE) != DFmode && (MODE) != DImode) \
1014 || LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4)))
1015
1016 #define LEGITIMATE_INDEXED_ADDRESS_P(X) \
1017 (GET_CODE (X) == PLUS \
1018 && GET_CODE (XEXP (X, 0)) == REG \
1019 && GET_CODE (XEXP (X, 1)) == REG \
1020 && ((REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1021 && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \
1022 || (REG_OK_FOR_BASE_P (XEXP (X, 1)) \
1023 && REG_OK_FOR_INDEX_P (XEXP (X, 0)))))
1024
1025 #define LEGITIMATE_INDIRECT_ADDRESS_P(X) \
1026 (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))
1027
1028 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1029 { if (LEGITIMATE_INDIRECT_ADDRESS_P (X)) \
1030 goto ADDR; \
1031 if (GET_CODE (X) == PRE_INC \
1032 && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \
1033 goto ADDR; \
1034 if (GET_CODE (X) == PRE_DEC \
1035 && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \
1036 goto ADDR; \
1037 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (X)) \
1038 goto ADDR; \
1039 if (LEGITIMATE_OFFSET_ADDRESS_P (MODE, X)) \
1040 goto ADDR; \
1041 if ((MODE) != DImode && (MODE) != TImode \
1042 && LEGITIMATE_INDEXED_ADDRESS_P (X)) \
1043 goto ADDR; \
1044 }
1045 \f
1046 /* Try machine-dependent ways of modifying an illegitimate address
1047 to be legitimate. If we find one, return the new, valid address.
1048 This macro is used in only one place: `memory_address' in explow.c.
1049
1050 OLDX is the address as it was before break_out_memory_refs was called.
1051 In some cases it is useful to look at this to decide what needs to be done.
1052
1053 MODE and WIN are passed so that this macro can use
1054 GO_IF_LEGITIMATE_ADDRESS.
1055
1056 It is always safe for this macro to do nothing. It exists to recognize
1057 opportunities to optimize the output.
1058
1059 On RS/6000, first check for the sum of a register with a constant
1060 integer that is out of range. If so, generate code to add the
1061 constant with the low-order 16 bits masked to the register and force
1062 this result into another register (this can be done with `cau').
1063 Then generate an address of REG+(CONST&0xffff), allowing for the
1064 possibility of bit 16 being a one.
1065
1066 Then check for the sum of a register and something not constant, try to
1067 load the other things into a register and return the sum. */
1068
1069 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1070 { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1071 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1072 && (unsigned) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \
1073 { int high_int, low_int; \
1074 high_int = INTVAL (XEXP (X, 1)) >> 16; \
1075 low_int = INTVAL (XEXP (X, 1)) & 0xffff; \
1076 if (low_int & 0x8000) \
1077 high_int += 1, low_int |= 0xffff0000; \
1078 (X) = gen_rtx (PLUS, SImode, \
1079 force_operand \
1080 (gen_rtx (PLUS, SImode, XEXP (X, 0), \
1081 gen_rtx (CONST_INT, VOIDmode, \
1082 high_int << 16)), 0),\
1083 gen_rtx (CONST_INT, VOIDmode, low_int)); \
1084 goto WIN; \
1085 } \
1086 else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1087 && GET_CODE (XEXP (X, 1)) != CONST_INT) \
1088 { \
1089 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1090 force_reg (SImode, force_operand (XEXP (X, 1), 0))); \
1091 goto WIN; \
1092 } \
1093 }
1094
1095 /* Go to LABEL if ADDR (a legitimate address expression)
1096 has an effect that depends on the machine mode it is used for.
1097
1098 On the RS/6000 this is true if the address is valid with a zero offset
1099 but not with an offset of four (this means it cannot be used as an
1100 address for DImode or DFmode) or is a pre-increment or decrement. Since
1101 we know it is valid, we just check for an address that is not valid with
1102 an offset of four. */
1103
1104 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1105 { if (GET_CODE (ADDR) == PLUS \
1106 && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 0) \
1107 && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 4)) \
1108 goto LABEL; \
1109 if (GET_CODE (ADDR) == PRE_INC) \
1110 goto LABEL; \
1111 if (GET_CODE (ADDR) == PRE_DEC) \
1112 goto LABEL; \
1113 }
1114 \f
1115 /* Define this if some processing needs to be done immediately before
1116 emitting code for an insn. */
1117
1118 /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */
1119
1120 /* Specify the machine mode that this machine uses
1121 for the index in the tablejump instruction. */
1122 #define CASE_VECTOR_MODE SImode
1123
1124 /* Define this if the tablejump instruction expects the table
1125 to contain offsets from the address of the table.
1126 Do not define this if the table should contain absolute addresses. */
1127 #define CASE_VECTOR_PC_RELATIVE
1128
1129 /* Specify the tree operation to be used to convert reals to integers. */
1130 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1131
1132 /* This is the kind of divide that is easiest to do in the general case. */
1133 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1134
1135 /* Define this as 1 if `char' should by default be signed; else as 0. */
1136 #define DEFAULT_SIGNED_CHAR 0
1137
1138 /* This flag, if defined, says the same insns that convert to a signed fixnum
1139 also convert validly to an unsigned one. */
1140
1141 /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */
1142
1143 /* Max number of bytes we can move from memory to memory
1144 in one reasonably fast instruction. */
1145 #define MOVE_MAX 16
1146
1147 /* Nonzero if access to memory by bytes is no faster than for words.
1148 Also non-zero if doing byte operations (specifically shifts) in registers
1149 is undesirable. */
1150 #define SLOW_BYTE_ACCESS 1
1151
1152 /* Define if normal loads of shorter-than-word items from memory clears
1153 the rest of the bigs in the register. */
1154 #define BYTE_LOADS_ZERO_EXTEND
1155 \f
1156 /* The RS/6000 uses the XCOFF format. */
1157
1158 #define XCOFF_DEBUGGING_INFO
1159
1160 /* Define if the object format being used is COFF or a superset. */
1161 #define OBJECT_FORMAT_COFF
1162
1163 /* We don't have GAS for the RS/6000 yet, so don't write out special
1164 .stabs in cc1plus. */
1165
1166 #define FASCIST_ASSEMBLER
1167
1168 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1169 is done just by pretending it is already truncated. */
1170 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1171
1172 /* Specify the machine mode that pointers have.
1173 After generation of rtl, the compiler makes no further distinction
1174 between pointers and any other objects of this machine mode. */
1175 #define Pmode SImode
1176
1177 /* Mode of a function address in a call instruction (for indexing purposes).
1178
1179 Doesn't matter on RS/6000. */
1180 #define FUNCTION_MODE SImode
1181
1182 /* Define this if addresses of constant functions
1183 shouldn't be put through pseudo regs where they can be cse'd.
1184 Desirable on machines where ordinary constants are expensive
1185 but a CALL with constant address is cheap. */
1186 #define NO_FUNCTION_CSE
1187
1188 /* Define this if shift instructions ignore all but the low-order
1189 few bits. */
1190 #define SHIFT_COUNT_TRUNCATED
1191
1192 /* Use atexit for static constructors/destructors, instead of defining
1193 our own exit function. */
1194 #define HAVE_ATEXIT
1195
1196 /* Compute the cost of computing a constant rtl expression RTX
1197 whose rtx-code is CODE. The body of this macro is a portion
1198 of a switch statement. If the code is computed here,
1199 return it with a return statement. Otherwise, break from the switch.
1200
1201 On the RS/6000, if it is legal in the insn, it is free. So this
1202 always returns 0. */
1203
1204 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1205 case CONST_INT: \
1206 case CONST: \
1207 case LABEL_REF: \
1208 case SYMBOL_REF: \
1209 case CONST_DOUBLE: \
1210 return 0;
1211
1212 /* Provide the costs of a rtl expression. This is in the body of a
1213 switch on CODE. */
1214
1215 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1216 case MULT: \
1217 return (GET_CODE (XEXP (X, 1)) != CONST_INT \
1218 ? COSTS_N_INSNS (5) \
1219 : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \
1220 ? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \
1221 case DIV: \
1222 case MOD: \
1223 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1224 && exact_log2 (INTVAL (XEXP (X, 1))) >= 0) \
1225 return COSTS_N_INSNS (2); \
1226 /* otherwise fall through to normal divide. */ \
1227 case UDIV: \
1228 case UMOD: \
1229 return COSTS_N_INSNS (19); \
1230 case MEM: \
1231 /* MEM should be slightly more expensive than (plus (reg) (const)) */ \
1232 return 5;
1233
1234 /* Compute the cost of an address. This is meant to approximate the size
1235 and/or execution delay of an insn using that address. If the cost is
1236 approximated by the RTL complexity, including CONST_COSTS above, as
1237 is usually the case for CISC machines, this macro should not be defined.
1238 For aggressively RISCy machines, only one insn format is allowed, so
1239 this macro should be a constant. The value of this macro only matters
1240 for valid addresses.
1241
1242 For the RS/6000, everything is cost 0. */
1243
1244 #define ADDRESS_COST(RTX) 0
1245
1246 /* Adjust the length of an INSN. LENGTH is the currently-computed length and
1247 should be adjusted to reflect any required changes. This macro is used when
1248 there is some systematic length adjustment required that would be difficult
1249 to express in the length attribute. */
1250
1251 /* #define ADJUST_INSN_LENGTH(X,LENGTH) */
1252
1253 /* Add any extra modes needed to represent the condition code.
1254
1255 For the RS/6000, we need separate modes when unsigned (logical) comparisons
1256 are being done and we need a separate mode for floating-point. We also
1257 use a mode for the case when we are comparing the results of two
1258 comparisons. */
1259
1260 #define EXTRA_CC_MODES CCUNSmode, CCFPmode, CCEQmode
1261
1262 /* Define the names for the modes specified above. */
1263 #define EXTRA_CC_NAMES "CCUNS", "CCFP", "CCEQ"
1264
1265 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1266 return the mode to be used for the comparison. For floating-point, CCFPmode
1267 should be used. CCUNSmode should be used for unsigned comparisons.
1268 CCEQmode should be used when we are doing an inequality comparison on
1269 the result of a comparison. CCmode should be used in all other cases. */
1270
1271 #define SELECT_CC_MODE(OP,X) \
1272 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \
1273 : (OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU ? CCUNSmode \
1274 : (((OP) == EQ || (OP) == NE) && GET_RTX_CLASS (GET_CODE (X)) == '<' \
1275 ? CCEQmode : CCmode))
1276
1277 /* Define the information needed to generate branch and scc insns. This is
1278 stored from the compare operation. Note that we can't use "rtx" here
1279 since it hasn't been defined! */
1280
1281 extern struct rtx_def *rs6000_compare_op0, *rs6000_compare_op1;
1282 extern int rs6000_compare_fp_p;
1283
1284 /* Set to non-zero by "fix" operation to indicate that itrunc and
1285 uitrunc must be defined. */
1286
1287 extern int rs6000_trunc_used;
1288 \f
1289 /* Control the assembler format that we output. */
1290
1291 /* Output at beginning of assembler file.
1292
1293 On the RS/6000, we want to go into the TOC section so at least one
1294 .toc will be emitted.
1295
1296 Also initialize the section names for the RS/6000 at this point.
1297
1298 Also, in order to output proper .bs/.es pairs, we need at least one static
1299 [RW] section emitted. */
1300
1301 #define ASM_FILE_START(FILE) \
1302 { \
1303 rs6000_gen_section_name (&xcoff_bss_section_name, \
1304 main_input_filename, ".bss_"); \
1305 rs6000_gen_section_name (&xcoff_private_data_section_name, \
1306 main_input_filename, ".rw_"); \
1307 rs6000_gen_section_name (&xcoff_read_only_section_name, \
1308 main_input_filename, ".ro_"); \
1309 \
1310 toc_section (); \
1311 if (write_symbols != NO_DEBUG) \
1312 private_data_section (); \
1313 }
1314
1315 /* Output at end of assembler file.
1316
1317 On the RS/6000, referencing data should automatically pull in text. */
1318
1319 #define ASM_FILE_END(FILE) \
1320 { \
1321 text_section (); \
1322 fprintf (FILE, "_section_.text:\n"); \
1323 data_section (); \
1324 fprintf (FILE, "\t.long _section_.text\n"); \
1325 }
1326
1327 /* We define this to prevent the name mangler from putting dollar signs into
1328 function names. */
1329
1330 #define NO_DOLLAR_IN_LABEL
1331
1332 /* We define this to 0 so that gcc will never accept a dollar sign in a
1333 variable name. This is needed because the AIX assembler will not accept
1334 dollar signs. */
1335
1336 #define DOLLARS_IN_IDENTIFIERS 0
1337
1338 /* Implicit library calls should use memcpy, not bcopy, etc. */
1339
1340 #define TARGET_MEM_FUNCTIONS
1341
1342 /* Define the extra sections we need. We define three: one is the read-only
1343 data section which is used for constants. This is a csect whose name is
1344 derived from the name of the input file. The second is for initialized
1345 global variables. This is a csect whose name is that of the variable.
1346 The third is the TOC. */
1347
1348 #define EXTRA_SECTIONS \
1349 read_only_data, private_data, read_only_private_data, toc, bss
1350
1351 /* Define the name of our readonly data section. */
1352
1353 #define READONLY_DATA_SECTION read_only_data_section
1354
1355 /* Indicate that jump tables go in the text section. */
1356
1357 #define JUMP_TABLES_IN_TEXT_SECTION
1358
1359 /* Define the routines to implement these extra sections. */
1360
1361 #define EXTRA_SECTION_FUNCTIONS \
1362 \
1363 void \
1364 read_only_data_section () \
1365 { \
1366 if (in_section != read_only_data) \
1367 { \
1368 fprintf (asm_out_file, "\t.csect %s[RO]\n", \
1369 xcoff_read_only_section_name); \
1370 in_section = read_only_data; \
1371 } \
1372 } \
1373 \
1374 void \
1375 private_data_section () \
1376 { \
1377 if (in_section != private_data) \
1378 { \
1379 fprintf (asm_out_file, "\t.csect %s[RW]\n", \
1380 xcoff_private_data_section_name); \
1381 \
1382 in_section = private_data; \
1383 } \
1384 } \
1385 \
1386 void \
1387 read_only_private_data_section () \
1388 { \
1389 if (in_section != read_only_private_data) \
1390 { \
1391 fprintf (asm_out_file, "\t.csect %s[RO]\n", \
1392 xcoff_private_data_section_name); \
1393 in_section = read_only_private_data; \
1394 } \
1395 } \
1396 \
1397 void \
1398 toc_section () \
1399 { \
1400 if (in_section != toc) \
1401 fprintf (asm_out_file, "\t.toc\n"); \
1402 \
1403 in_section = toc; \
1404 }
1405
1406 /* This macro produces the initial definition of a function name.
1407 On the RS/6000, we need to place an extra '.' in the function name and
1408 output the function descriptor.
1409
1410 The csect for the function will have already been created by the
1411 `text_section' call previously done. We do have to go back to that
1412 csect, however. */
1413
1414 /* ??? What do the 16 and 044 in the .function line really mean? */
1415
1416 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
1417 { if (TREE_PUBLIC (DECL)) \
1418 { \
1419 fprintf (FILE, "\t.globl ."); \
1420 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1421 fprintf (FILE, "\n"); \
1422 } \
1423 else if (write_symbols == XCOFF_DEBUG) \
1424 { \
1425 fprintf (FILE, "\t.lglobl ."); \
1426 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1427 fprintf (FILE, "\n"); \
1428 } \
1429 fprintf (FILE, "\t.csect "); \
1430 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1431 fprintf (FILE, "[DS]\n"); \
1432 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1433 fprintf (FILE, ":\n"); \
1434 fprintf (FILE, "\t.long ."); \
1435 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1436 fprintf (FILE, ", TOC[tc0], 0\n"); \
1437 fprintf (FILE, "\t.csect [PR]\n."); \
1438 RS6000_OUTPUT_BASENAME (FILE, NAME); \
1439 fprintf (FILE, ":\n"); \
1440 if (write_symbols == XCOFF_DEBUG) \
1441 xcoffout_declare_function (FILE, DECL, NAME); \
1442 }
1443
1444 /* Return non-zero if this entry is to be written into the constant pool
1445 in a special way. We do so if this is a SYMBOL_REF, LABEL_REF or a CONST
1446 containing one of them. If -mfp-in-toc (the default), we also do
1447 this for floating-point constants. We actually can only do this
1448 if the FP formats of the target and host machines are the same, but
1449 we can't check that since not every file that uses
1450 GO_IF_LEGITIMATE_ADDRESS_P includes real.h. */
1451
1452 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY_P(X) \
1453 (GET_CODE (X) == SYMBOL_REF \
1454 || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \
1455 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF) \
1456 || GET_CODE (X) == LABEL_REF \
1457 || (TARGET_FP_IN_TOC && GET_CODE (X) == CONST_DOUBLE \
1458 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1459 && BITS_PER_WORD == HOST_BITS_PER_INT))
1460
1461 /* Select section for constant in constant pool.
1462
1463 On RS/6000, all constants are in the private read-only data area.
1464 However, if this is being placed in the TOC it must be output as a
1465 toc entry. */
1466
1467 #define SELECT_RTX_SECTION(MODE, X) \
1468 { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \
1469 toc_section (); \
1470 else \
1471 read_only_private_data_section (); \
1472 }
1473
1474 /* Macro to output a special constant pool entry. Go to WIN if we output
1475 it. Otherwise, it is written the usual way.
1476
1477 On the RS/6000, toc entries are handled this way. */
1478
1479 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, X, MODE, ALIGN, LABELNO, WIN) \
1480 { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \
1481 { \
1482 output_toc (FILE, X, LABELNO); \
1483 goto WIN; \
1484 } \
1485 }
1486
1487 /* Select the section for an initialized data object.
1488
1489 On the RS/6000, we have a special section for all variables except those
1490 that are static. */
1491
1492 #define SELECT_SECTION(EXP,RELOC) \
1493 { \
1494 if ((TREE_READONLY (EXP) \
1495 || (TREE_CODE (EXP) == STRING_CST \
1496 && !flag_writable_strings)) \
1497 && ! TREE_THIS_VOLATILE (EXP) \
1498 && ! (RELOC)) \
1499 { \
1500 if (TREE_PUBLIC (EXP)) \
1501 read_only_data_section (); \
1502 else \
1503 read_only_private_data_section (); \
1504 } \
1505 else \
1506 { \
1507 if (TREE_PUBLIC (EXP)) \
1508 data_section (); \
1509 else \
1510 private_data_section (); \
1511 } \
1512 }
1513
1514 /* This outputs NAME to FILE up to the first null or '['. */
1515
1516 #define RS6000_OUTPUT_BASENAME(FILE, NAME) \
1517 if ((NAME)[0] == '*') \
1518 assemble_name (FILE, NAME); \
1519 else \
1520 { \
1521 char *_p; \
1522 for (_p = (NAME); *_p && *_p != '['; _p++) \
1523 fputc (*_p, FILE); \
1524 }
1525
1526 /* Output something to declare an external symbol to the assembler. Most
1527 assemblers don't need this.
1528
1529 If we haven't already, add "[RW]" (or "[DS]" for a function) to the
1530 name. Normally we write this out along with the name. In the few cases
1531 where we can't, it gets stripped off. */
1532
1533 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1534 { rtx _symref = XEXP (DECL_RTL (DECL), 0); \
1535 if ((TREE_CODE (DECL) == VAR_DECL \
1536 || TREE_CODE (DECL) == FUNCTION_DECL) \
1537 && (NAME)[0] != '*' \
1538 && (NAME)[strlen (NAME) - 1] != ']') \
1539 { \
1540 char *_name = (char *) permalloc (strlen (XSTR (_symref, 0)) + 5); \
1541 strcpy (_name, XSTR (_symref, 0)); \
1542 strcat (_name, TREE_CODE (DECL) == FUNCTION_DECL ? "[DS]" : "[RW]"); \
1543 XSTR (_symref, 0) = _name; \
1544 } \
1545 fprintf (FILE, "\t.extern "); \
1546 assemble_name (FILE, XSTR (_symref, 0)); \
1547 if (TREE_CODE (DECL) == FUNCTION_DECL) \
1548 { \
1549 fprintf (FILE, "\n\t.extern ."); \
1550 RS6000_OUTPUT_BASENAME (FILE, XSTR (_symref, 0)); \
1551 } \
1552 fprintf (FILE, "\n"); \
1553 }
1554
1555 /* Similar, but for libcall. We only have to worry about the function name,
1556 not that of the descriptor. */
1557
1558 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \
1559 { fprintf (FILE, "\t.extern ."); \
1560 assemble_name (FILE, XSTR (FUN, 0)); \
1561 fprintf (FILE, "\n"); \
1562 }
1563
1564 /* Output to assembler file text saying following lines
1565 may contain character constants, extra white space, comments, etc. */
1566
1567 #define ASM_APP_ON ""
1568
1569 /* Output to assembler file text saying following lines
1570 no longer contain unusual constructs. */
1571
1572 #define ASM_APP_OFF ""
1573
1574 /* Output before instructions. */
1575
1576 #define TEXT_SECTION_ASM_OP ".csect [PR]"
1577
1578 /* Output before writable data. */
1579
1580 #define DATA_SECTION_ASM_OP ".csect .data[RW]"
1581
1582 /* How to refer to registers in assembler output.
1583 This sequence is indexed by compiler's hard-register-number (see above). */
1584
1585 #define REGISTER_NAMES \
1586 {"0", "1", "2", "3", "4", "5", "6", "7", \
1587 "8", "9", "10", "11", "12", "13", "14", "15", \
1588 "16", "17", "18", "19", "20", "21", "22", "23", \
1589 "24", "25", "26", "27", "28", "29", "30", "31", \
1590 "0", "1", "2", "3", "4", "5", "6", "7", \
1591 "8", "9", "10", "11", "12", "13", "14", "15", \
1592 "16", "17", "18", "19", "20", "21", "22", "23", \
1593 "24", "25", "26", "27", "28", "29", "30", "31", \
1594 "mq", "lr", "ctr", "ap", \
1595 "0", "1", "2", "3", "4", "5", "6", "7" }
1596
1597 /* Table of additional register names to use in user input. */
1598
1599 #define ADDITIONAL_REGISTER_NAMES \
1600 {"r0", 0, "r1", 1, "r2", 2, "r3", 3, \
1601 "r4", 4, "r5", 5, "r6", 6, "r7", 7, \
1602 "r8", 8, "r9", 9, "r10", 10, "r11", 11, \
1603 "r12", 12, "r13", 13, "r14", 14, "r15", 15, \
1604 "r16", 16, "r17", 17, "r18", 18, "r19", 19, \
1605 "r20", 20, "r21", 21, "r22", 22, "r23", 23, \
1606 "r24", 24, "r25", 25, "r26", 26, "r27", 27, \
1607 "r28", 28, "r29", 29, "r30", 30, "r31", 31, \
1608 "fr0", 32, "fr1", 33, "fr2", 34, "fr3", 35, \
1609 "fr4", 36, "fr5", 37, "fr6", 38, "fr7", 39, \
1610 "fr8", 40, "fr9", 41, "fr10", 42, "fr11", 43, \
1611 "fr12", 44, "fr13", 45, "fr14", 46, "fr15", 47, \
1612 "fr16", 48, "fr17", 49, "fr18", 50, "fr19", 51, \
1613 "fr20", 52, "fr21", 53, "fr22", 54, "fr23", 55, \
1614 "fr24", 56, "fr25", 57, "fr26", 58, "fr27", 59, \
1615 "fr28", 60, "fr29", 61, "fr30", 62, "fr31", 63, \
1616 /* no additional names for: mq, lr, ctr, ap */ \
1617 "cr0", 68, "cr1", 69, "cr2", 70, "cr3", 71, \
1618 "cr4", 72, "cr5", 73, "cr6", 74, "cr7", 75, \
1619 "cc", 68 }
1620
1621 /* How to renumber registers for dbx and gdb. */
1622
1623 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1624
1625 /* This is how to output the definition of a user-level label named NAME,
1626 such as the label on a static function or variable NAME. */
1627
1628 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1629 do { RS6000_OUTPUT_BASENAME (FILE, NAME); fputs (":\n", FILE); } while (0)
1630
1631 /* This is how to output a command to make the user-level label named NAME
1632 defined for reference from other files. */
1633
1634 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1635 do { fputs ("\t.globl ", FILE); \
1636 RS6000_OUTPUT_BASENAME (FILE, NAME); fputs ("\n", FILE);} while (0)
1637
1638 /* This is how to output a reference to a user-level label named NAME.
1639 `assemble_name' uses this. */
1640
1641 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1642 fprintf (FILE, NAME)
1643
1644 /* This is how to output an internal numbered label where
1645 PREFIX is the class of label and NUM is the number within the class. */
1646
1647 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1648 fprintf (FILE, "%s..%d:\n", PREFIX, NUM)
1649
1650 /* This is how to output a label for a jump table. Arguments are the same as
1651 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1652 passed. */
1653
1654 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1655 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1656
1657 /* This is how to store into the string LABEL
1658 the symbol_ref name of an internal numbered label where
1659 PREFIX is the class of label and NUM is the number within the class.
1660 This is suitable for output with `assemble_name'. */
1661
1662 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1663 sprintf (LABEL, "%s..%d", PREFIX, NUM)
1664
1665 /* This is how to output an assembler line defining a `double' constant. */
1666
1667 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1668 fprintf (FILE, "\t.double 0d%.20e\n", (VALUE))
1669
1670 /* This is how to output an assembler line defining a `float' constant. */
1671
1672 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1673 fprintf (FILE, "\t.float 0d%.20e\n", (VALUE))
1674
1675 /* This is how to output an assembler line defining an `int' constant. */
1676
1677 #define ASM_OUTPUT_INT(FILE,VALUE) \
1678 ( fprintf (FILE, "\t.long "), \
1679 output_addr_const (FILE, (VALUE)), \
1680 fprintf (FILE, "\n"))
1681
1682 /* Likewise for `char' and `short' constants. */
1683
1684 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1685 ( fprintf (FILE, "\t.short "), \
1686 output_addr_const (FILE, (VALUE)), \
1687 fprintf (FILE, "\n"))
1688
1689 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1690 ( fprintf (FILE, "\t.byte "), \
1691 output_addr_const (FILE, (VALUE)), \
1692 fprintf (FILE, "\n"))
1693
1694 /* This is how to output an assembler line for a numeric constant byte. */
1695
1696 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1697 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1698
1699 /* This is how to output an assembler line to define N characters starting
1700 at P to FILE. */
1701
1702 #define ASM_OUTPUT_ASCII(FILE, P, N) output_ascii ((FILE), (P), (N))
1703
1704 /* This is how to output code to push a register on the stack.
1705 It need not be very fast code. */
1706
1707 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1708 fprintf (FILE, "\tstu %s,-4(r1)\n", reg_names[REGNO]);
1709
1710 /* This is how to output an insn to pop a register from the stack.
1711 It need not be very fast code. */
1712
1713 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1714 fprintf (FILE, "\tl %s,0(r1)\n\tai r1,r1,4\n", reg_names[REGNO])
1715
1716 /* This is how to output an element of a case-vector that is absolute.
1717 (RS/6000 does not use such vectors, but we must define this macro
1718 anyway.) */
1719
1720 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1721 fprintf (FILE, "\t.long L..%d\n", VALUE)
1722
1723 /* This is how to output an element of a case-vector that is relative. */
1724
1725 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1726 fprintf (FILE, "\t.long L..%d-L..%d\n", VALUE, REL)
1727
1728 /* This is how to output an assembler line
1729 that says to advance the location counter
1730 to a multiple of 2**LOG bytes. */
1731
1732 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1733 if ((LOG) != 0) \
1734 fprintf (FILE, "\t.align %d\n", (LOG))
1735
1736 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1737 fprintf (FILE, "\t.space %d\n", (SIZE))
1738
1739 /* This says how to output an assembler line
1740 to define a global common symbol. */
1741
1742 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1743 do { fputs (".comm ", (FILE)); \
1744 RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \
1745 fprintf ((FILE), ",%d\n", (SIZE)); } while (0)
1746
1747 /* This says how to output an assembler line
1748 to define a local common symbol. */
1749
1750 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1751 do { fputs (".lcomm ", (FILE)); \
1752 RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \
1753 fprintf ((FILE), ",%d,%s\n", (SIZE), xcoff_bss_section_name); \
1754 } while (0)
1755
1756 /* Store in OUTPUT a string (made with alloca) containing
1757 an assembler-name for a local static variable named NAME.
1758 LABELNO is an integer which is different for each call. */
1759
1760 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1761 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1762 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1763
1764 /* Define the parentheses used to group arithmetic operations
1765 in assembler code. */
1766
1767 #define ASM_OPEN_PAREN "("
1768 #define ASM_CLOSE_PAREN ")"
1769
1770 /* Define results of standard character escape sequences. */
1771 #define TARGET_BELL 007
1772 #define TARGET_BS 010
1773 #define TARGET_TAB 011
1774 #define TARGET_NEWLINE 012
1775 #define TARGET_VT 013
1776 #define TARGET_FF 014
1777 #define TARGET_CR 015
1778
1779 /* Print operand X (an rtx) in assembler syntax to file FILE.
1780 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1781 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1782
1783 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1784
1785 /* Define which CODE values are valid. */
1786
1787 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0
1788
1789 /* Print a memory address as an operand to reference that memory location. */
1790
1791 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1792
1793 /* Define the codes that are matched by predicates in rs6000.c. */
1794
1795 #define PREDICATE_CODES \
1796 {"short_cint_operand", {CONST_INT}}, \
1797 {"u_short_cint_operand", {CONST_INT}}, \
1798 {"non_short_cint_operand", {CONST_INT}}, \
1799 {"gpc_reg_operand", {SUBREG, REG}}, \
1800 {"cc_reg_operand", {SUBREG, REG}}, \
1801 {"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, \
1802 {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \
1803 {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \
1804 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1805 {"easy_fp_constant", {CONST_DOUBLE}}, \
1806 {"reg_or_mem_operand", {SUBREG, MEM, REG}}, \
1807 {"fp_reg_or_mem_operand", {SUBREG, MEM, REG}}, \
1808 {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \
1809 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1810 {"non_add_cint_operand", {CONST_INT}}, \
1811 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1812 {"non_and_cint_operand", {CONST_INT}}, \
1813 {"logical_operand", {SUBREG, REG, CONST_INT}}, \
1814 {"non_logical_cint_operand", {CONST_INT}}, \
1815 {"mask_operand", {CONST_INT}}, \
1816 {"call_operand", {SYMBOL_REF, REG}}, \
1817 {"input_operand", {SUBREG, MEM, REG, CONST_INT}}, \
1818 {"branch_comparison_operation", {EQ, NE, LE, LT, GE, \
1819 LT, LEU, LTU, GEU, GTU}}, \
1820 {"scc_comparison_operation", {EQ, NE, LE, LT, GE, \
1821 LT, LEU, LTU, GEU, GTU}},
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