1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
26 #include "hard-reg-set.h"
28 #include "insn-config.h"
29 #include "conditions.h"
30 #include "insn-flags.h"
32 #include "insn-attr.h"
41 #ifndef TARGET_NO_PROTOTYPE
42 #define TARGET_NO_PROTOTYPE 0
45 extern char *language_string
;
46 extern int profile_block_flag
;
48 #define min(A,B) ((A) < (B) ? (A) : (B))
49 #define max(A,B) ((A) > (B) ? (A) : (B))
53 enum processor_type rs6000_cpu
;
54 struct rs6000_cpu_select rs6000_select
[3] =
56 /* switch name, tune arch */
57 { (char *)0, "--with-cpu=", 1, 1 },
58 { (char *)0, "-mcpu=", 1, 1 },
59 { (char *)0, "-mtune=", 1, 0 },
62 /* Set to non-zero by "fix" operation to indicate that itrunc and
63 uitrunc must be defined. */
65 int rs6000_trunc_used
;
67 /* Set to non-zero once they have been defined. */
69 static int trunc_defined
;
71 /* Set to non-zero once AIX common-mode calls have been defined. */
72 static int common_mode_defined
;
74 /* Save information from a "cmpxx" operation until the branch or scc is
76 rtx rs6000_compare_op0
, rs6000_compare_op1
;
77 int rs6000_compare_fp_p
;
80 /* Label number of label created for -mrelocatable, to call to so we can
81 get the address of the GOT section */
82 int rs6000_pic_labelno
;
83 int rs6000_pic_func_labelno
;
85 /* Which abi to adhere to */
86 char *rs6000_abi_name
= RS6000_ABI_NAME
;
88 /* Semantics of the small data area */
89 enum rs6000_sdata_type rs6000_sdata
= SDATA_DATA
;
91 /* Which small data model to use */
92 char *rs6000_sdata_name
= (char *)0;
95 /* Whether a System V.4 varargs area was created. */
96 int rs6000_sysv_varargs_p
;
98 /* ABI enumeration available for subtarget to use. */
99 enum rs6000_abi rs6000_current_abi
;
101 /* Offset & size for fpmem stack locations used for converting between
102 float and integral types. */
103 int rs6000_fpmem_offset
;
104 int rs6000_fpmem_size
;
107 char *rs6000_debug_name
;
108 int rs6000_debug_stack
; /* debug stack applications */
109 int rs6000_debug_arg
; /* debug argument handling */
111 /* Flag to say the TOC is initialized */
115 /* Default register names. */
116 char rs6000_reg_names
[][8] =
118 "0", "1", "2", "3", "4", "5", "6", "7",
119 "8", "9", "10", "11", "12", "13", "14", "15",
120 "16", "17", "18", "19", "20", "21", "22", "23",
121 "24", "25", "26", "27", "28", "29", "30", "31",
122 "0", "1", "2", "3", "4", "5", "6", "7",
123 "8", "9", "10", "11", "12", "13", "14", "15",
124 "16", "17", "18", "19", "20", "21", "22", "23",
125 "24", "25", "26", "27", "28", "29", "30", "31",
126 "mq", "lr", "ctr","ap",
127 "0", "1", "2", "3", "4", "5", "6", "7",
131 #ifdef TARGET_REGNAMES
132 static char alt_reg_names
[][8] =
134 "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
135 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",
136 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23",
137 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31",
138 "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7",
139 "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15",
140 "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23",
141 "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31",
142 "mq", "lr", "ctr", "ap",
143 "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
148 #ifndef MASK_STRICT_ALIGN
149 #define MASK_STRICT_ALIGN 0
152 /* Override command line options. Mostly we process the processor
153 type and sometimes adjust other TARGET_ options. */
156 rs6000_override_options (default_cpu
)
160 struct rs6000_cpu_select
*ptr
;
162 /* Simplify the entries below by making a mask for any POWER
163 variant and any PowerPC variant. */
165 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
166 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
167 | MASK_PPC_GFXOPT | MASK_POWERPC64)
168 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
172 char *name
; /* Canonical processor name. */
173 enum processor_type processor
; /* Processor type enum value. */
174 int target_enable
; /* Target flags to enable. */
175 int target_disable
; /* Target flags to disable. */
176 } processor_target_table
[]
177 = {{"common", PROCESSOR_COMMON
, MASK_NEW_MNEMONICS
,
178 POWER_MASKS
| POWERPC_MASKS
},
179 {"power", PROCESSOR_POWER
,
180 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
181 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
182 {"power2", PROCESSOR_POWER
,
183 MASK_POWER
| MASK_POWER2
| MASK_MULTIPLE
| MASK_STRING
,
184 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
185 {"powerpc", PROCESSOR_POWERPC
,
186 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
187 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
188 {"rios", PROCESSOR_RIOS1
,
189 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
190 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
191 {"rios1", PROCESSOR_RIOS1
,
192 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
193 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
194 {"rsc", PROCESSOR_PPC601
,
195 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
196 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
197 {"rsc1", PROCESSOR_PPC601
,
198 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
199 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
200 {"rios2", PROCESSOR_RIOS2
,
201 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
| MASK_POWER2
,
202 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
203 {"403", PROCESSOR_PPC403
,
204 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
| MASK_STRICT_ALIGN
,
205 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
206 {"505", PROCESSOR_MPCCORE
,
207 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
208 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
209 {"601", PROCESSOR_PPC601
,
210 MASK_POWER
| MASK_POWERPC
| MASK_NEW_MNEMONICS
| MASK_MULTIPLE
| MASK_STRING
,
211 MASK_POWER2
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
212 {"602", PROCESSOR_PPC603
,
213 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
214 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
215 {"603", PROCESSOR_PPC603
,
216 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
217 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
218 {"603e", PROCESSOR_PPC603
,
219 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
220 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
221 {"604", PROCESSOR_PPC604
,
222 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
223 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
224 {"604e", PROCESSOR_PPC604
,
225 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
226 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
227 {"620", PROCESSOR_PPC620
,
228 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
229 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
230 {"801", PROCESSOR_MPCCORE
,
231 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
232 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
233 {"821", PROCESSOR_MPCCORE
,
234 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
235 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
236 {"823", PROCESSOR_MPCCORE
,
237 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
238 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
239 {"860", PROCESSOR_MPCCORE
,
240 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
241 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
}};
243 size_t ptt_size
= sizeof (processor_target_table
) / sizeof (struct ptt
);
245 int multiple
= TARGET_MULTIPLE
; /* save current -mmultiple/-mno-multiple status */
246 int string
= TARGET_STRING
; /* save current -mstring/-mno-string status */
248 profile_block_flag
= 0;
250 /* Identify the processor type */
251 rs6000_select
[0].string
= default_cpu
;
252 rs6000_cpu
= PROCESSOR_DEFAULT
;
254 for (i
= 0; i
< sizeof (rs6000_select
) / sizeof (rs6000_select
[0]); i
++)
256 ptr
= &rs6000_select
[i
];
257 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
259 for (j
= 0; j
< ptt_size
; j
++)
260 if (! strcmp (ptr
->string
, processor_target_table
[j
].name
))
263 rs6000_cpu
= processor_target_table
[j
].processor
;
267 target_flags
|= processor_target_table
[j
].target_enable
;
268 target_flags
&= ~processor_target_table
[j
].target_disable
;
274 error ("bad value (%s) for %s switch", ptr
->string
, ptr
->name
);
278 /* If -mmultiple or -mno-multiple was explicitly used, don't
279 override with the processor default */
280 if (TARGET_MULTIPLE_SET
)
281 target_flags
= (target_flags
& ~MASK_MULTIPLE
) | multiple
;
283 /* If -mstring or -mno-string was explicitly used, don't
284 override with the processor default */
285 if (TARGET_STRING_SET
)
286 target_flags
= (target_flags
& ~MASK_STRING
) | string
;
288 /* Don't allow -mmultiple or -mstring on little endian systems, because the
289 hardware doesn't support the instructions used in little endian mode */
290 if (!BYTES_BIG_ENDIAN
)
294 target_flags
&= ~MASK_MULTIPLE
;
295 if (TARGET_MULTIPLE_SET
)
296 warning ("-mmultiple is not supported on little endian systems");
301 target_flags
&= ~MASK_STRING
;
302 if (TARGET_STRING_SET
)
303 warning ("-mstring is not supported on little endian systems");
307 /* Set debug flags */
308 if (rs6000_debug_name
)
310 if (!strcmp (rs6000_debug_name
, "all"))
311 rs6000_debug_stack
= rs6000_debug_arg
= 1;
312 else if (!strcmp (rs6000_debug_name
, "stack"))
313 rs6000_debug_stack
= 1;
314 else if (!strcmp (rs6000_debug_name
, "arg"))
315 rs6000_debug_arg
= 1;
317 error ("Unknown -mdebug-%s switch", rs6000_debug_name
);
320 #ifdef TARGET_REGNAMES
321 /* If the user desires alternate register names, copy in the alternate names
324 bcopy ((char *)alt_reg_names
, (char *)rs6000_reg_names
, sizeof (rs6000_reg_names
));
327 #ifdef SUBTARGET_OVERRIDE_OPTIONS
328 SUBTARGET_OVERRIDE_OPTIONS
;
332 /* Do anything needed at the start of the asm file. */
335 rs6000_file_start (file
, default_cpu
)
341 char *start
= buffer
;
342 struct rs6000_cpu_select
*ptr
;
344 if (flag_verbose_asm
)
346 sprintf (buffer
, "\n%s rs6000/powerpc options:", ASM_COMMENT_START
);
347 rs6000_select
[0].string
= default_cpu
;
349 for (i
= 0; i
< sizeof (rs6000_select
) / sizeof (rs6000_select
[0]); i
++)
351 ptr
= &rs6000_select
[i
];
352 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
354 fprintf (file
, "%s %s%s", start
, ptr
->name
, ptr
->string
);
360 switch (rs6000_sdata
)
362 case SDATA_NONE
: fprintf (file
, "%s -msdata=none", start
); start
= ""; break;
363 case SDATA_DATA
: fprintf (file
, "%s -msdata=data", start
); start
= ""; break;
364 case SDATA_SYSV
: fprintf (file
, "%s -msdata=sysv", start
); start
= ""; break;
365 case SDATA_EABI
: fprintf (file
, "%s -msdata=eabi", start
); start
= ""; break;
368 if (rs6000_sdata
&& g_switch_value
)
370 fprintf (file
, "%s -G %d", start
, g_switch_value
);
381 /* Create a CONST_DOUBLE from a string. */
384 rs6000_float_const (string
, mode
)
386 enum machine_mode mode
;
388 REAL_VALUE_TYPE value
= REAL_VALUE_ATOF (string
, mode
);
389 return immed_real_const_1 (value
, mode
);
393 /* Create a CONST_DOUBLE like immed_double_const, except reverse the
394 two parts of the constant if the target is little endian. */
397 rs6000_immed_double_const (i0
, i1
, mode
)
398 HOST_WIDE_INT i0
, i1
;
399 enum machine_mode mode
;
401 if (! WORDS_BIG_ENDIAN
)
402 return immed_double_const (i1
, i0
, mode
);
404 return immed_double_const (i0
, i1
, mode
);
408 /* Return non-zero if this function is known to have a null epilogue. */
413 if (reload_completed
)
415 rs6000_stack_t
*info
= rs6000_stack_info ();
417 if (info
->first_gp_reg_save
== 32
418 && info
->first_fp_reg_save
== 64
428 /* Returns 1 always. */
431 any_operand (op
, mode
)
433 enum machine_mode mode
;
438 /* Returns 1 if op is the count register */
440 count_register_operand(op
, mode
)
442 enum machine_mode mode
;
444 if (GET_CODE (op
) != REG
)
447 if (REGNO (op
) == COUNT_REGISTER_REGNUM
)
450 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
456 /* Returns 1 if op is memory location for float/int conversions that masquerades
459 fpmem_operand(op
, mode
)
461 enum machine_mode mode
;
463 if (GET_CODE (op
) != REG
)
466 if (FPMEM_REGNO_P (REGNO (op
)))
470 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
477 /* Return 1 if OP is a constant that can fit in a D field. */
480 short_cint_operand (op
, mode
)
482 enum machine_mode mode
;
484 return (GET_CODE (op
) == CONST_INT
485 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) < 0x10000);
488 /* Similar for a unsigned D field. */
491 u_short_cint_operand (op
, mode
)
493 enum machine_mode mode
;
495 return (GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff0000) == 0);
498 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
501 non_short_cint_operand (op
, mode
)
503 enum machine_mode mode
;
505 return (GET_CODE (op
) == CONST_INT
506 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) >= 0x10000);
509 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
513 gpc_reg_operand (op
, mode
)
515 enum machine_mode mode
;
517 return (register_operand (op
, mode
)
518 && (GET_CODE (op
) != REG
519 || (REGNO (op
) >= 67 && !FPMEM_REGNO_P (REGNO (op
)))
520 || REGNO (op
) < 64));
523 /* Returns 1 if OP is either a pseudo-register or a register denoting a
527 cc_reg_operand (op
, mode
)
529 enum machine_mode mode
;
531 return (register_operand (op
, mode
)
532 && (GET_CODE (op
) != REG
533 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
534 || CR_REGNO_P (REGNO (op
))));
537 /* Returns 1 if OP is either a constant integer valid for a D-field or a
538 non-special register. If a register, it must be in the proper mode unless
542 reg_or_short_operand (op
, mode
)
544 enum machine_mode mode
;
546 return short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
549 /* Similar, except check if the negation of the constant would be valid for
553 reg_or_neg_short_operand (op
, mode
)
555 enum machine_mode mode
;
557 if (GET_CODE (op
) == CONST_INT
)
558 return CONST_OK_FOR_LETTER_P (INTVAL (op
), 'P');
560 return gpc_reg_operand (op
, mode
);
563 /* Return 1 if the operand is either a register or an integer whose high-order
567 reg_or_u_short_operand (op
, mode
)
569 enum machine_mode mode
;
571 if (GET_CODE (op
) == CONST_INT
572 && (INTVAL (op
) & 0xffff0000) == 0)
575 return gpc_reg_operand (op
, mode
);
578 /* Return 1 is the operand is either a non-special register or ANY
582 reg_or_cint_operand (op
, mode
)
584 enum machine_mode mode
;
586 return GET_CODE (op
) == CONST_INT
|| gpc_reg_operand (op
, mode
);
589 /* Return 1 if the operand is an operand that can be loaded via the GOT */
592 got_operand (op
, mode
)
594 enum machine_mode mode
;
596 return (GET_CODE (op
) == SYMBOL_REF
597 || GET_CODE (op
) == CONST
598 || GET_CODE (op
) == LABEL_REF
);
601 /* Return 1 if the operand is a simple references that can be loaded via
602 the GOT (labels involving addition aren't allowed). */
605 got_no_const_operand (op
, mode
)
607 enum machine_mode mode
;
609 return (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
);
612 /* Return the number of instructions it takes to form a constant in an
616 num_insns_constant_wide (value
)
619 /* signed constant loadable with {cal|addi} */
620 if (((unsigned HOST_WIDE_INT
)value
+ 0x8000) < 0x10000)
623 #if HOST_BITS_PER_WIDE_INT == 32
624 /* constant loadable with {cau|addis} */
625 else if ((value
& 0xffff) == 0)
629 /* constant loadable with {cau|addis} */
630 else if ((value
& 0xffff) == 0 && (value
& ~0xffffffff) == 0)
633 else if (TARGET_64BIT
)
635 HOST_WIDE_INT low
= value
& 0xffffffff;
636 HOST_WIDE_INT high
= value
>> 32;
638 if (high
== 0 && (low
& 0x80000000) == 0)
641 else if (high
== 0xffffffff && (low
& 0x80000000) != 0)
645 return num_insns_constant_wide (high
) + 1;
648 return (num_insns_constant_wide (high
)
649 + num_insns_constant_wide (low
) + 1);
658 num_insns_constant (op
, mode
)
660 enum machine_mode mode
;
662 if (GET_CODE (op
) == CONST_INT
)
663 return num_insns_constant_wide (INTVAL (op
));
665 else if (GET_CODE (op
) == CONST_DOUBLE
&& mode
== SFmode
)
670 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
671 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
672 return num_insns_constant_wide ((HOST_WIDE_INT
)l
);
675 else if (GET_CODE (op
) == CONST_DOUBLE
)
681 int endian
= (WORDS_BIG_ENDIAN
== 0);
683 if (mode
== VOIDmode
|| mode
== DImode
)
685 high
= CONST_DOUBLE_HIGH (op
);
686 low
= CONST_DOUBLE_LOW (op
);
690 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
691 REAL_VALUE_TO_TARGET_DOUBLE (rv
, l
);
697 return (num_insns_constant_wide (low
)
698 + num_insns_constant_wide (high
));
702 if (high
== 0 && (low
& 0x80000000) == 0)
703 return num_insns_constant_wide (low
);
705 else if (((high
& 0xffffffff) == 0xffffffff)
706 && ((low
& 0x80000000) != 0))
707 return num_insns_constant_wide (low
);
710 return num_insns_constant_wide (high
) + 1;
713 return (num_insns_constant_wide (high
)
714 + num_insns_constant_wide (low
) + 1);
722 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
723 with one instruction per word. We only do this if we can safely read
724 CONST_DOUBLE_{LOW,HIGH}. */
727 easy_fp_constant (op
, mode
)
729 register enum machine_mode mode
;
731 if (GET_CODE (op
) != CONST_DOUBLE
732 || GET_MODE (op
) != mode
733 || (GET_MODE_CLASS (mode
) != MODE_FLOAT
&& mode
!= DImode
))
736 /* Consider all constants with -msoft-float to be easy */
737 if (TARGET_SOFT_FLOAT
&& mode
!= DImode
)
740 /* If we are using V.4 style PIC, consider all constants to be hard */
741 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
744 #ifdef TARGET_RELOCATABLE
745 /* Similarly if we are using -mrelocatable, consider all constants to be hard */
746 if (TARGET_RELOCATABLE
)
755 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
756 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
758 return (num_insns_constant_wide ((HOST_WIDE_INT
)k
[0]) == 1
759 && num_insns_constant_wide ((HOST_WIDE_INT
)k
[1]) == 1);
762 else if (mode
== SFmode
)
767 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
768 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
770 return num_insns_constant_wide (l
) == 1;
773 else if (mode
== DImode
&& TARGET_32BIT
)
774 return num_insns_constant (op
, DImode
) == 2;
780 /* Return 1 if the operand is in volatile memory. Note that during the
781 RTL generation phase, memory_operand does not return TRUE for
782 volatile memory references. So this function allows us to
783 recognize volatile references where its safe. */
786 volatile_mem_operand (op
, mode
)
788 enum machine_mode mode
;
790 if (GET_CODE (op
) != MEM
)
793 if (!MEM_VOLATILE_P (op
))
796 if (mode
!= GET_MODE (op
))
799 if (reload_completed
)
800 return memory_operand (op
, mode
);
802 if (reload_in_progress
)
803 return strict_memory_address_p (mode
, XEXP (op
, 0));
805 return memory_address_p (mode
, XEXP (op
, 0));
808 /* Return 1 if the operand is an offsettable memory address. */
811 offsettable_addr_operand (op
, mode
)
813 enum machine_mode mode
;
815 return offsettable_address_p (reload_completed
| reload_in_progress
,
819 /* Return 1 if the operand is either an easy FP constant (see above) or
823 mem_or_easy_const_operand (op
, mode
)
825 enum machine_mode mode
;
827 return memory_operand (op
, mode
) || easy_fp_constant (op
, mode
);
830 /* Return 1 if the operand is either a non-special register or an item
831 that can be used as the operand of an SI add insn. */
834 add_operand (op
, mode
)
836 enum machine_mode mode
;
838 return (reg_or_short_operand (op
, mode
)
839 || (GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff) == 0));
842 /* Return 1 if OP is a constant but not a valid add_operand. */
845 non_add_cint_operand (op
, mode
)
847 enum machine_mode mode
;
849 return (GET_CODE (op
) == CONST_INT
850 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) >= 0x10000
851 && (INTVAL (op
) & 0xffff) != 0);
854 /* Return 1 if the operand is a non-special register or a constant that
855 can be used as the operand of an OR or XOR insn on the RS/6000. */
858 logical_operand (op
, mode
)
860 enum machine_mode mode
;
862 return (gpc_reg_operand (op
, mode
)
863 || (GET_CODE (op
) == CONST_INT
864 && ((INTVAL (op
) & 0xffff0000) == 0
865 || (INTVAL (op
) & 0xffff) == 0)));
868 /* Return 1 if C is a constant that is not a logical operand (as
872 non_logical_cint_operand (op
, mode
)
874 enum machine_mode mode
;
876 return (GET_CODE (op
) == CONST_INT
877 && (INTVAL (op
) & 0xffff0000) != 0
878 && (INTVAL (op
) & 0xffff) != 0);
881 /* Return 1 if C is a constant that can be encoded in a mask on the
882 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
883 Reject all ones and all zeros, since these should have been optimized
884 away and confuse the making of MB and ME. */
894 if (c
== 0 || c
== ~0)
897 last_bit_value
= c
& 1;
899 for (i
= 1; i
< 32; i
++)
900 if (((c
>>= 1) & 1) != last_bit_value
)
901 last_bit_value
^= 1, transitions
++;
903 return transitions
<= 2;
906 /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
909 mask_operand (op
, mode
)
911 enum machine_mode mode
;
913 return GET_CODE (op
) == CONST_INT
&& mask_constant (INTVAL (op
));
916 /* Return 1 if the operand is either a non-special register or a
917 constant that can be used as the operand of an RS/6000 logical AND insn. */
920 and_operand (op
, mode
)
922 enum machine_mode mode
;
924 return (logical_operand (op
, mode
)
925 || mask_operand (op
, mode
));
928 /* Return 1 if the operand is a constant but not a valid operand for an AND
932 non_and_cint_operand (op
, mode
)
934 enum machine_mode mode
;
936 return GET_CODE (op
) == CONST_INT
&& ! and_operand (op
, mode
);
939 /* Return 1 if the operand is a general register or memory operand. */
942 reg_or_mem_operand (op
, mode
)
944 register enum machine_mode mode
;
946 return (gpc_reg_operand (op
, mode
)
947 || memory_operand (op
, mode
)
948 || volatile_mem_operand (op
, mode
));
951 /* Return 1 if the operand is a general register or memory operand without
952 pre-inc or pre_dec which produces invalid form of PowerPC lwa
956 lwa_operand (op
, mode
)
958 register enum machine_mode mode
;
962 if (reload_completed
&& GET_CODE (inner
) == SUBREG
)
963 inner
= SUBREG_REG (inner
);
965 return gpc_reg_operand (inner
, mode
)
966 || (memory_operand (inner
, mode
)
967 && GET_CODE (XEXP (inner
, 0)) != PRE_INC
968 && GET_CODE (XEXP (inner
, 0)) != PRE_DEC
);
971 /* Return 1 if the operand, used inside a MEM, is a valid first argument
972 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
976 call_operand (op
, mode
)
978 enum machine_mode mode
;
980 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
983 return (GET_CODE (op
) == SYMBOL_REF
984 || (GET_CODE (op
) == REG
&& REGNO (op
) >= FIRST_PSEUDO_REGISTER
));
988 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
992 current_file_function_operand (op
, mode
)
994 enum machine_mode mode
;
996 return (GET_CODE (op
) == SYMBOL_REF
997 && (SYMBOL_REF_FLAG (op
)
998 || op
== XEXP (DECL_RTL (current_function_decl
), 0)));
1002 /* Return 1 if this operand is a valid input for a move insn. */
1005 input_operand (op
, mode
)
1007 enum machine_mode mode
;
1009 /* Memory is always valid. */
1010 if (memory_operand (op
, mode
))
1013 /* For floating-point, easy constants are valid. */
1014 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1016 && easy_fp_constant (op
, mode
))
1019 /* Allow any integer constant. */
1020 if (GET_MODE_CLASS (mode
) == MODE_INT
1021 && (GET_CODE (op
) == CONST_INT
|| GET_CODE (op
) == CONST_DOUBLE
))
1024 /* For floating-point or multi-word mode, the only remaining valid type
1026 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1027 || GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
1028 return register_operand (op
, mode
);
1030 /* The only cases left are integral modes one word or smaller (we
1031 do not get called for MODE_CC values). These can be in any
1033 if (register_operand (op
, mode
))
1036 /* A SYMBOL_REF referring to the TOC is valid. */
1037 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op
))
1040 /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC
1041 directly in the instruction stream */
1042 if (DEFAULT_ABI
== ABI_NT
1043 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
))
1046 /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region
1048 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1049 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == CONST
)
1050 && small_data_operand (op
, Pmode
))
1056 /* Return 1 for an operand in small memory on V.4/eabi */
1059 small_data_operand (op
, mode
)
1061 enum machine_mode mode
;
1064 rtx sym_ref
, const_part
;
1066 if (rs6000_sdata
== SDATA_NONE
|| rs6000_sdata
== SDATA_DATA
)
1069 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1072 if (GET_CODE (op
) == SYMBOL_REF
)
1075 else if (GET_CODE (op
) != CONST
1076 || GET_CODE (XEXP (op
, 0)) != PLUS
1077 || GET_CODE (XEXP (XEXP (op
, 0), 0)) != SYMBOL_REF
1078 || GET_CODE (XEXP (XEXP (op
, 0), 1)) != CONST_INT
)
1083 rtx sum
= XEXP (op
, 0);
1084 HOST_WIDE_INT summand
;
1086 /* We have to be careful here, because it is the referenced address
1087 that must be 32k from _SDA_BASE_, not just the symbol. */
1088 summand
= INTVAL (XEXP (sum
, 1));
1089 if (summand
< 0 || summand
> g_switch_value
)
1092 sym_ref
= XEXP (sum
, 0);
1095 if (*XSTR (sym_ref
, 0) != '@')
1106 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1107 for a call to a function whose data type is FNTYPE.
1108 For a library call, FNTYPE is 0.
1110 For incoming args we set the number of arguments in the prototype large
1111 so we never return a PARALLEL. */
1114 init_cumulative_args (cum
, fntype
, libname
, incoming
)
1115 CUMULATIVE_ARGS
*cum
;
1120 static CUMULATIVE_ARGS zero_cumulative
;
1121 enum rs6000_abi abi
= DEFAULT_ABI
;
1123 *cum
= zero_cumulative
;
1125 cum
->fregno
= FP_ARG_MIN_REG
;
1126 cum
->prototype
= (fntype
&& TYPE_ARG_TYPES (fntype
));
1127 cum
->call_cookie
= CALL_NORMAL
;
1131 cum
->nargs_prototype
= 1000; /* don't return a PARALLEL */
1132 if (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
1133 cum
->varargs_offset
= RS6000_VARARGS_OFFSET
;
1136 else if (cum
->prototype
)
1137 cum
->nargs_prototype
= (list_length (TYPE_ARG_TYPES (fntype
)) - 1
1138 + (TYPE_MODE (TREE_TYPE (fntype
)) == BLKmode
1139 || RETURN_IN_MEMORY (TREE_TYPE (fntype
))));
1142 cum
->nargs_prototype
= 0;
1144 cum
->orig_nargs
= cum
->nargs_prototype
;
1146 /* Check for DLL import functions */
1149 && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype
)))
1150 cum
->call_cookie
= CALL_NT_DLLIMPORT
;
1152 /* Also check for longcall's */
1153 else if (fntype
&& lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype
)))
1154 cum
->call_cookie
= CALL_LONG
;
1156 if (TARGET_DEBUG_ARG
)
1158 fprintf (stderr
, "\ninit_cumulative_args:");
1161 tree ret_type
= TREE_TYPE (fntype
);
1162 fprintf (stderr
, " ret code = %s,",
1163 tree_code_name
[ (int)TREE_CODE (ret_type
) ]);
1166 if ((abi
== ABI_V4
|| abi
== ABI_SOLARIS
) && incoming
)
1167 fprintf (stderr
, " varargs = %d, ", cum
->varargs_offset
);
1169 if (cum
->call_cookie
& CALL_NT_DLLIMPORT
)
1170 fprintf (stderr
, " dllimport,");
1172 if (cum
->call_cookie
& CALL_LONG
)
1173 fprintf (stderr
, " longcall,");
1175 fprintf (stderr
, " proto = %d, nargs = %d\n",
1176 cum
->prototype
, cum
->nargs_prototype
);
1180 /* If defined, a C expression which determines whether, and in which
1181 direction, to pad out an argument with extra space. The value
1182 should be of type `enum direction': either `upward' to pad above
1183 the argument, `downward' to pad below, or `none' to inhibit
1186 For the AIX ABI structs are always stored left shifted in their
1190 function_arg_padding (mode
, type
)
1191 enum machine_mode mode
;
1194 if (type
!= 0 && AGGREGATE_TYPE_P (type
))
1197 /* This is the default definition. */
1198 return (! BYTES_BIG_ENDIAN
1201 ? (type
&& TREE_CODE (TYPE_SIZE (type
)) == INTEGER_CST
1202 && int_size_in_bytes (type
) < (PARM_BOUNDARY
/ BITS_PER_UNIT
))
1203 : GET_MODE_BITSIZE (mode
) < PARM_BOUNDARY
)
1204 ? (int)downward
: (int)upward
));
1207 /* If defined, a C expression that gives the alignment boundary, in bits,
1208 of an argument with the specified mode and type. If it is not defined,
1209 PARM_BOUNDARY is used for all arguments.
1211 Windows NT wants anything >= 8 bytes to be double word aligned.
1213 V.4 wants long longs to be double word aligned. */
1216 function_arg_boundary (mode
, type
)
1217 enum machine_mode mode
;
1220 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
) && mode
== DImode
)
1223 if (DEFAULT_ABI
!= ABI_NT
|| TARGET_64BIT
)
1224 return PARM_BOUNDARY
;
1226 if (mode
!= BLKmode
)
1227 return (GET_MODE_SIZE (mode
)) >= 8 ? 64 : 32;
1229 return (int_size_in_bytes (type
) >= 8) ? 64 : 32;
1232 /* Update the data in CUM to advance over an argument
1233 of mode MODE and data type TYPE.
1234 (TYPE is null for libcalls where that information may not be available.) */
1237 function_arg_advance (cum
, mode
, type
, named
)
1238 CUMULATIVE_ARGS
*cum
;
1239 enum machine_mode mode
;
1243 int align
= ((cum
->words
& 1) != 0 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
1244 cum
->words
+= align
;
1245 cum
->nargs_prototype
--;
1247 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1249 /* Long longs must not be split between registers and stack */
1250 if ((GET_MODE_CLASS (mode
) != MODE_FLOAT
|| TARGET_SOFT_FLOAT
)
1251 && type
&& !AGGREGATE_TYPE_P (type
)
1252 && cum
->words
< GP_ARG_NUM_REG
1253 && cum
->words
+ RS6000_ARG_SIZE (mode
, type
, named
) > GP_ARG_NUM_REG
)
1255 cum
->words
= GP_ARG_NUM_REG
;
1258 /* Aggregates get passed as pointers */
1259 if (type
&& AGGREGATE_TYPE_P (type
))
1262 /* Floats go in registers, & don't occupy space in the GP registers
1263 like they do for AIX unless software floating point. */
1264 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1265 && TARGET_HARD_FLOAT
1266 && cum
->fregno
<= FP_ARG_V4_MAX_REG
)
1270 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, 1);
1275 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, named
);
1276 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& TARGET_HARD_FLOAT
)
1280 if (TARGET_DEBUG_ARG
)
1282 "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1283 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), named
, align
);
1286 /* Determine where to put an argument to a function.
1287 Value is zero to push the argument on the stack,
1288 or a hard register in which to store the argument.
1290 MODE is the argument's machine mode.
1291 TYPE is the data type of the argument (as a tree).
1292 This is null for libcalls where that information may
1294 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1295 the preceding args and about the function being called.
1296 NAMED is nonzero if this argument is a named parameter
1297 (otherwise it is an extra parameter matching an ellipsis).
1299 On RS/6000 the first eight words of non-FP are normally in registers
1300 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
1301 Under V.4, the first 8 FP args are in registers.
1303 If this is floating-point and no prototype is specified, we use
1304 both an FP and integer register (or possibly FP reg and stack). Library
1305 functions (when TYPE is zero) always have the proper types for args,
1306 so we can pass the FP value just in one register. emit_library_function
1307 doesn't support PARALLEL anyway. */
1310 function_arg (cum
, mode
, type
, named
)
1311 CUMULATIVE_ARGS
*cum
;
1312 enum machine_mode mode
;
1316 int align
= ((cum
->words
& 1) != 0 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
1317 int align_words
= cum
->words
+ align
;
1319 if (TARGET_DEBUG_ARG
)
1321 "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1322 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), named
, align
);
1324 /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4
1325 uses to say fp args were passed in registers. Assume that we don't need the
1326 marker for software floating point, or compiler generated library calls. */
1327 if (mode
== VOIDmode
)
1329 enum rs6000_abi abi
= DEFAULT_ABI
;
1331 if ((abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
1332 && TARGET_HARD_FLOAT
1333 && cum
->nargs_prototype
< 0
1334 && type
&& (cum
->prototype
|| TARGET_NO_PROTOTYPE
))
1336 return GEN_INT (cum
->call_cookie
1337 | ((cum
->fregno
== FP_ARG_MIN_REG
)
1338 ? CALL_V4_SET_FP_ARGS
1339 : CALL_V4_CLEAR_FP_ARGS
));
1342 return GEN_INT (cum
->call_cookie
);
1347 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1351 if (type
&& TREE_CODE (TYPE_SIZE (type
)) != INTEGER_CST
)
1354 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
1356 if (DEFAULT_ABI
== ABI_V4
/* V.4 never passes FP values in GP registers */
1357 || DEFAULT_ABI
== ABI_SOLARIS
1359 || ((cum
->nargs_prototype
> 0)
1360 /* IBM AIX extended its linkage convention definition always to
1361 require FP args after register save area hole on the stack. */
1362 && (DEFAULT_ABI
!= ABI_AIX
1364 || (align_words
< GP_ARG_NUM_REG
))))
1365 return gen_rtx (REG
, mode
, cum
->fregno
);
1367 return gen_rtx (PARALLEL
, mode
,
1370 gen_rtx (EXPR_LIST
, VOIDmode
,
1371 ((align_words
>= GP_ARG_NUM_REG
)
1374 + RS6000_ARG_SIZE (mode
, type
, named
)
1376 /* If this is partially on the stack, then
1377 we only include the portion actually
1378 in registers here. */
1379 ? gen_rtx (REG
, SImode
,
1380 GP_ARG_MIN_REG
+ align_words
)
1381 : gen_rtx (REG
, mode
,
1382 GP_ARG_MIN_REG
+ align_words
))),
1384 gen_rtx (EXPR_LIST
, VOIDmode
,
1385 gen_rtx (REG
, mode
, cum
->fregno
),
1389 /* Long longs won't be split between register and stack;
1390 FP arguments get passed on the stack if they didn't get a register. */
1391 else if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
) &&
1392 (align_words
+ RS6000_ARG_SIZE (mode
, type
, named
) > GP_ARG_NUM_REG
1393 || (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& TARGET_HARD_FLOAT
)))
1398 else if (align_words
< GP_ARG_NUM_REG
)
1399 return gen_rtx (REG
, mode
, GP_ARG_MIN_REG
+ align_words
);
1404 /* For an arg passed partly in registers and partly in memory,
1405 this is the number of registers used.
1406 For args passed entirely in registers or entirely in memory, zero. */
1409 function_arg_partial_nregs (cum
, mode
, type
, named
)
1410 CUMULATIVE_ARGS
*cum
;
1411 enum machine_mode mode
;
1418 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1421 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
1423 if (cum
->nargs_prototype
>= 0)
1427 if (cum
->words
< GP_ARG_NUM_REG
1428 && GP_ARG_NUM_REG
< (cum
->words
+ RS6000_ARG_SIZE (mode
, type
, named
)))
1430 int ret
= GP_ARG_NUM_REG
- cum
->words
;
1431 if (ret
&& TARGET_DEBUG_ARG
)
1432 fprintf (stderr
, "function_arg_partial_nregs: %d\n", ret
);
1440 /* A C expression that indicates when an argument must be passed by
1441 reference. If nonzero for an argument, a copy of that argument is
1442 made in memory and a pointer to the argument is passed instead of
1443 the argument itself. The pointer is passed in whatever way is
1444 appropriate for passing a pointer to that type.
1446 Under V.4, structures and unions are passed by reference. */
1449 function_arg_pass_by_reference (cum
, mode
, type
, named
)
1450 CUMULATIVE_ARGS
*cum
;
1451 enum machine_mode mode
;
1455 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1456 && type
&& AGGREGATE_TYPE_P (type
))
1458 if (TARGET_DEBUG_ARG
)
1459 fprintf (stderr
, "function_arg_pass_by_reference: aggregate\n");
1468 /* Perform any needed actions needed for a function that is receiving a
1469 variable number of arguments.
1473 MODE and TYPE are the mode and type of the current parameter.
1475 PRETEND_SIZE is a variable that should be set to the amount of stack
1476 that must be pushed by the prolog to pretend that our caller pushed
1479 Normally, this macro will push all remaining incoming registers on the
1480 stack and set PRETEND_SIZE to the length of the registers pushed. */
1483 setup_incoming_varargs (cum
, mode
, type
, pretend_size
, no_rtl
)
1484 CUMULATIVE_ARGS
*cum
;
1485 enum machine_mode mode
;
1491 rtx save_area
= virtual_incoming_args_rtx
;
1492 int reg_size
= (TARGET_64BIT
) ? 8 : 4;
1494 if (TARGET_DEBUG_ARG
)
1496 "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n",
1497 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), no_rtl
);
1499 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1501 rs6000_sysv_varargs_p
= 1;
1503 save_area
= plus_constant (frame_pointer_rtx
, RS6000_VARARGS_OFFSET
);
1506 rs6000_sysv_varargs_p
= 0;
1510 int first_reg_offset
= cum
->words
;
1512 if (MUST_PASS_IN_STACK (mode
, type
))
1513 first_reg_offset
+= RS6000_ARG_SIZE (TYPE_MODE (type
), type
, 1);
1515 if (first_reg_offset
> GP_ARG_NUM_REG
)
1516 first_reg_offset
= GP_ARG_NUM_REG
;
1518 if (!no_rtl
&& first_reg_offset
!= GP_ARG_NUM_REG
)
1520 (GP_ARG_MIN_REG
+ first_reg_offset
,
1521 gen_rtx (MEM
, BLKmode
,
1522 plus_constant (save_area
, first_reg_offset
* reg_size
)),
1523 GP_ARG_NUM_REG
- first_reg_offset
,
1524 (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
);
1526 *pretend_size
= (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
;
1529 /* Save FP registers if needed. */
1530 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
) && TARGET_HARD_FLOAT
&& !no_rtl
)
1532 int fregno
= cum
->fregno
;
1533 int num_fp_reg
= FP_ARG_V4_MAX_REG
+ 1 - fregno
;
1535 if (num_fp_reg
>= 0)
1537 rtx cr1
= gen_rtx (REG
, CCmode
, 69);
1538 rtx lab
= gen_label_rtx ();
1539 int off
= (GP_ARG_NUM_REG
* reg_size
) + ((fregno
- FP_ARG_MIN_REG
) * 8);
1541 emit_jump_insn (gen_rtx (SET
, VOIDmode
,
1543 gen_rtx (IF_THEN_ELSE
, VOIDmode
,
1544 gen_rtx (NE
, VOIDmode
, cr1
, const0_rtx
),
1545 gen_rtx (LABEL_REF
, VOIDmode
, lab
),
1548 while ( num_fp_reg
-- >= 0)
1550 emit_move_insn (gen_rtx (MEM
, DFmode
, plus_constant (save_area
, off
)),
1551 gen_rtx (REG
, DFmode
, fregno
++));
1560 /* If defined, is a C expression that produces the machine-specific
1561 code for a call to `__builtin_saveregs'. This code will be moved
1562 to the very beginning of the function, before any parameter access
1563 are made. The return value of this function should be an RTX that
1564 contains the value to use as the return of `__builtin_saveregs'.
1566 The argument ARGS is a `tree_list' containing the arguments that
1567 were passed to `__builtin_saveregs'.
1569 If this macro is not defined, the compiler will output an ordinary
1570 call to the library function `__builtin_saveregs'.
1572 On the Power/PowerPC return the address of the area on the stack
1573 used to hold arguments. Under AIX, this includes the 8 word register
1574 save area. Under V.4 this does not. */
1577 expand_builtin_saveregs (args
)
1580 return virtual_incoming_args_rtx
;
1584 /* Generate a memory reference for expand_block_move, copying volatile,
1585 and other bits from an original memory reference. */
1588 expand_block_move_mem (mode
, addr
, orig_mem
)
1589 enum machine_mode mode
;
1593 rtx mem
= gen_rtx (MEM
, mode
, addr
);
1595 RTX_UNCHANGING_P (mem
) = RTX_UNCHANGING_P (orig_mem
);
1596 MEM_VOLATILE_P (mem
) = MEM_VOLATILE_P (orig_mem
);
1597 MEM_IN_STRUCT_P (mem
) = MEM_IN_STRUCT_P (orig_mem
);
1598 #ifdef MEM_UNALIGNED_P
1599 MEM_UNALIGNED_P (mem
) = MEM_UNALIGNED_P (orig_mem
);
1604 /* Expand a block move operation, and return 1 if successful. Return 0
1605 if we should let the compiler generate normal code.
1607 operands[0] is the destination
1608 operands[1] is the source
1609 operands[2] is the length
1610 operands[3] is the alignment */
1612 #define MAX_MOVE_REG 4
1615 expand_block_move (operands
)
1618 rtx orig_dest
= operands
[0];
1619 rtx orig_src
= operands
[1];
1620 rtx bytes_rtx
= operands
[2];
1621 rtx align_rtx
= operands
[3];
1622 int constp
= (GET_CODE (bytes_rtx
) == CONST_INT
);
1623 int align
= XINT (align_rtx
, 0);
1633 rtx stores
[MAX_MOVE_REG
];
1636 /* If this is not a fixed size move, just call memcpy */
1640 /* Anything to move? */
1641 bytes
= INTVAL (bytes_rtx
);
1645 /* Don't support real large moves. If string instructions are not used,
1646 then don't generate more than 8 loads. */
1652 else if (!STRICT_ALIGNMENT
)
1657 else if (bytes
> 8*align
)
1660 /* Move the address into scratch registers. */
1661 dest_reg
= copy_addr_to_reg (XEXP (orig_dest
, 0));
1662 src_reg
= copy_addr_to_reg (XEXP (orig_src
, 0));
1664 if (TARGET_STRING
) /* string instructions are available */
1666 for ( ; bytes
> 0; bytes
-= move_bytes
)
1668 if (bytes
> 24 /* move up to 32 bytes at a time */
1678 move_bytes
= (bytes
> 32) ? 32 : bytes
;
1679 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1680 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1681 GEN_INT ((move_bytes
== 32) ? 0 : move_bytes
),
1684 else if (bytes
> 16 /* move up to 24 bytes at a time */
1692 move_bytes
= (bytes
> 24) ? 24 : bytes
;
1693 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1694 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1695 GEN_INT (move_bytes
),
1698 else if (bytes
> 8 /* move up to 16 bytes at a time */
1704 move_bytes
= (bytes
> 16) ? 16 : bytes
;
1705 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1706 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1707 GEN_INT (move_bytes
),
1710 else if (bytes
> 4 && !TARGET_64BIT
)
1711 { /* move up to 8 bytes at a time */
1712 move_bytes
= (bytes
> 8) ? 8 : bytes
;
1713 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1714 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1715 GEN_INT (move_bytes
),
1718 else if (bytes
>= 4 && (align
>= 4 || !STRICT_ALIGNMENT
))
1719 { /* move 4 bytes */
1721 tmp_reg
= gen_reg_rtx (SImode
);
1722 emit_move_insn (tmp_reg
, expand_block_move_mem (SImode
, src_reg
, orig_src
));
1723 emit_move_insn (expand_block_move_mem (SImode
, dest_reg
, orig_dest
), tmp_reg
);
1725 else if (bytes
== 2 && (align
>= 2 || !STRICT_ALIGNMENT
))
1726 { /* move 2 bytes */
1728 tmp_reg
= gen_reg_rtx (HImode
);
1729 emit_move_insn (tmp_reg
, expand_block_move_mem (HImode
, src_reg
, orig_src
));
1730 emit_move_insn (expand_block_move_mem (HImode
, dest_reg
, orig_dest
), tmp_reg
);
1732 else if (bytes
== 1) /* move 1 byte */
1735 tmp_reg
= gen_reg_rtx (QImode
);
1736 emit_move_insn (tmp_reg
, expand_block_move_mem (QImode
, src_reg
, orig_src
));
1737 emit_move_insn (expand_block_move_mem (QImode
, dest_reg
, orig_dest
), tmp_reg
);
1740 { /* move up to 4 bytes at a time */
1741 move_bytes
= (bytes
> 4) ? 4 : bytes
;
1742 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1743 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1744 GEN_INT (move_bytes
),
1748 if (bytes
> move_bytes
)
1750 emit_insn (gen_addsi3 (src_reg
, src_reg
, GEN_INT (move_bytes
)));
1751 emit_insn (gen_addsi3 (dest_reg
, dest_reg
, GEN_INT (move_bytes
)));
1756 else /* string instructions not available */
1758 num_reg
= offset
= 0;
1759 for ( ; bytes
> 0; (bytes
-= move_bytes
), (offset
+= move_bytes
))
1761 /* Calculate the correct offset for src/dest */
1765 dest_addr
= dest_reg
;
1769 src_addr
= gen_rtx (PLUS
, Pmode
, src_reg
, GEN_INT (offset
));
1770 dest_addr
= gen_rtx (PLUS
, Pmode
, dest_reg
, GEN_INT (offset
));
1773 /* Generate the appropriate load and store, saving the stores for later */
1774 if (bytes
>= 8 && TARGET_64BIT
&& (align
>= 8 || !STRICT_ALIGNMENT
))
1777 tmp_reg
= gen_reg_rtx (DImode
);
1778 emit_insn (gen_movdi (tmp_reg
, expand_block_move_mem (DImode
, src_addr
, orig_src
)));
1779 stores
[ num_reg
++ ] = gen_movdi (expand_block_move_mem (DImode
, dest_addr
, orig_dest
), tmp_reg
);
1781 else if (bytes
>= 4 && (align
>= 4 || !STRICT_ALIGNMENT
))
1784 tmp_reg
= gen_reg_rtx (SImode
);
1785 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (SImode
, src_addr
, orig_src
)));
1786 stores
[ num_reg
++ ] = gen_movsi (expand_block_move_mem (SImode
, dest_addr
, orig_dest
), tmp_reg
);
1788 else if (bytes
>= 2 && (align
>= 2 || !STRICT_ALIGNMENT
))
1791 tmp_reg
= gen_reg_rtx (HImode
);
1792 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (HImode
, src_addr
, orig_src
)));
1793 stores
[ num_reg
++ ] = gen_movhi (expand_block_move_mem (HImode
, dest_addr
, orig_dest
), tmp_reg
);
1798 tmp_reg
= gen_reg_rtx (QImode
);
1799 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (QImode
, src_addr
, orig_src
)));
1800 stores
[ num_reg
++ ] = gen_movqi (expand_block_move_mem (QImode
, dest_addr
, orig_dest
), tmp_reg
);
1803 if (num_reg
>= MAX_MOVE_REG
)
1805 for (i
= 0; i
< num_reg
; i
++)
1806 emit_insn (stores
[i
]);
1811 for (i
= 0; i
< num_reg
; i
++)
1812 emit_insn (stores
[i
]);
1819 /* Return 1 if OP is a load multiple operation. It is known to be a
1820 PARALLEL and the first section will be tested. */
1823 load_multiple_operation (op
, mode
)
1825 enum machine_mode mode
;
1827 int count
= XVECLEN (op
, 0);
1832 /* Perform a quick check so we don't blow up below. */
1834 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
1835 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
1836 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
1839 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
1840 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
1842 for (i
= 1; i
< count
; i
++)
1844 rtx elt
= XVECEXP (op
, 0, i
);
1846 if (GET_CODE (elt
) != SET
1847 || GET_CODE (SET_DEST (elt
)) != REG
1848 || GET_MODE (SET_DEST (elt
)) != SImode
1849 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
1850 || GET_CODE (SET_SRC (elt
)) != MEM
1851 || GET_MODE (SET_SRC (elt
)) != SImode
1852 || GET_CODE (XEXP (SET_SRC (elt
), 0)) != PLUS
1853 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt
), 0), 0), src_addr
)
1854 || GET_CODE (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != CONST_INT
1855 || INTVAL (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != i
* 4)
1862 /* Similar, but tests for store multiple. Here, the second vector element
1863 is a CLOBBER. It will be tested later. */
1866 store_multiple_operation (op
, mode
)
1868 enum machine_mode mode
;
1870 int count
= XVECLEN (op
, 0) - 1;
1875 /* Perform a quick check so we don't blow up below. */
1877 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
1878 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
1879 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
1882 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
1883 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
1885 for (i
= 1; i
< count
; i
++)
1887 rtx elt
= XVECEXP (op
, 0, i
+ 1);
1889 if (GET_CODE (elt
) != SET
1890 || GET_CODE (SET_SRC (elt
)) != REG
1891 || GET_MODE (SET_SRC (elt
)) != SImode
1892 || REGNO (SET_SRC (elt
)) != src_regno
+ i
1893 || GET_CODE (SET_DEST (elt
)) != MEM
1894 || GET_MODE (SET_DEST (elt
)) != SImode
1895 || GET_CODE (XEXP (SET_DEST (elt
), 0)) != PLUS
1896 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt
), 0), 0), dest_addr
)
1897 || GET_CODE (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != CONST_INT
1898 || INTVAL (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != i
* 4)
1905 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
1906 We only check the opcode against the mode of the CC value here. */
1909 branch_comparison_operator (op
, mode
)
1911 enum machine_mode mode
;
1913 enum rtx_code code
= GET_CODE (op
);
1914 enum machine_mode cc_mode
;
1916 if (GET_RTX_CLASS (code
) != '<')
1919 cc_mode
= GET_MODE (XEXP (op
, 0));
1920 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
1923 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
1924 && cc_mode
== CCUNSmode
)
1927 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
1928 && (cc_mode
!= CCUNSmode
))
1934 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
1935 We check the opcode against the mode of the CC value and disallow EQ or
1936 NE comparisons for integers. */
1939 scc_comparison_operator (op
, mode
)
1941 enum machine_mode mode
;
1943 enum rtx_code code
= GET_CODE (op
);
1944 enum machine_mode cc_mode
;
1946 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1949 if (GET_RTX_CLASS (code
) != '<')
1952 cc_mode
= GET_MODE (XEXP (op
, 0));
1953 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
1956 if (code
== NE
&& cc_mode
!= CCFPmode
)
1959 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
1960 && cc_mode
== CCUNSmode
)
1963 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
1964 && (cc_mode
!= CCUNSmode
))
1967 if (cc_mode
== CCEQmode
&& code
!= EQ
&& code
!= NE
)
1973 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
1974 mask required to convert the result of a rotate insn into a shift
1975 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
1978 includes_lshift_p (shiftop
, andop
)
1979 register rtx shiftop
;
1982 int shift_mask
= (~0 << INTVAL (shiftop
));
1984 return (INTVAL (andop
) & ~shift_mask
) == 0;
1987 /* Similar, but for right shift. */
1990 includes_rshift_p (shiftop
, andop
)
1991 register rtx shiftop
;
1994 unsigned HOST_WIDE_INT shift_mask
= ~(unsigned HOST_WIDE_INT
) 0;
1996 shift_mask
>>= INTVAL (shiftop
);
1998 return (INTVAL (andop
) & ~ shift_mask
) == 0;
2001 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
2002 for lfq and stfq insns.
2004 Note reg1 and reg2 *must* be hard registers. To be sure we will
2005 abort if we are passed pseudo registers. */
2008 registers_ok_for_quad_peep (reg1
, reg2
)
2011 /* We might have been passed a SUBREG. */
2012 if (GET_CODE (reg1
) != REG
|| GET_CODE (reg2
) != REG
)
2015 return (REGNO (reg1
) == REGNO (reg2
) - 1);
2018 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
2019 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
2022 addrs_ok_for_quad_peep (addr1
, addr2
)
2029 /* Extract an offset (if used) from the first addr. */
2030 if (GET_CODE (addr1
) == PLUS
)
2032 /* If not a REG, return zero. */
2033 if (GET_CODE (XEXP (addr1
, 0)) != REG
)
2037 reg1
= REGNO (XEXP (addr1
, 0));
2038 /* The offset must be constant! */
2039 if (GET_CODE (XEXP (addr1
, 1)) != CONST_INT
)
2041 offset1
= INTVAL (XEXP (addr1
, 1));
2044 else if (GET_CODE (addr1
) != REG
)
2048 reg1
= REGNO (addr1
);
2049 /* This was a simple (mem (reg)) expression. Offset is 0. */
2053 /* Make sure the second address is a (mem (plus (reg) (const_int). */
2054 if (GET_CODE (addr2
) != PLUS
)
2057 if (GET_CODE (XEXP (addr2
, 0)) != REG
2058 || GET_CODE (XEXP (addr2
, 1)) != CONST_INT
)
2061 if (reg1
!= REGNO (XEXP (addr2
, 0)))
2064 /* The offset for the second addr must be 8 more than the first addr. */
2065 if (INTVAL (XEXP (addr2
, 1)) != offset1
+ 8)
2068 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
2073 /* Return the register class of a scratch register needed to copy IN into
2074 or out of a register in CLASS in MODE. If it can be done directly,
2075 NO_REGS is returned. */
2078 secondary_reload_class (class, mode
, in
)
2079 enum reg_class
class;
2080 enum machine_mode mode
;
2083 int regno
= true_regnum (in
);
2085 if (regno
>= FIRST_PSEUDO_REGISTER
)
2088 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
2090 if (class == GENERAL_REGS
|| class == BASE_REGS
2091 || (regno
>= 0 && INT_REGNO_P (regno
)))
2094 /* Constants, memory, and FP registers can go into FP registers. */
2095 if ((regno
== -1 || FP_REGNO_P (regno
))
2096 && (class == FLOAT_REGS
|| class == NON_SPECIAL_REGS
))
2099 /* We can copy among the CR registers. */
2100 if ((class == CR_REGS
|| class == CR0_REGS
)
2101 && regno
>= 0 && CR_REGNO_P (regno
))
2104 /* Otherwise, we need GENERAL_REGS. */
2105 return GENERAL_REGS
;
2108 /* Given a comparison operation, return the bit number in CCR to test. We
2109 know this is a valid comparison.
2111 SCC_P is 1 if this is for an scc. That means that %D will have been
2112 used instead of %C, so the bits will be in different places.
2114 Return -1 if OP isn't a valid comparison for some reason. */
2121 enum rtx_code code
= GET_CODE (op
);
2122 enum machine_mode cc_mode
;
2126 if (GET_RTX_CLASS (code
) != '<')
2129 cc_mode
= GET_MODE (XEXP (op
, 0));
2130 cc_regnum
= REGNO (XEXP (op
, 0));
2131 base_bit
= 4 * (cc_regnum
- 68);
2133 /* In CCEQmode cases we have made sure that the result is always in the
2134 third bit of the CR field. */
2136 if (cc_mode
== CCEQmode
)
2137 return base_bit
+ 3;
2142 return scc_p
? base_bit
+ 3 : base_bit
+ 2;
2144 return base_bit
+ 2;
2146 return base_bit
+ 1;
2151 /* If floating-point, we will have done a cror to put the bit in the
2152 unordered position. So test that bit. For integer, this is ! LT
2153 unless this is an scc insn. */
2154 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
;
2157 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
+ 1;
2164 /* Return the GOT register, creating it if needed. */
2167 rs6000_got_register (value
)
2170 if (!current_function_uses_pic_offset_table
|| !pic_offset_table_rtx
)
2172 if (reload_in_progress
|| reload_completed
)
2173 fatal_insn ("internal error -- needed new GOT register during reload phase to load:", value
);
2175 current_function_uses_pic_offset_table
= 1;
2176 pic_offset_table_rtx
= gen_rtx (REG
, Pmode
, GOT_TOC_REGNUM
);
2179 return pic_offset_table_rtx
;
2183 /* Replace all occurrences of register FROM with an new pseudo register in an insn X.
2184 Store the pseudo register used in REG.
2185 This is only safe during FINALIZE_PIC, since the registers haven't been setup
2189 rs6000_replace_regno (x
, from
, reg
)
2197 /* Allow this function to make replacements in EXPR_LISTs. */
2201 switch (GET_CODE (x
))
2214 if (REGNO (x
) == from
)
2217 *reg
= pic_offset_table_rtx
= gen_reg_rtx (Pmode
);
2228 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
2229 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
2232 XEXP (x
, i
) = rs6000_replace_regno (XEXP (x
, i
), from
, reg
);
2233 else if (fmt
[i
] == 'E')
2234 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2235 XVECEXP (x
, i
, j
) = rs6000_replace_regno (XVECEXP (x
, i
, j
), from
, reg
);
2242 /* By generating position-independent code, when two different
2243 programs (A and B) share a common library (libC.a), the text of
2244 the library can be shared whether or not the library is linked at
2245 the same address for both programs. In some of these
2246 environments, position-independent code requires not only the use
2247 of different addressing modes, but also special code to enable the
2248 use of these addressing modes.
2250 The `FINALIZE_PIC' macro serves as a hook to emit these special
2251 codes once the function is being compiled into assembly code, but
2252 not before. (It is not done before, because in the case of
2253 compiling an inline function, it would lead to multiple PIC
2254 prologues being included in functions which used inline functions
2255 and were compiled to assembly language.) */
2258 rs6000_finalize_pic ()
2260 /* Loop through all of the insns, replacing the special GOT_TOC_REGNUM
2261 with an appropriate pseudo register. If we find we need GOT/TOC,
2262 add the appropriate init code. */
2263 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
2265 rtx insn
= get_insns ();
2268 rtx last_insn
= NULL_RTX
;
2270 if (GET_CODE (insn
) == NOTE
)
2271 insn
= next_nonnote_insn (insn
);
2274 for ( ; insn
!= NULL_RTX
; insn
= NEXT_INSN (insn
))
2276 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2278 PATTERN (insn
) = rs6000_replace_regno (PATTERN (insn
),
2282 if (REG_NOTES (insn
))
2283 REG_NOTES (insn
) = rs6000_replace_regno (REG_NOTES (insn
),
2288 if (GET_CODE (insn
) != NOTE
)
2294 rtx init
= gen_init_v4_pic (reg
);
2295 emit_insn_before (init
, first_insn
);
2296 if (!optimize
&& last_insn
)
2297 emit_insn_after (gen_rtx (USE
, VOIDmode
, reg
), last_insn
);
2303 /* Search for any occurrence of the GOT_TOC register marker that should
2304 have been eliminated, but may have crept back in. */
2310 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
2312 rtx got_reg
= gen_rtx (REG
, Pmode
, GOT_TOC_REGNUM
);
2313 for ( ; insn
!= NULL_RTX
; insn
= NEXT_INSN (insn
))
2314 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
2315 && reg_mentioned_p (got_reg
, PATTERN (insn
)))
2316 fatal_insn ("GOT/TOC register marker not removed:", PATTERN (insn
));
2321 /* Define the structure for the machine field in struct function. */
2322 struct machine_function
2328 rtx pic_offset_table_rtx
;
2331 /* Functions to save and restore rs6000_fpmem_size.
2332 These will be called, via pointer variables,
2333 from push_function_context and pop_function_context. */
2336 rs6000_save_machine_status (p
)
2339 struct machine_function
*machine
=
2340 (struct machine_function
*) xmalloc (sizeof (struct machine_function
));
2342 p
->machine
= machine
;
2343 machine
->sysv_varargs_p
= rs6000_sysv_varargs_p
;
2344 machine
->fpmem_size
= rs6000_fpmem_size
;
2345 machine
->fpmem_offset
= rs6000_fpmem_offset
;
2346 machine
->pic_offset_table_rtx
= pic_offset_table_rtx
;
2350 rs6000_restore_machine_status (p
)
2353 struct machine_function
*machine
= p
->machine
;
2355 rs6000_sysv_varargs_p
= machine
->sysv_varargs_p
;
2356 rs6000_fpmem_size
= machine
->fpmem_size
;
2357 rs6000_fpmem_offset
= machine
->fpmem_offset
;
2358 pic_offset_table_rtx
= machine
->pic_offset_table_rtx
;
2361 p
->machine
= (struct machine_function
*)0;
2364 /* Do anything needed before RTL is emitted for each function. */
2367 rs6000_init_expanders ()
2369 /* Reset varargs and save TOC indicator */
2370 rs6000_sysv_varargs_p
= 0;
2371 rs6000_fpmem_size
= 0;
2372 rs6000_fpmem_offset
= 0;
2373 pic_offset_table_rtx
= (rtx
)0;
2375 /* Arrange to save and restore machine status around nested functions. */
2376 save_machine_status
= rs6000_save_machine_status
;
2377 restore_machine_status
= rs6000_restore_machine_status
;
2381 /* Print an operand. Recognize special options, documented below. */
2384 #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel")
2385 #define SMALL_DATA_REG ((rs6000_sdata == SDATA_EABI) ? 0 : 13)
2387 #define SMALL_DATA_RELOC "sda21"
2388 #define SMALL_DATA_REG 0
2392 print_operand (file
, x
, code
)
2400 /* These macros test for integers and extract the low-order bits. */
2402 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
2403 && GET_MODE (X) == VOIDmode)
2405 #define INT_LOWPART(X) \
2406 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
2411 /* Write out an instruction after the call which may be replaced
2412 with glue code by the loader. This depends on the AIX version. */
2413 asm_fprintf (file
, RS6000_CALL_GLUE
);
2417 /* Write the register number of the TOC register. */
2418 fputs (TARGET_MINIMAL_TOC
? reg_names
[30] : reg_names
[2], file
);
2422 /* Write out either a '.' or '$' for the current location, depending
2423 on whether this is Solaris or not. */
2424 putc ((DEFAULT_ABI
== ABI_SOLARIS
) ? '.' : '$', file
);
2428 /* If X is a constant integer whose low-order 5 bits are zero,
2429 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
2430 in the AIX assembler where "sri" with a zero shift count
2431 write a trash instruction. */
2432 if (GET_CODE (x
) == CONST_INT
&& (INTVAL (x
) & 31) == 0)
2439 /* Low-order 16 bits of constant, unsigned. */
2441 output_operand_lossage ("invalid %%b value");
2443 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
2447 /* This is an optional cror needed for LE or GE floating-point
2448 comparisons. Otherwise write nothing. */
2449 if ((GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
)
2450 && GET_MODE (XEXP (x
, 0)) == CCFPmode
)
2452 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
2454 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
2455 base_bit
+ 2, base_bit
+ (GET_CODE (x
) == GE
));
2460 /* Similar, except that this is for an scc, so we must be able to
2461 encode the test in a single bit that is one. We do the above
2462 for any LE, GE, GEU, or LEU and invert the bit for NE. */
2463 if (GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
2464 || GET_CODE (x
) == LEU
|| GET_CODE (x
) == GEU
)
2466 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
2468 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
2470 base_bit
+ (GET_CODE (x
) == GE
|| GET_CODE (x
) == GEU
));
2473 else if (GET_CODE (x
) == NE
)
2475 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
2477 fprintf (file
, "crnor %d,%d,%d\n\t", base_bit
+ 3,
2478 base_bit
+ 2, base_bit
+ 2);
2483 /* X is a CR register. Print the number of the third bit of the CR */
2484 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2485 output_operand_lossage ("invalid %%E value");
2487 fprintf(file
, "%d", 4 * (REGNO (x
) - 68) + 3);
2491 /* X is a CR register. Print the shift count needed to move it
2492 to the high-order four bits. */
2493 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2494 output_operand_lossage ("invalid %%f value");
2496 fprintf (file
, "%d", 4 * (REGNO (x
) - 68));
2500 /* Similar, but print the count for the rotate in the opposite
2502 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2503 output_operand_lossage ("invalid %%F value");
2505 fprintf (file
, "%d", 32 - 4 * (REGNO (x
) - 68));
2509 /* X is a constant integer. If it is negative, print "m",
2510 otherwise print "z". This is to make a aze or ame insn. */
2511 if (GET_CODE (x
) != CONST_INT
)
2512 output_operand_lossage ("invalid %%G value");
2513 else if (INTVAL (x
) >= 0)
2520 /* If constant, output low-order five bits. Otherwise,
2523 fprintf (file
, "%d", INT_LOWPART (x
) & 31);
2525 print_operand (file
, x
, 0);
2529 /* If constant, output low-order six bits. Otherwise,
2532 fprintf (file
, "%d", INT_LOWPART (x
) & 63);
2534 print_operand (file
, x
, 0);
2538 /* Print `i' if this is a constant, else nothing. */
2544 /* Write the bit number in CCR for jump. */
2547 output_operand_lossage ("invalid %%j code");
2549 fprintf (file
, "%d", i
);
2553 /* Similar, but add one for shift count in rlinm for scc and pass
2554 scc flag to `ccr_bit'. */
2557 output_operand_lossage ("invalid %%J code");
2559 /* If we want bit 31, write a shift count of zero, not 32. */
2560 fprintf (file
, "%d", i
== 31 ? 0 : i
+ 1);
2564 /* X must be a constant. Write the 1's complement of the
2567 output_operand_lossage ("invalid %%k value");
2569 fprintf (file
, "%d", ~ INT_LOWPART (x
));
2573 /* Write second word of DImode or DFmode reference. Works on register
2574 or non-indexed memory only. */
2575 if (GET_CODE (x
) == REG
)
2576 fprintf (file
, "%s", reg_names
[REGNO (x
) + 1]);
2577 else if (GET_CODE (x
) == MEM
)
2579 /* Handle possible auto-increment. Since it is pre-increment and
2580 we have already done it, we can just use an offset of four. */
2581 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2582 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2583 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 4));
2585 output_address (plus_constant (XEXP (x
, 0), 4));
2586 if (small_data_operand (x
, GET_MODE (x
)))
2587 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
2588 reg_names
[SMALL_DATA_REG
]);
2593 /* MB value for a mask operand. */
2594 if (! mask_operand (x
, VOIDmode
))
2595 output_operand_lossage ("invalid %%m value");
2597 val
= INT_LOWPART (x
);
2599 /* If the high bit is set and the low bit is not, the value is zero.
2600 If the high bit is zero, the value is the first 1 bit we find from
2602 if (val
< 0 && (val
& 1) == 0)
2609 for (i
= 1; i
< 32; i
++)
2610 if ((val
<<= 1) < 0)
2612 fprintf (file
, "%d", i
);
2616 /* Otherwise, look for the first 0 bit from the right. The result is its
2617 number plus 1. We know the low-order bit is one. */
2618 for (i
= 0; i
< 32; i
++)
2619 if (((val
>>= 1) & 1) == 0)
2622 /* If we ended in ...01, I would be 0. The correct value is 31, so
2624 fprintf (file
, "%d", 31 - i
);
2628 /* ME value for a mask operand. */
2629 if (! mask_operand (x
, VOIDmode
))
2630 output_operand_lossage ("invalid %%m value");
2632 val
= INT_LOWPART (x
);
2634 /* If the low bit is set and the high bit is not, the value is 31.
2635 If the low bit is zero, the value is the first 1 bit we find from
2637 if ((val
& 1) && val
>= 0)
2642 else if ((val
& 1) == 0)
2644 for (i
= 0; i
< 32; i
++)
2645 if ((val
>>= 1) & 1)
2648 /* If we had ....10, I would be 0. The result should be
2649 30, so we need 30 - i. */
2650 fprintf (file
, "%d", 30 - i
);
2654 /* Otherwise, look for the first 0 bit from the left. The result is its
2655 number minus 1. We know the high-order bit is one. */
2656 for (i
= 0; i
< 32; i
++)
2657 if ((val
<<= 1) >= 0)
2660 fprintf (file
, "%d", i
);
2664 /* Write the number of elements in the vector times 4. */
2665 if (GET_CODE (x
) != PARALLEL
)
2666 output_operand_lossage ("invalid %%N value");
2668 fprintf (file
, "%d", XVECLEN (x
, 0) * 4);
2672 /* Similar, but subtract 1 first. */
2673 if (GET_CODE (x
) != PARALLEL
)
2674 output_operand_lossage ("invalid %%N value");
2676 fprintf (file
, "%d", (XVECLEN (x
, 0) - 1) * 4);
2680 /* X is a CONST_INT that is a power of two. Output the logarithm. */
2682 || (i
= exact_log2 (INT_LOWPART (x
))) < 0)
2683 output_operand_lossage ("invalid %%p value");
2685 fprintf (file
, "%d", i
);
2689 /* The operand must be an indirect memory reference. The result
2690 is the register number. */
2691 if (GET_CODE (x
) != MEM
|| GET_CODE (XEXP (x
, 0)) != REG
2692 || REGNO (XEXP (x
, 0)) >= 32)
2693 output_operand_lossage ("invalid %%P value");
2695 fprintf (file
, "%d", REGNO (XEXP (x
, 0)));
2699 /* X is a CR register. Print the mask for `mtcrf'. */
2700 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2701 output_operand_lossage ("invalid %%R value");
2703 fprintf (file
, "%d", 128 >> (REGNO (x
) - 68));
2707 /* Low 5 bits of 32 - value */
2709 output_operand_lossage ("invalid %%s value");
2711 fprintf (file
, "%d", (32 - INT_LOWPART (x
)) & 31);
2715 /* Write 12 if this jump operation will branch if true, 4 otherwise.
2716 All floating-point operations except NE branch true and integer
2717 EQ, LT, GT, LTU and GTU also branch true. */
2718 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
2719 output_operand_lossage ("invalid %%t value");
2721 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
2722 && GET_CODE (x
) != NE
)
2723 || GET_CODE (x
) == EQ
2724 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
2725 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
2732 /* Opposite of 't': write 4 if this jump operation will branch if true,
2734 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
2735 output_operand_lossage ("invalid %%t value");
2737 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
2738 && GET_CODE (x
) != NE
)
2739 || GET_CODE (x
) == EQ
2740 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
2741 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
2748 /* High-order 16 bits of constant for use in unsigned operand. */
2750 output_operand_lossage ("invalid %%u value");
2752 fprintf (file
, "0x%x", (INT_LOWPART (x
) >> 16) & 0xffff);
2756 /* High-order 16 bits of constant for use in signed operand. */
2758 output_operand_lossage ("invalid %%v value");
2761 int value
= (INT_LOWPART (x
) >> 16) & 0xffff;
2763 /* Solaris assembler doesn't like lis 0,0x80000 */
2764 if (DEFAULT_ABI
== ABI_SOLARIS
&& (value
& 0x8000) != 0)
2765 fprintf (file
, "%d", value
| (~0 << 16));
2767 fprintf (file
, "0x%x", value
);
2772 /* Print `u' if this has an auto-increment or auto-decrement. */
2773 if (GET_CODE (x
) == MEM
2774 && (GET_CODE (XEXP (x
, 0)) == PRE_INC
2775 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
))
2780 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
2783 fprintf (file
, "%d",
2784 (INT_LOWPART (x
) & 0xffff) - 2 * (INT_LOWPART (x
) & 0x8000));
2786 print_operand (file
, x
, 0);
2790 /* If constant, low-order 16 bits of constant, unsigned.
2791 Otherwise, write normally. */
2793 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
2795 print_operand (file
, x
, 0);
2799 if (GET_CODE (x
) == MEM
2800 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x
, 0)))
2805 /* Like 'L', for third word of TImode */
2806 if (GET_CODE (x
) == REG
)
2807 fprintf (file
, "%s", reg_names
[REGNO (x
) + 2]);
2808 else if (GET_CODE (x
) == MEM
)
2810 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2811 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2812 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 8));
2814 output_address (plus_constant (XEXP (x
, 0), 8));
2815 if (small_data_operand (x
, GET_MODE (x
)))
2816 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
2817 reg_names
[SMALL_DATA_REG
]);
2822 /* X is a SYMBOL_REF. Write out the name preceded by a
2823 period and without any trailing data in brackets. Used for function
2824 names. If we are configured for System V (or the embedded ABI) on
2825 the PowerPC, do not emit the period, since those systems do not use
2826 TOCs and the like. */
2827 if (GET_CODE (x
) != SYMBOL_REF
)
2830 if (XSTR (x
, 0)[0] != '.')
2832 switch (DEFAULT_ABI
)
2842 case ABI_AIX_NODESC
:
2851 RS6000_OUTPUT_BASENAME (file
, XSTR (x
, 0));
2855 /* Like 'L', for last word of TImode. */
2856 if (GET_CODE (x
) == REG
)
2857 fprintf (file
, "%s", reg_names
[REGNO (x
) + 3]);
2858 else if (GET_CODE (x
) == MEM
)
2860 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2861 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2862 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 12));
2864 output_address (plus_constant (XEXP (x
, 0), 12));
2865 if (small_data_operand (x
, GET_MODE (x
)))
2866 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
2867 reg_names
[SMALL_DATA_REG
]);
2872 if (GET_CODE (x
) == REG
)
2873 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
2874 else if (GET_CODE (x
) == MEM
)
2876 /* We need to handle PRE_INC and PRE_DEC here, since we need to
2877 know the width from the mode. */
2878 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
)
2879 fprintf (file
, "%d(%d)", GET_MODE_SIZE (GET_MODE (x
)),
2880 REGNO (XEXP (XEXP (x
, 0), 0)));
2881 else if (GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2882 fprintf (file
, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x
)),
2883 REGNO (XEXP (XEXP (x
, 0), 0)));
2885 output_address (XEXP (x
, 0));
2888 output_addr_const (file
, x
);
2892 output_operand_lossage ("invalid %%xn code");
2896 /* Print the address of an operand. */
2899 print_operand_address (file
, x
)
2903 if (GET_CODE (x
) == REG
)
2904 fprintf (file
, "0(%s)", reg_names
[ REGNO (x
) ]);
2905 else if (GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == CONST
|| GET_CODE (x
) == LABEL_REF
)
2907 output_addr_const (file
, x
);
2908 if (small_data_operand (x
, GET_MODE (x
)))
2909 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
2910 reg_names
[SMALL_DATA_REG
]);
2912 #ifdef TARGET_NO_TOC
2913 else if (TARGET_NO_TOC
)
2917 fprintf (file
, "(%s)", reg_names
[ TARGET_MINIMAL_TOC
? 30 : 2 ]);
2919 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == REG
)
2921 if (REGNO (XEXP (x
, 0)) == 0)
2922 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 1)) ],
2923 reg_names
[ REGNO (XEXP (x
, 0)) ]);
2925 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 0)) ],
2926 reg_names
[ REGNO (XEXP (x
, 1)) ]);
2928 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == CONST_INT
)
2929 fprintf (file
, "%d(%s)", INTVAL (XEXP (x
, 1)), reg_names
[ REGNO (XEXP (x
, 0)) ]);
2930 else if (TARGET_ELF
&& !TARGET_64BIT
&& GET_CODE (x
) == LO_SUM
2931 && GET_CODE (XEXP (x
, 0)) == REG
&& CONSTANT_P (XEXP (x
, 1)))
2933 output_addr_const (file
, XEXP (x
, 1));
2934 fprintf (file
, "@l(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
2940 /* This page contains routines that are used to determine what the function
2941 prologue and epilogue code will do and write them out. */
2943 /* Return the first fixed-point register that is required to be saved. 32 if
2947 first_reg_to_save ()
2951 /* Find lowest numbered live register. */
2952 for (first_reg
= 13; first_reg
<= 31; first_reg
++)
2953 if (regs_ever_live
[first_reg
])
2956 /* If profiling, then we must save/restore every register that contains
2957 a parameter before/after the .__mcount call. Use registers from 30 down
2958 to 23 to do this. Don't use the frame pointer in reg 31.
2960 For now, save enough room for all of the parameter registers. */
2961 if (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
2968 /* Similar, for FP regs. */
2971 first_fp_reg_to_save ()
2975 /* Find lowest numbered live register. */
2976 for (first_reg
= 14 + 32; first_reg
<= 63; first_reg
++)
2977 if (regs_ever_live
[first_reg
])
2983 /* Return non-zero if this function makes calls. */
2986 rs6000_makes_calls ()
2990 /* If we are profiling, we will be making a call to __mcount.
2991 Under the System V ABI's, we store the LR directly, so
2992 we don't need to do it here. */
2993 if (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
2996 for (insn
= get_insns (); insn
; insn
= next_insn (insn
))
2997 if (GET_CODE (insn
) == CALL_INSN
)
3004 /* Calculate the stack information for the current function. This is
3005 complicated by having two separate calling sequences, the AIX calling
3006 sequence and the V.4 calling sequence.
3008 AIX stack frames look like:
3010 SP----> +---------------------------------------+
3011 | back chain to caller | 0
3012 +---------------------------------------+
3014 +---------------------------------------+
3016 +---------------------------------------+
3017 | reserved for compilers | 12
3018 +---------------------------------------+
3019 | reserved for binders | 16
3020 +---------------------------------------+
3021 | saved TOC pointer | 20
3022 +---------------------------------------+
3023 | Parameter save area (P) | 24
3024 +---------------------------------------+
3025 | Alloca space (A) | 24+P
3026 +---------------------------------------+
3027 | Local variable space (L) | 24+P+A
3028 +---------------------------------------+
3029 | Float/int conversion temporary (X) | 24+P+A+L
3030 +---------------------------------------+
3031 | Save area for GP registers (G) | 24+P+A+X+L
3032 +---------------------------------------+
3033 | Save area for FP registers (F) | 24+P+A+X+L+G
3034 +---------------------------------------+
3035 old SP->| back chain to caller's caller |
3036 +---------------------------------------+
3038 V.4 stack frames look like:
3040 SP----> +---------------------------------------+
3041 | back chain to caller | 0
3042 +---------------------------------------+
3043 | caller's saved LR | 4
3044 +---------------------------------------+
3045 | Parameter save area (P) | 8
3046 +---------------------------------------+
3047 | Alloca space (A) | 8+P
3048 +---------------------------------------+
3049 | Varargs save area (V) | 8+P+A
3050 +---------------------------------------+
3051 | Local variable space (L) | 8+P+A+V
3052 +---------------------------------------+
3053 | Float/int conversion temporary (X) | 8+P+A+V+L
3054 +---------------------------------------+
3055 | saved CR (C) | 8+P+A+V+L+X
3056 +---------------------------------------+
3057 | Save area for GP registers (G) | 8+P+A+V+L+X+C
3058 +---------------------------------------+
3059 | Save area for FP registers (F) | 8+P+A+V+L+X+C+G
3060 +---------------------------------------+
3061 old SP->| back chain to caller's caller |
3062 +---------------------------------------+
3065 A PowerPC Windows/NT frame looks like:
3067 SP----> +---------------------------------------+
3068 | back chain to caller | 0
3069 +---------------------------------------+
3071 +---------------------------------------+
3073 +---------------------------------------+
3075 +---------------------------------------+
3077 +---------------------------------------+
3079 +---------------------------------------+
3080 | Parameter save area (P) | 24
3081 +---------------------------------------+
3082 | Alloca space (A) | 24+P
3083 +---------------------------------------+
3084 | Local variable space (L) | 24+P+A
3085 +---------------------------------------+
3086 | Float/int conversion temporary (X) | 24+P+A+L
3087 +---------------------------------------+
3088 | Save area for FP registers (F) | 24+P+A+L+X
3089 +---------------------------------------+
3090 | Possible alignment area (Y) | 24+P+A+L+X+F
3091 +---------------------------------------+
3092 | Save area for GP registers (G) | 24+P+A+L+X+F+Y
3093 +---------------------------------------+
3094 | Save area for CR (C) | 24+P+A+L+X+F+Y+G
3095 +---------------------------------------+
3096 | Save area for TOC (T) | 24+P+A+L+X+F+Y+G+C
3097 +---------------------------------------+
3098 | Save area for LR (R) | 24+P+A+L+X+F+Y+G+C+T
3099 +---------------------------------------+
3100 old SP->| back chain to caller's caller |
3101 +---------------------------------------+
3103 For NT, there is no specific order to save the registers, but in
3104 order to support __builtin_return_address, the save area for the
3105 link register needs to be in a known place, so we use -4 off of the
3106 old SP. To support calls through pointers, we also allocate a
3107 fixed slot to store the TOC, -8 off the old SP. */
3109 #ifndef ABI_STACK_BOUNDARY
3110 #define ABI_STACK_BOUNDARY STACK_BOUNDARY
3114 rs6000_stack_info ()
3116 static rs6000_stack_t info
, zero_info
;
3117 rs6000_stack_t
*info_ptr
= &info
;
3118 int reg_size
= TARGET_64BIT
? 8 : 4;
3119 enum rs6000_abi abi
;
3122 /* Zero all fields portably */
3125 /* Select which calling sequence */
3126 info_ptr
->abi
= abi
= DEFAULT_ABI
;
3128 /* Calculate which registers need to be saved & save area size */
3129 info_ptr
->first_gp_reg_save
= first_reg_to_save ();
3130 info_ptr
->gp_size
= reg_size
* (32 - info_ptr
->first_gp_reg_save
);
3132 info_ptr
->first_fp_reg_save
= first_fp_reg_to_save ();
3133 info_ptr
->fp_size
= 8 * (64 - info_ptr
->first_fp_reg_save
);
3135 /* Does this function call anything? */
3136 info_ptr
->calls_p
= rs6000_makes_calls ();
3138 /* Allocate space to save the toc. */
3139 if (abi
== ABI_NT
&& info_ptr
->calls_p
)
3141 info_ptr
->toc_save_p
= 1;
3142 info_ptr
->toc_size
= reg_size
;
3145 /* Does this machine need the float/int conversion area? */
3146 info_ptr
->fpmem_p
= regs_ever_live
[FPMEM_REGNUM
];
3148 /* If this is main and we need to call a function to set things up,
3149 save main's arguments around the call. */
3154 if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl
)), "main") == 0
3155 && DECL_CONTEXT (current_function_decl
) == NULL_TREE
)
3157 info_ptr
->main_p
= 1;
3160 info_ptr
->calls_p
= 1;
3162 if (DECL_ARGUMENTS (current_function_decl
))
3167 info_ptr
->main_save_p
= 1;
3168 info_ptr
->main_size
= 0;
3170 for ((i
= 0), (arg
= DECL_ARGUMENTS (current_function_decl
));
3171 arg
!= NULL_TREE
&& i
< 8;
3172 (arg
= TREE_CHAIN (arg
)), i
++)
3174 info_ptr
->main_size
+= reg_size
;
3182 /* Determine if we need to save the link register */
3183 if (regs_ever_live
[65]
3184 || (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
3185 #ifdef TARGET_RELOCATABLE
3186 || (TARGET_RELOCATABLE
&& (get_pool_size () != 0))
3188 || (info_ptr
->first_fp_reg_save
!= 64
3189 && !FP_SAVE_INLINE (info_ptr
->first_fp_reg_save
))
3190 || (abi
== ABI_V4
&& current_function_calls_alloca
)
3191 || (abi
== ABI_SOLARIS
&& current_function_calls_alloca
)
3192 || info_ptr
->calls_p
)
3194 info_ptr
->lr_save_p
= 1;
3195 regs_ever_live
[65] = 1;
3197 info_ptr
->lr_size
= reg_size
;
3200 /* Determine if we need to save the condition code registers */
3201 if (regs_ever_live
[70] || regs_ever_live
[71] || regs_ever_live
[72])
3203 info_ptr
->cr_save_p
= 1;
3204 if (abi
== ABI_V4
|| abi
== ABI_NT
|| abi
== ABI_SOLARIS
)
3205 info_ptr
->cr_size
= reg_size
;
3208 /* Determine various sizes */
3209 info_ptr
->reg_size
= reg_size
;
3210 info_ptr
->fixed_size
= RS6000_SAVE_AREA
;
3211 info_ptr
->varargs_size
= RS6000_VARARGS_AREA
;
3212 info_ptr
->vars_size
= RS6000_ALIGN (get_frame_size (), 8);
3213 info_ptr
->parm_size
= RS6000_ALIGN (current_function_outgoing_args_size
, 8);
3214 info_ptr
->fpmem_size
= (info_ptr
->fpmem_p
) ? 8 : 0;
3215 info_ptr
->save_size
= RS6000_ALIGN (info_ptr
->fp_size
3219 + info_ptr
->toc_size
3220 + info_ptr
->main_size
, 8);
3222 total_raw_size
= (info_ptr
->vars_size
3223 + info_ptr
->parm_size
3224 + info_ptr
->fpmem_size
3225 + info_ptr
->save_size
3226 + info_ptr
->varargs_size
3227 + info_ptr
->fixed_size
);
3229 info_ptr
->total_size
= RS6000_ALIGN (total_raw_size
, ABI_STACK_BOUNDARY
/ BITS_PER_UNIT
);
3231 /* Determine if we need to allocate any stack frame.
3232 For AIX We need to push the stack if a frame pointer is needed (because
3233 the stack might be dynamically adjusted), if we are debugging, if the
3234 total stack size is more than 220 bytes, or if we make calls.
3236 For V.4 we don't have the stack cushion that AIX uses, but assume that
3237 the debugger can handle stackless frames. */
3239 if (info_ptr
->calls_p
)
3240 info_ptr
->push_p
= 1;
3242 else if (abi
== ABI_V4
|| abi
== ABI_NT
|| abi
== ABI_SOLARIS
)
3243 info_ptr
->push_p
= (total_raw_size
> info_ptr
->fixed_size
3244 || (abi
== ABI_NT
? info_ptr
->lr_save_p
3245 : info_ptr
->calls_p
));
3248 info_ptr
->push_p
= (frame_pointer_needed
3249 || write_symbols
!= NO_DEBUG
3250 || info_ptr
->total_size
> 220);
3252 /* Calculate the offsets */
3260 case ABI_AIX_NODESC
:
3261 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
3262 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
3263 info_ptr
->main_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->main_size
;
3264 info_ptr
->cr_save_offset
= 4;
3265 info_ptr
->lr_save_offset
= 8;
3270 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
3271 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
3272 info_ptr
->cr_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->cr_size
;
3273 info_ptr
->toc_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->toc_size
;
3274 info_ptr
->main_save_offset
= info_ptr
->toc_save_offset
- info_ptr
->main_size
;
3275 info_ptr
->lr_save_offset
= reg_size
;
3279 info_ptr
->lr_save_offset
= -4;
3280 info_ptr
->toc_save_offset
= info_ptr
->lr_save_offset
- info_ptr
->lr_size
;
3281 info_ptr
->cr_save_offset
= info_ptr
->toc_save_offset
- info_ptr
->toc_size
;
3282 info_ptr
->gp_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->cr_size
- info_ptr
->gp_size
+ reg_size
;
3283 info_ptr
->fp_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->fp_size
;
3284 if (info_ptr
->fp_size
&& ((- info_ptr
->fp_save_offset
) % 8) != 0)
3285 info_ptr
->fp_save_offset
-= 4;
3287 info_ptr
->main_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->main_size
;
3291 if (info_ptr
->fpmem_p
)
3292 info_ptr
->fpmem_offset
= STARTING_FRAME_OFFSET
- info_ptr
->total_size
+ info_ptr
->vars_size
;
3294 /* Zero offsets if we're not saving those registers */
3295 if (!info_ptr
->fp_size
)
3296 info_ptr
->fp_save_offset
= 0;
3298 if (!info_ptr
->gp_size
)
3299 info_ptr
->gp_save_offset
= 0;
3301 if (!info_ptr
->lr_save_p
)
3302 info_ptr
->lr_save_offset
= 0;
3304 if (!info_ptr
->cr_save_p
)
3305 info_ptr
->cr_save_offset
= 0;
3307 if (!info_ptr
->toc_save_p
)
3308 info_ptr
->toc_save_offset
= 0;
3310 if (!info_ptr
->main_save_p
)
3311 info_ptr
->main_save_offset
= 0;
3313 if (!info_ptr
->fpmem_p
)
3314 info_ptr
->fpmem_offset
= 0;
3317 rs6000_fpmem_size
= info_ptr
->fpmem_size
;
3318 rs6000_fpmem_offset
= info_ptr
->total_size
+ info_ptr
->fpmem_offset
;
3325 debug_stack_info (info
)
3326 rs6000_stack_t
*info
;
3331 info
= rs6000_stack_info ();
3333 fprintf (stderr
, "\nStack information for function %s:\n",
3334 ((current_function_decl
&& DECL_NAME (current_function_decl
))
3335 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl
))
3340 default: abi_string
= "Unknown"; break;
3341 case ABI_NONE
: abi_string
= "NONE"; break;
3342 case ABI_AIX
: abi_string
= "AIX"; break;
3343 case ABI_AIX_NODESC
: abi_string
= "AIX"; break;
3344 case ABI_V4
: abi_string
= "V.4"; break;
3345 case ABI_SOLARIS
: abi_string
= "Solaris"; break;
3346 case ABI_NT
: abi_string
= "NT"; break;
3349 fprintf (stderr
, "\tABI = %5s\n", abi_string
);
3351 if (info
->first_gp_reg_save
!= 32)
3352 fprintf (stderr
, "\tfirst_gp_reg_save = %5d\n", info
->first_gp_reg_save
);
3354 if (info
->first_fp_reg_save
!= 64)
3355 fprintf (stderr
, "\tfirst_fp_reg_save = %5d\n", info
->first_fp_reg_save
);
3357 if (info
->lr_save_p
)
3358 fprintf (stderr
, "\tlr_save_p = %5d\n", info
->lr_save_p
);
3360 if (info
->cr_save_p
)
3361 fprintf (stderr
, "\tcr_save_p = %5d\n", info
->cr_save_p
);
3363 if (info
->toc_save_p
)
3364 fprintf (stderr
, "\ttoc_save_p = %5d\n", info
->toc_save_p
);
3367 fprintf (stderr
, "\tpush_p = %5d\n", info
->push_p
);
3370 fprintf (stderr
, "\tcalls_p = %5d\n", info
->calls_p
);
3373 fprintf (stderr
, "\tmain_p = %5d\n", info
->main_p
);
3375 if (info
->main_save_p
)
3376 fprintf (stderr
, "\tmain_save_p = %5d\n", info
->main_save_p
);
3379 fprintf (stderr
, "\tfpmem_p = %5d\n", info
->fpmem_p
);
3381 if (info
->gp_save_offset
)
3382 fprintf (stderr
, "\tgp_save_offset = %5d\n", info
->gp_save_offset
);
3384 if (info
->fp_save_offset
)
3385 fprintf (stderr
, "\tfp_save_offset = %5d\n", info
->fp_save_offset
);
3387 if (info
->lr_save_offset
)
3388 fprintf (stderr
, "\tlr_save_offset = %5d\n", info
->lr_save_offset
);
3390 if (info
->cr_save_offset
)
3391 fprintf (stderr
, "\tcr_save_offset = %5d\n", info
->cr_save_offset
);
3393 if (info
->toc_save_offset
)
3394 fprintf (stderr
, "\ttoc_save_offset = %5d\n", info
->toc_save_offset
);
3396 if (info
->varargs_save_offset
)
3397 fprintf (stderr
, "\tvarargs_save_offset = %5d\n", info
->varargs_save_offset
);
3399 if (info
->main_save_offset
)
3400 fprintf (stderr
, "\tmain_save_offset = %5d\n", info
->main_save_offset
);
3402 if (info
->fpmem_offset
)
3403 fprintf (stderr
, "\tfpmem_offset = %5d\n", info
->fpmem_offset
);
3405 if (info
->total_size
)
3406 fprintf (stderr
, "\ttotal_size = %5d\n", info
->total_size
);
3408 if (info
->varargs_size
)
3409 fprintf (stderr
, "\tvarargs_size = %5d\n", info
->varargs_size
);
3411 if (info
->vars_size
)
3412 fprintf (stderr
, "\tvars_size = %5d\n", info
->vars_size
);
3414 if (info
->parm_size
)
3415 fprintf (stderr
, "\tparm_size = %5d\n", info
->parm_size
);
3417 if (info
->fpmem_size
)
3418 fprintf (stderr
, "\tfpmem_size = %5d\n", info
->fpmem_size
);
3420 if (info
->fixed_size
)
3421 fprintf (stderr
, "\tfixed_size = %5d\n", info
->fixed_size
);
3424 fprintf (stderr
, "\tgp_size = %5d\n", info
->gp_size
);
3427 fprintf (stderr
, "\tfp_size = %5d\n", info
->fp_size
);
3430 fprintf (stderr
, "\tlr_size = %5d\n", info
->cr_size
);
3433 fprintf (stderr
, "\tcr_size = %5d\n", info
->cr_size
);
3436 fprintf (stderr
, "\ttoc_size = %5d\n", info
->toc_size
);
3438 if (info
->main_size
)
3439 fprintf (stderr
, "\tmain_size = %5d\n", info
->main_size
);
3441 if (info
->save_size
)
3442 fprintf (stderr
, "\tsave_size = %5d\n", info
->save_size
);
3444 if (info
->reg_size
!= 4)
3445 fprintf (stderr
, "\treg_size = %5d\n", info
->reg_size
);
3447 fprintf (stderr
, "\n");
3450 /* Write out an instruction to load the TOC_TABLE address into register 30.
3451 This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is
3455 rs6000_output_load_toc_table (file
, reg
)
3462 if (TARGET_RELOCATABLE
)
3464 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
3465 fprintf (file
, "\tbl ");
3466 assemble_name (file
, buf
);
3467 fprintf (file
, "\n");
3469 /* possibly create the toc section */
3470 if (!toc_initialized
)
3473 function_section (current_function_decl
);
3476 /* If not first call in this function, we need to put the
3477 different between .LCTOC1 and the address we get to right
3478 after the bl. It will mess up disassembling the instructions
3479 but that can't be helped. We will later need to bias the
3480 address before loading. */
3481 if (rs6000_pic_func_labelno
!= rs6000_pic_labelno
)
3483 char *init_ptr
= (TARGET_64BIT
) ? ".quad" : ".long";
3486 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCL", rs6000_pic_labelno
);
3488 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 1);
3489 STRIP_NAME_ENCODING (buf_ptr
, buf
);
3490 fprintf (file
, "\t%s %s-", init_ptr
, buf_ptr
);
3492 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
3493 fprintf (file
, "%s\n", buf_ptr
);
3496 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCF", rs6000_pic_labelno
);
3497 fprintf (file
, "\tmflr %s\n", reg_names
[reg
]);
3499 if (rs6000_pic_func_labelno
!= rs6000_pic_labelno
)
3501 if (TARGET_POWERPC64
)
3502 fprintf (file
, "\taddi %s,%s,8\n", reg_names
[reg
], reg_names
[reg
]);
3503 else if (TARGET_NEW_MNEMONICS
)
3504 fprintf (file
, "\taddi %s,%s,4\n", reg_names
[reg
], reg_names
[reg
]);
3506 fprintf (file
, "\tcal %s,4(%s)\n", reg_names
[reg
], reg_names
[reg
]);
3509 if (TARGET_POWERPC64
)
3510 fprintf (file
, "\tld");
3511 else if (TARGET_NEW_MNEMONICS
)
3512 fprintf (file
, "\tlwz");
3514 fprintf (file
, "\tl");
3516 fprintf (file
, " %s,(", reg_names
[0]);
3517 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCL", rs6000_pic_labelno
);
3518 assemble_name (file
, buf
);
3519 fprintf (file
, "-");
3520 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
3521 assemble_name (file
, buf
);
3522 fprintf (file
, ")(%s)\n", reg_names
[reg
]);
3523 asm_fprintf (file
, "\t{cax|add} %s,%s,%s\n",
3524 reg_names
[reg
], reg_names
[0], reg_names
[reg
]);
3525 rs6000_pic_labelno
++;
3527 else if (!TARGET_64BIT
)
3529 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 1);
3530 asm_fprintf (file
, "\t{cau|addis} %s,%s,", reg_names
[reg
], reg_names
[0]);
3531 assemble_name (file
, buf
);
3532 asm_fprintf (file
, "@ha\n");
3533 if (TARGET_NEW_MNEMONICS
)
3535 asm_fprintf (file
, "\taddi %s,%s,", reg_names
[reg
], reg_names
[reg
]);
3536 assemble_name (file
, buf
);
3537 asm_fprintf (file
, "@l\n");
3541 asm_fprintf (file
, "\tcal %s,", reg_names
[reg
]);
3542 assemble_name (file
, buf
);
3543 asm_fprintf (file
, "@l(%s)\n", reg_names
[reg
]);
3549 #else /* !USING_SVR4_H */
3550 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 0);
3551 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[reg
]);
3552 assemble_name (file
, buf
);
3553 asm_fprintf (file
, "(%s)\n", reg_names
[2]);
3554 #endif /* USING_SVR4_H */
3558 /* Emit the correct code for allocating stack space. If COPY_R12, make sure a copy
3559 of the old frame is left in r12. */
3562 rs6000_allocate_stack_space (file
, size
, copy_r12
)
3567 int neg_size
= -size
;
3572 (TARGET_32BIT
) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n",
3573 reg_names
[1], neg_size
, reg_names
[1]);
3577 fprintf (file
, "\tmr %s,%s\n", reg_names
[12], reg_names
[1]);
3579 asm_fprintf (file
, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3580 reg_names
[0], (neg_size
>> 16) & 0xffff,
3581 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
3583 (TARGET_32BIT
) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n",
3584 reg_names
[1], reg_names
[1], reg_names
[0]);
3589 fprintf (file
, "\tmr %s,%s\n", reg_names
[12], reg_names
[1]);
3592 if (TARGET_NEW_MNEMONICS
)
3593 fprintf (file
, "\taddi %s,%s,%d\n", reg_names
[1], reg_names
[1], neg_size
);
3595 fprintf (file
, "\tcal %s,%d(%s)\n", reg_names
[1], neg_size
, reg_names
[1]);
3599 asm_fprintf (file
, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3600 reg_names
[0], (neg_size
>> 16) & 0xffff,
3601 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
3602 asm_fprintf (file
, "\t{cax|add} %s,%s,%s\n", reg_names
[1],
3603 reg_names
[0], reg_names
[1]);
3607 (TARGET_32BIT
) ? "\t{st|stw} %s,0(%s)\n" : "\tstd %s,0(%s)\n",
3608 reg_names
[12], reg_names
[1]);
3613 /* Write function prologue. */
3615 output_prolog (file
, size
)
3619 rs6000_stack_t
*info
= rs6000_stack_info ();
3620 int reg_size
= info
->reg_size
;
3628 store_reg
= "\t{st|stw} %s,%d(%s)\n";
3629 load_reg
= "\t{l|lwz} %s,%d(%s)\n";
3633 store_reg
= "\tstd %s,%d(%s)\n";
3634 load_reg
= "\tlld %s,%d(%s)\n";
3637 if (TARGET_DEBUG_STACK
)
3638 debug_stack_info (info
);
3640 /* Write .extern for any function we will call to save and restore fp
3642 if (info
->first_fp_reg_save
< 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
3643 fprintf (file
, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
3644 SAVE_FP_PREFIX
, info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
,
3645 RESTORE_FP_PREFIX
, info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
3647 /* Write .extern for truncation routines, if needed. */
3648 if (rs6000_trunc_used
&& ! trunc_defined
)
3650 fprintf (file
, "\t.extern .%s\n\t.extern .%s\n",
3651 RS6000_ITRUNC
, RS6000_UITRUNC
);
3655 /* Write .extern for AIX common mode routines, if needed. */
3656 if (! TARGET_POWER
&& ! TARGET_POWERPC
&& ! common_mode_defined
)
3658 fputs ("\t.extern __mulh\n", file
);
3659 fputs ("\t.extern __mull\n", file
);
3660 fputs ("\t.extern __divss\n", file
);
3661 fputs ("\t.extern __divus\n", file
);
3662 fputs ("\t.extern __quoss\n", file
);
3663 fputs ("\t.extern __quous\n", file
);
3664 common_mode_defined
= 1;
3667 /* For V.4, update stack before we do any saving and set back pointer. */
3668 if (info
->push_p
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
3670 if (info
->total_size
< 32767)
3671 sp_offset
= info
->total_size
;
3674 rs6000_allocate_stack_space (file
, info
->total_size
, sp_reg
== 12);
3677 /* If we use the link register, get it into r0. */
3678 if (info
->lr_save_p
)
3679 asm_fprintf (file
, "\tmflr %s\n", reg_names
[0]);
3681 /* If we need to save CR, put it into r12. */
3682 if (info
->cr_save_p
&& sp_reg
!= 12)
3683 asm_fprintf (file
, "\tmfcr %s\n", reg_names
[12]);
3685 /* Do any required saving of fpr's. If only one or two to save, do it
3686 ourself. Otherwise, call function. Note that since they are statically
3687 linked, we do not need a nop following them. */
3688 if (FP_SAVE_INLINE (info
->first_fp_reg_save
))
3690 int regno
= info
->first_fp_reg_save
;
3691 int loc
= info
->fp_save_offset
+ sp_offset
;
3693 for ( ; regno
< 64; regno
++, loc
+= 8)
3694 asm_fprintf (file
, "\tstfd %s,%d(%s)\n", reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3696 else if (info
->first_fp_reg_save
!= 64)
3697 asm_fprintf (file
, "\tbl %s%d%s\n", SAVE_FP_PREFIX
,
3698 info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
);
3700 /* Now save gpr's. */
3701 if (! TARGET_MULTIPLE
|| info
->first_gp_reg_save
== 31 || TARGET_64BIT
)
3703 int regno
= info
->first_gp_reg_save
;
3704 int loc
= info
->gp_save_offset
+ sp_offset
;
3706 for ( ; regno
< 32; regno
++, loc
+= reg_size
)
3707 asm_fprintf (file
, store_reg
, reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3710 else if (info
->first_gp_reg_save
!= 32)
3711 asm_fprintf (file
, "\t{stm|stmw} %s,%d(%s)\n",
3712 reg_names
[info
->first_gp_reg_save
],
3713 info
->gp_save_offset
+ sp_offset
,
3716 /* Save main's arguments if we need to call a function */
3718 if (info
->main_save_p
)
3721 int loc
= info
->main_save_offset
+ sp_offset
;
3722 int size
= info
->main_size
;
3724 for (regno
= 3; size
> 0; regno
++, loc
-= reg_size
, size
-= reg_size
)
3725 asm_fprintf (file
, store_reg
, reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3729 /* Save lr if we used it. */
3730 if (info
->lr_save_p
)
3731 asm_fprintf (file
, store_reg
, reg_names
[0], info
->lr_save_offset
+ sp_offset
,
3734 /* Save CR if we use any that must be preserved. */
3735 if (info
->cr_save_p
)
3737 if (sp_reg
== 12) /* If r12 is used to hold the original sp, copy cr now */
3739 asm_fprintf (file
, "\tmfcr %s\n", reg_names
[0]);
3740 asm_fprintf (file
, store_reg
, reg_names
[0],
3741 info
->cr_save_offset
+ sp_offset
,
3745 asm_fprintf (file
, store_reg
, reg_names
[12], info
->cr_save_offset
+ sp_offset
,
3749 /* NT needs us to probe the stack frame every 4k pages for large frames, so
3751 if (DEFAULT_ABI
== ABI_NT
&& info
->total_size
> 4096)
3753 if (info
->total_size
< 32768)
3755 int probe_offset
= 4096;
3756 while (probe_offset
< info
->total_size
)
3758 asm_fprintf (file
, "\t{l|lwz} %s,%d(%s)\n", reg_names
[0], -probe_offset
, reg_names
[1]);
3759 probe_offset
+= 4096;
3764 int probe_iterations
= info
->total_size
/ 4096;
3765 static int probe_labelno
= 0;
3768 if (probe_iterations
< 32768)
3769 asm_fprintf (file
, "\tli %s,%d\n", reg_names
[12], probe_iterations
);
3772 asm_fprintf (file
, "\tlis %s,%d\n", reg_names
[12], probe_iterations
>> 16);
3773 if (probe_iterations
& 0xffff)
3774 asm_fprintf (file
, "\tori %s,%s,%d\n", reg_names
[12], reg_names
[12],
3775 probe_iterations
& 0xffff);
3777 asm_fprintf (file
, "\tmtctr %s\n", reg_names
[12]);
3778 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[12], reg_names
[1]);
3779 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCprobe", probe_labelno
);
3780 asm_fprintf (file
, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names
[0], reg_names
[12]);
3781 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCprobe", probe_labelno
++);
3782 fputs ("\tbdnz ", file
);
3783 assemble_name (file
, buf
);
3788 /* Update stack and set back pointer unless this is V.4, which was done previously */
3789 if (info
->push_p
&& DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
3790 rs6000_allocate_stack_space (file
, info
->total_size
, FALSE
);
3792 /* Set frame pointer, if needed. */
3793 if (frame_pointer_needed
)
3794 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[31], reg_names
[1]);
3797 /* If we need to call a function to set things up for main, do so now
3798 before dealing with the TOC. */
3803 switch (DEFAULT_ABI
)
3805 case ABI_AIX
: prefix
= "."; break;
3806 case ABI_NT
: prefix
= ".."; break;
3809 fprintf (file
, "\tbl %s%s\n", prefix
, NAME__MAIN
);
3810 #ifdef RS6000_CALL_GLUE2
3811 fprintf (file
, "\t%s%s%s\n", RS6000_CALL_GLUE2
, prefix
, NAME_MAIN
);
3813 #ifdef RS6000_CALL_GLUE
3814 if (DEFAULT_ABI
== ABI_AIX
|| DEFAULT_ABI
== ABI_NT
)
3815 fprintf (file
, "\t%s\n", RS6000_CALL_GLUE
);
3819 if (info
->main_save_p
)
3823 int size
= info
->main_size
;
3825 if (info
->total_size
< 32767)
3827 loc
= info
->total_size
+ info
->main_save_offset
;
3828 for (regno
= 3; size
> 0; regno
++, size
-= reg_size
, loc
-= reg_size
)
3829 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[1]);
3833 int neg_size
= info
->main_save_offset
- info
->total_size
;
3835 asm_fprintf (file
, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3836 reg_names
[0], (neg_size
>> 16) & 0xffff,
3837 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
3839 asm_fprintf (file
, "\t{sf|subf} %s,%s,%s\n", reg_names
[0], reg_names
[0],
3842 for (regno
= 3; size
> 0; regno
++, size
-= reg_size
, loc
-= reg_size
)
3843 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[0]);
3850 /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the
3851 TOC_TABLE address into register 30. */
3852 if (TARGET_TOC
&& TARGET_MINIMAL_TOC
&& get_pool_size () != 0)
3856 rs6000_pic_func_labelno
= rs6000_pic_labelno
;
3858 rs6000_output_load_toc_table (file
, 30);
3861 if (DEFAULT_ABI
== ABI_NT
)
3863 assemble_name (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
3864 fputs (".b:\n", file
);
3868 /* Write function epilogue. */
3871 output_epilog (file
, size
)
3875 rs6000_stack_t
*info
= rs6000_stack_info ();
3876 char *load_reg
= (TARGET_32BIT
) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n";
3877 rtx insn
= get_last_insn ();
3881 /* If the last insn was a BARRIER, we don't have to write anything except
3883 if (GET_CODE (insn
) == NOTE
)
3884 insn
= prev_nonnote_insn (insn
);
3885 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
3887 /* If we have a frame pointer, a call to alloca, or a large stack
3888 frame, restore the old stack pointer using the backchain. Otherwise,
3889 we know what size to update it with. */
3890 if (frame_pointer_needed
|| current_function_calls_alloca
3891 || info
->total_size
> 32767)
3893 /* Under V.4, don't reset the stack pointer until after we're done
3894 loading the saved registers. */
3895 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
3898 asm_fprintf (file
, load_reg
, reg_names
[sp_reg
], 0, reg_names
[1]);
3900 else if (info
->push_p
)
3902 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
3903 sp_offset
= info
->total_size
;
3904 else if (TARGET_NEW_MNEMONICS
)
3905 asm_fprintf (file
, "\taddi %s,%s,%d\n", reg_names
[1], reg_names
[1], info
->total_size
);
3907 asm_fprintf (file
, "\tcal %s,%d(%s)\n", reg_names
[1], info
->total_size
, reg_names
[1]);
3910 /* Get the old lr if we saved it. */
3911 if (info
->lr_save_p
)
3912 asm_fprintf (file
, load_reg
, reg_names
[0], info
->lr_save_offset
+ sp_offset
, reg_names
[sp_reg
]);
3914 /* Get the old cr if we saved it. */
3915 if (info
->cr_save_p
)
3916 asm_fprintf (file
, load_reg
, reg_names
[12], info
->cr_save_offset
+ sp_offset
, reg_names
[sp_reg
]);
3918 /* Set LR here to try to overlap restores below. */
3919 if (info
->lr_save_p
)
3920 asm_fprintf (file
, "\tmtlr %s\n", reg_names
[0]);
3922 /* Restore gpr's. */
3923 if (! TARGET_MULTIPLE
|| info
->first_gp_reg_save
== 31 || TARGET_64BIT
)
3925 int regno
= info
->first_gp_reg_save
;
3926 int loc
= info
->gp_save_offset
+ sp_offset
;
3927 int reg_size
= (TARGET_32BIT
) ? 4 : 8;
3929 for ( ; regno
< 32; regno
++, loc
+= reg_size
)
3930 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3933 else if (info
->first_gp_reg_save
!= 32)
3934 asm_fprintf (file
, "\t{lm|lmw} %s,%d(%s)\n",
3935 reg_names
[info
->first_gp_reg_save
],
3936 info
->gp_save_offset
+ sp_offset
,
3939 /* Restore fpr's if we can do it without calling a function. */
3940 if (FP_SAVE_INLINE (info
->first_fp_reg_save
))
3942 int regno
= info
->first_fp_reg_save
;
3943 int loc
= info
->fp_save_offset
+ sp_offset
;
3945 for ( ; regno
< 64; regno
++, loc
+= 8)
3946 asm_fprintf (file
, "\tlfd %s,%d(%s)\n", reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3949 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4
3951 if (info
->cr_save_p
)
3952 asm_fprintf (file
, "\tmtcrf %d,%s\n",
3953 (regs_ever_live
[70] != 0) * 0x20
3954 + (regs_ever_live
[71] != 0) * 0x10
3955 + (regs_ever_live
[72] != 0) * 0x8, reg_names
[12]);
3957 /* If this is V.4, unwind the stack pointer after all of the loads have been done */
3960 if (TARGET_NEW_MNEMONICS
)
3961 asm_fprintf (file
, "\taddi %s,%s,%d\n", reg_names
[1], reg_names
[1], sp_offset
);
3963 asm_fprintf (file
, "\tcal %s,%d(%s)\n", reg_names
[1], sp_offset
, reg_names
[1]);
3965 else if (sp_reg
!= 1)
3966 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[1], reg_names
[sp_reg
]);
3968 /* If we have to restore more than two FP registers, branch to the
3969 restore function. It will return to our caller. */
3970 if (info
->first_fp_reg_save
!= 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
3971 asm_fprintf (file
, "\tb %s%d%s\n", RESTORE_FP_PREFIX
,
3972 info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
3974 asm_fprintf (file
, "\t{br|blr}\n");
3977 /* Output a traceback table here. See /usr/include/sys/debug.h for info
3980 We don't output a traceback table if -finhibit-size-directive was
3981 used. The documentation for -finhibit-size-directive reads
3982 ``don't output a @code{.size} assembler directive, or anything
3983 else that would cause trouble if the function is split in the
3984 middle, and the two halves are placed at locations far apart in
3985 memory.'' The traceback table has this property, since it
3986 includes the offset from the start of the function to the
3987 traceback table itself.
3989 System V.4 Powerpc's (and the embedded ABI derived from it) use a
3990 different traceback table. */
3991 if (DEFAULT_ABI
== ABI_AIX
&& ! flag_inhibit_size_directive
)
3993 char *fname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
3994 int fixed_parms
, float_parms
, parm_info
;
3997 while (*fname
== '.') /* V.4 encodes . in the name */
4000 /* Need label immediately before tbtab, so we can compute its offset
4001 from the function start. */
4004 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
4005 ASM_OUTPUT_LABEL (file
, fname
);
4007 /* The .tbtab pseudo-op can only be used for the first eight
4008 expressions, since it can't handle the possibly variable
4009 length fields that follow. However, if you omit the optional
4010 fields, the assembler outputs zeros for all optional fields
4011 anyways, giving each variable length field is minimum length
4012 (as defined in sys/debug.h). Thus we can not use the .tbtab
4013 pseudo-op at all. */
4015 /* An all-zero word flags the start of the tbtab, for debuggers
4016 that have to find it by searching forward from the entry
4017 point or from the current pc. */
4018 fputs ("\t.long 0\n", file
);
4020 /* Tbtab format type. Use format type 0. */
4021 fputs ("\t.byte 0,", file
);
4023 /* Language type. Unfortunately, there doesn't seem to be any
4024 official way to get this info, so we use language_string. C
4025 is 0. C++ is 9. No number defined for Obj-C, so use the
4026 value for C for now. */
4027 if (! strcmp (language_string
, "GNU C")
4028 || ! strcmp (language_string
, "GNU Obj-C"))
4030 else if (! strcmp (language_string
, "GNU F77"))
4032 else if (! strcmp (language_string
, "GNU Ada"))
4034 else if (! strcmp (language_string
, "GNU Pascal"))
4036 else if (! strcmp (language_string
, "GNU C++"))
4040 fprintf (file
, "%d,", i
);
4042 /* 8 single bit fields: global linkage (not set for C extern linkage,
4043 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
4044 from start of procedure stored in tbtab, internal function, function
4045 has controlled storage, function has no toc, function uses fp,
4046 function logs/aborts fp operations. */
4047 /* Assume that fp operations are used if any fp reg must be saved. */
4048 fprintf (file
, "%d,", (1 << 5) | ((info
->first_fp_reg_save
!= 64) << 1));
4050 /* 6 bitfields: function is interrupt handler, name present in
4051 proc table, function calls alloca, on condition directives
4052 (controls stack walks, 3 bits), saves condition reg, saves
4054 /* The `function calls alloca' bit seems to be set whenever reg 31 is
4055 set up as a frame pointer, even when there is no alloca call. */
4056 fprintf (file
, "%d,",
4057 ((1 << 6) | (frame_pointer_needed
<< 5)
4058 | (info
->cr_save_p
<< 1) | (info
->lr_save_p
)));
4060 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
4062 fprintf (file
, "%d,",
4063 (info
->push_p
<< 7) | (64 - info
->first_fp_reg_save
));
4065 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
4066 fprintf (file
, "%d,", (32 - first_reg_to_save ()));
4069 /* Compute the parameter info from the function decl argument
4072 int next_parm_info_bit
;
4074 next_parm_info_bit
= 31;
4079 for (decl
= DECL_ARGUMENTS (current_function_decl
);
4080 decl
; decl
= TREE_CHAIN (decl
))
4082 rtx parameter
= DECL_INCOMING_RTL (decl
);
4083 enum machine_mode mode
= GET_MODE (parameter
);
4085 if (GET_CODE (parameter
) == REG
)
4087 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
4095 else if (mode
== DFmode
)
4100 /* If only one bit will fit, don't or in this entry. */
4101 if (next_parm_info_bit
> 0)
4102 parm_info
|= (bits
<< (next_parm_info_bit
- 1));
4103 next_parm_info_bit
-= 2;
4107 fixed_parms
+= ((GET_MODE_SIZE (mode
)
4108 + (UNITS_PER_WORD
- 1))
4110 next_parm_info_bit
-= 1;
4116 /* Number of fixed point parameters. */
4117 /* This is actually the number of words of fixed point parameters; thus
4118 an 8 byte struct counts as 2; and thus the maximum value is 8. */
4119 fprintf (file
, "%d,", fixed_parms
);
4121 /* 2 bitfields: number of floating point parameters (7 bits), parameters
4123 /* This is actually the number of fp registers that hold parameters;
4124 and thus the maximum value is 13. */
4125 /* Set parameters on stack bit if parameters are not in their original
4126 registers, regardless of whether they are on the stack? Xlc
4127 seems to set the bit when not optimizing. */
4128 fprintf (file
, "%d\n", ((float_parms
<< 1) | (! optimize
)));
4130 /* Optional fields follow. Some are variable length. */
4132 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
4134 /* There is an entry for each parameter in a register, in the order that
4135 they occur in the parameter list. Any intervening arguments on the
4136 stack are ignored. If the list overflows a long (max possible length
4137 34 bits) then completely leave off all elements that don't fit. */
4138 /* Only emit this long if there was at least one parameter. */
4139 if (fixed_parms
|| float_parms
)
4140 fprintf (file
, "\t.long %d\n", parm_info
);
4142 /* Offset from start of code to tb table. */
4143 fputs ("\t.long ", file
);
4144 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
4145 RS6000_OUTPUT_BASENAME (file
, fname
);
4147 RS6000_OUTPUT_BASENAME (file
, fname
);
4150 /* Interrupt handler mask. */
4151 /* Omit this long, since we never set the interrupt handler bit
4154 /* Number of CTL (controlled storage) anchors. */
4155 /* Omit this long, since the has_ctl bit is never set above. */
4157 /* Displacement into stack of each CTL anchor. */
4158 /* Omit this list of longs, because there are no CTL anchors. */
4160 /* Length of function name. */
4161 fprintf (file
, "\t.short %d\n", strlen (fname
));
4163 /* Function name. */
4164 assemble_string (fname
, strlen (fname
));
4166 /* Register for alloca automatic storage; this is always reg 31.
4167 Only emit this if the alloca bit was set above. */
4168 if (frame_pointer_needed
)
4169 fputs ("\t.byte 31\n", file
);
4172 if (DEFAULT_ABI
== ABI_NT
)
4174 RS6000_OUTPUT_BASENAME (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
4175 fputs (".e:\nFE_MOT_RESVD..", file
);
4176 RS6000_OUTPUT_BASENAME (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
4177 fputs (":\n", file
);
4181 /* Output a TOC entry. We derive the entry name from what is
4185 output_toc (file
, x
, labelno
)
4199 /* if we're going to put a double constant in the TOC, make sure it's
4200 aligned properly when strict alignment is on. */
4201 if (GET_CODE (x
) == CONST_DOUBLE
4203 && GET_MODE (x
) == DFmode
4204 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
)) {
4205 ASM_OUTPUT_ALIGN (file
, 3);
4209 if (TARGET_ELF
&& TARGET_MINIMAL_TOC
)
4211 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LC");
4212 fprintf (file
, "%d = .-", labelno
);
4213 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LCTOC");
4214 fputs ("1\n", file
);
4217 ASM_OUTPUT_INTERNAL_LABEL (file
, "LC", labelno
);
4219 /* Handle FP constants specially. Note that if we have a minimal
4220 TOC, things we put here aren't actually in the TOC, so we can allow
4222 if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == DFmode
4223 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
4228 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
4229 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
4230 if (TARGET_MINIMAL_TOC
)
4231 fprintf (file
, "\t.long %ld\n\t.long %ld\n", k
[0], k
[1]);
4233 fprintf (file
, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n",
4234 k
[0], k
[1], k
[0], k
[1]);
4237 else if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == SFmode
4238 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
4243 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
4244 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
4246 if (TARGET_MINIMAL_TOC
)
4247 fprintf (file
, "\t.long %ld\n", l
);
4249 fprintf (file
, "\t.tc FS_%lx[TC],%ld\n", l
, l
);
4252 else if (GET_MODE (x
) == DImode
4253 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
4254 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
4259 if (GET_CODE (x
) == CONST_DOUBLE
)
4261 low
= CONST_DOUBLE_LOW (x
);
4262 high
= CONST_DOUBLE_HIGH (x
);
4265 #if HOST_BITS_PER_WIDE_INT == 32
4268 high
= (low
< 0) ? ~0 : 0;
4272 low
= INTVAL (x
) & 0xffffffff;
4273 high
= (HOST_WIDE_INT
) INTVAL (x
) >> 32;
4277 if (TARGET_MINIMAL_TOC
)
4278 fprintf (file
, "\t.long %ld\n\t.long %ld\n", (long)high
, (long)low
);
4280 fprintf (file
, "\t.tc ID_%lx_%lx[TC],%ld,%ld\n",
4281 (long)high
, (long)low
, (long)high
, (long)low
);
4285 if (GET_CODE (x
) == CONST
)
4287 base
= XEXP (XEXP (x
, 0), 0);
4288 offset
= INTVAL (XEXP (XEXP (x
, 0), 1));
4291 if (GET_CODE (base
) == SYMBOL_REF
)
4292 name
= XSTR (base
, 0);
4293 else if (GET_CODE (base
) == LABEL_REF
)
4294 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (XEXP (base
, 0)));
4295 else if (GET_CODE (base
) == CODE_LABEL
)
4296 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (base
));
4300 STRIP_NAME_ENCODING (real_name
, name
);
4301 if (TARGET_MINIMAL_TOC
)
4302 fputs ("\t.long ", file
);
4305 fprintf (file
, "\t.tc %s", real_name
);
4308 fprintf (file
, ".N%d", - offset
);
4310 fprintf (file
, ".P%d", offset
);
4312 fputs ("[TC],", file
);
4315 /* Currently C++ toc references to vtables can be emitted before it
4316 is decided whether the vtable is public or private. If this is
4317 the case, then the linker will eventually complain that there is
4318 a TOC reference to an unknown section. Thus, for vtables only,
4319 we emit the TOC reference to reference the symbol and not the
4321 if (!strncmp ("_vt.", name
, 4))
4323 RS6000_OUTPUT_BASENAME (file
, name
);
4325 fprintf (file
, "%d", offset
);
4326 else if (offset
> 0)
4327 fprintf (file
, "+%d", offset
);
4330 output_addr_const (file
, x
);
4334 /* Output an assembler pseudo-op to write an ASCII string of N characters
4335 starting at P to FILE.
4337 On the RS/6000, we have to do this using the .byte operation and
4338 write out special characters outside the quoted string.
4339 Also, the assembler is broken; very long strings are truncated,
4340 so we must artificially break them up early. */
4343 output_ascii (file
, p
, n
)
4349 int i
, count_string
;
4350 char *for_string
= "\t.byte \"";
4351 char *for_decimal
= "\t.byte ";
4352 char *to_close
= NULL
;
4355 for (i
= 0; i
< n
; i
++)
4358 if (c
>= ' ' && c
< 0177)
4361 fputs (for_string
, file
);
4364 /* Write two quotes to get one. */
4372 for_decimal
= "\"\n\t.byte ";
4376 if (count_string
>= 512)
4378 fputs (to_close
, file
);
4380 for_string
= "\t.byte \"";
4381 for_decimal
= "\t.byte ";
4389 fputs (for_decimal
, file
);
4390 fprintf (file
, "%d", c
);
4392 for_string
= "\n\t.byte \"";
4399 /* Now close the string if we have written one. Then end the line. */
4401 fprintf (file
, to_close
);
4404 /* Generate a unique section name for FILENAME for a section type
4405 represented by SECTION_DESC. Output goes into BUF.
4407 SECTION_DESC can be any string, as long as it is different for each
4408 possible section type.
4410 We name the section in the same manner as xlc. The name begins with an
4411 underscore followed by the filename (after stripping any leading directory
4412 names) with the last period replaced by the string SECTION_DESC. If
4413 FILENAME does not contain a period, SECTION_DESC is appended to the end of
4417 rs6000_gen_section_name (buf
, filename
, section_desc
)
4422 char *q
, *after_last_slash
, *last_period
;
4426 after_last_slash
= filename
;
4427 for (q
= filename
; *q
; q
++)
4430 after_last_slash
= q
+ 1;
4435 len
= strlen (after_last_slash
) + strlen (section_desc
) + 2;
4436 *buf
= (char *) permalloc (len
);
4441 for (q
= after_last_slash
; *q
; q
++)
4443 if (q
== last_period
)
4445 strcpy (p
, section_desc
);
4446 p
+= strlen (section_desc
);
4449 else if (isalnum (*q
))
4453 if (last_period
== 0)
4454 strcpy (p
, section_desc
);
4459 /* Write function profiler code. */
4462 output_function_profiler (file
, labelno
)
4466 /* The last used parameter register. */
4471 ASM_GENERATE_INTERNAL_LABEL (buf
, "LP", labelno
);
4472 switch (DEFAULT_ABI
)
4479 case ABI_AIX_NODESC
:
4480 fprintf (file
, "\tmflr %s\n", reg_names
[0]);
4483 fprintf (file
, "\tbl _GLOBAL_OFFSET_TABLE_@local-4\n");
4484 fprintf (file
, "\t%s %s,4(%s)\n",
4485 (TARGET_NEW_MNEMONICS
) ? "stw" : "st",
4486 reg_names
[0], reg_names
[1]);
4487 fprintf (file
, "\tmflr %s\n", reg_names
[11]);
4488 fprintf (file
, "\t%s %s,", (TARGET_NEW_MNEMONICS
) ? "lwz" : "l",
4490 assemble_name (file
, buf
);
4491 fprintf (file
, "@got(%s)\n", reg_names
[11]);
4494 else if (flag_pic
> 1 || TARGET_RELOCATABLE
)
4496 fprintf (file
, "\t%s %s,4(%s)\n",
4497 (TARGET_NEW_MNEMONICS
) ? "stw" : "st",
4498 reg_names
[0], reg_names
[1]);
4499 rs6000_pic_func_labelno
= rs6000_pic_labelno
;
4500 rs6000_output_load_toc_table (file
, 11);
4501 fprintf (file
, "\t%s %s,", (TARGET_NEW_MNEMONICS
) ? "lwz" : "l",
4503 assemble_name (file
, buf
);
4504 fprintf (file
, "X(%s)\n", reg_names
[11]);
4505 fprintf (file
, "%s\n", MINIMAL_TOC_SECTION_ASM_OP
);
4506 assemble_name (file
, buf
);
4507 fprintf (file
, "X = .-.LCTOC1\n");
4508 fprintf (file
, "\t.long ");
4509 assemble_name (file
, buf
);
4510 fputs ("\n\t.previous\n", file
);
4513 else if (TARGET_NEW_MNEMONICS
)
4515 fprintf (file
, "\taddis %s,%s,", reg_names
[11], reg_names
[11]);
4516 assemble_name (file
, buf
);
4517 fprintf (file
, "@ha\n");
4518 fprintf (file
, "\tstw %s,4(%s)\n", reg_names
[0], reg_names
[1]);
4519 fprintf (file
, "\taddi %s,%s,", reg_names
[0], reg_names
[11]);
4520 assemble_name (file
, buf
);
4521 fputs ("@l\n", file
);
4525 fprintf (file
, "\tcau %s,%s,", reg_names
[11], reg_names
[11]);
4526 assemble_name (file
, buf
);
4527 fprintf (file
, "@ha\n");
4528 fprintf (file
, "\tst %s,4(%s)\n", reg_names
[0], reg_names
[1]);
4529 fprintf (file
, "\tcal %s,", reg_names
[11]);
4530 assemble_name (file
, buf
);
4531 fprintf (file
, "@l(%s)\n", reg_names
[11]);
4534 fprintf (file
, "\tbl %s\n", RS6000_MCOUNT
);
4538 /* Set up a TOC entry for the profiler label. */
4540 ASM_OUTPUT_INTERNAL_LABEL (file
, "LPC", labelno
);
4541 if (TARGET_MINIMAL_TOC
)
4543 fputs ("\t.long ", file
);
4544 assemble_name (file
, buf
);
4549 fputs ("\t.tc\t", file
);
4550 assemble_name (file
, buf
);
4551 fputs ("[TC],", file
);
4552 assemble_name (file
, buf
);
4557 /* Figure out last used parameter register. The proper thing to do is
4558 to walk incoming args of the function. A function might have live
4559 parameter registers even if it has no incoming args. */
4561 for (last_parm_reg
= 10;
4562 last_parm_reg
> 2 && ! regs_ever_live
[last_parm_reg
];
4566 /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since
4567 it might be set up as the frame pointer. */
4569 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
4570 asm_fprintf (file
, "\tmr %d,%d\n", j
, i
);
4572 /* Load location address into r3, and call mcount. */
4574 ASM_GENERATE_INTERNAL_LABEL (buf
, "LPC", labelno
);
4575 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[3]);
4576 assemble_name (file
, buf
);
4577 asm_fprintf (file
, "(%s)\n\tbl %s\n", reg_names
[2], RS6000_MCOUNT
);
4579 /* Restore parameter registers. */
4581 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
4582 asm_fprintf (file
, "\tmr %d,%d\n", i
, j
);
4587 /* Adjust the cost of a scheduling dependency. Return the new cost of
4588 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
4591 rs6000_adjust_cost (insn
, link
, dep_insn
, cost
)
4597 if (! recog_memoized (insn
))
4600 if (REG_NOTE_KIND (link
) != 0)
4603 if (REG_NOTE_KIND (link
) == 0)
4605 /* Data dependency; DEP_INSN writes a register that INSN reads some
4608 /* Tell the first scheduling pass about the latency between a mtctr
4609 and bctr (and mtlr and br/blr). The first scheduling pass will not
4610 know about this latency since the mtctr instruction, which has the
4611 latency associated to it, will be generated by reload. */
4612 if (get_attr_type (insn
) == TYPE_JMPREG
)
4613 return TARGET_POWER
? 5 : 4;
4615 /* Fall out to return default cost. */
4621 /* Return how many instructions the machine can issue per cycle */
4622 int get_issue_rate()
4624 switch (rs6000_cpu_attr
) {
4644 /* Output assembler code for a block containing the constant parts
4645 of a trampoline, leaving space for the variable parts.
4647 The trampoline should set the static chain pointer to value placed
4648 into the trampoline and should branch to the specified routine. */
4651 rs6000_trampoline_template (file
)
4654 char *sc
= reg_names
[STATIC_CHAIN_REGNUM
];
4655 char *r0
= reg_names
[0];
4656 char *r2
= reg_names
[2];
4658 switch (DEFAULT_ABI
)
4663 /* Under AIX, this is not code at all, but merely a data area,
4664 since that is the way all functions are called. The first word is
4665 the address of the function, the second word is the TOC pointer (r2),
4666 and the third word is the static chain value. */
4671 /* V.4/eabi function pointers are just a single pointer, so we need to
4672 do the full gory code to load up the static chain. */
4675 case ABI_AIX_NODESC
:
4678 /* NT function pointers point to a two word area (real address, TOC)
4679 which unfortunately does not include a static chain field. So we
4680 use the function field to point to ..LTRAMP1 and the toc field
4681 to point to the whole table. */
4683 if (STATIC_CHAIN_REGNUM
== 0
4684 || STATIC_CHAIN_REGNUM
== 2
4686 || !TARGET_NEW_MNEMONICS
)
4689 fprintf (file
, "\t.ualong 0\n"); /* offset 0 */
4690 fprintf (file
, "\t.ualong 0\n"); /* offset 4 */
4691 fprintf (file
, "\t.ualong 0\n"); /* offset 8 */
4692 fprintf (file
, "\t.ualong 0\n"); /* offset 12 */
4693 fprintf (file
, "\t.ualong 0\n"); /* offset 16 */
4694 fprintf (file
, "..LTRAMP1..0:\n"); /* offset 20 */
4695 fprintf (file
, "\tlwz %s,8(%s)\n", r0
, r2
); /* offset 24 */
4696 fprintf (file
, "\tlwz %s,12(%s)\n", sc
, r2
); /* offset 28 */
4697 fprintf (file
, "\tmtctr %s\n", r0
); /* offset 32 */
4698 fprintf (file
, "\tlwz %s,16(%s)\n", r2
, r2
); /* offset 36 */
4699 fprintf (file
, "\tbctr\n"); /* offset 40 */
4706 /* Length in units of the trampoline for entering a nested function. */
4709 rs6000_trampoline_size ()
4713 switch (DEFAULT_ABI
)
4719 ret
= (TARGET_32BIT
) ? 12 : 24;
4724 case ABI_AIX_NODESC
:
4725 ret
= (TARGET_32BIT
) ? 40 : 48;
4736 /* Emit RTL insns to initialize the variable parts of a trampoline.
4737 FNADDR is an RTX for the address of the function's pure code.
4738 CXT is an RTX for the static chain value for the function. */
4741 rs6000_initialize_trampoline (addr
, fnaddr
, cxt
)
4746 enum machine_mode pmode
= Pmode
;
4747 int regsize
= (TARGET_32BIT
) ? 4 : 8;
4748 rtx ctx_reg
= force_reg (pmode
, cxt
);
4750 switch (DEFAULT_ABI
)
4755 /* Macros to shorten the code expansions below. */
4756 #define MEM_DEREF(addr) gen_rtx (MEM, pmode, memory_address (pmode, addr))
4757 #define MEM_PLUS(addr,offset) gen_rtx (MEM, pmode, memory_address (pmode, plus_constant (addr, offset)))
4759 /* Under AIX, just build the 3 word function descriptor */
4762 rtx fn_reg
= gen_reg_rtx (pmode
);
4763 rtx toc_reg
= gen_reg_rtx (pmode
);
4764 emit_move_insn (fn_reg
, MEM_DEREF (fnaddr
));
4765 emit_move_insn (toc_reg
, MEM_PLUS (fnaddr
, 4));
4766 emit_move_insn (MEM_DEREF (addr
), fn_reg
);
4767 emit_move_insn (MEM_PLUS (addr
, regsize
), toc_reg
);
4768 emit_move_insn (MEM_PLUS (addr
, 2*regsize
), ctx_reg
);
4772 /* Under V.4/eabi, call __trampoline_setup to do the real work. */
4775 case ABI_AIX_NODESC
:
4776 emit_library_call (gen_rtx (SYMBOL_REF
, SImode
, "__trampoline_setup"),
4779 GEN_INT (rs6000_trampoline_size ()), SImode
,
4784 /* Under NT, update the first word to point to the ..LTRAMP1..0 header,
4785 the second word will point to the whole trampoline, third-fifth words
4786 will then have the real address, static chain, and toc value. */
4789 rtx tramp_reg
= gen_reg_rtx (pmode
);
4790 rtx fn_reg
= gen_reg_rtx (pmode
);
4791 rtx toc_reg
= gen_reg_rtx (pmode
);
4793 emit_move_insn (tramp_reg
, gen_rtx (SYMBOL_REF
, pmode
, "..LTRAMP1..0"));
4794 addr
= force_reg (pmode
, addr
);
4795 emit_move_insn (fn_reg
, MEM_DEREF (fnaddr
));
4796 emit_move_insn (toc_reg
, MEM_PLUS (fnaddr
, regsize
));
4797 emit_move_insn (MEM_DEREF (addr
), tramp_reg
);
4798 emit_move_insn (MEM_PLUS (addr
, regsize
), addr
);
4799 emit_move_insn (MEM_PLUS (addr
, 2*regsize
), fn_reg
);
4800 emit_move_insn (MEM_PLUS (addr
, 3*regsize
), ctx_reg
);
4801 emit_move_insn (MEM_PLUS (addr
, 4*regsize
), gen_rtx (REG
, pmode
, 2));
4810 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4811 with arguments ARGS is a valid machine specific attribute for DECL.
4812 The attributes in ATTRIBUTES have previously been assigned to DECL. */
4815 rs6000_valid_decl_attribute_p (decl
, attributes
, identifier
, args
)
4824 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4825 with arguments ARGS is a valid machine specific attribute for TYPE.
4826 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
4829 rs6000_valid_type_attribute_p (type
, attributes
, identifier
, args
)
4835 if (TREE_CODE (type
) != FUNCTION_TYPE
4836 && TREE_CODE (type
) != FIELD_DECL
4837 && TREE_CODE (type
) != TYPE_DECL
)
4840 /* Longcall attribute says that the function is not within 2**26 bytes
4841 of the current function, and to do an indirect call. */
4842 if (is_attribute_p ("longcall", identifier
))
4843 return (args
== NULL_TREE
);
4845 if (DEFAULT_ABI
== ABI_NT
)
4847 /* Stdcall attribute says callee is responsible for popping arguments
4848 if they are not variable. */
4849 if (is_attribute_p ("stdcall", identifier
))
4850 return (args
== NULL_TREE
);
4852 /* Cdecl attribute says the callee is a normal C declaration */
4853 if (is_attribute_p ("cdecl", identifier
))
4854 return (args
== NULL_TREE
);
4856 /* Dllimport attribute says says the caller is to call the function
4857 indirectly through a __imp_<name> pointer. */
4858 if (is_attribute_p ("dllimport", identifier
))
4859 return (args
== NULL_TREE
);
4861 /* Dllexport attribute says says the callee is to create a __imp_<name>
4863 if (is_attribute_p ("dllexport", identifier
))
4864 return (args
== NULL_TREE
);
4866 /* Exception attribute allows the user to specify 1-2 strings or identifiers
4867 that will fill in the 3rd and 4th fields of the structured exception
4869 if (is_attribute_p ("exception", identifier
))
4873 if (args
== NULL_TREE
)
4876 for (i
= 0; i
< 2 && args
!= NULL_TREE
; i
++)
4878 tree this_arg
= TREE_VALUE (args
);
4879 args
= TREE_PURPOSE (args
);
4881 if (TREE_CODE (this_arg
) != STRING_CST
4882 && TREE_CODE (this_arg
) != IDENTIFIER_NODE
)
4886 return (args
== NULL_TREE
);
4893 /* If defined, a C expression whose value is zero if the attributes on
4894 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
4895 two if they are nearly compatible (which causes a warning to be
4899 rs6000_comp_type_attributes (type1
, type2
)
4906 /* If defined, a C statement that assigns default attributes to newly
4910 rs6000_set_default_type_attributes (type
)
4915 /* Return a dll import reference corresponding to to a call's SYMBOL_REF */
4917 rs6000_dll_import_ref (call_ref
)
4926 if (GET_CODE (call_ref
) != SYMBOL_REF
)
4929 call_name
= XSTR (call_ref
, 0);
4930 len
= sizeof ("__imp_") + strlen (call_name
);
4932 reg2
= gen_reg_rtx (Pmode
);
4934 strcpy (p
, "__imp_");
4935 strcat (p
, call_name
);
4936 node
= get_identifier (p
);
4938 reg1
= force_reg (Pmode
, gen_rtx (SYMBOL_REF
, VOIDmode
, IDENTIFIER_POINTER (node
)));
4939 emit_move_insn (reg2
, gen_rtx (MEM
, Pmode
, reg1
));
4944 /* Return a reference suitable for calling a function with the longcall attribute. */
4946 rs6000_longcall_ref (call_ref
)
4952 if (GET_CODE (call_ref
) != SYMBOL_REF
)
4955 /* System V adds '.' to the internal name, so skip them. */
4956 call_name
= XSTR (call_ref
, 0);
4957 if (*call_name
== '.')
4959 while (*call_name
== '.')
4962 node
= get_identifier (call_name
);
4963 call_ref
= gen_rtx (SYMBOL_REF
, VOIDmode
, IDENTIFIER_POINTER (node
));
4966 return force_reg (Pmode
, call_ref
);
4970 /* A C statement or statements to switch to the appropriate section
4971 for output of RTX in mode MODE. You can assume that RTX is some
4972 kind of constant in RTL. The argument MODE is redundant except in
4973 the case of a `const_int' rtx. Select the section by calling
4974 `text_section' or one of the alternatives for other sections.
4976 Do not define this macro if you put all constants in the read-only
4982 rs6000_select_rtx_section (mode
, x
)
4983 enum machine_mode mode
;
4986 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x
))
4992 /* A C statement or statements to switch to the appropriate
4993 section for output of DECL. DECL is either a `VAR_DECL' node
4994 or a constant of some sort. RELOC indicates whether forming
4995 the initial value of DECL requires link-time relocations. */
4998 rs6000_select_section (decl
, reloc
)
5002 int size
= int_size_in_bytes (TREE_TYPE (decl
));
5004 if (TREE_CODE (decl
) == STRING_CST
)
5006 if (! flag_writable_strings
)
5011 else if (TREE_CODE (decl
) == VAR_DECL
)
5013 if ((flag_pic
&& reloc
)
5014 || !TREE_READONLY (decl
)
5015 || TREE_SIDE_EFFECTS (decl
)
5016 || !DECL_INITIAL (decl
)
5017 || (DECL_INITIAL (decl
) != error_mark_node
5018 && !TREE_CONSTANT (DECL_INITIAL (decl
))))
5020 if (rs6000_sdata
!= SDATA_NONE
&& (size
> 0) && (size
<= g_switch_value
))
5027 if (rs6000_sdata
!= SDATA_NONE
&& (size
> 0) && (size
<= g_switch_value
))
5029 if (rs6000_sdata
== SDATA_EABI
)
5032 sdata_section (); /* System V doesn't have .sdata2/.sbss2 */
5044 /* If we are referencing a function that is static or is known to be
5045 in this file, make the SYMBOL_REF special. We can use this to indicate
5046 that we can branch to this function without emitting a no-op after the
5047 call. For real AIX and NT calling sequences, we also replace the
5048 function name with the real name (1 or 2 leading .'s), rather than
5049 the function descriptor name. This saves a lot of overriding code
5050 to readd the prefixes. */
5053 rs6000_encode_section_info (decl
)
5056 if (TREE_CODE (decl
) == FUNCTION_DECL
)
5058 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
5059 if (TREE_ASM_WRITTEN (decl
) || ! TREE_PUBLIC (decl
))
5060 SYMBOL_REF_FLAG (sym_ref
) = 1;
5062 if (DEFAULT_ABI
== ABI_AIX
|| DEFAULT_ABI
== ABI_NT
)
5064 char *prefix
= (DEFAULT_ABI
== ABI_AIX
) ? "." : "..";
5065 char *str
= permalloc (strlen (prefix
) + 1
5066 + strlen (XSTR (sym_ref
, 0)));
5067 strcpy (str
, prefix
);
5068 strcat (str
, XSTR (sym_ref
, 0));
5069 XSTR (sym_ref
, 0) = str
;
5072 else if (rs6000_sdata
!= SDATA_NONE
5073 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
5074 && TREE_CODE (decl
) == VAR_DECL
)
5076 int size
= int_size_in_bytes (TREE_TYPE (decl
));
5077 tree section_name
= DECL_SECTION_NAME (decl
);
5078 char *name
= (char *)0;
5083 if (TREE_CODE (section_name
) == STRING_CST
)
5085 name
= TREE_STRING_POINTER (section_name
);
5086 len
= TREE_STRING_LENGTH (section_name
);
5092 if ((size
> 0 && size
<= g_switch_value
)
5094 && ((len
== sizeof (".sdata")-1 && strcmp (name
, ".sdata") == 0)
5095 || (len
== sizeof (".sdata2")-1 && strcmp (name
, ".sdata2") == 0)
5096 || (len
== sizeof (".sbss")-1 && strcmp (name
, ".sbss") == 0)
5097 || (len
== sizeof (".sbss2")-1 && strcmp (name
, ".sbss2") == 0)
5098 || (len
== sizeof (".PPC.EMB.sdata0")-1 && strcmp (name
, ".PPC.EMB.sdata0") == 0)
5099 || (len
== sizeof (".PPC.EMB.sbss0")-1 && strcmp (name
, ".PPC.EMB.sbss0") == 0))))
5101 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
5102 char *str
= permalloc (2 + strlen (XSTR (sym_ref
, 0)));
5104 strcat (str
, XSTR (sym_ref
, 0));
5105 XSTR (sym_ref
, 0) = str
;
5110 #endif /* USING_SVR4_H */