1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 1993, 1994, 1995 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
40 extern char *language_string
;
41 extern int profile_block_flag
;
43 #define min(A,B) ((A) < (B) ? (A) : (B))
44 #define max(A,B) ((A) > (B) ? (A) : (B))
48 enum processor_type rs6000_cpu
;
49 char *rs6000_cpu_string
;
51 /* Set to non-zero by "fix" operation to indicate that itrunc and
52 uitrunc must be defined. */
54 int rs6000_trunc_used
;
56 /* Set to non-zero once they have been defined. */
58 static int trunc_defined
;
60 /* Set to non-zero once AIX common-mode calls have been defined. */
61 static int common_mode_defined
;
62 /* Save information from a "cmpxx" operation until the branch or scc is
65 rtx rs6000_compare_op0
, rs6000_compare_op1
;
66 int rs6000_compare_fp_p
;
69 /* Label number of label created for -mrelocatable, to call to so we can
70 get the address of the GOT section */
71 int rs6000_pic_labelno
;
74 /* Whether a System V.4 varargs area was created. */
75 int rs6000_sysv_varargs_p
;
77 /* Whether we need to save the TOC register. */
78 int rs6000_save_toc_p
;
80 /* ABI enumeration available for subtarget to use. */
81 enum rs6000_abi rs6000_current_abi
;
83 /* Temporary memory used to convert integer -> float */
84 static rtx stack_temps
[NUM_MACHINE_MODES
];
87 /* Print the options used in the assembly file. */
89 extern char *version_string
, *language_string
;
101 output_option (file
, type
, name
, pos
)
107 int type_len
= strlen (type
);
108 int name_len
= strlen (name
);
110 if (1 + type_len
+ name_len
+ pos
> MAX_LINE
)
112 fprintf (file
, "\n # %s%s", type
, name
);
113 return 3 + type_len
+ name_len
;
115 fprintf (file
, " %s%s", type
, name
);
116 return pos
+ 1 + type_len
+ name_len
;
119 static struct { char *name
; int value
; } m_options
[] = TARGET_SWITCHES
;
122 output_options (file
, f_options
, f_len
, W_options
, W_len
)
124 struct asm_option
*f_options
;
126 struct asm_option
*W_options
;
130 int flags
= target_flags
;
133 fprintf (file
, " # %s %s", language_string
, version_string
);
138 sprintf (opt_string
, "%d", optimize
);
139 pos
= output_option (file
, "-O", opt_string
, pos
);
143 pos
= output_option (file
, "-p", "", pos
);
145 if (profile_block_flag
)
146 pos
= output_option (file
, "-a", "", pos
);
148 if (inhibit_warnings
)
149 pos
= output_option (file
, "-w", "", pos
);
151 for (j
= 0; j
< f_len
; j
++)
153 if (*f_options
[j
].variable
== f_options
[j
].on_value
)
154 pos
= output_option (file
, "-f", f_options
[j
].string
, pos
);
157 for (j
= 0; j
< W_len
; j
++)
159 if (*W_options
[j
].variable
== W_options
[j
].on_value
)
160 pos
= output_option (file
, "-W", W_options
[j
].string
, pos
);
163 for (j
= 0; j
< sizeof m_options
/ sizeof m_options
[0]; j
++)
165 if (m_options
[j
].name
[0] != '\0'
166 && m_options
[j
].value
> 0
167 && ((m_options
[j
].value
& flags
) == m_options
[j
].value
))
169 pos
= output_option (file
, "-m", m_options
[j
].name
, pos
);
170 flags
&= ~ m_options
[j
].value
;
174 if (rs6000_cpu_string
!= (char *)0)
175 pos
= output_option (file
, "-mcpu=", rs6000_cpu_string
, pos
);
177 fputs ("\n\n", file
);
181 /* Override command line options. Mostly we process the processor
182 type and sometimes adjust other TARGET_ options. */
185 rs6000_override_options ()
189 /* Simplify the entries below by making a mask for any POWER
190 variant and any PowerPC variant. */
192 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
193 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
194 | MASK_PPC_GFXOPT | MASK_POWERPC64)
195 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
199 char *name
; /* Canonical processor name. */
200 enum processor_type processor
; /* Processor type enum value. */
201 int target_enable
; /* Target flags to enable. */
202 int target_disable
; /* Target flags to disable. */
203 } processor_target_table
[]
204 = {{"common", PROCESSOR_COMMON
, 0, POWER_MASKS
| POWERPC_MASKS
},
205 {"power", PROCESSOR_POWER
,
206 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
207 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
208 {"powerpc", PROCESSOR_POWERPC
,
209 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
210 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
211 {"rios", PROCESSOR_RIOS1
,
212 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
213 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
214 {"rios1", PROCESSOR_RIOS1
,
215 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
216 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
217 {"rsc", PROCESSOR_PPC601
,
218 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
219 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
220 {"rsc1", PROCESSOR_PPC601
,
221 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
222 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
223 {"rios2", PROCESSOR_RIOS2
,
224 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
| MASK_POWER2
,
225 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
226 {"403", PROCESSOR_PPC403
,
227 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
228 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
229 {"601", PROCESSOR_PPC601
,
230 MASK_POWER
| MASK_POWERPC
| MASK_NEW_MNEMONICS
| MASK_MULTIPLE
| MASK_STRING
,
231 MASK_POWER2
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
232 {"602", PROCESSOR_PPC602
,
233 MASK_POWER
| MASK_POWERPC
| MASK_NEW_MNEMONICS
,
234 MASK_POWER2
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
235 {"603", PROCESSOR_PPC603
,
236 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
237 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
238 {"603e", PROCESSOR_PPC603
,
239 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
240 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
241 {"604", PROCESSOR_PPC604
,
242 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
243 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
244 {"620", PROCESSOR_PPC620
,
245 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
246 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
}};
248 int ptt_size
= sizeof (processor_target_table
) / sizeof (struct ptt
);
250 int multiple
= TARGET_MULTIPLE
; /* save current -mmultiple/-mno-multiple status */
251 int string
= TARGET_STRING
; /* save current -mstring/-mno-string status */
253 profile_block_flag
= 0;
255 /* Identify the processor type */
256 if (rs6000_cpu_string
== 0)
257 rs6000_cpu
= PROCESSOR_DEFAULT
;
260 for (i
= 0; i
< ptt_size
; i
++)
261 if (! strcmp (rs6000_cpu_string
, processor_target_table
[i
].name
))
263 rs6000_cpu
= processor_target_table
[i
].processor
;
264 target_flags
|= processor_target_table
[i
].target_enable
;
265 target_flags
&= ~processor_target_table
[i
].target_disable
;
271 error ("bad value (%s) for -mcpu= switch", rs6000_cpu_string
);
272 rs6000_cpu_string
= "default";
273 rs6000_cpu
= PROCESSOR_DEFAULT
;
277 /* If -mmultiple or -mno-multiple was explicitly used, don't
278 override with the processor default */
279 if (TARGET_MULTIPLE_SET
)
280 target_flags
= (target_flags
& ~MASK_MULTIPLE
) | multiple
;
282 /* If -mstring or -mno-string was explicitly used, don't
283 override with the processor default */
284 if (TARGET_STRING_SET
)
285 target_flags
= (target_flags
& ~MASK_STRING
) | string
;
287 /* Don't allow -mmultiple or -mstring on little endian systems, because the
288 hardware doesn't support the instructions used in little endian mode */
289 if (!BYTES_BIG_ENDIAN
)
293 target_flags
&= ~MASK_MULTIPLE
;
294 if (TARGET_MULTIPLE_SET
)
295 warning ("-mmultiple is not supported on little endian systems");
300 target_flags
&= ~MASK_STRING
;
301 if (TARGET_STRING_SET
)
302 warning ("-mstring is not supported on little endian systems");
306 #ifdef SUBTARGET_OVERRIDE_OPTIONS
307 SUBTARGET_OVERRIDE_OPTIONS
;
311 /* Create a CONST_DOUBLE from a string. */
314 rs6000_float_const (string
, mode
)
316 enum machine_mode mode
;
318 REAL_VALUE_TYPE value
= REAL_VALUE_ATOF (string
, mode
);
319 return immed_real_const_1 (value
, mode
);
323 /* Create a CONST_DOUBLE like immed_double_const, except reverse the
324 two parts of the constant if the target is little endian. */
327 rs6000_immed_double_const (i0
, i1
, mode
)
328 HOST_WIDE_INT i0
, i1
;
329 enum machine_mode mode
;
331 if (! WORDS_BIG_ENDIAN
)
332 return immed_double_const (i1
, i0
, mode
);
334 return immed_double_const (i0
, i1
, mode
);
338 /* Return non-zero if this function is known to have a null epilogue. */
343 if (reload_completed
)
345 rs6000_stack_t
*info
= rs6000_stack_info ();
347 if (info
->first_gp_reg_save
== 32
348 && info
->first_fp_reg_save
== 64
358 /* Returns 1 always. */
361 any_operand (op
, mode
)
363 enum machine_mode mode
;
368 /* Returns 1 if op is the count register */
369 int count_register_operand(op
, mode
)
371 enum machine_mode mode
;
373 if (GET_CODE (op
) != REG
)
376 if (REGNO (op
) == COUNT_REGISTER_REGNUM
)
379 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
385 /* Return 1 if OP is a constant that can fit in a D field. */
388 short_cint_operand (op
, mode
)
390 enum machine_mode mode
;
392 return (GET_CODE (op
) == CONST_INT
393 && (unsigned) (INTVAL (op
) + 0x8000) < 0x10000);
396 /* Similar for a unsigned D field. */
399 u_short_cint_operand (op
, mode
)
401 enum machine_mode mode
;
403 return (GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff0000) == 0);
406 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
409 non_short_cint_operand (op
, mode
)
411 enum machine_mode mode
;
413 return (GET_CODE (op
) == CONST_INT
414 && (unsigned) (INTVAL (op
) + 0x8000) >= 0x10000);
417 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
421 gpc_reg_operand (op
, mode
)
423 enum machine_mode mode
;
425 return (register_operand (op
, mode
)
426 && (GET_CODE (op
) != REG
|| REGNO (op
) >= 67 || REGNO (op
) < 64));
429 /* Returns 1 if OP is either a pseudo-register or a register denoting a
433 cc_reg_operand (op
, mode
)
435 enum machine_mode mode
;
437 return (register_operand (op
, mode
)
438 && (GET_CODE (op
) != REG
439 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
440 || CR_REGNO_P (REGNO (op
))));
443 /* Returns 1 if OP is either a constant integer valid for a D-field or a
444 non-special register. If a register, it must be in the proper mode unless
448 reg_or_short_operand (op
, mode
)
450 enum machine_mode mode
;
452 return short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
455 /* Similar, except check if the negation of the constant would be valid for
459 reg_or_neg_short_operand (op
, mode
)
461 enum machine_mode mode
;
463 if (GET_CODE (op
) == CONST_INT
)
464 return CONST_OK_FOR_LETTER_P (INTVAL (op
), 'P');
466 return gpc_reg_operand (op
, mode
);
469 /* Return 1 if the operand is either a register or an integer whose high-order
473 reg_or_u_short_operand (op
, mode
)
475 enum machine_mode mode
;
477 if (GET_CODE (op
) == CONST_INT
478 && (INTVAL (op
) & 0xffff0000) == 0)
481 return gpc_reg_operand (op
, mode
);
484 /* Return 1 is the operand is either a non-special register or ANY
488 reg_or_cint_operand (op
, mode
)
490 enum machine_mode mode
;
492 return GET_CODE (op
) == CONST_INT
|| gpc_reg_operand (op
, mode
);
495 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
496 with one instruction per word. We only do this if we can safely read
497 CONST_DOUBLE_{LOW,HIGH}. */
500 easy_fp_constant (op
, mode
)
502 register enum machine_mode mode
;
506 if (GET_CODE (op
) != CONST_DOUBLE
507 || GET_MODE (op
) != mode
508 || GET_MODE_CLASS (mode
) != MODE_FLOAT
)
511 /* Consider all constants with -msoft-float to be easy */
512 if (TARGET_SOFT_FLOAT
)
515 high
= operand_subword (op
, 0, 0, mode
);
516 low
= operand_subword (op
, 1, 0, mode
);
518 if (high
== 0 || ! input_operand (high
, word_mode
))
521 return (mode
== SFmode
522 || (low
!= 0 && input_operand (low
, word_mode
)));
525 /* Return 1 if the operand is in volatile memory. Note that during the
526 RTL generation phase, memory_operand does not return TRUE for
527 volatile memory references. So this function allows us to
528 recognize volatile references where its safe. */
531 volatile_mem_operand (op
, mode
)
533 enum machine_mode mode
;
535 if (GET_CODE (op
) != MEM
)
538 if (!MEM_VOLATILE_P (op
))
541 if (mode
!= GET_MODE (op
))
544 if (reload_completed
)
545 return memory_operand (op
, mode
);
547 if (reload_in_progress
)
548 return strict_memory_address_p (mode
, XEXP (op
, 0));
550 return memory_address_p (mode
, XEXP (op
, 0));
553 /* Return 1 if the operand is an offsettable memory address. */
556 offsettable_addr_operand (op
, mode
)
558 enum machine_mode mode
;
560 return offsettable_address_p (reload_completed
| reload_in_progress
,
564 /* Return 1 if the operand is either a floating-point register, a pseudo
565 register, or memory. */
568 fp_reg_or_mem_operand (op
, mode
)
570 enum machine_mode mode
;
572 return (memory_operand (op
, mode
)
573 || volatile_mem_operand (op
, mode
)
574 || (register_operand (op
, mode
)
575 && (GET_CODE (op
) != REG
576 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
577 || FP_REGNO_P (REGNO (op
)))));
580 /* Return 1 if the operand is either an easy FP constant (see above) or
584 mem_or_easy_const_operand (op
, mode
)
586 enum machine_mode mode
;
588 return memory_operand (op
, mode
) || easy_fp_constant (op
, mode
);
591 /* Return 1 if the operand is either a non-special register or an item
592 that can be used as the operand of an SI add insn. */
595 add_operand (op
, mode
)
597 enum machine_mode mode
;
599 return (reg_or_short_operand (op
, mode
)
600 || (GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff) == 0));
603 /* Return 1 if OP is a constant but not a valid add_operand. */
606 non_add_cint_operand (op
, mode
)
608 enum machine_mode mode
;
610 return (GET_CODE (op
) == CONST_INT
611 && (unsigned) (INTVAL (op
) + 0x8000) >= 0x10000
612 && (INTVAL (op
) & 0xffff) != 0);
615 /* Return 1 if the operand is a non-special register or a constant that
616 can be used as the operand of an OR or XOR insn on the RS/6000. */
619 logical_operand (op
, mode
)
621 enum machine_mode mode
;
623 return (gpc_reg_operand (op
, mode
)
624 || (GET_CODE (op
) == CONST_INT
625 && ((INTVAL (op
) & 0xffff0000) == 0
626 || (INTVAL (op
) & 0xffff) == 0)));
629 /* Return 1 if C is a constant that is not a logical operand (as
633 non_logical_cint_operand (op
, mode
)
635 enum machine_mode mode
;
637 return (GET_CODE (op
) == CONST_INT
638 && (INTVAL (op
) & 0xffff0000) != 0
639 && (INTVAL (op
) & 0xffff) != 0);
642 /* Return 1 if C is a constant that can be encoded in a mask on the
643 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
644 Reject all ones and all zeros, since these should have been optimized
645 away and confuse the making of MB and ME. */
655 if (c
== 0 || c
== ~0)
658 last_bit_value
= c
& 1;
660 for (i
= 1; i
< 32; i
++)
661 if (((c
>>= 1) & 1) != last_bit_value
)
662 last_bit_value
^= 1, transitions
++;
664 return transitions
<= 2;
667 /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
670 mask_operand (op
, mode
)
672 enum machine_mode mode
;
674 return GET_CODE (op
) == CONST_INT
&& mask_constant (INTVAL (op
));
677 /* Return 1 if the operand is either a non-special register or a
678 constant that can be used as the operand of an RS/6000 logical AND insn. */
681 and_operand (op
, mode
)
683 enum machine_mode mode
;
685 return (reg_or_short_operand (op
, mode
)
686 || logical_operand (op
, mode
)
687 || mask_operand (op
, mode
));
690 /* Return 1 if the operand is a constant but not a valid operand for an AND
694 non_and_cint_operand (op
, mode
)
696 enum machine_mode mode
;
698 return GET_CODE (op
) == CONST_INT
&& ! and_operand (op
, mode
);
701 /* Return 1 if the operand is a general register or memory operand. */
704 reg_or_mem_operand (op
, mode
)
706 register enum machine_mode mode
;
708 return (gpc_reg_operand (op
, mode
)
709 || memory_operand (op
, mode
)
710 || volatile_mem_operand (op
, mode
));
713 /* Return 1 if the operand is a general register or memory operand without
714 pre-inc or pre_dec which produces invalid form of PowerPC lwa
718 lwa_operand (op
, mode
)
720 register enum machine_mode mode
;
724 if (reload_completed
&& GET_CODE (inner
) == SUBREG
)
725 inner
= SUBREG_REG (inner
);
727 return gpc_reg_operand (inner
, mode
)
728 || (memory_operand (inner
, mode
)
729 && GET_CODE (XEXP (inner
, 0)) != PRE_INC
730 && GET_CODE (XEXP (inner
, 0)) != PRE_DEC
);
733 /* Return 1 if the operand, used inside a MEM, is a valid first argument
734 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
738 call_operand (op
, mode
)
740 enum machine_mode mode
;
742 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
745 return (GET_CODE (op
) == SYMBOL_REF
746 || (GET_CODE (op
) == REG
&& REGNO (op
) >= FIRST_PSEUDO_REGISTER
));
750 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
754 current_file_function_operand (op
, mode
)
756 enum machine_mode mode
;
758 return (GET_CODE (op
) == SYMBOL_REF
759 && (SYMBOL_REF_FLAG (op
)
760 || op
== XEXP (DECL_RTL (current_function_decl
), 0)));
764 /* Return 1 if this operand is a valid input for a move insn. */
767 input_operand (op
, mode
)
769 enum machine_mode mode
;
771 /* Memory is always valid. */
772 if (memory_operand (op
, mode
))
775 /* For floating-point, easy constants are valid. */
776 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
778 && easy_fp_constant (op
, mode
))
781 /* For floating-point or multi-word mode, the only remaining valid type
783 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
784 || GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
785 return register_operand (op
, mode
);
787 /* The only cases left are integral modes one word or smaller (we
788 do not get called for MODE_CC values). These can be in any
790 if (register_operand (op
, mode
))
793 /* For HImode and QImode, any constant is valid. */
794 if ((mode
== HImode
|| mode
== QImode
)
795 && GET_CODE (op
) == CONST_INT
)
798 /* A SYMBOL_REF referring to the TOC is valid. */
799 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op
))
802 /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC
803 directly in the instruction stream */
804 if (DEFAULT_ABI
== ABI_NT
805 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
))
808 /* Otherwise, we will be doing this SET with an add, so anything valid
809 for an add will be valid. */
810 return add_operand (op
, mode
);
813 /* Initialize a variable CUM of type CUMULATIVE_ARGS
814 for a call to a function whose data type is FNTYPE.
815 For a library call, FNTYPE is 0.
817 For incoming args we set the number of arguments in the prototype large
818 so we never return an EXPR_LIST. */
821 init_cumulative_args (cum
, fntype
, libname
, incoming
)
822 CUMULATIVE_ARGS
*cum
;
827 static CUMULATIVE_ARGS zero_cumulative
;
829 *cum
= zero_cumulative
;
831 cum
->fregno
= FP_ARG_MIN_REG
;
832 cum
->prototype
= (fntype
&& TYPE_ARG_TYPES (fntype
));
836 cum
->nargs_prototype
= 1000; /* don't return an EXPR_LIST */
837 #ifdef TARGET_V4_CALLS
839 cum
->varargs_offset
= RS6000_VARARGS_OFFSET
;
843 else if (cum
->prototype
)
844 cum
->nargs_prototype
= (list_length (TYPE_ARG_TYPES (fntype
)) - 1
845 + (TYPE_MODE (TREE_TYPE (fntype
)) == BLKmode
846 || RETURN_IN_MEMORY (TREE_TYPE (fntype
))));
849 cum
->nargs_prototype
= 0;
851 cum
->orig_nargs
= cum
->nargs_prototype
;
852 if (TARGET_DEBUG_ARG
)
854 fprintf (stderr
, "\ninit_cumulative_args:");
857 tree ret_type
= TREE_TYPE (fntype
);
858 fprintf (stderr
, " ret code = %s,",
859 tree_code_name
[ (int)TREE_CODE (ret_type
) ]);
862 #ifdef TARGET_V4_CALLS
863 if (TARGET_V4_CALLS
&& incoming
)
864 fprintf (stderr
, " varargs = %d, ", cum
->varargs_offset
);
867 fprintf (stderr
, " proto = %d, nargs = %d\n",
868 cum
->prototype
, cum
->nargs_prototype
);
872 /* If defined, a C expression that gives the alignment boundary, in bits,
873 of an argument with the specified mode and type. If it is not defined,
874 PARM_BOUNDARY is used for all arguments.
876 Windows NT wants anything >= 8 bytes to be double word aligned. */
879 function_arg_boundary (mode
, type
)
880 enum machine_mode mode
;
883 if (DEFAULT_ABI
!= ABI_NT
|| TARGET_64BIT
)
884 return PARM_BOUNDARY
;
887 return (GET_MODE_SIZE (mode
)) >= 8 ? 64 : 32;
889 return (int_size_in_bytes (type
) >= 8) ? 64 : 32;
892 /* Update the data in CUM to advance over an argument
893 of mode MODE and data type TYPE.
894 (TYPE is null for libcalls where that information may not be available.) */
897 function_arg_advance (cum
, mode
, type
, named
)
898 CUMULATIVE_ARGS
*cum
;
899 enum machine_mode mode
;
903 int align
= ((cum
->words
& 1) != 0 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
905 cum
->nargs_prototype
--;
907 #ifdef TARGET_V4_CALLS
910 /* Long longs must not be split between registers and stack */
911 if ((GET_MODE_CLASS (mode
) != MODE_FLOAT
|| TARGET_SOFT_FLOAT
)
912 && type
&& !AGGREGATE_TYPE_P (type
)
913 && cum
->words
< GP_ARG_NUM_REG
914 && cum
->words
+ RS6000_ARG_SIZE (mode
, type
, named
) > GP_ARG_NUM_REG
)
916 cum
->words
= GP_ARG_NUM_REG
;
919 /* Aggregates get passed as pointers */
920 if (type
&& AGGREGATE_TYPE_P (type
))
923 /* Floats go in registers, & don't occupy space in the GP registers
924 like they do for AIX unless software floating point. */
925 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
927 && cum
->fregno
<= FP_ARG_V4_MAX_REG
)
931 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, 1);
937 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, named
);
938 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& TARGET_HARD_FLOAT
)
942 if (TARGET_DEBUG_ARG
)
944 "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
945 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), named
, align
);
948 /* Determine where to put an argument to a function.
949 Value is zero to push the argument on the stack,
950 or a hard register in which to store the argument.
952 MODE is the argument's machine mode.
953 TYPE is the data type of the argument (as a tree).
954 This is null for libcalls where that information may
956 CUM is a variable of type CUMULATIVE_ARGS which gives info about
957 the preceding args and about the function being called.
958 NAMED is nonzero if this argument is a named parameter
959 (otherwise it is an extra parameter matching an ellipsis).
961 On RS/6000 the first eight words of non-FP are normally in registers
962 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
963 Under V.4, the first 8 FP args are in registers.
965 If this is floating-point and no prototype is specified, we use
966 both an FP and integer register (or possibly FP reg and stack). Library
967 functions (when TYPE is zero) always have the proper types for args,
968 so we can pass the FP value just in one register. emit_library_function
969 doesn't support EXPR_LIST anyway. */
972 function_arg (cum
, mode
, type
, named
)
973 CUMULATIVE_ARGS
*cum
;
974 enum machine_mode mode
;
978 int align
= ((cum
->words
& 1) != 0 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
979 int align_words
= cum
->words
+ align
;
981 if (TARGET_DEBUG_ARG
)
983 "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
984 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), named
, align
);
986 /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4
987 uses to say fp args were passed in registers. Assume that we don't need the
988 marker for software floating point, or compiler generated library calls. */
989 if (mode
== VOIDmode
)
991 #ifdef TARGET_V4_CALLS
992 if (TARGET_V4_CALLS
&& TARGET_HARD_FLOAT
&& cum
->nargs_prototype
< 0
993 && type
&& (cum
->prototype
|| TARGET_NO_PROTOTYPE
))
994 return GEN_INT ((cum
->fregno
== FP_ARG_MIN_REG
) ? -1 : 1);
1002 #ifdef TARGET_V4_CALLS
1003 if (!TARGET_V4_CALLS
)
1008 if (type
&& TREE_CODE (TYPE_SIZE (type
)) != INTEGER_CST
)
1011 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
1013 if ((cum
->nargs_prototype
> 0)
1014 #ifdef TARGET_V4_CALLS
1015 || TARGET_V4_CALLS
/* V.4 never passes FP values in GP registers */
1018 return gen_rtx (REG
, mode
, cum
->fregno
);
1020 return gen_rtx (EXPR_LIST
, VOIDmode
,
1021 ((align_words
< GP_ARG_NUM_REG
)
1022 ? gen_rtx (REG
, mode
, GP_ARG_MIN_REG
+ align_words
)
1024 gen_rtx (REG
, mode
, cum
->fregno
));
1027 #ifdef TARGET_V4_CALLS
1028 /* Long longs won't be split between register and stack */
1029 else if (TARGET_V4_CALLS
&&
1030 align_words
+ RS6000_ARG_SIZE (mode
, type
, named
) > GP_ARG_NUM_REG
)
1036 else if (align_words
< GP_ARG_NUM_REG
)
1037 return gen_rtx (REG
, mode
, GP_ARG_MIN_REG
+ align_words
);
1042 /* For an arg passed partly in registers and partly in memory,
1043 this is the number of registers used.
1044 For args passed entirely in registers or entirely in memory, zero. */
1047 function_arg_partial_nregs (cum
, mode
, type
, named
)
1048 CUMULATIVE_ARGS
*cum
;
1049 enum machine_mode mode
;
1056 #ifdef TARGET_V4_CALLS
1057 if (TARGET_V4_CALLS
)
1061 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
1063 if (cum
->nargs_prototype
>= 0)
1067 if (cum
->words
< GP_ARG_NUM_REG
1068 && GP_ARG_NUM_REG
< (cum
->words
+ RS6000_ARG_SIZE (mode
, type
, named
)))
1070 int ret
= GP_ARG_NUM_REG
- cum
->words
;
1071 if (ret
&& TARGET_DEBUG_ARG
)
1072 fprintf (stderr
, "function_arg_partial_nregs: %d\n", ret
);
1080 /* A C expression that indicates when an argument must be passed by
1081 reference. If nonzero for an argument, a copy of that argument is
1082 made in memory and a pointer to the argument is passed instead of
1083 the argument itself. The pointer is passed in whatever way is
1084 appropriate for passing a pointer to that type.
1086 Under V.4, structures and unions are passed by reference. */
1089 function_arg_pass_by_reference (cum
, mode
, type
, named
)
1090 CUMULATIVE_ARGS
*cum
;
1091 enum machine_mode mode
;
1095 #ifdef TARGET_V4_CALLS
1096 if (TARGET_V4_CALLS
&& type
&& AGGREGATE_TYPE_P (type
))
1098 if (TARGET_DEBUG_ARG
)
1099 fprintf (stderr
, "function_arg_pass_by_reference: aggregate\n");
1109 /* Perform any needed actions needed for a function that is receiving a
1110 variable number of arguments.
1114 MODE and TYPE are the mode and type of the current parameter.
1116 PRETEND_SIZE is a variable that should be set to the amount of stack
1117 that must be pushed by the prolog to pretend that our caller pushed
1120 Normally, this macro will push all remaining incoming registers on the
1121 stack and set PRETEND_SIZE to the length of the registers pushed. */
1124 setup_incoming_varargs (cum
, mode
, type
, pretend_size
, no_rtl
)
1125 CUMULATIVE_ARGS
*cum
;
1126 enum machine_mode mode
;
1132 rtx save_area
= virtual_incoming_args_rtx
;
1133 int reg_size
= (TARGET_64BIT
) ? 8 : 4;
1135 if (TARGET_DEBUG_ARG
)
1137 "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n",
1138 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), no_rtl
);
1140 #ifdef TARGET_V4_CALLS
1141 if (TARGET_V4_CALLS
&& !no_rtl
)
1143 rs6000_sysv_varargs_p
= 1;
1144 save_area
= plus_constant (frame_pointer_rtx
, RS6000_VARARGS_OFFSET
);
1150 int first_reg_offset
= cum
->words
;
1152 if (MUST_PASS_IN_STACK (mode
, type
))
1153 first_reg_offset
+= RS6000_ARG_SIZE (TYPE_MODE (type
), type
, 1);
1155 if (first_reg_offset
> GP_ARG_NUM_REG
)
1156 first_reg_offset
= GP_ARG_NUM_REG
;
1158 if (!no_rtl
&& first_reg_offset
!= GP_ARG_NUM_REG
)
1160 (GP_ARG_MIN_REG
+ first_reg_offset
,
1161 gen_rtx (MEM
, BLKmode
,
1162 plus_constant (save_area
, first_reg_offset
* reg_size
)),
1163 GP_ARG_NUM_REG
- first_reg_offset
,
1164 (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
);
1166 *pretend_size
= (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
;
1169 #ifdef TARGET_V4_CALLS
1170 /* Save FP registers if needed. */
1171 if (TARGET_V4_CALLS
&& TARGET_HARD_FLOAT
&& !no_rtl
)
1173 int fregno
= cum
->fregno
;
1174 int num_fp_reg
= FP_ARG_V4_MAX_REG
+ 1 - fregno
;
1176 if (num_fp_reg
>= 0)
1178 rtx cr1
= gen_rtx (REG
, CCmode
, 69);
1179 rtx lab
= gen_label_rtx ();
1180 int off
= (GP_ARG_NUM_REG
* reg_size
) + ((fregno
- FP_ARG_MIN_REG
) * 8);
1182 emit_jump_insn (gen_rtx (SET
, VOIDmode
,
1184 gen_rtx (IF_THEN_ELSE
, VOIDmode
,
1185 gen_rtx (NE
, VOIDmode
, cr1
, const0_rtx
),
1186 gen_rtx (LABEL_REF
, VOIDmode
, lab
),
1189 while ( num_fp_reg
-- >= 0)
1191 emit_move_insn (gen_rtx (MEM
, DFmode
, plus_constant (save_area
, off
)),
1192 gen_rtx (REG
, DFmode
, fregno
++));
1202 /* If defined, is a C expression that produces the machine-specific
1203 code for a call to `__builtin_saveregs'. This code will be moved
1204 to the very beginning of the function, before any parameter access
1205 are made. The return value of this function should be an RTX that
1206 contains the value to use as the return of `__builtin_saveregs'.
1208 The argument ARGS is a `tree_list' containing the arguments that
1209 were passed to `__builtin_saveregs'.
1211 If this macro is not defined, the compiler will output an ordinary
1212 call to the library function `__builtin_saveregs'.
1214 On the Power/PowerPC return the address of the area on the stack
1215 used to hold arguments. Under AIX, this includes the 8 word register
1216 save area. Under V.4 this does not. */
1219 expand_builtin_saveregs (args
)
1222 return virtual_incoming_args_rtx
;
1226 /* Allocate a stack temp. Only allocate one stack temp per type for a
1230 rs6000_stack_temp (mode
, size
)
1231 enum machine_mode mode
;
1234 rtx temp
= stack_temps
[ (int)mode
];
1237 if (temp
== NULL_RTX
)
1239 temp
= assign_stack_local (mode
, size
, 0);
1240 addr
= XEXP (temp
, 0);
1242 if ((size
> 4 && !offsettable_address_p (0, mode
, addr
))
1243 || (size
<= 4 && !memory_address_p (mode
, addr
)))
1245 XEXP (temp
, 0) = copy_addr_to_reg (addr
);
1248 stack_temps
[ (int)mode
] = temp
;
1255 /* Generate a memory reference for expand_block_move, copying volatile,
1256 and other bits from an original memory reference. */
1259 expand_block_move_mem (mode
, addr
, orig_mem
)
1260 enum machine_mode mode
;
1264 rtx mem
= gen_rtx (MEM
, mode
, addr
);
1266 RTX_UNCHANGING_P (mem
) = RTX_UNCHANGING_P (orig_mem
);
1267 MEM_VOLATILE_P (mem
) = MEM_VOLATILE_P (orig_mem
);
1268 MEM_IN_STRUCT_P (mem
) = MEM_IN_STRUCT_P (orig_mem
);
1269 #ifdef MEM_UNALIGNED_P
1270 MEM_UNALIGNED_P (mem
) = MEM_UNALIGNED_P (orig_mem
);
1275 /* Expand a block move operation, and return 1 if successful. Return 0
1276 if we should let the compiler generate normal code.
1278 operands[0] is the destination
1279 operands[1] is the source
1280 operands[2] is the length
1281 operands[3] is the alignment */
1283 #define MAX_MOVE_REG 4
1286 expand_block_move (operands
)
1289 rtx orig_dest
= operands
[0];
1290 rtx orig_src
= operands
[1];
1291 rtx bytes_rtx
= operands
[2];
1292 rtx align_rtx
= operands
[3];
1293 int constp
= (GET_CODE (bytes_rtx
) == CONST_INT
);
1294 int align
= XINT (align_rtx
, 0);
1304 rtx stores
[MAX_MOVE_REG
];
1307 /* If this is not a fixed size move, just call memcpy */
1311 /* Anything to move? */
1312 bytes
= INTVAL (bytes_rtx
);
1316 /* Don't support real large moves. If string instructions are not used,
1317 then don't generate more than 8 loads. */
1323 else if (!STRICT_ALIGNMENT
)
1328 else if (bytes
> 8*align
)
1331 /* Move the address into scratch registers. */
1332 dest_reg
= copy_addr_to_reg (XEXP (orig_dest
, 0));
1333 src_reg
= copy_addr_to_reg (XEXP (orig_src
, 0));
1335 if (TARGET_STRING
) /* string instructions are available */
1337 for ( ; bytes
> 0; bytes
-= move_bytes
)
1339 if (bytes
> 24 /* move up to 32 bytes at a time */
1349 move_bytes
= (bytes
> 32) ? 32 : bytes
;
1350 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1351 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1352 GEN_INT ((move_bytes
== 32) ? 0 : move_bytes
),
1355 else if (bytes
> 16 /* move up to 24 bytes at a time */
1363 move_bytes
= (bytes
> 24) ? 24 : bytes
;
1364 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1365 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1366 GEN_INT (move_bytes
),
1369 else if (bytes
> 8 /* move up to 16 bytes at a time */
1375 move_bytes
= (bytes
> 16) ? 16 : bytes
;
1376 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1377 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1378 GEN_INT (move_bytes
),
1381 else if (bytes
> 4 && !TARGET_64BIT
)
1382 { /* move up to 8 bytes at a time */
1383 move_bytes
= (bytes
> 8) ? 8 : bytes
;
1384 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1385 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1386 GEN_INT (move_bytes
),
1389 else if (bytes
>= 4 && (align
>= 4 || !STRICT_ALIGNMENT
))
1390 { /* move 4 bytes */
1392 tmp_reg
= gen_reg_rtx (SImode
);
1393 emit_move_insn (tmp_reg
, expand_block_move_mem (SImode
, src_reg
, orig_src
));
1394 emit_move_insn (expand_block_move_mem (SImode
, dest_reg
, orig_dest
), tmp_reg
);
1396 else if (bytes
== 2 && (align
>= 2 || !STRICT_ALIGNMENT
))
1397 { /* move 2 bytes */
1399 tmp_reg
= gen_reg_rtx (HImode
);
1400 emit_move_insn (tmp_reg
, expand_block_move_mem (HImode
, src_reg
, orig_src
));
1401 emit_move_insn (expand_block_move_mem (HImode
, dest_reg
, orig_dest
), tmp_reg
);
1403 else if (bytes
== 1) /* move 1 byte */
1406 tmp_reg
= gen_reg_rtx (QImode
);
1407 emit_move_insn (tmp_reg
, expand_block_move_mem (QImode
, src_reg
, orig_src
));
1408 emit_move_insn (expand_block_move_mem (QImode
, dest_reg
, orig_dest
), tmp_reg
);
1411 { /* move up to 4 bytes at a time */
1412 move_bytes
= (bytes
> 4) ? 4 : bytes
;
1413 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1414 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1415 GEN_INT (move_bytes
),
1419 if (bytes
> move_bytes
)
1421 emit_insn (gen_addsi3 (src_reg
, src_reg
, GEN_INT (move_bytes
)));
1422 emit_insn (gen_addsi3 (dest_reg
, dest_reg
, GEN_INT (move_bytes
)));
1427 else /* string instructions not available */
1429 num_reg
= offset
= 0;
1430 for ( ; bytes
> 0; (bytes
-= move_bytes
), (offset
+= move_bytes
))
1432 /* Calculate the correct offset for src/dest */
1436 dest_addr
= dest_reg
;
1440 src_addr
= gen_rtx (PLUS
, Pmode
, src_reg
, GEN_INT (offset
));
1441 dest_addr
= gen_rtx (PLUS
, Pmode
, dest_reg
, GEN_INT (offset
));
1444 /* Generate the appropriate load and store, saving the stores for later */
1445 if (bytes
>= 8 && TARGET_64BIT
&& (align
>= 8 || !STRICT_ALIGNMENT
))
1448 tmp_reg
= gen_reg_rtx (DImode
);
1449 emit_insn (gen_movdi (tmp_reg
, expand_block_move_mem (DImode
, src_addr
, orig_src
)));
1450 stores
[ num_reg
++ ] = gen_movdi (expand_block_move_mem (DImode
, dest_addr
, orig_dest
), tmp_reg
);
1452 else if (bytes
>= 4 && (align
>= 4 || !STRICT_ALIGNMENT
))
1455 tmp_reg
= gen_reg_rtx (SImode
);
1456 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (SImode
, src_addr
, orig_src
)));
1457 stores
[ num_reg
++ ] = gen_movsi (expand_block_move_mem (SImode
, dest_addr
, orig_dest
), tmp_reg
);
1459 else if (bytes
>= 2 && (align
>= 2 || !STRICT_ALIGNMENT
))
1462 tmp_reg
= gen_reg_rtx (HImode
);
1463 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (HImode
, src_addr
, orig_src
)));
1464 stores
[ num_reg
++ ] = gen_movhi (expand_block_move_mem (HImode
, dest_addr
, orig_dest
), tmp_reg
);
1469 tmp_reg
= gen_reg_rtx (QImode
);
1470 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (QImode
, src_addr
, orig_src
)));
1471 stores
[ num_reg
++ ] = gen_movqi (expand_block_move_mem (QImode
, dest_addr
, orig_dest
), tmp_reg
);
1474 if (num_reg
>= MAX_MOVE_REG
)
1476 for (i
= 0; i
< num_reg
; i
++)
1477 emit_insn (stores
[i
]);
1482 for (i
= 0; i
< num_reg
; i
++)
1483 emit_insn (stores
[i
]);
1490 /* Return 1 if OP is a load multiple operation. It is known to be a
1491 PARALLEL and the first section will be tested. */
1494 load_multiple_operation (op
, mode
)
1496 enum machine_mode mode
;
1498 int count
= XVECLEN (op
, 0);
1503 /* Perform a quick check so we don't blow up below. */
1505 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
1506 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
1507 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
1510 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
1511 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
1513 for (i
= 1; i
< count
; i
++)
1515 rtx elt
= XVECEXP (op
, 0, i
);
1517 if (GET_CODE (elt
) != SET
1518 || GET_CODE (SET_DEST (elt
)) != REG
1519 || GET_MODE (SET_DEST (elt
)) != SImode
1520 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
1521 || GET_CODE (SET_SRC (elt
)) != MEM
1522 || GET_MODE (SET_SRC (elt
)) != SImode
1523 || GET_CODE (XEXP (SET_SRC (elt
), 0)) != PLUS
1524 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt
), 0), 0), src_addr
)
1525 || GET_CODE (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != CONST_INT
1526 || INTVAL (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != i
* 4)
1533 /* Similar, but tests for store multiple. Here, the second vector element
1534 is a CLOBBER. It will be tested later. */
1537 store_multiple_operation (op
, mode
)
1539 enum machine_mode mode
;
1541 int count
= XVECLEN (op
, 0) - 1;
1546 /* Perform a quick check so we don't blow up below. */
1548 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
1549 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
1550 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
1553 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
1554 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
1556 for (i
= 1; i
< count
; i
++)
1558 rtx elt
= XVECEXP (op
, 0, i
+ 1);
1560 if (GET_CODE (elt
) != SET
1561 || GET_CODE (SET_SRC (elt
)) != REG
1562 || GET_MODE (SET_SRC (elt
)) != SImode
1563 || REGNO (SET_SRC (elt
)) != src_regno
+ i
1564 || GET_CODE (SET_DEST (elt
)) != MEM
1565 || GET_MODE (SET_DEST (elt
)) != SImode
1566 || GET_CODE (XEXP (SET_DEST (elt
), 0)) != PLUS
1567 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt
), 0), 0), dest_addr
)
1568 || GET_CODE (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != CONST_INT
1569 || INTVAL (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != i
* 4)
1576 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
1577 We only check the opcode against the mode of the CC value here. */
1580 branch_comparison_operator (op
, mode
)
1582 enum machine_mode mode
;
1584 enum rtx_code code
= GET_CODE (op
);
1585 enum machine_mode cc_mode
;
1587 if (GET_RTX_CLASS (code
) != '<')
1590 cc_mode
= GET_MODE (XEXP (op
, 0));
1591 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
1594 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
1595 && cc_mode
== CCUNSmode
)
1598 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
1599 && (cc_mode
!= CCUNSmode
))
1605 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
1606 We check the opcode against the mode of the CC value and disallow EQ or
1607 NE comparisons for integers. */
1610 scc_comparison_operator (op
, mode
)
1612 enum machine_mode mode
;
1614 enum rtx_code code
= GET_CODE (op
);
1615 enum machine_mode cc_mode
;
1617 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1620 if (GET_RTX_CLASS (code
) != '<')
1623 cc_mode
= GET_MODE (XEXP (op
, 0));
1624 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
1627 if (code
== NE
&& cc_mode
!= CCFPmode
)
1630 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
1631 && cc_mode
== CCUNSmode
)
1634 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
1635 && (cc_mode
!= CCUNSmode
))
1638 if (cc_mode
== CCEQmode
&& code
!= EQ
&& code
!= NE
)
1644 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
1645 mask required to convert the result of a rotate insn into a shift
1646 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
1649 includes_lshift_p (shiftop
, andop
)
1650 register rtx shiftop
;
1653 int shift_mask
= (~0 << INTVAL (shiftop
));
1655 return (INTVAL (andop
) & ~shift_mask
) == 0;
1658 /* Similar, but for right shift. */
1661 includes_rshift_p (shiftop
, andop
)
1662 register rtx shiftop
;
1665 unsigned shift_mask
= ~0;
1667 shift_mask
>>= INTVAL (shiftop
);
1669 return (INTVAL (andop
) & ~ shift_mask
) == 0;
1672 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
1673 for lfq and stfq insns.
1675 Note reg1 and reg2 *must* be hard registers. To be sure we will
1676 abort if we are passed pseudo registers. */
1679 registers_ok_for_quad_peep (reg1
, reg2
)
1682 /* We might have been passed a SUBREG. */
1683 if (GET_CODE (reg1
) != REG
|| GET_CODE (reg2
) != REG
)
1686 return (REGNO (reg1
) == REGNO (reg2
) - 1);
1689 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
1690 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
1693 addrs_ok_for_quad_peep (addr1
, addr2
)
1700 /* Extract an offset (if used) from the first addr. */
1701 if (GET_CODE (addr1
) == PLUS
)
1703 /* If not a REG, return zero. */
1704 if (GET_CODE (XEXP (addr1
, 0)) != REG
)
1708 reg1
= REGNO (XEXP (addr1
, 0));
1709 /* The offset must be constant! */
1710 if (GET_CODE (XEXP (addr1
, 1)) != CONST_INT
)
1712 offset1
= INTVAL (XEXP (addr1
, 1));
1715 else if (GET_CODE (addr1
) != REG
)
1719 reg1
= REGNO (addr1
);
1720 /* This was a simple (mem (reg)) expression. Offset is 0. */
1724 /* Make sure the second address is a (mem (plus (reg) (const_int). */
1725 if (GET_CODE (addr2
) != PLUS
)
1728 if (GET_CODE (XEXP (addr2
, 0)) != REG
1729 || GET_CODE (XEXP (addr2
, 1)) != CONST_INT
)
1732 if (reg1
!= REGNO (XEXP (addr2
, 0)))
1735 /* The offset for the second addr must be 8 more than the first addr. */
1736 if (INTVAL (XEXP (addr2
, 1)) != offset1
+ 8)
1739 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
1744 /* Return the register class of a scratch register needed to copy IN into
1745 or out of a register in CLASS in MODE. If it can be done directly,
1746 NO_REGS is returned. */
1749 secondary_reload_class (class, mode
, in
)
1750 enum reg_class
class;
1751 enum machine_mode mode
;
1754 int regno
= true_regnum (in
);
1756 if (regno
>= FIRST_PSEUDO_REGISTER
)
1759 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
1761 if (class == GENERAL_REGS
|| class == BASE_REGS
1762 || (regno
>= 0 && INT_REGNO_P (regno
)))
1765 /* Constants, memory, and FP registers can go into FP registers. */
1766 if ((regno
== -1 || FP_REGNO_P (regno
))
1767 && (class == FLOAT_REGS
|| class == NON_SPECIAL_REGS
))
1770 /* We can copy among the CR registers. */
1771 if ((class == CR_REGS
|| class == CR0_REGS
)
1772 && regno
>= 0 && CR_REGNO_P (regno
))
1775 /* Otherwise, we need GENERAL_REGS. */
1776 return GENERAL_REGS
;
1779 /* Given a comparison operation, return the bit number in CCR to test. We
1780 know this is a valid comparison.
1782 SCC_P is 1 if this is for an scc. That means that %D will have been
1783 used instead of %C, so the bits will be in different places.
1785 Return -1 if OP isn't a valid comparison for some reason. */
1792 enum rtx_code code
= GET_CODE (op
);
1793 enum machine_mode cc_mode
;
1797 if (GET_RTX_CLASS (code
) != '<')
1800 cc_mode
= GET_MODE (XEXP (op
, 0));
1801 cc_regnum
= REGNO (XEXP (op
, 0));
1802 base_bit
= 4 * (cc_regnum
- 68);
1804 /* In CCEQmode cases we have made sure that the result is always in the
1805 third bit of the CR field. */
1807 if (cc_mode
== CCEQmode
)
1808 return base_bit
+ 3;
1813 return scc_p
? base_bit
+ 3 : base_bit
+ 2;
1815 return base_bit
+ 2;
1817 return base_bit
+ 1;
1822 /* If floating-point, we will have done a cror to put the bit in the
1823 unordered position. So test that bit. For integer, this is ! LT
1824 unless this is an scc insn. */
1825 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
;
1828 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
+ 1;
1835 /* Print an operand. Recognize special options, documented below. */
1838 print_operand (file
, x
, code
)
1846 /* These macros test for integers and extract the low-order bits. */
1848 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
1849 && GET_MODE (X) == VOIDmode)
1851 #define INT_LOWPART(X) \
1852 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
1857 /* Write out an instruction after the call which may be replaced
1858 with glue code by the loader. This depends on the AIX version. */
1859 asm_fprintf (file
, RS6000_CALL_GLUE
);
1863 /* Write the register number of the TOC register. */
1864 fputs (TARGET_MINIMAL_TOC
? reg_names
[30] : reg_names
[2], file
);
1868 /* If X is a constant integer whose low-order 5 bits are zero,
1869 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
1870 in the AIX assembler where "sri" with a zero shift count
1871 write a trash instruction. */
1872 if (GET_CODE (x
) == CONST_INT
&& (INTVAL (x
) & 31) == 0)
1879 /* Low-order 16 bits of constant, unsigned. */
1881 output_operand_lossage ("invalid %%b value");
1883 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
1887 /* This is an optional cror needed for LE or GE floating-point
1888 comparisons. Otherwise write nothing. */
1889 if ((GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
)
1890 && GET_MODE (XEXP (x
, 0)) == CCFPmode
)
1892 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
1894 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
1895 base_bit
+ 2, base_bit
+ (GET_CODE (x
) == GE
));
1900 /* Similar, except that this is for an scc, so we must be able to
1901 encode the test in a single bit that is one. We do the above
1902 for any LE, GE, GEU, or LEU and invert the bit for NE. */
1903 if (GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
1904 || GET_CODE (x
) == LEU
|| GET_CODE (x
) == GEU
)
1906 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
1908 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
1910 base_bit
+ (GET_CODE (x
) == GE
|| GET_CODE (x
) == GEU
));
1913 else if (GET_CODE (x
) == NE
)
1915 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
1917 fprintf (file
, "crnor %d,%d,%d\n\t", base_bit
+ 3,
1918 base_bit
+ 2, base_bit
+ 2);
1923 /* X is a CR register. Print the number of the third bit of the CR */
1924 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
1925 output_operand_lossage ("invalid %%E value");
1927 fprintf(file
, "%d", 4 * (REGNO (x
) - 68) + 3);
1931 /* X is a CR register. Print the shift count needed to move it
1932 to the high-order four bits. */
1933 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
1934 output_operand_lossage ("invalid %%f value");
1936 fprintf (file
, "%d", 4 * (REGNO (x
) - 68));
1940 /* Similar, but print the count for the rotate in the opposite
1942 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
1943 output_operand_lossage ("invalid %%F value");
1945 fprintf (file
, "%d", 32 - 4 * (REGNO (x
) - 68));
1949 /* X is a constant integer. If it is negative, print "m",
1950 otherwise print "z". This is to make a aze or ame insn. */
1951 if (GET_CODE (x
) != CONST_INT
)
1952 output_operand_lossage ("invalid %%G value");
1953 else if (INTVAL (x
) >= 0)
1960 /* If constant, output low-order five bits. Otherwise,
1963 fprintf (file
, "%d", INT_LOWPART (x
) & 31);
1965 print_operand (file
, x
, 0);
1969 /* Print `i' if this is a constant, else nothing. */
1975 /* Write the bit number in CCR for jump. */
1978 output_operand_lossage ("invalid %%j code");
1980 fprintf (file
, "%d", i
);
1984 /* Similar, but add one for shift count in rlinm for scc and pass
1985 scc flag to `ccr_bit'. */
1988 output_operand_lossage ("invalid %%J code");
1990 /* If we want bit 31, write a shift count of zero, not 32. */
1991 fprintf (file
, "%d", i
== 31 ? 0 : i
+ 1);
1995 /* X must be a constant. Write the 1's complement of the
1998 output_operand_lossage ("invalid %%k value");
2000 fprintf (file
, "%d", ~ INT_LOWPART (x
));
2004 /* Write second word of DImode or DFmode reference. Works on register
2005 or non-indexed memory only. */
2006 if (GET_CODE (x
) == REG
)
2007 fprintf (file
, "%d", REGNO (x
) + 1);
2008 else if (GET_CODE (x
) == MEM
)
2010 /* Handle possible auto-increment. Since it is pre-increment and
2011 we have already done it, we can just use an offset of four. */
2012 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2013 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2014 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 4));
2016 output_address (plus_constant (XEXP (x
, 0), 4));
2021 /* MB value for a mask operand. */
2022 if (! mask_operand (x
, VOIDmode
))
2023 output_operand_lossage ("invalid %%m value");
2025 val
= INT_LOWPART (x
);
2027 /* If the high bit is set and the low bit is not, the value is zero.
2028 If the high bit is zero, the value is the first 1 bit we find from
2030 if (val
< 0 && (val
& 1) == 0)
2032 fprintf (file
, "0");
2037 for (i
= 1; i
< 32; i
++)
2038 if ((val
<<= 1) < 0)
2040 fprintf (file
, "%d", i
);
2044 /* Otherwise, look for the first 0 bit from the right. The result is its
2045 number plus 1. We know the low-order bit is one. */
2046 for (i
= 0; i
< 32; i
++)
2047 if (((val
>>= 1) & 1) == 0)
2050 /* If we ended in ...01, I would be 0. The correct value is 31, so
2052 fprintf (file
, "%d", 31 - i
);
2056 /* ME value for a mask operand. */
2057 if (! mask_operand (x
, VOIDmode
))
2058 output_operand_lossage ("invalid %%m value");
2060 val
= INT_LOWPART (x
);
2062 /* If the low bit is set and the high bit is not, the value is 31.
2063 If the low bit is zero, the value is the first 1 bit we find from
2065 if ((val
& 1) && val
>= 0)
2070 else if ((val
& 1) == 0)
2072 for (i
= 0; i
< 32; i
++)
2073 if ((val
>>= 1) & 1)
2076 /* If we had ....10, I would be 0. The result should be
2077 30, so we need 30 - i. */
2078 fprintf (file
, "%d", 30 - i
);
2082 /* Otherwise, look for the first 0 bit from the left. The result is its
2083 number minus 1. We know the high-order bit is one. */
2084 for (i
= 0; i
< 32; i
++)
2085 if ((val
<<= 1) >= 0)
2088 fprintf (file
, "%d", i
);
2092 /* Write the number of elements in the vector times 4. */
2093 if (GET_CODE (x
) != PARALLEL
)
2094 output_operand_lossage ("invalid %%N value");
2096 fprintf (file
, "%d", XVECLEN (x
, 0) * 4);
2100 /* Similar, but subtract 1 first. */
2101 if (GET_CODE (x
) != PARALLEL
)
2102 output_operand_lossage ("invalid %%N value");
2104 fprintf (file
, "%d", (XVECLEN (x
, 0) - 1) * 4);
2108 /* X is a CONST_INT that is a power of two. Output the logarithm. */
2110 || (i
= exact_log2 (INT_LOWPART (x
))) < 0)
2111 output_operand_lossage ("invalid %%p value");
2113 fprintf (file
, "%d", i
);
2117 /* The operand must be an indirect memory reference. The result
2118 is the register number. */
2119 if (GET_CODE (x
) != MEM
|| GET_CODE (XEXP (x
, 0)) != REG
2120 || REGNO (XEXP (x
, 0)) >= 32)
2121 output_operand_lossage ("invalid %%P value");
2123 fprintf (file
, "%d", REGNO (XEXP (x
, 0)));
2127 /* X is a CR register. Print the mask for `mtcrf'. */
2128 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2129 output_operand_lossage ("invalid %%R value");
2131 fprintf (file
, "%d", 128 >> (REGNO (x
) - 68));
2135 /* Low 5 bits of 32 - value */
2137 output_operand_lossage ("invalid %%s value");
2139 fprintf (file
, "%d", (32 - INT_LOWPART (x
)) & 31);
2143 /* Write 12 if this jump operation will branch if true, 4 otherwise.
2144 All floating-point operations except NE branch true and integer
2145 EQ, LT, GT, LTU and GTU also branch true. */
2146 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
2147 output_operand_lossage ("invalid %%t value");
2149 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
2150 && GET_CODE (x
) != NE
)
2151 || GET_CODE (x
) == EQ
2152 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
2153 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
2160 /* Opposite of 't': write 4 if this jump operation will branch if true,
2162 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
2163 output_operand_lossage ("invalid %%t value");
2165 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
2166 && GET_CODE (x
) != NE
)
2167 || GET_CODE (x
) == EQ
2168 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
2169 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
2176 /* High-order 16 bits of constant. */
2178 output_operand_lossage ("invalid %%u value");
2180 fprintf (file
, "0x%x", (INT_LOWPART (x
) >> 16) & 0xffff);
2184 /* Print `u' if this has an auto-increment or auto-decrement. */
2185 if (GET_CODE (x
) == MEM
2186 && (GET_CODE (XEXP (x
, 0)) == PRE_INC
2187 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
))
2192 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
2195 fprintf (file
, "%d",
2196 (INT_LOWPART (x
) & 0xffff) - 2 * (INT_LOWPART (x
) & 0x8000));
2198 print_operand (file
, x
, 0);
2202 /* If constant, low-order 16 bits of constant, unsigned.
2203 Otherwise, write normally. */
2205 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
2207 print_operand (file
, x
, 0);
2211 if (GET_CODE (x
) == MEM
2212 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x
, 0)))
2217 /* Like 'L', for third word of TImode */
2218 if (GET_CODE (x
) == REG
)
2219 fprintf (file
, "%d", REGNO (x
) + 2);
2220 else if (GET_CODE (x
) == MEM
)
2222 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2223 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2224 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 8));
2226 output_address (plus_constant (XEXP (x
, 0), 8));
2231 /* X is a SYMBOL_REF. Write out the name preceded by a
2232 period and without any trailing data in brackets. Used for function
2233 names. If we are configured for System V (or the embedded ABI) on
2234 the PowerPC, do not emit the period, since those systems do not use
2235 TOCs and the like. */
2236 if (GET_CODE (x
) != SYMBOL_REF
)
2239 if (XSTR (x
, 0)[0] != '.')
2241 switch (DEFAULT_ABI
)
2251 case ABI_AIX_NODESC
:
2259 RS6000_OUTPUT_BASENAME (file
, XSTR (x
, 0));
2263 /* Like 'L', for last word of TImode. */
2264 if (GET_CODE (x
) == REG
)
2265 fprintf (file
, "%d", REGNO (x
) + 3);
2266 else if (GET_CODE (x
) == MEM
)
2268 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2269 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2270 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 12));
2272 output_address (plus_constant (XEXP (x
, 0), 12));
2277 if (GET_CODE (x
) == REG
)
2278 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
2279 else if (GET_CODE (x
) == MEM
)
2281 /* We need to handle PRE_INC and PRE_DEC here, since we need to
2282 know the width from the mode. */
2283 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
)
2284 fprintf (file
, "%d(%d)", GET_MODE_SIZE (GET_MODE (x
)),
2285 REGNO (XEXP (XEXP (x
, 0), 0)));
2286 else if (GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2287 fprintf (file
, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x
)),
2288 REGNO (XEXP (XEXP (x
, 0), 0)));
2290 output_address (XEXP (x
, 0));
2293 output_addr_const (file
, x
);
2297 output_operand_lossage ("invalid %%xn code");
2301 /* Print the address of an operand. */
2304 print_operand_address (file
, x
)
2308 if (GET_CODE (x
) == REG
)
2309 fprintf (file
, "0(%s)", reg_names
[ REGNO (x
) ]);
2310 else if (GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == CONST
)
2312 output_addr_const (file
, x
);
2313 /* When TARGET_MINIMAL_TOC, use the indirected toc table pointer instead
2314 of the toc pointer. */
2315 #ifdef TARGET_NO_TOC
2320 fprintf (file
, "(%s)", reg_names
[ TARGET_MINIMAL_TOC
? 30 : 2 ]);
2322 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == REG
)
2324 if (REGNO (XEXP (x
, 0)) == 0)
2325 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 1)) ],
2326 reg_names
[ REGNO (XEXP (x
, 0)) ]);
2328 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 0)) ],
2329 reg_names
[ REGNO (XEXP (x
, 1)) ]);
2331 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == CONST_INT
)
2332 fprintf (file
, "%d(%s)", INTVAL (XEXP (x
, 1)), reg_names
[ REGNO (XEXP (x
, 0)) ]);
2333 else if (TARGET_ELF
&& !TARGET_64BIT
&& GET_CODE (x
) == LO_SUM
2334 && GET_CODE (XEXP (x
, 0)) == REG
&& CONSTANT_P (XEXP (x
, 1)))
2336 output_addr_const (file
, XEXP (x
, 1));
2337 fprintf (file
, "@l(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
2343 /* This page contains routines that are used to determine what the function
2344 prologue and epilogue code will do and write them out. */
2346 /* Return the first fixed-point register that is required to be saved. 32 if
2350 first_reg_to_save ()
2354 /* Find lowest numbered live register. */
2355 for (first_reg
= 13; first_reg
<= 31; first_reg
++)
2356 if (regs_ever_live
[first_reg
])
2359 /* If profiling, then we must save/restore every register that contains
2360 a parameter before/after the .mcount call. Use registers from 30 down
2361 to 23 to do this. Don't use the frame pointer in reg 31.
2363 For now, save enough room for all of the parameter registers. */
2364 if (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
2371 /* Similar, for FP regs. */
2374 first_fp_reg_to_save ()
2378 /* Find lowest numbered live register. */
2379 for (first_reg
= 14 + 32; first_reg
<= 63; first_reg
++)
2380 if (regs_ever_live
[first_reg
])
2386 /* Return non-zero if this function makes calls. */
2389 rs6000_makes_calls ()
2393 /* If we are profiling, we will be making a call to mcount. */
2397 for (insn
= get_insns (); insn
; insn
= next_insn (insn
))
2398 if (GET_CODE (insn
) == CALL_INSN
)
2405 /* Calculate the stack information for the current function. This is
2406 complicated by having two separate calling sequences, the AIX calling
2407 sequence and the V.4 calling sequence.
2409 AIX stack frames look like:
2411 SP----> +---------------------------------------+
2412 | back chain to caller | 0
2413 +---------------------------------------+
2415 +---------------------------------------+
2417 +---------------------------------------+
2418 | reserved for compilers | 12
2419 +---------------------------------------+
2420 | reserved for binders | 16
2421 +---------------------------------------+
2422 | saved TOC pointer | 20
2423 +---------------------------------------+
2424 | Parameter save area (P) | 24
2425 +---------------------------------------+
2426 | Alloca space (A) | 24+P
2427 +---------------------------------------+
2428 | Local variable space (L) | 24+P+A
2429 +---------------------------------------+
2430 | Save area for GP registers (G) | 24+P+A+L
2431 +---------------------------------------+
2432 | Save area for FP registers (F) | 24+P+A+L+G
2433 +---------------------------------------+
2434 old SP->| back chain to caller's caller |
2435 +---------------------------------------+
2437 V.4 stack frames look like:
2439 SP----> +---------------------------------------+
2440 | back chain to caller | 0
2441 +---------------------------------------+
2442 | caller's saved LR | 4
2443 +---------------------------------------+
2444 | Parameter save area (P) | 8
2445 +---------------------------------------+
2446 | Alloca space (A) | 8+P
2447 +---------------------------------------+
2448 | Varargs save area (V) | 8+P+A
2449 +---------------------------------------+
2450 | Local variable space (L) | 8+P+A+V
2451 +---------------------------------------+
2452 | saved CR (C) | 8+P+A+V+L
2453 +---------------------------------------+
2454 | Save area for GP registers (G) | 8+P+A+V+L+C
2455 +---------------------------------------+
2456 | Save area for FP registers (F) | 8+P+A+V+L+C+G
2457 +---------------------------------------+
2458 old SP->| back chain to caller's caller |
2459 +---------------------------------------+
2462 A PowerPC Windows/NT frame looks like:
2464 SP----> +---------------------------------------+
2465 | back chain to caller | 0
2466 +---------------------------------------+
2468 +---------------------------------------+
2470 +---------------------------------------+
2472 +---------------------------------------+
2474 +---------------------------------------+
2476 +---------------------------------------+
2477 | Parameter save area (P) | 24
2478 +---------------------------------------+
2479 | Alloca space (A) | 24+P
2480 +---------------------------------------+
2481 | Local variable space (L) | 24+P+A
2482 +---------------------------------------+
2483 | Save area for FP registers (F) | 24+P+A+L
2484 +---------------------------------------+
2485 | Possible alignment area (X) | 24+P+A+L+F
2486 +---------------------------------------+
2487 | Save area for GP registers (G) | 24+P+A+L+F+X
2488 +---------------------------------------+
2489 | Save area for CR (C) | 24+P+A+L+F+X+G
2490 +---------------------------------------+
2491 | Save area for TOC (T) | 24+P+A+L+F+X+G+C
2492 +---------------------------------------+
2493 | Save area for LR (R) | 24+P+A+L+F+X+G+C+T
2494 +---------------------------------------+
2495 old SP->| back chain to caller's caller |
2496 +---------------------------------------+
2498 For NT, there is no specific order to save the registers, but in
2499 order to support __builtin_return_address, the save area for the
2500 link register needs to be in a known place, so we use -4 off of the
2501 old SP. To support calls through pointers, we also allocate a
2502 fixed slot to store the TOC, -8 off the old SP. */
2505 rs6000_stack_info ()
2507 static rs6000_stack_t info
, zero_info
;
2508 rs6000_stack_t
*info_ptr
= &info
;
2509 int reg_size
= TARGET_64BIT
? 8 : 4;
2510 enum rs6000_abi abi
;
2513 /* Zero all fields portably */
2516 /* Select which calling sequence */
2517 info_ptr
->abi
= abi
= DEFAULT_ABI
;
2519 /* Calculate which registers need to be saved & save area size */
2520 info_ptr
->first_gp_reg_save
= first_reg_to_save ();
2521 info_ptr
->gp_size
= reg_size
* (32 - info_ptr
->first_gp_reg_save
);
2523 info_ptr
->first_fp_reg_save
= first_fp_reg_to_save ();
2524 info_ptr
->fp_size
= 8 * (64 - info_ptr
->first_fp_reg_save
);
2526 /* Does this function call anything? */
2527 info_ptr
->calls_p
= rs6000_makes_calls ();
2529 /* Do we need to allocate space to save the toc? */
2530 if (rs6000_save_toc_p
)
2532 info_ptr
->toc_save_p
= 1;
2533 info_ptr
->toc_size
= reg_size
;
2536 /* If this is main and we need to call a function to set things up,
2537 save main's arguments around the call. */
2538 if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl
)), "main") == 0)
2540 info_ptr
->main_p
= 1;
2543 if (DECL_ARGUMENTS (current_function_decl
))
2548 info_ptr
->main_save_p
= 1;
2549 info_ptr
->main_size
= 0;
2550 info_ptr
->calls_p
= 1;
2552 for ((i
= 0), (arg
= DECL_ARGUMENTS (current_function_decl
));
2553 arg
!= NULL_TREE
&& i
< 8;
2554 (arg
= TREE_CHAIN (arg
)), i
++)
2556 info_ptr
->main_size
+= reg_size
;
2562 /* Determine if we need to save the link register */
2563 if (regs_ever_live
[65] || profile_flag
2564 #ifdef TARGET_RELOCATABLE
2565 || (TARGET_RELOCATABLE
&& (get_pool_size () != 0))
2567 || (info_ptr
->first_fp_reg_save
!= 64
2568 && !FP_SAVE_INLINE (info_ptr
->first_fp_reg_save
))
2569 || (abi
== ABI_V4
&& current_function_calls_alloca
)
2570 || info_ptr
->calls_p
)
2572 info_ptr
->lr_save_p
= 1;
2573 regs_ever_live
[65] = 1;
2575 info_ptr
->lr_size
= reg_size
;
2578 /* Determine if we need to save the condition code registers */
2579 if (regs_ever_live
[70] || regs_ever_live
[71] || regs_ever_live
[72])
2581 info_ptr
->cr_save_p
= 1;
2582 if (abi
== ABI_V4
|| abi
== ABI_NT
)
2583 info_ptr
->cr_size
= reg_size
;
2586 /* Determine various sizes */
2587 info_ptr
->reg_size
= reg_size
;
2588 info_ptr
->fixed_size
= RS6000_SAVE_AREA
;
2589 info_ptr
->varargs_size
= RS6000_VARARGS_AREA
;
2590 info_ptr
->vars_size
= ALIGN (get_frame_size (), 8);
2591 info_ptr
->parm_size
= ALIGN (current_function_outgoing_args_size
, 8);
2592 info_ptr
->save_size
= ALIGN (info_ptr
->fp_size
2596 + info_ptr
->toc_size
2597 + info_ptr
->main_size
, 8);
2599 total_raw_size
= (info_ptr
->vars_size
2600 + info_ptr
->parm_size
2601 + info_ptr
->save_size
2602 + info_ptr
->varargs_size
2603 + info_ptr
->fixed_size
);
2605 info_ptr
->total_size
= ALIGN (total_raw_size
, STACK_BOUNDARY
/ BITS_PER_UNIT
);
2607 /* Determine if we need to allocate any stack frame.
2608 For AIX We need to push the stack if a frame pointer is needed (because
2609 the stack might be dynamically adjusted), if we are debugging, if the
2610 total stack size is more than 220 bytes, or if we make calls.
2612 For V.4 we don't have the stack cushion that AIX uses, but assume that
2613 the debugger can handle stackless frames. */
2615 if (info_ptr
->calls_p
)
2616 info_ptr
->push_p
= 1;
2618 else if (abi
== ABI_V4
|| abi
== ABI_NT
)
2619 info_ptr
->push_p
= (total_raw_size
> info_ptr
->fixed_size
2620 || info_ptr
->lr_save_p
);
2623 info_ptr
->push_p
= (frame_pointer_needed
2624 || write_symbols
!= NO_DEBUG
2625 || info_ptr
->total_size
> 220);
2627 /* Calculate the offsets */
2635 case ABI_AIX_NODESC
:
2636 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
2637 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
2638 info_ptr
->main_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->main_size
;
2639 info_ptr
->cr_save_offset
= 4;
2640 info_ptr
->lr_save_offset
= 8;
2644 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
2645 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
2646 info_ptr
->cr_save_offset
= info_ptr
->gp_save_offset
- reg_size
;
2647 info_ptr
->toc_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->cr_size
;
2648 info_ptr
->main_save_offset
= info_ptr
->toc_save_offset
- info_ptr
->toc_size
;
2649 info_ptr
->lr_save_offset
= reg_size
;
2653 info_ptr
->lr_save_offset
= -4;
2654 info_ptr
->toc_save_offset
= info_ptr
->lr_save_offset
- info_ptr
->lr_size
;
2655 info_ptr
->cr_save_offset
= info_ptr
->toc_save_offset
- info_ptr
->toc_size
;
2656 info_ptr
->gp_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->cr_size
- info_ptr
->gp_size
+ reg_size
;
2657 info_ptr
->fp_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->fp_size
;
2658 if (info_ptr
->fp_size
&& ((- info_ptr
->fp_save_offset
) % 8) != 0)
2659 info_ptr
->fp_save_offset
-= 4;
2661 info_ptr
->main_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->main_size
;
2665 /* Zero offsets if we're not saving those registers */
2666 if (!info_ptr
->fp_size
)
2667 info_ptr
->fp_save_offset
= 0;
2669 if (!info_ptr
->gp_size
)
2670 info_ptr
->gp_save_offset
= 0;
2672 if (!info_ptr
->lr_save_p
)
2673 info_ptr
->lr_save_offset
= 0;
2675 if (!info_ptr
->cr_save_p
)
2676 info_ptr
->cr_save_offset
= 0;
2678 if (!info_ptr
->toc_save_p
)
2679 info_ptr
->toc_save_offset
= 0;
2681 if (!info_ptr
->main_save_p
)
2682 info_ptr
->main_save_offset
= 0;
2688 debug_stack_info (info
)
2689 rs6000_stack_t
*info
;
2694 info
= rs6000_stack_info ();
2696 fprintf (stderr
, "\nStack information for function %s:\n",
2697 ((current_function_decl
&& DECL_NAME (current_function_decl
))
2698 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl
))
2703 default: abi_string
= "Unknown"; break;
2704 case ABI_NONE
: abi_string
= "NONE"; break;
2705 case ABI_AIX
: abi_string
= "AIX"; break;
2706 case ABI_AIX_NODESC
: abi_string
= "AIX"; break;
2707 case ABI_V4
: abi_string
= "V.4"; break;
2708 case ABI_NT
: abi_string
= "NT"; break;
2711 fprintf (stderr
, "\tABI = %5s\n", abi_string
);
2713 if (info
->first_gp_reg_save
!= 32)
2714 fprintf (stderr
, "\tfirst_gp_reg_save = %5d\n", info
->first_gp_reg_save
);
2716 if (info
->first_fp_reg_save
!= 64)
2717 fprintf (stderr
, "\tfirst_fp_reg_save = %5d\n", info
->first_fp_reg_save
);
2719 if (info
->lr_save_p
)
2720 fprintf (stderr
, "\tlr_save_p = %5d\n", info
->lr_save_p
);
2722 if (info
->cr_save_p
)
2723 fprintf (stderr
, "\tcr_save_p = %5d\n", info
->cr_save_p
);
2725 if (info
->toc_save_p
)
2726 fprintf (stderr
, "\ttoc_save_p = %5d\n", info
->toc_save_p
);
2729 fprintf (stderr
, "\tpush_p = %5d\n", info
->push_p
);
2732 fprintf (stderr
, "\tcalls_p = %5d\n", info
->calls_p
);
2735 fprintf (stderr
, "\tmain_p = %5d\n", info
->main_p
);
2737 if (info
->main_save_p
)
2738 fprintf (stderr
, "\tmain_save_p = %5d\n", info
->main_save_p
);
2740 if (info
->gp_save_offset
)
2741 fprintf (stderr
, "\tgp_save_offset = %5d\n", info
->gp_save_offset
);
2743 if (info
->fp_save_offset
)
2744 fprintf (stderr
, "\tfp_save_offset = %5d\n", info
->fp_save_offset
);
2746 if (info
->lr_save_offset
)
2747 fprintf (stderr
, "\tlr_save_offset = %5d\n", info
->lr_save_offset
);
2749 if (info
->cr_save_offset
)
2750 fprintf (stderr
, "\tcr_save_offset = %5d\n", info
->cr_save_offset
);
2752 if (info
->toc_save_offset
)
2753 fprintf (stderr
, "\ttoc_save_offset = %5d\n", info
->toc_save_offset
);
2755 if (info
->varargs_save_offset
)
2756 fprintf (stderr
, "\tvarargs_save_offset = %5d\n", info
->varargs_save_offset
);
2758 if (info
->main_save_offset
)
2759 fprintf (stderr
, "\tmain_save_offset = %5d\n", info
->main_save_offset
);
2761 if (info
->total_size
)
2762 fprintf (stderr
, "\ttotal_size = %5d\n", info
->total_size
);
2764 if (info
->varargs_size
)
2765 fprintf (stderr
, "\tvarargs_size = %5d\n", info
->varargs_size
);
2767 if (info
->vars_size
)
2768 fprintf (stderr
, "\tvars_size = %5d\n", info
->vars_size
);
2770 if (info
->parm_size
)
2771 fprintf (stderr
, "\tparm_size = %5d\n", info
->parm_size
);
2773 if (info
->fixed_size
)
2774 fprintf (stderr
, "\tfixed_size = %5d\n", info
->fixed_size
);
2777 fprintf (stderr
, "\tgp_size = %5d\n", info
->gp_size
);
2780 fprintf (stderr
, "\tfp_size = %5d\n", info
->fp_size
);
2783 fprintf (stderr
, "\tlr_size = %5d\n", info
->cr_size
);
2786 fprintf (stderr
, "\tcr_size = %5d\n", info
->cr_size
);
2789 fprintf (stderr
, "\ttoc_size = %5d\n", info
->toc_size
);
2791 if (info
->main_size
)
2792 fprintf (stderr
, "\tmain_size = %5d\n", info
->main_size
);
2794 if (info
->save_size
)
2795 fprintf (stderr
, "\tsave_size = %5d\n", info
->save_size
);
2797 if (info
->reg_size
!= 4)
2798 fprintf (stderr
, "\treg_size = %5d\n", info
->reg_size
);
2800 fprintf (stderr
, "\n");
2804 /* Write function prologue. */
2806 output_prolog (file
, size
)
2810 rs6000_stack_t
*info
= rs6000_stack_info ();
2811 int reg_size
= info
->reg_size
;
2817 store_reg
= "\tstd %s,%d(%s)";
2818 load_reg
= "\tlld %s,%d(%s)";
2822 store_reg
= "\t{st|stw} %s,%d(%s)\n";
2823 load_reg
= "\t{l|lwz} %s,%d(%s)\n";
2826 if (TARGET_DEBUG_STACK
)
2827 debug_stack_info (info
);
2829 /* Write .extern for any function we will call to save and restore fp
2831 if (info
->first_fp_reg_save
< 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
2832 fprintf (file
, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
2833 SAVE_FP_PREFIX
, info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
,
2834 RESTORE_FP_PREFIX
, info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
2836 /* Write .extern for truncation routines, if needed. */
2837 if (rs6000_trunc_used
&& ! trunc_defined
)
2839 fprintf (file
, "\t.extern .%s\n\t.extern .%s\n",
2840 RS6000_ITRUNC
, RS6000_UITRUNC
);
2844 /* Write .extern for AIX common mode routines, if needed. */
2845 if (! TARGET_POWER
&& ! TARGET_POWERPC
&& ! common_mode_defined
)
2847 fputs ("\t.extern __mulh\n", file
);
2848 fputs ("\t.extern __mull\n", file
);
2849 fputs ("\t.extern __divss\n", file
);
2850 fputs ("\t.extern __divus\n", file
);
2851 fputs ("\t.extern __quoss\n", file
);
2852 fputs ("\t.extern __quous\n", file
);
2853 common_mode_defined
= 1;
2856 /* If we use the link register, get it into r0. */
2857 if (info
->lr_save_p
)
2858 asm_fprintf (file
, "\tmflr %s\n", reg_names
[0]);
2860 /* If we need to save CR, put it into r12. */
2861 if (info
->cr_save_p
)
2862 asm_fprintf (file
, "\tmfcr %s\n", reg_names
[12]);
2864 /* Do any required saving of fpr's. If only one or two to save, do it
2865 ourself. Otherwise, call function. Note that since they are statically
2866 linked, we do not need a nop following them. */
2867 if (FP_SAVE_INLINE (info
->first_fp_reg_save
))
2869 int regno
= info
->first_fp_reg_save
;
2870 int loc
= info
->fp_save_offset
;
2872 for ( ; regno
< 64; regno
++, loc
+= 8)
2873 asm_fprintf (file
, "\tstfd %s,%d(%s)\n", reg_names
[regno
], loc
, reg_names
[1]);
2875 else if (info
->first_fp_reg_save
!= 64)
2876 asm_fprintf (file
, "\tbl %s%d%s\n", SAVE_FP_PREFIX
,
2877 info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
);
2879 /* Now save gpr's. */
2880 if (! TARGET_MULTIPLE
|| info
->first_gp_reg_save
== 31 || TARGET_64BIT
)
2882 int regno
= info
->first_gp_reg_save
;
2883 int loc
= info
->gp_save_offset
;
2885 for ( ; regno
< 32; regno
++, loc
+= reg_size
)
2886 asm_fprintf (file
, store_reg
, reg_names
[regno
], loc
, reg_names
[1]);
2889 else if (info
->first_gp_reg_save
!= 32)
2890 asm_fprintf (file
, "\t{stm|stmw} %s,%d(%s)\n",
2891 reg_names
[info
->first_gp_reg_save
],
2892 info
->gp_save_offset
,
2895 /* Save main's arguments if we need to call a function */
2897 if (info
->main_save_p
)
2900 int loc
= info
->main_save_offset
;
2901 int size
= info
->main_size
;
2903 for (regno
= 3; size
> 0; regno
++, loc
-= reg_size
, size
-= reg_size
)
2904 asm_fprintf (file
, store_reg
, reg_names
[regno
], loc
, reg_names
[1]);
2908 /* Save lr if we used it. */
2909 if (info
->lr_save_p
)
2910 asm_fprintf (file
, store_reg
, reg_names
[0], info
->lr_save_offset
, reg_names
[1]);
2912 /* Save CR if we use any that must be preserved. */
2913 if (info
->cr_save_p
)
2914 asm_fprintf (file
, store_reg
, reg_names
[12], info
->cr_save_offset
, reg_names
[1]);
2916 if (info
->toc_save_p
)
2917 asm_fprintf (file
, store_reg
, reg_names
[2], info
->toc_save_offset
, reg_names
[1]);
2919 /* Update stack and set back pointer. */
2922 if (info
->total_size
< 32767)
2924 (TARGET_64BIT
) ? "\tstdu %s,%d(%s)\n" : "\t{stu|stwu} %s,%d(%s)\n",
2925 reg_names
[1], - info
->total_size
, reg_names
[1]);
2928 int neg_size
= - info
->total_size
;
2929 asm_fprintf (file
, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
2930 reg_names
[0], (neg_size
>> 16) & 0xffff,
2931 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
2933 (TARGET_64BIT
) ? "\tstdux %s,%s,%s\n" : "\t{stux|stwux} %s,%s,%s\n",
2934 reg_names
[1], reg_names
[1], reg_names
[0]);
2938 /* Set frame pointer, if needed. */
2939 if (frame_pointer_needed
)
2940 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[31], reg_names
[1]);
2943 /* If we need to call a function to set things up for main, do so now
2944 before dealing with the TOC. */
2949 switch (DEFAULT_ABI
)
2951 case ABI_AIX
: prefix
= "."; break;
2952 case ABI_NT
: prefix
= ".."; break;
2955 fprintf (file
, "\tbl %s%s\n", prefix
, NAME__MAIN
);
2956 #ifdef RS6000_CALL_GLUE2
2957 fprintf (file
, "\t%s%s%s\n", RS6000_CALL_GLUE2
, prefix
, NAME_MAIN
);
2959 #ifdef RS6000_CALL_GLUE
2960 if (DEFAULT_ABI
== ABI_AIX
|| DEFAULT_ABI
== ABI_NT
)
2961 fprintf (file
, "\t%s\n", RS6000_CALL_GLUE
);
2965 if (info
->main_save_p
)
2969 int size
= info
->main_size
;
2971 if (info
->total_size
< 32767)
2973 loc
= info
->total_size
+ info
->main_save_offset
;
2974 for (regno
= 3; size
> 0; regno
++, size
-= reg_size
, loc
-= reg_size
)
2975 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[1]);
2978 { /* for large frames, reg 0 above contains -frame size */
2979 loc
= info
->main_save_offset
;
2980 asm_fprintf (file
, "\t{sf|subf} %s,%s,%s\n", reg_names
[0], reg_names
[0],
2983 for (regno
= 3; size
> 0; regno
++, size
-= reg_size
, loc
-= reg_size
)
2984 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[0]);
2991 /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the
2992 TOC_TABLE address into register 30. */
2993 if (TARGET_TOC
&& TARGET_MINIMAL_TOC
&& get_pool_size () != 0)
2997 #ifdef TARGET_RELOCATABLE
2998 if (TARGET_RELOCATABLE
)
3000 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
3001 fprintf (file
, "\tbl ");
3002 assemble_name (file
, buf
);
3003 fprintf (file
, "\n");
3005 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCF", rs6000_pic_labelno
);
3006 fprintf (file
, "\tmflr %s\n", reg_names
[30]);
3008 asm_fprintf (file
, TARGET_64BIT
? "\tld" : "\t{l|lwz}");
3009 fprintf (file
, " %s,(", reg_names
[0]);
3010 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCL", rs6000_pic_labelno
);
3011 assemble_name (file
, buf
);
3012 fprintf (file
, "-");
3013 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
3014 assemble_name (file
, buf
);
3015 fprintf (file
, ")(%s)\n", reg_names
[30]);
3016 asm_fprintf (file
, "\t{cax|add} %s,%s,%s\n",
3017 reg_names
[30], reg_names
[0], reg_names
[30]);
3018 rs6000_pic_labelno
++;
3023 switch (DEFAULT_ABI
)
3026 case ABI_AIX_NODESC
:
3029 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 1);
3030 asm_fprintf (file
, "\t{cau|addis} %s,%s,", reg_names
[30], reg_names
[0]);
3031 assemble_name (file
, buf
);
3032 asm_fprintf (file
, "@ha\n");
3033 if (TARGET_NEW_MNEMONICS
)
3035 asm_fprintf (file
, "\taddi %s,%s,", reg_names
[30], reg_names
[30]);
3036 assemble_name (file
, buf
);
3037 asm_fprintf (file
, "@l\n");
3041 asm_fprintf (file
, "\tcal %s,", reg_names
[30]);
3042 assemble_name (file
, buf
);
3043 asm_fprintf (file
, "@l(%s)\n", reg_names
[30]);
3053 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 0);
3054 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[30]);
3055 assemble_name (file
, buf
);
3056 asm_fprintf (file
, "(%s)\n", reg_names
[2]);
3061 if (DEFAULT_ABI
== ABI_NT
)
3063 assemble_name (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
3064 fputs (".b:\n", file
);
3068 /* Write function epilogue. */
3071 output_epilog (file
, size
)
3075 rs6000_stack_t
*info
= rs6000_stack_info ();
3076 char *load_reg
= (TARGET_64BIT
) ? "\tld %s,%d(%s)" : "\t{l|lwz} %s,%d(%s)\n";
3077 rtx insn
= get_last_insn ();
3080 /* Forget about any temporaries created */
3081 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
3082 stack_temps
[i
] = NULL_RTX
;
3084 /* If the last insn was a BARRIER, we don't have to write anything except
3086 if (GET_CODE (insn
) == NOTE
)
3087 insn
= prev_nonnote_insn (insn
);
3088 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
3090 /* If we have a frame pointer, a call to alloca, or a large stack
3091 frame, restore the old stack pointer using the backchain. Otherwise,
3092 we know what size to update it with. */
3093 if (frame_pointer_needed
|| current_function_calls_alloca
3094 || info
->total_size
> 32767)
3095 asm_fprintf (file
, load_reg
, reg_names
[1], 0, reg_names
[1]);
3096 else if (info
->push_p
)
3098 if (TARGET_NEW_MNEMONICS
)
3099 asm_fprintf (file
, "\taddi %s,%s,%d\n", reg_names
[1], reg_names
[1], info
->total_size
);
3101 asm_fprintf (file
, "\tcal %s,%d(%s)\n", reg_names
[1], info
->total_size
, reg_names
[1]);
3104 /* Get the old lr if we saved it. */
3105 if (info
->lr_save_p
)
3106 asm_fprintf (file
, load_reg
, reg_names
[0], info
->lr_save_offset
, reg_names
[1]);
3108 /* Get the old cr if we saved it. */
3109 if (info
->cr_save_p
)
3110 asm_fprintf (file
, load_reg
, reg_names
[12], info
->cr_save_offset
, reg_names
[1]);
3112 /* Set LR here to try to overlap restores below. */
3113 if (info
->lr_save_p
)
3114 asm_fprintf (file
, "\tmtlr %s\n", reg_names
[0]);
3116 /* Restore gpr's. */
3117 if (! TARGET_MULTIPLE
|| info
->first_gp_reg_save
== 31 || TARGET_64BIT
)
3119 int regno
= info
->first_gp_reg_save
;
3120 int loc
= info
->gp_save_offset
;
3121 int reg_size
= (TARGET_64BIT
) ? 8 : 4;
3123 for ( ; regno
< 32; regno
++, loc
+= reg_size
)
3124 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[1]);
3127 else if (info
->first_gp_reg_save
!= 32)
3128 asm_fprintf (file
, "\t{lm|lmw} %s,%d(%s)\n",
3129 reg_names
[info
->first_gp_reg_save
],
3130 info
->gp_save_offset
,
3133 /* Restore fpr's if we can do it without calling a function. */
3134 if (FP_SAVE_INLINE (info
->first_fp_reg_save
))
3136 int regno
= info
->first_fp_reg_save
;
3137 int loc
= info
->fp_save_offset
;
3139 for ( ; regno
< 64; regno
++, loc
+= 8)
3140 asm_fprintf (file
, "\tlfd %s,%d(%s)\n", reg_names
[regno
], loc
, reg_names
[1]);
3143 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4
3145 if (info
->cr_save_p
)
3146 asm_fprintf (file
, "\tmtcrf %d,%s\n",
3147 (regs_ever_live
[70] != 0) * 0x20
3148 + (regs_ever_live
[71] != 0) * 0x10
3149 + (regs_ever_live
[72] != 0) * 0x8, reg_names
[12]);
3151 /* If we have to restore more than two FP registers, branch to the
3152 restore function. It will return to our caller. */
3153 if (info
->first_fp_reg_save
!= 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
3154 asm_fprintf (file
, "\tb %s%d%s\n", RESTORE_FP_PREFIX
,
3155 info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
3157 asm_fprintf (file
, "\t{br|blr}\n");
3160 /* Output a traceback table here. See /usr/include/sys/debug.h for info
3163 We don't output a traceback table if -finhibit-size-directive was
3164 used. The documentation for -finhibit-size-directive reads
3165 ``don't output a @code{.size} assembler directive, or anything
3166 else that would cause trouble if the function is split in the
3167 middle, and the two halves are placed at locations far apart in
3168 memory.'' The traceback table has this property, since it
3169 includes the offset from the start of the function to the
3170 traceback table itself.
3172 System V.4 Powerpc's (and the embedded ABI derived from it) use a
3173 different traceback table. */
3174 if (DEFAULT_ABI
== ABI_AIX
&& ! flag_inhibit_size_directive
)
3176 char *fname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
3177 int fixed_parms
, float_parms
, parm_info
;
3180 while (*fname
== '.') /* V.4 encodes . in the name */
3183 /* Need label immediately before tbtab, so we can compute its offset
3184 from the function start. */
3187 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
3188 ASM_OUTPUT_LABEL (file
, fname
);
3190 /* The .tbtab pseudo-op can only be used for the first eight
3191 expressions, since it can't handle the possibly variable
3192 length fields that follow. However, if you omit the optional
3193 fields, the assembler outputs zeros for all optional fields
3194 anyways, giving each variable length field is minimum length
3195 (as defined in sys/debug.h). Thus we can not use the .tbtab
3196 pseudo-op at all. */
3198 /* An all-zero word flags the start of the tbtab, for debuggers
3199 that have to find it by searching forward from the entry
3200 point or from the current pc. */
3201 fprintf (file
, "\t.long 0\n");
3203 /* Tbtab format type. Use format type 0. */
3204 fprintf (file
, "\t.byte 0,");
3206 /* Language type. Unfortunately, there doesn't seem to be any
3207 official way to get this info, so we use language_string. C
3208 is 0. C++ is 9. No number defined for Obj-C, so use the
3209 value for C for now. */
3210 if (! strcmp (language_string
, "GNU C")
3211 || ! strcmp (language_string
, "GNU Obj-C"))
3213 else if (! strcmp (language_string
, "GNU F77"))
3215 else if (! strcmp (language_string
, "GNU Ada"))
3217 else if (! strcmp (language_string
, "GNU PASCAL"))
3219 else if (! strcmp (language_string
, "GNU C++"))
3223 fprintf (file
, "%d,", i
);
3225 /* 8 single bit fields: global linkage (not set for C extern linkage,
3226 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
3227 from start of procedure stored in tbtab, internal function, function
3228 has controlled storage, function has no toc, function uses fp,
3229 function logs/aborts fp operations. */
3230 /* Assume that fp operations are used if any fp reg must be saved. */
3231 fprintf (file
, "%d,", (1 << 5) | ((info
->first_fp_reg_save
!= 64) << 1));
3233 /* 6 bitfields: function is interrupt handler, name present in
3234 proc table, function calls alloca, on condition directives
3235 (controls stack walks, 3 bits), saves condition reg, saves
3237 /* The `function calls alloca' bit seems to be set whenever reg 31 is
3238 set up as a frame pointer, even when there is no alloca call. */
3239 fprintf (file
, "%d,",
3240 ((1 << 6) | (frame_pointer_needed
<< 5)
3241 | (info
->cr_save_p
<< 1) | (info
->lr_save_p
)));
3243 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
3245 fprintf (file
, "%d,",
3246 (info
->push_p
<< 7) | (64 - info
->first_fp_reg_save
));
3248 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
3249 fprintf (file
, "%d,", (32 - first_reg_to_save ()));
3252 /* Compute the parameter info from the function decl argument
3255 int next_parm_info_bit
;
3257 next_parm_info_bit
= 31;
3262 for (decl
= DECL_ARGUMENTS (current_function_decl
);
3263 decl
; decl
= TREE_CHAIN (decl
))
3265 rtx parameter
= DECL_INCOMING_RTL (decl
);
3266 enum machine_mode mode
= GET_MODE (parameter
);
3268 if (GET_CODE (parameter
) == REG
)
3270 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3278 else if (mode
== DFmode
)
3283 /* If only one bit will fit, don't or in this entry. */
3284 if (next_parm_info_bit
> 0)
3285 parm_info
|= (bits
<< (next_parm_info_bit
- 1));
3286 next_parm_info_bit
-= 2;
3290 fixed_parms
+= ((GET_MODE_SIZE (mode
)
3291 + (UNITS_PER_WORD
- 1))
3293 next_parm_info_bit
-= 1;
3299 /* Number of fixed point parameters. */
3300 /* This is actually the number of words of fixed point parameters; thus
3301 an 8 byte struct counts as 2; and thus the maximum value is 8. */
3302 fprintf (file
, "%d,", fixed_parms
);
3304 /* 2 bitfields: number of floating point parameters (7 bits), parameters
3306 /* This is actually the number of fp registers that hold parameters;
3307 and thus the maximum value is 13. */
3308 /* Set parameters on stack bit if parameters are not in their original
3309 registers, regardless of whether they are on the stack? Xlc
3310 seems to set the bit when not optimizing. */
3311 fprintf (file
, "%d\n", ((float_parms
<< 1) | (! optimize
)));
3313 /* Optional fields follow. Some are variable length. */
3315 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
3317 /* There is an entry for each parameter in a register, in the order that
3318 they occur in the parameter list. Any intervening arguments on the
3319 stack are ignored. If the list overflows a long (max possible length
3320 34 bits) then completely leave off all elements that don't fit. */
3321 /* Only emit this long if there was at least one parameter. */
3322 if (fixed_parms
|| float_parms
)
3323 fprintf (file
, "\t.long %d\n", parm_info
);
3325 /* Offset from start of code to tb table. */
3326 fprintf (file
, "\t.long ");
3327 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
3328 RS6000_OUTPUT_BASENAME (file
, fname
);
3329 fprintf (file
, "-.");
3330 RS6000_OUTPUT_BASENAME (file
, fname
);
3331 fprintf (file
, "\n");
3333 /* Interrupt handler mask. */
3334 /* Omit this long, since we never set the interrupt handler bit
3337 /* Number of CTL (controlled storage) anchors. */
3338 /* Omit this long, since the has_ctl bit is never set above. */
3340 /* Displacement into stack of each CTL anchor. */
3341 /* Omit this list of longs, because there are no CTL anchors. */
3343 /* Length of function name. */
3344 fprintf (file
, "\t.short %d\n", strlen (fname
));
3346 /* Function name. */
3347 assemble_string (fname
, strlen (fname
));
3349 /* Register for alloca automatic storage; this is always reg 31.
3350 Only emit this if the alloca bit was set above. */
3351 if (frame_pointer_needed
)
3352 fprintf (file
, "\t.byte 31\n");
3355 /* Reset varargs and save TOC indicator */
3356 rs6000_sysv_varargs_p
= 0;
3357 rs6000_save_toc_p
= 0;
3359 if (DEFAULT_ABI
== ABI_NT
)
3361 RS6000_OUTPUT_BASENAME (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
3362 fputs (".e:\nFE_MOT_RESVD..", file
);
3363 RS6000_OUTPUT_BASENAME (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
3364 fputs (":\n", file
);
3368 /* Output a TOC entry. We derive the entry name from what is
3372 output_toc (file
, x
, labelno
)
3386 /* if we're going to put a double constant in the TOC, make sure it's
3387 aligned properly when strict alignment is on. */
3388 if (GET_CODE (x
) == CONST_DOUBLE
3390 && GET_MODE (x
) == DFmode
3391 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
)) {
3392 ASM_OUTPUT_ALIGN (file
, 3);
3396 if (TARGET_ELF
&& TARGET_MINIMAL_TOC
)
3398 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LC");
3399 fprintf (file
, "%d = .-", labelno
);
3400 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LCTOC");
3401 fprintf (file
, "1\n");
3404 ASM_OUTPUT_INTERNAL_LABEL (file
, "LC", labelno
);
3406 /* Handle FP constants specially. Note that if we have a minimal
3407 TOC, things we put here aren't actually in the TOC, so we can allow
3409 if (GET_CODE (x
) == CONST_DOUBLE
3410 && GET_MODE (x
) == DFmode
3411 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
3416 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
3417 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3418 if (TARGET_MINIMAL_TOC
)
3419 fprintf (file
, "\t.long %ld\n\t.long %ld\n", l
[0], l
[1]);
3421 fprintf (file
, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n",
3422 l
[0], l
[1], l
[0], l
[1]);
3425 else if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == SFmode
3426 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
3428 rtx val
= operand_subword (x
, 0, 0, SFmode
);
3430 if (val
== 0 || GET_CODE (val
) != CONST_INT
)
3433 if (TARGET_MINIMAL_TOC
)
3434 fprintf (file
, "\t.long %d\n", INTVAL (val
));
3436 fprintf (file
, "\t.tc FS_%x[TC],%d\n", INTVAL (val
), INTVAL (val
));
3440 if (GET_CODE (x
) == CONST
)
3442 base
= XEXP (XEXP (x
, 0), 0);
3443 offset
= INTVAL (XEXP (XEXP (x
, 0), 1));
3446 if (GET_CODE (base
) == SYMBOL_REF
)
3447 name
= XSTR (base
, 0);
3448 else if (GET_CODE (base
) == LABEL_REF
)
3449 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (XEXP (base
, 0)));
3450 else if (GET_CODE (base
) == CODE_LABEL
)
3451 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (base
));
3455 if (TARGET_MINIMAL_TOC
)
3456 fprintf (file
, "\t.long ");
3459 STRIP_NAME_ENCODING (real_name
, name
);
3460 fprintf (file
, "\t.tc %s", real_name
);
3463 fprintf (file
, ".N%d", - offset
);
3465 fprintf (file
, ".P%d", offset
);
3467 fprintf (file
, "[TC],");
3469 output_addr_const (file
, x
);
3470 fprintf (file
, "\n");
3473 /* Output an assembler pseudo-op to write an ASCII string of N characters
3474 starting at P to FILE.
3476 On the RS/6000, we have to do this using the .byte operation and
3477 write out special characters outside the quoted string.
3478 Also, the assembler is broken; very long strings are truncated,
3479 so we must artificially break them up early. */
3482 output_ascii (file
, p
, n
)
3488 int i
, count_string
;
3489 char *for_string
= "\t.byte \"";
3490 char *for_decimal
= "\t.byte ";
3491 char *to_close
= NULL
;
3494 for (i
= 0; i
< n
; i
++)
3497 if (c
>= ' ' && c
< 0177)
3500 fputs (for_string
, file
);
3503 /* Write two quotes to get one. */
3511 for_decimal
= "\"\n\t.byte ";
3515 if (count_string
>= 512)
3517 fputs (to_close
, file
);
3519 for_string
= "\t.byte \"";
3520 for_decimal
= "\t.byte ";
3528 fputs (for_decimal
, file
);
3529 fprintf (file
, "%d", c
);
3531 for_string
= "\n\t.byte \"";
3538 /* Now close the string if we have written one. Then end the line. */
3540 fprintf (file
, to_close
);
3543 /* Generate a unique section name for FILENAME for a section type
3544 represented by SECTION_DESC. Output goes into BUF.
3546 SECTION_DESC can be any string, as long as it is different for each
3547 possible section type.
3549 We name the section in the same manner as xlc. The name begins with an
3550 underscore followed by the filename (after stripping any leading directory
3551 names) with the last period replaced by the string SECTION_DESC. If
3552 FILENAME does not contain a period, SECTION_DESC is appended to the end of
3556 rs6000_gen_section_name (buf
, filename
, section_desc
)
3561 char *q
, *after_last_slash
, *last_period
;
3565 after_last_slash
= filename
;
3566 for (q
= filename
; *q
; q
++)
3569 after_last_slash
= q
+ 1;
3574 len
= strlen (after_last_slash
) + strlen (section_desc
) + 2;
3575 *buf
= (char *) permalloc (len
);
3580 for (q
= after_last_slash
; *q
; q
++)
3582 if (q
== last_period
)
3584 strcpy (p
, section_desc
);
3585 p
+= strlen (section_desc
);
3588 else if (isalnum (*q
))
3592 if (last_period
== 0)
3593 strcpy (p
, section_desc
);
3598 /* Write function profiler code. */
3601 output_function_profiler (file
, labelno
)
3605 /* The last used parameter register. */
3610 if (DEFAULT_ABI
!= ABI_AIX
)
3613 /* Set up a TOC entry for the profiler label. */
3615 ASM_OUTPUT_INTERNAL_LABEL (file
, "LPC", labelno
);
3616 ASM_GENERATE_INTERNAL_LABEL (buf
, "LP", labelno
);
3617 if (TARGET_MINIMAL_TOC
)
3619 fprintf (file
, "\t.long ");
3620 assemble_name (file
, buf
);
3621 fprintf (file
, "\n");
3625 fprintf (file
, "\t.tc\t");
3626 assemble_name (file
, buf
);
3627 fprintf (file
, "[TC],");
3628 assemble_name (file
, buf
);
3629 fprintf (file
, "\n");
3633 /* Figure out last used parameter register. The proper thing to do is
3634 to walk incoming args of the function. A function might have live
3635 parameter registers even if it has no incoming args. */
3637 for (last_parm_reg
= 10;
3638 last_parm_reg
> 2 && ! regs_ever_live
[last_parm_reg
];
3642 /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since
3643 it might be set up as the frame pointer. */
3645 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
3646 fprintf (file
, "\tai %d,%d,0\n", j
, i
);
3648 /* Load location address into r3, and call mcount. */
3650 ASM_GENERATE_INTERNAL_LABEL (buf
, "LPC", labelno
);
3651 fprintf (file
, "\tl 3,");
3652 assemble_name (file
, buf
);
3653 fprintf (file
, "(2)\n\tbl .mcount\n");
3655 /* Restore parameter registers. */
3657 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
3658 fprintf (file
, "\tai %d,%d,0\n", i
, j
);
3661 /* Adjust the cost of a scheduling dependency. Return the new cost of
3662 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
3665 rs6000_adjust_cost (insn
, link
, dep_insn
, cost
)
3671 if (! recog_memoized (insn
))
3674 if (REG_NOTE_KIND (link
) != 0)
3677 if (REG_NOTE_KIND (link
) == 0)
3679 /* Data dependency; DEP_INSN writes a register that INSN reads some
3682 /* Tell the first scheduling pass about the latency between a mtctr
3683 and bctr (and mtlr and br/blr). The first scheduling pass will not
3684 know about this latency since the mtctr instruction, which has the
3685 latency associated to it, will be generated by reload. */
3686 if (get_attr_type (insn
) == TYPE_JMPREG
)
3687 return TARGET_POWER
? 5 : 4;
3689 /* Fall out to return default cost. */
3695 /* Return how many instructions the machine can issue per cycle */
3696 int get_issue_rate()
3698 switch (rs6000_cpu_attr
) {
3719 /* Output insns to flush the {data|instruction} caches after building a
3723 rs6000_sync_trampoline (addr
)
3726 enum machine_mode pmode
= Pmode
;
3727 rtx reg
= gen_reg_rtx (pmode
);
3730 int size
= rs6000_trampoline_size ();
3731 rtx (*sub_fcn
) PROTO ((rtx
, rtx
, rtx
));
3732 rtx (*cmp_fcn
) PROTO ((rtx
, rtx
));
3737 abort (); /* no cmpdi function yet */
3741 sub_fcn
= gen_subsi3
;
3742 cmp_fcn
= gen_cmpsi
;
3745 addr
= force_reg (pmode
, addr
);
3746 mem2
= gen_rtx (MEM
, pmode
, gen_rtx (PLUS
, pmode
, addr
, reg
));
3747 mem1
= gen_rtx (MEM
, pmode
, addr
);
3749 /* Issue a loop of dcbst's to flush the data cache */
3750 emit_move_insn (reg
, GEN_INT (size
-4));
3751 label
= gen_label_rtx ();
3753 emit_insn (gen_dcbst (mem2
, addr
, reg
));
3754 emit_insn ((*sub_fcn
) (reg
, reg
, GEN_INT (4)));
3755 emit_insn ((*cmp_fcn
) (reg
, const0_rtx
));
3756 emit_jump_insn (gen_bgt (label
));
3758 /* Issue a sync after the dcbst's to let things settle down */
3759 emit_insn (gen_sync (mem1
));
3761 /* Issue a loop of icbi's to flush the instruction cache */
3762 emit_move_insn (reg
, GEN_INT (size
-4));
3763 label
= gen_label_rtx ();
3765 emit_insn (gen_icbi (mem2
, addr
, reg
));
3766 emit_insn ((*sub_fcn
) (reg
, reg
, GEN_INT (4)));
3767 emit_insn ((*cmp_fcn
) (reg
, const0_rtx
));
3768 emit_jump_insn (gen_bgt (label
));
3770 /* Issue a sync after the icbi's to let things settle down */
3771 emit_insn (gen_sync (mem1
));
3773 /* Finally issue an isync to synchronize the icache */
3774 emit_insn (gen_isync (mem1
));
3778 /* Output assembler code for a block containing the constant parts
3779 of a trampoline, leaving space for the variable parts.
3781 The trampoline should set the static chain pointer to value placed
3782 into the trampoline and should branch to the specified routine. */
3785 rs6000_trampoline_template (file
)
3788 char *sc
= reg_names
[STATIC_CHAIN_REGNUM
];
3789 char *r0
= reg_names
[0];
3791 switch (DEFAULT_ABI
)
3796 /* Under AIX, this is not code at all, but merely a data area,
3797 since that is the way all functions are called. The first word is
3798 the address of the function, the second word is the TOC pointer (r2),
3799 and the third word is the static chain value. */
3801 fprintf (file
, "\t.long %s\n", (TARGET_64BIT
) ? "0,0,0,0,0,0" : "0,0,0");
3805 /* V.4/eabi function pointers are just a single pointer, so we need to
3806 do the full gory code to load up the static chain. */
3808 case ABI_AIX_NODESC
:
3809 if (STATIC_CHAIN_REGNUM
== 0 || !TARGET_NEW_MNEMONICS
)
3814 fprintf (file
, "\tmflr %s\n", r0
); /* offset 0 */
3815 fprintf (file
, "\tbl .LTRAMP1\n"); /* offset 4 */
3816 fprintf (file
, "\t.long 0,0,0,0\n"); /* offset 8 */
3817 fprintf (file
, ".LTRAMP1:\n");
3818 fprintf (file
, "\tmflr %s\n", sc
); /* offset 28 */
3819 fprintf (file
, "\tmtlr %s\n", r0
); /* offset 32 */
3820 fprintf (file
, "\tld %s,0(%s)\n", r0
, sc
); /* offset 36 */
3821 fprintf (file
, "\tld %s,8(%s)\n", sc
, sc
); /* offset 40 */
3822 fprintf (file
, "\tmtctr %s\n", r0
); /* offset 44 */
3823 fprintf (file
, "\tbctr\n"); /* offset 48 */
3827 fprintf (file
, "\tmflr %s\n", r0
); /* offset 0 */
3828 fprintf (file
, "\tbl .LTRAMP1\n"); /* offset 4 */
3829 fprintf (file
, "\t.long 0,0\n"); /* offset 8 */
3830 fprintf (file
, ".LTRAMP1:\n");
3831 fprintf (file
, "\tmflr %s\n", sc
); /* offset 20 */
3832 fprintf (file
, "\tmtlr %s\n", r0
); /* offset 24 */
3833 fprintf (file
, "\tlwz %s,0(%s)\n", r0
, sc
); /* offset 28 */
3834 fprintf (file
, "\tlwz %s,4(%s)\n", sc
, sc
); /* offset 32 */
3835 fprintf (file
, "\tmtctr %s\n", r0
); /* offset 36 */
3836 fprintf (file
, "\tbctr\n"); /* offset 40 */
3840 /* NT function pointers point to a two word area (real address, TOC)
3841 which unfortunately does not include a static chain field. So we
3842 need to have a 2 word area followed by the code to load up the
3845 if (STATIC_CHAIN_REGNUM
== 0 || !TARGET_NEW_MNEMONICS
|| TARGET_64BIT
)
3848 fprintf (file
, "\t.ualong 0,0\n"); /* offset 0 */
3849 fprintf (file
, "\tmflr %s\n", r0
); /* offset 8 */
3850 fprintf (file
, "\tbl .LTRAMP1\n"); /* offset 12 */
3851 fprintf (file
, "\t.ualong 0,0\n"); /* offset 16 */
3852 fprintf (file
, ".LTRAMP1:\n");
3853 fprintf (file
, "\tmflr %s\n", sc
); /* offset 28 */
3854 fprintf (file
, "\tmtlr %s\n", r0
); /* offset 32 */
3855 fprintf (file
, "\tlwz %s,0(%s)\n", r0
, sc
); /* offset 36 */
3856 fprintf (file
, "\tlwz %s,4(%s)\n", sc
, sc
); /* offset 40 */
3857 fprintf (file
, "\tmtctr %s\n", r0
); /* offset 44 */
3858 fprintf (file
, "\tbctr\n"); /* offset 48 */
3865 /* Length in units of the trampoline for entering a nested function. */
3868 rs6000_trampoline_size ()
3872 switch (DEFAULT_ABI
)
3878 ret
= (TARGET_64BIT
) ? 24 : 12;
3882 case ABI_AIX_NODESC
:
3883 ret
= (TARGET_64BIT
? 48 : 40);
3894 /* Emit RTL insns to initialize the variable parts of a trampoline.
3895 FNADDR is an RTX for the address of the function's pure code.
3896 CXT is an RTX for the static chain value for the function. */
3899 rs6000_initialize_trampoline (addr
, fnaddr
, cxt
)
3904 rtx reg
, reg2
, reg3
;
3906 switch (DEFAULT_ABI
)
3911 /* Under AIX, just build the 3 word function descriptor */
3913 emit_move_insn (gen_rtx (MEM
, SImode
,
3914 memory_address (SImode
, (addr
))),
3915 gen_rtx (MEM
, SImode
,
3916 memory_address (SImode
, (fnaddr
))));
3917 emit_move_insn (gen_rtx (MEM
, SImode
,
3918 memory_address (SImode
,
3919 plus_constant ((addr
), 4))),
3920 gen_rtx (MEM
, SImode
,
3921 memory_address (SImode
,
3922 plus_constant ((fnaddr
), 4))));
3923 emit_move_insn (gen_rtx (MEM
, SImode
,
3924 memory_address (SImode
,
3925 plus_constant ((addr
), 8))),
3926 force_reg (SImode
, (cxt
)));
3929 /* Under V.4/eabi, update the two words after the bl to have the real
3930 function address and the static chain. */
3932 case ABI_AIX_NODESC
:
3933 reg
= gen_reg_rtx (Pmode
);
3935 emit_move_insn (reg
, fnaddr
);
3936 emit_move_insn (gen_rtx (MEM
, Pmode
, plus_constant (addr
, 8)), reg
);
3937 emit_move_insn (gen_rtx (MEM
, Pmode
,
3938 plus_constant (addr
, (TARGET_64BIT
? 16 : 12))),
3941 rs6000_sync_trampoline (addr
);
3944 /* Under NT, update the first 2 words to look like a normal descriptor, and
3945 then fill in the fields with the function address and static chain after
3946 the bl instruction. */
3948 reg
= gen_reg_rtx (Pmode
);
3949 reg2
= gen_reg_rtx (Pmode
);
3950 reg3
= gen_reg_rtx (Pmode
);
3952 emit_move_insn (gen_rtx (MEM
, Pmode
, plus_constant (addr
, 4)),
3953 gen_rtx (REG
, Pmode
, 2));
3954 emit_move_insn (reg
, fnaddr
);
3955 emit_move_insn (reg2
, gen_rtx (MEM
, Pmode
, reg
));
3956 emit_move_insn (reg3
, plus_constant (addr
, 8));
3957 emit_move_insn (gen_rtx (MEM
, Pmode
, plus_constant (addr
, 16)), reg
);
3958 emit_move_insn (gen_rtx (MEM
, Pmode
, addr
), reg3
);
3959 emit_move_insn (gen_rtx (MEM
, Pmode
, plus_constant (addr
, 20)), cxt
);
3960 rs6000_sync_trampoline (addr
);