1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 1993 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
25 #include "hard-reg-set.h"
27 #include "insn-config.h"
28 #include "conditions.h"
29 #include "insn-flags.h"
31 #include "insn-attr.h"
38 extern char *language_string
;
40 #define min(A,B) ((A) < (B) ? (A) : (B))
41 #define max(A,B) ((A) > (B) ? (A) : (B))
43 /* Set to non-zero by "fix" operation to indicate that itrunc and
44 uitrunc must be defined. */
46 int rs6000_trunc_used
;
48 /* Set to non-zero once they have been defined. */
50 static int trunc_defined
;
52 /* Save information from a "cmpxx" operation until the branch or scc is
55 rtx rs6000_compare_op0
, rs6000_compare_op1
;
56 int rs6000_compare_fp_p
;
58 /* Return non-zero if this function is known to have a null epilogue. */
63 return (reload_completed
64 && first_reg_to_save () == 32
65 && first_fp_reg_to_save () == 64
66 && ! regs_ever_live
[65]
67 && ! rs6000_pushes_stack ());
70 /* Returns 1 always. */
73 any_operand (op
, mode
)
75 enum machine_mode mode
;
80 /* Return 1 if OP is a constant that can fit in a D field. */
83 short_cint_operand (op
, mode
)
85 enum machine_mode mode
;
87 return (GET_CODE (op
) == CONST_INT
88 && (unsigned) (INTVAL (op
) + 0x8000) < 0x10000);
91 /* Similar for a unsigned D field. */
94 u_short_cint_operand (op
, mode
)
96 enum machine_mode mode
;
98 return (GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff0000) == 0);
101 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
104 non_short_cint_operand (op
, mode
)
106 enum machine_mode mode
;
108 return (GET_CODE (op
) == CONST_INT
109 && (unsigned) (INTVAL (op
) + 0x8000) >= 0x10000);
112 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
116 gpc_reg_operand (op
, mode
)
118 enum machine_mode mode
;
120 return (register_operand (op
, mode
)
121 && (GET_CODE (op
) != REG
|| REGNO (op
) >= 67 || REGNO (op
) < 64));
124 /* Returns 1 if OP is either a pseudo-register or a register denoting a
128 cc_reg_operand (op
, mode
)
130 enum machine_mode mode
;
132 return (register_operand (op
, mode
)
133 && (GET_CODE (op
) != REG
134 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
135 || CR_REGNO_P (REGNO (op
))));
138 /* Returns 1 if OP is either a constant integer valid for a D-field or a
139 non-special register. If a register, it must be in the proper mode unless
143 reg_or_short_operand (op
, mode
)
145 enum machine_mode mode
;
147 if (GET_CODE (op
) == CONST_INT
)
148 return short_cint_operand (op
, mode
);
150 return gpc_reg_operand (op
, mode
);
153 /* Similar, except check if the negation of the constant would be valid for
157 reg_or_neg_short_operand (op
, mode
)
159 enum machine_mode mode
;
161 if (GET_CODE (op
) == CONST_INT
)
162 return CONST_OK_FOR_LETTER_P (INTVAL (op
), 'P');
164 return gpc_reg_operand (op
, mode
);
167 /* Return 1 if the operand is either a register or an integer whose high-order
171 reg_or_u_short_operand (op
, mode
)
173 enum machine_mode mode
;
175 if (GET_CODE (op
) == CONST_INT
176 && (INTVAL (op
) & 0xffff0000) == 0)
179 return gpc_reg_operand (op
, mode
);
182 /* Return 1 is the operand is either a non-special register or ANY
186 reg_or_cint_operand (op
, mode
)
188 enum machine_mode mode
;
190 return GET_CODE (op
) == CONST_INT
|| gpc_reg_operand (op
, mode
);
193 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a
194 register with one instruction per word. For SFmode, this means that
195 the low 16-bits are zero. For DFmode, it means the low 16-bits of
196 the first word are zero and the high 16 bits of the second word
197 are zero (usually all bits in the low-order word will be zero).
199 We only do this if we can safely read CONST_DOUBLE_{LOW,HIGH}. */
202 easy_fp_constant (op
, mode
)
204 register enum machine_mode mode
;
208 if (GET_CODE (op
) != CONST_DOUBLE
209 || GET_MODE (op
) != mode
210 || GET_MODE_CLASS (mode
) != MODE_FLOAT
)
213 high
= operand_subword (op
, 0, 0, mode
);
214 low
= operand_subword (op
, 1, 0, mode
);
216 if (high
== 0 || GET_CODE (high
) != CONST_INT
|| (INTVAL (high
) & 0xffff))
219 return (mode
== SFmode
220 || (low
!= 0 && GET_CODE (low
) == CONST_INT
221 && (INTVAL (low
) & 0xffff0000) == 0));
224 /* Return 1 if the operand is either a floating-point register, a pseudo
225 register, or memory. */
228 fp_reg_or_mem_operand (op
, mode
)
230 enum machine_mode mode
;
232 return (memory_operand (op
, mode
)
233 || (register_operand (op
, mode
)
234 && (GET_CODE (op
) != REG
235 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
236 || FP_REGNO_P (REGNO (op
)))));
239 /* Return 1 if the operand is either an easy FP constant (see above) or
243 mem_or_easy_const_operand (op
, mode
)
245 enum machine_mode mode
;
247 return memory_operand (op
, mode
) || easy_fp_constant (op
, mode
);
250 /* Return 1 if the operand is either a non-special register or an item
251 that can be used as the operand of an SI add insn. */
254 add_operand (op
, mode
)
256 enum machine_mode mode
;
258 return (reg_or_short_operand (op
, mode
)
259 || (GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff) == 0));
262 /* Return 1 if OP is a constant but not a valid add_operand. */
265 non_add_cint_operand (op
, mode
)
267 enum machine_mode mode
;
269 return (GET_CODE (op
) == CONST_INT
270 && (unsigned) (INTVAL (op
) + 0x8000) >= 0x10000
271 && (INTVAL (op
) & 0xffff) != 0);
274 /* Return 1 if the operand is a non-special register or a constant that
275 can be used as the operand of an OR or XOR insn on the RS/6000. */
278 logical_operand (op
, mode
)
280 enum machine_mode mode
;
282 return (gpc_reg_operand (op
, mode
)
283 || (GET_CODE (op
) == CONST_INT
284 && ((INTVAL (op
) & 0xffff0000) == 0
285 || (INTVAL (op
) & 0xffff) == 0)));
288 /* Return 1 if C is a constant that is not a logical operand (as
292 non_logical_cint_operand (op
, mode
)
294 enum machine_mode mode
;
296 return (GET_CODE (op
) == CONST_INT
297 && (INTVAL (op
) & 0xffff0000) != 0
298 && (INTVAL (op
) & 0xffff) != 0);
301 /* Return 1 if C is a constant that can be encoded in a mask on the
302 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
303 Reject all ones and all zeros, since these should have been optimized
304 away and confuse the making of MB and ME. */
314 if (c
== 0 || c
== ~0)
317 last_bit_value
= c
& 1;
319 for (i
= 1; i
< 32; i
++)
320 if (((c
>>= 1) & 1) != last_bit_value
)
321 last_bit_value
^= 1, transitions
++;
323 return transitions
<= 2;
326 /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
329 mask_operand (op
, mode
)
331 enum machine_mode mode
;
333 return GET_CODE (op
) == CONST_INT
&& mask_constant (INTVAL (op
));
336 /* Return 1 if the operand is either a non-special register or a
337 constant that can be used as the operand of an RS/6000 logical AND insn. */
340 and_operand (op
, mode
)
342 enum machine_mode mode
;
344 return (reg_or_short_operand (op
, mode
)
345 || logical_operand (op
, mode
)
346 || mask_operand (op
, mode
));
349 /* Return 1 if the operand is a constant but not a valid operand for an AND
353 non_and_cint_operand (op
, mode
)
355 enum machine_mode mode
;
357 return GET_CODE (op
) == CONST_INT
&& ! and_operand (op
, mode
);
360 /* Return 1 if the operand is a general register or memory operand. */
363 reg_or_mem_operand (op
, mode
)
365 register enum machine_mode mode
;
367 return gpc_reg_operand (op
, mode
) || memory_operand (op
, mode
);
370 /* Return 1 if the operand, used inside a MEM, is a valid first argument
371 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
375 call_operand (op
, mode
)
377 enum machine_mode mode
;
379 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
382 return (GET_CODE (op
) == SYMBOL_REF
383 || (GET_CODE (op
) == REG
&& REGNO (op
) >= FIRST_PSEUDO_REGISTER
));
386 /* Return 1 if this operand is a valid input for a move insn. */
389 input_operand (op
, mode
)
391 enum machine_mode mode
;
393 if (memory_operand (op
, mode
))
396 /* For floating-point or multi-word mode, only register or memory
398 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
399 || GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
400 return gpc_reg_operand (op
, mode
);
402 /* The only cases left are integral modes one word or smaller (we
403 do not get called for MODE_CC values). These can be in any
405 if (register_operand (op
, mode
))
408 /* For HImode and QImode, any constant is valid. */
409 if ((mode
== HImode
|| mode
== QImode
)
410 && GET_CODE (op
) == CONST_INT
)
413 /* Otherwise, we will be doing this SET with an add, so anything valid
414 for an add will be valid. */
415 return add_operand (op
, mode
);
418 /* Return 1 if OP is a load multiple operation. It is known to be a
419 PARALLEL and the first section will be tested. */
422 load_multiple_operation (op
, mode
)
424 enum machine_mode mode
;
426 int count
= XVECLEN (op
, 0);
431 /* Perform a quick check so we don't blow up below. */
433 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
434 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
435 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
438 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
439 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
441 for (i
= 1; i
< count
; i
++)
443 rtx elt
= XVECEXP (op
, 0, i
);
445 if (GET_CODE (elt
) != SET
446 || GET_CODE (SET_DEST (elt
)) != REG
447 || GET_MODE (SET_DEST (elt
)) != SImode
448 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
449 || GET_CODE (SET_SRC (elt
)) != MEM
450 || GET_MODE (SET_SRC (elt
)) != SImode
451 || GET_CODE (XEXP (SET_SRC (elt
), 0)) != PLUS
452 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt
), 0), 0), src_addr
)
453 || GET_CODE (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != CONST_INT
454 || INTVAL (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != i
* 4)
461 /* Similar, but tests for store multiple. Here, the second vector element
462 is a CLOBBER. It will be tested later. */
465 store_multiple_operation (op
, mode
)
467 enum machine_mode mode
;
469 int count
= XVECLEN (op
, 0) - 1;
474 /* Perform a quick check so we don't blow up below. */
476 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
477 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
478 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
481 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
482 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
484 for (i
= 1; i
< count
; i
++)
486 rtx elt
= XVECEXP (op
, 0, i
+ 1);
488 if (GET_CODE (elt
) != SET
489 || GET_CODE (SET_SRC (elt
)) != REG
490 || GET_MODE (SET_SRC (elt
)) != SImode
491 || REGNO (SET_SRC (elt
)) != src_regno
+ i
492 || GET_CODE (SET_DEST (elt
)) != MEM
493 || GET_MODE (SET_DEST (elt
)) != SImode
494 || GET_CODE (XEXP (SET_DEST (elt
), 0)) != PLUS
495 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt
), 0), 0), dest_addr
)
496 || GET_CODE (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != CONST_INT
497 || INTVAL (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != i
* 4)
504 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
505 We only check the opcode against the mode of the CC value here. */
508 branch_comparison_operator (op
, mode
)
510 enum machine_mode mode
;
512 enum rtx_code code
= GET_CODE (op
);
513 enum machine_mode cc_mode
;
515 if (GET_RTX_CLASS (code
) != '<')
518 cc_mode
= GET_MODE (XEXP (op
, 0));
519 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
522 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
523 && cc_mode
== CCUNSmode
)
526 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
527 && (cc_mode
!= CCUNSmode
))
533 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
534 We check the opcode against the mode of the CC value and disallow EQ or
535 NE comparisons for integers. */
538 scc_comparison_operator (op
, mode
)
540 enum machine_mode mode
;
542 enum rtx_code code
= GET_CODE (op
);
543 enum machine_mode cc_mode
;
545 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
548 if (GET_RTX_CLASS (code
) != '<')
551 cc_mode
= GET_MODE (XEXP (op
, 0));
552 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
555 if (code
== NE
&& cc_mode
!= CCFPmode
)
558 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
559 && cc_mode
== CCUNSmode
)
562 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
563 && (cc_mode
!= CCUNSmode
))
566 if (cc_mode
== CCEQmode
&& code
!= EQ
&& code
!= NE
)
572 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
573 mask required to convert the result of a rotate insn into a shift
574 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
577 includes_lshift_p (shiftop
, andop
)
578 register rtx shiftop
;
581 int shift_mask
= (~0 << INTVAL (shiftop
));
583 return (INTVAL (andop
) & ~shift_mask
) == 0;
586 /* Similar, but for right shift. */
589 includes_rshift_p (shiftop
, andop
)
590 register rtx shiftop
;
593 unsigned shift_mask
= ~0;
595 shift_mask
>>= INTVAL (shiftop
);
597 return (INTVAL (andop
) & ~ shift_mask
) == 0;
600 /* Return the register class of a scratch register needed to copy IN into
601 or out of a register in CLASS in MODE. If it can be done directly,
602 NO_REGS is returned. */
605 secondary_reload_class (class, mode
, in
)
606 enum reg_class
class;
607 enum machine_mode mode
;
610 int regno
= true_regnum (in
);
612 if (regno
>= FIRST_PSEUDO_REGISTER
)
615 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
617 if (class == GENERAL_REGS
|| class == BASE_REGS
618 || (regno
>= 0 && INT_REGNO_P (regno
)))
621 /* Constants, memory, and FP registers can go into FP registers. */
622 if ((regno
== -1 || FP_REGNO_P (regno
))
623 && (class == FLOAT_REGS
|| class == NON_SPECIAL_REGS
))
626 /* We can copy among the CR registers. */
627 if ((class == CR_REGS
|| class == CR0_REGS
)
628 && regno
>= 0 && CR_REGNO_P (regno
))
631 /* Otherwise, we need GENERAL_REGS. */
635 /* Given a comparison operation, return the bit number in CCR to test. We
636 know this is a valid comparison.
638 SCC_P is 1 if this is for an scc. That means that %D will have been
639 used instead of %C, so the bits will be in different places.
641 Return -1 if OP isn't a valid comparison for some reason. */
648 enum rtx_code code
= GET_CODE (op
);
649 enum machine_mode cc_mode
;
653 if (GET_RTX_CLASS (code
) != '<')
656 cc_mode
= GET_MODE (XEXP (op
, 0));
657 cc_regnum
= REGNO (XEXP (op
, 0));
658 base_bit
= 4 * (cc_regnum
- 68);
660 /* In CCEQmode cases we have made sure that the result is always in the
661 third bit of the CR field. */
663 if (cc_mode
== CCEQmode
)
669 return scc_p
? base_bit
+ 3 : base_bit
+ 2;
678 /* If floating-point, we will have done a cror to put the bit in the
679 unordered position. So test that bit. For integer, this is ! LT
680 unless this is an scc insn. */
681 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
;
684 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
+ 1;
691 /* Print an operand. Recognize special options, documented below. */
694 print_operand (file
, x
, code
)
702 /* These macros test for integers and extract the low-order bits. */
704 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
705 && GET_MODE (X) == VOIDmode)
707 #define INT_LOWPART(X) \
708 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
713 /* If X is a constant integer whose low-order 5 bits are zero,
714 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
715 in the RS/6000 assembler where "sri" with a zero shift count
716 write a trash instruction. */
717 if (GET_CODE (x
) == CONST_INT
&& (INTVAL (x
) & 31) == 0)
724 /* Low-order 16 bits of constant, unsigned. */
726 output_operand_lossage ("invalid %%b value");
728 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
732 /* This is an optional cror needed for LE or GE floating-point
733 comparisons. Otherwise write nothing. */
734 if ((GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
)
735 && GET_MODE (XEXP (x
, 0)) == CCFPmode
)
737 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
739 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
740 base_bit
+ 2, base_bit
+ (GET_CODE (x
) == GE
));
745 /* Similar, except that this is for an scc, so we must be able to
746 encode the test in a single bit that is one. We do the above
747 for any LE, GE, GEU, or LEU and invert the bit for NE. */
748 if (GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
749 || GET_CODE (x
) == LEU
|| GET_CODE (x
) == GEU
)
751 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
753 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
755 base_bit
+ (GET_CODE (x
) == GE
|| GET_CODE (x
) == GEU
));
758 else if (GET_CODE (x
) == NE
)
760 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
762 fprintf (file
, "crnor %d,%d,%d\n\t", base_bit
+ 3,
763 base_bit
+ 2, base_bit
+ 2);
768 /* X is a CR register. Print the number of the third bit of the CR */
769 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
770 output_operand_lossage ("invalid %%E value");
772 fprintf(file
, "%d", 4 * (REGNO (x
) - 68) + 3);
776 /* X is a CR register. Print the shift count needed to move it
777 to the high-order four bits. */
778 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
779 output_operand_lossage ("invalid %%f value");
781 fprintf (file
, "%d", 4 * (REGNO (x
) - 68));
785 /* Similar, but print the count for the rotate in the opposite
787 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
788 output_operand_lossage ("invalid %%F value");
790 fprintf (file
, "%d", 32 - 4 * (REGNO (x
) - 68));
794 /* X is a constant integer. If it is negative, print "m",
795 otherwise print "z". This is to make a aze or ame insn. */
796 if (GET_CODE (x
) != CONST_INT
)
797 output_operand_lossage ("invalid %%G value");
798 else if (INTVAL (x
) >= 0)
805 /* If constant, output low-order five bits. Otherwise,
808 fprintf (file
, "%d", INT_LOWPART (x
) & 31);
810 print_operand (file
, x
, 0);
814 /* X must be a constant. Output the low order 5 bits plus 24. */
816 output_operand_lossage ("invalid %%H value");
818 fprintf (file
, "%d", (INT_LOWPART (x
) + 24) & 31);
822 /* Print `i' if this is a constant, else nothing. */
828 /* Write the bit number in CCR for jump. */
831 output_operand_lossage ("invalid %%j code");
833 fprintf (file
, "%d", i
);
837 /* Similar, but add one for shift count in rlinm for scc and pass
838 scc flag to `ccr_bit'. */
841 output_operand_lossage ("invalid %%J code");
843 /* If we want bit 31, write a shift count of zero, not 32. */
844 fprintf (file
, "%d", i
== 31 ? 0 : i
+ 1);
848 /* X must be a constant. Write the 1's complement of the
851 output_operand_lossage ("invalid %%k value");
853 fprintf (file
, "%d", ~ INT_LOWPART (x
));
857 /* Write second word of DImode or DFmode reference. Works on register
858 or non-indexed memory only. */
859 if (GET_CODE (x
) == REG
)
860 fprintf (file
, "%d", REGNO (x
) + 1);
861 else if (GET_CODE (x
) == MEM
)
863 /* Handle possible auto-increment. Since it is pre-increment and
864 we have already done it, we can just use an offset of four. */
865 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
866 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
867 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 4));
869 output_address (plus_constant (XEXP (x
, 0), 4));
874 /* MB value for a mask operand. */
875 if (! mask_operand (x
, VOIDmode
))
876 output_operand_lossage ("invalid %%m value");
878 val
= INT_LOWPART (x
);
880 /* If the high bit is set and the low bit is not, the value is zero.
881 If the high bit is zero, the value is the first 1 bit we find from
883 if (val
< 0 && (val
& 1) == 0)
890 for (i
= 1; i
< 32; i
++)
893 fprintf (file
, "%d", i
);
897 /* Otherwise, look for the first 0 bit from the right. The result is its
898 number plus 1. We know the low-order bit is one. */
899 for (i
= 0; i
< 32; i
++)
900 if (((val
>>= 1) & 1) == 0)
903 /* If we ended in ...01, I would be 0. The correct value is 31, so
905 fprintf (file
, "%d", 31 - i
);
909 /* ME value for a mask operand. */
910 if (! mask_operand (x
, VOIDmode
))
911 output_operand_lossage ("invalid %%m value");
913 val
= INT_LOWPART (x
);
915 /* If the low bit is set and the high bit is not, the value is 31.
916 If the low bit is zero, the value is the first 1 bit we find from
918 if ((val
& 1) && val
>= 0)
920 fprintf (file
, "31");
923 else if ((val
& 1) == 0)
925 for (i
= 0; i
< 32; i
++)
929 /* If we had ....10, I would be 0. The result should be
930 30, so we need 30 - i. */
931 fprintf (file
, "%d", 30 - i
);
935 /* Otherwise, look for the first 0 bit from the left. The result is its
936 number minus 1. We know the high-order bit is one. */
937 for (i
= 0; i
< 32; i
++)
938 if ((val
<<= 1) >= 0)
941 fprintf (file
, "%d", i
);
945 /* Write the number of elements in the vector times 4. */
946 if (GET_CODE (x
) != PARALLEL
)
947 output_operand_lossage ("invalid %%N value");
949 fprintf (file
, "%d", XVECLEN (x
, 0) * 4);
953 /* Similar, but subtract 1 first. */
954 if (GET_CODE (x
) != PARALLEL
)
955 output_operand_lossage ("invalid %%N value");
957 fprintf (file
, "%d", (XVECLEN (x
, 0) - 1) * 4);
961 /* X is a CONST_INT that is a power of two. Output the logarithm. */
963 || (i
= exact_log2 (INT_LOWPART (x
))) < 0)
964 output_operand_lossage ("invalid %%p value");
966 fprintf (file
, "%d", i
);
970 /* The operand must be an indirect memory reference. The result
971 is the register number. */
972 if (GET_CODE (x
) != MEM
|| GET_CODE (XEXP (x
, 0)) != REG
973 || REGNO (XEXP (x
, 0)) >= 32)
974 output_operand_lossage ("invalid %%P value");
976 fprintf (file
, "%d", REGNO (XEXP (x
, 0)));
980 /* X is a CR register. Print the mask for `mtcrf'. */
981 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
982 output_operand_lossage ("invalid %%R value");
984 fprintf (file
, "%d", 128 >> (REGNO (x
) - 68));
988 /* Low 5 bits of 32 - value */
990 output_operand_lossage ("invalid %%s value");
992 fprintf (file
, "%d", (32 - INT_LOWPART (x
)) & 31);
996 /* Low 5 bits of 31 - value */
998 output_operand_lossage ("invalid %%S value");
1000 fprintf (file
, "%d", (31 - INT_LOWPART (x
)) & 31);
1004 /* Write 12 if this jump operation will branch if true, 4 otherwise.
1005 All floating-point operations except NE branch true and integer
1006 EQ, LT, GT, LTU and GTU also branch true. */
1007 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
1008 output_operand_lossage ("invalid %%t value");
1010 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
1011 && GET_CODE (x
) != NE
)
1012 || GET_CODE (x
) == EQ
1013 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
1014 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
1015 fprintf (file
, "12");
1017 fprintf (file
, "4");
1021 /* Opposite of 't': write 4 if this jump operation will branch if true,
1023 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
1024 output_operand_lossage ("invalid %%t value");
1026 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
1027 && GET_CODE (x
) != NE
)
1028 || GET_CODE (x
) == EQ
1029 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
1030 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
1031 fprintf (file
, "4");
1033 fprintf (file
, "12");
1037 /* High-order 16 bits of constant. */
1039 output_operand_lossage ("invalid %%u value");
1041 fprintf (file
, "%d", (INT_LOWPART (x
) >> 16) & 0xffff);
1045 /* Print `u' if this has an auto-increment or auto-decrement. */
1046 if (GET_CODE (x
) == MEM
1047 && (GET_CODE (XEXP (x
, 0)) == PRE_INC
1048 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
))
1049 fprintf (file
, "u");
1053 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
1056 fprintf (file
, "%d",
1057 (INT_LOWPART (x
) & 0xffff) - 2 * (INT_LOWPART (x
) & 0x8000));
1059 print_operand (file
, x
, 0);
1063 /* If constant, low-order 16 bits of constant, unsigned.
1064 Otherwise, write normally. */
1066 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
1068 print_operand (file
, x
, 0);
1072 if (GET_CODE (x
) == MEM
1073 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x
, 0)))
1074 fprintf (file
, "x");
1078 /* Like 'L', for third word of TImode */
1079 if (GET_CODE (x
) == REG
)
1080 fprintf (file
, "%d", REGNO (x
) + 2);
1081 else if (GET_CODE (x
) == MEM
)
1083 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
1084 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
1085 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 8));
1087 output_address (plus_constant (XEXP (x
, 0), 8));
1092 /* X is a SYMBOL_REF. Write out the name preceded by a
1093 period and without any trailing data in brackets. Used for function
1095 if (GET_CODE (x
) != SYMBOL_REF
)
1098 fprintf (file
, ".");
1099 RS6000_OUTPUT_BASENAME (file
, XSTR (x
, 0));
1103 /* Like 'L', for last word of TImode. */
1104 if (GET_CODE (x
) == REG
)
1105 fprintf (file
, "%d", REGNO (x
) + 3);
1106 else if (GET_CODE (x
) == MEM
)
1108 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
1109 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
1110 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 12));
1112 output_address (plus_constant (XEXP (x
, 0), 12));
1117 if (GET_CODE (x
) == REG
)
1118 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
1119 else if (GET_CODE (x
) == MEM
)
1121 /* We need to handle PRE_INC and PRE_DEC here, since we need to
1122 know the width from the mode. */
1123 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
)
1124 fprintf (file
, "%d(%d)", GET_MODE_SIZE (GET_MODE (x
)),
1125 REGNO (XEXP (XEXP (x
, 0), 0)));
1126 else if (GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
1127 fprintf (file
, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x
)),
1128 REGNO (XEXP (XEXP (x
, 0), 0)));
1130 output_address (XEXP (x
, 0));
1133 output_addr_const (file
, x
);
1137 output_operand_lossage ("invalid %%xn code");
1141 /* Print the address of an operand. */
1144 print_operand_address (file
, x
)
1148 if (GET_CODE (x
) == REG
)
1149 fprintf (file
, "0(%d)", REGNO (x
));
1150 else if (GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == CONST
)
1152 output_addr_const (file
, x
);
1153 fprintf (file
, "(2)");
1155 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == REG
)
1157 if (REGNO (XEXP (x
, 0)) == 0)
1158 fprintf (file
, "%d,%d", REGNO (XEXP (x
, 1)), REGNO (XEXP (x
, 0)));
1160 fprintf (file
, "%d,%d", REGNO (XEXP (x
, 0)), REGNO (XEXP (x
, 1)));
1162 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == CONST_INT
)
1163 fprintf (file
, "%d(%d)", INTVAL (XEXP (x
, 1)), REGNO (XEXP (x
, 0)));
1168 /* This page contains routines that are used to determine what the function
1169 prologue and epilogue code will do and write them out. */
1171 /* Return the first fixed-point register that is required to be saved. 32 if
1175 first_reg_to_save ()
1179 /* Find lowest numbered live register. */
1180 for (first_reg
= 13; first_reg
<= 31; first_reg
++)
1181 if (regs_ever_live
[first_reg
])
1184 /* If profiling, then we must save/restore every register that contains
1185 a parameter before/after the .mcount call. Use registers from 30 down
1186 to 23 to do this. Don't use the frame pointer in reg 31.
1188 For now, save enough room for all of the parameter registers. */
1196 /* Similar, for FP regs. */
1199 first_fp_reg_to_save ()
1203 /* Find lowest numbered live register. */
1204 for (first_reg
= 14 + 32; first_reg
<= 63; first_reg
++)
1205 if (regs_ever_live
[first_reg
])
1211 /* Return 1 if we need to save CR. */
1216 return regs_ever_live
[70] || regs_ever_live
[71] || regs_ever_live
[72];
1219 /* Compute the size of the save area in the stack, including the space for
1228 /* We have the six fixed words, plus the size of the register save
1229 areas, rounded to a double-word. */
1230 size
= 6 + (32 - first_reg_to_save ()) + (64 - first_fp_reg_to_save ()) * 2;
1237 /* Return non-zero if this function makes calls. */
1240 rs6000_makes_calls ()
1244 /* If we are profiling, we will be making a call to mcount. */
1248 for (insn
= get_insns (); insn
; insn
= next_insn (insn
))
1249 if (GET_CODE (insn
) == CALL_INSN
)
1255 /* Return non-zero if this function needs to push space on the stack. */
1258 rs6000_pushes_stack ()
1260 int total_size
= (rs6000_sa_size () + get_frame_size ()
1261 + current_function_outgoing_args_size
);
1263 /* We need to push the stack if a frame pointer is needed (because the
1264 stack might be dynamically adjusted), if we are debugging, if the
1265 total stack size is more than 220 bytes, or if we make calls. */
1267 return (frame_pointer_needed
|| write_symbols
!= NO_DEBUG
1269 || rs6000_makes_calls ());
1272 /* Write function prologue. */
1275 output_prolog (file
, size
)
1279 int first_reg
= first_reg_to_save ();
1280 int must_push
= rs6000_pushes_stack ();
1281 int first_fp_reg
= first_fp_reg_to_save ();
1282 int basic_size
= rs6000_sa_size ();
1283 int total_size
= (basic_size
+ size
+ current_function_outgoing_args_size
);
1285 /* Round size to multiple of 8 bytes. */
1286 total_size
= (total_size
+ 7) & ~7;
1288 /* Write .extern for any function we will call to save and restore fp
1290 if (first_fp_reg
< 62)
1291 fprintf (file
, "\t.extern ._savef%d\n\t.extern ._restf%d\n",
1292 first_fp_reg
- 32, first_fp_reg
- 32);
1294 /* Write .extern for truncation routines, if needed. */
1295 if (rs6000_trunc_used
&& ! trunc_defined
)
1297 fprintf (file
, "\t.extern .itrunc\n\t.extern .uitrunc\n");
1301 /* If we have to call a function to save fpr's, or if we are doing profiling,
1302 then we will be using LR. */
1303 if (first_fp_reg
< 62 || profile_flag
)
1304 regs_ever_live
[65] = 1;
1306 /* If we use the link register, get it into r0. */
1307 if (regs_ever_live
[65])
1308 fprintf (file
, "\tmflr 0\n");
1310 /* If we need to save CR, put it into r12. */
1311 if (must_save_cr ())
1312 fprintf (file
, "\tmfcr 12\n");
1314 /* Do any required saving of fpr's. If only one or two to save, do it
1315 ourself. Otherwise, call function. */
1316 if (first_fp_reg
== 62)
1317 fprintf (file
, "\tstfd 30,-16(1)\n\tstfd 31,-8(1)\n");
1318 else if (first_fp_reg
== 63)
1319 fprintf (file
, "\tstfd 31,-8(1)\n");
1320 else if (first_fp_reg
!= 64)
1321 fprintf (file
, "\tbl ._savef%d\n\tcror 15,15,15\n", first_fp_reg
- 32);
1323 /* Now save gpr's. */
1324 if (first_reg
== 31)
1325 fprintf (file
, "\tst 31,%d(1)\n", -4 - (64 - first_fp_reg
) * 8);
1326 else if (first_reg
!= 32)
1327 fprintf (file
, "\tstm %d,%d(1)\n", first_reg
,
1328 - (32 - first_reg
) * 4 - (64 - first_fp_reg
) * 8);
1330 /* Save lr if we used it. */
1331 if (regs_ever_live
[65])
1332 fprintf (file
, "\tst 0,8(1)\n");
1334 /* Save CR if we use any that must be preserved. */
1335 if (must_save_cr ())
1336 fprintf (file
, "\tst 12,4(1)\n");
1338 /* Update stack and set back pointer. */
1341 if (total_size
< 32767)
1342 fprintf (file
, "\tstu 1,%d(1)\n", - total_size
);
1345 fprintf (file
, "\tcau 0,0,%d\n\toril 0,0,%d\n",
1346 (total_size
>> 16) & 0xffff, total_size
& 0xffff);
1347 fprintf (file
, "\tsf 12,0,1\n\tst 1,0(12)\n\toril 1,12,0\n");
1351 /* Set frame pointer, if needed. */
1352 if (frame_pointer_needed
)
1353 fprintf (file
, "\toril 31,1,0\n");
1356 /* Write function epilogue. */
1359 output_epilog (file
, size
)
1363 int first_reg
= first_reg_to_save ();
1364 int must_push
= rs6000_pushes_stack ();
1365 int first_fp_reg
= first_fp_reg_to_save ();
1366 int basic_size
= rs6000_sa_size ();
1367 int total_size
= (basic_size
+ size
+ current_function_outgoing_args_size
);
1368 rtx insn
= get_last_insn ();
1370 /* Round size to multiple of 8 bytes. */
1371 total_size
= (total_size
+ 7) & ~7;
1373 /* If the last insn was a BARRIER, we don't have to write anything except
1375 if (GET_CODE (insn
) == NOTE
)
1376 insn
= prev_nonnote_insn (insn
);
1377 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
1379 /* If we have a frame pointer, a call to alloca, or a large stack
1380 frame, restore the old stack pointer using the backchain. Otherwise,
1381 we know what size to update it with. */
1382 if (frame_pointer_needed
|| current_function_calls_alloca
1383 || total_size
> 32767)
1384 fprintf (file
, "\tl 1,0(1)\n");
1386 fprintf (file
, "\tai 1,1,%d\n", total_size
);
1388 /* Get the old lr if we saved it. */
1389 if (regs_ever_live
[65])
1390 fprintf (file
, "\tl 0,8(1)\n");
1392 /* Get the old cr if we saved it. */
1393 if (must_save_cr ())
1394 fprintf (file
, "\tl 12,4(1)\n");
1396 /* Set LR here to try to overlap restores below. */
1397 if (regs_ever_live
[65])
1398 fprintf (file
, "\tmtlr 0\n");
1400 /* Restore gpr's. */
1401 if (first_reg
== 31)
1402 fprintf (file
, "\tl 31,%d(1)\n", -4 - (64 - first_fp_reg
) * 8);
1403 else if (first_reg
!= 32)
1404 fprintf (file
, "\tlm %d,%d(1)\n", first_reg
,
1405 - (32 - first_reg
) * 4 - (64 - first_fp_reg
) * 8);
1407 /* Restore fpr's if we can do it without calling a function. */
1408 if (first_fp_reg
== 62)
1409 fprintf (file
, "\tlfd 30,-16(1)\n\tlfd 31,-8(1)\n");
1410 else if (first_fp_reg
== 63)
1411 fprintf (file
, "\tlfd 31,-8(1)\n");
1413 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4
1415 if (must_save_cr ())
1416 fprintf (file
, "\tmtcrf %d,12\n",
1417 (regs_ever_live
[70] != 0) * 0x20
1418 + (regs_ever_live
[71] != 0) * 0x10
1419 + (regs_ever_live
[72] != 0) * 0x8);
1421 /* If we have to restore more than two FP registers, branch to the
1422 restore function. It will return to our caller. */
1423 if (first_fp_reg
< 62)
1424 fprintf (file
, "\tb ._restf%d\n\tcror 15,15,15\n", first_fp_reg
- 32);
1426 fprintf (file
, "\tbr\n");
1429 /* Output a traceback table here. See /usr/include/sys/debug.h for info
1432 char *fname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
1433 int fixed_parms
, float_parms
, parm_info
;
1436 /* Need label immediately before tbtab, so we can compute its offset
1437 from the function start. */
1440 fprintf (file
, "LT..");
1441 ASM_OUTPUT_LABEL (file
, fname
);
1443 /* The .tbtab pseudo-op can only be used for the first eight
1444 expressions, since it can't handle the possibly variable length
1445 fields that follow. However, if you omit the optional fields,
1446 the assembler outputs zeros for all optional fields anyways, giving each
1447 variable length field is minimum length (as defined in sys/debug.h).
1448 Thus we can not use the .tbtab pseudo-op at all. */
1450 /* An all-zero word flags the start of the tbtab, for debuggers that have
1451 to find it by searching forward from the entry point or from the
1453 fprintf (file
, "\t.long 0\n");
1455 /* Tbtab format type. Use format type 0. */
1456 fprintf (file
, "\t.byte 0,");
1458 /* Language type. Unfortunately, there doesn't seem to be any official way
1459 to get this info, so we use language_string. C is 0. C++ is 9.
1460 No number defined for Obj-C, so use the value for C for now. */
1461 if (! strcmp (language_string
, "GNU C")
1462 || ! strcmp (language_string
, "GNU Obj-C"))
1464 else if (! strcmp (language_string
, "GNU F77"))
1466 else if (! strcmp (language_string
, "GNU Ada"))
1468 else if (! strcmp (language_string
, "GNU PASCAL"))
1470 else if (! strcmp (language_string
, "GNU C++"))
1474 fprintf (file
, "%d,", i
);
1476 /* 8 single bit fields: global linkage (not set for C extern linkage,
1477 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
1478 from start of procedure stored in tbtab, internal function, function
1479 has controlled storage, function has no toc, function uses fp,
1480 function logs/aborts fp operations. */
1481 /* Assume that fp operations are used if any fp reg must be saved. */
1482 fprintf (file
, "%d,", (1 << 5) | ((first_fp_reg
!= 64) << 1));
1484 /* 6 bitfields: function is interrupt handler, name present in proc table,
1485 function calls alloca, on condition directives (controls stack walks,
1486 3 bits), saves condition reg, saves link reg. */
1487 /* The `function calls alloca' bit seems to be set whenever reg 31 is
1488 set up as a frame pointer, even when there is no alloca call. */
1489 fprintf (file
, "%d,",
1490 ((1 << 6) | (frame_pointer_needed
<< 5)
1491 | (must_save_cr () << 1) | (regs_ever_live
[65])));
1493 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
1495 fprintf (file
, "%d,",
1496 (must_push
<< 7) | (64 - first_fp_reg_to_save ()));
1498 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
1499 fprintf (file
, "%d,", (32 - first_reg_to_save ()));
1502 /* Compute the parameter info from the function decl argument list. */
1504 int next_parm_info_bit
;
1506 next_parm_info_bit
= 31;
1511 for (decl
= DECL_ARGUMENTS (current_function_decl
);
1512 decl
; decl
= TREE_CHAIN (decl
))
1514 rtx parameter
= DECL_INCOMING_RTL (decl
);
1515 enum machine_mode mode
= GET_MODE (parameter
);
1517 if (GET_CODE (parameter
) == REG
)
1519 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
1527 else if (mode
== DFmode
)
1532 /* If only one bit will fit, don't or in this entry. */
1533 if (next_parm_info_bit
> 0)
1534 parm_info
|= (bits
<< (next_parm_info_bit
- 1));
1535 next_parm_info_bit
-= 2;
1539 fixed_parms
+= ((GET_MODE_SIZE (mode
) + (UNITS_PER_WORD
- 1))
1541 next_parm_info_bit
-= 1;
1547 /* Number of fixed point parameters. */
1548 /* This is actually the number of words of fixed point parameters; thus
1549 an 8 byte struct counts as 2; and thus the maximum value is 8. */
1550 fprintf (file
, "%d,", fixed_parms
);
1552 /* 2 bitfields: number of floating point parameters (7 bits), parameters
1554 /* This is actually the number of fp registers that hold parameters;
1555 and thus the maximum value is 13. */
1556 /* Set parameters on stack bit if parameters are not in their original
1557 registers, regardless of whether they are on the stack? Xlc
1558 seems to set the bit when not optimizing. */
1559 fprintf (file
, "%d\n", ((float_parms
<< 1) | (! optimize
)));
1561 /* Optional fields follow. Some are variable length. */
1563 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
1565 /* There is an entry for each parameter in a register, in the order that
1566 they occur in the parameter list. Any intervening arguments on the
1567 stack are ignored. If the list overflows a long (max possible length
1568 34 bits) then completely leave off all elements that don't fit. */
1569 /* Only emit this long if there was at least one parameter. */
1570 if (fixed_parms
|| float_parms
)
1571 fprintf (file
, "\t.long %d\n", parm_info
);
1573 /* Offset from start of code to tb table. */
1574 fprintf (file
, "\t.long LT..");
1575 RS6000_OUTPUT_BASENAME (file
, fname
);
1576 fprintf (file
, "-.");
1577 RS6000_OUTPUT_BASENAME (file
, fname
);
1578 fprintf (file
, "\n");
1580 /* Interrupt handler mask. */
1581 /* Omit this long, since we never set the interrupt handler bit above. */
1583 /* Number of CTL (controlled storage) anchors. */
1584 /* Omit this long, since the has_ctl bit is never set above. */
1586 /* Displacement into stack of each CTL anchor. */
1587 /* Omit this list of longs, because there are no CTL anchors. */
1589 /* Length of function name. */
1590 fprintf (file
, "\t.short %d\n", strlen (fname
));
1592 /* Function name. */
1593 assemble_string (fname
, strlen (fname
));
1595 /* Register for alloca automatic storage; this is always reg 31.
1596 Only emit this if the alloca bit was set above. */
1597 if (frame_pointer_needed
)
1598 fprintf (file
, "\t.byte 31\n");
1602 /* Output a TOC entry. We derive the entry name from what is
1606 output_toc (file
, x
, labelno
)
1616 ASM_OUTPUT_INTERNAL_LABEL (file
, "LC", labelno
);
1618 /* Handle FP constants specially. */
1619 if (GET_CODE (x
) == CONST_DOUBLE
1620 && GET_MODE (x
) == DFmode
1621 && TARGET_FLOAT_FORMAT
== HOST_FLOAT_FORMAT
1622 && BITS_PER_WORD
== HOST_BITS_PER_INT
1623 && TARGET_FP_IN_TOC
)
1625 fprintf (file
, "\t.tc FD_%x_%x[TC],%d,%d\n",
1626 CONST_DOUBLE_LOW (x
), CONST_DOUBLE_HIGH (x
),
1627 CONST_DOUBLE_LOW (x
), CONST_DOUBLE_HIGH (x
));
1630 else if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == SFmode
1631 && TARGET_FP_IN_TOC
)
1633 rtx val
= operand_subword (x
, 0, 0, SFmode
);
1635 if (val
== 0 || GET_CODE (val
) != CONST_INT
)
1638 fprintf (file
, "\t.tc FS_%x[TC],%d\n", INTVAL (val
), INTVAL (val
));
1642 if (GET_CODE (x
) == CONST
)
1644 base
= XEXP (XEXP (x
, 0), 0);
1645 offset
= INTVAL (XEXP (XEXP (x
, 0), 1));
1648 if (GET_CODE (base
) == SYMBOL_REF
)
1649 name
= XSTR (base
, 0);
1650 else if (GET_CODE (base
) == LABEL_REF
)
1651 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (XEXP (base
, 0)));
1652 else if (GET_CODE (base
) == CODE_LABEL
)
1653 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (base
));
1657 fprintf (file
, "\t.tc ");
1658 RS6000_OUTPUT_BASENAME (file
, name
);
1661 fprintf (file
, ".N%d", - offset
);
1663 fprintf (file
, ".P%d", offset
);
1665 fprintf (file
, "[TC],");
1666 output_addr_const (file
, x
);
1667 fprintf (file
, "\n");
1670 /* Output an assembler pseudo-op to write an ASCII string of N characters
1671 starting at P to FILE.
1673 On the RS/6000, we have to do this using the .byte operation and
1674 write out special characters outside the quoted string.
1675 Also, the assembler is broken; very long strings are truncated,
1676 so we must artificially break them up early. */
1679 output_ascii (file
, p
, n
)
1685 int i
, count_string
;
1686 char *for_string
= "\t.byte \"";
1687 char *for_decimal
= "\t.byte ";
1688 char *to_close
= NULL
;
1691 for (i
= 0; i
< n
; i
++)
1694 if (c
>= ' ' && c
< 0177)
1697 fputs (for_string
, file
);
1700 /* Write two quotes to get one. */
1708 for_decimal
= "\"\n\t.byte ";
1712 if (count_string
>= 512)
1714 fputs (to_close
, file
);
1716 for_string
= "\t.byte \"";
1717 for_decimal
= "\t.byte ";
1725 fputs (for_decimal
, file
);
1726 fprintf (file
, "%d", c
);
1728 for_string
= "\n\t.byte \"";
1735 /* Now close the string if we have written one. Then end the line. */
1737 fprintf (file
, to_close
);
1740 /* Generate a unique section name for FILENAME for a section type
1741 represented by SECTION_DESC. Output goes into BUF.
1743 SECTION_DESC can be any string, as long as it is different for each
1744 possible section type.
1746 We name the section in the same manner as xlc. The name begins with an
1747 underscore followed by the filename (after stripping any leading directory
1748 names) with the last period replaced by the string SECTION_DESC. If
1749 FILENAME does not contain a period, SECTION_DESC is appended to the end of
1753 rs6000_gen_section_name (buf
, filename
, section_desc
)
1758 char *q
, *after_last_slash
, *last_period
;
1762 after_last_slash
= filename
;
1763 for (q
= filename
; *q
; q
++)
1766 after_last_slash
= q
+ 1;
1771 len
= strlen (after_last_slash
) + strlen (section_desc
) + 2;
1772 *buf
= (char *) permalloc (len
);
1777 for (q
= after_last_slash
; *q
; q
++)
1779 if (q
== last_period
)
1781 strcpy (p
, section_desc
);
1782 p
+= strlen (section_desc
);
1785 else if (isalnum (*q
))
1789 if (last_period
== 0)
1790 strcpy (p
, section_desc
);
1795 /* Write function profiler code. */
1798 output_function_profiler (file
, labelno
)
1802 /* The last used parameter register. */
1806 /* Set up a TOC entry for the profiler label. */
1808 fprintf (file
, "LPC..%d:\n\t.tc\tLP..%d[TC],LP..%d\n",
1809 labelno
, labelno
, labelno
);
1812 /* Figure out last used parameter register. The proper thing to do is
1813 to walk incoming args of the function. A function might have live
1814 parameter registers even if it has no incoming args. */
1816 for (last_parm_reg
= 10;
1817 last_parm_reg
> 2 && ! regs_ever_live
[last_parm_reg
];
1821 /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since
1822 it might be set up as the frame pointer. */
1824 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
1825 fprintf (file
, "\tai %d,%d,0\n", j
, i
);
1827 /* Load location address into r3, and call mcount. */
1829 fprintf (file
, "\tl 3,LPC..%d(2)\n\tbl .mcount\n", labelno
);
1831 /* Restore parameter registers. */
1833 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
1834 fprintf (file
, "\tai %d,%d,0\n", i
, j
);