1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 1993, 1994, 1995 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
40 extern char *language_string
;
41 extern int profile_block_flag
;
43 #define min(A,B) ((A) < (B) ? (A) : (B))
44 #define max(A,B) ((A) > (B) ? (A) : (B))
48 enum processor_type rs6000_cpu
;
49 struct rs6000_cpu_select rs6000_select
[3] =
51 /* switch name, tune arch */
52 { (char *)0, "--with-cpu=", 1, 1 },
53 { (char *)0, "-mcpu=", 1, 1 },
54 { (char *)0, "-mtune=", 1, 0 },
57 /* Set to non-zero by "fix" operation to indicate that itrunc and
58 uitrunc must be defined. */
60 int rs6000_trunc_used
;
62 /* Set to non-zero once they have been defined. */
64 static int trunc_defined
;
66 /* Set to non-zero once AIX common-mode calls have been defined. */
67 static int common_mode_defined
;
68 /* Save information from a "cmpxx" operation until the branch or scc is
71 rtx rs6000_compare_op0
, rs6000_compare_op1
;
72 int rs6000_compare_fp_p
;
75 /* Label number of label created for -mrelocatable, to call to so we can
76 get the address of the GOT section */
77 int rs6000_pic_labelno
;
80 /* Whether a System V.4 varargs area was created. */
81 int rs6000_sysv_varargs_p
;
83 /* Whether we need to save the TOC register. */
84 int rs6000_save_toc_p
;
86 /* ABI enumeration available for subtarget to use. */
87 enum rs6000_abi rs6000_current_abi
;
89 /* Temporary memory used to convert integer -> float */
90 static rtx stack_temps
[NUM_MACHINE_MODES
];
93 /* Print the options used in the assembly file. */
95 extern char *version_string
, *language_string
;
107 output_option (file
, type
, name
, pos
)
113 int type_len
= strlen (type
);
114 int name_len
= strlen (name
);
116 if (1 + type_len
+ name_len
+ pos
> MAX_LINE
)
118 fprintf (file
, "\n # %s%s", type
, name
);
119 return 3 + type_len
+ name_len
;
121 fprintf (file
, " %s%s", type
, name
);
122 return pos
+ 1 + type_len
+ name_len
;
125 static struct { char *name
; int value
; } m_options
[] = TARGET_SWITCHES
;
128 output_options (file
, f_options
, f_len
, W_options
, W_len
)
130 struct asm_option
*f_options
;
132 struct asm_option
*W_options
;
136 int flags
= target_flags
;
139 fprintf (file
, " # %s %s", language_string
, version_string
);
144 sprintf (opt_string
, "%d", optimize
);
145 pos
= output_option (file
, "-O", opt_string
, pos
);
149 pos
= output_option (file
, "-p", "", pos
);
151 if (profile_block_flag
)
152 pos
= output_option (file
, "-a", "", pos
);
154 if (inhibit_warnings
)
155 pos
= output_option (file
, "-w", "", pos
);
157 for (j
= 0; j
< f_len
; j
++)
159 if (*f_options
[j
].variable
== f_options
[j
].on_value
)
160 pos
= output_option (file
, "-f", f_options
[j
].string
, pos
);
163 for (j
= 0; j
< W_len
; j
++)
165 if (*W_options
[j
].variable
== W_options
[j
].on_value
)
166 pos
= output_option (file
, "-W", W_options
[j
].string
, pos
);
169 for (j
= 0; j
< sizeof m_options
/ sizeof m_options
[0]; j
++)
171 if (m_options
[j
].name
[0] != '\0'
172 && m_options
[j
].value
> 0
173 && ((m_options
[j
].value
& flags
) == m_options
[j
].value
))
175 pos
= output_option (file
, "-m", m_options
[j
].name
, pos
);
176 flags
&= ~ m_options
[j
].value
;
180 for (j
= 0; j
< sizeof (rs6000_select
) / sizeof(rs6000_select
[0]); j
++)
181 if (rs6000_select
[j
].string
!= (char *)0)
182 pos
= output_option (file
, rs6000_select
[j
].name
, rs6000_select
[j
].string
, pos
);
184 fputs ("\n\n", file
);
188 /* Override command line options. Mostly we process the processor
189 type and sometimes adjust other TARGET_ options. */
192 rs6000_override_options (default_cpu
)
196 struct rs6000_cpu_select
*ptr
;
198 /* Simplify the entries below by making a mask for any POWER
199 variant and any PowerPC variant. */
201 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
202 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
203 | MASK_PPC_GFXOPT | MASK_POWERPC64)
204 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
208 char *name
; /* Canonical processor name. */
209 enum processor_type processor
; /* Processor type enum value. */
210 int target_enable
; /* Target flags to enable. */
211 int target_disable
; /* Target flags to disable. */
212 } processor_target_table
[]
213 = {{"common", PROCESSOR_COMMON
, 0, POWER_MASKS
| POWERPC_MASKS
},
214 {"power", PROCESSOR_POWER
,
215 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
216 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
217 {"power2", PROCESSOR_POWER
,
218 MASK_POWER
| MASK_POWER2
| MASK_MULTIPLE
| MASK_STRING
,
219 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
220 {"powerpc", PROCESSOR_POWERPC
,
221 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
222 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
223 {"rios", PROCESSOR_RIOS1
,
224 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
225 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
226 {"rios1", PROCESSOR_RIOS1
,
227 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
228 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
229 {"rsc", PROCESSOR_PPC601
,
230 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
231 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
232 {"rsc1", PROCESSOR_PPC601
,
233 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
234 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
235 {"rios2", PROCESSOR_RIOS2
,
236 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
| MASK_POWER2
,
237 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
238 {"403", PROCESSOR_PPC403
,
239 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
240 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
241 {"601", PROCESSOR_PPC601
,
242 MASK_POWER
| MASK_POWERPC
| MASK_NEW_MNEMONICS
| MASK_MULTIPLE
| MASK_STRING
,
243 MASK_POWER2
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
244 {"602", PROCESSOR_PPC602
,
245 MASK_POWER
| MASK_POWERPC
| MASK_NEW_MNEMONICS
,
246 MASK_POWER2
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
247 {"603", PROCESSOR_PPC603
,
248 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
249 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
250 {"603e", PROCESSOR_PPC603
,
251 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
252 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
253 {"604", PROCESSOR_PPC604
,
254 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
255 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
256 {"620", PROCESSOR_PPC620
,
257 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
258 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
}};
260 int ptt_size
= sizeof (processor_target_table
) / sizeof (struct ptt
);
262 int multiple
= TARGET_MULTIPLE
; /* save current -mmultiple/-mno-multiple status */
263 int string
= TARGET_STRING
; /* save current -mstring/-mno-string status */
265 profile_block_flag
= 0;
267 /* Identify the processor type */
268 rs6000_select
[0].string
= default_cpu
;
269 rs6000_cpu
= PROCESSOR_DEFAULT
;
270 if (rs6000_cpu
== PROCESSOR_PPC403
)
271 target_flags
|= MASK_SOFT_FLOAT
;
273 for (i
= 0; i
< sizeof (rs6000_select
) / sizeof (rs6000_select
[0]); i
++)
275 ptr
= &rs6000_select
[i
];
276 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
278 for (j
= 0; j
< ptt_size
; j
++)
279 if (! strcmp (ptr
->string
, processor_target_table
[j
].name
))
282 rs6000_cpu
= processor_target_table
[j
].processor
;
286 target_flags
|= processor_target_table
[j
].target_enable
;
287 target_flags
&= ~processor_target_table
[j
].target_disable
;
293 error ("bad value (%s) for %s switch", ptr
->string
, ptr
->name
);
297 /* If -mmultiple or -mno-multiple was explicitly used, don't
298 override with the processor default */
299 if (TARGET_MULTIPLE_SET
)
300 target_flags
= (target_flags
& ~MASK_MULTIPLE
) | multiple
;
302 /* If -mstring or -mno-string was explicitly used, don't
303 override with the processor default */
304 if (TARGET_STRING_SET
)
305 target_flags
= (target_flags
& ~MASK_STRING
) | string
;
307 /* Don't allow -mmultiple or -mstring on little endian systems, because the
308 hardware doesn't support the instructions used in little endian mode */
309 if (!BYTES_BIG_ENDIAN
)
313 target_flags
&= ~MASK_MULTIPLE
;
314 if (TARGET_MULTIPLE_SET
)
315 warning ("-mmultiple is not supported on little endian systems");
320 target_flags
&= ~MASK_STRING
;
321 if (TARGET_STRING_SET
)
322 warning ("-mstring is not supported on little endian systems");
326 #ifdef SUBTARGET_OVERRIDE_OPTIONS
327 SUBTARGET_OVERRIDE_OPTIONS
;
331 /* Create a CONST_DOUBLE from a string. */
334 rs6000_float_const (string
, mode
)
336 enum machine_mode mode
;
338 REAL_VALUE_TYPE value
= REAL_VALUE_ATOF (string
, mode
);
339 return immed_real_const_1 (value
, mode
);
343 /* Create a CONST_DOUBLE like immed_double_const, except reverse the
344 two parts of the constant if the target is little endian. */
347 rs6000_immed_double_const (i0
, i1
, mode
)
348 HOST_WIDE_INT i0
, i1
;
349 enum machine_mode mode
;
351 if (! WORDS_BIG_ENDIAN
)
352 return immed_double_const (i1
, i0
, mode
);
354 return immed_double_const (i0
, i1
, mode
);
358 /* Return non-zero if this function is known to have a null epilogue. */
363 if (reload_completed
)
365 rs6000_stack_t
*info
= rs6000_stack_info ();
367 if (info
->first_gp_reg_save
== 32
368 && info
->first_fp_reg_save
== 64
378 /* Returns 1 always. */
381 any_operand (op
, mode
)
383 enum machine_mode mode
;
388 /* Returns 1 if op is the count register */
389 int count_register_operand(op
, mode
)
391 enum machine_mode mode
;
393 if (GET_CODE (op
) != REG
)
396 if (REGNO (op
) == COUNT_REGISTER_REGNUM
)
399 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
405 /* Return 1 if OP is a constant that can fit in a D field. */
408 short_cint_operand (op
, mode
)
410 enum machine_mode mode
;
412 return (GET_CODE (op
) == CONST_INT
413 && (unsigned) (INTVAL (op
) + 0x8000) < 0x10000);
416 /* Similar for a unsigned D field. */
419 u_short_cint_operand (op
, mode
)
421 enum machine_mode mode
;
423 return (GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff0000) == 0);
426 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
429 non_short_cint_operand (op
, mode
)
431 enum machine_mode mode
;
433 return (GET_CODE (op
) == CONST_INT
434 && (unsigned) (INTVAL (op
) + 0x8000) >= 0x10000);
437 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
441 gpc_reg_operand (op
, mode
)
443 enum machine_mode mode
;
445 return (register_operand (op
, mode
)
446 && (GET_CODE (op
) != REG
|| REGNO (op
) >= 67 || REGNO (op
) < 64));
449 /* Returns 1 if OP is either a pseudo-register or a register denoting a
453 cc_reg_operand (op
, mode
)
455 enum machine_mode mode
;
457 return (register_operand (op
, mode
)
458 && (GET_CODE (op
) != REG
459 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
460 || CR_REGNO_P (REGNO (op
))));
463 /* Returns 1 if OP is either a constant integer valid for a D-field or a
464 non-special register. If a register, it must be in the proper mode unless
468 reg_or_short_operand (op
, mode
)
470 enum machine_mode mode
;
472 return short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
475 /* Similar, except check if the negation of the constant would be valid for
479 reg_or_neg_short_operand (op
, mode
)
481 enum machine_mode mode
;
483 if (GET_CODE (op
) == CONST_INT
)
484 return CONST_OK_FOR_LETTER_P (INTVAL (op
), 'P');
486 return gpc_reg_operand (op
, mode
);
489 /* Return 1 if the operand is either a register or an integer whose high-order
493 reg_or_u_short_operand (op
, mode
)
495 enum machine_mode mode
;
497 if (GET_CODE (op
) == CONST_INT
498 && (INTVAL (op
) & 0xffff0000) == 0)
501 return gpc_reg_operand (op
, mode
);
504 /* Return 1 is the operand is either a non-special register or ANY
508 reg_or_cint_operand (op
, mode
)
510 enum machine_mode mode
;
512 return GET_CODE (op
) == CONST_INT
|| gpc_reg_operand (op
, mode
);
515 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
516 with one instruction per word. We only do this if we can safely read
517 CONST_DOUBLE_{LOW,HIGH}. */
520 easy_fp_constant (op
, mode
)
522 register enum machine_mode mode
;
526 if (GET_CODE (op
) != CONST_DOUBLE
527 || GET_MODE (op
) != mode
528 || GET_MODE_CLASS (mode
) != MODE_FLOAT
)
531 /* Consider all constants with -msoft-float to be easy */
532 if (TARGET_SOFT_FLOAT
)
535 high
= operand_subword (op
, 0, 0, mode
);
536 low
= operand_subword (op
, 1, 0, mode
);
538 if (high
== 0 || ! input_operand (high
, word_mode
))
541 return (mode
== SFmode
542 || (low
!= 0 && input_operand (low
, word_mode
)));
545 /* Return 1 if the operand is in volatile memory. Note that during the
546 RTL generation phase, memory_operand does not return TRUE for
547 volatile memory references. So this function allows us to
548 recognize volatile references where its safe. */
551 volatile_mem_operand (op
, mode
)
553 enum machine_mode mode
;
555 if (GET_CODE (op
) != MEM
)
558 if (!MEM_VOLATILE_P (op
))
561 if (mode
!= GET_MODE (op
))
564 if (reload_completed
)
565 return memory_operand (op
, mode
);
567 if (reload_in_progress
)
568 return strict_memory_address_p (mode
, XEXP (op
, 0));
570 return memory_address_p (mode
, XEXP (op
, 0));
573 /* Return 1 if the operand is an offsettable memory address. */
576 offsettable_addr_operand (op
, mode
)
578 enum machine_mode mode
;
580 return offsettable_address_p (reload_completed
| reload_in_progress
,
584 /* Return 1 if the operand is either a floating-point register, a pseudo
585 register, or memory. */
588 fp_reg_or_mem_operand (op
, mode
)
590 enum machine_mode mode
;
592 return (memory_operand (op
, mode
)
593 || volatile_mem_operand (op
, mode
)
594 || (register_operand (op
, mode
)
595 && (GET_CODE (op
) != REG
596 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
597 || FP_REGNO_P (REGNO (op
)))));
600 /* Return 1 if the operand is either an easy FP constant (see above) or
604 mem_or_easy_const_operand (op
, mode
)
606 enum machine_mode mode
;
608 return memory_operand (op
, mode
) || easy_fp_constant (op
, mode
);
611 /* Return 1 if the operand is either a non-special register or an item
612 that can be used as the operand of an SI add insn. */
615 add_operand (op
, mode
)
617 enum machine_mode mode
;
619 return (reg_or_short_operand (op
, mode
)
620 || (GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff) == 0));
623 /* Return 1 if OP is a constant but not a valid add_operand. */
626 non_add_cint_operand (op
, mode
)
628 enum machine_mode mode
;
630 return (GET_CODE (op
) == CONST_INT
631 && (unsigned) (INTVAL (op
) + 0x8000) >= 0x10000
632 && (INTVAL (op
) & 0xffff) != 0);
635 /* Return 1 if the operand is a non-special register or a constant that
636 can be used as the operand of an OR or XOR insn on the RS/6000. */
639 logical_operand (op
, mode
)
641 enum machine_mode mode
;
643 return (gpc_reg_operand (op
, mode
)
644 || (GET_CODE (op
) == CONST_INT
645 && ((INTVAL (op
) & 0xffff0000) == 0
646 || (INTVAL (op
) & 0xffff) == 0)));
649 /* Return 1 if C is a constant that is not a logical operand (as
653 non_logical_cint_operand (op
, mode
)
655 enum machine_mode mode
;
657 return (GET_CODE (op
) == CONST_INT
658 && (INTVAL (op
) & 0xffff0000) != 0
659 && (INTVAL (op
) & 0xffff) != 0);
662 /* Return 1 if C is a constant that can be encoded in a mask on the
663 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
664 Reject all ones and all zeros, since these should have been optimized
665 away and confuse the making of MB and ME. */
675 if (c
== 0 || c
== ~0)
678 last_bit_value
= c
& 1;
680 for (i
= 1; i
< 32; i
++)
681 if (((c
>>= 1) & 1) != last_bit_value
)
682 last_bit_value
^= 1, transitions
++;
684 return transitions
<= 2;
687 /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
690 mask_operand (op
, mode
)
692 enum machine_mode mode
;
694 return GET_CODE (op
) == CONST_INT
&& mask_constant (INTVAL (op
));
697 /* Return 1 if the operand is either a non-special register or a
698 constant that can be used as the operand of an RS/6000 logical AND insn. */
701 and_operand (op
, mode
)
703 enum machine_mode mode
;
705 return (reg_or_short_operand (op
, mode
)
706 || logical_operand (op
, mode
)
707 || mask_operand (op
, mode
));
710 /* Return 1 if the operand is a constant but not a valid operand for an AND
714 non_and_cint_operand (op
, mode
)
716 enum machine_mode mode
;
718 return GET_CODE (op
) == CONST_INT
&& ! and_operand (op
, mode
);
721 /* Return 1 if the operand is a general register or memory operand. */
724 reg_or_mem_operand (op
, mode
)
726 register enum machine_mode mode
;
728 return (gpc_reg_operand (op
, mode
)
729 || memory_operand (op
, mode
)
730 || volatile_mem_operand (op
, mode
));
733 /* Return 1 if the operand is a general register or memory operand without
734 pre-inc or pre_dec which produces invalid form of PowerPC lwa
738 lwa_operand (op
, mode
)
740 register enum machine_mode mode
;
744 if (reload_completed
&& GET_CODE (inner
) == SUBREG
)
745 inner
= SUBREG_REG (inner
);
747 return gpc_reg_operand (inner
, mode
)
748 || (memory_operand (inner
, mode
)
749 && GET_CODE (XEXP (inner
, 0)) != PRE_INC
750 && GET_CODE (XEXP (inner
, 0)) != PRE_DEC
);
753 /* Return 1 if the operand, used inside a MEM, is a valid first argument
754 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
758 call_operand (op
, mode
)
760 enum machine_mode mode
;
762 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
765 return (GET_CODE (op
) == SYMBOL_REF
766 || (GET_CODE (op
) == REG
&& REGNO (op
) >= FIRST_PSEUDO_REGISTER
));
770 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
774 current_file_function_operand (op
, mode
)
776 enum machine_mode mode
;
778 return (GET_CODE (op
) == SYMBOL_REF
779 && (SYMBOL_REF_FLAG (op
)
780 || op
== XEXP (DECL_RTL (current_function_decl
), 0)));
784 /* Return 1 if this operand is a valid input for a move insn. */
787 input_operand (op
, mode
)
789 enum machine_mode mode
;
791 /* Memory is always valid. */
792 if (memory_operand (op
, mode
))
795 /* For floating-point, easy constants are valid. */
796 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
798 && easy_fp_constant (op
, mode
))
801 /* For floating-point or multi-word mode, the only remaining valid type
803 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
804 || GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
805 return register_operand (op
, mode
);
807 /* The only cases left are integral modes one word or smaller (we
808 do not get called for MODE_CC values). These can be in any
810 if (register_operand (op
, mode
))
813 /* For integer modes, any constant is ok. */
814 if (GET_CODE (op
) == CONST_INT
)
817 /* A SYMBOL_REF referring to the TOC is valid. */
818 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op
))
821 /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC
822 directly in the instruction stream */
823 if (DEFAULT_ABI
== ABI_NT
824 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
))
827 /* Otherwise, we will be doing this SET with an add, so anything valid
828 for an add will be valid. */
829 return add_operand (op
, mode
);
832 /* Initialize a variable CUM of type CUMULATIVE_ARGS
833 for a call to a function whose data type is FNTYPE.
834 For a library call, FNTYPE is 0.
836 For incoming args we set the number of arguments in the prototype large
837 so we never return an EXPR_LIST. */
840 init_cumulative_args (cum
, fntype
, libname
, incoming
)
841 CUMULATIVE_ARGS
*cum
;
846 static CUMULATIVE_ARGS zero_cumulative
;
848 *cum
= zero_cumulative
;
850 cum
->fregno
= FP_ARG_MIN_REG
;
851 cum
->prototype
= (fntype
&& TYPE_ARG_TYPES (fntype
));
855 cum
->nargs_prototype
= 1000; /* don't return an EXPR_LIST */
856 #ifdef TARGET_V4_CALLS
858 cum
->varargs_offset
= RS6000_VARARGS_OFFSET
;
862 else if (cum
->prototype
)
863 cum
->nargs_prototype
= (list_length (TYPE_ARG_TYPES (fntype
)) - 1
864 + (TYPE_MODE (TREE_TYPE (fntype
)) == BLKmode
865 || RETURN_IN_MEMORY (TREE_TYPE (fntype
))));
868 cum
->nargs_prototype
= 0;
870 cum
->orig_nargs
= cum
->nargs_prototype
;
871 if (TARGET_DEBUG_ARG
)
873 fprintf (stderr
, "\ninit_cumulative_args:");
876 tree ret_type
= TREE_TYPE (fntype
);
877 fprintf (stderr
, " ret code = %s,",
878 tree_code_name
[ (int)TREE_CODE (ret_type
) ]);
881 #ifdef TARGET_V4_CALLS
882 if (TARGET_V4_CALLS
&& incoming
)
883 fprintf (stderr
, " varargs = %d, ", cum
->varargs_offset
);
886 fprintf (stderr
, " proto = %d, nargs = %d\n",
887 cum
->prototype
, cum
->nargs_prototype
);
891 /* If defined, a C expression that gives the alignment boundary, in bits,
892 of an argument with the specified mode and type. If it is not defined,
893 PARM_BOUNDARY is used for all arguments.
895 Windows NT wants anything >= 8 bytes to be double word aligned. */
898 function_arg_boundary (mode
, type
)
899 enum machine_mode mode
;
902 if (DEFAULT_ABI
!= ABI_NT
|| TARGET_64BIT
)
903 return PARM_BOUNDARY
;
906 return (GET_MODE_SIZE (mode
)) >= 8 ? 64 : 32;
908 return (int_size_in_bytes (type
) >= 8) ? 64 : 32;
911 /* Update the data in CUM to advance over an argument
912 of mode MODE and data type TYPE.
913 (TYPE is null for libcalls where that information may not be available.) */
916 function_arg_advance (cum
, mode
, type
, named
)
917 CUMULATIVE_ARGS
*cum
;
918 enum machine_mode mode
;
922 int align
= ((cum
->words
& 1) != 0 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
924 cum
->nargs_prototype
--;
926 #ifdef TARGET_V4_CALLS
929 /* Long longs must not be split between registers and stack */
930 if ((GET_MODE_CLASS (mode
) != MODE_FLOAT
|| TARGET_SOFT_FLOAT
)
931 && type
&& !AGGREGATE_TYPE_P (type
)
932 && cum
->words
< GP_ARG_NUM_REG
933 && cum
->words
+ RS6000_ARG_SIZE (mode
, type
, named
) > GP_ARG_NUM_REG
)
935 cum
->words
= GP_ARG_NUM_REG
;
938 /* Aggregates get passed as pointers */
939 if (type
&& AGGREGATE_TYPE_P (type
))
942 /* Floats go in registers, & don't occupy space in the GP registers
943 like they do for AIX unless software floating point. */
944 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
946 && cum
->fregno
<= FP_ARG_V4_MAX_REG
)
950 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, 1);
956 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, named
);
957 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& TARGET_HARD_FLOAT
)
961 if (TARGET_DEBUG_ARG
)
963 "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
964 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), named
, align
);
967 /* Determine where to put an argument to a function.
968 Value is zero to push the argument on the stack,
969 or a hard register in which to store the argument.
971 MODE is the argument's machine mode.
972 TYPE is the data type of the argument (as a tree).
973 This is null for libcalls where that information may
975 CUM is a variable of type CUMULATIVE_ARGS which gives info about
976 the preceding args and about the function being called.
977 NAMED is nonzero if this argument is a named parameter
978 (otherwise it is an extra parameter matching an ellipsis).
980 On RS/6000 the first eight words of non-FP are normally in registers
981 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
982 Under V.4, the first 8 FP args are in registers.
984 If this is floating-point and no prototype is specified, we use
985 both an FP and integer register (or possibly FP reg and stack). Library
986 functions (when TYPE is zero) always have the proper types for args,
987 so we can pass the FP value just in one register. emit_library_function
988 doesn't support EXPR_LIST anyway. */
991 function_arg (cum
, mode
, type
, named
)
992 CUMULATIVE_ARGS
*cum
;
993 enum machine_mode mode
;
997 int align
= ((cum
->words
& 1) != 0 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
998 int align_words
= cum
->words
+ align
;
1000 if (TARGET_DEBUG_ARG
)
1002 "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1003 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), named
, align
);
1005 /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4
1006 uses to say fp args were passed in registers. Assume that we don't need the
1007 marker for software floating point, or compiler generated library calls. */
1008 if (mode
== VOIDmode
)
1010 #ifdef TARGET_V4_CALLS
1011 if (TARGET_V4_CALLS
&& TARGET_HARD_FLOAT
&& cum
->nargs_prototype
< 0
1012 && type
&& (cum
->prototype
|| TARGET_NO_PROTOTYPE
))
1013 return GEN_INT ((cum
->fregno
== FP_ARG_MIN_REG
) ? -1 : 1);
1021 #ifdef TARGET_V4_CALLS
1022 if (!TARGET_V4_CALLS
)
1027 if (type
&& TREE_CODE (TYPE_SIZE (type
)) != INTEGER_CST
)
1030 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
1032 if ((cum
->nargs_prototype
> 0)
1033 #ifdef TARGET_V4_CALLS
1034 || TARGET_V4_CALLS
/* V.4 never passes FP values in GP registers */
1037 return gen_rtx (REG
, mode
, cum
->fregno
);
1039 return gen_rtx (EXPR_LIST
, VOIDmode
,
1040 ((align_words
< GP_ARG_NUM_REG
)
1041 ? gen_rtx (REG
, mode
, GP_ARG_MIN_REG
+ align_words
)
1043 gen_rtx (REG
, mode
, cum
->fregno
));
1046 #ifdef TARGET_V4_CALLS
1047 /* Long longs won't be split between register and stack */
1048 else if (TARGET_V4_CALLS
&&
1049 align_words
+ RS6000_ARG_SIZE (mode
, type
, named
) > GP_ARG_NUM_REG
)
1055 else if (align_words
< GP_ARG_NUM_REG
)
1056 return gen_rtx (REG
, mode
, GP_ARG_MIN_REG
+ align_words
);
1061 /* For an arg passed partly in registers and partly in memory,
1062 this is the number of registers used.
1063 For args passed entirely in registers or entirely in memory, zero. */
1066 function_arg_partial_nregs (cum
, mode
, type
, named
)
1067 CUMULATIVE_ARGS
*cum
;
1068 enum machine_mode mode
;
1075 #ifdef TARGET_V4_CALLS
1076 if (TARGET_V4_CALLS
)
1080 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
1082 if (cum
->nargs_prototype
>= 0)
1086 if (cum
->words
< GP_ARG_NUM_REG
1087 && GP_ARG_NUM_REG
< (cum
->words
+ RS6000_ARG_SIZE (mode
, type
, named
)))
1089 int ret
= GP_ARG_NUM_REG
- cum
->words
;
1090 if (ret
&& TARGET_DEBUG_ARG
)
1091 fprintf (stderr
, "function_arg_partial_nregs: %d\n", ret
);
1099 /* A C expression that indicates when an argument must be passed by
1100 reference. If nonzero for an argument, a copy of that argument is
1101 made in memory and a pointer to the argument is passed instead of
1102 the argument itself. The pointer is passed in whatever way is
1103 appropriate for passing a pointer to that type.
1105 Under V.4, structures and unions are passed by reference. */
1108 function_arg_pass_by_reference (cum
, mode
, type
, named
)
1109 CUMULATIVE_ARGS
*cum
;
1110 enum machine_mode mode
;
1114 #ifdef TARGET_V4_CALLS
1115 if (TARGET_V4_CALLS
&& type
&& AGGREGATE_TYPE_P (type
))
1117 if (TARGET_DEBUG_ARG
)
1118 fprintf (stderr
, "function_arg_pass_by_reference: aggregate\n");
1128 /* Perform any needed actions needed for a function that is receiving a
1129 variable number of arguments.
1133 MODE and TYPE are the mode and type of the current parameter.
1135 PRETEND_SIZE is a variable that should be set to the amount of stack
1136 that must be pushed by the prolog to pretend that our caller pushed
1139 Normally, this macro will push all remaining incoming registers on the
1140 stack and set PRETEND_SIZE to the length of the registers pushed. */
1143 setup_incoming_varargs (cum
, mode
, type
, pretend_size
, no_rtl
)
1144 CUMULATIVE_ARGS
*cum
;
1145 enum machine_mode mode
;
1151 rtx save_area
= virtual_incoming_args_rtx
;
1152 int reg_size
= (TARGET_64BIT
) ? 8 : 4;
1154 if (TARGET_DEBUG_ARG
)
1156 "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n",
1157 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), no_rtl
);
1159 #ifdef TARGET_V4_CALLS
1160 if (TARGET_V4_CALLS
&& !no_rtl
)
1162 rs6000_sysv_varargs_p
= 1;
1163 save_area
= plus_constant (frame_pointer_rtx
, RS6000_VARARGS_OFFSET
);
1169 int first_reg_offset
= cum
->words
;
1171 if (MUST_PASS_IN_STACK (mode
, type
))
1172 first_reg_offset
+= RS6000_ARG_SIZE (TYPE_MODE (type
), type
, 1);
1174 if (first_reg_offset
> GP_ARG_NUM_REG
)
1175 first_reg_offset
= GP_ARG_NUM_REG
;
1177 if (!no_rtl
&& first_reg_offset
!= GP_ARG_NUM_REG
)
1179 (GP_ARG_MIN_REG
+ first_reg_offset
,
1180 gen_rtx (MEM
, BLKmode
,
1181 plus_constant (save_area
, first_reg_offset
* reg_size
)),
1182 GP_ARG_NUM_REG
- first_reg_offset
,
1183 (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
);
1185 *pretend_size
= (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
;
1188 #ifdef TARGET_V4_CALLS
1189 /* Save FP registers if needed. */
1190 if (TARGET_V4_CALLS
&& TARGET_HARD_FLOAT
&& !no_rtl
)
1192 int fregno
= cum
->fregno
;
1193 int num_fp_reg
= FP_ARG_V4_MAX_REG
+ 1 - fregno
;
1195 if (num_fp_reg
>= 0)
1197 rtx cr1
= gen_rtx (REG
, CCmode
, 69);
1198 rtx lab
= gen_label_rtx ();
1199 int off
= (GP_ARG_NUM_REG
* reg_size
) + ((fregno
- FP_ARG_MIN_REG
) * 8);
1201 emit_jump_insn (gen_rtx (SET
, VOIDmode
,
1203 gen_rtx (IF_THEN_ELSE
, VOIDmode
,
1204 gen_rtx (NE
, VOIDmode
, cr1
, const0_rtx
),
1205 gen_rtx (LABEL_REF
, VOIDmode
, lab
),
1208 while ( num_fp_reg
-- >= 0)
1210 emit_move_insn (gen_rtx (MEM
, DFmode
, plus_constant (save_area
, off
)),
1211 gen_rtx (REG
, DFmode
, fregno
++));
1221 /* If defined, is a C expression that produces the machine-specific
1222 code for a call to `__builtin_saveregs'. This code will be moved
1223 to the very beginning of the function, before any parameter access
1224 are made. The return value of this function should be an RTX that
1225 contains the value to use as the return of `__builtin_saveregs'.
1227 The argument ARGS is a `tree_list' containing the arguments that
1228 were passed to `__builtin_saveregs'.
1230 If this macro is not defined, the compiler will output an ordinary
1231 call to the library function `__builtin_saveregs'.
1233 On the Power/PowerPC return the address of the area on the stack
1234 used to hold arguments. Under AIX, this includes the 8 word register
1235 save area. Under V.4 this does not. */
1238 expand_builtin_saveregs (args
)
1241 return virtual_incoming_args_rtx
;
1245 /* Allocate a stack temp. Only allocate one stack temp per type for a
1249 rs6000_stack_temp (mode
, size
)
1250 enum machine_mode mode
;
1253 rtx temp
= stack_temps
[ (int)mode
];
1256 if (temp
== NULL_RTX
)
1258 temp
= assign_stack_local (mode
, size
, 0);
1259 addr
= XEXP (temp
, 0);
1261 if ((size
> 4 && !offsettable_address_p (0, mode
, addr
))
1262 || (size
<= 4 && !memory_address_p (mode
, addr
)))
1264 XEXP (temp
, 0) = copy_addr_to_reg (addr
);
1267 stack_temps
[ (int)mode
] = temp
;
1274 /* Generate a memory reference for expand_block_move, copying volatile,
1275 and other bits from an original memory reference. */
1278 expand_block_move_mem (mode
, addr
, orig_mem
)
1279 enum machine_mode mode
;
1283 rtx mem
= gen_rtx (MEM
, mode
, addr
);
1285 RTX_UNCHANGING_P (mem
) = RTX_UNCHANGING_P (orig_mem
);
1286 MEM_VOLATILE_P (mem
) = MEM_VOLATILE_P (orig_mem
);
1287 MEM_IN_STRUCT_P (mem
) = MEM_IN_STRUCT_P (orig_mem
);
1288 #ifdef MEM_UNALIGNED_P
1289 MEM_UNALIGNED_P (mem
) = MEM_UNALIGNED_P (orig_mem
);
1294 /* Expand a block move operation, and return 1 if successful. Return 0
1295 if we should let the compiler generate normal code.
1297 operands[0] is the destination
1298 operands[1] is the source
1299 operands[2] is the length
1300 operands[3] is the alignment */
1302 #define MAX_MOVE_REG 4
1305 expand_block_move (operands
)
1308 rtx orig_dest
= operands
[0];
1309 rtx orig_src
= operands
[1];
1310 rtx bytes_rtx
= operands
[2];
1311 rtx align_rtx
= operands
[3];
1312 int constp
= (GET_CODE (bytes_rtx
) == CONST_INT
);
1313 int align
= XINT (align_rtx
, 0);
1323 rtx stores
[MAX_MOVE_REG
];
1326 /* If this is not a fixed size move, just call memcpy */
1330 /* Anything to move? */
1331 bytes
= INTVAL (bytes_rtx
);
1335 /* Don't support real large moves. If string instructions are not used,
1336 then don't generate more than 8 loads. */
1342 else if (!STRICT_ALIGNMENT
)
1347 else if (bytes
> 8*align
)
1350 /* Move the address into scratch registers. */
1351 dest_reg
= copy_addr_to_reg (XEXP (orig_dest
, 0));
1352 src_reg
= copy_addr_to_reg (XEXP (orig_src
, 0));
1354 if (TARGET_STRING
) /* string instructions are available */
1356 for ( ; bytes
> 0; bytes
-= move_bytes
)
1358 if (bytes
> 24 /* move up to 32 bytes at a time */
1368 move_bytes
= (bytes
> 32) ? 32 : bytes
;
1369 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1370 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1371 GEN_INT ((move_bytes
== 32) ? 0 : move_bytes
),
1374 else if (bytes
> 16 /* move up to 24 bytes at a time */
1382 move_bytes
= (bytes
> 24) ? 24 : bytes
;
1383 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1384 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1385 GEN_INT (move_bytes
),
1388 else if (bytes
> 8 /* move up to 16 bytes at a time */
1394 move_bytes
= (bytes
> 16) ? 16 : bytes
;
1395 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1396 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1397 GEN_INT (move_bytes
),
1400 else if (bytes
> 4 && !TARGET_64BIT
)
1401 { /* move up to 8 bytes at a time */
1402 move_bytes
= (bytes
> 8) ? 8 : bytes
;
1403 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1404 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1405 GEN_INT (move_bytes
),
1408 else if (bytes
>= 4 && (align
>= 4 || !STRICT_ALIGNMENT
))
1409 { /* move 4 bytes */
1411 tmp_reg
= gen_reg_rtx (SImode
);
1412 emit_move_insn (tmp_reg
, expand_block_move_mem (SImode
, src_reg
, orig_src
));
1413 emit_move_insn (expand_block_move_mem (SImode
, dest_reg
, orig_dest
), tmp_reg
);
1415 else if (bytes
== 2 && (align
>= 2 || !STRICT_ALIGNMENT
))
1416 { /* move 2 bytes */
1418 tmp_reg
= gen_reg_rtx (HImode
);
1419 emit_move_insn (tmp_reg
, expand_block_move_mem (HImode
, src_reg
, orig_src
));
1420 emit_move_insn (expand_block_move_mem (HImode
, dest_reg
, orig_dest
), tmp_reg
);
1422 else if (bytes
== 1) /* move 1 byte */
1425 tmp_reg
= gen_reg_rtx (QImode
);
1426 emit_move_insn (tmp_reg
, expand_block_move_mem (QImode
, src_reg
, orig_src
));
1427 emit_move_insn (expand_block_move_mem (QImode
, dest_reg
, orig_dest
), tmp_reg
);
1430 { /* move up to 4 bytes at a time */
1431 move_bytes
= (bytes
> 4) ? 4 : bytes
;
1432 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1433 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1434 GEN_INT (move_bytes
),
1438 if (bytes
> move_bytes
)
1440 emit_insn (gen_addsi3 (src_reg
, src_reg
, GEN_INT (move_bytes
)));
1441 emit_insn (gen_addsi3 (dest_reg
, dest_reg
, GEN_INT (move_bytes
)));
1446 else /* string instructions not available */
1448 num_reg
= offset
= 0;
1449 for ( ; bytes
> 0; (bytes
-= move_bytes
), (offset
+= move_bytes
))
1451 /* Calculate the correct offset for src/dest */
1455 dest_addr
= dest_reg
;
1459 src_addr
= gen_rtx (PLUS
, Pmode
, src_reg
, GEN_INT (offset
));
1460 dest_addr
= gen_rtx (PLUS
, Pmode
, dest_reg
, GEN_INT (offset
));
1463 /* Generate the appropriate load and store, saving the stores for later */
1464 if (bytes
>= 8 && TARGET_64BIT
&& (align
>= 8 || !STRICT_ALIGNMENT
))
1467 tmp_reg
= gen_reg_rtx (DImode
);
1468 emit_insn (gen_movdi (tmp_reg
, expand_block_move_mem (DImode
, src_addr
, orig_src
)));
1469 stores
[ num_reg
++ ] = gen_movdi (expand_block_move_mem (DImode
, dest_addr
, orig_dest
), tmp_reg
);
1471 else if (bytes
>= 4 && (align
>= 4 || !STRICT_ALIGNMENT
))
1474 tmp_reg
= gen_reg_rtx (SImode
);
1475 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (SImode
, src_addr
, orig_src
)));
1476 stores
[ num_reg
++ ] = gen_movsi (expand_block_move_mem (SImode
, dest_addr
, orig_dest
), tmp_reg
);
1478 else if (bytes
>= 2 && (align
>= 2 || !STRICT_ALIGNMENT
))
1481 tmp_reg
= gen_reg_rtx (HImode
);
1482 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (HImode
, src_addr
, orig_src
)));
1483 stores
[ num_reg
++ ] = gen_movhi (expand_block_move_mem (HImode
, dest_addr
, orig_dest
), tmp_reg
);
1488 tmp_reg
= gen_reg_rtx (QImode
);
1489 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (QImode
, src_addr
, orig_src
)));
1490 stores
[ num_reg
++ ] = gen_movqi (expand_block_move_mem (QImode
, dest_addr
, orig_dest
), tmp_reg
);
1493 if (num_reg
>= MAX_MOVE_REG
)
1495 for (i
= 0; i
< num_reg
; i
++)
1496 emit_insn (stores
[i
]);
1501 for (i
= 0; i
< num_reg
; i
++)
1502 emit_insn (stores
[i
]);
1509 /* Return 1 if OP is a load multiple operation. It is known to be a
1510 PARALLEL and the first section will be tested. */
1513 load_multiple_operation (op
, mode
)
1515 enum machine_mode mode
;
1517 int count
= XVECLEN (op
, 0);
1522 /* Perform a quick check so we don't blow up below. */
1524 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
1525 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
1526 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
1529 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
1530 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
1532 for (i
= 1; i
< count
; i
++)
1534 rtx elt
= XVECEXP (op
, 0, i
);
1536 if (GET_CODE (elt
) != SET
1537 || GET_CODE (SET_DEST (elt
)) != REG
1538 || GET_MODE (SET_DEST (elt
)) != SImode
1539 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
1540 || GET_CODE (SET_SRC (elt
)) != MEM
1541 || GET_MODE (SET_SRC (elt
)) != SImode
1542 || GET_CODE (XEXP (SET_SRC (elt
), 0)) != PLUS
1543 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt
), 0), 0), src_addr
)
1544 || GET_CODE (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != CONST_INT
1545 || INTVAL (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != i
* 4)
1552 /* Similar, but tests for store multiple. Here, the second vector element
1553 is a CLOBBER. It will be tested later. */
1556 store_multiple_operation (op
, mode
)
1558 enum machine_mode mode
;
1560 int count
= XVECLEN (op
, 0) - 1;
1565 /* Perform a quick check so we don't blow up below. */
1567 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
1568 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
1569 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
1572 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
1573 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
1575 for (i
= 1; i
< count
; i
++)
1577 rtx elt
= XVECEXP (op
, 0, i
+ 1);
1579 if (GET_CODE (elt
) != SET
1580 || GET_CODE (SET_SRC (elt
)) != REG
1581 || GET_MODE (SET_SRC (elt
)) != SImode
1582 || REGNO (SET_SRC (elt
)) != src_regno
+ i
1583 || GET_CODE (SET_DEST (elt
)) != MEM
1584 || GET_MODE (SET_DEST (elt
)) != SImode
1585 || GET_CODE (XEXP (SET_DEST (elt
), 0)) != PLUS
1586 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt
), 0), 0), dest_addr
)
1587 || GET_CODE (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != CONST_INT
1588 || INTVAL (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != i
* 4)
1595 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
1596 We only check the opcode against the mode of the CC value here. */
1599 branch_comparison_operator (op
, mode
)
1601 enum machine_mode mode
;
1603 enum rtx_code code
= GET_CODE (op
);
1604 enum machine_mode cc_mode
;
1606 if (GET_RTX_CLASS (code
) != '<')
1609 cc_mode
= GET_MODE (XEXP (op
, 0));
1610 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
1613 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
1614 && cc_mode
== CCUNSmode
)
1617 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
1618 && (cc_mode
!= CCUNSmode
))
1624 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
1625 We check the opcode against the mode of the CC value and disallow EQ or
1626 NE comparisons for integers. */
1629 scc_comparison_operator (op
, mode
)
1631 enum machine_mode mode
;
1633 enum rtx_code code
= GET_CODE (op
);
1634 enum machine_mode cc_mode
;
1636 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1639 if (GET_RTX_CLASS (code
) != '<')
1642 cc_mode
= GET_MODE (XEXP (op
, 0));
1643 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
1646 if (code
== NE
&& cc_mode
!= CCFPmode
)
1649 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
1650 && cc_mode
== CCUNSmode
)
1653 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
1654 && (cc_mode
!= CCUNSmode
))
1657 if (cc_mode
== CCEQmode
&& code
!= EQ
&& code
!= NE
)
1663 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
1664 mask required to convert the result of a rotate insn into a shift
1665 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
1668 includes_lshift_p (shiftop
, andop
)
1669 register rtx shiftop
;
1672 int shift_mask
= (~0 << INTVAL (shiftop
));
1674 return (INTVAL (andop
) & ~shift_mask
) == 0;
1677 /* Similar, but for right shift. */
1680 includes_rshift_p (shiftop
, andop
)
1681 register rtx shiftop
;
1684 unsigned shift_mask
= ~0;
1686 shift_mask
>>= INTVAL (shiftop
);
1688 return (INTVAL (andop
) & ~ shift_mask
) == 0;
1691 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
1692 for lfq and stfq insns.
1694 Note reg1 and reg2 *must* be hard registers. To be sure we will
1695 abort if we are passed pseudo registers. */
1698 registers_ok_for_quad_peep (reg1
, reg2
)
1701 /* We might have been passed a SUBREG. */
1702 if (GET_CODE (reg1
) != REG
|| GET_CODE (reg2
) != REG
)
1705 return (REGNO (reg1
) == REGNO (reg2
) - 1);
1708 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
1709 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
1712 addrs_ok_for_quad_peep (addr1
, addr2
)
1719 /* Extract an offset (if used) from the first addr. */
1720 if (GET_CODE (addr1
) == PLUS
)
1722 /* If not a REG, return zero. */
1723 if (GET_CODE (XEXP (addr1
, 0)) != REG
)
1727 reg1
= REGNO (XEXP (addr1
, 0));
1728 /* The offset must be constant! */
1729 if (GET_CODE (XEXP (addr1
, 1)) != CONST_INT
)
1731 offset1
= INTVAL (XEXP (addr1
, 1));
1734 else if (GET_CODE (addr1
) != REG
)
1738 reg1
= REGNO (addr1
);
1739 /* This was a simple (mem (reg)) expression. Offset is 0. */
1743 /* Make sure the second address is a (mem (plus (reg) (const_int). */
1744 if (GET_CODE (addr2
) != PLUS
)
1747 if (GET_CODE (XEXP (addr2
, 0)) != REG
1748 || GET_CODE (XEXP (addr2
, 1)) != CONST_INT
)
1751 if (reg1
!= REGNO (XEXP (addr2
, 0)))
1754 /* The offset for the second addr must be 8 more than the first addr. */
1755 if (INTVAL (XEXP (addr2
, 1)) != offset1
+ 8)
1758 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
1763 /* Return the register class of a scratch register needed to copy IN into
1764 or out of a register in CLASS in MODE. If it can be done directly,
1765 NO_REGS is returned. */
1768 secondary_reload_class (class, mode
, in
)
1769 enum reg_class
class;
1770 enum machine_mode mode
;
1773 int regno
= true_regnum (in
);
1775 if (regno
>= FIRST_PSEUDO_REGISTER
)
1778 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
1780 if (class == GENERAL_REGS
|| class == BASE_REGS
1781 || (regno
>= 0 && INT_REGNO_P (regno
)))
1784 /* Constants, memory, and FP registers can go into FP registers. */
1785 if ((regno
== -1 || FP_REGNO_P (regno
))
1786 && (class == FLOAT_REGS
|| class == NON_SPECIAL_REGS
))
1789 /* We can copy among the CR registers. */
1790 if ((class == CR_REGS
|| class == CR0_REGS
)
1791 && regno
>= 0 && CR_REGNO_P (regno
))
1794 /* Otherwise, we need GENERAL_REGS. */
1795 return GENERAL_REGS
;
1798 /* Given a comparison operation, return the bit number in CCR to test. We
1799 know this is a valid comparison.
1801 SCC_P is 1 if this is for an scc. That means that %D will have been
1802 used instead of %C, so the bits will be in different places.
1804 Return -1 if OP isn't a valid comparison for some reason. */
1811 enum rtx_code code
= GET_CODE (op
);
1812 enum machine_mode cc_mode
;
1816 if (GET_RTX_CLASS (code
) != '<')
1819 cc_mode
= GET_MODE (XEXP (op
, 0));
1820 cc_regnum
= REGNO (XEXP (op
, 0));
1821 base_bit
= 4 * (cc_regnum
- 68);
1823 /* In CCEQmode cases we have made sure that the result is always in the
1824 third bit of the CR field. */
1826 if (cc_mode
== CCEQmode
)
1827 return base_bit
+ 3;
1832 return scc_p
? base_bit
+ 3 : base_bit
+ 2;
1834 return base_bit
+ 2;
1836 return base_bit
+ 1;
1841 /* If floating-point, we will have done a cror to put the bit in the
1842 unordered position. So test that bit. For integer, this is ! LT
1843 unless this is an scc insn. */
1844 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
;
1847 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
+ 1;
1854 /* Print an operand. Recognize special options, documented below. */
1857 print_operand (file
, x
, code
)
1865 /* These macros test for integers and extract the low-order bits. */
1867 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
1868 && GET_MODE (X) == VOIDmode)
1870 #define INT_LOWPART(X) \
1871 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
1876 /* Write out an instruction after the call which may be replaced
1877 with glue code by the loader. This depends on the AIX version. */
1878 asm_fprintf (file
, RS6000_CALL_GLUE
);
1882 /* Write the register number of the TOC register. */
1883 fputs (TARGET_MINIMAL_TOC
? reg_names
[30] : reg_names
[2], file
);
1887 /* If X is a constant integer whose low-order 5 bits are zero,
1888 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
1889 in the AIX assembler where "sri" with a zero shift count
1890 write a trash instruction. */
1891 if (GET_CODE (x
) == CONST_INT
&& (INTVAL (x
) & 31) == 0)
1898 /* Low-order 16 bits of constant, unsigned. */
1900 output_operand_lossage ("invalid %%b value");
1902 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
1906 /* This is an optional cror needed for LE or GE floating-point
1907 comparisons. Otherwise write nothing. */
1908 if ((GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
)
1909 && GET_MODE (XEXP (x
, 0)) == CCFPmode
)
1911 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
1913 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
1914 base_bit
+ 2, base_bit
+ (GET_CODE (x
) == GE
));
1919 /* Similar, except that this is for an scc, so we must be able to
1920 encode the test in a single bit that is one. We do the above
1921 for any LE, GE, GEU, or LEU and invert the bit for NE. */
1922 if (GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
1923 || GET_CODE (x
) == LEU
|| GET_CODE (x
) == GEU
)
1925 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
1927 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
1929 base_bit
+ (GET_CODE (x
) == GE
|| GET_CODE (x
) == GEU
));
1932 else if (GET_CODE (x
) == NE
)
1934 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
1936 fprintf (file
, "crnor %d,%d,%d\n\t", base_bit
+ 3,
1937 base_bit
+ 2, base_bit
+ 2);
1942 /* X is a CR register. Print the number of the third bit of the CR */
1943 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
1944 output_operand_lossage ("invalid %%E value");
1946 fprintf(file
, "%d", 4 * (REGNO (x
) - 68) + 3);
1950 /* X is a CR register. Print the shift count needed to move it
1951 to the high-order four bits. */
1952 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
1953 output_operand_lossage ("invalid %%f value");
1955 fprintf (file
, "%d", 4 * (REGNO (x
) - 68));
1959 /* Similar, but print the count for the rotate in the opposite
1961 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
1962 output_operand_lossage ("invalid %%F value");
1964 fprintf (file
, "%d", 32 - 4 * (REGNO (x
) - 68));
1968 /* X is a constant integer. If it is negative, print "m",
1969 otherwise print "z". This is to make a aze or ame insn. */
1970 if (GET_CODE (x
) != CONST_INT
)
1971 output_operand_lossage ("invalid %%G value");
1972 else if (INTVAL (x
) >= 0)
1979 /* If constant, output low-order five bits. Otherwise,
1982 fprintf (file
, "%d", INT_LOWPART (x
) & 31);
1984 print_operand (file
, x
, 0);
1988 /* Print `i' if this is a constant, else nothing. */
1994 /* Write the bit number in CCR for jump. */
1997 output_operand_lossage ("invalid %%j code");
1999 fprintf (file
, "%d", i
);
2003 /* Similar, but add one for shift count in rlinm for scc and pass
2004 scc flag to `ccr_bit'. */
2007 output_operand_lossage ("invalid %%J code");
2009 /* If we want bit 31, write a shift count of zero, not 32. */
2010 fprintf (file
, "%d", i
== 31 ? 0 : i
+ 1);
2014 /* X must be a constant. Write the 1's complement of the
2017 output_operand_lossage ("invalid %%k value");
2019 fprintf (file
, "%d", ~ INT_LOWPART (x
));
2023 /* Write second word of DImode or DFmode reference. Works on register
2024 or non-indexed memory only. */
2025 if (GET_CODE (x
) == REG
)
2026 fprintf (file
, "%d", REGNO (x
) + 1);
2027 else if (GET_CODE (x
) == MEM
)
2029 /* Handle possible auto-increment. Since it is pre-increment and
2030 we have already done it, we can just use an offset of four. */
2031 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2032 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2033 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 4));
2035 output_address (plus_constant (XEXP (x
, 0), 4));
2040 /* MB value for a mask operand. */
2041 if (! mask_operand (x
, VOIDmode
))
2042 output_operand_lossage ("invalid %%m value");
2044 val
= INT_LOWPART (x
);
2046 /* If the high bit is set and the low bit is not, the value is zero.
2047 If the high bit is zero, the value is the first 1 bit we find from
2049 if (val
< 0 && (val
& 1) == 0)
2056 for (i
= 1; i
< 32; i
++)
2057 if ((val
<<= 1) < 0)
2059 fprintf (file
, "%d", i
);
2063 /* Otherwise, look for the first 0 bit from the right. The result is its
2064 number plus 1. We know the low-order bit is one. */
2065 for (i
= 0; i
< 32; i
++)
2066 if (((val
>>= 1) & 1) == 0)
2069 /* If we ended in ...01, I would be 0. The correct value is 31, so
2071 fprintf (file
, "%d", 31 - i
);
2075 /* ME value for a mask operand. */
2076 if (! mask_operand (x
, VOIDmode
))
2077 output_operand_lossage ("invalid %%m value");
2079 val
= INT_LOWPART (x
);
2081 /* If the low bit is set and the high bit is not, the value is 31.
2082 If the low bit is zero, the value is the first 1 bit we find from
2084 if ((val
& 1) && val
>= 0)
2089 else if ((val
& 1) == 0)
2091 for (i
= 0; i
< 32; i
++)
2092 if ((val
>>= 1) & 1)
2095 /* If we had ....10, I would be 0. The result should be
2096 30, so we need 30 - i. */
2097 fprintf (file
, "%d", 30 - i
);
2101 /* Otherwise, look for the first 0 bit from the left. The result is its
2102 number minus 1. We know the high-order bit is one. */
2103 for (i
= 0; i
< 32; i
++)
2104 if ((val
<<= 1) >= 0)
2107 fprintf (file
, "%d", i
);
2111 /* Write the number of elements in the vector times 4. */
2112 if (GET_CODE (x
) != PARALLEL
)
2113 output_operand_lossage ("invalid %%N value");
2115 fprintf (file
, "%d", XVECLEN (x
, 0) * 4);
2119 /* Similar, but subtract 1 first. */
2120 if (GET_CODE (x
) != PARALLEL
)
2121 output_operand_lossage ("invalid %%N value");
2123 fprintf (file
, "%d", (XVECLEN (x
, 0) - 1) * 4);
2127 /* X is a CONST_INT that is a power of two. Output the logarithm. */
2129 || (i
= exact_log2 (INT_LOWPART (x
))) < 0)
2130 output_operand_lossage ("invalid %%p value");
2132 fprintf (file
, "%d", i
);
2136 /* The operand must be an indirect memory reference. The result
2137 is the register number. */
2138 if (GET_CODE (x
) != MEM
|| GET_CODE (XEXP (x
, 0)) != REG
2139 || REGNO (XEXP (x
, 0)) >= 32)
2140 output_operand_lossage ("invalid %%P value");
2142 fprintf (file
, "%d", REGNO (XEXP (x
, 0)));
2146 /* X is a CR register. Print the mask for `mtcrf'. */
2147 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2148 output_operand_lossage ("invalid %%R value");
2150 fprintf (file
, "%d", 128 >> (REGNO (x
) - 68));
2154 /* Low 5 bits of 32 - value */
2156 output_operand_lossage ("invalid %%s value");
2158 fprintf (file
, "%d", (32 - INT_LOWPART (x
)) & 31);
2162 /* Write 12 if this jump operation will branch if true, 4 otherwise.
2163 All floating-point operations except NE branch true and integer
2164 EQ, LT, GT, LTU and GTU also branch true. */
2165 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
2166 output_operand_lossage ("invalid %%t value");
2168 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
2169 && GET_CODE (x
) != NE
)
2170 || GET_CODE (x
) == EQ
2171 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
2172 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
2179 /* Opposite of 't': write 4 if this jump operation will branch if true,
2181 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
2182 output_operand_lossage ("invalid %%t value");
2184 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
2185 && GET_CODE (x
) != NE
)
2186 || GET_CODE (x
) == EQ
2187 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
2188 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
2195 /* High-order 16 bits of constant. */
2197 output_operand_lossage ("invalid %%u value");
2199 fprintf (file
, "0x%x", (INT_LOWPART (x
) >> 16) & 0xffff);
2203 /* Print `u' if this has an auto-increment or auto-decrement. */
2204 if (GET_CODE (x
) == MEM
2205 && (GET_CODE (XEXP (x
, 0)) == PRE_INC
2206 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
))
2211 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
2214 fprintf (file
, "%d",
2215 (INT_LOWPART (x
) & 0xffff) - 2 * (INT_LOWPART (x
) & 0x8000));
2217 print_operand (file
, x
, 0);
2221 /* If constant, low-order 16 bits of constant, unsigned.
2222 Otherwise, write normally. */
2224 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
2226 print_operand (file
, x
, 0);
2230 if (GET_CODE (x
) == MEM
2231 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x
, 0)))
2236 /* Like 'L', for third word of TImode */
2237 if (GET_CODE (x
) == REG
)
2238 fprintf (file
, "%d", REGNO (x
) + 2);
2239 else if (GET_CODE (x
) == MEM
)
2241 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2242 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2243 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 8));
2245 output_address (plus_constant (XEXP (x
, 0), 8));
2250 /* X is a SYMBOL_REF. Write out the name preceded by a
2251 period and without any trailing data in brackets. Used for function
2252 names. If we are configured for System V (or the embedded ABI) on
2253 the PowerPC, do not emit the period, since those systems do not use
2254 TOCs and the like. */
2255 if (GET_CODE (x
) != SYMBOL_REF
)
2258 if (XSTR (x
, 0)[0] != '.')
2260 switch (DEFAULT_ABI
)
2270 case ABI_AIX_NODESC
:
2278 RS6000_OUTPUT_BASENAME (file
, XSTR (x
, 0));
2282 /* Like 'L', for last word of TImode. */
2283 if (GET_CODE (x
) == REG
)
2284 fprintf (file
, "%d", REGNO (x
) + 3);
2285 else if (GET_CODE (x
) == MEM
)
2287 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2288 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2289 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 12));
2291 output_address (plus_constant (XEXP (x
, 0), 12));
2296 if (GET_CODE (x
) == REG
)
2297 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
2298 else if (GET_CODE (x
) == MEM
)
2300 /* We need to handle PRE_INC and PRE_DEC here, since we need to
2301 know the width from the mode. */
2302 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
)
2303 fprintf (file
, "%d(%d)", GET_MODE_SIZE (GET_MODE (x
)),
2304 REGNO (XEXP (XEXP (x
, 0), 0)));
2305 else if (GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2306 fprintf (file
, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x
)),
2307 REGNO (XEXP (XEXP (x
, 0), 0)));
2309 output_address (XEXP (x
, 0));
2312 output_addr_const (file
, x
);
2316 output_operand_lossage ("invalid %%xn code");
2320 /* Print the address of an operand. */
2323 print_operand_address (file
, x
)
2327 if (GET_CODE (x
) == REG
)
2328 fprintf (file
, "0(%s)", reg_names
[ REGNO (x
) ]);
2329 else if (GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == CONST
)
2331 output_addr_const (file
, x
);
2332 /* When TARGET_MINIMAL_TOC, use the indirected toc table pointer instead
2333 of the toc pointer. */
2334 #ifdef TARGET_NO_TOC
2339 fprintf (file
, "(%s)", reg_names
[ TARGET_MINIMAL_TOC
? 30 : 2 ]);
2341 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == REG
)
2343 if (REGNO (XEXP (x
, 0)) == 0)
2344 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 1)) ],
2345 reg_names
[ REGNO (XEXP (x
, 0)) ]);
2347 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 0)) ],
2348 reg_names
[ REGNO (XEXP (x
, 1)) ]);
2350 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == CONST_INT
)
2351 fprintf (file
, "%d(%s)", INTVAL (XEXP (x
, 1)), reg_names
[ REGNO (XEXP (x
, 0)) ]);
2352 else if (TARGET_ELF
&& !TARGET_64BIT
&& GET_CODE (x
) == LO_SUM
2353 && GET_CODE (XEXP (x
, 0)) == REG
&& CONSTANT_P (XEXP (x
, 1)))
2355 output_addr_const (file
, XEXP (x
, 1));
2356 fprintf (file
, "@l(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
2362 /* This page contains routines that are used to determine what the function
2363 prologue and epilogue code will do and write them out. */
2365 /* Return the first fixed-point register that is required to be saved. 32 if
2369 first_reg_to_save ()
2373 /* Find lowest numbered live register. */
2374 for (first_reg
= 13; first_reg
<= 31; first_reg
++)
2375 if (regs_ever_live
[first_reg
])
2378 /* If profiling, then we must save/restore every register that contains
2379 a parameter before/after the .mcount call. Use registers from 30 down
2380 to 23 to do this. Don't use the frame pointer in reg 31.
2382 For now, save enough room for all of the parameter registers. */
2383 if (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
2390 /* Similar, for FP regs. */
2393 first_fp_reg_to_save ()
2397 /* Find lowest numbered live register. */
2398 for (first_reg
= 14 + 32; first_reg
<= 63; first_reg
++)
2399 if (regs_ever_live
[first_reg
])
2405 /* Return non-zero if this function makes calls. */
2408 rs6000_makes_calls ()
2412 /* If we are profiling, we will be making a call to mcount. */
2416 for (insn
= get_insns (); insn
; insn
= next_insn (insn
))
2417 if (GET_CODE (insn
) == CALL_INSN
)
2424 /* Calculate the stack information for the current function. This is
2425 complicated by having two separate calling sequences, the AIX calling
2426 sequence and the V.4 calling sequence.
2428 AIX stack frames look like:
2430 SP----> +---------------------------------------+
2431 | back chain to caller | 0
2432 +---------------------------------------+
2434 +---------------------------------------+
2436 +---------------------------------------+
2437 | reserved for compilers | 12
2438 +---------------------------------------+
2439 | reserved for binders | 16
2440 +---------------------------------------+
2441 | saved TOC pointer | 20
2442 +---------------------------------------+
2443 | Parameter save area (P) | 24
2444 +---------------------------------------+
2445 | Alloca space (A) | 24+P
2446 +---------------------------------------+
2447 | Local variable space (L) | 24+P+A
2448 +---------------------------------------+
2449 | Save area for GP registers (G) | 24+P+A+L
2450 +---------------------------------------+
2451 | Save area for FP registers (F) | 24+P+A+L+G
2452 +---------------------------------------+
2453 old SP->| back chain to caller's caller |
2454 +---------------------------------------+
2456 V.4 stack frames look like:
2458 SP----> +---------------------------------------+
2459 | back chain to caller | 0
2460 +---------------------------------------+
2461 | caller's saved LR | 4
2462 +---------------------------------------+
2463 | Parameter save area (P) | 8
2464 +---------------------------------------+
2465 | Alloca space (A) | 8+P
2466 +---------------------------------------+
2467 | Varargs save area (V) | 8+P+A
2468 +---------------------------------------+
2469 | Local variable space (L) | 8+P+A+V
2470 +---------------------------------------+
2471 | saved CR (C) | 8+P+A+V+L
2472 +---------------------------------------+
2473 | Save area for GP registers (G) | 8+P+A+V+L+C
2474 +---------------------------------------+
2475 | Save area for FP registers (F) | 8+P+A+V+L+C+G
2476 +---------------------------------------+
2477 old SP->| back chain to caller's caller |
2478 +---------------------------------------+
2481 A PowerPC Windows/NT frame looks like:
2483 SP----> +---------------------------------------+
2484 | back chain to caller | 0
2485 +---------------------------------------+
2487 +---------------------------------------+
2489 +---------------------------------------+
2491 +---------------------------------------+
2493 +---------------------------------------+
2495 +---------------------------------------+
2496 | Parameter save area (P) | 24
2497 +---------------------------------------+
2498 | Alloca space (A) | 24+P
2499 +---------------------------------------+
2500 | Local variable space (L) | 24+P+A
2501 +---------------------------------------+
2502 | Save area for FP registers (F) | 24+P+A+L
2503 +---------------------------------------+
2504 | Possible alignment area (X) | 24+P+A+L+F
2505 +---------------------------------------+
2506 | Save area for GP registers (G) | 24+P+A+L+F+X
2507 +---------------------------------------+
2508 | Save area for CR (C) | 24+P+A+L+F+X+G
2509 +---------------------------------------+
2510 | Save area for TOC (T) | 24+P+A+L+F+X+G+C
2511 +---------------------------------------+
2512 | Save area for LR (R) | 24+P+A+L+F+X+G+C+T
2513 +---------------------------------------+
2514 old SP->| back chain to caller's caller |
2515 +---------------------------------------+
2517 For NT, there is no specific order to save the registers, but in
2518 order to support __builtin_return_address, the save area for the
2519 link register needs to be in a known place, so we use -4 off of the
2520 old SP. To support calls through pointers, we also allocate a
2521 fixed slot to store the TOC, -8 off the old SP. */
2524 rs6000_stack_info ()
2526 static rs6000_stack_t info
, zero_info
;
2527 rs6000_stack_t
*info_ptr
= &info
;
2528 int reg_size
= TARGET_64BIT
? 8 : 4;
2529 enum rs6000_abi abi
;
2532 /* Zero all fields portably */
2535 /* Select which calling sequence */
2536 info_ptr
->abi
= abi
= DEFAULT_ABI
;
2538 /* Calculate which registers need to be saved & save area size */
2539 info_ptr
->first_gp_reg_save
= first_reg_to_save ();
2540 info_ptr
->gp_size
= reg_size
* (32 - info_ptr
->first_gp_reg_save
);
2542 info_ptr
->first_fp_reg_save
= first_fp_reg_to_save ();
2543 info_ptr
->fp_size
= 8 * (64 - info_ptr
->first_fp_reg_save
);
2545 /* Does this function call anything? */
2546 info_ptr
->calls_p
= rs6000_makes_calls ();
2548 /* Do we need to allocate space to save the toc? */
2549 if (rs6000_save_toc_p
)
2551 info_ptr
->toc_save_p
= 1;
2552 info_ptr
->toc_size
= reg_size
;
2555 /* If this is main and we need to call a function to set things up,
2556 save main's arguments around the call. */
2557 if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl
)), "main") == 0)
2559 info_ptr
->main_p
= 1;
2562 if (DECL_ARGUMENTS (current_function_decl
))
2567 info_ptr
->main_save_p
= 1;
2568 info_ptr
->main_size
= 0;
2569 info_ptr
->calls_p
= 1;
2571 for ((i
= 0), (arg
= DECL_ARGUMENTS (current_function_decl
));
2572 arg
!= NULL_TREE
&& i
< 8;
2573 (arg
= TREE_CHAIN (arg
)), i
++)
2575 info_ptr
->main_size
+= reg_size
;
2581 /* Determine if we need to save the link register */
2582 if (regs_ever_live
[65] || profile_flag
2583 #ifdef TARGET_RELOCATABLE
2584 || (TARGET_RELOCATABLE
&& (get_pool_size () != 0))
2586 || (info_ptr
->first_fp_reg_save
!= 64
2587 && !FP_SAVE_INLINE (info_ptr
->first_fp_reg_save
))
2588 || (abi
== ABI_V4
&& current_function_calls_alloca
)
2589 || info_ptr
->calls_p
)
2591 info_ptr
->lr_save_p
= 1;
2592 regs_ever_live
[65] = 1;
2594 info_ptr
->lr_size
= reg_size
;
2597 /* Determine if we need to save the condition code registers */
2598 if (regs_ever_live
[70] || regs_ever_live
[71] || regs_ever_live
[72])
2600 info_ptr
->cr_save_p
= 1;
2601 if (abi
== ABI_V4
|| abi
== ABI_NT
)
2602 info_ptr
->cr_size
= reg_size
;
2605 /* Determine various sizes */
2606 info_ptr
->reg_size
= reg_size
;
2607 info_ptr
->fixed_size
= RS6000_SAVE_AREA
;
2608 info_ptr
->varargs_size
= RS6000_VARARGS_AREA
;
2609 info_ptr
->vars_size
= ALIGN (get_frame_size (), 8);
2610 info_ptr
->parm_size
= ALIGN (current_function_outgoing_args_size
, 8);
2611 info_ptr
->save_size
= ALIGN (info_ptr
->fp_size
2615 + info_ptr
->toc_size
2616 + info_ptr
->main_size
, 8);
2618 total_raw_size
= (info_ptr
->vars_size
2619 + info_ptr
->parm_size
2620 + info_ptr
->save_size
2621 + info_ptr
->varargs_size
2622 + info_ptr
->fixed_size
);
2624 info_ptr
->total_size
= ALIGN (total_raw_size
, STACK_BOUNDARY
/ BITS_PER_UNIT
);
2626 /* Determine if we need to allocate any stack frame.
2627 For AIX We need to push the stack if a frame pointer is needed (because
2628 the stack might be dynamically adjusted), if we are debugging, if the
2629 total stack size is more than 220 bytes, or if we make calls.
2631 For V.4 we don't have the stack cushion that AIX uses, but assume that
2632 the debugger can handle stackless frames. */
2634 if (info_ptr
->calls_p
)
2635 info_ptr
->push_p
= 1;
2637 else if (abi
== ABI_V4
|| abi
== ABI_NT
)
2638 info_ptr
->push_p
= (total_raw_size
> info_ptr
->fixed_size
2639 || info_ptr
->lr_save_p
);
2642 info_ptr
->push_p
= (frame_pointer_needed
2643 || write_symbols
!= NO_DEBUG
2644 || info_ptr
->total_size
> 220);
2646 /* Calculate the offsets */
2654 case ABI_AIX_NODESC
:
2655 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
2656 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
2657 info_ptr
->main_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->main_size
;
2658 info_ptr
->cr_save_offset
= 4;
2659 info_ptr
->lr_save_offset
= 8;
2663 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
2664 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
2665 info_ptr
->cr_save_offset
= info_ptr
->gp_save_offset
- reg_size
;
2666 info_ptr
->toc_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->cr_size
;
2667 info_ptr
->main_save_offset
= info_ptr
->toc_save_offset
- info_ptr
->toc_size
;
2668 info_ptr
->lr_save_offset
= reg_size
;
2672 info_ptr
->lr_save_offset
= -4;
2673 info_ptr
->toc_save_offset
= info_ptr
->lr_save_offset
- info_ptr
->lr_size
;
2674 info_ptr
->cr_save_offset
= info_ptr
->toc_save_offset
- info_ptr
->toc_size
;
2675 info_ptr
->gp_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->cr_size
- info_ptr
->gp_size
+ reg_size
;
2676 info_ptr
->fp_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->fp_size
;
2677 if (info_ptr
->fp_size
&& ((- info_ptr
->fp_save_offset
) % 8) != 0)
2678 info_ptr
->fp_save_offset
-= 4;
2680 info_ptr
->main_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->main_size
;
2684 /* Zero offsets if we're not saving those registers */
2685 if (!info_ptr
->fp_size
)
2686 info_ptr
->fp_save_offset
= 0;
2688 if (!info_ptr
->gp_size
)
2689 info_ptr
->gp_save_offset
= 0;
2691 if (!info_ptr
->lr_save_p
)
2692 info_ptr
->lr_save_offset
= 0;
2694 if (!info_ptr
->cr_save_p
)
2695 info_ptr
->cr_save_offset
= 0;
2697 if (!info_ptr
->toc_save_p
)
2698 info_ptr
->toc_save_offset
= 0;
2700 if (!info_ptr
->main_save_p
)
2701 info_ptr
->main_save_offset
= 0;
2707 debug_stack_info (info
)
2708 rs6000_stack_t
*info
;
2713 info
= rs6000_stack_info ();
2715 fprintf (stderr
, "\nStack information for function %s:\n",
2716 ((current_function_decl
&& DECL_NAME (current_function_decl
))
2717 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl
))
2722 default: abi_string
= "Unknown"; break;
2723 case ABI_NONE
: abi_string
= "NONE"; break;
2724 case ABI_AIX
: abi_string
= "AIX"; break;
2725 case ABI_AIX_NODESC
: abi_string
= "AIX"; break;
2726 case ABI_V4
: abi_string
= "V.4"; break;
2727 case ABI_NT
: abi_string
= "NT"; break;
2730 fprintf (stderr
, "\tABI = %5s\n", abi_string
);
2732 if (info
->first_gp_reg_save
!= 32)
2733 fprintf (stderr
, "\tfirst_gp_reg_save = %5d\n", info
->first_gp_reg_save
);
2735 if (info
->first_fp_reg_save
!= 64)
2736 fprintf (stderr
, "\tfirst_fp_reg_save = %5d\n", info
->first_fp_reg_save
);
2738 if (info
->lr_save_p
)
2739 fprintf (stderr
, "\tlr_save_p = %5d\n", info
->lr_save_p
);
2741 if (info
->cr_save_p
)
2742 fprintf (stderr
, "\tcr_save_p = %5d\n", info
->cr_save_p
);
2744 if (info
->toc_save_p
)
2745 fprintf (stderr
, "\ttoc_save_p = %5d\n", info
->toc_save_p
);
2748 fprintf (stderr
, "\tpush_p = %5d\n", info
->push_p
);
2751 fprintf (stderr
, "\tcalls_p = %5d\n", info
->calls_p
);
2754 fprintf (stderr
, "\tmain_p = %5d\n", info
->main_p
);
2756 if (info
->main_save_p
)
2757 fprintf (stderr
, "\tmain_save_p = %5d\n", info
->main_save_p
);
2759 if (info
->gp_save_offset
)
2760 fprintf (stderr
, "\tgp_save_offset = %5d\n", info
->gp_save_offset
);
2762 if (info
->fp_save_offset
)
2763 fprintf (stderr
, "\tfp_save_offset = %5d\n", info
->fp_save_offset
);
2765 if (info
->lr_save_offset
)
2766 fprintf (stderr
, "\tlr_save_offset = %5d\n", info
->lr_save_offset
);
2768 if (info
->cr_save_offset
)
2769 fprintf (stderr
, "\tcr_save_offset = %5d\n", info
->cr_save_offset
);
2771 if (info
->toc_save_offset
)
2772 fprintf (stderr
, "\ttoc_save_offset = %5d\n", info
->toc_save_offset
);
2774 if (info
->varargs_save_offset
)
2775 fprintf (stderr
, "\tvarargs_save_offset = %5d\n", info
->varargs_save_offset
);
2777 if (info
->main_save_offset
)
2778 fprintf (stderr
, "\tmain_save_offset = %5d\n", info
->main_save_offset
);
2780 if (info
->total_size
)
2781 fprintf (stderr
, "\ttotal_size = %5d\n", info
->total_size
);
2783 if (info
->varargs_size
)
2784 fprintf (stderr
, "\tvarargs_size = %5d\n", info
->varargs_size
);
2786 if (info
->vars_size
)
2787 fprintf (stderr
, "\tvars_size = %5d\n", info
->vars_size
);
2789 if (info
->parm_size
)
2790 fprintf (stderr
, "\tparm_size = %5d\n", info
->parm_size
);
2792 if (info
->fixed_size
)
2793 fprintf (stderr
, "\tfixed_size = %5d\n", info
->fixed_size
);
2796 fprintf (stderr
, "\tgp_size = %5d\n", info
->gp_size
);
2799 fprintf (stderr
, "\tfp_size = %5d\n", info
->fp_size
);
2802 fprintf (stderr
, "\tlr_size = %5d\n", info
->cr_size
);
2805 fprintf (stderr
, "\tcr_size = %5d\n", info
->cr_size
);
2808 fprintf (stderr
, "\ttoc_size = %5d\n", info
->toc_size
);
2810 if (info
->main_size
)
2811 fprintf (stderr
, "\tmain_size = %5d\n", info
->main_size
);
2813 if (info
->save_size
)
2814 fprintf (stderr
, "\tsave_size = %5d\n", info
->save_size
);
2816 if (info
->reg_size
!= 4)
2817 fprintf (stderr
, "\treg_size = %5d\n", info
->reg_size
);
2819 fprintf (stderr
, "\n");
2823 /* Write function prologue. */
2825 output_prolog (file
, size
)
2829 rs6000_stack_t
*info
= rs6000_stack_info ();
2830 int reg_size
= info
->reg_size
;
2836 store_reg
= "\tstd %s,%d(%s)";
2837 load_reg
= "\tlld %s,%d(%s)";
2841 store_reg
= "\t{st|stw} %s,%d(%s)\n";
2842 load_reg
= "\t{l|lwz} %s,%d(%s)\n";
2845 if (TARGET_DEBUG_STACK
)
2846 debug_stack_info (info
);
2848 /* Write .extern for any function we will call to save and restore fp
2850 if (info
->first_fp_reg_save
< 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
2851 fprintf (file
, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
2852 SAVE_FP_PREFIX
, info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
,
2853 RESTORE_FP_PREFIX
, info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
2855 /* Write .extern for truncation routines, if needed. */
2856 if (rs6000_trunc_used
&& ! trunc_defined
)
2858 fprintf (file
, "\t.extern .%s\n\t.extern .%s\n",
2859 RS6000_ITRUNC
, RS6000_UITRUNC
);
2863 /* Write .extern for AIX common mode routines, if needed. */
2864 if (! TARGET_POWER
&& ! TARGET_POWERPC
&& ! common_mode_defined
)
2866 fputs ("\t.extern __mulh\n", file
);
2867 fputs ("\t.extern __mull\n", file
);
2868 fputs ("\t.extern __divss\n", file
);
2869 fputs ("\t.extern __divus\n", file
);
2870 fputs ("\t.extern __quoss\n", file
);
2871 fputs ("\t.extern __quous\n", file
);
2872 common_mode_defined
= 1;
2875 /* If we use the link register, get it into r0. */
2876 if (info
->lr_save_p
)
2877 asm_fprintf (file
, "\tmflr %s\n", reg_names
[0]);
2879 /* If we need to save CR, put it into r12. */
2880 if (info
->cr_save_p
)
2881 asm_fprintf (file
, "\tmfcr %s\n", reg_names
[12]);
2883 /* Do any required saving of fpr's. If only one or two to save, do it
2884 ourself. Otherwise, call function. Note that since they are statically
2885 linked, we do not need a nop following them. */
2886 if (FP_SAVE_INLINE (info
->first_fp_reg_save
))
2888 int regno
= info
->first_fp_reg_save
;
2889 int loc
= info
->fp_save_offset
;
2891 for ( ; regno
< 64; regno
++, loc
+= 8)
2892 asm_fprintf (file
, "\tstfd %s,%d(%s)\n", reg_names
[regno
], loc
, reg_names
[1]);
2894 else if (info
->first_fp_reg_save
!= 64)
2895 asm_fprintf (file
, "\tbl %s%d%s\n", SAVE_FP_PREFIX
,
2896 info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
);
2898 /* Now save gpr's. */
2899 if (! TARGET_MULTIPLE
|| info
->first_gp_reg_save
== 31 || TARGET_64BIT
)
2901 int regno
= info
->first_gp_reg_save
;
2902 int loc
= info
->gp_save_offset
;
2904 for ( ; regno
< 32; regno
++, loc
+= reg_size
)
2905 asm_fprintf (file
, store_reg
, reg_names
[regno
], loc
, reg_names
[1]);
2908 else if (info
->first_gp_reg_save
!= 32)
2909 asm_fprintf (file
, "\t{stm|stmw} %s,%d(%s)\n",
2910 reg_names
[info
->first_gp_reg_save
],
2911 info
->gp_save_offset
,
2914 /* Save main's arguments if we need to call a function */
2916 if (info
->main_save_p
)
2919 int loc
= info
->main_save_offset
;
2920 int size
= info
->main_size
;
2922 for (regno
= 3; size
> 0; regno
++, loc
-= reg_size
, size
-= reg_size
)
2923 asm_fprintf (file
, store_reg
, reg_names
[regno
], loc
, reg_names
[1]);
2927 /* Save lr if we used it. */
2928 if (info
->lr_save_p
)
2929 asm_fprintf (file
, store_reg
, reg_names
[0], info
->lr_save_offset
, reg_names
[1]);
2931 /* Save CR if we use any that must be preserved. */
2932 if (info
->cr_save_p
)
2933 asm_fprintf (file
, store_reg
, reg_names
[12], info
->cr_save_offset
, reg_names
[1]);
2935 if (info
->toc_save_p
)
2936 asm_fprintf (file
, store_reg
, reg_names
[2], info
->toc_save_offset
, reg_names
[1]);
2938 /* Update stack and set back pointer. */
2941 if (info
->total_size
< 32767)
2943 (TARGET_64BIT
) ? "\tstdu %s,%d(%s)\n" : "\t{stu|stwu} %s,%d(%s)\n",
2944 reg_names
[1], - info
->total_size
, reg_names
[1]);
2947 int neg_size
= - info
->total_size
;
2948 asm_fprintf (file
, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
2949 reg_names
[0], (neg_size
>> 16) & 0xffff,
2950 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
2952 (TARGET_64BIT
) ? "\tstdux %s,%s,%s\n" : "\t{stux|stwux} %s,%s,%s\n",
2953 reg_names
[1], reg_names
[1], reg_names
[0]);
2957 /* Set frame pointer, if needed. */
2958 if (frame_pointer_needed
)
2959 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[31], reg_names
[1]);
2962 /* If we need to call a function to set things up for main, do so now
2963 before dealing with the TOC. */
2968 switch (DEFAULT_ABI
)
2970 case ABI_AIX
: prefix
= "."; break;
2971 case ABI_NT
: prefix
= ".."; break;
2974 fprintf (file
, "\tbl %s%s\n", prefix
, NAME__MAIN
);
2975 #ifdef RS6000_CALL_GLUE2
2976 fprintf (file
, "\t%s%s%s\n", RS6000_CALL_GLUE2
, prefix
, NAME_MAIN
);
2978 #ifdef RS6000_CALL_GLUE
2979 if (DEFAULT_ABI
== ABI_AIX
|| DEFAULT_ABI
== ABI_NT
)
2980 fprintf (file
, "\t%s\n", RS6000_CALL_GLUE
);
2984 if (info
->main_save_p
)
2988 int size
= info
->main_size
;
2990 if (info
->total_size
< 32767)
2992 loc
= info
->total_size
+ info
->main_save_offset
;
2993 for (regno
= 3; size
> 0; regno
++, size
-= reg_size
, loc
-= reg_size
)
2994 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[1]);
2997 { /* for large frames, reg 0 above contains -frame size */
2998 loc
= info
->main_save_offset
;
2999 asm_fprintf (file
, "\t{sf|subf} %s,%s,%s\n", reg_names
[0], reg_names
[0],
3002 for (regno
= 3; size
> 0; regno
++, size
-= reg_size
, loc
-= reg_size
)
3003 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[0]);
3010 /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the
3011 TOC_TABLE address into register 30. */
3012 if (TARGET_TOC
&& TARGET_MINIMAL_TOC
&& get_pool_size () != 0)
3016 #ifdef TARGET_RELOCATABLE
3017 if (TARGET_RELOCATABLE
)
3019 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
3020 fputs ("\tbl ", file
);
3021 assemble_name (file
, buf
);
3024 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCF", rs6000_pic_labelno
);
3025 fprintf (file
, "\tmflr %s\n", reg_names
[30]);
3027 asm_fprintf (file
, TARGET_64BIT
? "\tld" : "\t{l|lwz}");
3028 fprintf (file
, " %s,(", reg_names
[0]);
3029 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCL", rs6000_pic_labelno
);
3030 assemble_name (file
, buf
);
3032 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
3033 assemble_name (file
, buf
);
3034 fprintf (file
, ")(%s)\n", reg_names
[30]);
3035 asm_fprintf (file
, "\t{cax|add} %s,%s,%s\n",
3036 reg_names
[30], reg_names
[0], reg_names
[30]);
3037 rs6000_pic_labelno
++;
3042 switch (DEFAULT_ABI
)
3045 case ABI_AIX_NODESC
:
3048 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 1);
3049 asm_fprintf (file
, "\t{cau|addis} %s,%s,", reg_names
[30], reg_names
[0]);
3050 assemble_name (file
, buf
);
3051 asm_fprintf (file
, "@ha\n");
3052 if (TARGET_NEW_MNEMONICS
)
3054 asm_fprintf (file
, "\taddi %s,%s,", reg_names
[30], reg_names
[30]);
3055 assemble_name (file
, buf
);
3056 asm_fprintf (file
, "@l\n");
3060 asm_fprintf (file
, "\tcal %s,", reg_names
[30]);
3061 assemble_name (file
, buf
);
3062 asm_fprintf (file
, "@l(%s)\n", reg_names
[30]);
3072 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 0);
3073 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[30]);
3074 assemble_name (file
, buf
);
3075 asm_fprintf (file
, "(%s)\n", reg_names
[2]);
3080 if (DEFAULT_ABI
== ABI_NT
)
3082 assemble_name (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
3083 fputs (".b:\n", file
);
3087 /* Write function epilogue. */
3090 output_epilog (file
, size
)
3094 rs6000_stack_t
*info
= rs6000_stack_info ();
3095 char *load_reg
= (TARGET_64BIT
) ? "\tld %s,%d(%s)" : "\t{l|lwz} %s,%d(%s)\n";
3096 rtx insn
= get_last_insn ();
3099 /* Forget about any temporaries created */
3100 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
3101 stack_temps
[i
] = NULL_RTX
;
3103 /* If the last insn was a BARRIER, we don't have to write anything except
3105 if (GET_CODE (insn
) == NOTE
)
3106 insn
= prev_nonnote_insn (insn
);
3107 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
3109 /* If we have a frame pointer, a call to alloca, or a large stack
3110 frame, restore the old stack pointer using the backchain. Otherwise,
3111 we know what size to update it with. */
3112 if (frame_pointer_needed
|| current_function_calls_alloca
3113 || info
->total_size
> 32767)
3114 asm_fprintf (file
, load_reg
, reg_names
[1], 0, reg_names
[1]);
3115 else if (info
->push_p
)
3117 if (TARGET_NEW_MNEMONICS
)
3118 asm_fprintf (file
, "\taddi %s,%s,%d\n", reg_names
[1], reg_names
[1], info
->total_size
);
3120 asm_fprintf (file
, "\tcal %s,%d(%s)\n", reg_names
[1], info
->total_size
, reg_names
[1]);
3123 /* Get the old lr if we saved it. */
3124 if (info
->lr_save_p
)
3125 asm_fprintf (file
, load_reg
, reg_names
[0], info
->lr_save_offset
, reg_names
[1]);
3127 /* Get the old cr if we saved it. */
3128 if (info
->cr_save_p
)
3129 asm_fprintf (file
, load_reg
, reg_names
[12], info
->cr_save_offset
, reg_names
[1]);
3131 /* Set LR here to try to overlap restores below. */
3132 if (info
->lr_save_p
)
3133 asm_fprintf (file
, "\tmtlr %s\n", reg_names
[0]);
3135 /* Restore gpr's. */
3136 if (! TARGET_MULTIPLE
|| info
->first_gp_reg_save
== 31 || TARGET_64BIT
)
3138 int regno
= info
->first_gp_reg_save
;
3139 int loc
= info
->gp_save_offset
;
3140 int reg_size
= (TARGET_64BIT
) ? 8 : 4;
3142 for ( ; regno
< 32; regno
++, loc
+= reg_size
)
3143 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[1]);
3146 else if (info
->first_gp_reg_save
!= 32)
3147 asm_fprintf (file
, "\t{lm|lmw} %s,%d(%s)\n",
3148 reg_names
[info
->first_gp_reg_save
],
3149 info
->gp_save_offset
,
3152 /* Restore fpr's if we can do it without calling a function. */
3153 if (FP_SAVE_INLINE (info
->first_fp_reg_save
))
3155 int regno
= info
->first_fp_reg_save
;
3156 int loc
= info
->fp_save_offset
;
3158 for ( ; regno
< 64; regno
++, loc
+= 8)
3159 asm_fprintf (file
, "\tlfd %s,%d(%s)\n", reg_names
[regno
], loc
, reg_names
[1]);
3162 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4
3164 if (info
->cr_save_p
)
3165 asm_fprintf (file
, "\tmtcrf %d,%s\n",
3166 (regs_ever_live
[70] != 0) * 0x20
3167 + (regs_ever_live
[71] != 0) * 0x10
3168 + (regs_ever_live
[72] != 0) * 0x8, reg_names
[12]);
3170 /* If we have to restore more than two FP registers, branch to the
3171 restore function. It will return to our caller. */
3172 if (info
->first_fp_reg_save
!= 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
3173 asm_fprintf (file
, "\tb %s%d%s\n", RESTORE_FP_PREFIX
,
3174 info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
3176 asm_fprintf (file
, "\t{br|blr}\n");
3179 /* Output a traceback table here. See /usr/include/sys/debug.h for info
3182 We don't output a traceback table if -finhibit-size-directive was
3183 used. The documentation for -finhibit-size-directive reads
3184 ``don't output a @code{.size} assembler directive, or anything
3185 else that would cause trouble if the function is split in the
3186 middle, and the two halves are placed at locations far apart in
3187 memory.'' The traceback table has this property, since it
3188 includes the offset from the start of the function to the
3189 traceback table itself.
3191 System V.4 Powerpc's (and the embedded ABI derived from it) use a
3192 different traceback table. */
3193 if (DEFAULT_ABI
== ABI_AIX
&& ! flag_inhibit_size_directive
)
3195 char *fname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
3196 int fixed_parms
, float_parms
, parm_info
;
3199 while (*fname
== '.') /* V.4 encodes . in the name */
3202 /* Need label immediately before tbtab, so we can compute its offset
3203 from the function start. */
3206 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
3207 ASM_OUTPUT_LABEL (file
, fname
);
3209 /* The .tbtab pseudo-op can only be used for the first eight
3210 expressions, since it can't handle the possibly variable
3211 length fields that follow. However, if you omit the optional
3212 fields, the assembler outputs zeros for all optional fields
3213 anyways, giving each variable length field is minimum length
3214 (as defined in sys/debug.h). Thus we can not use the .tbtab
3215 pseudo-op at all. */
3217 /* An all-zero word flags the start of the tbtab, for debuggers
3218 that have to find it by searching forward from the entry
3219 point or from the current pc. */
3220 fputs ("\t.long 0\n", file
);
3222 /* Tbtab format type. Use format type 0. */
3223 fputs ("\t.byte 0,", file
);
3225 /* Language type. Unfortunately, there doesn't seem to be any
3226 official way to get this info, so we use language_string. C
3227 is 0. C++ is 9. No number defined for Obj-C, so use the
3228 value for C for now. */
3229 if (! strcmp (language_string
, "GNU C")
3230 || ! strcmp (language_string
, "GNU Obj-C"))
3232 else if (! strcmp (language_string
, "GNU F77"))
3234 else if (! strcmp (language_string
, "GNU Ada"))
3236 else if (! strcmp (language_string
, "GNU PASCAL"))
3238 else if (! strcmp (language_string
, "GNU C++"))
3242 fprintf (file
, "%d,", i
);
3244 /* 8 single bit fields: global linkage (not set for C extern linkage,
3245 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
3246 from start of procedure stored in tbtab, internal function, function
3247 has controlled storage, function has no toc, function uses fp,
3248 function logs/aborts fp operations. */
3249 /* Assume that fp operations are used if any fp reg must be saved. */
3250 fprintf (file
, "%d,", (1 << 5) | ((info
->first_fp_reg_save
!= 64) << 1));
3252 /* 6 bitfields: function is interrupt handler, name present in
3253 proc table, function calls alloca, on condition directives
3254 (controls stack walks, 3 bits), saves condition reg, saves
3256 /* The `function calls alloca' bit seems to be set whenever reg 31 is
3257 set up as a frame pointer, even when there is no alloca call. */
3258 fprintf (file
, "%d,",
3259 ((1 << 6) | (frame_pointer_needed
<< 5)
3260 | (info
->cr_save_p
<< 1) | (info
->lr_save_p
)));
3262 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
3264 fprintf (file
, "%d,",
3265 (info
->push_p
<< 7) | (64 - info
->first_fp_reg_save
));
3267 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
3268 fprintf (file
, "%d,", (32 - first_reg_to_save ()));
3271 /* Compute the parameter info from the function decl argument
3274 int next_parm_info_bit
;
3276 next_parm_info_bit
= 31;
3281 for (decl
= DECL_ARGUMENTS (current_function_decl
);
3282 decl
; decl
= TREE_CHAIN (decl
))
3284 rtx parameter
= DECL_INCOMING_RTL (decl
);
3285 enum machine_mode mode
= GET_MODE (parameter
);
3287 if (GET_CODE (parameter
) == REG
)
3289 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3297 else if (mode
== DFmode
)
3302 /* If only one bit will fit, don't or in this entry. */
3303 if (next_parm_info_bit
> 0)
3304 parm_info
|= (bits
<< (next_parm_info_bit
- 1));
3305 next_parm_info_bit
-= 2;
3309 fixed_parms
+= ((GET_MODE_SIZE (mode
)
3310 + (UNITS_PER_WORD
- 1))
3312 next_parm_info_bit
-= 1;
3318 /* Number of fixed point parameters. */
3319 /* This is actually the number of words of fixed point parameters; thus
3320 an 8 byte struct counts as 2; and thus the maximum value is 8. */
3321 fprintf (file
, "%d,", fixed_parms
);
3323 /* 2 bitfields: number of floating point parameters (7 bits), parameters
3325 /* This is actually the number of fp registers that hold parameters;
3326 and thus the maximum value is 13. */
3327 /* Set parameters on stack bit if parameters are not in their original
3328 registers, regardless of whether they are on the stack? Xlc
3329 seems to set the bit when not optimizing. */
3330 fprintf (file
, "%d\n", ((float_parms
<< 1) | (! optimize
)));
3332 /* Optional fields follow. Some are variable length. */
3334 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
3336 /* There is an entry for each parameter in a register, in the order that
3337 they occur in the parameter list. Any intervening arguments on the
3338 stack are ignored. If the list overflows a long (max possible length
3339 34 bits) then completely leave off all elements that don't fit. */
3340 /* Only emit this long if there was at least one parameter. */
3341 if (fixed_parms
|| float_parms
)
3342 fprintf (file
, "\t.long %d\n", parm_info
);
3344 /* Offset from start of code to tb table. */
3345 fputs ("\t.long ", file
);
3346 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
3347 RS6000_OUTPUT_BASENAME (file
, fname
);
3349 RS6000_OUTPUT_BASENAME (file
, fname
);
3352 /* Interrupt handler mask. */
3353 /* Omit this long, since we never set the interrupt handler bit
3356 /* Number of CTL (controlled storage) anchors. */
3357 /* Omit this long, since the has_ctl bit is never set above. */
3359 /* Displacement into stack of each CTL anchor. */
3360 /* Omit this list of longs, because there are no CTL anchors. */
3362 /* Length of function name. */
3363 fprintf (file
, "\t.short %d\n", strlen (fname
));
3365 /* Function name. */
3366 assemble_string (fname
, strlen (fname
));
3368 /* Register for alloca automatic storage; this is always reg 31.
3369 Only emit this if the alloca bit was set above. */
3370 if (frame_pointer_needed
)
3371 fputs ("\t.byte 31\n", file
);
3374 /* Reset varargs and save TOC indicator */
3375 rs6000_sysv_varargs_p
= 0;
3376 rs6000_save_toc_p
= 0;
3378 if (DEFAULT_ABI
== ABI_NT
)
3380 RS6000_OUTPUT_BASENAME (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
3381 fputs (".e:\nFE_MOT_RESVD..", file
);
3382 RS6000_OUTPUT_BASENAME (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
3383 fputs (":\n", file
);
3387 /* Output a TOC entry. We derive the entry name from what is
3391 output_toc (file
, x
, labelno
)
3405 /* if we're going to put a double constant in the TOC, make sure it's
3406 aligned properly when strict alignment is on. */
3407 if (GET_CODE (x
) == CONST_DOUBLE
3409 && GET_MODE (x
) == DFmode
3410 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
)) {
3411 ASM_OUTPUT_ALIGN (file
, 3);
3415 if (TARGET_ELF
&& TARGET_MINIMAL_TOC
)
3417 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LC");
3418 fprintf (file
, "%d = .-", labelno
);
3419 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LCTOC");
3420 fputs ("1\n", file
);
3423 ASM_OUTPUT_INTERNAL_LABEL (file
, "LC", labelno
);
3425 /* Handle FP constants specially. Note that if we have a minimal
3426 TOC, things we put here aren't actually in the TOC, so we can allow
3428 if (GET_CODE (x
) == CONST_DOUBLE
3429 && GET_MODE (x
) == DFmode
3430 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
3435 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
3436 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3437 if (TARGET_MINIMAL_TOC
)
3438 fprintf (file
, "\t.long %ld\n\t.long %ld\n", l
[0], l
[1]);
3440 fprintf (file
, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n",
3441 l
[0], l
[1], l
[0], l
[1]);
3444 else if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == SFmode
3445 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
3447 rtx val
= operand_subword (x
, 0, 0, SFmode
);
3449 if (val
== 0 || GET_CODE (val
) != CONST_INT
)
3452 if (TARGET_MINIMAL_TOC
)
3453 fprintf (file
, "\t.long %d\n", INTVAL (val
));
3455 fprintf (file
, "\t.tc FS_%x[TC],%d\n", INTVAL (val
), INTVAL (val
));
3459 if (GET_CODE (x
) == CONST
)
3461 base
= XEXP (XEXP (x
, 0), 0);
3462 offset
= INTVAL (XEXP (XEXP (x
, 0), 1));
3465 if (GET_CODE (base
) == SYMBOL_REF
)
3466 name
= XSTR (base
, 0);
3467 else if (GET_CODE (base
) == LABEL_REF
)
3468 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (XEXP (base
, 0)));
3469 else if (GET_CODE (base
) == CODE_LABEL
)
3470 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (base
));
3474 if (TARGET_MINIMAL_TOC
)
3475 fputs ("\t.long ", file
);
3478 STRIP_NAME_ENCODING (real_name
, name
);
3479 fprintf (file
, "\t.tc %s", real_name
);
3482 fprintf (file
, ".N%d", - offset
);
3484 fprintf (file
, ".P%d", offset
);
3486 fputs ("[TC],", file
);
3488 output_addr_const (file
, x
);
3492 /* Output an assembler pseudo-op to write an ASCII string of N characters
3493 starting at P to FILE.
3495 On the RS/6000, we have to do this using the .byte operation and
3496 write out special characters outside the quoted string.
3497 Also, the assembler is broken; very long strings are truncated,
3498 so we must artificially break them up early. */
3501 output_ascii (file
, p
, n
)
3507 int i
, count_string
;
3508 char *for_string
= "\t.byte \"";
3509 char *for_decimal
= "\t.byte ";
3510 char *to_close
= NULL
;
3513 for (i
= 0; i
< n
; i
++)
3516 if (c
>= ' ' && c
< 0177)
3519 fputs (for_string
, file
);
3522 /* Write two quotes to get one. */
3530 for_decimal
= "\"\n\t.byte ";
3534 if (count_string
>= 512)
3536 fputs (to_close
, file
);
3538 for_string
= "\t.byte \"";
3539 for_decimal
= "\t.byte ";
3547 fputs (for_decimal
, file
);
3548 fprintf (file
, "%d", c
);
3550 for_string
= "\n\t.byte \"";
3557 /* Now close the string if we have written one. Then end the line. */
3559 fprintf (file
, to_close
);
3562 /* Generate a unique section name for FILENAME for a section type
3563 represented by SECTION_DESC. Output goes into BUF.
3565 SECTION_DESC can be any string, as long as it is different for each
3566 possible section type.
3568 We name the section in the same manner as xlc. The name begins with an
3569 underscore followed by the filename (after stripping any leading directory
3570 names) with the last period replaced by the string SECTION_DESC. If
3571 FILENAME does not contain a period, SECTION_DESC is appended to the end of
3575 rs6000_gen_section_name (buf
, filename
, section_desc
)
3580 char *q
, *after_last_slash
, *last_period
;
3584 after_last_slash
= filename
;
3585 for (q
= filename
; *q
; q
++)
3588 after_last_slash
= q
+ 1;
3593 len
= strlen (after_last_slash
) + strlen (section_desc
) + 2;
3594 *buf
= (char *) permalloc (len
);
3599 for (q
= after_last_slash
; *q
; q
++)
3601 if (q
== last_period
)
3603 strcpy (p
, section_desc
);
3604 p
+= strlen (section_desc
);
3607 else if (isalnum (*q
))
3611 if (last_period
== 0)
3612 strcpy (p
, section_desc
);
3617 /* Write function profiler code. */
3620 output_function_profiler (file
, labelno
)
3624 /* The last used parameter register. */
3629 if (DEFAULT_ABI
!= ABI_AIX
)
3632 /* Set up a TOC entry for the profiler label. */
3634 ASM_OUTPUT_INTERNAL_LABEL (file
, "LPC", labelno
);
3635 ASM_GENERATE_INTERNAL_LABEL (buf
, "LP", labelno
);
3636 if (TARGET_MINIMAL_TOC
)
3638 fputs ("\t.long ", file
);
3639 assemble_name (file
, buf
);
3644 fputs ("\t.tc\t", file
);
3645 assemble_name (file
, buf
);
3646 fputs ("[TC],", file
);
3647 assemble_name (file
, buf
);
3652 /* Figure out last used parameter register. The proper thing to do is
3653 to walk incoming args of the function. A function might have live
3654 parameter registers even if it has no incoming args. */
3656 for (last_parm_reg
= 10;
3657 last_parm_reg
> 2 && ! regs_ever_live
[last_parm_reg
];
3661 /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since
3662 it might be set up as the frame pointer. */
3664 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
3665 asm_fprintf (file
, "\tmr %d,%d\n", j
, i
);
3667 /* Load location address into r3, and call mcount. */
3669 ASM_GENERATE_INTERNAL_LABEL (buf
, "LPC", labelno
);
3670 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[3]);
3671 assemble_name (file
, buf
);
3672 asm_fprintf (file
, "(%s)\n\tbl .mcount\n", reg_names
[2]);
3674 /* Restore parameter registers. */
3676 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
3677 asm_fprintf (file
, "\tmr %d,%d\n", i
, j
);
3680 /* Adjust the cost of a scheduling dependency. Return the new cost of
3681 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
3684 rs6000_adjust_cost (insn
, link
, dep_insn
, cost
)
3690 if (! recog_memoized (insn
))
3693 if (REG_NOTE_KIND (link
) != 0)
3696 if (REG_NOTE_KIND (link
) == 0)
3698 /* Data dependency; DEP_INSN writes a register that INSN reads some
3701 /* Tell the first scheduling pass about the latency between a mtctr
3702 and bctr (and mtlr and br/blr). The first scheduling pass will not
3703 know about this latency since the mtctr instruction, which has the
3704 latency associated to it, will be generated by reload. */
3705 if (get_attr_type (insn
) == TYPE_JMPREG
)
3706 return TARGET_POWER
? 5 : 4;
3708 /* Fall out to return default cost. */
3714 /* Return how many instructions the machine can issue per cycle */
3715 int get_issue_rate()
3717 switch (rs6000_cpu_attr
) {
3738 /* Output insns to flush the {data|instruction} caches after building a
3742 rs6000_sync_trampoline (addr
)
3745 enum machine_mode pmode
= Pmode
;
3746 rtx reg
= gen_reg_rtx (pmode
);
3749 int size
= rs6000_trampoline_size ();
3750 rtx (*sub_fcn
) PROTO ((rtx
, rtx
, rtx
));
3751 rtx (*cmp_fcn
) PROTO ((rtx
, rtx
));
3756 abort (); /* no cmpdi function yet */
3760 sub_fcn
= gen_subsi3
;
3761 cmp_fcn
= gen_cmpsi
;
3764 addr
= force_reg (pmode
, addr
);
3765 mem2
= gen_rtx (MEM
, pmode
, gen_rtx (PLUS
, pmode
, addr
, reg
));
3766 mem1
= gen_rtx (MEM
, pmode
, addr
);
3768 /* Issue a loop of dcbst's to flush the data cache */
3769 emit_move_insn (reg
, GEN_INT (size
-4));
3770 label
= gen_label_rtx ();
3772 emit_insn (gen_dcbst (mem2
, addr
, reg
));
3773 emit_insn ((*sub_fcn
) (reg
, reg
, GEN_INT (4)));
3774 emit_insn ((*cmp_fcn
) (reg
, const0_rtx
));
3775 emit_jump_insn (gen_bgt (label
));
3777 /* Issue a sync after the dcbst's to let things settle down */
3778 emit_insn (gen_sync (mem1
));
3780 /* Issue a loop of icbi's to flush the instruction cache */
3781 emit_move_insn (reg
, GEN_INT (size
-4));
3782 label
= gen_label_rtx ();
3784 emit_insn (gen_icbi (mem2
, addr
, reg
));
3785 emit_insn ((*sub_fcn
) (reg
, reg
, GEN_INT (4)));
3786 emit_insn ((*cmp_fcn
) (reg
, const0_rtx
));
3787 emit_jump_insn (gen_bgt (label
));
3789 /* Issue a sync after the icbi's to let things settle down */
3790 emit_insn (gen_sync (mem1
));
3792 /* Finally issue an isync to synchronize the icache */
3793 emit_insn (gen_isync (mem1
));
3797 /* Output assembler code for a block containing the constant parts
3798 of a trampoline, leaving space for the variable parts.
3800 The trampoline should set the static chain pointer to value placed
3801 into the trampoline and should branch to the specified routine. */
3804 rs6000_trampoline_template (file
)
3807 char *sc
= reg_names
[STATIC_CHAIN_REGNUM
];
3808 char *r0
= reg_names
[0];
3810 switch (DEFAULT_ABI
)
3815 /* Under AIX, this is not code at all, but merely a data area,
3816 since that is the way all functions are called. The first word is
3817 the address of the function, the second word is the TOC pointer (r2),
3818 and the third word is the static chain value. */
3820 fprintf (file
, "\t.long %s\n", (TARGET_64BIT
) ? "0,0,0,0,0,0" : "0,0,0");
3824 /* V.4/eabi function pointers are just a single pointer, so we need to
3825 do the full gory code to load up the static chain. */
3827 case ABI_AIX_NODESC
:
3828 if (STATIC_CHAIN_REGNUM
== 0 || !TARGET_NEW_MNEMONICS
)
3833 fprintf (file
, "\tmflr %s\n", r0
); /* offset 0 */
3834 fprintf (file
, "\tbl .LTRAMP1\n"); /* offset 4 */
3835 fprintf (file
, "\t.long 0,0,0,0\n"); /* offset 8 */
3836 fprintf (file
, ".LTRAMP1:\n");
3837 fprintf (file
, "\tmflr %s\n", sc
); /* offset 28 */
3838 fprintf (file
, "\tmtlr %s\n", r0
); /* offset 32 */
3839 fprintf (file
, "\tld %s,0(%s)\n", r0
, sc
); /* offset 36 */
3840 fprintf (file
, "\tld %s,8(%s)\n", sc
, sc
); /* offset 40 */
3841 fprintf (file
, "\tmtctr %s\n", r0
); /* offset 44 */
3842 fprintf (file
, "\tbctr\n"); /* offset 48 */
3846 fprintf (file
, "\tmflr %s\n", r0
); /* offset 0 */
3847 fprintf (file
, "\tbl .LTRAMP1\n"); /* offset 4 */
3848 fprintf (file
, "\t.long 0,0\n"); /* offset 8 */
3849 fprintf (file
, ".LTRAMP1:\n");
3850 fprintf (file
, "\tmflr %s\n", sc
); /* offset 20 */
3851 fprintf (file
, "\tmtlr %s\n", r0
); /* offset 24 */
3852 fprintf (file
, "\tlwz %s,0(%s)\n", r0
, sc
); /* offset 28 */
3853 fprintf (file
, "\tlwz %s,4(%s)\n", sc
, sc
); /* offset 32 */
3854 fprintf (file
, "\tmtctr %s\n", r0
); /* offset 36 */
3855 fprintf (file
, "\tbctr\n"); /* offset 40 */
3859 /* NT function pointers point to a two word area (real address, TOC)
3860 which unfortunately does not include a static chain field. So we
3861 need to have a 2 word area followed by the code to load up the
3864 if (STATIC_CHAIN_REGNUM
== 0 || !TARGET_NEW_MNEMONICS
|| TARGET_64BIT
)
3867 fprintf (file
, "\t.ualong 0,0\n"); /* offset 0 */
3868 fprintf (file
, "\tmflr %s\n", r0
); /* offset 8 */
3869 fprintf (file
, "\tbl .LTRAMP1\n"); /* offset 12 */
3870 fprintf (file
, "\t.ualong 0,0\n"); /* offset 16 */
3871 fprintf (file
, ".LTRAMP1:\n");
3872 fprintf (file
, "\tmflr %s\n", sc
); /* offset 28 */
3873 fprintf (file
, "\tmtlr %s\n", r0
); /* offset 32 */
3874 fprintf (file
, "\tlwz %s,0(%s)\n", r0
, sc
); /* offset 36 */
3875 fprintf (file
, "\tlwz %s,4(%s)\n", sc
, sc
); /* offset 40 */
3876 fprintf (file
, "\tmtctr %s\n", r0
); /* offset 44 */
3877 fprintf (file
, "\tbctr\n"); /* offset 48 */
3884 /* Length in units of the trampoline for entering a nested function. */
3887 rs6000_trampoline_size ()
3891 switch (DEFAULT_ABI
)
3897 ret
= (TARGET_64BIT
) ? 24 : 12;
3901 case ABI_AIX_NODESC
:
3902 ret
= (TARGET_64BIT
? 48 : 40);
3913 /* Emit RTL insns to initialize the variable parts of a trampoline.
3914 FNADDR is an RTX for the address of the function's pure code.
3915 CXT is an RTX for the static chain value for the function. */
3918 rs6000_initialize_trampoline (addr
, fnaddr
, cxt
)
3923 rtx reg
, reg2
, reg3
;
3925 switch (DEFAULT_ABI
)
3930 /* Under AIX, just build the 3 word function descriptor */
3932 emit_move_insn (gen_rtx (MEM
, SImode
,
3933 memory_address (SImode
, (addr
))),
3934 gen_rtx (MEM
, SImode
,
3935 memory_address (SImode
, (fnaddr
))));
3936 emit_move_insn (gen_rtx (MEM
, SImode
,
3937 memory_address (SImode
,
3938 plus_constant ((addr
), 4))),
3939 gen_rtx (MEM
, SImode
,
3940 memory_address (SImode
,
3941 plus_constant ((fnaddr
), 4))));
3942 emit_move_insn (gen_rtx (MEM
, SImode
,
3943 memory_address (SImode
,
3944 plus_constant ((addr
), 8))),
3945 force_reg (SImode
, (cxt
)));
3948 /* Under V.4/eabi, update the two words after the bl to have the real
3949 function address and the static chain. */
3951 case ABI_AIX_NODESC
:
3952 reg
= gen_reg_rtx (Pmode
);
3954 emit_move_insn (reg
, fnaddr
);
3955 emit_move_insn (gen_rtx (MEM
, Pmode
, plus_constant (addr
, 8)), reg
);
3956 emit_move_insn (gen_rtx (MEM
, Pmode
,
3957 plus_constant (addr
, (TARGET_64BIT
? 16 : 12))),
3960 rs6000_sync_trampoline (addr
);
3963 /* Under NT, update the first 2 words to look like a normal descriptor, and
3964 then fill in the fields with the function address and static chain after
3965 the bl instruction. */
3967 reg
= gen_reg_rtx (Pmode
);
3968 reg2
= gen_reg_rtx (Pmode
);
3969 reg3
= gen_reg_rtx (Pmode
);
3971 emit_move_insn (gen_rtx (MEM
, Pmode
, plus_constant (addr
, 4)),
3972 gen_rtx (REG
, Pmode
, 2));
3973 emit_move_insn (reg
, fnaddr
);
3974 emit_move_insn (reg2
, gen_rtx (MEM
, Pmode
, reg
));
3975 emit_move_insn (reg3
, plus_constant (addr
, 8));
3976 emit_move_insn (gen_rtx (MEM
, Pmode
, plus_constant (addr
, 16)), reg
);
3977 emit_move_insn (gen_rtx (MEM
, Pmode
, addr
), reg3
);
3978 emit_move_insn (gen_rtx (MEM
, Pmode
, plus_constant (addr
, 20)), cxt
);
3979 rs6000_sync_trampoline (addr
);