1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 93-8, 1999 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
26 #include "hard-reg-set.h"
28 #include "insn-config.h"
29 #include "conditions.h"
30 #include "insn-flags.h"
31 #include "insn-attr.h"
43 #ifndef TARGET_NO_PROTOTYPE
44 #define TARGET_NO_PROTOTYPE 0
47 extern int profile_block_flag
;
49 #define min(A,B) ((A) < (B) ? (A) : (B))
50 #define max(A,B) ((A) > (B) ? (A) : (B))
54 enum processor_type rs6000_cpu
;
55 struct rs6000_cpu_select rs6000_select
[3] =
57 /* switch name, tune arch */
58 { (const char *)0, "--with-cpu=", 1, 1 },
59 { (const char *)0, "-mcpu=", 1, 1 },
60 { (const char *)0, "-mtune=", 1, 0 },
63 /* Set to non-zero by "fix" operation to indicate that itrunc and
64 uitrunc must be defined. */
66 int rs6000_trunc_used
;
68 /* Set to non-zero once they have been defined. */
70 static int trunc_defined
;
72 /* Set to non-zero once AIX common-mode calls have been defined. */
73 static int common_mode_defined
;
75 /* Save information from a "cmpxx" operation until the branch or scc is
77 rtx rs6000_compare_op0
, rs6000_compare_op1
;
78 int rs6000_compare_fp_p
;
81 /* Label number of label created for -mrelocatable, to call to so we can
82 get the address of the GOT section */
83 int rs6000_pic_labelno
;
84 int rs6000_pic_func_labelno
;
86 /* Which abi to adhere to */
87 const char *rs6000_abi_name
= RS6000_ABI_NAME
;
89 /* Semantics of the small data area */
90 enum rs6000_sdata_type rs6000_sdata
= SDATA_DATA
;
92 /* Which small data model to use */
93 const char *rs6000_sdata_name
= (char *)0;
96 /* Whether a System V.4 varargs area was created. */
97 int rs6000_sysv_varargs_p
;
99 /* ABI enumeration available for subtarget to use. */
100 enum rs6000_abi rs6000_current_abi
;
102 /* Offset & size for fpmem stack locations used for converting between
103 float and integral types. */
104 int rs6000_fpmem_offset
;
105 int rs6000_fpmem_size
;
108 const char *rs6000_debug_name
;
109 int rs6000_debug_stack
; /* debug stack applications */
110 int rs6000_debug_arg
; /* debug argument handling */
112 /* Flag to say the TOC is initialized */
115 static void rs6000_add_gc_roots
PROTO ((void));
118 /* Default register names. */
119 char rs6000_reg_names
[][8] =
121 "0", "1", "2", "3", "4", "5", "6", "7",
122 "8", "9", "10", "11", "12", "13", "14", "15",
123 "16", "17", "18", "19", "20", "21", "22", "23",
124 "24", "25", "26", "27", "28", "29", "30", "31",
125 "0", "1", "2", "3", "4", "5", "6", "7",
126 "8", "9", "10", "11", "12", "13", "14", "15",
127 "16", "17", "18", "19", "20", "21", "22", "23",
128 "24", "25", "26", "27", "28", "29", "30", "31",
129 "mq", "lr", "ctr","ap",
130 "0", "1", "2", "3", "4", "5", "6", "7",
134 #ifdef TARGET_REGNAMES
135 static char alt_reg_names
[][8] =
137 "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
138 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",
139 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23",
140 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31",
141 "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7",
142 "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15",
143 "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23",
144 "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31",
145 "mq", "lr", "ctr", "ap",
146 "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
151 #ifndef MASK_STRICT_ALIGN
152 #define MASK_STRICT_ALIGN 0
155 /* Override command line options. Mostly we process the processor
156 type and sometimes adjust other TARGET_ options. */
159 rs6000_override_options (default_cpu
)
160 const char *default_cpu
;
163 struct rs6000_cpu_select
*ptr
;
165 /* Simplify the entries below by making a mask for any POWER
166 variant and any PowerPC variant. */
168 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
169 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
170 | MASK_PPC_GFXOPT | MASK_POWERPC64)
171 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
175 const char *name
; /* Canonical processor name. */
176 enum processor_type processor
; /* Processor type enum value. */
177 int target_enable
; /* Target flags to enable. */
178 int target_disable
; /* Target flags to disable. */
179 } processor_target_table
[]
180 = {{"common", PROCESSOR_COMMON
, MASK_NEW_MNEMONICS
,
181 POWER_MASKS
| POWERPC_MASKS
},
182 {"power", PROCESSOR_POWER
,
183 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
184 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
185 {"power2", PROCESSOR_POWER
,
186 MASK_POWER
| MASK_POWER2
| MASK_MULTIPLE
| MASK_STRING
,
187 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
188 {"powerpc", PROCESSOR_POWERPC
,
189 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
190 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
191 {"powerpc64", PROCESSOR_POWERPC64
,
192 MASK_POWERPC
| MASK_POWERPC64
| MASK_NEW_MNEMONICS
,
193 POWER_MASKS
| POWERPC_OPT_MASKS
},
194 {"rios", PROCESSOR_RIOS1
,
195 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
196 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
197 {"rios1", PROCESSOR_RIOS1
,
198 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
199 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
200 {"rsc", PROCESSOR_PPC601
,
201 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
202 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
203 {"rsc1", PROCESSOR_PPC601
,
204 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
205 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
206 {"rios2", PROCESSOR_RIOS2
,
207 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
| MASK_POWER2
,
208 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
209 {"rs64a", PROCESSOR_RS64A
,
210 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
211 POWER_MASKS
| POWERPC_OPT_MASKS
},
212 {"401", PROCESSOR_PPC403
,
213 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
214 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
215 {"403", PROCESSOR_PPC403
,
216 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
| MASK_STRICT_ALIGN
,
217 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
218 {"505", PROCESSOR_MPCCORE
,
219 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
220 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
221 {"601", PROCESSOR_PPC601
,
222 MASK_POWER
| MASK_POWERPC
| MASK_NEW_MNEMONICS
| MASK_MULTIPLE
| MASK_STRING
,
223 MASK_POWER2
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
224 {"602", PROCESSOR_PPC603
,
225 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
226 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
227 {"603", PROCESSOR_PPC603
,
228 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
229 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
230 {"603e", PROCESSOR_PPC603
,
231 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
232 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
233 {"ec603e", PROCESSOR_PPC603
,
234 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
235 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
236 {"604", PROCESSOR_PPC604
,
237 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
238 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
239 {"604e", PROCESSOR_PPC604e
,
240 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
241 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
242 {"620", PROCESSOR_PPC620
,
243 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
244 POWER_MASKS
| MASK_PPC_GPOPT
},
245 {"630", PROCESSOR_PPC630
,
246 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
247 POWER_MASKS
| MASK_PPC_GPOPT
},
248 {"740", PROCESSOR_PPC750
,
249 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
250 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
251 {"750", PROCESSOR_PPC750
,
252 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
253 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
254 {"801", PROCESSOR_MPCCORE
,
255 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
256 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
257 {"821", PROCESSOR_MPCCORE
,
258 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
259 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
260 {"823", PROCESSOR_MPCCORE
,
261 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
262 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
263 {"860", PROCESSOR_MPCCORE
,
264 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
265 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
}};
267 size_t ptt_size
= sizeof (processor_target_table
) / sizeof (struct ptt
);
269 int multiple
= TARGET_MULTIPLE
; /* save current -mmultiple/-mno-multiple status */
270 int string
= TARGET_STRING
; /* save current -mstring/-mno-string status */
272 profile_block_flag
= 0;
274 /* Identify the processor type */
275 rs6000_select
[0].string
= default_cpu
;
276 rs6000_cpu
= TARGET_POWERPC64
? PROCESSOR_DEFAULT64
: PROCESSOR_DEFAULT
;
278 for (i
= 0; i
< sizeof (rs6000_select
) / sizeof (rs6000_select
[0]); i
++)
280 ptr
= &rs6000_select
[i
];
281 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
283 for (j
= 0; j
< ptt_size
; j
++)
284 if (! strcmp (ptr
->string
, processor_target_table
[j
].name
))
287 rs6000_cpu
= processor_target_table
[j
].processor
;
291 target_flags
|= processor_target_table
[j
].target_enable
;
292 target_flags
&= ~processor_target_table
[j
].target_disable
;
298 error ("bad value (%s) for %s switch", ptr
->string
, ptr
->name
);
302 /* If we are optimizing big endian systems for space, use the
303 store multiple instructions. */
304 if (BYTES_BIG_ENDIAN
&& optimize_size
)
305 target_flags
|= MASK_MULTIPLE
;
307 /* If -mmultiple or -mno-multiple was explicitly used, don't
308 override with the processor default */
309 if (TARGET_MULTIPLE_SET
)
310 target_flags
= (target_flags
& ~MASK_MULTIPLE
) | multiple
;
312 /* If -mstring or -mno-string was explicitly used, don't
313 override with the processor default */
314 if (TARGET_STRING_SET
)
315 target_flags
= (target_flags
& ~MASK_STRING
) | string
;
317 /* Don't allow -mmultiple or -mstring on little endian systems unless the cpu
318 is a 750, because the hardware doesn't support the instructions used in
319 little endian mode, and causes an alignment trap. The 750 does not cause
320 an alignment trap (except when the target is unaligned). */
322 if (! BYTES_BIG_ENDIAN
&& rs6000_cpu
!= PROCESSOR_PPC750
)
326 target_flags
&= ~MASK_MULTIPLE
;
327 if (TARGET_MULTIPLE_SET
)
328 warning ("-mmultiple is not supported on little endian systems");
333 target_flags
&= ~MASK_STRING
;
334 if (TARGET_STRING_SET
)
335 warning ("-mstring is not supported on little endian systems");
339 if (flag_pic
&& (DEFAULT_ABI
== ABI_AIX
))
341 warning ("-f%s ignored for AIX (all code is position independent)",
342 (flag_pic
> 1) ? "PIC" : "pic");
346 /* Set debug flags */
347 if (rs6000_debug_name
)
349 if (! strcmp (rs6000_debug_name
, "all"))
350 rs6000_debug_stack
= rs6000_debug_arg
= 1;
351 else if (! strcmp (rs6000_debug_name
, "stack"))
352 rs6000_debug_stack
= 1;
353 else if (! strcmp (rs6000_debug_name
, "arg"))
354 rs6000_debug_arg
= 1;
356 error ("Unknown -mdebug-%s switch", rs6000_debug_name
);
359 #ifdef TARGET_REGNAMES
360 /* If the user desires alternate register names, copy in the alternate names
363 bcopy ((char *)alt_reg_names
, (char *)rs6000_reg_names
,
364 sizeof (rs6000_reg_names
));
367 #ifdef SUBTARGET_OVERRIDE_OPTIONS
368 SUBTARGET_OVERRIDE_OPTIONS
;
371 /* Register global variables with the garbage collector. */
372 rs6000_add_gc_roots ();
376 optimization_options (level
, size
)
378 int size ATTRIBUTE_UNUSED
;
380 #ifdef HAVE_decrement_and_branch_on_count
381 /* When optimizing, enable use of BCT instruction. */
383 flag_branch_on_count_reg
= 1;
387 /* Do anything needed at the start of the asm file. */
390 rs6000_file_start (file
, default_cpu
)
392 const char *default_cpu
;
396 const char *start
= buffer
;
397 struct rs6000_cpu_select
*ptr
;
399 if (flag_verbose_asm
)
401 sprintf (buffer
, "\n%s rs6000/powerpc options:", ASM_COMMENT_START
);
402 rs6000_select
[0].string
= default_cpu
;
404 for (i
= 0; i
< sizeof (rs6000_select
) / sizeof (rs6000_select
[0]); i
++)
406 ptr
= &rs6000_select
[i
];
407 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
409 fprintf (file
, "%s %s%s", start
, ptr
->name
, ptr
->string
);
415 switch (rs6000_sdata
)
417 case SDATA_NONE
: fprintf (file
, "%s -msdata=none", start
); start
= ""; break;
418 case SDATA_DATA
: fprintf (file
, "%s -msdata=data", start
); start
= ""; break;
419 case SDATA_SYSV
: fprintf (file
, "%s -msdata=sysv", start
); start
= ""; break;
420 case SDATA_EABI
: fprintf (file
, "%s -msdata=eabi", start
); start
= ""; break;
423 if (rs6000_sdata
&& g_switch_value
)
425 fprintf (file
, "%s -G %d", start
, g_switch_value
);
436 /* Create a CONST_DOUBLE from a string. */
439 rs6000_float_const (string
, mode
)
441 enum machine_mode mode
;
443 REAL_VALUE_TYPE value
= REAL_VALUE_ATOF (string
, mode
);
444 return immed_real_const_1 (value
, mode
);
447 /* Return non-zero if this function is known to have a null epilogue. */
452 if (reload_completed
)
454 rs6000_stack_t
*info
= rs6000_stack_info ();
456 if (info
->first_gp_reg_save
== 32
457 && info
->first_fp_reg_save
== 64
467 /* Returns 1 always. */
470 any_operand (op
, mode
)
471 register rtx op ATTRIBUTE_UNUSED
;
472 enum machine_mode mode ATTRIBUTE_UNUSED
;
477 /* Returns 1 if op is the count register */
479 count_register_operand(op
, mode
)
481 enum machine_mode mode ATTRIBUTE_UNUSED
;
483 if (GET_CODE (op
) != REG
)
486 if (REGNO (op
) == COUNT_REGISTER_REGNUM
)
489 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
495 /* Returns 1 if op is memory location for float/int conversions that masquerades
498 fpmem_operand(op
, mode
)
500 enum machine_mode mode ATTRIBUTE_UNUSED
;
502 if (GET_CODE (op
) != REG
)
505 if (FPMEM_REGNO_P (REGNO (op
)))
509 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
516 /* Return 1 if OP is a constant that can fit in a D field. */
519 short_cint_operand (op
, mode
)
521 enum machine_mode mode ATTRIBUTE_UNUSED
;
523 return (GET_CODE (op
) == CONST_INT
524 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'I'));
527 /* Similar for a unsigned D field. */
530 u_short_cint_operand (op
, mode
)
532 enum machine_mode mode ATTRIBUTE_UNUSED
;
534 return (GET_CODE (op
) == CONST_INT
535 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'K'));
538 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
541 non_short_cint_operand (op
, mode
)
543 enum machine_mode mode ATTRIBUTE_UNUSED
;
545 return (GET_CODE (op
) == CONST_INT
546 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) >= 0x10000);
549 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
553 gpc_reg_operand (op
, mode
)
555 enum machine_mode mode
;
557 return (register_operand (op
, mode
)
558 && (GET_CODE (op
) != REG
559 || (REGNO (op
) >= 67 && !FPMEM_REGNO_P (REGNO (op
)))
560 || REGNO (op
) < 64));
563 /* Returns 1 if OP is either a pseudo-register or a register denoting a
567 cc_reg_operand (op
, mode
)
569 enum machine_mode mode
;
571 return (register_operand (op
, mode
)
572 && (GET_CODE (op
) != REG
573 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
574 || CR_REGNO_P (REGNO (op
))));
577 /* Returns 1 if OP is either a pseudo-register or a register denoting a
578 CR field that isn't CR0. */
581 cc_reg_not_cr0_operand (op
, mode
)
583 enum machine_mode mode
;
585 return (register_operand (op
, mode
)
586 && (GET_CODE (op
) != REG
587 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
588 || CR_REGNO_NOT_CR0_P (REGNO (op
))));
591 /* Returns 1 if OP is either a constant integer valid for a D-field or a
592 non-special register. If a register, it must be in the proper mode unless
596 reg_or_short_operand (op
, mode
)
598 enum machine_mode mode
;
600 return short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
603 /* Similar, except check if the negation of the constant would be valid for
607 reg_or_neg_short_operand (op
, mode
)
609 enum machine_mode mode
;
611 if (GET_CODE (op
) == CONST_INT
)
612 return CONST_OK_FOR_LETTER_P (INTVAL (op
), 'P');
614 return gpc_reg_operand (op
, mode
);
617 /* Return 1 if the operand is either a register or an integer whose high-order
621 reg_or_u_short_operand (op
, mode
)
623 enum machine_mode mode
;
625 return u_short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
628 /* Return 1 is the operand is either a non-special register or ANY
632 reg_or_cint_operand (op
, mode
)
634 enum machine_mode mode
;
636 return (GET_CODE (op
) == CONST_INT
637 || gpc_reg_operand (op
, mode
));
640 /* Return 1 if the operand is an operand that can be loaded via the GOT */
643 got_operand (op
, mode
)
645 enum machine_mode mode ATTRIBUTE_UNUSED
;
647 return (GET_CODE (op
) == SYMBOL_REF
648 || GET_CODE (op
) == CONST
649 || GET_CODE (op
) == LABEL_REF
);
652 /* Return 1 if the operand is a simple references that can be loaded via
653 the GOT (labels involving addition aren't allowed). */
656 got_no_const_operand (op
, mode
)
658 enum machine_mode mode ATTRIBUTE_UNUSED
;
660 return (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
);
663 /* Return the number of instructions it takes to form a constant in an
667 num_insns_constant_wide (value
)
670 /* signed constant loadable with {cal|addi} */
671 if (CONST_OK_FOR_LETTER_P (value
, 'I'))
674 /* constant loadable with {cau|addis} */
675 else if (CONST_OK_FOR_LETTER_P (value
, 'L'))
678 #if HOST_BITS_PER_WIDE_INT == 64
679 else if (TARGET_64BIT
)
681 HOST_WIDE_INT low
= value
& 0xffffffff;
682 HOST_WIDE_INT high
= value
>> 32;
684 if (high
== 0 && (low
& 0x80000000) == 0)
687 else if (high
== 0xffffffff && (low
& 0x80000000) != 0)
691 return num_insns_constant_wide (high
) + 1;
694 return (num_insns_constant_wide (high
)
695 + num_insns_constant_wide (low
) + 1);
704 num_insns_constant (op
, mode
)
706 enum machine_mode mode
;
708 if (GET_CODE (op
) == CONST_INT
)
709 return num_insns_constant_wide (INTVAL (op
));
711 else if (GET_CODE (op
) == CONST_DOUBLE
&& mode
== SFmode
)
716 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
717 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
718 return num_insns_constant_wide ((HOST_WIDE_INT
)l
);
721 else if (GET_CODE (op
) == CONST_DOUBLE
)
727 int endian
= (WORDS_BIG_ENDIAN
== 0);
729 if (mode
== VOIDmode
|| mode
== DImode
)
731 high
= CONST_DOUBLE_HIGH (op
);
732 low
= CONST_DOUBLE_LOW (op
);
736 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
737 REAL_VALUE_TO_TARGET_DOUBLE (rv
, l
);
743 return (num_insns_constant_wide (low
)
744 + num_insns_constant_wide (high
));
748 if (high
== 0 && (low
& 0x80000000) == 0)
749 return num_insns_constant_wide (low
);
751 else if (((high
& 0xffffffff) == 0xffffffff)
752 && ((low
& 0x80000000) != 0))
753 return num_insns_constant_wide (low
);
755 else if (mask64_operand (op
, mode
))
759 return num_insns_constant_wide (high
) + 1;
762 return (num_insns_constant_wide (high
)
763 + num_insns_constant_wide (low
) + 1);
771 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
772 with one instruction per word. We only do this if we can safely read
773 CONST_DOUBLE_{LOW,HIGH}. */
776 easy_fp_constant (op
, mode
)
778 register enum machine_mode mode
;
780 if (GET_CODE (op
) != CONST_DOUBLE
781 || GET_MODE (op
) != mode
782 || (GET_MODE_CLASS (mode
) != MODE_FLOAT
&& mode
!= DImode
))
785 /* Consider all constants with -msoft-float to be easy */
786 if (TARGET_SOFT_FLOAT
&& mode
!= DImode
)
789 /* If we are using V.4 style PIC, consider all constants to be hard */
790 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
793 #ifdef TARGET_RELOCATABLE
794 /* Similarly if we are using -mrelocatable, consider all constants to be hard */
795 if (TARGET_RELOCATABLE
)
804 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
805 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
807 return (num_insns_constant_wide ((HOST_WIDE_INT
)k
[0]) == 1
808 && num_insns_constant_wide ((HOST_WIDE_INT
)k
[1]) == 1);
811 else if (mode
== SFmode
)
816 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
817 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
819 return num_insns_constant_wide (l
) == 1;
822 else if (mode
== DImode
)
823 return ((TARGET_64BIT
824 && GET_CODE (op
) == CONST_DOUBLE
&& CONST_DOUBLE_LOW (op
) == 0)
825 || (num_insns_constant (op
, DImode
) <= 2));
831 /* Return 1 if the operand is in volatile memory. Note that during the
832 RTL generation phase, memory_operand does not return TRUE for
833 volatile memory references. So this function allows us to
834 recognize volatile references where its safe. */
837 volatile_mem_operand (op
, mode
)
839 enum machine_mode mode
;
841 if (GET_CODE (op
) != MEM
)
844 if (!MEM_VOLATILE_P (op
))
847 if (mode
!= GET_MODE (op
))
850 if (reload_completed
)
851 return memory_operand (op
, mode
);
853 if (reload_in_progress
)
854 return strict_memory_address_p (mode
, XEXP (op
, 0));
856 return memory_address_p (mode
, XEXP (op
, 0));
859 /* Return 1 if the operand is an offsettable memory operand. */
862 offsettable_mem_operand (op
, mode
)
864 enum machine_mode mode
;
866 return ((GET_CODE (op
) == MEM
)
867 && offsettable_address_p (reload_completed
|| reload_in_progress
,
868 mode
, XEXP (op
, 0)));
871 /* Return 1 if the operand is either an easy FP constant (see above) or
875 mem_or_easy_const_operand (op
, mode
)
877 enum machine_mode mode
;
879 return memory_operand (op
, mode
) || easy_fp_constant (op
, mode
);
882 /* Return 1 if the operand is either a non-special register or an item
883 that can be used as the operand of a `mode' add insn. */
886 add_operand (op
, mode
)
888 enum machine_mode mode
;
890 return (reg_or_short_operand (op
, mode
)
891 || (GET_CODE (op
) == CONST_INT
892 && CONST_OK_FOR_LETTER_P (INTVAL(op
), 'L')));
895 /* Return 1 if OP is a constant but not a valid add_operand. */
898 non_add_cint_operand (op
, mode
)
900 enum machine_mode mode ATTRIBUTE_UNUSED
;
902 return (GET_CODE (op
) == CONST_INT
903 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) >= 0x10000
904 && ! CONST_OK_FOR_LETTER_P (INTVAL(op
), 'L'));
907 /* Return 1 if the operand is a non-special register or a constant that
908 can be used as the operand of an OR or XOR insn on the RS/6000. */
911 logical_operand (op
, mode
)
913 enum machine_mode mode
;
915 return (gpc_reg_operand (op
, mode
)
916 || (GET_CODE (op
) == CONST_INT
917 && ((INTVAL (op
) & GET_MODE_MASK (mode
)
918 & (~ (HOST_WIDE_INT
) 0xffff)) == 0
919 || (INTVAL (op
) & GET_MODE_MASK (mode
)
920 & (~ (HOST_WIDE_INT
) 0xffff0000)) == 0)));
923 /* Return 1 if C is a constant that is not a logical operand (as
927 non_logical_cint_operand (op
, mode
)
929 enum machine_mode mode
;
931 return (GET_CODE (op
) == CONST_INT
932 && (INTVAL (op
) & GET_MODE_MASK (mode
) &
933 (~ (HOST_WIDE_INT
) 0xffff)) != 0
934 && (INTVAL (op
) & GET_MODE_MASK (mode
) &
935 (~ (HOST_WIDE_INT
) 0xffff0000)) != 0);
938 /* Return 1 if C is a constant that can be encoded in a 32-bit mask on the
939 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
940 Reject all ones and all zeros, since these should have been optimized
941 away and confuse the making of MB and ME. */
944 mask_operand (op
, mode
)
946 enum machine_mode mode ATTRIBUTE_UNUSED
;
953 if (GET_CODE (op
) != CONST_INT
)
958 if (c
== 0 || c
== ~0)
961 last_bit_value
= c
& 1;
963 for (i
= 1; i
< 32; i
++)
964 if (((c
>>= 1) & 1) != last_bit_value
)
965 last_bit_value
^= 1, transitions
++;
967 return transitions
<= 2;
970 /* Return 1 if the operand is a constant that is a PowerPC64 mask.
971 It is if there are no more than one 1->0 or 0->1 transitions.
972 Reject all ones and all zeros, since these should have been optimized
973 away and confuse the making of MB and ME. */
976 mask64_operand (op
, mode
)
978 enum machine_mode mode
;
980 if (GET_CODE (op
) == CONST_INT
)
982 HOST_WIDE_INT c
= INTVAL (op
);
987 if (c
== 0 || c
== ~0)
990 last_bit_value
= c
& 1;
992 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
993 if (((c
>>= 1) & 1) != last_bit_value
)
994 last_bit_value
^= 1, transitions
++;
996 #if HOST_BITS_PER_WIDE_INT == 32
997 /* Consider CONST_INT sign-extended. */
998 transitions
+= (last_bit_value
!= 1);
1001 return transitions
<= 1;
1003 else if (GET_CODE (op
) == CONST_DOUBLE
1004 && (mode
== VOIDmode
|| mode
== DImode
))
1006 HOST_WIDE_INT low
= CONST_DOUBLE_LOW (op
);
1007 #if HOST_BITS_PER_WIDE_INT == 32
1008 HOST_WIDE_INT high
= CONST_DOUBLE_HIGH (op
);
1012 int transitions
= 0;
1015 #if HOST_BITS_PER_WIDE_INT == 32
1020 #if HOST_BITS_PER_WIDE_INT == 32
1026 last_bit_value
= low
& 1;
1028 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1029 if (((low
>>= 1) & 1) != last_bit_value
)
1030 last_bit_value
^= 1, transitions
++;
1032 #if HOST_BITS_PER_WIDE_INT == 32
1033 if ((high
& 1) != last_bit_value
)
1034 last_bit_value
^= 1, transitions
++;
1036 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1037 if (((high
>>= 1) & 1) != last_bit_value
)
1038 last_bit_value
^= 1, transitions
++;
1041 return transitions
<= 1;
1047 /* Return 1 if the operand is either a non-special register or a constant
1048 that can be used as the operand of a PowerPC64 logical AND insn. */
1051 and64_operand (op
, mode
)
1053 enum machine_mode mode
;
1055 if (fixed_regs
[68]) /* CR0 not available, don't do andi./andis. */
1056 return (gpc_reg_operand (op
, mode
) || mask64_operand (op
, mode
));
1058 return (logical_operand (op
, mode
) || mask64_operand (op
, mode
));
1061 /* Return 1 if the operand is either a non-special register or a
1062 constant that can be used as the operand of an RS/6000 logical AND insn. */
1065 and_operand (op
, mode
)
1067 enum machine_mode mode
;
1069 if (fixed_regs
[68]) /* CR0 not available, don't do andi./andis. */
1070 return (gpc_reg_operand (op
, mode
) || mask_operand (op
, mode
));
1072 return (logical_operand (op
, mode
) || mask_operand (op
, mode
));
1075 /* Return 1 if the operand is a general register or memory operand. */
1078 reg_or_mem_operand (op
, mode
)
1080 register enum machine_mode mode
;
1082 return (gpc_reg_operand (op
, mode
)
1083 || memory_operand (op
, mode
)
1084 || volatile_mem_operand (op
, mode
));
1087 /* Return 1 if the operand is a general register or memory operand without
1088 pre_inc or pre_dec which produces invalid form of PowerPC lwa
1092 lwa_operand (op
, mode
)
1094 register enum machine_mode mode
;
1098 if (reload_completed
&& GET_CODE (inner
) == SUBREG
)
1099 inner
= SUBREG_REG (inner
);
1101 return gpc_reg_operand (inner
, mode
)
1102 || (memory_operand (inner
, mode
)
1103 && GET_CODE (XEXP (inner
, 0)) != PRE_INC
1104 && GET_CODE (XEXP (inner
, 0)) != PRE_DEC
);
1107 /* Return 1 if the operand, used inside a MEM, is a valid first argument
1108 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
1112 call_operand (op
, mode
)
1114 enum machine_mode mode
;
1116 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
1119 return (GET_CODE (op
) == SYMBOL_REF
1120 || (GET_CODE (op
) == REG
&& REGNO (op
) >= FIRST_PSEUDO_REGISTER
));
1124 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
1125 this file and the function is not weakly defined. */
1128 current_file_function_operand (op
, mode
)
1130 enum machine_mode mode ATTRIBUTE_UNUSED
;
1132 return (GET_CODE (op
) == SYMBOL_REF
1133 && (SYMBOL_REF_FLAG (op
)
1134 || (op
== XEXP (DECL_RTL (current_function_decl
), 0)
1135 && !DECL_WEAK (current_function_decl
))));
1139 /* Return 1 if this operand is a valid input for a move insn. */
1142 input_operand (op
, mode
)
1144 enum machine_mode mode
;
1146 /* Memory is always valid. */
1147 if (memory_operand (op
, mode
))
1150 /* Only a tiny bit of handling for CONSTANT_P_RTX is necessary. */
1151 if (GET_CODE (op
) == CONSTANT_P_RTX
)
1154 /* For floating-point, easy constants are valid. */
1155 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1157 && easy_fp_constant (op
, mode
))
1160 /* Allow any integer constant. */
1161 if (GET_MODE_CLASS (mode
) == MODE_INT
1162 && (GET_CODE (op
) == CONST_INT
1163 || GET_CODE (op
) == CONST_DOUBLE
))
1166 /* For floating-point or multi-word mode, the only remaining valid type
1168 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1169 || GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
1170 return register_operand (op
, mode
);
1172 /* The only cases left are integral modes one word or smaller (we
1173 do not get called for MODE_CC values). These can be in any
1175 if (register_operand (op
, mode
))
1178 /* A SYMBOL_REF referring to the TOC is valid. */
1179 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op
))
1182 /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC
1183 directly in the instruction stream */
1184 if (DEFAULT_ABI
== ABI_NT
1185 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
))
1188 /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region
1190 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1191 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == CONST
)
1192 && small_data_operand (op
, Pmode
))
1198 /* Return 1 for an operand in small memory on V.4/eabi */
1201 small_data_operand (op
, mode
)
1202 rtx op ATTRIBUTE_UNUSED
;
1203 enum machine_mode mode ATTRIBUTE_UNUSED
;
1208 if (rs6000_sdata
== SDATA_NONE
|| rs6000_sdata
== SDATA_DATA
)
1211 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1214 if (GET_CODE (op
) == SYMBOL_REF
)
1217 else if (GET_CODE (op
) != CONST
1218 || GET_CODE (XEXP (op
, 0)) != PLUS
1219 || GET_CODE (XEXP (XEXP (op
, 0), 0)) != SYMBOL_REF
1220 || GET_CODE (XEXP (XEXP (op
, 0), 1)) != CONST_INT
)
1225 rtx sum
= XEXP (op
, 0);
1226 HOST_WIDE_INT summand
;
1228 /* We have to be careful here, because it is the referenced address
1229 that must be 32k from _SDA_BASE_, not just the symbol. */
1230 summand
= INTVAL (XEXP (sum
, 1));
1231 if (summand
< 0 || summand
> g_switch_value
)
1234 sym_ref
= XEXP (sum
, 0);
1237 if (*XSTR (sym_ref
, 0) != '@')
1248 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1249 for a call to a function whose data type is FNTYPE.
1250 For a library call, FNTYPE is 0.
1252 For incoming args we set the number of arguments in the prototype large
1253 so we never return a PARALLEL. */
1256 init_cumulative_args (cum
, fntype
, libname
, incoming
)
1257 CUMULATIVE_ARGS
*cum
;
1259 rtx libname ATTRIBUTE_UNUSED
;
1262 static CUMULATIVE_ARGS zero_cumulative
;
1263 enum rs6000_abi abi
= DEFAULT_ABI
;
1265 *cum
= zero_cumulative
;
1267 cum
->fregno
= FP_ARG_MIN_REG
;
1268 cum
->prototype
= (fntype
&& TYPE_ARG_TYPES (fntype
));
1269 cum
->call_cookie
= CALL_NORMAL
;
1270 cum
->sysv_gregno
= GP_ARG_MIN_REG
;
1273 cum
->nargs_prototype
= 1000; /* don't return a PARALLEL */
1275 else if (cum
->prototype
)
1276 cum
->nargs_prototype
= (list_length (TYPE_ARG_TYPES (fntype
)) - 1
1277 + (TYPE_MODE (TREE_TYPE (fntype
)) == BLKmode
1278 || RETURN_IN_MEMORY (TREE_TYPE (fntype
))));
1281 cum
->nargs_prototype
= 0;
1283 cum
->orig_nargs
= cum
->nargs_prototype
;
1285 /* Check for DLL import functions */
1288 && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype
)))
1289 cum
->call_cookie
= CALL_NT_DLLIMPORT
;
1291 /* Also check for longcall's */
1292 else if (fntype
&& lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype
)))
1293 cum
->call_cookie
= CALL_LONG
;
1295 if (TARGET_DEBUG_ARG
)
1297 fprintf (stderr
, "\ninit_cumulative_args:");
1300 tree ret_type
= TREE_TYPE (fntype
);
1301 fprintf (stderr
, " ret code = %s,",
1302 tree_code_name
[ (int)TREE_CODE (ret_type
) ]);
1305 if (cum
->call_cookie
& CALL_NT_DLLIMPORT
)
1306 fprintf (stderr
, " dllimport,");
1308 if (cum
->call_cookie
& CALL_LONG
)
1309 fprintf (stderr
, " longcall,");
1311 fprintf (stderr
, " proto = %d, nargs = %d\n",
1312 cum
->prototype
, cum
->nargs_prototype
);
1316 /* If defined, a C expression which determines whether, and in which
1317 direction, to pad out an argument with extra space. The value
1318 should be of type `enum direction': either `upward' to pad above
1319 the argument, `downward' to pad below, or `none' to inhibit
1322 For the AIX ABI structs are always stored left shifted in their
1326 function_arg_padding (mode
, type
)
1327 enum machine_mode mode
;
1330 if (type
!= 0 && AGGREGATE_TYPE_P (type
))
1333 /* This is the default definition. */
1334 return (! BYTES_BIG_ENDIAN
1337 ? (type
&& TREE_CODE (TYPE_SIZE (type
)) == INTEGER_CST
1338 && int_size_in_bytes (type
) < (PARM_BOUNDARY
/ BITS_PER_UNIT
))
1339 : GET_MODE_BITSIZE (mode
) < PARM_BOUNDARY
)
1340 ? (int)downward
: (int)upward
));
1343 /* If defined, a C expression that gives the alignment boundary, in bits,
1344 of an argument with the specified mode and type. If it is not defined,
1345 PARM_BOUNDARY is used for all arguments.
1347 Windows NT wants anything >= 8 bytes to be double word aligned.
1349 V.4 wants long longs to be double word aligned. */
1352 function_arg_boundary (mode
, type
)
1353 enum machine_mode mode
;
1356 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1357 && (mode
== DImode
|| mode
== DFmode
))
1360 if (DEFAULT_ABI
!= ABI_NT
|| TARGET_64BIT
)
1361 return PARM_BOUNDARY
;
1363 if (mode
!= BLKmode
)
1364 return (GET_MODE_SIZE (mode
)) >= 8 ? 64 : 32;
1366 return (int_size_in_bytes (type
) >= 8) ? 64 : 32;
1369 /* Update the data in CUM to advance over an argument
1370 of mode MODE and data type TYPE.
1371 (TYPE is null for libcalls where that information may not be available.) */
1374 function_arg_advance (cum
, mode
, type
, named
)
1375 CUMULATIVE_ARGS
*cum
;
1376 enum machine_mode mode
;
1380 cum
->nargs_prototype
--;
1382 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1384 if (TARGET_HARD_FLOAT
1385 && (mode
== SFmode
|| mode
== DFmode
))
1387 if (cum
->fregno
<= FP_ARG_V4_MAX_REG
)
1392 cum
->words
+= cum
->words
& 1;
1393 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, 1);
1399 int gregno
= cum
->sysv_gregno
;
1401 /* Aggregates and IEEE quad get passed by reference. */
1402 if ((type
&& AGGREGATE_TYPE_P (type
))
1406 n_words
= RS6000_ARG_SIZE (mode
, type
, 1);
1408 /* Long long is put in odd registers. */
1409 if (n_words
== 2 && (gregno
& 1) == 0)
1412 /* Long long is not split between registers and stack. */
1413 if (gregno
+ n_words
- 1 > GP_ARG_MAX_REG
)
1415 /* Long long is aligned on the stack. */
1417 cum
->words
+= cum
->words
& 1;
1418 cum
->words
+= n_words
;
1421 /* Note: continuing to accumulate gregno past when we've started
1422 spilling to the stack indicates the fact that we've started
1423 spilling to the stack to expand_builtin_saveregs. */
1424 cum
->sysv_gregno
= gregno
+ n_words
;
1427 if (TARGET_DEBUG_ARG
)
1429 fprintf (stderr
, "function_adv: words = %2d, fregno = %2d, ",
1430 cum
->words
, cum
->fregno
);
1431 fprintf (stderr
, "gregno = %2d, nargs = %4d, proto = %d, ",
1432 cum
->sysv_gregno
, cum
->nargs_prototype
, cum
->prototype
);
1433 fprintf (stderr
, "mode = %4s, named = %d\n",
1434 GET_MODE_NAME (mode
), named
);
1439 int align
= (TARGET_32BIT
&& (cum
->words
& 1) != 0
1440 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
1441 cum
->words
+= align
;
1445 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, named
);
1446 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& TARGET_HARD_FLOAT
)
1450 if (TARGET_DEBUG_ARG
)
1452 fprintf (stderr
, "function_adv: words = %2d, fregno = %2d, ",
1453 cum
->words
, cum
->fregno
);
1454 fprintf (stderr
, "nargs = %4d, proto = %d, mode = %4s, ",
1455 cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
));
1456 fprintf (stderr
, "named = %d, align = %d\n", named
, align
);
1461 /* Determine where to put an argument to a function.
1462 Value is zero to push the argument on the stack,
1463 or a hard register in which to store the argument.
1465 MODE is the argument's machine mode.
1466 TYPE is the data type of the argument (as a tree).
1467 This is null for libcalls where that information may
1469 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1470 the preceding args and about the function being called.
1471 NAMED is nonzero if this argument is a named parameter
1472 (otherwise it is an extra parameter matching an ellipsis).
1474 On RS/6000 the first eight words of non-FP are normally in registers
1475 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
1476 Under V.4, the first 8 FP args are in registers.
1478 If this is floating-point and no prototype is specified, we use
1479 both an FP and integer register (or possibly FP reg and stack). Library
1480 functions (when TYPE is zero) always have the proper types for args,
1481 so we can pass the FP value just in one register. emit_library_function
1482 doesn't support PARALLEL anyway. */
1485 function_arg (cum
, mode
, type
, named
)
1486 CUMULATIVE_ARGS
*cum
;
1487 enum machine_mode mode
;
1491 enum rs6000_abi abi
= DEFAULT_ABI
;
1493 /* Return a marker to indicate whether CR1 needs to set or clear the bit
1494 that V.4 uses to say fp args were passed in registers. Assume that we
1495 don't need the marker for software floating point, or compiler generated
1497 if (mode
== VOIDmode
)
1499 if ((abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
1500 && TARGET_HARD_FLOAT
1501 && cum
->nargs_prototype
< 0
1502 && type
&& (cum
->prototype
|| TARGET_NO_PROTOTYPE
))
1504 return GEN_INT (cum
->call_cookie
1505 | ((cum
->fregno
== FP_ARG_MIN_REG
)
1506 ? CALL_V4_SET_FP_ARGS
1507 : CALL_V4_CLEAR_FP_ARGS
));
1510 return GEN_INT (cum
->call_cookie
);
1513 if (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
1515 if (TARGET_HARD_FLOAT
1516 && (mode
== SFmode
|| mode
== DFmode
))
1518 if (cum
->fregno
<= FP_ARG_V4_MAX_REG
)
1519 return gen_rtx_REG (mode
, cum
->fregno
);
1526 int gregno
= cum
->sysv_gregno
;
1528 /* Aggregates and IEEE quad get passed by reference. */
1529 if ((type
&& AGGREGATE_TYPE_P (type
))
1533 n_words
= RS6000_ARG_SIZE (mode
, type
, 1);
1535 /* Long long is put in odd registers. */
1536 if (n_words
== 2 && (gregno
& 1) == 0)
1539 /* Long long is not split between registers and stack. */
1540 if (gregno
+ n_words
- 1 <= GP_ARG_MAX_REG
)
1541 return gen_rtx_REG (mode
, gregno
);
1548 int align
= (TARGET_32BIT
&& (cum
->words
& 1) != 0
1549 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
1550 int align_words
= cum
->words
+ align
;
1555 if (type
&& TREE_CODE (TYPE_SIZE (type
)) != INTEGER_CST
)
1558 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
1561 || ((cum
->nargs_prototype
> 0)
1562 /* IBM AIX extended its linkage convention definition always
1563 to require FP args after register save area hole on the
1565 && (DEFAULT_ABI
!= ABI_AIX
1567 || (align_words
< GP_ARG_NUM_REG
))))
1568 return gen_rtx_REG (mode
, cum
->fregno
);
1570 return gen_rtx_PARALLEL (mode
,
1572 gen_rtx_EXPR_LIST (VOIDmode
,
1573 ((align_words
>= GP_ARG_NUM_REG
)
1576 + RS6000_ARG_SIZE (mode
, type
, named
)
1578 /* If this is partially on the stack, then
1579 we only include the portion actually
1580 in registers here. */
1581 ? gen_rtx_REG (SImode
,
1582 GP_ARG_MIN_REG
+ align_words
)
1583 : gen_rtx_REG (mode
,
1584 GP_ARG_MIN_REG
+ align_words
))),
1586 gen_rtx_EXPR_LIST (VOIDmode
,
1587 gen_rtx_REG (mode
, cum
->fregno
),
1590 else if (align_words
< GP_ARG_NUM_REG
)
1591 return gen_rtx_REG (mode
, GP_ARG_MIN_REG
+ align_words
);
1597 /* For an arg passed partly in registers and partly in memory,
1598 this is the number of registers used.
1599 For args passed entirely in registers or entirely in memory, zero. */
1602 function_arg_partial_nregs (cum
, mode
, type
, named
)
1603 CUMULATIVE_ARGS
*cum
;
1604 enum machine_mode mode
;
1611 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1614 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
1616 if (cum
->nargs_prototype
>= 0)
1620 if (cum
->words
< GP_ARG_NUM_REG
1621 && GP_ARG_NUM_REG
< (cum
->words
+ RS6000_ARG_SIZE (mode
, type
, named
)))
1623 int ret
= GP_ARG_NUM_REG
- cum
->words
;
1624 if (ret
&& TARGET_DEBUG_ARG
)
1625 fprintf (stderr
, "function_arg_partial_nregs: %d\n", ret
);
1633 /* A C expression that indicates when an argument must be passed by
1634 reference. If nonzero for an argument, a copy of that argument is
1635 made in memory and a pointer to the argument is passed instead of
1636 the argument itself. The pointer is passed in whatever way is
1637 appropriate for passing a pointer to that type.
1639 Under V.4, structures and unions are passed by reference. */
1642 function_arg_pass_by_reference (cum
, mode
, type
, named
)
1643 CUMULATIVE_ARGS
*cum ATTRIBUTE_UNUSED
;
1644 enum machine_mode mode ATTRIBUTE_UNUSED
;
1646 int named ATTRIBUTE_UNUSED
;
1648 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1649 && ((type
&& AGGREGATE_TYPE_P (type
))
1652 if (TARGET_DEBUG_ARG
)
1653 fprintf (stderr
, "function_arg_pass_by_reference: aggregate\n");
1662 /* Perform any needed actions needed for a function that is receiving a
1663 variable number of arguments.
1667 MODE and TYPE are the mode and type of the current parameter.
1669 PRETEND_SIZE is a variable that should be set to the amount of stack
1670 that must be pushed by the prolog to pretend that our caller pushed
1673 Normally, this macro will push all remaining incoming registers on the
1674 stack and set PRETEND_SIZE to the length of the registers pushed. */
1677 setup_incoming_varargs (cum
, mode
, type
, pretend_size
, no_rtl
)
1678 CUMULATIVE_ARGS
*cum
;
1679 enum machine_mode mode
;
1685 CUMULATIVE_ARGS next_cum
;
1686 int reg_size
= TARGET_32BIT
? 4 : 8;
1688 int first_reg_offset
, set
;
1690 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1695 fntype
= TREE_TYPE (current_function_decl
);
1696 stdarg_p
= (TYPE_ARG_TYPES (fntype
) != 0
1697 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype
)))
1698 != void_type_node
));
1700 /* For varargs, we do not want to skip the dummy va_dcl argument.
1701 For stdargs, we do want to skip the last named argument. */
1704 function_arg_advance (&next_cum
, mode
, type
, 1);
1706 /* Indicate to allocate space on the stack for varargs save area. */
1707 /* ??? Does this really have to be located at a magic spot on the
1708 stack, or can we allocate this with assign_stack_local instead. */
1709 rs6000_sysv_varargs_p
= 1;
1711 save_area
= plus_constant (virtual_stack_vars_rtx
,
1712 - RS6000_VARARGS_SIZE
);
1714 first_reg_offset
= next_cum
.sysv_gregno
- GP_ARG_MIN_REG
;
1718 save_area
= virtual_incoming_args_rtx
;
1719 rs6000_sysv_varargs_p
= 0;
1721 first_reg_offset
= cum
->words
;
1722 if (MUST_PASS_IN_STACK (mode
, type
))
1723 first_reg_offset
+= RS6000_ARG_SIZE (TYPE_MODE (type
), type
, 1);
1726 set
= get_varargs_alias_set ();
1727 if (!no_rtl
&& first_reg_offset
< GP_ARG_NUM_REG
)
1729 mem
= gen_rtx_MEM (BLKmode
,
1730 plus_constant (save_area
,
1731 first_reg_offset
* reg_size
)),
1732 MEM_ALIAS_SET (mem
) = set
;
1735 (GP_ARG_MIN_REG
+ first_reg_offset
, mem
,
1736 GP_ARG_NUM_REG
- first_reg_offset
,
1737 (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
);
1739 /* ??? Does ABI_V4 need this at all? */
1740 *pretend_size
= (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
;
1743 /* Save FP registers if needed. */
1744 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1745 && TARGET_HARD_FLOAT
&& !no_rtl
1746 && next_cum
.fregno
<= FP_ARG_V4_MAX_REG
)
1748 int fregno
= next_cum
.fregno
;
1749 rtx cr1
= gen_rtx_REG (CCmode
, 69);
1750 rtx lab
= gen_label_rtx ();
1751 int off
= (GP_ARG_NUM_REG
* reg_size
) + ((fregno
- FP_ARG_MIN_REG
) * 8);
1753 emit_jump_insn (gen_rtx_SET (VOIDmode
,
1755 gen_rtx_IF_THEN_ELSE (VOIDmode
,
1756 gen_rtx_NE (VOIDmode
, cr1
,
1758 gen_rtx_LABEL_REF (VOIDmode
, lab
),
1761 while (fregno
<= FP_ARG_V4_MAX_REG
)
1763 mem
= gen_rtx_MEM (DFmode
, plus_constant (save_area
, off
));
1764 MEM_ALIAS_SET (mem
) = set
;
1765 emit_move_insn (mem
, gen_rtx_REG (DFmode
, fregno
));
1774 /* Create the va_list data type. */
1777 rs6000_build_va_list ()
1779 tree f_gpr
, f_fpr
, f_ovf
, f_sav
, record
;
1780 tree uchar_type_node
;
1782 /* Only SVR4 needs something special. */
1783 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1784 return ptr_type_node
;
1786 record
= make_node (RECORD_TYPE
);
1787 uchar_type_node
= make_unsigned_type (CHAR_TYPE_SIZE
);
1789 f_gpr
= build_decl (FIELD_DECL
, get_identifier ("gpr"), uchar_type_node
);
1790 f_fpr
= build_decl (FIELD_DECL
, get_identifier ("fpr"), uchar_type_node
);
1791 f_ovf
= build_decl (FIELD_DECL
, get_identifier ("overflow_arg_area"),
1793 f_sav
= build_decl (FIELD_DECL
, get_identifier ("reg_save_area"),
1796 DECL_FIELD_CONTEXT (f_gpr
) = record
;
1797 DECL_FIELD_CONTEXT (f_fpr
) = record
;
1798 DECL_FIELD_CONTEXT (f_ovf
) = record
;
1799 DECL_FIELD_CONTEXT (f_sav
) = record
;
1801 TYPE_FIELDS (record
) = f_gpr
;
1802 TREE_CHAIN (f_gpr
) = f_fpr
;
1803 TREE_CHAIN (f_fpr
) = f_ovf
;
1804 TREE_CHAIN (f_ovf
) = f_sav
;
1806 layout_type (record
);
1808 /* The correct type is an array type of one element. */
1809 return build_array_type (record
, build_index_type (size_zero_node
));
1812 /* Implement va_start. */
1815 rs6000_va_start (stdarg_p
, valist
, nextarg
)
1820 HOST_WIDE_INT words
, n_gpr
, n_fpr
;
1821 tree f_gpr
, f_fpr
, f_ovf
, f_sav
;
1822 tree gpr
, fpr
, ovf
, sav
, t
;
1824 /* Only SVR4 needs something special. */
1825 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1827 std_expand_builtin_va_start (stdarg_p
, valist
, nextarg
);
1831 f_gpr
= TYPE_FIELDS (TREE_TYPE (va_list_type_node
));
1832 f_fpr
= TREE_CHAIN (f_gpr
);
1833 f_ovf
= TREE_CHAIN (f_fpr
);
1834 f_sav
= TREE_CHAIN (f_ovf
);
1836 gpr
= build (COMPONENT_REF
, TREE_TYPE (f_gpr
), valist
, f_gpr
);
1837 fpr
= build (COMPONENT_REF
, TREE_TYPE (f_fpr
), valist
, f_fpr
);
1838 ovf
= build (COMPONENT_REF
, TREE_TYPE (f_ovf
), valist
, f_ovf
);
1839 sav
= build (COMPONENT_REF
, TREE_TYPE (f_sav
), valist
, f_sav
);
1841 /* Count number of gp and fp argument registers used. */
1842 words
= current_function_args_info
.words
;
1843 n_gpr
= current_function_args_info
.sysv_gregno
- GP_ARG_MIN_REG
;
1844 n_fpr
= current_function_args_info
.fregno
- FP_ARG_MIN_REG
;
1846 if (TARGET_DEBUG_ARG
)
1847 fprintf (stderr
, "va_start: words = %d, n_gpr = %d, n_fpr = %d\n",
1848 words
, n_gpr
, n_fpr
);
1850 t
= build (MODIFY_EXPR
, TREE_TYPE (gpr
), gpr
, build_int_2 (n_gpr
, 0));
1851 TREE_SIDE_EFFECTS (t
) = 1;
1852 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
1854 t
= build (MODIFY_EXPR
, TREE_TYPE (fpr
), fpr
, build_int_2 (n_fpr
, 0));
1855 TREE_SIDE_EFFECTS (t
) = 1;
1856 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
1858 /* Find the overflow area. */
1859 t
= make_tree (TREE_TYPE (ovf
), virtual_incoming_args_rtx
);
1861 t
= build (PLUS_EXPR
, TREE_TYPE (ovf
), t
,
1862 build_int_2 (words
* UNITS_PER_WORD
, 0));
1863 t
= build (MODIFY_EXPR
, TREE_TYPE (ovf
), ovf
, t
);
1864 TREE_SIDE_EFFECTS (t
) = 1;
1865 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
1867 /* Find the register save area. */
1868 t
= make_tree (TREE_TYPE (sav
), virtual_stack_vars_rtx
);
1869 t
= build (PLUS_EXPR
, TREE_TYPE (sav
), t
,
1870 build_int_2 (-RS6000_VARARGS_SIZE
, -1));
1871 t
= build (MODIFY_EXPR
, TREE_TYPE (sav
), sav
, t
);
1872 TREE_SIDE_EFFECTS (t
) = 1;
1873 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
1876 /* Implement va_arg. */
1879 rs6000_va_arg (valist
, type
)
1882 tree f_gpr
, f_fpr
, f_ovf
, f_sav
;
1883 tree gpr
, fpr
, ovf
, sav
, reg
, t
, u
;
1884 int indirect_p
, size
, rsize
, n_reg
, sav_ofs
, sav_scale
;
1885 rtx lab_false
, lab_over
, addr_rtx
, r
;
1887 /* Only SVR4 needs something special. */
1888 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1889 return std_expand_builtin_va_arg (valist
, type
);
1891 f_gpr
= TYPE_FIELDS (TREE_TYPE (va_list_type_node
));
1892 f_fpr
= TREE_CHAIN (f_gpr
);
1893 f_ovf
= TREE_CHAIN (f_fpr
);
1894 f_sav
= TREE_CHAIN (f_ovf
);
1896 gpr
= build (COMPONENT_REF
, TREE_TYPE (f_gpr
), valist
, f_gpr
);
1897 fpr
= build (COMPONENT_REF
, TREE_TYPE (f_fpr
), valist
, f_fpr
);
1898 ovf
= build (COMPONENT_REF
, TREE_TYPE (f_ovf
), valist
, f_ovf
);
1899 sav
= build (COMPONENT_REF
, TREE_TYPE (f_sav
), valist
, f_sav
);
1901 size
= int_size_in_bytes (type
);
1902 rsize
= (size
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
1904 if (AGGREGATE_TYPE_P (type
) || TYPE_MODE (type
) == TFmode
)
1906 /* Aggregates and long doubles are passed by reference. */
1912 size
= rsize
= UNITS_PER_WORD
;
1914 else if (FLOAT_TYPE_P (type
) && ! TARGET_SOFT_FLOAT
)
1916 /* FP args go in FP registers, if present. */
1925 /* Otherwise into GP registers. */
1934 * Pull the value out of the saved registers ...
1937 lab_false
= gen_label_rtx ();
1938 lab_over
= gen_label_rtx ();
1939 addr_rtx
= gen_reg_rtx (Pmode
);
1941 emit_cmp_and_jump_insns (expand_expr (reg
, NULL_RTX
, QImode
, EXPAND_NORMAL
),
1942 GEN_INT (8 - n_reg
+ 1),
1943 GE
, const1_rtx
, QImode
, 1, 1, lab_false
);
1945 /* Long long is aligned in the registers. */
1948 u
= build (BIT_AND_EXPR
, TREE_TYPE (reg
), reg
,
1949 build_int_2 (n_reg
- 1, 0));
1950 u
= build (PLUS_EXPR
, TREE_TYPE (reg
), reg
, u
);
1951 u
= build (MODIFY_EXPR
, TREE_TYPE (reg
), reg
, u
);
1952 TREE_SIDE_EFFECTS (u
) = 1;
1953 expand_expr (u
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
1957 t
= build (PLUS_EXPR
, ptr_type_node
, sav
, build_int_2 (sav_ofs
, 0));
1961 u
= build (POSTINCREMENT_EXPR
, TREE_TYPE (reg
), reg
, build_int_2 (n_reg
, 0));
1962 TREE_SIDE_EFFECTS (u
) = 1;
1964 u
= build1 (CONVERT_EXPR
, integer_type_node
, u
);
1965 TREE_SIDE_EFFECTS (u
) = 1;
1967 u
= build (MULT_EXPR
, integer_type_node
, u
, build_int_2 (sav_scale
, 0));
1968 TREE_SIDE_EFFECTS (u
) = 1;
1970 t
= build (PLUS_EXPR
, ptr_type_node
, t
, u
);
1971 TREE_SIDE_EFFECTS (t
) = 1;
1973 r
= expand_expr (t
, addr_rtx
, Pmode
, EXPAND_NORMAL
);
1975 emit_move_insn (addr_rtx
, r
);
1977 emit_jump_insn (gen_jump (lab_over
));
1979 emit_label (lab_false
);
1982 * ... otherwise out of the overflow area.
1985 /* Make sure we don't find reg 7 for the next int arg. */
1988 t
= build (MODIFY_EXPR
, TREE_TYPE (reg
), reg
, build_int_2 (8, 0));
1989 TREE_SIDE_EFFECTS (t
) = 1;
1990 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
1993 /* Care for on-stack alignment if needed. */
1998 t
= build (PLUS_EXPR
, TREE_TYPE (ovf
), ovf
, build_int_2 (7, 0));
1999 t
= build (BIT_AND_EXPR
, TREE_TYPE (t
), t
, build_int_2 (-8, -1));
2003 r
= expand_expr (t
, addr_rtx
, Pmode
, EXPAND_NORMAL
);
2005 emit_move_insn (addr_rtx
, r
);
2007 t
= build (PLUS_EXPR
, TREE_TYPE (t
), t
, build_int_2 (size
, 0));
2008 t
= build (MODIFY_EXPR
, TREE_TYPE (ovf
), ovf
, t
);
2009 TREE_SIDE_EFFECTS (t
) = 1;
2010 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2012 emit_label (lab_over
);
2016 r
= gen_rtx_MEM (Pmode
, addr_rtx
);
2017 MEM_ALIAS_SET (r
) = get_varargs_alias_set ();
2018 emit_move_insn (addr_rtx
, r
);
2024 /* Generate a memory reference for expand_block_move, copying volatile,
2025 and other bits from an original memory reference. */
2028 expand_block_move_mem (mode
, addr
, orig_mem
)
2029 enum machine_mode mode
;
2033 rtx mem
= gen_rtx_MEM (mode
, addr
);
2035 RTX_UNCHANGING_P (mem
) = RTX_UNCHANGING_P (orig_mem
);
2036 MEM_COPY_ATTRIBUTES (mem
, orig_mem
);
2037 #ifdef MEM_UNALIGNED_P
2038 MEM_UNALIGNED_P (mem
) = MEM_UNALIGNED_P (orig_mem
);
2043 /* Expand a block move operation, and return 1 if successful. Return 0
2044 if we should let the compiler generate normal code.
2046 operands[0] is the destination
2047 operands[1] is the source
2048 operands[2] is the length
2049 operands[3] is the alignment */
2051 #define MAX_MOVE_REG 4
2054 expand_block_move (operands
)
2057 rtx orig_dest
= operands
[0];
2058 rtx orig_src
= operands
[1];
2059 rtx bytes_rtx
= operands
[2];
2060 rtx align_rtx
= operands
[3];
2061 int constp
= (GET_CODE (bytes_rtx
) == CONST_INT
);
2062 int align
= XINT (align_rtx
, 0);
2072 rtx stores
[MAX_MOVE_REG
];
2075 /* If this is not a fixed size move, just call memcpy */
2079 /* Anything to move? */
2080 bytes
= INTVAL (bytes_rtx
);
2084 /* Don't support real large moves. If string instructions are not used,
2085 then don't generate more than 8 loads. */
2091 else if (!STRICT_ALIGNMENT
)
2096 else if (bytes
> 8*align
)
2099 /* Move the address into scratch registers. */
2100 dest_reg
= copy_addr_to_reg (XEXP (orig_dest
, 0));
2101 src_reg
= copy_addr_to_reg (XEXP (orig_src
, 0));
2103 if (TARGET_STRING
) /* string instructions are available */
2105 for ( ; bytes
> 0; bytes
-= move_bytes
)
2107 if (bytes
> 24 /* move up to 32 bytes at a time */
2117 move_bytes
= (bytes
> 32) ? 32 : bytes
;
2118 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
2119 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
2120 GEN_INT ((move_bytes
== 32) ? 0 : move_bytes
),
2123 else if (bytes
> 16 /* move up to 24 bytes at a time */
2131 move_bytes
= (bytes
> 24) ? 24 : bytes
;
2132 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
2133 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
2134 GEN_INT (move_bytes
),
2137 else if (bytes
> 8 /* move up to 16 bytes at a time */
2143 move_bytes
= (bytes
> 16) ? 16 : bytes
;
2144 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
2145 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
2146 GEN_INT (move_bytes
),
2149 else if (bytes
> 4 && !TARGET_64BIT
)
2150 { /* move up to 8 bytes at a time */
2151 move_bytes
= (bytes
> 8) ? 8 : bytes
;
2152 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
2153 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
2154 GEN_INT (move_bytes
),
2157 else if (bytes
>= 4 && (align
>= 4 || !STRICT_ALIGNMENT
))
2158 { /* move 4 bytes */
2160 tmp_reg
= gen_reg_rtx (SImode
);
2161 emit_move_insn (tmp_reg
, expand_block_move_mem (SImode
, src_reg
, orig_src
));
2162 emit_move_insn (expand_block_move_mem (SImode
, dest_reg
, orig_dest
), tmp_reg
);
2164 else if (bytes
== 2 && (align
>= 2 || !STRICT_ALIGNMENT
))
2165 { /* move 2 bytes */
2167 tmp_reg
= gen_reg_rtx (HImode
);
2168 emit_move_insn (tmp_reg
, expand_block_move_mem (HImode
, src_reg
, orig_src
));
2169 emit_move_insn (expand_block_move_mem (HImode
, dest_reg
, orig_dest
), tmp_reg
);
2171 else if (bytes
== 1) /* move 1 byte */
2174 tmp_reg
= gen_reg_rtx (QImode
);
2175 emit_move_insn (tmp_reg
, expand_block_move_mem (QImode
, src_reg
, orig_src
));
2176 emit_move_insn (expand_block_move_mem (QImode
, dest_reg
, orig_dest
), tmp_reg
);
2179 { /* move up to 4 bytes at a time */
2180 move_bytes
= (bytes
> 4) ? 4 : bytes
;
2181 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
2182 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
2183 GEN_INT (move_bytes
),
2187 if (bytes
> move_bytes
)
2189 emit_insn (gen_addsi3 (src_reg
, src_reg
, GEN_INT (move_bytes
)));
2190 emit_insn (gen_addsi3 (dest_reg
, dest_reg
, GEN_INT (move_bytes
)));
2195 else /* string instructions not available */
2197 num_reg
= offset
= 0;
2198 for ( ; bytes
> 0; (bytes
-= move_bytes
), (offset
+= move_bytes
))
2200 /* Calculate the correct offset for src/dest */
2204 dest_addr
= dest_reg
;
2208 src_addr
= plus_constant (src_reg
, offset
);
2209 dest_addr
= plus_constant (dest_reg
, offset
);
2212 /* Generate the appropriate load and store, saving the stores for later */
2213 if (bytes
>= 8 && TARGET_64BIT
&& (align
>= 8 || !STRICT_ALIGNMENT
))
2216 tmp_reg
= gen_reg_rtx (DImode
);
2217 emit_insn (gen_movdi (tmp_reg
, expand_block_move_mem (DImode
, src_addr
, orig_src
)));
2218 stores
[ num_reg
++ ] = gen_movdi (expand_block_move_mem (DImode
, dest_addr
, orig_dest
), tmp_reg
);
2220 else if (bytes
>= 4 && (align
>= 4 || !STRICT_ALIGNMENT
))
2223 tmp_reg
= gen_reg_rtx (SImode
);
2224 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (SImode
, src_addr
, orig_src
)));
2225 stores
[ num_reg
++ ] = gen_movsi (expand_block_move_mem (SImode
, dest_addr
, orig_dest
), tmp_reg
);
2227 else if (bytes
>= 2 && (align
>= 2 || !STRICT_ALIGNMENT
))
2230 tmp_reg
= gen_reg_rtx (HImode
);
2231 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (HImode
, src_addr
, orig_src
)));
2232 stores
[ num_reg
++ ] = gen_movhi (expand_block_move_mem (HImode
, dest_addr
, orig_dest
), tmp_reg
);
2237 tmp_reg
= gen_reg_rtx (QImode
);
2238 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (QImode
, src_addr
, orig_src
)));
2239 stores
[ num_reg
++ ] = gen_movqi (expand_block_move_mem (QImode
, dest_addr
, orig_dest
), tmp_reg
);
2242 if (num_reg
>= MAX_MOVE_REG
)
2244 for (i
= 0; i
< num_reg
; i
++)
2245 emit_insn (stores
[i
]);
2250 for (i
= 0; i
< num_reg
; i
++)
2251 emit_insn (stores
[i
]);
2258 /* Return 1 if OP is a load multiple operation. It is known to be a
2259 PARALLEL and the first section will be tested. */
2262 load_multiple_operation (op
, mode
)
2264 enum machine_mode mode ATTRIBUTE_UNUSED
;
2266 int count
= XVECLEN (op
, 0);
2271 /* Perform a quick check so we don't blow up below. */
2273 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
2274 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
2275 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
2278 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
2279 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
2281 for (i
= 1; i
< count
; i
++)
2283 rtx elt
= XVECEXP (op
, 0, i
);
2285 if (GET_CODE (elt
) != SET
2286 || GET_CODE (SET_DEST (elt
)) != REG
2287 || GET_MODE (SET_DEST (elt
)) != SImode
2288 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
2289 || GET_CODE (SET_SRC (elt
)) != MEM
2290 || GET_MODE (SET_SRC (elt
)) != SImode
2291 || GET_CODE (XEXP (SET_SRC (elt
), 0)) != PLUS
2292 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt
), 0), 0), src_addr
)
2293 || GET_CODE (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != CONST_INT
2294 || INTVAL (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != i
* 4)
2301 /* Similar, but tests for store multiple. Here, the second vector element
2302 is a CLOBBER. It will be tested later. */
2305 store_multiple_operation (op
, mode
)
2307 enum machine_mode mode ATTRIBUTE_UNUSED
;
2309 int count
= XVECLEN (op
, 0) - 1;
2314 /* Perform a quick check so we don't blow up below. */
2316 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
2317 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
2318 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
2321 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
2322 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
2324 for (i
= 1; i
< count
; i
++)
2326 rtx elt
= XVECEXP (op
, 0, i
+ 1);
2328 if (GET_CODE (elt
) != SET
2329 || GET_CODE (SET_SRC (elt
)) != REG
2330 || GET_MODE (SET_SRC (elt
)) != SImode
2331 || REGNO (SET_SRC (elt
)) != src_regno
+ i
2332 || GET_CODE (SET_DEST (elt
)) != MEM
2333 || GET_MODE (SET_DEST (elt
)) != SImode
2334 || GET_CODE (XEXP (SET_DEST (elt
), 0)) != PLUS
2335 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt
), 0), 0), dest_addr
)
2336 || GET_CODE (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != CONST_INT
2337 || INTVAL (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != i
* 4)
2344 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
2345 We only check the opcode against the mode of the CC value here. */
2348 branch_comparison_operator (op
, mode
)
2350 enum machine_mode mode ATTRIBUTE_UNUSED
;
2352 enum rtx_code code
= GET_CODE (op
);
2353 enum machine_mode cc_mode
;
2355 if (GET_RTX_CLASS (code
) != '<')
2358 cc_mode
= GET_MODE (XEXP (op
, 0));
2359 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
2362 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
2363 && cc_mode
== CCUNSmode
)
2366 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
2367 && (cc_mode
!= CCUNSmode
))
2373 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
2374 We check the opcode against the mode of the CC value and disallow EQ or
2375 NE comparisons for integers. */
2378 scc_comparison_operator (op
, mode
)
2380 enum machine_mode mode
;
2382 enum rtx_code code
= GET_CODE (op
);
2383 enum machine_mode cc_mode
;
2385 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
2388 if (GET_RTX_CLASS (code
) != '<')
2391 cc_mode
= GET_MODE (XEXP (op
, 0));
2392 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
2395 if (code
== NE
&& cc_mode
!= CCFPmode
)
2398 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
2399 && cc_mode
== CCUNSmode
)
2402 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
2403 && (cc_mode
!= CCUNSmode
))
2406 if (cc_mode
== CCEQmode
&& code
!= EQ
&& code
!= NE
)
2413 trap_comparison_operator (op
, mode
)
2415 enum machine_mode mode
;
2417 if (mode
!= VOIDmode
&& mode
!= GET_MODE (op
))
2419 return (GET_RTX_CLASS (GET_CODE (op
)) == '<'
2420 || GET_CODE (op
) == EQ
|| GET_CODE (op
) == NE
);
2423 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
2424 mask required to convert the result of a rotate insn into a shift
2425 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
2428 includes_lshift_p (shiftop
, andop
)
2429 register rtx shiftop
;
2432 int shift_mask
= (~0 << INTVAL (shiftop
));
2434 return (INTVAL (andop
) & ~shift_mask
) == 0;
2437 /* Similar, but for right shift. */
2440 includes_rshift_p (shiftop
, andop
)
2441 register rtx shiftop
;
2444 unsigned HOST_WIDE_INT shift_mask
= ~(unsigned HOST_WIDE_INT
) 0;
2446 shift_mask
>>= INTVAL (shiftop
);
2448 return (INTVAL (andop
) & ~ shift_mask
) == 0;
2451 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
2452 for lfq and stfq insns.
2454 Note reg1 and reg2 *must* be hard registers. To be sure we will
2455 abort if we are passed pseudo registers. */
2458 registers_ok_for_quad_peep (reg1
, reg2
)
2461 /* We might have been passed a SUBREG. */
2462 if (GET_CODE (reg1
) != REG
|| GET_CODE (reg2
) != REG
)
2465 return (REGNO (reg1
) == REGNO (reg2
) - 1);
2468 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
2469 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
2472 addrs_ok_for_quad_peep (addr1
, addr2
)
2479 /* Extract an offset (if used) from the first addr. */
2480 if (GET_CODE (addr1
) == PLUS
)
2482 /* If not a REG, return zero. */
2483 if (GET_CODE (XEXP (addr1
, 0)) != REG
)
2487 reg1
= REGNO (XEXP (addr1
, 0));
2488 /* The offset must be constant! */
2489 if (GET_CODE (XEXP (addr1
, 1)) != CONST_INT
)
2491 offset1
= INTVAL (XEXP (addr1
, 1));
2494 else if (GET_CODE (addr1
) != REG
)
2498 reg1
= REGNO (addr1
);
2499 /* This was a simple (mem (reg)) expression. Offset is 0. */
2503 /* Make sure the second address is a (mem (plus (reg) (const_int). */
2504 if (GET_CODE (addr2
) != PLUS
)
2507 if (GET_CODE (XEXP (addr2
, 0)) != REG
2508 || GET_CODE (XEXP (addr2
, 1)) != CONST_INT
)
2511 if (reg1
!= REGNO (XEXP (addr2
, 0)))
2514 /* The offset for the second addr must be 8 more than the first addr. */
2515 if (INTVAL (XEXP (addr2
, 1)) != offset1
+ 8)
2518 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
2523 /* Return the register class of a scratch register needed to copy IN into
2524 or out of a register in CLASS in MODE. If it can be done directly,
2525 NO_REGS is returned. */
2528 secondary_reload_class (class, mode
, in
)
2529 enum reg_class
class;
2530 enum machine_mode mode ATTRIBUTE_UNUSED
;
2536 /* We can not copy a symbolic operand directly into anything other than
2537 BASE_REGS for TARGET_ELF. So indicate that a register from BASE_REGS
2538 is needed as an intermediate register. */
2539 if (class != BASE_REGS
2540 && (GET_CODE (in
) == SYMBOL_REF
2541 || GET_CODE (in
) == LABEL_REF
2542 || GET_CODE (in
) == CONST
))
2546 if (GET_CODE (in
) == REG
)
2549 if (regno
>= FIRST_PSEUDO_REGISTER
)
2551 regno
= true_regnum (in
);
2552 if (regno
>= FIRST_PSEUDO_REGISTER
)
2556 else if (GET_CODE (in
) == SUBREG
)
2558 regno
= true_regnum (in
);
2559 if (regno
>= FIRST_PSEUDO_REGISTER
)
2565 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
2567 if (class == GENERAL_REGS
|| class == BASE_REGS
2568 || (regno
>= 0 && INT_REGNO_P (regno
)))
2571 /* Constants, memory, and FP registers can go into FP registers. */
2572 if ((regno
== -1 || FP_REGNO_P (regno
))
2573 && (class == FLOAT_REGS
|| class == NON_SPECIAL_REGS
))
2576 /* We can copy among the CR registers. */
2577 if ((class == CR_REGS
|| class == CR0_REGS
)
2578 && regno
>= 0 && CR_REGNO_P (regno
))
2581 /* Otherwise, we need GENERAL_REGS. */
2582 return GENERAL_REGS
;
2585 /* Given a comparison operation, return the bit number in CCR to test. We
2586 know this is a valid comparison.
2588 SCC_P is 1 if this is for an scc. That means that %D will have been
2589 used instead of %C, so the bits will be in different places.
2591 Return -1 if OP isn't a valid comparison for some reason. */
2598 enum rtx_code code
= GET_CODE (op
);
2599 enum machine_mode cc_mode
;
2603 if (GET_RTX_CLASS (code
) != '<')
2606 cc_mode
= GET_MODE (XEXP (op
, 0));
2607 cc_regnum
= REGNO (XEXP (op
, 0));
2608 base_bit
= 4 * (cc_regnum
- 68);
2610 /* In CCEQmode cases we have made sure that the result is always in the
2611 third bit of the CR field. */
2613 if (cc_mode
== CCEQmode
)
2614 return base_bit
+ 3;
2619 return scc_p
? base_bit
+ 3 : base_bit
+ 2;
2621 return base_bit
+ 2;
2623 return base_bit
+ 1;
2628 /* If floating-point, we will have done a cror to put the bit in the
2629 unordered position. So test that bit. For integer, this is ! LT
2630 unless this is an scc insn. */
2631 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
;
2634 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
+ 1;
2641 /* Return the GOT register. */
2644 rs6000_got_register (value
)
2645 rtx value ATTRIBUTE_UNUSED
;
2647 /* The second flow pass currently (June 1999) can't update regs_ever_live
2648 without disturbing other parts of the compiler, so update it here to
2649 make the prolog/epilogue code happy. */
2650 if (no_new_pseudos
&& ! regs_ever_live
[PIC_OFFSET_TABLE_REGNUM
])
2651 regs_ever_live
[PIC_OFFSET_TABLE_REGNUM
] = 1;
2653 current_function_uses_pic_offset_table
= 1;
2655 return pic_offset_table_rtx
;
2658 /* Search for any occurrence of the GOT_TOC register marker that should
2659 have been eliminated, but may have crept back in.
2661 This function could completely go away now (June 1999), but we leave it
2662 in for a while until all the possible issues with the new -fpic handling
2669 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
2671 rtx got_reg
= gen_rtx_REG (Pmode
, 2);
2672 for ( ; insn
!= NULL_RTX
; insn
= NEXT_INSN (insn
))
2673 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
2674 && reg_mentioned_p (got_reg
, PATTERN (insn
)))
2675 fatal_insn ("GOT/TOC register marker not removed:", PATTERN (insn
));
2680 /* Define the structure for the machine field in struct function. */
2681 struct machine_function
2689 /* Functions to save and restore rs6000_fpmem_size.
2690 These will be called, via pointer variables,
2691 from push_function_context and pop_function_context. */
2694 rs6000_save_machine_status (p
)
2697 struct machine_function
*machine
=
2698 (struct machine_function
*) xmalloc (sizeof (struct machine_function
));
2700 p
->machine
= machine
;
2701 machine
->sysv_varargs_p
= rs6000_sysv_varargs_p
;
2702 machine
->fpmem_size
= rs6000_fpmem_size
;
2703 machine
->fpmem_offset
= rs6000_fpmem_offset
;
2707 rs6000_restore_machine_status (p
)
2710 struct machine_function
*machine
= p
->machine
;
2712 rs6000_sysv_varargs_p
= machine
->sysv_varargs_p
;
2713 rs6000_fpmem_size
= machine
->fpmem_size
;
2714 rs6000_fpmem_offset
= machine
->fpmem_offset
;
2717 p
->machine
= (struct machine_function
*)0;
2720 /* Do anything needed before RTL is emitted for each function. */
2723 rs6000_init_expanders ()
2725 /* Reset varargs and save TOC indicator */
2726 rs6000_sysv_varargs_p
= 0;
2727 rs6000_fpmem_size
= 0;
2728 rs6000_fpmem_offset
= 0;
2730 /* Arrange to save and restore machine status around nested functions. */
2731 save_machine_status
= rs6000_save_machine_status
;
2732 restore_machine_status
= rs6000_restore_machine_status
;
2736 /* Print an operand. Recognize special options, documented below. */
2739 #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel")
2740 #define SMALL_DATA_REG ((rs6000_sdata == SDATA_EABI) ? 0 : 13)
2742 #define SMALL_DATA_RELOC "sda21"
2743 #define SMALL_DATA_REG 0
2747 print_operand (file
, x
, code
)
2755 /* These macros test for integers and extract the low-order bits. */
2757 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
2758 && GET_MODE (X) == VOIDmode)
2760 #define INT_LOWPART(X) \
2761 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
2766 /* Write out an instruction after the call which may be replaced
2767 with glue code by the loader. This depends on the AIX version. */
2768 asm_fprintf (file
, RS6000_CALL_GLUE
);
2772 /* Write the register number of the TOC register. */
2773 fputs (TARGET_MINIMAL_TOC
? reg_names
[30] : reg_names
[2 /* PIC_OFFSET_TABLE_REGNUM? */ ], file
);
2777 /* Write out either a '.' or '$' for the current location, depending
2778 on whether this is Solaris or not. */
2779 putc ((DEFAULT_ABI
== ABI_SOLARIS
) ? '.' : '$', file
);
2783 /* If X is a constant integer whose low-order 5 bits are zero,
2784 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
2785 in the AIX assembler where "sri" with a zero shift count
2786 write a trash instruction. */
2787 if (GET_CODE (x
) == CONST_INT
&& (INTVAL (x
) & 31) == 0)
2794 /* Low-order 16 bits of constant, unsigned. */
2796 output_operand_lossage ("invalid %%b value");
2798 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 0xffff);
2802 /* If the low-order bit is zero, write 'r'; otherwise, write 'l'
2803 for 64-bit mask direction. */
2804 putc (((INT_LOWPART(x
) & 1) == 0 ? 'r' : 'l'), file
);
2808 /* This is an optional cror needed for LE or GE floating-point
2809 comparisons. Otherwise write nothing. */
2810 if ((GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
)
2811 && GET_MODE (XEXP (x
, 0)) == CCFPmode
)
2813 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
2815 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
2816 base_bit
+ 2, base_bit
+ (GET_CODE (x
) == GE
));
2821 /* Similar, except that this is for an scc, so we must be able to
2822 encode the test in a single bit that is one. We do the above
2823 for any LE, GE, GEU, or LEU and invert the bit for NE. */
2824 if (GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
2825 || GET_CODE (x
) == LEU
|| GET_CODE (x
) == GEU
)
2827 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
2829 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
2831 base_bit
+ (GET_CODE (x
) == GE
|| GET_CODE (x
) == GEU
));
2834 else if (GET_CODE (x
) == NE
)
2836 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
2838 fprintf (file
, "crnor %d,%d,%d\n\t", base_bit
+ 3,
2839 base_bit
+ 2, base_bit
+ 2);
2844 /* X is a CR register. Print the number of the third bit of the CR */
2845 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2846 output_operand_lossage ("invalid %%E value");
2848 fprintf(file
, "%d", 4 * (REGNO (x
) - 68) + 3);
2852 /* X is a CR register. Print the shift count needed to move it
2853 to the high-order four bits. */
2854 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2855 output_operand_lossage ("invalid %%f value");
2857 fprintf (file
, "%d", 4 * (REGNO (x
) - 68));
2861 /* Similar, but print the count for the rotate in the opposite
2863 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2864 output_operand_lossage ("invalid %%F value");
2866 fprintf (file
, "%d", 32 - 4 * (REGNO (x
) - 68));
2870 /* X is a constant integer. If it is negative, print "m",
2871 otherwise print "z". This is to make a aze or ame insn. */
2872 if (GET_CODE (x
) != CONST_INT
)
2873 output_operand_lossage ("invalid %%G value");
2874 else if (INTVAL (x
) >= 0)
2881 /* If constant, output low-order five bits. Otherwise,
2884 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 31);
2886 print_operand (file
, x
, 0);
2890 /* If constant, output low-order six bits. Otherwise,
2893 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 63);
2895 print_operand (file
, x
, 0);
2899 /* Print `i' if this is a constant, else nothing. */
2905 /* Write the bit number in CCR for jump. */
2908 output_operand_lossage ("invalid %%j code");
2910 fprintf (file
, "%d", i
);
2914 /* Similar, but add one for shift count in rlinm for scc and pass
2915 scc flag to `ccr_bit'. */
2918 output_operand_lossage ("invalid %%J code");
2920 /* If we want bit 31, write a shift count of zero, not 32. */
2921 fprintf (file
, "%d", i
== 31 ? 0 : i
+ 1);
2925 /* X must be a constant. Write the 1's complement of the
2928 output_operand_lossage ("invalid %%k value");
2930 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, ~ INT_LOWPART (x
));
2934 /* Write second word of DImode or DFmode reference. Works on register
2935 or non-indexed memory only. */
2936 if (GET_CODE (x
) == REG
)
2937 fprintf (file
, "%s", reg_names
[REGNO (x
) + 1]);
2938 else if (GET_CODE (x
) == MEM
)
2940 /* Handle possible auto-increment. Since it is pre-increment and
2941 we have already done it, we can just use an offset of word. */
2942 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2943 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2944 output_address (plus_constant_for_output (XEXP (XEXP (x
, 0), 0),
2947 output_address (plus_constant_for_output (XEXP (x
, 0),
2949 if (small_data_operand (x
, GET_MODE (x
)))
2950 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
2951 reg_names
[SMALL_DATA_REG
]);
2956 /* MB value for a mask operand. */
2957 if (! mask_operand (x
, VOIDmode
))
2958 output_operand_lossage ("invalid %%m value");
2960 val
= INT_LOWPART (x
);
2962 /* If the high bit is set and the low bit is not, the value is zero.
2963 If the high bit is zero, the value is the first 1 bit we find from
2965 if ((val
& 0x80000000) && ((val
& 1) == 0))
2970 else if ((val
& 0x80000000) == 0)
2972 for (i
= 1; i
< 32; i
++)
2973 if ((val
<<= 1) & 0x80000000)
2975 fprintf (file
, "%d", i
);
2979 /* Otherwise, look for the first 0 bit from the right. The result is its
2980 number plus 1. We know the low-order bit is one. */
2981 for (i
= 0; i
< 32; i
++)
2982 if (((val
>>= 1) & 1) == 0)
2985 /* If we ended in ...01, i would be 0. The correct value is 31, so
2987 fprintf (file
, "%d", 31 - i
);
2991 /* ME value for a mask operand. */
2992 if (! mask_operand (x
, VOIDmode
))
2993 output_operand_lossage ("invalid %%M value");
2995 val
= INT_LOWPART (x
);
2997 /* If the low bit is set and the high bit is not, the value is 31.
2998 If the low bit is zero, the value is the first 1 bit we find from
3000 if ((val
& 1) && ((val
& 0x80000000) == 0))
3005 else if ((val
& 1) == 0)
3007 for (i
= 0; i
< 32; i
++)
3008 if ((val
>>= 1) & 1)
3011 /* If we had ....10, i would be 0. The result should be
3012 30, so we need 30 - i. */
3013 fprintf (file
, "%d", 30 - i
);
3017 /* Otherwise, look for the first 0 bit from the left. The result is its
3018 number minus 1. We know the high-order bit is one. */
3019 for (i
= 0; i
< 32; i
++)
3020 if (((val
<<= 1) & 0x80000000) == 0)
3023 fprintf (file
, "%d", i
);
3027 /* Write the number of elements in the vector times 4. */
3028 if (GET_CODE (x
) != PARALLEL
)
3029 output_operand_lossage ("invalid %%N value");
3031 fprintf (file
, "%d", XVECLEN (x
, 0) * 4);
3035 /* Similar, but subtract 1 first. */
3036 if (GET_CODE (x
) != PARALLEL
)
3037 output_operand_lossage ("invalid %%O value");
3039 fprintf (file
, "%d", (XVECLEN (x
, 0) - 1) * 4);
3043 /* X is a CONST_INT that is a power of two. Output the logarithm. */
3045 || (i
= exact_log2 (INT_LOWPART (x
))) < 0)
3046 output_operand_lossage ("invalid %%p value");
3048 fprintf (file
, "%d", i
);
3052 /* The operand must be an indirect memory reference. The result
3053 is the register number. */
3054 if (GET_CODE (x
) != MEM
|| GET_CODE (XEXP (x
, 0)) != REG
3055 || REGNO (XEXP (x
, 0)) >= 32)
3056 output_operand_lossage ("invalid %%P value");
3058 fprintf (file
, "%d", REGNO (XEXP (x
, 0)));
3062 /* X is a CR register. Print the mask for `mtcrf'. */
3063 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
3064 output_operand_lossage ("invalid %%R value");
3066 fprintf (file
, "%d", 128 >> (REGNO (x
) - 68));
3070 /* Low 5 bits of 32 - value */
3072 output_operand_lossage ("invalid %%s value");
3074 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, (32 - INT_LOWPART (x
)) & 31);
3078 /* PowerPC64 mask position. All 0's and all 1's are excluded.
3079 CONST_INT 32-bit mask is considered sign-extended so any
3080 transition must occur within the CONST_INT, not on the boundary. */
3081 if (! mask64_operand (x
, VOIDmode
))
3082 output_operand_lossage ("invalid %%S value");
3084 val
= INT_LOWPART (x
);
3086 if (val
& 1) /* Clear Left */
3088 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
; i
++)
3089 if (!((val
>>= 1) & 1))
3092 #if HOST_BITS_PER_WIDE_INT == 32
3093 if (GET_CODE (x
) == CONST_DOUBLE
&& i
== 32)
3095 val
= CONST_DOUBLE_HIGH (x
);
3100 for (i
= 32; i
< 64; i
++)
3101 if (!((val
>>= 1) & 1))
3105 /* i = index of last set bit from right
3106 mask begins at 63 - i from left */
3108 output_operand_lossage ("%%S computed all 1's mask");
3109 fprintf (file
, "%d", 63 - i
);
3112 else /* Clear Right */
3114 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
; i
++)
3115 if ((val
>>= 1) & 1)
3118 #if HOST_BITS_PER_WIDE_INT == 32
3119 if (GET_CODE (x
) == CONST_DOUBLE
&& i
== 32)
3121 val
= CONST_DOUBLE_HIGH (x
);
3123 if (val
== (HOST_WIDE_INT
) -1)
3126 for (i
= 32; i
< 64; i
++)
3127 if ((val
>>= 1) & 1)
3131 /* i = index of last clear bit from right
3132 mask ends at 62 - i from left */
3134 output_operand_lossage ("%%S computed all 0's mask");
3135 fprintf (file
, "%d", 62 - i
);
3140 /* Write 12 if this jump operation will branch if true, 4 otherwise.
3141 All floating-point operations except NE branch true and integer
3142 EQ, LT, GT, LTU and GTU also branch true. */
3143 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
3144 output_operand_lossage ("invalid %%t value");
3146 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
3147 && GET_CODE (x
) != NE
)
3148 || GET_CODE (x
) == EQ
3149 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
3150 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
3157 /* Opposite of 't': write 4 if this jump operation will branch if true,
3159 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
3160 output_operand_lossage ("invalid %%T value");
3162 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
3163 && GET_CODE (x
) != NE
)
3164 || GET_CODE (x
) == EQ
3165 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
3166 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
3173 /* High-order 16 bits of constant for use in unsigned operand. */
3175 output_operand_lossage ("invalid %%u value");
3177 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
,
3178 (INT_LOWPART (x
) >> 16) & 0xffff);
3182 /* High-order 16 bits of constant for use in signed operand. */
3184 output_operand_lossage ("invalid %%v value");
3187 int value
= (INT_LOWPART (x
) >> 16) & 0xffff;
3189 /* Solaris assembler doesn't like lis 0,0x8000 */
3190 if (DEFAULT_ABI
== ABI_SOLARIS
&& (value
& 0x8000) != 0)
3191 fprintf (file
, "%d", value
| (~0 << 16));
3193 fprintf (file
, "0x%x", value
);
3198 /* Print `u' if this has an auto-increment or auto-decrement. */
3199 if (GET_CODE (x
) == MEM
3200 && (GET_CODE (XEXP (x
, 0)) == PRE_INC
3201 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
))
3206 /* Print the trap code for this operand. */
3207 switch (GET_CODE (x
))
3210 fputs ("eq", file
); /* 4 */
3213 fputs ("ne", file
); /* 24 */
3216 fputs ("lt", file
); /* 16 */
3219 fputs ("le", file
); /* 20 */
3222 fputs ("gt", file
); /* 8 */
3225 fputs ("ge", file
); /* 12 */
3228 fputs ("llt", file
); /* 2 */
3231 fputs ("lle", file
); /* 6 */
3234 fputs ("lgt", file
); /* 1 */
3237 fputs ("lge", file
); /* 5 */
3245 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
3248 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
,
3249 ((INT_LOWPART (x
) & 0xffff) ^ 0x8000) - 0x8000);
3251 print_operand (file
, x
, 0);
3255 /* If constant, low-order 16 bits of constant, unsigned.
3256 Otherwise, write normally. */
3258 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 0xffff);
3260 print_operand (file
, x
, 0);
3264 if (GET_CODE (x
) == MEM
3265 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x
, 0)))
3270 /* Like 'L', for third word of TImode */
3271 if (GET_CODE (x
) == REG
)
3272 fprintf (file
, "%s", reg_names
[REGNO (x
) + 2]);
3273 else if (GET_CODE (x
) == MEM
)
3275 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
3276 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
3277 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 8));
3279 output_address (plus_constant (XEXP (x
, 0), 8));
3280 if (small_data_operand (x
, GET_MODE (x
)))
3281 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
3282 reg_names
[SMALL_DATA_REG
]);
3287 /* X is a SYMBOL_REF. Write out the name preceded by a
3288 period and without any trailing data in brackets. Used for function
3289 names. If we are configured for System V (or the embedded ABI) on
3290 the PowerPC, do not emit the period, since those systems do not use
3291 TOCs and the like. */
3292 if (GET_CODE (x
) != SYMBOL_REF
)
3295 if (XSTR (x
, 0)[0] != '.')
3297 switch (DEFAULT_ABI
)
3307 case ABI_AIX_NODESC
:
3316 RS6000_OUTPUT_BASENAME (file
, XSTR (x
, 0));
3320 /* Like 'L', for last word of TImode. */
3321 if (GET_CODE (x
) == REG
)
3322 fprintf (file
, "%s", reg_names
[REGNO (x
) + 3]);
3323 else if (GET_CODE (x
) == MEM
)
3325 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
3326 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
3327 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 12));
3329 output_address (plus_constant (XEXP (x
, 0), 12));
3330 if (small_data_operand (x
, GET_MODE (x
)))
3331 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
3332 reg_names
[SMALL_DATA_REG
]);
3337 if (GET_CODE (x
) == REG
)
3338 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
3339 else if (GET_CODE (x
) == MEM
)
3341 /* We need to handle PRE_INC and PRE_DEC here, since we need to
3342 know the width from the mode. */
3343 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
)
3344 fprintf (file
, "%d(%d)", GET_MODE_SIZE (GET_MODE (x
)),
3345 REGNO (XEXP (XEXP (x
, 0), 0)));
3346 else if (GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
3347 fprintf (file
, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x
)),
3348 REGNO (XEXP (XEXP (x
, 0), 0)));
3350 output_address (XEXP (x
, 0));
3353 output_addr_const (file
, x
);
3357 output_operand_lossage ("invalid %%xn code");
3361 /* Print the address of an operand. */
3364 print_operand_address (file
, x
)
3368 if (GET_CODE (x
) == REG
)
3369 fprintf (file
, "0(%s)", reg_names
[ REGNO (x
) ]);
3370 else if (GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == CONST
|| GET_CODE (x
) == LABEL_REF
)
3372 output_addr_const (file
, x
);
3373 if (small_data_operand (x
, GET_MODE (x
)))
3374 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
3375 reg_names
[SMALL_DATA_REG
]);
3377 #ifdef TARGET_NO_TOC
3378 else if (TARGET_NO_TOC
)
3382 fprintf (file
, "(%s)", reg_names
[ TARGET_MINIMAL_TOC
? 30 : 2 /* PIC_OFFSET_TABLE_REGNUM? */ ]);
3384 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == REG
)
3386 if (REGNO (XEXP (x
, 0)) == 0)
3387 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 1)) ],
3388 reg_names
[ REGNO (XEXP (x
, 0)) ]);
3390 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 0)) ],
3391 reg_names
[ REGNO (XEXP (x
, 1)) ]);
3393 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == CONST_INT
)
3395 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (XEXP (x
, 1)));
3396 fprintf (file
, "(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
3399 else if (GET_CODE (x
) == LO_SUM
&& GET_CODE (XEXP (x
, 0)) == REG
3400 && CONSTANT_P (XEXP (x
, 1)))
3402 output_addr_const (file
, XEXP (x
, 1));
3403 fprintf (file
, "@l(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
3410 /* This page contains routines that are used to determine what the function
3411 prologue and epilogue code will do and write them out. */
3413 /* Return the first fixed-point register that is required to be saved. 32 if
3417 first_reg_to_save ()
3421 /* Find lowest numbered live register. */
3422 for (first_reg
= 13; first_reg
<= 31; first_reg
++)
3423 if (regs_ever_live
[first_reg
] && ! call_used_regs
[first_reg
])
3428 /* AIX must save/restore every register that contains a parameter
3429 before/after the .__mcount call plus an additional register
3430 for the static chain, if needed; use registers from 30 down to 22
3432 if (DEFAULT_ABI
== ABI_AIX
)
3434 int last_parm_reg
, profile_first_reg
;
3436 /* Figure out last used parameter register. The proper thing
3437 to do is to walk incoming args of the function. A function
3438 might have live parameter registers even if it has no
3440 for (last_parm_reg
= 10;
3441 last_parm_reg
> 2 && ! regs_ever_live
[last_parm_reg
];
3445 /* Calculate first reg for saving parameter registers
3447 Skip reg 31 which may contain the frame pointer. */
3448 profile_first_reg
= (33 - last_parm_reg
3449 - (current_function_needs_context
? 1 : 0));
3450 /* Do not save frame pointer if no parameters needs to be saved. */
3451 if (profile_first_reg
== 31)
3452 profile_first_reg
= 32;
3454 if (first_reg
> profile_first_reg
)
3455 first_reg
= profile_first_reg
;
3458 /* SVR4 may need one register to preserve the static chain. */
3459 else if (current_function_needs_context
)
3461 /* Skip reg 31 which may contain the frame pointer. */
3470 /* Similar, for FP regs. */
3473 first_fp_reg_to_save ()
3477 /* Find lowest numbered live register. */
3478 for (first_reg
= 14 + 32; first_reg
<= 63; first_reg
++)
3479 if (regs_ever_live
[first_reg
])
3485 /* Return non-zero if this function makes calls. */
3488 rs6000_makes_calls ()
3492 /* If we are profiling, we will be making a call to __mcount.
3493 Under the System V ABI's, we store the LR directly, so
3494 we don't need to do it here. */
3495 if (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
3498 for (insn
= get_insns (); insn
; insn
= next_insn (insn
))
3499 if (GET_CODE (insn
) == CALL_INSN
)
3506 /* Calculate the stack information for the current function. This is
3507 complicated by having two separate calling sequences, the AIX calling
3508 sequence and the V.4 calling sequence.
3510 AIX stack frames look like:
3512 SP----> +---------------------------------------+
3513 | back chain to caller | 0 0
3514 +---------------------------------------+
3515 | saved CR | 4 8 (8-11)
3516 +---------------------------------------+
3518 +---------------------------------------+
3519 | reserved for compilers | 12 24
3520 +---------------------------------------+
3521 | reserved for binders | 16 32
3522 +---------------------------------------+
3523 | saved TOC pointer | 20 40
3524 +---------------------------------------+
3525 | Parameter save area (P) | 24 48
3526 +---------------------------------------+
3527 | Alloca space (A) | 24+P etc.
3528 +---------------------------------------+
3529 | Local variable space (L) | 24+P+A
3530 +---------------------------------------+
3531 | Float/int conversion temporary (X) | 24+P+A+L
3532 +---------------------------------------+
3533 | Save area for GP registers (G) | 24+P+A+X+L
3534 +---------------------------------------+
3535 | Save area for FP registers (F) | 24+P+A+X+L+G
3536 +---------------------------------------+
3537 old SP->| back chain to caller's caller |
3538 +---------------------------------------+
3540 The required alignment for AIX configurations is two words (i.e., 8
3544 V.4 stack frames look like:
3546 SP----> +---------------------------------------+
3547 | back chain to caller | 0
3548 +---------------------------------------+
3549 | caller's saved LR | 4
3550 +---------------------------------------+
3551 | Parameter save area (P) | 8
3552 +---------------------------------------+
3553 | Alloca space (A) | 8+P
3554 +---------------------------------------+
3555 | Varargs save area (V) | 8+P+A
3556 +---------------------------------------+
3557 | Local variable space (L) | 8+P+A+V
3558 +---------------------------------------+
3559 | Float/int conversion temporary (X) | 8+P+A+V+L
3560 +---------------------------------------+
3561 | saved CR (C) | 8+P+A+V+L+X
3562 +---------------------------------------+
3563 | Save area for GP registers (G) | 8+P+A+V+L+X+C
3564 +---------------------------------------+
3565 | Save area for FP registers (F) | 8+P+A+V+L+X+C+G
3566 +---------------------------------------+
3567 old SP->| back chain to caller's caller |
3568 +---------------------------------------+
3570 The required alignment for V.4 is 16 bytes, or 8 bytes if -meabi is
3571 given. (But note below and in sysv4.h that we require only 8 and
3572 may round up the size of our stack frame anyways. The historical
3573 reason is early versions of powerpc-linux which didn't properly
3574 align the stack at program startup. A happy side-effect is that
3575 -mno-eabi libraries can be used with -meabi programs.)
3578 A PowerPC Windows/NT frame looks like:
3580 SP----> +---------------------------------------+
3581 | back chain to caller | 0
3582 +---------------------------------------+
3584 +---------------------------------------+
3586 +---------------------------------------+
3588 +---------------------------------------+
3590 +---------------------------------------+
3592 +---------------------------------------+
3593 | Parameter save area (P) | 24
3594 +---------------------------------------+
3595 | Alloca space (A) | 24+P
3596 +---------------------------------------+
3597 | Local variable space (L) | 24+P+A
3598 +---------------------------------------+
3599 | Float/int conversion temporary (X) | 24+P+A+L
3600 +---------------------------------------+
3601 | Save area for FP registers (F) | 24+P+A+L+X
3602 +---------------------------------------+
3603 | Possible alignment area (Y) | 24+P+A+L+X+F
3604 +---------------------------------------+
3605 | Save area for GP registers (G) | 24+P+A+L+X+F+Y
3606 +---------------------------------------+
3607 | Save area for CR (C) | 24+P+A+L+X+F+Y+G
3608 +---------------------------------------+
3609 | Save area for TOC (T) | 24+P+A+L+X+F+Y+G+C
3610 +---------------------------------------+
3611 | Save area for LR (R) | 24+P+A+L+X+F+Y+G+C+T
3612 +---------------------------------------+
3613 old SP->| back chain to caller's caller |
3614 +---------------------------------------+
3616 For NT, there is no specific order to save the registers, but in
3617 order to support __builtin_return_address, the save area for the
3618 link register needs to be in a known place, so we use -4 off of the
3619 old SP. To support calls through pointers, we also allocate a
3620 fixed slot to store the TOC, -8 off the old SP.
3622 The required alignment for NT is 16 bytes.
3625 The EABI configuration defaults to the V.4 layout, unless
3626 -mcall-aix is used, in which case the AIX layout is used. However,
3627 the stack alignment requirements may differ. If -mno-eabi is not
3628 given, the required stack alignment is 8 bytes; if -mno-eabi is
3629 given, the required alignment is 16 bytes. (But see V.4 comment
3632 #ifndef ABI_STACK_BOUNDARY
3633 #define ABI_STACK_BOUNDARY STACK_BOUNDARY
3637 rs6000_stack_info ()
3639 static rs6000_stack_t info
, zero_info
;
3640 rs6000_stack_t
*info_ptr
= &info
;
3641 int reg_size
= TARGET_32BIT
? 4 : 8;
3642 enum rs6000_abi abi
;
3645 /* Zero all fields portably */
3648 /* Select which calling sequence */
3649 info_ptr
->abi
= abi
= DEFAULT_ABI
;
3651 /* Calculate which registers need to be saved & save area size */
3652 info_ptr
->first_gp_reg_save
= first_reg_to_save ();
3653 /* Assume that we will have to save PIC_OFFSET_TABLE_REGNUM,
3654 even if it currently looks like we won't. */
3656 && (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
3657 && info_ptr
->first_gp_reg_save
> PIC_OFFSET_TABLE_REGNUM
)
3658 info_ptr
->gp_size
= reg_size
* (32 - PIC_OFFSET_TABLE_REGNUM
);
3660 info_ptr
->gp_size
= reg_size
* (32 - info_ptr
->first_gp_reg_save
);
3662 info_ptr
->first_fp_reg_save
= first_fp_reg_to_save ();
3663 info_ptr
->fp_size
= 8 * (64 - info_ptr
->first_fp_reg_save
);
3665 /* Does this function call anything? */
3666 info_ptr
->calls_p
= rs6000_makes_calls ();
3668 /* Allocate space to save the toc. */
3669 if (abi
== ABI_NT
&& info_ptr
->calls_p
)
3671 info_ptr
->toc_save_p
= 1;
3672 info_ptr
->toc_size
= reg_size
;
3675 /* Does this machine need the float/int conversion area? */
3676 info_ptr
->fpmem_p
= regs_ever_live
[FPMEM_REGNUM
];
3678 /* If this is main and we need to call a function to set things up,
3679 save main's arguments around the call. */
3684 if (0 == strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl
)),
3686 && DECL_CONTEXT (current_function_decl
) == NULL_TREE
)
3688 info_ptr
->main_p
= 1;
3691 info_ptr
->calls_p
= 1;
3693 if (DECL_ARGUMENTS (current_function_decl
))
3698 info_ptr
->main_save_p
= 1;
3699 info_ptr
->main_size
= 0;
3701 for ((i
= 0), (arg
= DECL_ARGUMENTS (current_function_decl
));
3702 arg
!= NULL_TREE
&& i
< 8;
3703 (arg
= TREE_CHAIN (arg
)), i
++)
3705 info_ptr
->main_size
+= reg_size
;
3712 /* Determine if we need to save the link register */
3713 if (regs_ever_live
[65]
3714 || (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
3715 #ifdef TARGET_RELOCATABLE
3716 || (TARGET_RELOCATABLE
&& (get_pool_size () != 0))
3718 || (info_ptr
->first_fp_reg_save
!= 64
3719 && !FP_SAVE_INLINE (info_ptr
->first_fp_reg_save
))
3720 || (abi
== ABI_V4
&& current_function_calls_alloca
)
3721 || (abi
== ABI_SOLARIS
&& current_function_calls_alloca
)
3722 || info_ptr
->calls_p
)
3724 info_ptr
->lr_save_p
= 1;
3725 regs_ever_live
[65] = 1;
3727 info_ptr
->lr_size
= reg_size
;
3730 /* Determine if we need to save the condition code registers */
3731 if (regs_ever_live
[70] || regs_ever_live
[71] || regs_ever_live
[72])
3733 info_ptr
->cr_save_p
= 1;
3734 if (abi
== ABI_V4
|| abi
== ABI_NT
|| abi
== ABI_SOLARIS
)
3735 info_ptr
->cr_size
= reg_size
;
3738 /* Determine various sizes */
3739 info_ptr
->reg_size
= reg_size
;
3740 info_ptr
->fixed_size
= RS6000_SAVE_AREA
;
3741 info_ptr
->varargs_size
= RS6000_VARARGS_AREA
;
3742 info_ptr
->vars_size
= RS6000_ALIGN (get_frame_size (), 8);
3743 info_ptr
->parm_size
= RS6000_ALIGN (current_function_outgoing_args_size
, 8);
3744 info_ptr
->fpmem_size
= (info_ptr
->fpmem_p
) ? 8 : 0;
3745 info_ptr
->save_size
= RS6000_ALIGN (info_ptr
->fp_size
3749 + info_ptr
->toc_size
3750 + info_ptr
->main_size
, 8);
3752 /* Calculate the offsets */
3760 case ABI_AIX_NODESC
:
3761 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
3762 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
3763 info_ptr
->main_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->main_size
;
3764 info_ptr
->cr_save_offset
= reg_size
; /* first word when 64-bit. */
3765 info_ptr
->lr_save_offset
= 2*reg_size
;
3770 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
3771 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
3772 info_ptr
->cr_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->cr_size
;
3773 info_ptr
->toc_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->toc_size
;
3774 info_ptr
->main_save_offset
= info_ptr
->toc_save_offset
- info_ptr
->main_size
;
3775 info_ptr
->lr_save_offset
= reg_size
;
3779 info_ptr
->lr_save_offset
= -reg_size
;
3780 info_ptr
->toc_save_offset
= info_ptr
->lr_save_offset
- info_ptr
->lr_size
;
3781 info_ptr
->cr_save_offset
= info_ptr
->toc_save_offset
- info_ptr
->toc_size
;
3782 info_ptr
->gp_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->cr_size
- info_ptr
->gp_size
+ reg_size
;
3783 info_ptr
->fp_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->fp_size
;
3784 if (info_ptr
->fp_size
&& ((- info_ptr
->fp_save_offset
) % 8) != 0)
3785 info_ptr
->fp_save_offset
-= reg_size
;
3787 info_ptr
->main_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->main_size
;
3791 /* Ensure that fpmem_offset will be aligned to an 8-byte boundary. */
3792 if (info_ptr
->fpmem_p
3793 && (info_ptr
->main_save_offset
- info_ptr
->fpmem_size
) % 8)
3794 info_ptr
->fpmem_size
+= reg_size
;
3796 total_raw_size
= (info_ptr
->vars_size
3797 + info_ptr
->parm_size
3798 + info_ptr
->fpmem_size
3799 + info_ptr
->save_size
3800 + info_ptr
->varargs_size
3801 + info_ptr
->fixed_size
);
3803 info_ptr
->total_size
= RS6000_ALIGN (total_raw_size
, ABI_STACK_BOUNDARY
/ BITS_PER_UNIT
);
3805 /* Determine if we need to allocate any stack frame:
3807 For AIX we need to push the stack if a frame pointer is needed (because
3808 the stack might be dynamically adjusted), if we are debugging, if we
3809 make calls, or if the sum of fp_save, gp_save, fpmem, and local variables
3810 are more than the space needed to save all non-volatile registers:
3811 32-bit: 18*8 + 19*4 = 220 or 64-bit: 18*8 + 18*8 = 288 (GPR13 reserved).
3813 For V.4 we don't have the stack cushion that AIX uses, but assume that
3814 the debugger can handle stackless frames. */
3816 if (info_ptr
->calls_p
)
3817 info_ptr
->push_p
= 1;
3819 else if (abi
== ABI_V4
|| abi
== ABI_NT
|| abi
== ABI_SOLARIS
)
3820 info_ptr
->push_p
= (total_raw_size
> info_ptr
->fixed_size
3821 || (abi
== ABI_NT
? info_ptr
->lr_save_p
3822 : info_ptr
->calls_p
));
3825 info_ptr
->push_p
= (frame_pointer_needed
3826 || write_symbols
!= NO_DEBUG
3827 || ((total_raw_size
- info_ptr
->fixed_size
)
3828 > (TARGET_32BIT
? 220 : 288)));
3830 if (info_ptr
->fpmem_p
)
3832 info_ptr
->fpmem_offset
= info_ptr
->main_save_offset
- info_ptr
->fpmem_size
;
3833 rs6000_fpmem_size
= info_ptr
->fpmem_size
;
3834 rs6000_fpmem_offset
= (info_ptr
->push_p
3835 ? info_ptr
->total_size
+ info_ptr
->fpmem_offset
3836 : info_ptr
->fpmem_offset
);
3839 info_ptr
->fpmem_offset
= 0;
3841 /* Zero offsets if we're not saving those registers */
3842 if (info_ptr
->fp_size
== 0)
3843 info_ptr
->fp_save_offset
= 0;
3845 if (info_ptr
->gp_size
== 0)
3846 info_ptr
->gp_save_offset
= 0;
3848 if (!info_ptr
->lr_save_p
)
3849 info_ptr
->lr_save_offset
= 0;
3851 if (!info_ptr
->cr_save_p
)
3852 info_ptr
->cr_save_offset
= 0;
3854 if (!info_ptr
->toc_save_p
)
3855 info_ptr
->toc_save_offset
= 0;
3857 if (!info_ptr
->main_save_p
)
3858 info_ptr
->main_save_offset
= 0;
3864 debug_stack_info (info
)
3865 rs6000_stack_t
*info
;
3867 const char *abi_string
;
3870 info
= rs6000_stack_info ();
3872 fprintf (stderr
, "\nStack information for function %s:\n",
3873 ((current_function_decl
&& DECL_NAME (current_function_decl
))
3874 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl
))
3879 default: abi_string
= "Unknown"; break;
3880 case ABI_NONE
: abi_string
= "NONE"; break;
3881 case ABI_AIX
: abi_string
= "AIX"; break;
3882 case ABI_AIX_NODESC
: abi_string
= "AIX"; break;
3883 case ABI_V4
: abi_string
= "V.4"; break;
3884 case ABI_SOLARIS
: abi_string
= "Solaris"; break;
3885 case ABI_NT
: abi_string
= "NT"; break;
3888 fprintf (stderr
, "\tABI = %5s\n", abi_string
);
3890 if (info
->first_gp_reg_save
!= 32)
3891 fprintf (stderr
, "\tfirst_gp_reg_save = %5d\n", info
->first_gp_reg_save
);
3893 if (info
->first_fp_reg_save
!= 64)
3894 fprintf (stderr
, "\tfirst_fp_reg_save = %5d\n", info
->first_fp_reg_save
);
3896 if (info
->lr_save_p
)
3897 fprintf (stderr
, "\tlr_save_p = %5d\n", info
->lr_save_p
);
3899 if (info
->cr_save_p
)
3900 fprintf (stderr
, "\tcr_save_p = %5d\n", info
->cr_save_p
);
3902 if (info
->toc_save_p
)
3903 fprintf (stderr
, "\ttoc_save_p = %5d\n", info
->toc_save_p
);
3906 fprintf (stderr
, "\tpush_p = %5d\n", info
->push_p
);
3909 fprintf (stderr
, "\tcalls_p = %5d\n", info
->calls_p
);
3912 fprintf (stderr
, "\tmain_p = %5d\n", info
->main_p
);
3914 if (info
->main_save_p
)
3915 fprintf (stderr
, "\tmain_save_p = %5d\n", info
->main_save_p
);
3918 fprintf (stderr
, "\tfpmem_p = %5d\n", info
->fpmem_p
);
3920 if (info
->gp_save_offset
)
3921 fprintf (stderr
, "\tgp_save_offset = %5d\n", info
->gp_save_offset
);
3923 if (info
->fp_save_offset
)
3924 fprintf (stderr
, "\tfp_save_offset = %5d\n", info
->fp_save_offset
);
3926 if (info
->lr_save_offset
)
3927 fprintf (stderr
, "\tlr_save_offset = %5d\n", info
->lr_save_offset
);
3929 if (info
->cr_save_offset
)
3930 fprintf (stderr
, "\tcr_save_offset = %5d\n", info
->cr_save_offset
);
3932 if (info
->toc_save_offset
)
3933 fprintf (stderr
, "\ttoc_save_offset = %5d\n", info
->toc_save_offset
);
3935 if (info
->varargs_save_offset
)
3936 fprintf (stderr
, "\tvarargs_save_offset = %5d\n", info
->varargs_save_offset
);
3938 if (info
->main_save_offset
)
3939 fprintf (stderr
, "\tmain_save_offset = %5d\n", info
->main_save_offset
);
3941 if (info
->fpmem_offset
)
3942 fprintf (stderr
, "\tfpmem_offset = %5d\n", info
->fpmem_offset
);
3944 if (info
->total_size
)
3945 fprintf (stderr
, "\ttotal_size = %5d\n", info
->total_size
);
3947 if (info
->varargs_size
)
3948 fprintf (stderr
, "\tvarargs_size = %5d\n", info
->varargs_size
);
3950 if (info
->vars_size
)
3951 fprintf (stderr
, "\tvars_size = %5d\n", info
->vars_size
);
3953 if (info
->parm_size
)
3954 fprintf (stderr
, "\tparm_size = %5d\n", info
->parm_size
);
3956 if (info
->fpmem_size
)
3957 fprintf (stderr
, "\tfpmem_size = %5d\n", info
->fpmem_size
);
3959 if (info
->fixed_size
)
3960 fprintf (stderr
, "\tfixed_size = %5d\n", info
->fixed_size
);
3963 fprintf (stderr
, "\tgp_size = %5d\n", info
->gp_size
);
3966 fprintf (stderr
, "\tfp_size = %5d\n", info
->fp_size
);
3969 fprintf (stderr
, "\tlr_size = %5d\n", info
->cr_size
);
3972 fprintf (stderr
, "\tcr_size = %5d\n", info
->cr_size
);
3975 fprintf (stderr
, "\ttoc_size = %5d\n", info
->toc_size
);
3977 if (info
->main_size
)
3978 fprintf (stderr
, "\tmain_size = %5d\n", info
->main_size
);
3980 if (info
->save_size
)
3981 fprintf (stderr
, "\tsave_size = %5d\n", info
->save_size
);
3983 if (info
->reg_size
!= 4)
3984 fprintf (stderr
, "\treg_size = %5d\n", info
->reg_size
);
3986 fprintf (stderr
, "\n");
3989 /* Write out an instruction to load the TOC_TABLE address into register 30.
3990 This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is
3994 rs6000_output_load_toc_table (file
, reg
)
4001 if (TARGET_RELOCATABLE
)
4003 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
4004 fprintf (file
, "\tbl ");
4005 assemble_name (file
, buf
);
4006 fprintf (file
, "\n");
4008 /* possibly create the toc section */
4009 if (!toc_initialized
)
4012 function_section (current_function_decl
);
4015 /* If not first call in this function, we need to put the
4016 different between .LCTOC1 and the address we get to right
4017 after the bl. It will mess up disassembling the instructions
4018 but that can't be helped. We will later need to bias the
4019 address before loading. */
4020 if (rs6000_pic_func_labelno
!= rs6000_pic_labelno
)
4022 const char *init_ptr
= TARGET_32BIT
? ".long" : ".quad";
4023 const char *buf_ptr
;
4025 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCL", rs6000_pic_labelno
);
4027 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 1);
4028 STRIP_NAME_ENCODING (buf_ptr
, buf
);
4029 fprintf (file
, "\t%s %s-", init_ptr
, buf_ptr
);
4031 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
4032 fprintf (file
, "%s\n", buf_ptr
);
4035 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCF", rs6000_pic_labelno
);
4036 fprintf (file
, "\tmflr %s\n", reg_names
[reg
]);
4038 if (rs6000_pic_func_labelno
!= rs6000_pic_labelno
)
4039 asm_fprintf(file
, "\t{cal|la} %s,%d(%s)\n", reg_names
[reg
],
4040 (TARGET_32BIT
? 4 : 8), reg_names
[reg
]);
4042 asm_fprintf (file
, (TARGET_32BIT
) ? "\t{l|lwz} %s,(" : "\tld %s,(",
4044 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCL", rs6000_pic_labelno
);
4045 assemble_name (file
, buf
);
4047 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
4048 assemble_name (file
, buf
);
4049 fprintf (file
, ")(%s)\n", reg_names
[reg
]);
4050 asm_fprintf (file
, "\t{cax|add} %s,%s,%s\n",
4051 reg_names
[reg
], reg_names
[0], reg_names
[reg
]);
4052 rs6000_pic_labelno
++;
4054 else if (! TARGET_64BIT
)
4056 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 1);
4057 asm_fprintf (file
, "\t{liu|lis} %s,", reg_names
[reg
]);
4058 assemble_name (file
, buf
);
4059 fputs ("@ha\n", file
);
4060 asm_fprintf (file
, "\t{cal|la} %s,", reg_names
[reg
]);
4061 assemble_name (file
, buf
);
4062 asm_fprintf (file
, "@l(%s)\n", reg_names
[reg
]);
4067 #else /* !USING_SVR4_H */
4068 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 0);
4069 asm_fprintf (file
, TARGET_32BIT
? "\t{l|lwz} %s," : "\tld %s,",
4071 assemble_name (file
, buf
);
4072 asm_fprintf (file
, "(%s)\n", reg_names
[2]);
4073 #endif /* USING_SVR4_H */
4077 /* Emit the correct code for allocating stack space. If COPY_R12, make sure a copy
4078 of the old frame is left in r12. */
4081 rs6000_allocate_stack_space (file
, size
, copy_r12
)
4086 int neg_size
= -size
;
4091 (TARGET_32BIT
) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n",
4092 reg_names
[1], neg_size
, reg_names
[1]);
4096 fprintf (file
, "\tmr %s,%s\n", reg_names
[12], reg_names
[1]);
4098 asm_fprintf (file
, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n",
4099 reg_names
[0], (neg_size
>> 16) & 0xffff,
4100 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
4102 (TARGET_32BIT
) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n",
4103 reg_names
[1], reg_names
[1], reg_names
[0]);
4108 fprintf (file
, "\tmr %s,%s\n", reg_names
[12], reg_names
[1]);
4110 asm_fprintf (file
, "\t{cal|la} %s,%d(%s)\n",
4111 reg_names
[1], neg_size
, reg_names
[1]);
4114 asm_fprintf (file
, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n",
4115 reg_names
[0], (neg_size
>> 16) & 0xffff,
4116 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
4117 asm_fprintf (file
, "\t{cax|add} %s,%s,%s\n", reg_names
[1],
4118 reg_names
[0], reg_names
[1]);
4122 (TARGET_32BIT
) ? "\t{st|stw} %s,0(%s)\n" : "\tstd %s,0(%s)\n",
4123 reg_names
[12], reg_names
[1]);
4128 /* Write function prologue. */
4130 output_prolog (file
, size
)
4132 int size ATTRIBUTE_UNUSED
;
4134 rs6000_stack_t
*info
= rs6000_stack_info ();
4135 int reg_size
= info
->reg_size
;
4136 const char *store_reg
;
4137 const char *load_reg
;
4143 store_reg
= "\t{st|stw} %s,%d(%s)\n";
4144 load_reg
= "\t{l|lwz} %s,%d(%s)\n";
4148 store_reg
= "\tstd %s,%d(%s)\n";
4149 load_reg
= "\tlld %s,%d(%s)\n";
4152 if (TARGET_DEBUG_STACK
)
4153 debug_stack_info (info
);
4155 /* Write .extern for any function we will call to save and restore fp
4157 if (info
->first_fp_reg_save
< 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
4158 fprintf (file
, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
4159 SAVE_FP_PREFIX
, info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
,
4160 RESTORE_FP_PREFIX
, info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
4162 /* Write .extern for truncation routines, if needed. */
4163 if (rs6000_trunc_used
&& ! trunc_defined
)
4165 fprintf (file
, "\t.extern .%s\n\t.extern .%s\n",
4166 RS6000_ITRUNC
, RS6000_UITRUNC
);
4170 /* Write .extern for AIX common mode routines, if needed. */
4171 if (! TARGET_POWER
&& ! TARGET_POWERPC
&& ! common_mode_defined
)
4173 fputs ("\t.extern __mulh\n", file
);
4174 fputs ("\t.extern __mull\n", file
);
4175 fputs ("\t.extern __divss\n", file
);
4176 fputs ("\t.extern __divus\n", file
);
4177 fputs ("\t.extern __quoss\n", file
);
4178 fputs ("\t.extern __quous\n", file
);
4179 common_mode_defined
= 1;
4182 /* For V.4, update stack before we do any saving and set back pointer. */
4183 if (info
->push_p
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
4185 if (info
->total_size
< 32767)
4186 sp_offset
= info
->total_size
;
4189 rs6000_allocate_stack_space (file
, info
->total_size
, sp_reg
== 12);
4192 /* If we use the link register, get it into r0. */
4193 if (info
->lr_save_p
)
4194 asm_fprintf (file
, "\tmflr %s\n", reg_names
[0]);
4196 /* If we need to save CR, put it into r12. */
4197 if (info
->cr_save_p
&& sp_reg
!= 12)
4198 asm_fprintf (file
, "\tmfcr %s\n", reg_names
[12]);
4200 /* Do any required saving of fpr's. If only one or two to save, do it
4201 ourself. Otherwise, call function. Note that since they are statically
4202 linked, we do not need a nop following them. */
4203 if (FP_SAVE_INLINE (info
->first_fp_reg_save
))
4205 int regno
= info
->first_fp_reg_save
;
4206 int loc
= info
->fp_save_offset
+ sp_offset
;
4208 for ( ; regno
< 64; regno
++, loc
+= 8)
4209 asm_fprintf (file
, "\tstfd %s,%d(%s)\n", reg_names
[regno
], loc
, reg_names
[sp_reg
]);
4211 else if (info
->first_fp_reg_save
!= 64)
4212 asm_fprintf (file
, "\tbl %s%d%s\n", SAVE_FP_PREFIX
,
4213 info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
);
4215 /* Now save gpr's. */
4216 if (! TARGET_MULTIPLE
|| info
->first_gp_reg_save
== 31 || TARGET_64BIT
)
4218 int regno
= info
->first_gp_reg_save
;
4219 int loc
= info
->gp_save_offset
+ sp_offset
;
4221 for ( ; regno
< 32; regno
++, loc
+= reg_size
)
4222 asm_fprintf (file
, store_reg
, reg_names
[regno
], loc
, reg_names
[sp_reg
]);
4225 else if (info
->first_gp_reg_save
!= 32)
4226 asm_fprintf (file
, "\t{stm|stmw} %s,%d(%s)\n",
4227 reg_names
[info
->first_gp_reg_save
],
4228 info
->gp_save_offset
+ sp_offset
,
4231 /* Save main's arguments if we need to call a function */
4233 if (info
->main_save_p
)
4236 int loc
= info
->main_save_offset
+ sp_offset
;
4237 int size
= info
->main_size
;
4239 for (regno
= 3; size
> 0; regno
++, loc
+= reg_size
, size
-= reg_size
)
4240 asm_fprintf (file
, store_reg
, reg_names
[regno
], loc
, reg_names
[sp_reg
]);
4244 /* Save lr if we used it. */
4245 if (info
->lr_save_p
)
4246 asm_fprintf (file
, store_reg
, reg_names
[0], info
->lr_save_offset
+ sp_offset
,
4249 /* Save CR if we use any that must be preserved. */
4250 if (info
->cr_save_p
)
4252 if (sp_reg
== 12) /* If r12 is used to hold the original sp, copy cr now */
4254 asm_fprintf (file
, "\tmfcr %s\n", reg_names
[0]);
4255 asm_fprintf (file
, store_reg
, reg_names
[0],
4256 info
->cr_save_offset
+ sp_offset
,
4260 asm_fprintf (file
, store_reg
, reg_names
[12], info
->cr_save_offset
+ sp_offset
,
4264 /* If we need PIC_OFFSET_TABLE_REGNUM, initialize it now */
4265 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
4266 && flag_pic
== 1 && regs_ever_live
[PIC_OFFSET_TABLE_REGNUM
])
4268 if (!info
->lr_save_p
)
4269 asm_fprintf (file
, "\tmflr %s\n", reg_names
[0]);
4271 fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file
);
4272 asm_fprintf (file
, "\tmflr %s\n", reg_names
[PIC_OFFSET_TABLE_REGNUM
]);
4274 if (!info
->lr_save_p
)
4275 asm_fprintf (file
, "\tmtlr %s\n", reg_names
[0]);
4278 /* NT needs us to probe the stack frame every 4k pages for large frames, so
4280 if (DEFAULT_ABI
== ABI_NT
&& info
->total_size
> 4096)
4282 if (info
->total_size
< 32768)
4284 int probe_offset
= 4096;
4285 while (probe_offset
< info
->total_size
)
4287 asm_fprintf (file
, "\t{l|lwz} %s,%d(%s)\n", reg_names
[0], -probe_offset
, reg_names
[1]);
4288 probe_offset
+= 4096;
4293 int probe_iterations
= info
->total_size
/ 4096;
4294 static int probe_labelno
= 0;
4297 if (probe_iterations
< 32768)
4298 asm_fprintf (file
, "\tli %s,%d\n", reg_names
[12], probe_iterations
);
4301 asm_fprintf (file
, "\tlis %s,%d\n", reg_names
[12], probe_iterations
>> 16);
4302 if (probe_iterations
& 0xffff)
4303 asm_fprintf (file
, "\tori %s,%s,%d\n", reg_names
[12], reg_names
[12],
4304 probe_iterations
& 0xffff);
4306 asm_fprintf (file
, "\tmtctr %s\n", reg_names
[12]);
4307 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[12], reg_names
[1]);
4308 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCprobe", probe_labelno
);
4309 asm_fprintf (file
, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names
[0], reg_names
[12]);
4310 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCprobe", probe_labelno
++);
4311 fputs ("\tbdnz ", file
);
4312 assemble_name (file
, buf
);
4317 /* Update stack and set back pointer unless this is V.4, which was done previously */
4318 if (info
->push_p
&& DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
4319 rs6000_allocate_stack_space (file
, info
->total_size
, FALSE
);
4321 /* Set frame pointer, if needed. */
4322 if (frame_pointer_needed
)
4323 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[31], reg_names
[1]);
4326 /* If we need to call a function to set things up for main, do so now
4327 before dealing with the TOC. */
4330 const char *prefix
= "";
4332 switch (DEFAULT_ABI
)
4334 case ABI_AIX
: prefix
= "."; break;
4335 case ABI_NT
: prefix
= ".."; break;
4338 fprintf (file
, "\tbl %s%s\n", prefix
, NAME__MAIN
);
4339 #ifdef RS6000_CALL_GLUE2
4340 fprintf (file
, "\t%s%s%s\n", RS6000_CALL_GLUE2
, prefix
, NAME_MAIN
);
4342 #ifdef RS6000_CALL_GLUE
4343 if (DEFAULT_ABI
== ABI_AIX
|| DEFAULT_ABI
== ABI_NT
)
4346 asm_fprintf (file
, RS6000_CALL_GLUE
);
4352 if (info
->main_save_p
)
4356 int size
= info
->main_size
;
4358 if (info
->total_size
< 32767)
4360 loc
= info
->total_size
+ info
->main_save_offset
;
4361 for (regno
= 3; size
> 0; regno
++, size
-= reg_size
, loc
+= reg_size
)
4362 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[1]);
4366 int neg_size
= info
->main_save_offset
- info
->total_size
;
4368 asm_fprintf (file
, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n",
4369 reg_names
[0], (neg_size
>> 16) & 0xffff,
4370 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
4372 asm_fprintf (file
, "\t{sf|subf} %s,%s,%s\n", reg_names
[0], reg_names
[0],
4375 for (regno
= 3; size
> 0; regno
++, size
-= reg_size
, loc
+= reg_size
)
4376 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[0]);
4383 /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the
4384 TOC_TABLE address into register 30. */
4385 if (TARGET_TOC
&& TARGET_MINIMAL_TOC
&& get_pool_size () != 0)
4389 rs6000_pic_func_labelno
= rs6000_pic_labelno
;
4391 rs6000_output_load_toc_table (file
, 30);
4394 if (DEFAULT_ABI
== ABI_NT
)
4396 assemble_name (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
4397 fputs (".b:\n", file
);
4401 /* Write function epilogue. */
4404 output_epilog (file
, size
)
4406 int size ATTRIBUTE_UNUSED
;
4408 rs6000_stack_t
*info
= rs6000_stack_info ();
4409 const char *load_reg
= (TARGET_32BIT
) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n";
4410 rtx insn
= get_last_insn ();
4414 /* If the last insn was a BARRIER, we don't have to write anything except
4416 if (GET_CODE (insn
) == NOTE
)
4417 insn
= prev_nonnote_insn (insn
);
4418 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
4420 /* If we have a frame pointer, a call to alloca, or a large stack
4421 frame, restore the old stack pointer using the backchain. Otherwise,
4422 we know what size to update it with. */
4423 if (frame_pointer_needed
|| current_function_calls_alloca
4424 || info
->total_size
> 32767)
4426 /* Under V.4, don't reset the stack pointer until after we're done
4427 loading the saved registers. */
4428 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
4431 asm_fprintf (file
, load_reg
, reg_names
[sp_reg
], 0, reg_names
[1]);
4433 else if (info
->push_p
)
4435 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
4436 sp_offset
= info
->total_size
;
4438 asm_fprintf (file
, "\t{cal|la} %s,%d(%s)\n",
4439 reg_names
[1], info
->total_size
, reg_names
[1]);
4442 /* Get the old lr if we saved it. */
4443 if (info
->lr_save_p
)
4444 asm_fprintf (file
, load_reg
, reg_names
[0], info
->lr_save_offset
+ sp_offset
, reg_names
[sp_reg
]);
4446 /* Get the old cr if we saved it. */
4447 if (info
->cr_save_p
)
4448 asm_fprintf (file
, load_reg
, reg_names
[12], info
->cr_save_offset
+ sp_offset
, reg_names
[sp_reg
]);
4450 /* Set LR here to try to overlap restores below. */
4451 if (info
->lr_save_p
)
4452 asm_fprintf (file
, "\tmtlr %s\n", reg_names
[0]);
4454 /* Restore gpr's. */
4455 if (! TARGET_MULTIPLE
|| info
->first_gp_reg_save
== 31 || TARGET_64BIT
)
4457 int regno
= info
->first_gp_reg_save
;
4458 int loc
= info
->gp_save_offset
+ sp_offset
;
4459 int reg_size
= (TARGET_32BIT
) ? 4 : 8;
4461 for ( ; regno
< 32; regno
++, loc
+= reg_size
)
4462 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[sp_reg
]);
4465 else if (info
->first_gp_reg_save
!= 32)
4466 asm_fprintf (file
, "\t{lm|lmw} %s,%d(%s)\n",
4467 reg_names
[info
->first_gp_reg_save
],
4468 info
->gp_save_offset
+ sp_offset
,
4471 /* Restore fpr's if we can do it without calling a function. */
4472 if (FP_SAVE_INLINE (info
->first_fp_reg_save
))
4474 int regno
= info
->first_fp_reg_save
;
4475 int loc
= info
->fp_save_offset
+ sp_offset
;
4477 for ( ; regno
< 64; regno
++, loc
+= 8)
4478 asm_fprintf (file
, "\tlfd %s,%d(%s)\n", reg_names
[regno
], loc
, reg_names
[sp_reg
]);
4481 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4
4483 if (info
->cr_save_p
)
4484 asm_fprintf (file
, "\tmtcrf %d,%s\n",
4485 (regs_ever_live
[70] != 0) * 0x20
4486 + (regs_ever_live
[71] != 0) * 0x10
4487 + (regs_ever_live
[72] != 0) * 0x8, reg_names
[12]);
4489 /* If this is V.4, unwind the stack pointer after all of the loads
4492 asm_fprintf (file
, "\t{cal|la} %s,%d(%s)\n",
4493 reg_names
[1], sp_offset
, reg_names
[1]);
4494 else if (sp_reg
!= 1)
4495 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[1], reg_names
[sp_reg
]);
4497 /* If we have to restore more than two FP registers, branch to the
4498 restore function. It will return to our caller. */
4499 if (info
->first_fp_reg_save
!= 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
4500 asm_fprintf (file
, "\tb %s%d%s\n", RESTORE_FP_PREFIX
,
4501 info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
4503 asm_fprintf (file
, "\t{br|blr}\n");
4506 /* Output a traceback table here. See /usr/include/sys/debug.h for info
4509 We don't output a traceback table if -finhibit-size-directive was
4510 used. The documentation for -finhibit-size-directive reads
4511 ``don't output a @code{.size} assembler directive, or anything
4512 else that would cause trouble if the function is split in the
4513 middle, and the two halves are placed at locations far apart in
4514 memory.'' The traceback table has this property, since it
4515 includes the offset from the start of the function to the
4516 traceback table itself.
4518 System V.4 Powerpc's (and the embedded ABI derived from it) use a
4519 different traceback table. */
4520 if (DEFAULT_ABI
== ABI_AIX
&& ! flag_inhibit_size_directive
)
4522 char *fname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
4523 int fixed_parms
, float_parms
, parm_info
;
4526 while (*fname
== '.') /* V.4 encodes . in the name */
4529 /* Need label immediately before tbtab, so we can compute its offset
4530 from the function start. */
4533 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
4534 ASM_OUTPUT_LABEL (file
, fname
);
4536 /* The .tbtab pseudo-op can only be used for the first eight
4537 expressions, since it can't handle the possibly variable
4538 length fields that follow. However, if you omit the optional
4539 fields, the assembler outputs zeros for all optional fields
4540 anyways, giving each variable length field is minimum length
4541 (as defined in sys/debug.h). Thus we can not use the .tbtab
4542 pseudo-op at all. */
4544 /* An all-zero word flags the start of the tbtab, for debuggers
4545 that have to find it by searching forward from the entry
4546 point or from the current pc. */
4547 fputs ("\t.long 0\n", file
);
4549 /* Tbtab format type. Use format type 0. */
4550 fputs ("\t.byte 0,", file
);
4552 /* Language type. Unfortunately, there doesn't seem to be any
4553 official way to get this info, so we use language_string. C
4554 is 0. C++ is 9. No number defined for Obj-C, so use the
4555 value for C for now. There is no official value for Java,
4556 although IBM appears to be using 13. There is no official value
4557 for Chill, so we've choosen 44 pseudo-randomly. */
4558 if (! strcmp (language_string
, "GNU C")
4559 || ! strcmp (language_string
, "GNU Obj-C"))
4561 else if (! strcmp (language_string
, "GNU F77"))
4563 else if (! strcmp (language_string
, "GNU Ada"))
4565 else if (! strcmp (language_string
, "GNU Pascal"))
4567 else if (! strcmp (language_string
, "GNU C++"))
4569 else if (! strcmp (language_string
, "GNU Java"))
4571 else if (! strcmp (language_string
, "GNU CHILL"))
4575 fprintf (file
, "%d,", i
);
4577 /* 8 single bit fields: global linkage (not set for C extern linkage,
4578 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
4579 from start of procedure stored in tbtab, internal function, function
4580 has controlled storage, function has no toc, function uses fp,
4581 function logs/aborts fp operations. */
4582 /* Assume that fp operations are used if any fp reg must be saved. */
4583 fprintf (file
, "%d,", (1 << 5) | ((info
->first_fp_reg_save
!= 64) << 1));
4585 /* 6 bitfields: function is interrupt handler, name present in
4586 proc table, function calls alloca, on condition directives
4587 (controls stack walks, 3 bits), saves condition reg, saves
4589 /* The `function calls alloca' bit seems to be set whenever reg 31 is
4590 set up as a frame pointer, even when there is no alloca call. */
4591 fprintf (file
, "%d,",
4592 ((1 << 6) | (frame_pointer_needed
<< 5)
4593 | (info
->cr_save_p
<< 1) | (info
->lr_save_p
)));
4595 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
4597 fprintf (file
, "%d,",
4598 (info
->push_p
<< 7) | (64 - info
->first_fp_reg_save
));
4600 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
4601 fprintf (file
, "%d,", (32 - first_reg_to_save ()));
4604 /* Compute the parameter info from the function decl argument
4607 int next_parm_info_bit
;
4609 next_parm_info_bit
= 31;
4614 for (decl
= DECL_ARGUMENTS (current_function_decl
);
4615 decl
; decl
= TREE_CHAIN (decl
))
4617 rtx parameter
= DECL_INCOMING_RTL (decl
);
4618 enum machine_mode mode
= GET_MODE (parameter
);
4620 if (GET_CODE (parameter
) == REG
)
4622 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
4630 else if (mode
== DFmode
)
4635 /* If only one bit will fit, don't or in this entry. */
4636 if (next_parm_info_bit
> 0)
4637 parm_info
|= (bits
<< (next_parm_info_bit
- 1));
4638 next_parm_info_bit
-= 2;
4642 fixed_parms
+= ((GET_MODE_SIZE (mode
)
4643 + (UNITS_PER_WORD
- 1))
4645 next_parm_info_bit
-= 1;
4651 /* Number of fixed point parameters. */
4652 /* This is actually the number of words of fixed point parameters; thus
4653 an 8 byte struct counts as 2; and thus the maximum value is 8. */
4654 fprintf (file
, "%d,", fixed_parms
);
4656 /* 2 bitfields: number of floating point parameters (7 bits), parameters
4658 /* This is actually the number of fp registers that hold parameters;
4659 and thus the maximum value is 13. */
4660 /* Set parameters on stack bit if parameters are not in their original
4661 registers, regardless of whether they are on the stack? Xlc
4662 seems to set the bit when not optimizing. */
4663 fprintf (file
, "%d\n", ((float_parms
<< 1) | (! optimize
)));
4665 /* Optional fields follow. Some are variable length. */
4667 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
4669 /* There is an entry for each parameter in a register, in the order that
4670 they occur in the parameter list. Any intervening arguments on the
4671 stack are ignored. If the list overflows a long (max possible length
4672 34 bits) then completely leave off all elements that don't fit. */
4673 /* Only emit this long if there was at least one parameter. */
4674 if (fixed_parms
|| float_parms
)
4675 fprintf (file
, "\t.long %d\n", parm_info
);
4677 /* Offset from start of code to tb table. */
4678 fputs ("\t.long ", file
);
4679 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
4680 RS6000_OUTPUT_BASENAME (file
, fname
);
4682 RS6000_OUTPUT_BASENAME (file
, fname
);
4685 /* Interrupt handler mask. */
4686 /* Omit this long, since we never set the interrupt handler bit
4689 /* Number of CTL (controlled storage) anchors. */
4690 /* Omit this long, since the has_ctl bit is never set above. */
4692 /* Displacement into stack of each CTL anchor. */
4693 /* Omit this list of longs, because there are no CTL anchors. */
4695 /* Length of function name. */
4696 fprintf (file
, "\t.short %d\n", (int) strlen (fname
));
4698 /* Function name. */
4699 assemble_string (fname
, strlen (fname
));
4701 /* Register for alloca automatic storage; this is always reg 31.
4702 Only emit this if the alloca bit was set above. */
4703 if (frame_pointer_needed
)
4704 fputs ("\t.byte 31\n", file
);
4707 if (DEFAULT_ABI
== ABI_NT
)
4709 RS6000_OUTPUT_BASENAME (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
4710 fputs (".e:\nFE_MOT_RESVD..", file
);
4711 RS6000_OUTPUT_BASENAME (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
4712 fputs (":\n", file
);
4716 /* A C compound statement that outputs the assembler code for a thunk function,
4717 used to implement C++ virtual function calls with multiple inheritance. The
4718 thunk acts as a wrapper around a virtual function, adjusting the implicit
4719 object parameter before handing control off to the real function.
4721 First, emit code to add the integer DELTA to the location that contains the
4722 incoming first argument. Assume that this argument contains a pointer, and
4723 is the one used to pass the `this' pointer in C++. This is the incoming
4724 argument *before* the function prologue, e.g. `%o0' on a sparc. The
4725 addition must preserve the values of all other incoming arguments.
4727 After the addition, emit code to jump to FUNCTION, which is a
4728 `FUNCTION_DECL'. This is a direct pure jump, not a call, and does not touch
4729 the return address. Hence returning from FUNCTION will return to whoever
4730 called the current `thunk'.
4732 The effect must be as if FUNCTION had been called directly with the adjusted
4733 first argument. This macro is responsible for emitting all of the code for
4734 a thunk function; `FUNCTION_PROLOGUE' and `FUNCTION_EPILOGUE' are not
4737 The THUNK_FNDECL is redundant. (DELTA and FUNCTION have already been
4738 extracted from it.) It might possibly be useful on some targets, but
4741 If you do not define this macro, the target-independent code in the C++
4742 frontend will generate a less efficient heavyweight thunk that calls
4743 FUNCTION instead of jumping to it. The generic approach does not support
4747 output_mi_thunk (file
, thunk_fndecl
, delta
, function
)
4749 tree thunk_fndecl ATTRIBUTE_UNUSED
;
4753 const char *this_reg
= reg_names
[ aggregate_value_p (TREE_TYPE (TREE_TYPE (function
))) ? 4 : 3 ];
4756 const char *r0
= reg_names
[0];
4757 const char *sp
= reg_names
[1];
4758 const char *toc
= reg_names
[2];
4759 const char *schain
= reg_names
[11];
4760 const char *r12
= reg_names
[12];
4762 static int labelno
= 0;
4764 /* Small constants that can be done by one add instruction */
4765 if (delta
>= -32768 && delta
<= 32767)
4767 if (! TARGET_NEW_MNEMONICS
)
4768 fprintf (file
, "\tcal %s,%d(%s)\n", this_reg
, delta
, this_reg
);
4770 fprintf (file
, "\taddi %s,%s,%d\n", this_reg
, this_reg
, delta
);
4773 /* Large constants that can be done by one addis instruction */
4774 else if ((delta
& 0xffff) == 0 && num_insns_constant_wide (delta
) == 1)
4775 asm_fprintf (file
, "\t{cau|addis} %s,%s,%d\n", this_reg
, this_reg
,
4778 /* 32-bit constants that can be done by an add and addis instruction. */
4779 else if (TARGET_32BIT
|| num_insns_constant_wide (delta
) == 1)
4781 /* Break into two pieces, propagating the sign bit from the low word to
4783 int delta_high
= delta
>> 16;
4784 int delta_low
= delta
& 0xffff;
4785 if ((delta_low
& 0x8000) != 0)
4788 delta_low
= (delta_low
^ 0x8000) - 0x8000; /* sign extend */
4791 asm_fprintf (file
, "\t{cau|addis} %s,%s,%d\n", this_reg
, this_reg
,
4794 if (! TARGET_NEW_MNEMONICS
)
4795 fprintf (file
, "\tcal %s,%d(%s)\n", this_reg
, delta_low
, this_reg
);
4797 fprintf (file
, "\taddi %s,%s,%d\n", this_reg
, this_reg
, delta_low
);
4800 /* 64-bit constants, fixme */
4804 /* Get the prefix in front of the names. */
4805 switch (DEFAULT_ABI
)
4815 case ABI_AIX_NODESC
:
4825 /* If the function is compiled in this module, jump to it directly.
4826 Otherwise, load up its address and jump to it. */
4828 fname
= XSTR (XEXP (DECL_RTL (function
), 0), 0);
4830 if (current_file_function_operand (XEXP (DECL_RTL (function
), 0))
4831 && ! lookup_attribute ("longcall",
4832 TYPE_ATTRIBUTES (TREE_TYPE (function
))))
4834 fprintf (file
, "\tb %s", prefix
);
4835 assemble_name (file
, fname
);
4836 if (DEFAULT_ABI
== ABI_V4
&& flag_pic
) fputs ("@local", file
);
4842 switch (DEFAULT_ABI
)
4849 /* Set up a TOC entry for the function. */
4850 ASM_GENERATE_INTERNAL_LABEL (buf
, "Lthunk", labelno
);
4852 ASM_OUTPUT_INTERNAL_LABEL (file
, "Lthunk", labelno
);
4855 /* Note, MINIMAL_TOC doesn't make sense in the case of a thunk, since
4856 there will be only one TOC entry for this function. */
4857 fputs ("\t.tc\t", file
);
4858 assemble_name (file
, buf
);
4859 fputs ("[TC],", file
);
4860 assemble_name (file
, buf
);
4863 asm_fprintf (file
, (TARGET_32BIT
) ? "\t{l|lwz} %s," : "\tld %s", r12
);
4864 assemble_name (file
, buf
);
4865 asm_fprintf (file
, "(%s)\n", reg_names
[2]);
4867 (TARGET_32BIT
) ? "\t{l|lwz} %s,0(%s)\n" : "\tld %s,0(%s)\n",
4871 (TARGET_32BIT
) ? "\t{l|lwz} %s,4(%s)\n" : "\tld %s,8(%s)\n",
4874 asm_fprintf (file
, "\tmtctr %s\n", r0
);
4876 (TARGET_32BIT
) ? "\t{l|lwz} %s,8(%s)\n" : "\tld %s,16(%s)\n",
4879 asm_fprintf (file
, "\tbctr\n");
4883 fprintf (file
, "\tb %s", prefix
);
4884 assemble_name (file
, fname
);
4885 if (flag_pic
) fputs ("@plt", file
);
4889 /* Don't use r11, that contains the static chain, just use r0/r12. */
4890 case ABI_AIX_NODESC
:
4894 fprintf (file
, "\tmflr %s\n", r0
);
4895 fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file
);
4896 asm_fprintf (file
, "\tmflr %s\n", r12
);
4897 asm_fprintf (file
, "\tmtlr %s\n", r0
);
4898 asm_fprintf (file
, "\t{l|lwz} %s,", r0
);
4899 assemble_name (file
, fname
);
4900 asm_fprintf (file
, "@got(%s)\n", r12
);
4901 asm_fprintf (file
, "\tmtctr %s\n", r0
);
4902 asm_fprintf (file
, "\tbctr\n");
4905 else if (flag_pic
> 1 || TARGET_RELOCATABLE
)
4907 ASM_GENERATE_INTERNAL_LABEL (buf
, "Lthunk", labelno
);
4909 fprintf (file
, "\tmflr %s\n", r0
);
4910 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n", r0
, sp
);
4911 rs6000_pic_func_labelno
= rs6000_pic_labelno
;
4912 rs6000_output_load_toc_table (file
, 12);
4913 asm_fprintf (file
, "\t{l|lwz} %s,", r0
);
4914 assemble_name (file
, buf
);
4915 asm_fprintf (file
, "(%s)\n", r12
);
4916 asm_fprintf (file
, "\t{l|lwz} %s,4(%s)\n", r12
, sp
);
4917 asm_fprintf (file
, "\tmtlr %s\n", r12
);
4918 asm_fprintf (file
, "\tmtctr %s\n", r0
);
4919 asm_fprintf (file
, "\tbctr\n");
4920 asm_fprintf (file
, "%s\n", MINIMAL_TOC_SECTION_ASM_OP
);
4921 assemble_name (file
, buf
);
4922 fputs (" = .-.LCTOC1\n", file
);
4923 fputs ("\t.long ", file
);
4924 assemble_name (file
, fname
);
4925 fputs ("\n\t.previous\n", file
);
4927 #endif /* TARGET_ELF */
4931 asm_fprintf (file
, "\t{liu|lis} %s,", r12
);
4932 assemble_name (file
, fname
);
4933 asm_fprintf (file
, "@ha\n");
4934 asm_fprintf (file
, "\t{cal|la} %s,", r12
);
4935 assemble_name (file
, fname
);
4936 asm_fprintf (file
, "@l(%s)\n", r12
);
4937 asm_fprintf (file
, "\tmtctr %s\n", r12
);
4938 asm_fprintf (file
, "\tbctr\n");
4947 /* Output a TOC entry. We derive the entry name from what is
4951 output_toc (file
, x
, labelno
)
4958 const char *real_name
;
4965 /* if we're going to put a double constant in the TOC, make sure it's
4966 aligned properly when strict alignment is on. */
4967 if (GET_CODE (x
) == CONST_DOUBLE
4969 && GET_MODE (x
) == DFmode
4970 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
)) {
4971 ASM_OUTPUT_ALIGN (file
, 3);
4975 if (TARGET_ELF
&& TARGET_MINIMAL_TOC
)
4977 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LC");
4978 fprintf (file
, "%d = .-", labelno
);
4979 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LCTOC");
4980 fputs ("1\n", file
);
4983 ASM_OUTPUT_INTERNAL_LABEL (file
, "LC", labelno
);
4985 /* Handle FP constants specially. Note that if we have a minimal
4986 TOC, things we put here aren't actually in the TOC, so we can allow
4988 if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == DFmode
4989 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
4994 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
4995 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
4999 if (TARGET_MINIMAL_TOC
)
5000 fprintf (file
, "\t.llong 0x%lx%08lx\n", k
[0], k
[1]);
5002 fprintf (file
, "\t.tc FD_%lx_%lx[TC],0x%lx%08lx\n",
5003 k
[0], k
[1], k
[0] & 0xffffffff, k
[1] & 0xffffffff);
5008 if (TARGET_MINIMAL_TOC
)
5009 fprintf (file
, "\t.long 0x%lx\n\t.long 0x%lx\n", k
[0], k
[1]);
5011 fprintf (file
, "\t.tc FD_%lx_%lx[TC],0x%lx,0x%lx\n",
5012 k
[0], k
[1], k
[0], k
[1]);
5016 else if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == SFmode
5017 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
5022 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
5023 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
5027 if (TARGET_MINIMAL_TOC
)
5028 fprintf (file
, "\t.llong 0x%lx00000000\n", l
);
5030 fprintf (file
, "\t.tc FS_%lx[TC],0x%lx00000000\n", l
, l
);
5035 if (TARGET_MINIMAL_TOC
)
5036 fprintf (file
, "\t.long 0x%lx\n", l
);
5038 fprintf (file
, "\t.tc FS_%lx[TC],0x%lx\n", l
, l
);
5042 else if (GET_MODE (x
) == DImode
5043 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
5044 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
5049 if (GET_CODE (x
) == CONST_DOUBLE
)
5051 low
= CONST_DOUBLE_LOW (x
);
5052 high
= CONST_DOUBLE_HIGH (x
);
5055 #if HOST_BITS_PER_WIDE_INT == 32
5058 high
= (low
< 0) ? ~0 : 0;
5062 low
= INTVAL (x
) & 0xffffffff;
5063 high
= (HOST_WIDE_INT
) INTVAL (x
) >> 32;
5069 if (TARGET_MINIMAL_TOC
)
5070 fprintf (file
, "\t.llong 0x%lx%08lx\n", (long)high
, (long)low
);
5072 fprintf (file
, "\t.tc ID_%lx_%lx[TC],0x%lx%08lx\n",
5073 (long)high
, (long)low
, (long)high
, (long)low
);
5078 if (TARGET_MINIMAL_TOC
)
5079 fprintf (file
, "\t.long 0x%lx\n\t.long 0x%lx\n",
5080 (long)high
, (long)low
);
5082 fprintf (file
, "\t.tc ID_%lx_%lx[TC],0x%lx,0x%lx\n",
5083 (long)high
, (long)low
, (long)high
, (long)low
);
5088 if (GET_CODE (x
) == CONST
)
5090 base
= XEXP (XEXP (x
, 0), 0);
5091 offset
= INTVAL (XEXP (XEXP (x
, 0), 1));
5094 if (GET_CODE (base
) == SYMBOL_REF
)
5095 name
= XSTR (base
, 0);
5096 else if (GET_CODE (base
) == LABEL_REF
)
5097 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (XEXP (base
, 0)));
5098 else if (GET_CODE (base
) == CODE_LABEL
)
5099 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (base
));
5103 STRIP_NAME_ENCODING (real_name
, name
);
5104 if (TARGET_MINIMAL_TOC
)
5105 fputs (TARGET_32BIT
? "\t.long " : "\t.llong ", file
);
5108 fprintf (file
, "\t.tc %s", real_name
);
5111 fprintf (file
, ".N%d", - offset
);
5113 fprintf (file
, ".P%d", offset
);
5115 fputs ("[TC],", file
);
5118 /* Currently C++ toc references to vtables can be emitted before it
5119 is decided whether the vtable is public or private. If this is
5120 the case, then the linker will eventually complain that there is
5121 a TOC reference to an unknown section. Thus, for vtables only,
5122 we emit the TOC reference to reference the symbol and not the
5124 if (!strncmp ("_vt.", name
, 4))
5126 RS6000_OUTPUT_BASENAME (file
, name
);
5128 fprintf (file
, "%d", offset
);
5129 else if (offset
> 0)
5130 fprintf (file
, "+%d", offset
);
5133 output_addr_const (file
, x
);
5137 /* Output an assembler pseudo-op to write an ASCII string of N characters
5138 starting at P to FILE.
5140 On the RS/6000, we have to do this using the .byte operation and
5141 write out special characters outside the quoted string.
5142 Also, the assembler is broken; very long strings are truncated,
5143 so we must artificially break them up early. */
5146 output_ascii (file
, p
, n
)
5152 int i
, count_string
;
5153 const char *for_string
= "\t.byte \"";
5154 const char *for_decimal
= "\t.byte ";
5155 const char *to_close
= NULL
;
5158 for (i
= 0; i
< n
; i
++)
5161 if (c
>= ' ' && c
< 0177)
5164 fputs (for_string
, file
);
5167 /* Write two quotes to get one. */
5175 for_decimal
= "\"\n\t.byte ";
5179 if (count_string
>= 512)
5181 fputs (to_close
, file
);
5183 for_string
= "\t.byte \"";
5184 for_decimal
= "\t.byte ";
5192 fputs (for_decimal
, file
);
5193 fprintf (file
, "%d", c
);
5195 for_string
= "\n\t.byte \"";
5202 /* Now close the string if we have written one. Then end the line. */
5204 fprintf (file
, to_close
);
5207 /* Generate a unique section name for FILENAME for a section type
5208 represented by SECTION_DESC. Output goes into BUF.
5210 SECTION_DESC can be any string, as long as it is different for each
5211 possible section type.
5213 We name the section in the same manner as xlc. The name begins with an
5214 underscore followed by the filename (after stripping any leading directory
5215 names) with the last period replaced by the string SECTION_DESC. If
5216 FILENAME does not contain a period, SECTION_DESC is appended to the end of
5220 rs6000_gen_section_name (buf
, filename
, section_desc
)
5225 char *q
, *after_last_slash
, *last_period
= 0;
5229 after_last_slash
= filename
;
5230 for (q
= filename
; *q
; q
++)
5233 after_last_slash
= q
+ 1;
5238 len
= strlen (after_last_slash
) + strlen (section_desc
) + 2;
5239 *buf
= (char *) permalloc (len
);
5244 for (q
= after_last_slash
; *q
; q
++)
5246 if (q
== last_period
)
5248 strcpy (p
, section_desc
);
5249 p
+= strlen (section_desc
);
5252 else if (ISALNUM (*q
))
5256 if (last_period
== 0)
5257 strcpy (p
, section_desc
);
5262 /* Write function profiler code. */
5265 output_function_profiler (file
, labelno
)
5269 /* The last used parameter register. */
5274 ASM_GENERATE_INTERNAL_LABEL (buf
, "LP", labelno
);
5275 switch (DEFAULT_ABI
)
5282 case ABI_AIX_NODESC
:
5283 fprintf (file
, "\tmflr %s\n", reg_names
[0]);
5286 fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file
);
5287 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n",
5288 reg_names
[0], reg_names
[1]);
5289 asm_fprintf (file
, "\tmflr %s\n", reg_names
[12]);
5290 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[0]);
5291 assemble_name (file
, buf
);
5292 asm_fprintf (file
, "@got(%s)\n", reg_names
[12]);
5295 else if (flag_pic
> 1 || TARGET_RELOCATABLE
)
5297 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n",
5298 reg_names
[0], reg_names
[1]);
5299 rs6000_pic_func_labelno
= rs6000_pic_labelno
;
5300 rs6000_output_load_toc_table (file
, 12);
5301 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[12]);
5302 assemble_name (file
, buf
);
5303 asm_fprintf (file
, "X(%s)\n", reg_names
[12]);
5304 asm_fprintf (file
, "%s\n", MINIMAL_TOC_SECTION_ASM_OP
);
5305 assemble_name (file
, buf
);
5306 fputs ("X = .-.LCTOC1\n", file
);
5307 fputs ("\t.long ", file
);
5308 assemble_name (file
, buf
);
5309 fputs ("\n\t.previous\n", file
);
5314 asm_fprintf (file
, "\t{liu|lis} %s,", reg_names
[12]);
5315 assemble_name (file
, buf
);
5316 fputs ("@ha\n", file
);
5317 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n",
5318 reg_names
[0], reg_names
[1]);
5319 asm_fprintf (file
, "\t{cal|la} %s,", reg_names
[0]);
5320 assemble_name (file
, buf
);
5321 asm_fprintf (file
, "@l(%s)\n", reg_names
[12]);
5324 if (current_function_needs_context
)
5325 asm_fprintf (file
, "\tmr %s,%s\n",
5326 reg_names
[30], reg_names
[STATIC_CHAIN_REGNUM
]);
5327 fprintf (file
, "\tbl %s\n", RS6000_MCOUNT
);
5328 if (current_function_needs_context
)
5329 asm_fprintf (file
, "\tmr %s,%s\n",
5330 reg_names
[STATIC_CHAIN_REGNUM
], reg_names
[30]);
5334 /* Set up a TOC entry for the profiler label. */
5336 ASM_OUTPUT_INTERNAL_LABEL (file
, "LPC", labelno
);
5337 if (TARGET_MINIMAL_TOC
)
5339 fputs (TARGET_32BIT
? "\t.long " : "\t.llong ", file
);
5340 assemble_name (file
, buf
);
5345 fputs ("\t.tc\t", file
);
5346 assemble_name (file
, buf
);
5347 fputs ("[TC],", file
);
5348 assemble_name (file
, buf
);
5353 /* Figure out last used parameter register. The proper thing to do is
5354 to walk incoming args of the function. A function might have live
5355 parameter registers even if it has no incoming args. */
5357 for (last_parm_reg
= 10;
5358 last_parm_reg
> 2 && ! regs_ever_live
[last_parm_reg
];
5362 /* Save parameter registers in regs 23-30 and static chain in r22.
5363 Don't overwrite reg 31, since it might be set up as the frame pointer. */
5365 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
5366 asm_fprintf (file
, "\tmr %d,%d\n", j
, i
);
5367 if (current_function_needs_context
)
5368 asm_fprintf (file
, "\tmr %d,%d\n", j
, STATIC_CHAIN_REGNUM
);
5370 /* Load location address into r3, and call mcount. */
5372 ASM_GENERATE_INTERNAL_LABEL (buf
, "LPC", labelno
);
5373 asm_fprintf (file
, TARGET_32BIT
? "\t{l|lwz} %s," : "\tld %s,",
5375 assemble_name (file
, buf
);
5376 asm_fprintf (file
, "(%s)\n\tbl %s\n\t", reg_names
[2], RS6000_MCOUNT
);
5377 asm_fprintf (file
, RS6000_CALL_GLUE
);
5380 /* Restore parameter registers and static chain. */
5382 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
5383 asm_fprintf (file
, "\tmr %d,%d\n", i
, j
);
5384 if (current_function_needs_context
)
5385 asm_fprintf (file
, "\tmr %d,%d\n", STATIC_CHAIN_REGNUM
, j
);
5391 /* Adjust the cost of a scheduling dependency. Return the new cost of
5392 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
5395 rs6000_adjust_cost (insn
, link
, dep_insn
, cost
)
5398 rtx dep_insn ATTRIBUTE_UNUSED
;
5401 if (! recog_memoized (insn
))
5404 if (REG_NOTE_KIND (link
) != 0)
5407 if (REG_NOTE_KIND (link
) == 0)
5409 /* Data dependency; DEP_INSN writes a register that INSN reads some
5412 /* Tell the first scheduling pass about the latency between a mtctr
5413 and bctr (and mtlr and br/blr). The first scheduling pass will not
5414 know about this latency since the mtctr instruction, which has the
5415 latency associated to it, will be generated by reload. */
5416 if (get_attr_type (insn
) == TYPE_JMPREG
)
5417 return TARGET_POWER
? 5 : 4;
5419 /* Fall out to return default cost. */
5425 /* A C statement (sans semicolon) to update the integer scheduling priority
5426 INSN_PRIORITY (INSN). Reduce the priority to execute the INSN earlier,
5427 increase the priority to execute INSN later. Do not define this macro if
5428 you do not need to adjust the scheduling priorities of insns. */
5431 rs6000_adjust_priority (insn
, priority
)
5432 rtx insn ATTRIBUTE_UNUSED
;
5435 /* On machines (like the 750) which have asymetric integer units, where one
5436 integer unit can do multiply and divides and the other can't, reduce the
5437 priority of multiply/divide so it is scheduled before other integer
5441 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
5444 if (GET_CODE (PATTERN (insn
)) == USE
)
5447 switch (rs6000_cpu_attr
) {
5449 switch (get_attr_type (insn
))
5456 fprintf (stderr
, "priority was %#x (%d) before adjustment\n",
5457 priority
, priority
);
5458 if (priority
>= 0 && priority
< 0x01000000)
5468 /* Return how many instructions the machine can issue per cycle */
5469 int get_issue_rate()
5471 switch (rs6000_cpu_attr
) {
5472 case CPU_RIOS1
: /* ? */
5474 case CPU_PPC601
: /* ? */
5491 /* Output assembler code for a block containing the constant parts
5492 of a trampoline, leaving space for the variable parts.
5494 The trampoline should set the static chain pointer to value placed
5495 into the trampoline and should branch to the specified routine. */
5498 rs6000_trampoline_template (file
)
5501 const char *sc
= reg_names
[STATIC_CHAIN_REGNUM
];
5502 const char *r0
= reg_names
[0];
5503 const char *r2
= reg_names
[2];
5505 switch (DEFAULT_ABI
)
5510 /* Under AIX, this is not code at all, but merely a data area,
5511 since that is the way all functions are called. The first word is
5512 the address of the function, the second word is the TOC pointer (r2),
5513 and the third word is the static chain value. */
5518 /* V.4/eabi function pointers are just a single pointer, so we need to
5519 do the full gory code to load up the static chain. */
5522 case ABI_AIX_NODESC
:
5525 /* NT function pointers point to a two word area (real address, TOC)
5526 which unfortunately does not include a static chain field. So we
5527 use the function field to point to ..LTRAMP1 and the toc field
5528 to point to the whole table. */
5530 if (STATIC_CHAIN_REGNUM
== 0
5531 || STATIC_CHAIN_REGNUM
== 2
5533 || !TARGET_NEW_MNEMONICS
)
5536 fprintf (file
, "\t.ualong 0\n"); /* offset 0 */
5537 fprintf (file
, "\t.ualong 0\n"); /* offset 4 */
5538 fprintf (file
, "\t.ualong 0\n"); /* offset 8 */
5539 fprintf (file
, "\t.ualong 0\n"); /* offset 12 */
5540 fprintf (file
, "\t.ualong 0\n"); /* offset 16 */
5541 fprintf (file
, "..LTRAMP1..0:\n"); /* offset 20 */
5542 fprintf (file
, "\tlwz %s,8(%s)\n", r0
, r2
); /* offset 24 */
5543 fprintf (file
, "\tlwz %s,12(%s)\n", sc
, r2
); /* offset 28 */
5544 fprintf (file
, "\tmtctr %s\n", r0
); /* offset 32 */
5545 fprintf (file
, "\tlwz %s,16(%s)\n", r2
, r2
); /* offset 36 */
5546 fprintf (file
, "\tbctr\n"); /* offset 40 */
5553 /* Length in units of the trampoline for entering a nested function. */
5556 rs6000_trampoline_size ()
5560 switch (DEFAULT_ABI
)
5566 ret
= (TARGET_32BIT
) ? 12 : 24;
5571 case ABI_AIX_NODESC
:
5572 ret
= (TARGET_32BIT
) ? 40 : 48;
5583 /* Emit RTL insns to initialize the variable parts of a trampoline.
5584 FNADDR is an RTX for the address of the function's pure code.
5585 CXT is an RTX for the static chain value for the function. */
5588 rs6000_initialize_trampoline (addr
, fnaddr
, cxt
)
5593 enum machine_mode pmode
= Pmode
;
5594 int regsize
= (TARGET_32BIT
) ? 4 : 8;
5595 rtx ctx_reg
= force_reg (pmode
, cxt
);
5597 switch (DEFAULT_ABI
)
5602 /* Macros to shorten the code expansions below. */
5603 #define MEM_DEREF(addr) gen_rtx_MEM (pmode, memory_address (pmode, addr))
5604 #define MEM_PLUS(addr,offset) \
5605 gen_rtx_MEM (pmode, memory_address (pmode, plus_constant (addr, offset)))
5607 /* Under AIX, just build the 3 word function descriptor */
5610 rtx fn_reg
= gen_reg_rtx (pmode
);
5611 rtx toc_reg
= gen_reg_rtx (pmode
);
5612 emit_move_insn (fn_reg
, MEM_DEREF (fnaddr
));
5613 emit_move_insn (toc_reg
, MEM_PLUS (fnaddr
, 4));
5614 emit_move_insn (MEM_DEREF (addr
), fn_reg
);
5615 emit_move_insn (MEM_PLUS (addr
, regsize
), toc_reg
);
5616 emit_move_insn (MEM_PLUS (addr
, 2*regsize
), ctx_reg
);
5620 /* Under V.4/eabi, call __trampoline_setup to do the real work. */
5623 case ABI_AIX_NODESC
:
5624 emit_library_call (gen_rtx_SYMBOL_REF (SImode
, "__trampoline_setup"),
5627 GEN_INT (rs6000_trampoline_size ()), SImode
,
5632 /* Under NT, update the first word to point to the ..LTRAMP1..0 header,
5633 the second word will point to the whole trampoline, third-fifth words
5634 will then have the real address, static chain, and toc value. */
5637 rtx tramp_reg
= gen_reg_rtx (pmode
);
5638 rtx fn_reg
= gen_reg_rtx (pmode
);
5639 rtx toc_reg
= gen_reg_rtx (pmode
);
5641 emit_move_insn (tramp_reg
, gen_rtx_SYMBOL_REF (pmode
, "..LTRAMP1..0"));
5642 addr
= force_reg (pmode
, addr
);
5643 emit_move_insn (fn_reg
, MEM_DEREF (fnaddr
));
5644 emit_move_insn (toc_reg
, MEM_PLUS (fnaddr
, regsize
));
5645 emit_move_insn (MEM_DEREF (addr
), tramp_reg
);
5646 emit_move_insn (MEM_PLUS (addr
, regsize
), addr
);
5647 emit_move_insn (MEM_PLUS (addr
, 2*regsize
), fn_reg
);
5648 emit_move_insn (MEM_PLUS (addr
, 3*regsize
), ctx_reg
);
5649 emit_move_insn (MEM_PLUS (addr
, 4*regsize
), gen_rtx_REG (pmode
, 2));
5658 /* If defined, a C expression whose value is nonzero if IDENTIFIER
5659 with arguments ARGS is a valid machine specific attribute for DECL.
5660 The attributes in ATTRIBUTES have previously been assigned to DECL. */
5663 rs6000_valid_decl_attribute_p (decl
, attributes
, identifier
, args
)
5664 tree decl ATTRIBUTE_UNUSED
;
5665 tree attributes ATTRIBUTE_UNUSED
;
5666 tree identifier ATTRIBUTE_UNUSED
;
5667 tree args ATTRIBUTE_UNUSED
;
5672 /* If defined, a C expression whose value is nonzero if IDENTIFIER
5673 with arguments ARGS is a valid machine specific attribute for TYPE.
5674 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
5677 rs6000_valid_type_attribute_p (type
, attributes
, identifier
, args
)
5679 tree attributes ATTRIBUTE_UNUSED
;
5683 if (TREE_CODE (type
) != FUNCTION_TYPE
5684 && TREE_CODE (type
) != FIELD_DECL
5685 && TREE_CODE (type
) != TYPE_DECL
)
5688 /* Longcall attribute says that the function is not within 2**26 bytes
5689 of the current function, and to do an indirect call. */
5690 if (is_attribute_p ("longcall", identifier
))
5691 return (args
== NULL_TREE
);
5693 if (DEFAULT_ABI
== ABI_NT
)
5695 /* Stdcall attribute says callee is responsible for popping arguments
5696 if they are not variable. */
5697 if (is_attribute_p ("stdcall", identifier
))
5698 return (args
== NULL_TREE
);
5700 /* Cdecl attribute says the callee is a normal C declaration */
5701 if (is_attribute_p ("cdecl", identifier
))
5702 return (args
== NULL_TREE
);
5704 /* Dllimport attribute says the caller is to call the function
5705 indirectly through a __imp_<name> pointer. */
5706 if (is_attribute_p ("dllimport", identifier
))
5707 return (args
== NULL_TREE
);
5709 /* Dllexport attribute says the callee is to create a __imp_<name>
5711 if (is_attribute_p ("dllexport", identifier
))
5712 return (args
== NULL_TREE
);
5714 /* Exception attribute allows the user to specify 1-2 strings
5715 or identifiers that will fill in the 3rd and 4th fields
5716 of the structured exception table. */
5717 if (is_attribute_p ("exception", identifier
))
5721 if (args
== NULL_TREE
)
5724 for (i
= 0; i
< 2 && args
!= NULL_TREE
; i
++)
5726 tree this_arg
= TREE_VALUE (args
);
5727 args
= TREE_PURPOSE (args
);
5729 if (TREE_CODE (this_arg
) != STRING_CST
5730 && TREE_CODE (this_arg
) != IDENTIFIER_NODE
)
5734 return (args
== NULL_TREE
);
5741 /* If defined, a C expression whose value is zero if the attributes on
5742 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
5743 two if they are nearly compatible (which causes a warning to be
5747 rs6000_comp_type_attributes (type1
, type2
)
5748 tree type1 ATTRIBUTE_UNUSED
;
5749 tree type2 ATTRIBUTE_UNUSED
;
5754 /* If defined, a C statement that assigns default attributes to newly
5758 rs6000_set_default_type_attributes (type
)
5759 tree type ATTRIBUTE_UNUSED
;
5764 /* Return a dll import reference corresponding to a call's SYMBOL_REF */
5766 rs6000_dll_import_ref (call_ref
)
5769 const char *call_name
;
5775 if (GET_CODE (call_ref
) != SYMBOL_REF
)
5778 call_name
= XSTR (call_ref
, 0);
5779 len
= sizeof ("__imp_") + strlen (call_name
);
5781 reg2
= gen_reg_rtx (Pmode
);
5783 strcpy (p
, "__imp_");
5784 strcat (p
, call_name
);
5785 node
= get_identifier (p
);
5787 reg1
= force_reg (Pmode
, gen_rtx_SYMBOL_REF (VOIDmode
,
5788 IDENTIFIER_POINTER (node
)));
5789 emit_move_insn (reg2
, gen_rtx_MEM (Pmode
, reg1
));
5794 /* Return a reference suitable for calling a function with the
5795 longcall attribute. */
5797 rs6000_longcall_ref (call_ref
)
5800 const char *call_name
;
5803 if (GET_CODE (call_ref
) != SYMBOL_REF
)
5806 /* System V adds '.' to the internal name, so skip them. */
5807 call_name
= XSTR (call_ref
, 0);
5808 if (*call_name
== '.')
5810 while (*call_name
== '.')
5813 node
= get_identifier (call_name
);
5814 call_ref
= gen_rtx_SYMBOL_REF (VOIDmode
, IDENTIFIER_POINTER (node
));
5817 return force_reg (Pmode
, call_ref
);
5821 /* A C statement or statements to switch to the appropriate section
5822 for output of RTX in mode MODE. You can assume that RTX is some
5823 kind of constant in RTL. The argument MODE is redundant except in
5824 the case of a `const_int' rtx. Select the section by calling
5825 `text_section' or one of the alternatives for other sections.
5827 Do not define this macro if you put all constants in the read-only
5833 rs6000_select_rtx_section (mode
, x
)
5834 enum machine_mode mode ATTRIBUTE_UNUSED
;
5837 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x
))
5843 /* A C statement or statements to switch to the appropriate
5844 section for output of DECL. DECL is either a `VAR_DECL' node
5845 or a constant of some sort. RELOC indicates whether forming
5846 the initial value of DECL requires link-time relocations. */
5849 rs6000_select_section (decl
, reloc
)
5853 int size
= int_size_in_bytes (TREE_TYPE (decl
));
5855 if (TREE_CODE (decl
) == STRING_CST
)
5857 if (! flag_writable_strings
)
5862 else if (TREE_CODE (decl
) == VAR_DECL
)
5864 if ((flag_pic
&& reloc
)
5865 || ! TREE_READONLY (decl
)
5866 || TREE_SIDE_EFFECTS (decl
)
5867 || ! DECL_INITIAL (decl
)
5868 || (DECL_INITIAL (decl
) != error_mark_node
5869 && ! TREE_CONSTANT (DECL_INITIAL (decl
))))
5871 if (rs6000_sdata
!= SDATA_NONE
&& (size
> 0)
5872 && (size
<= g_switch_value
))
5879 if (rs6000_sdata
!= SDATA_NONE
&& (size
> 0)
5880 && (size
<= g_switch_value
))
5882 if (rs6000_sdata
== SDATA_EABI
)
5885 sdata_section (); /* System V doesn't have .sdata2/.sbss2 */
5896 /* If we are referencing a function that is static or is known to be
5897 in this file, make the SYMBOL_REF special. We can use this to indicate
5898 that we can branch to this function without emitting a no-op after the
5899 call. For real AIX and NT calling sequences, we also replace the
5900 function name with the real name (1 or 2 leading .'s), rather than
5901 the function descriptor name. This saves a lot of overriding code
5902 to read the prefixes. */
5905 rs6000_encode_section_info (decl
)
5908 if (TREE_CODE (decl
) == FUNCTION_DECL
)
5910 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
5911 if ((TREE_ASM_WRITTEN (decl
) || ! TREE_PUBLIC (decl
))
5912 && !DECL_WEAK (decl
))
5913 SYMBOL_REF_FLAG (sym_ref
) = 1;
5915 if (DEFAULT_ABI
== ABI_AIX
|| DEFAULT_ABI
== ABI_NT
)
5917 const char *prefix
= (DEFAULT_ABI
== ABI_AIX
) ? "." : "..";
5918 char *str
= permalloc (strlen (prefix
) + 1
5919 + strlen (XSTR (sym_ref
, 0)));
5920 strcpy (str
, prefix
);
5921 strcat (str
, XSTR (sym_ref
, 0));
5922 XSTR (sym_ref
, 0) = str
;
5925 else if (rs6000_sdata
!= SDATA_NONE
5926 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
5927 && TREE_CODE (decl
) == VAR_DECL
)
5929 int size
= int_size_in_bytes (TREE_TYPE (decl
));
5930 tree section_name
= DECL_SECTION_NAME (decl
);
5931 const char *name
= (char *)0;
5936 if (TREE_CODE (section_name
) == STRING_CST
)
5938 name
= TREE_STRING_POINTER (section_name
);
5939 len
= TREE_STRING_LENGTH (section_name
);
5945 if ((size
> 0 && size
<= g_switch_value
)
5947 && ((len
== sizeof (".sdata") - 1
5948 && strcmp (name
, ".sdata") == 0)
5949 || (len
== sizeof (".sdata2") - 1
5950 && strcmp (name
, ".sdata2") == 0)
5951 || (len
== sizeof (".sbss") - 1
5952 && strcmp (name
, ".sbss") == 0)
5953 || (len
== sizeof (".sbss2") - 1
5954 && strcmp (name
, ".sbss2") == 0)
5955 || (len
== sizeof (".PPC.EMB.sdata0") - 1
5956 && strcmp (name
, ".PPC.EMB.sdata0") == 0)
5957 || (len
== sizeof (".PPC.EMB.sbss0") - 1
5958 && strcmp (name
, ".PPC.EMB.sbss0") == 0))))
5960 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
5961 char *str
= permalloc (2 + strlen (XSTR (sym_ref
, 0)));
5963 strcat (str
, XSTR (sym_ref
, 0));
5964 XSTR (sym_ref
, 0) = str
;
5969 #endif /* USING_SVR4_H */
5972 /* Return a REG that occurs in ADDR with coefficient 1.
5973 ADDR can be effectively incremented by incrementing REG.
5975 r0 is special and we must not select it as an address
5976 register by this routine since our caller will try to
5977 increment the returned register via an "la" instruction. */
5980 find_addr_reg (addr
)
5983 while (GET_CODE (addr
) == PLUS
)
5985 if (GET_CODE (XEXP (addr
, 0)) == REG
5986 && REGNO (XEXP (addr
, 0)) != 0)
5987 addr
= XEXP (addr
, 0);
5988 else if (GET_CODE (XEXP (addr
, 1)) == REG
5989 && REGNO (XEXP (addr
, 1)) != 0)
5990 addr
= XEXP (addr
, 1);
5991 else if (CONSTANT_P (XEXP (addr
, 0)))
5992 addr
= XEXP (addr
, 1);
5993 else if (CONSTANT_P (XEXP (addr
, 1)))
5994 addr
= XEXP (addr
, 0);
5998 if (GET_CODE (addr
) == REG
&& REGNO (addr
) != 0)
6004 rs6000_fatal_bad_address (op
)
6007 fatal_insn ("bad address", op
);
6010 /* Called to register all of our global variables with the garbage
6014 rs6000_add_gc_roots ()
6016 ggc_add_rtx_root (&rs6000_compare_op0
, 1);
6017 ggc_add_rtx_root (&rs6000_compare_op1
, 1);