1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 1993 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
25 #include "hard-reg-set.h"
27 #include "insn-config.h"
28 #include "conditions.h"
29 #include "insn-flags.h"
31 #include "insn-attr.h"
38 extern char *language_string
;
39 extern int profile_block_flag
;
41 #define min(A,B) ((A) < (B) ? (A) : (B))
42 #define max(A,B) ((A) > (B) ? (A) : (B))
46 enum processor_type rs6000_cpu
;
47 char *rs6000_cpu_string
;
49 /* Set to non-zero by "fix" operation to indicate that itrunc and
50 uitrunc must be defined. */
52 int rs6000_trunc_used
;
54 /* Set to non-zero once they have been defined. */
56 static int trunc_defined
;
58 /* Save information from a "cmpxx" operation until the branch or scc is
61 rtx rs6000_compare_op0
, rs6000_compare_op1
;
62 int rs6000_compare_fp_p
;
64 /* Override command line options. Mostly we process the processor
65 type and sometimes adjust other TARGET_ options. */
68 rs6000_override_options ()
74 char *name
; /* Canonical processor name. */
75 enum processor_type processor
; /* Processor type enum value. */
76 int target_enable
; /* Target flags to enable. */
77 int target_disable
; /* Target flags to disable. */
78 } processor_target_table
[]
79 = {{"all", PROCESSOR_DEFAULT
,
80 0, MASK_POWER
| MASK_POWERPC
| MASK_POWERPC64
},
81 {"rios", PROCESSOR_RIOS1
,
82 MASK_POWER
, MASK_POWERPC
| MASK_POWERPC64
},
83 {"rios1", PROCESSOR_RIOS1
,
84 MASK_POWER
, MASK_POWERPC
| MASK_POWERPC64
},
85 {"rios2", PROCESSOR_RIOS2
,
86 MASK_POWER
, MASK_POWERPC
| MASK_POWERPC64
},
87 {"601", PROCESSOR_PPC601
,
88 MASK_POWER
| MASK_POWERPC
| MASK_NEW_MNEMONICS
, MASK_POWERPC64
},
89 {"mpc601", PROCESSOR_PPC601
,
90 MASK_POWER
| MASK_POWERPC
| MASK_NEW_MNEMONICS
, MASK_POWERPC64
},
91 {"603", PROCESSOR_PPC603
,
92 MASK_POWERPC
| MASK_NEW_MNEMONICS
, MASK_POWER
| MASK_POWERPC64
},
93 {"mpc603", PROCESSOR_PPC603
,
94 MASK_POWERPC
| MASK_NEW_MNEMONICS
, MASK_POWER
| MASK_POWERPC64
},
95 {"604", PROCESSOR_PPC604
,
96 MASK_POWERPC
| MASK_NEW_MNEMONICS
, MASK_POWER
| MASK_POWERPC64
},
97 {"mpc604", PROCESSOR_PPC604
,
98 MASK_POWERPC
| MASK_NEW_MNEMONICS
, MASK_POWER
| MASK_POWERPC64
},
99 {"620", PROCESSOR_PPC620
,
100 MASK_POWERPC
| MASK_POWERPC64
| MASK_NEW_MNEMONICS
, MASK_POWER
},
101 {"mpc620", PROCESSOR_PPC620
,
102 MASK_POWERPC
| MASK_POWERPC64
| MASK_NEW_MNEMONICS
, MASK_POWER
}};
104 int ptt_size
= sizeof (processor_target_table
) / sizeof (struct ptt
);
106 profile_block_flag
= 0;
108 /* Identify the processor type */
109 if (rs6000_cpu_string
== 0)
110 rs6000_cpu
= PROCESSOR_DEFAULT
;
113 for (i
= 0; i
< ptt_size
; i
++)
114 if (! strcmp (rs6000_cpu_string
, processor_target_table
[i
].name
))
116 rs6000_cpu
= processor_target_table
[i
].processor
;
117 target_flags
|= processor_target_table
[i
].target_enable
;
118 target_flags
&= ~processor_target_table
[i
].target_disable
;
124 error ("bad value (%s) for -mcpu= switch", rs6000_cpu_string
);
125 rs6000_cpu_string
= "default";
126 rs6000_cpu
= PROCESSOR_DEFAULT
;
131 /* Return non-zero if this function is known to have a null epilogue. */
136 return (reload_completed
137 && first_reg_to_save () == 32
138 && first_fp_reg_to_save () == 64
139 && ! regs_ever_live
[65]
140 && ! rs6000_pushes_stack ());
143 /* Returns 1 always. */
146 any_operand (op
, mode
)
148 enum machine_mode mode
;
153 /* Return 1 if OP is a constant that can fit in a D field. */
156 short_cint_operand (op
, mode
)
158 enum machine_mode mode
;
160 return (GET_CODE (op
) == CONST_INT
161 && (unsigned) (INTVAL (op
) + 0x8000) < 0x10000);
164 /* Similar for a unsigned D field. */
167 u_short_cint_operand (op
, mode
)
169 enum machine_mode mode
;
171 return (GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff0000) == 0);
174 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
177 non_short_cint_operand (op
, mode
)
179 enum machine_mode mode
;
181 return (GET_CODE (op
) == CONST_INT
182 && (unsigned) (INTVAL (op
) + 0x8000) >= 0x10000);
185 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
189 gpc_reg_operand (op
, mode
)
191 enum machine_mode mode
;
193 return (register_operand (op
, mode
)
194 && (GET_CODE (op
) != REG
|| REGNO (op
) >= 67 || REGNO (op
) < 64));
197 /* Returns 1 if OP is either a pseudo-register or a register denoting a
201 cc_reg_operand (op
, mode
)
203 enum machine_mode mode
;
205 return (register_operand (op
, mode
)
206 && (GET_CODE (op
) != REG
207 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
208 || CR_REGNO_P (REGNO (op
))));
211 /* Returns 1 if OP is either a constant integer valid for a D-field or a
212 non-special register. If a register, it must be in the proper mode unless
216 reg_or_short_operand (op
, mode
)
218 enum machine_mode mode
;
220 return short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
223 /* Similar, except check if the negation of the constant would be valid for
227 reg_or_neg_short_operand (op
, mode
)
229 enum machine_mode mode
;
231 if (GET_CODE (op
) == CONST_INT
)
232 return CONST_OK_FOR_LETTER_P (INTVAL (op
), 'P');
234 return gpc_reg_operand (op
, mode
);
237 /* Return 1 if the operand is either a register or an integer whose high-order
241 reg_or_u_short_operand (op
, mode
)
243 enum machine_mode mode
;
245 if (GET_CODE (op
) == CONST_INT
246 && (INTVAL (op
) & 0xffff0000) == 0)
249 return gpc_reg_operand (op
, mode
);
252 /* Return 1 is the operand is either a non-special register or ANY
256 reg_or_cint_operand (op
, mode
)
258 enum machine_mode mode
;
260 return GET_CODE (op
) == CONST_INT
|| gpc_reg_operand (op
, mode
);
263 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a
264 register with one instruction per word. For SFmode, this means that
265 the low 16-bits are zero. For DFmode, it means the low 16-bits of
266 the first word are zero and the high 16 bits of the second word
267 are zero (usually all bits in the low-order word will be zero).
269 We only do this if we can safely read CONST_DOUBLE_{LOW,HIGH}. */
272 easy_fp_constant (op
, mode
)
274 register enum machine_mode mode
;
278 if (GET_CODE (op
) != CONST_DOUBLE
279 || GET_MODE (op
) != mode
280 || GET_MODE_CLASS (mode
) != MODE_FLOAT
)
283 high
= operand_subword (op
, 0, 0, mode
);
284 low
= operand_subword (op
, 1, 0, mode
);
286 if (high
== 0 || GET_CODE (high
) != CONST_INT
|| (INTVAL (high
) & 0xffff))
289 return (mode
== SFmode
290 || (low
!= 0 && GET_CODE (low
) == CONST_INT
291 && (INTVAL (low
) & 0xffff0000) == 0));
294 /* Return 1 if the operand is either a floating-point register, a pseudo
295 register, or memory. */
298 fp_reg_or_mem_operand (op
, mode
)
300 enum machine_mode mode
;
302 return (memory_operand (op
, mode
)
303 || (register_operand (op
, mode
)
304 && (GET_CODE (op
) != REG
305 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
306 || FP_REGNO_P (REGNO (op
)))));
309 /* Return 1 if the operand is either an easy FP constant (see above) or
313 mem_or_easy_const_operand (op
, mode
)
315 enum machine_mode mode
;
317 return memory_operand (op
, mode
) || easy_fp_constant (op
, mode
);
320 /* Return 1 if the operand is either a non-special register or an item
321 that can be used as the operand of an SI add insn. */
324 add_operand (op
, mode
)
326 enum machine_mode mode
;
328 return (reg_or_short_operand (op
, mode
)
329 || (GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff) == 0));
332 /* Return 1 if OP is a constant but not a valid add_operand. */
335 non_add_cint_operand (op
, mode
)
337 enum machine_mode mode
;
339 return (GET_CODE (op
) == CONST_INT
340 && (unsigned) (INTVAL (op
) + 0x8000) >= 0x10000
341 && (INTVAL (op
) & 0xffff) != 0);
344 /* Return 1 if the operand is a non-special register or a constant that
345 can be used as the operand of an OR or XOR insn on the RS/6000. */
348 logical_operand (op
, mode
)
350 enum machine_mode mode
;
352 return (gpc_reg_operand (op
, mode
)
353 || (GET_CODE (op
) == CONST_INT
354 && ((INTVAL (op
) & 0xffff0000) == 0
355 || (INTVAL (op
) & 0xffff) == 0)));
358 /* Return 1 if C is a constant that is not a logical operand (as
362 non_logical_cint_operand (op
, mode
)
364 enum machine_mode mode
;
366 return (GET_CODE (op
) == CONST_INT
367 && (INTVAL (op
) & 0xffff0000) != 0
368 && (INTVAL (op
) & 0xffff) != 0);
371 /* Return 1 if C is a constant that can be encoded in a mask on the
372 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
373 Reject all ones and all zeros, since these should have been optimized
374 away and confuse the making of MB and ME. */
384 if (c
== 0 || c
== ~0)
387 last_bit_value
= c
& 1;
389 for (i
= 1; i
< 32; i
++)
390 if (((c
>>= 1) & 1) != last_bit_value
)
391 last_bit_value
^= 1, transitions
++;
393 return transitions
<= 2;
396 /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
399 mask_operand (op
, mode
)
401 enum machine_mode mode
;
403 return GET_CODE (op
) == CONST_INT
&& mask_constant (INTVAL (op
));
406 /* Return 1 if the operand is either a non-special register or a
407 constant that can be used as the operand of an RS/6000 logical AND insn. */
410 and_operand (op
, mode
)
412 enum machine_mode mode
;
414 return (reg_or_short_operand (op
, mode
)
415 || logical_operand (op
, mode
)
416 || mask_operand (op
, mode
));
419 /* Return 1 if the operand is a constant but not a valid operand for an AND
423 non_and_cint_operand (op
, mode
)
425 enum machine_mode mode
;
427 return GET_CODE (op
) == CONST_INT
&& ! and_operand (op
, mode
);
430 /* Return 1 if the operand is a general register or memory operand. */
433 reg_or_mem_operand (op
, mode
)
435 register enum machine_mode mode
;
437 return gpc_reg_operand (op
, mode
) || memory_operand (op
, mode
);
440 /* Return 1 if the operand, used inside a MEM, is a valid first argument
441 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
445 call_operand (op
, mode
)
447 enum machine_mode mode
;
449 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
452 return (GET_CODE (op
) == SYMBOL_REF
453 || (GET_CODE (op
) == REG
&& REGNO (op
) >= FIRST_PSEUDO_REGISTER
));
457 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
461 current_file_function_operand (op
, mode
)
463 enum machine_mode mode
;
465 return (GET_CODE (op
) == SYMBOL_REF
466 && (SYMBOL_REF_FLAG (op
)
467 || op
== XEXP (DECL_RTL (current_function_decl
), 0)));
471 /* Return 1 if this operand is a valid input for a move insn. */
474 input_operand (op
, mode
)
476 enum machine_mode mode
;
478 /* Memory is always valid. */
479 if (memory_operand (op
, mode
))
482 /* For floating-point, easy constants are valid. */
483 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
485 && easy_fp_constant (op
, mode
))
488 /* For floating-point or multi-word mode, the only remaining valid type
490 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
491 || GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
492 return register_operand (op
, mode
);
494 /* The only cases left are integral modes one word or smaller (we
495 do not get called for MODE_CC values). These can be in any
497 if (register_operand (op
, mode
))
500 /* For HImode and QImode, any constant is valid. */
501 if ((mode
== HImode
|| mode
== QImode
)
502 && GET_CODE (op
) == CONST_INT
)
505 /* Otherwise, we will be doing this SET with an add, so anything valid
506 for an add will be valid. */
507 return add_operand (op
, mode
);
510 /* Return 1 if OP is a load multiple operation. It is known to be a
511 PARALLEL and the first section will be tested. */
514 load_multiple_operation (op
, mode
)
516 enum machine_mode mode
;
518 int count
= XVECLEN (op
, 0);
523 /* Perform a quick check so we don't blow up below. */
525 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
526 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
527 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
530 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
531 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
533 for (i
= 1; i
< count
; i
++)
535 rtx elt
= XVECEXP (op
, 0, i
);
537 if (GET_CODE (elt
) != SET
538 || GET_CODE (SET_DEST (elt
)) != REG
539 || GET_MODE (SET_DEST (elt
)) != SImode
540 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
541 || GET_CODE (SET_SRC (elt
)) != MEM
542 || GET_MODE (SET_SRC (elt
)) != SImode
543 || GET_CODE (XEXP (SET_SRC (elt
), 0)) != PLUS
544 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt
), 0), 0), src_addr
)
545 || GET_CODE (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != CONST_INT
546 || INTVAL (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != i
* 4)
553 /* Similar, but tests for store multiple. Here, the second vector element
554 is a CLOBBER. It will be tested later. */
557 store_multiple_operation (op
, mode
)
559 enum machine_mode mode
;
561 int count
= XVECLEN (op
, 0) - 1;
566 /* Perform a quick check so we don't blow up below. */
568 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
569 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
570 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
573 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
574 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
576 for (i
= 1; i
< count
; i
++)
578 rtx elt
= XVECEXP (op
, 0, i
+ 1);
580 if (GET_CODE (elt
) != SET
581 || GET_CODE (SET_SRC (elt
)) != REG
582 || GET_MODE (SET_SRC (elt
)) != SImode
583 || REGNO (SET_SRC (elt
)) != src_regno
+ i
584 || GET_CODE (SET_DEST (elt
)) != MEM
585 || GET_MODE (SET_DEST (elt
)) != SImode
586 || GET_CODE (XEXP (SET_DEST (elt
), 0)) != PLUS
587 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt
), 0), 0), dest_addr
)
588 || GET_CODE (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != CONST_INT
589 || INTVAL (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != i
* 4)
596 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
597 We only check the opcode against the mode of the CC value here. */
600 branch_comparison_operator (op
, mode
)
602 enum machine_mode mode
;
604 enum rtx_code code
= GET_CODE (op
);
605 enum machine_mode cc_mode
;
607 if (GET_RTX_CLASS (code
) != '<')
610 cc_mode
= GET_MODE (XEXP (op
, 0));
611 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
614 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
615 && cc_mode
== CCUNSmode
)
618 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
619 && (cc_mode
!= CCUNSmode
))
625 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
626 We check the opcode against the mode of the CC value and disallow EQ or
627 NE comparisons for integers. */
630 scc_comparison_operator (op
, mode
)
632 enum machine_mode mode
;
634 enum rtx_code code
= GET_CODE (op
);
635 enum machine_mode cc_mode
;
637 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
640 if (GET_RTX_CLASS (code
) != '<')
643 cc_mode
= GET_MODE (XEXP (op
, 0));
644 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
647 if (code
== NE
&& cc_mode
!= CCFPmode
)
650 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
651 && cc_mode
== CCUNSmode
)
654 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
655 && (cc_mode
!= CCUNSmode
))
658 if (cc_mode
== CCEQmode
&& code
!= EQ
&& code
!= NE
)
664 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
665 mask required to convert the result of a rotate insn into a shift
666 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
669 includes_lshift_p (shiftop
, andop
)
670 register rtx shiftop
;
673 int shift_mask
= (~0 << INTVAL (shiftop
));
675 return (INTVAL (andop
) & ~shift_mask
) == 0;
678 /* Similar, but for right shift. */
681 includes_rshift_p (shiftop
, andop
)
682 register rtx shiftop
;
685 unsigned shift_mask
= ~0;
687 shift_mask
>>= INTVAL (shiftop
);
689 return (INTVAL (andop
) & ~ shift_mask
) == 0;
692 /* Return the register class of a scratch register needed to copy IN into
693 or out of a register in CLASS in MODE. If it can be done directly,
694 NO_REGS is returned. */
697 secondary_reload_class (class, mode
, in
)
698 enum reg_class
class;
699 enum machine_mode mode
;
702 int regno
= true_regnum (in
);
704 if (regno
>= FIRST_PSEUDO_REGISTER
)
707 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
709 if (class == GENERAL_REGS
|| class == BASE_REGS
710 || (regno
>= 0 && INT_REGNO_P (regno
)))
713 /* Constants, memory, and FP registers can go into FP registers. */
714 if ((regno
== -1 || FP_REGNO_P (regno
))
715 && (class == FLOAT_REGS
|| class == NON_SPECIAL_REGS
))
718 /* We can copy among the CR registers. */
719 if ((class == CR_REGS
|| class == CR0_REGS
)
720 && regno
>= 0 && CR_REGNO_P (regno
))
723 /* Otherwise, we need GENERAL_REGS. */
727 /* Given a comparison operation, return the bit number in CCR to test. We
728 know this is a valid comparison.
730 SCC_P is 1 if this is for an scc. That means that %D will have been
731 used instead of %C, so the bits will be in different places.
733 Return -1 if OP isn't a valid comparison for some reason. */
740 enum rtx_code code
= GET_CODE (op
);
741 enum machine_mode cc_mode
;
745 if (GET_RTX_CLASS (code
) != '<')
748 cc_mode
= GET_MODE (XEXP (op
, 0));
749 cc_regnum
= REGNO (XEXP (op
, 0));
750 base_bit
= 4 * (cc_regnum
- 68);
752 /* In CCEQmode cases we have made sure that the result is always in the
753 third bit of the CR field. */
755 if (cc_mode
== CCEQmode
)
761 return scc_p
? base_bit
+ 3 : base_bit
+ 2;
770 /* If floating-point, we will have done a cror to put the bit in the
771 unordered position. So test that bit. For integer, this is ! LT
772 unless this is an scc insn. */
773 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
;
776 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
+ 1;
783 /* Print an operand. Recognize special options, documented below. */
786 print_operand (file
, x
, code
)
794 /* These macros test for integers and extract the low-order bits. */
796 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
797 && GET_MODE (X) == VOIDmode)
799 #define INT_LOWPART(X) \
800 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
805 /* Write out the bit number for "cror" after a call. This differs
806 between AIX 3.2 and earlier versions. */
807 fprintf (file
, "%d", RS6000_CROR_BIT_NUMBER
);
811 /* If X is a constant integer whose low-order 5 bits are zero,
812 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
813 in the AIX assembler where "sri" with a zero shift count
814 write a trash instruction. */
815 if (GET_CODE (x
) == CONST_INT
&& (INTVAL (x
) & 31) == 0)
822 /* Low-order 16 bits of constant, unsigned. */
824 output_operand_lossage ("invalid %%b value");
826 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
830 /* This is an optional cror needed for LE or GE floating-point
831 comparisons. Otherwise write nothing. */
832 if ((GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
)
833 && GET_MODE (XEXP (x
, 0)) == CCFPmode
)
835 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
837 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
838 base_bit
+ 2, base_bit
+ (GET_CODE (x
) == GE
));
843 /* Similar, except that this is for an scc, so we must be able to
844 encode the test in a single bit that is one. We do the above
845 for any LE, GE, GEU, or LEU and invert the bit for NE. */
846 if (GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
847 || GET_CODE (x
) == LEU
|| GET_CODE (x
) == GEU
)
849 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
851 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
853 base_bit
+ (GET_CODE (x
) == GE
|| GET_CODE (x
) == GEU
));
856 else if (GET_CODE (x
) == NE
)
858 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
860 fprintf (file
, "crnor %d,%d,%d\n\t", base_bit
+ 3,
861 base_bit
+ 2, base_bit
+ 2);
866 /* X is a CR register. Print the number of the third bit of the CR */
867 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
868 output_operand_lossage ("invalid %%E value");
870 fprintf(file
, "%d", 4 * (REGNO (x
) - 68) + 3);
874 /* X is a CR register. Print the shift count needed to move it
875 to the high-order four bits. */
876 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
877 output_operand_lossage ("invalid %%f value");
879 fprintf (file
, "%d", 4 * (REGNO (x
) - 68));
883 /* Similar, but print the count for the rotate in the opposite
885 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
886 output_operand_lossage ("invalid %%F value");
888 fprintf (file
, "%d", 32 - 4 * (REGNO (x
) - 68));
892 /* X is a constant integer. If it is negative, print "m",
893 otherwise print "z". This is to make a aze or ame insn. */
894 if (GET_CODE (x
) != CONST_INT
)
895 output_operand_lossage ("invalid %%G value");
896 else if (INTVAL (x
) >= 0)
903 /* If constant, output low-order five bits. Otherwise,
906 fprintf (file
, "%d", INT_LOWPART (x
) & 31);
908 print_operand (file
, x
, 0);
912 /* X must be a constant. Output the low order 5 bits plus 24. */
914 output_operand_lossage ("invalid %%H value");
916 fprintf (file
, "%d", (INT_LOWPART (x
) + 24) & 31);
920 /* Print `i' if this is a constant, else nothing. */
926 /* Write the bit number in CCR for jump. */
929 output_operand_lossage ("invalid %%j code");
931 fprintf (file
, "%d", i
);
935 /* Similar, but add one for shift count in rlinm for scc and pass
936 scc flag to `ccr_bit'. */
939 output_operand_lossage ("invalid %%J code");
941 /* If we want bit 31, write a shift count of zero, not 32. */
942 fprintf (file
, "%d", i
== 31 ? 0 : i
+ 1);
946 /* X must be a constant. Write the 1's complement of the
949 output_operand_lossage ("invalid %%k value");
951 fprintf (file
, "%d", ~ INT_LOWPART (x
));
955 /* Write second word of DImode or DFmode reference. Works on register
956 or non-indexed memory only. */
957 if (GET_CODE (x
) == REG
)
958 fprintf (file
, "%d", REGNO (x
) + 1);
959 else if (GET_CODE (x
) == MEM
)
961 /* Handle possible auto-increment. Since it is pre-increment and
962 we have already done it, we can just use an offset of four. */
963 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
964 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
965 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 4));
967 output_address (plus_constant (XEXP (x
, 0), 4));
972 /* MB value for a mask operand. */
973 if (! mask_operand (x
, VOIDmode
))
974 output_operand_lossage ("invalid %%m value");
976 val
= INT_LOWPART (x
);
978 /* If the high bit is set and the low bit is not, the value is zero.
979 If the high bit is zero, the value is the first 1 bit we find from
981 if (val
< 0 && (val
& 1) == 0)
988 for (i
= 1; i
< 32; i
++)
991 fprintf (file
, "%d", i
);
995 /* Otherwise, look for the first 0 bit from the right. The result is its
996 number plus 1. We know the low-order bit is one. */
997 for (i
= 0; i
< 32; i
++)
998 if (((val
>>= 1) & 1) == 0)
1001 /* If we ended in ...01, I would be 0. The correct value is 31, so
1003 fprintf (file
, "%d", 31 - i
);
1007 /* ME value for a mask operand. */
1008 if (! mask_operand (x
, VOIDmode
))
1009 output_operand_lossage ("invalid %%m value");
1011 val
= INT_LOWPART (x
);
1013 /* If the low bit is set and the high bit is not, the value is 31.
1014 If the low bit is zero, the value is the first 1 bit we find from
1016 if ((val
& 1) && val
>= 0)
1021 else if ((val
& 1) == 0)
1023 for (i
= 0; i
< 32; i
++)
1024 if ((val
>>= 1) & 1)
1027 /* If we had ....10, I would be 0. The result should be
1028 30, so we need 30 - i. */
1029 fprintf (file
, "%d", 30 - i
);
1033 /* Otherwise, look for the first 0 bit from the left. The result is its
1034 number minus 1. We know the high-order bit is one. */
1035 for (i
= 0; i
< 32; i
++)
1036 if ((val
<<= 1) >= 0)
1039 fprintf (file
, "%d", i
);
1043 /* Write the number of elements in the vector times 4. */
1044 if (GET_CODE (x
) != PARALLEL
)
1045 output_operand_lossage ("invalid %%N value");
1047 fprintf (file
, "%d", XVECLEN (x
, 0) * 4);
1051 /* Similar, but subtract 1 first. */
1052 if (GET_CODE (x
) != PARALLEL
)
1053 output_operand_lossage ("invalid %%N value");
1055 fprintf (file
, "%d", (XVECLEN (x
, 0) - 1) * 4);
1059 /* X is a CONST_INT that is a power of two. Output the logarithm. */
1061 || (i
= exact_log2 (INT_LOWPART (x
))) < 0)
1062 output_operand_lossage ("invalid %%p value");
1064 fprintf (file
, "%d", i
);
1068 /* The operand must be an indirect memory reference. The result
1069 is the register number. */
1070 if (GET_CODE (x
) != MEM
|| GET_CODE (XEXP (x
, 0)) != REG
1071 || REGNO (XEXP (x
, 0)) >= 32)
1072 output_operand_lossage ("invalid %%P value");
1074 fprintf (file
, "%d", REGNO (XEXP (x
, 0)));
1078 /* X is a CR register. Print the mask for `mtcrf'. */
1079 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
1080 output_operand_lossage ("invalid %%R value");
1082 fprintf (file
, "%d", 128 >> (REGNO (x
) - 68));
1086 /* Low 5 bits of 32 - value */
1088 output_operand_lossage ("invalid %%s value");
1090 fprintf (file
, "%d", (32 - INT_LOWPART (x
)) & 31);
1094 /* Low 5 bits of 31 - value */
1096 output_operand_lossage ("invalid %%S value");
1098 fprintf (file
, "%d", (31 - INT_LOWPART (x
)) & 31);
1102 /* Write 12 if this jump operation will branch if true, 4 otherwise.
1103 All floating-point operations except NE branch true and integer
1104 EQ, LT, GT, LTU and GTU also branch true. */
1105 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
1106 output_operand_lossage ("invalid %%t value");
1108 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
1109 && GET_CODE (x
) != NE
)
1110 || GET_CODE (x
) == EQ
1111 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
1112 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
1119 /* Opposite of 't': write 4 if this jump operation will branch if true,
1121 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
1122 output_operand_lossage ("invalid %%t value");
1124 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
1125 && GET_CODE (x
) != NE
)
1126 || GET_CODE (x
) == EQ
1127 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
1128 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
1135 /* High-order 16 bits of constant. */
1137 output_operand_lossage ("invalid %%u value");
1139 fprintf (file
, "0x%x", (INT_LOWPART (x
) >> 16) & 0xffff);
1143 /* Print `u' if this has an auto-increment or auto-decrement. */
1144 if (GET_CODE (x
) == MEM
1145 && (GET_CODE (XEXP (x
, 0)) == PRE_INC
1146 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
))
1151 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
1154 fprintf (file
, "%d",
1155 (INT_LOWPART (x
) & 0xffff) - 2 * (INT_LOWPART (x
) & 0x8000));
1157 print_operand (file
, x
, 0);
1161 /* If constant, low-order 16 bits of constant, unsigned.
1162 Otherwise, write normally. */
1164 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
1166 print_operand (file
, x
, 0);
1170 if (GET_CODE (x
) == MEM
1171 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x
, 0)))
1176 /* Like 'L', for third word of TImode */
1177 if (GET_CODE (x
) == REG
)
1178 fprintf (file
, "%d", REGNO (x
) + 2);
1179 else if (GET_CODE (x
) == MEM
)
1181 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
1182 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
1183 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 8));
1185 output_address (plus_constant (XEXP (x
, 0), 8));
1190 /* X is a SYMBOL_REF. Write out the name preceded by a
1191 period and without any trailing data in brackets. Used for function
1193 if (GET_CODE (x
) != SYMBOL_REF
)
1197 RS6000_OUTPUT_BASENAME (file
, XSTR (x
, 0));
1201 /* Like 'L', for last word of TImode. */
1202 if (GET_CODE (x
) == REG
)
1203 fprintf (file
, "%d", REGNO (x
) + 3);
1204 else if (GET_CODE (x
) == MEM
)
1206 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
1207 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
1208 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 12));
1210 output_address (plus_constant (XEXP (x
, 0), 12));
1215 if (GET_CODE (x
) == REG
)
1216 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
1217 else if (GET_CODE (x
) == MEM
)
1219 /* We need to handle PRE_INC and PRE_DEC here, since we need to
1220 know the width from the mode. */
1221 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
)
1222 fprintf (file
, "%d(%d)", GET_MODE_SIZE (GET_MODE (x
)),
1223 REGNO (XEXP (XEXP (x
, 0), 0)));
1224 else if (GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
1225 fprintf (file
, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x
)),
1226 REGNO (XEXP (XEXP (x
, 0), 0)));
1228 output_address (XEXP (x
, 0));
1231 output_addr_const (file
, x
);
1235 output_operand_lossage ("invalid %%xn code");
1239 /* Print the address of an operand. */
1242 print_operand_address (file
, x
)
1246 if (GET_CODE (x
) == REG
)
1247 fprintf (file
, "0(%d)", REGNO (x
));
1248 else if (GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == CONST
)
1250 output_addr_const (file
, x
);
1251 /* When TARGET_MINIMAL_TOC, use the indirected toc table pointer instead
1252 of the toc pointer. */
1253 if (TARGET_MINIMAL_TOC
)
1254 fprintf (file
, "(30)");
1256 fprintf (file
, "(2)");
1258 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == REG
)
1260 if (REGNO (XEXP (x
, 0)) == 0)
1261 fprintf (file
, "%d,%d", REGNO (XEXP (x
, 1)), REGNO (XEXP (x
, 0)));
1263 fprintf (file
, "%d,%d", REGNO (XEXP (x
, 0)), REGNO (XEXP (x
, 1)));
1265 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == CONST_INT
)
1266 fprintf (file
, "%d(%d)", INTVAL (XEXP (x
, 1)), REGNO (XEXP (x
, 0)));
1271 /* This page contains routines that are used to determine what the function
1272 prologue and epilogue code will do and write them out. */
1274 /* Return the first fixed-point register that is required to be saved. 32 if
1278 first_reg_to_save ()
1282 /* Find lowest numbered live register. */
1283 for (first_reg
= 13; first_reg
<= 31; first_reg
++)
1284 if (regs_ever_live
[first_reg
])
1287 /* If profiling, then we must save/restore every register that contains
1288 a parameter before/after the .mcount call. Use registers from 30 down
1289 to 23 to do this. Don't use the frame pointer in reg 31.
1291 For now, save enough room for all of the parameter registers. */
1299 /* Similar, for FP regs. */
1302 first_fp_reg_to_save ()
1306 /* Find lowest numbered live register. */
1307 for (first_reg
= 14 + 32; first_reg
<= 63; first_reg
++)
1308 if (regs_ever_live
[first_reg
])
1314 /* Return 1 if we need to save CR. */
1319 return regs_ever_live
[70] || regs_ever_live
[71] || regs_ever_live
[72];
1322 /* Compute the size of the save area in the stack, including the space for
1330 /* We have the six fixed words, plus the size of the register save
1331 areas, rounded to a double-word. */
1332 size
= 6 + (32 - first_reg_to_save ()) + (64 - first_fp_reg_to_save ()) * 2;
1339 /* Return non-zero if this function makes calls. */
1342 rs6000_makes_calls ()
1346 /* If we are profiling, we will be making a call to mcount. */
1350 for (insn
= get_insns (); insn
; insn
= next_insn (insn
))
1351 if (GET_CODE (insn
) == CALL_INSN
)
1357 /* Return non-zero if this function needs to push space on the stack. */
1360 rs6000_pushes_stack ()
1362 int total_size
= (rs6000_sa_size () + get_frame_size ()
1363 + current_function_outgoing_args_size
);
1365 /* We need to push the stack if a frame pointer is needed (because the
1366 stack might be dynamically adjusted), if we are debugging, if the
1367 total stack size is more than 220 bytes, or if we make calls. */
1369 return (frame_pointer_needed
|| write_symbols
!= NO_DEBUG
1371 || rs6000_makes_calls ());
1374 /* Write function prologue. */
1377 output_prolog (file
, size
)
1381 int first_reg
= first_reg_to_save ();
1382 int must_push
= rs6000_pushes_stack ();
1383 int first_fp_reg
= first_fp_reg_to_save ();
1384 int basic_size
= rs6000_sa_size ();
1385 int total_size
= (basic_size
+ size
+ current_function_outgoing_args_size
);
1387 /* Round size to multiple of 8 bytes. */
1388 total_size
= (total_size
+ 7) & ~7;
1390 /* Write .extern for any function we will call to save and restore fp
1392 if (first_fp_reg
< 62)
1393 fprintf (file
, "\t.extern ._savef%d\n\t.extern ._restf%d\n",
1394 first_fp_reg
- 32, first_fp_reg
- 32);
1396 /* Write .extern for truncation routines, if needed. */
1397 if (rs6000_trunc_used
&& ! trunc_defined
)
1399 fprintf (file
, "\t.extern .itrunc\n\t.extern .uitrunc\n");
1403 /* If we have to call a function to save fpr's, or if we are doing profiling,
1404 then we will be using LR. */
1405 if (first_fp_reg
< 62 || profile_flag
)
1406 regs_ever_live
[65] = 1;
1408 /* If we use the link register, get it into r0. */
1409 if (regs_ever_live
[65])
1410 fprintf (file
, "\tmflr 0\n");
1412 /* If we need to save CR, put it into r12. */
1413 if (must_save_cr ())
1414 fprintf (file
, "\tmfcr 12\n");
1416 /* Do any required saving of fpr's. If only one or two to save, do it
1417 ourself. Otherwise, call function. Note that since they are statically
1418 linked, we do not need a nop following them. */
1419 if (first_fp_reg
== 62)
1420 fprintf (file
, "\tstfd 30,-16(1)\n\tstfd 31,-8(1)\n");
1421 else if (first_fp_reg
== 63)
1422 fprintf (file
, "\tstfd 31,-8(1)\n");
1423 else if (first_fp_reg
!= 64)
1424 fprintf (file
, "\tbl ._savef%d\n", first_fp_reg
- 32);
1426 /* Now save gpr's. */
1427 if (first_reg
== 31)
1428 fprintf (file
, "\tst 31,%d(1)\n", -4 - (64 - first_fp_reg
) * 8);
1429 else if (first_reg
!= 32)
1430 fprintf (file
, "\tstm %d,%d(1)\n", first_reg
,
1431 - (32 - first_reg
) * 4 - (64 - first_fp_reg
) * 8);
1433 /* Save lr if we used it. */
1434 if (regs_ever_live
[65])
1435 fprintf (file
, "\tst 0,8(1)\n");
1437 /* Save CR if we use any that must be preserved. */
1438 if (must_save_cr ())
1439 fprintf (file
, "\tst 12,4(1)\n");
1441 /* Update stack and set back pointer. */
1444 if (total_size
< 32767)
1445 fprintf (file
, "\tstu 1,%d(1)\n", - total_size
);
1448 fprintf (file
, "\tcau 0,0,%d\n\toril 0,0,%d\n",
1449 (total_size
>> 16) & 0xffff, total_size
& 0xffff);
1450 fprintf (file
, "\tsf 12,0,1\n\tst 1,0(12)\n\toril 1,12,0\n");
1454 /* Set frame pointer, if needed. */
1455 if (frame_pointer_needed
)
1456 fprintf (file
, "\toril 31,1,0\n");
1458 /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the
1459 TOC_TABLE address into register 30. */
1460 if (TARGET_MINIMAL_TOC
&& get_pool_size () != 0)
1461 fprintf (file
, "\tl 30,LCTOC..0(2)\n");
1464 /* Write function epilogue. */
1467 output_epilog (file
, size
)
1471 int first_reg
= first_reg_to_save ();
1472 int must_push
= rs6000_pushes_stack ();
1473 int first_fp_reg
= first_fp_reg_to_save ();
1474 int basic_size
= rs6000_sa_size ();
1475 int total_size
= (basic_size
+ size
+ current_function_outgoing_args_size
);
1476 rtx insn
= get_last_insn ();
1478 /* Round size to multiple of 8 bytes. */
1479 total_size
= (total_size
+ 7) & ~7;
1481 /* If the last insn was a BARRIER, we don't have to write anything except
1483 if (GET_CODE (insn
) == NOTE
)
1484 insn
= prev_nonnote_insn (insn
);
1485 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
1487 /* If we have a frame pointer, a call to alloca, or a large stack
1488 frame, restore the old stack pointer using the backchain. Otherwise,
1489 we know what size to update it with. */
1490 if (frame_pointer_needed
|| current_function_calls_alloca
1491 || total_size
> 32767)
1492 fprintf (file
, "\tl 1,0(1)\n");
1494 fprintf (file
, "\tai 1,1,%d\n", total_size
);
1496 /* Get the old lr if we saved it. */
1497 if (regs_ever_live
[65])
1498 fprintf (file
, "\tl 0,8(1)\n");
1500 /* Get the old cr if we saved it. */
1501 if (must_save_cr ())
1502 fprintf (file
, "\tl 12,4(1)\n");
1504 /* Set LR here to try to overlap restores below. */
1505 if (regs_ever_live
[65])
1506 fprintf (file
, "\tmtlr 0\n");
1508 /* Restore gpr's. */
1509 if (first_reg
== 31)
1510 fprintf (file
, "\tl 31,%d(1)\n", -4 - (64 - first_fp_reg
) * 8);
1511 else if (first_reg
!= 32)
1512 fprintf (file
, "\tlm %d,%d(1)\n", first_reg
,
1513 - (32 - first_reg
) * 4 - (64 - first_fp_reg
) * 8);
1515 /* Restore fpr's if we can do it without calling a function. */
1516 if (first_fp_reg
== 62)
1517 fprintf (file
, "\tlfd 30,-16(1)\n\tlfd 31,-8(1)\n");
1518 else if (first_fp_reg
== 63)
1519 fprintf (file
, "\tlfd 31,-8(1)\n");
1521 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4
1523 if (must_save_cr ())
1524 fprintf (file
, "\tmtcrf %d,12\n",
1525 (regs_ever_live
[70] != 0) * 0x20
1526 + (regs_ever_live
[71] != 0) * 0x10
1527 + (regs_ever_live
[72] != 0) * 0x8);
1529 /* If we have to restore more than two FP registers, branch to the
1530 restore function. It will return to our caller. */
1531 if (first_fp_reg
< 62)
1532 fprintf (file
, "\tb ._restf%d\n", first_fp_reg
- 32);
1534 fprintf (file
, "\tbr\n");
1537 /* Output a traceback table here. See /usr/include/sys/debug.h for info
1540 char *fname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
1541 int fixed_parms
, float_parms
, parm_info
;
1544 /* Need label immediately before tbtab, so we can compute its offset
1545 from the function start. */
1548 fprintf (file
, "LT..");
1549 ASM_OUTPUT_LABEL (file
, fname
);
1551 /* The .tbtab pseudo-op can only be used for the first eight
1552 expressions, since it can't handle the possibly variable length
1553 fields that follow. However, if you omit the optional fields,
1554 the assembler outputs zeros for all optional fields anyways, giving each
1555 variable length field is minimum length (as defined in sys/debug.h).
1556 Thus we can not use the .tbtab pseudo-op at all. */
1558 /* An all-zero word flags the start of the tbtab, for debuggers that have
1559 to find it by searching forward from the entry point or from the
1561 fprintf (file
, "\t.long 0\n");
1563 /* Tbtab format type. Use format type 0. */
1564 fprintf (file
, "\t.byte 0,");
1566 /* Language type. Unfortunately, there doesn't seem to be any official way
1567 to get this info, so we use language_string. C is 0. C++ is 9.
1568 No number defined for Obj-C, so use the value for C for now. */
1569 if (! strcmp (language_string
, "GNU C")
1570 || ! strcmp (language_string
, "GNU Obj-C"))
1572 else if (! strcmp (language_string
, "GNU F77"))
1574 else if (! strcmp (language_string
, "GNU Ada"))
1576 else if (! strcmp (language_string
, "GNU PASCAL"))
1578 else if (! strcmp (language_string
, "GNU C++"))
1582 fprintf (file
, "%d,", i
);
1584 /* 8 single bit fields: global linkage (not set for C extern linkage,
1585 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
1586 from start of procedure stored in tbtab, internal function, function
1587 has controlled storage, function has no toc, function uses fp,
1588 function logs/aborts fp operations. */
1589 /* Assume that fp operations are used if any fp reg must be saved. */
1590 fprintf (file
, "%d,", (1 << 5) | ((first_fp_reg
!= 64) << 1));
1592 /* 6 bitfields: function is interrupt handler, name present in proc table,
1593 function calls alloca, on condition directives (controls stack walks,
1594 3 bits), saves condition reg, saves link reg. */
1595 /* The `function calls alloca' bit seems to be set whenever reg 31 is
1596 set up as a frame pointer, even when there is no alloca call. */
1597 fprintf (file
, "%d,",
1598 ((1 << 6) | (frame_pointer_needed
<< 5)
1599 | (must_save_cr () << 1) | (regs_ever_live
[65])));
1601 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
1603 fprintf (file
, "%d,",
1604 (must_push
<< 7) | (64 - first_fp_reg_to_save ()));
1606 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
1607 fprintf (file
, "%d,", (32 - first_reg_to_save ()));
1610 /* Compute the parameter info from the function decl argument list. */
1612 int next_parm_info_bit
;
1614 next_parm_info_bit
= 31;
1619 for (decl
= DECL_ARGUMENTS (current_function_decl
);
1620 decl
; decl
= TREE_CHAIN (decl
))
1622 rtx parameter
= DECL_INCOMING_RTL (decl
);
1623 enum machine_mode mode
= GET_MODE (parameter
);
1625 if (GET_CODE (parameter
) == REG
)
1627 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
1635 else if (mode
== DFmode
)
1640 /* If only one bit will fit, don't or in this entry. */
1641 if (next_parm_info_bit
> 0)
1642 parm_info
|= (bits
<< (next_parm_info_bit
- 1));
1643 next_parm_info_bit
-= 2;
1647 fixed_parms
+= ((GET_MODE_SIZE (mode
) + (UNITS_PER_WORD
- 1))
1649 next_parm_info_bit
-= 1;
1655 /* Number of fixed point parameters. */
1656 /* This is actually the number of words of fixed point parameters; thus
1657 an 8 byte struct counts as 2; and thus the maximum value is 8. */
1658 fprintf (file
, "%d,", fixed_parms
);
1660 /* 2 bitfields: number of floating point parameters (7 bits), parameters
1662 /* This is actually the number of fp registers that hold parameters;
1663 and thus the maximum value is 13. */
1664 /* Set parameters on stack bit if parameters are not in their original
1665 registers, regardless of whether they are on the stack? Xlc
1666 seems to set the bit when not optimizing. */
1667 fprintf (file
, "%d\n", ((float_parms
<< 1) | (! optimize
)));
1669 /* Optional fields follow. Some are variable length. */
1671 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
1673 /* There is an entry for each parameter in a register, in the order that
1674 they occur in the parameter list. Any intervening arguments on the
1675 stack are ignored. If the list overflows a long (max possible length
1676 34 bits) then completely leave off all elements that don't fit. */
1677 /* Only emit this long if there was at least one parameter. */
1678 if (fixed_parms
|| float_parms
)
1679 fprintf (file
, "\t.long %d\n", parm_info
);
1681 /* Offset from start of code to tb table. */
1682 fprintf (file
, "\t.long LT..");
1683 RS6000_OUTPUT_BASENAME (file
, fname
);
1684 fprintf (file
, "-.");
1685 RS6000_OUTPUT_BASENAME (file
, fname
);
1686 fprintf (file
, "\n");
1688 /* Interrupt handler mask. */
1689 /* Omit this long, since we never set the interrupt handler bit above. */
1691 /* Number of CTL (controlled storage) anchors. */
1692 /* Omit this long, since the has_ctl bit is never set above. */
1694 /* Displacement into stack of each CTL anchor. */
1695 /* Omit this list of longs, because there are no CTL anchors. */
1697 /* Length of function name. */
1698 fprintf (file
, "\t.short %d\n", strlen (fname
));
1700 /* Function name. */
1701 assemble_string (fname
, strlen (fname
));
1703 /* Register for alloca automatic storage; this is always reg 31.
1704 Only emit this if the alloca bit was set above. */
1705 if (frame_pointer_needed
)
1706 fprintf (file
, "\t.byte 31\n");
1710 /* Output a TOC entry. We derive the entry name from what is
1714 output_toc (file
, x
, labelno
)
1724 ASM_OUTPUT_INTERNAL_LABEL (file
, "LC", labelno
);
1726 /* Handle FP constants specially. Note that if we have a minimal
1727 TOC, things we put here aren't actually in the TOC, so we can allow
1729 if (GET_CODE (x
) == CONST_DOUBLE
1730 && GET_MODE (x
) == DFmode
1731 && TARGET_FLOAT_FORMAT
== HOST_FLOAT_FORMAT
1732 && BITS_PER_WORD
== HOST_BITS_PER_INT
1733 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
1735 if (TARGET_MINIMAL_TOC
)
1736 fprintf (file
, "\t.long %d\n\t.long %d\n",
1737 CONST_DOUBLE_LOW (x
), CONST_DOUBLE_HIGH (x
));
1739 fprintf (file
, "\t.tc FD_%x_%x[TC],%d,%d\n",
1740 CONST_DOUBLE_LOW (x
), CONST_DOUBLE_HIGH (x
),
1741 CONST_DOUBLE_LOW (x
), CONST_DOUBLE_HIGH (x
));
1744 else if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == SFmode
1745 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
1747 rtx val
= operand_subword (x
, 0, 0, SFmode
);
1749 if (val
== 0 || GET_CODE (val
) != CONST_INT
)
1752 if (TARGET_MINIMAL_TOC
)
1753 fprintf (file
, "\t.long %d\n", INTVAL (val
));
1755 fprintf (file
, "\t.tc FS_%x[TC],%d\n", INTVAL (val
), INTVAL (val
));
1759 if (GET_CODE (x
) == CONST
)
1761 base
= XEXP (XEXP (x
, 0), 0);
1762 offset
= INTVAL (XEXP (XEXP (x
, 0), 1));
1765 if (GET_CODE (base
) == SYMBOL_REF
)
1766 name
= XSTR (base
, 0);
1767 else if (GET_CODE (base
) == LABEL_REF
)
1768 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (XEXP (base
, 0)));
1769 else if (GET_CODE (base
) == CODE_LABEL
)
1770 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (base
));
1774 if (TARGET_MINIMAL_TOC
)
1775 fprintf (file
, "\t.long ");
1778 fprintf (file
, "\t.tc ");
1779 RS6000_OUTPUT_BASENAME (file
, name
);
1782 fprintf (file
, ".N%d", - offset
);
1784 fprintf (file
, ".P%d", offset
);
1786 fprintf (file
, "[TC],");
1788 output_addr_const (file
, x
);
1789 fprintf (file
, "\n");
1792 /* Output an assembler pseudo-op to write an ASCII string of N characters
1793 starting at P to FILE.
1795 On the RS/6000, we have to do this using the .byte operation and
1796 write out special characters outside the quoted string.
1797 Also, the assembler is broken; very long strings are truncated,
1798 so we must artificially break them up early. */
1801 output_ascii (file
, p
, n
)
1807 int i
, count_string
;
1808 char *for_string
= "\t.byte \"";
1809 char *for_decimal
= "\t.byte ";
1810 char *to_close
= NULL
;
1813 for (i
= 0; i
< n
; i
++)
1816 if (c
>= ' ' && c
< 0177)
1819 fputs (for_string
, file
);
1822 /* Write two quotes to get one. */
1830 for_decimal
= "\"\n\t.byte ";
1834 if (count_string
>= 512)
1836 fputs (to_close
, file
);
1838 for_string
= "\t.byte \"";
1839 for_decimal
= "\t.byte ";
1847 fputs (for_decimal
, file
);
1848 fprintf (file
, "%d", c
);
1850 for_string
= "\n\t.byte \"";
1857 /* Now close the string if we have written one. Then end the line. */
1859 fprintf (file
, to_close
);
1862 /* Generate a unique section name for FILENAME for a section type
1863 represented by SECTION_DESC. Output goes into BUF.
1865 SECTION_DESC can be any string, as long as it is different for each
1866 possible section type.
1868 We name the section in the same manner as xlc. The name begins with an
1869 underscore followed by the filename (after stripping any leading directory
1870 names) with the last period replaced by the string SECTION_DESC. If
1871 FILENAME does not contain a period, SECTION_DESC is appended to the end of
1875 rs6000_gen_section_name (buf
, filename
, section_desc
)
1880 char *q
, *after_last_slash
, *last_period
;
1884 after_last_slash
= filename
;
1885 for (q
= filename
; *q
; q
++)
1888 after_last_slash
= q
+ 1;
1893 len
= strlen (after_last_slash
) + strlen (section_desc
) + 2;
1894 *buf
= (char *) permalloc (len
);
1899 for (q
= after_last_slash
; *q
; q
++)
1901 if (q
== last_period
)
1903 strcpy (p
, section_desc
);
1904 p
+= strlen (section_desc
);
1907 else if (isalnum (*q
))
1911 if (last_period
== 0)
1912 strcpy (p
, section_desc
);
1917 /* Write function profiler code. */
1920 output_function_profiler (file
, labelno
)
1924 /* The last used parameter register. */
1928 /* Set up a TOC entry for the profiler label. */
1930 fprintf (file
, "LPC..%d:\n\t.tc\tLP..%d[TC],LP..%d\n",
1931 labelno
, labelno
, labelno
);
1934 /* Figure out last used parameter register. The proper thing to do is
1935 to walk incoming args of the function. A function might have live
1936 parameter registers even if it has no incoming args. */
1938 for (last_parm_reg
= 10;
1939 last_parm_reg
> 2 && ! regs_ever_live
[last_parm_reg
];
1943 /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since
1944 it might be set up as the frame pointer. */
1946 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
1947 fprintf (file
, "\tai %d,%d,0\n", j
, i
);
1949 /* Load location address into r3, and call mcount. */
1951 fprintf (file
, "\tl 3,LPC..%d(2)\n\tbl .mcount\n", labelno
);
1953 /* Restore parameter registers. */
1955 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
1956 fprintf (file
, "\tai %d,%d,0\n", i
, j
);