gcc/config/rs6000/darwin.md

   1 /* Machine description patterns for PowerPC running Darwin (Mac OS X).
   2    Copyright (C) 2004-2018 Free Software Foundation, Inc.
   3    Contributed by Apple Computer Inc.
   4
   5 This file is part of GCC.
   6
   7 GNU CC is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 3, or (at your option)
  10 any later version.
  11
  12 GNU CC is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 ;; along with GCC; see the file COPYING3.  If not see
  19 ;; <http://www.gnu.org/licenses/>.  */
  20
  21 (define_insn "adddi3_high"
  22   [(set (match_operand:DI 0 "gpc_reg_operand" "=b")
  23         (plus:DI (match_operand:DI 1 "gpc_reg_operand" "b")
  24                  (high:DI (match_operand 2 "" ""))))]
  25   "TARGET_MACHO && TARGET_64BIT"
  26   "addis %0,%1,ha16(%2)")
  27
  28 (define_insn "movdf_low_si"
  29   [(set (match_operand:DF 0 "gpc_reg_operand" "=f,!r")
  30         (mem:DF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,b")
  31                            (match_operand 2 "" ""))))]
  32   "TARGET_MACHO && TARGET_HARD_FLOAT && !TARGET_64BIT"
  33 {
  34   switch (which_alternative)
  35     {
  36       case 0:
  37         return "lfd %0,lo16(%2)(%1)";
  38       case 1:
  39         {
  40           if (TARGET_POWERPC64 && TARGET_32BIT)
  41             /* Note, old assemblers didn't support relocation here.  */
  42             return "ld %0,lo16(%2)(%1)";
  43           else
  44             {
  45               output_asm_insn ("la %0,lo16(%2)(%1)", operands);
  46               output_asm_insn ("lwz %L0,4(%0)", operands);
  47               return ("lwz %0,0(%0)");
  48             }
  49         }
  50       default:
  51         gcc_unreachable ();
  52     }
  53 }
  54   [(set_attr "type" "load")
  55    (set_attr "length" "4,12")])
  56
  57
  58 (define_insn "movdf_low_di"
  59   [(set (match_operand:DF 0 "gpc_reg_operand" "=f,!r")
  60         (mem:DF (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b")
  61                            (match_operand 2 "" ""))))]
  62   "TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_64BIT"
  63   "@
  64    lfd %0,lo16(%2)(%1)
  65    ld %0,lo16(%2)(%1)"
  66   [(set_attr "type" "load")])
  67
  68 (define_insn "movdf_low_st_si"
  69   [(set (mem:DF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b")
  70                            (match_operand 2 "" "")))
  71         (match_operand:DF 0 "gpc_reg_operand" "f"))]
  72   "TARGET_MACHO && TARGET_HARD_FLOAT && ! TARGET_64BIT"
  73   "stfd %0,lo16(%2)(%1)"
  74   [(set_attr "type" "store")])
  75
  76 (define_insn "movdf_low_st_di"
  77   [(set (mem:DF (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b")
  78                            (match_operand 2 "" "")))
  79         (match_operand:DF 0 "gpc_reg_operand" "f"))]
  80   "TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_64BIT"
  81   "stfd %0,lo16(%2)(%1)"
  82   [(set_attr "type" "store")])
  83
  84 (define_insn "movsf_low_si"
  85   [(set (match_operand:SF 0 "gpc_reg_operand" "=f,!r")
  86         (mem:SF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,b")
  87                            (match_operand 2 "" ""))))]
  88   "TARGET_MACHO && TARGET_HARD_FLOAT && ! TARGET_64BIT"
  89   "@
  90    lfs %0,lo16(%2)(%1)
  91    lwz %0,lo16(%2)(%1)"
  92   [(set_attr "type" "load")])
  93
  94 (define_insn "movsf_low_di"
  95   [(set (match_operand:SF 0 "gpc_reg_operand" "=f,!r")
  96         (mem:SF (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b")
  97                            (match_operand 2 "" ""))))]
  98   "TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_64BIT"
  99   "@
 100    lfs %0,lo16(%2)(%1)
 101    lwz %0,lo16(%2)(%1)"
 102   [(set_attr "type" "load")])
 103
 104 (define_insn "movsf_low_st_si"
 105   [(set (mem:SF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,b")
 106                            (match_operand 2 "" "")))
 107         (match_operand:SF 0 "gpc_reg_operand" "f,!r"))]
 108   "TARGET_MACHO && TARGET_HARD_FLOAT && ! TARGET_64BIT"
 109   "@
 110    stfs %0,lo16(%2)(%1)
 111    stw %0,lo16(%2)(%1)"
 112   [(set_attr "type" "store")])
 113
 114 (define_insn "movsf_low_st_di"
 115   [(set (mem:SF (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b")
 116                            (match_operand 2 "" "")))
 117         (match_operand:SF 0 "gpc_reg_operand" "f,!r"))]
 118   "TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_64BIT"
 119   "@
 120    stfs %0,lo16(%2)(%1)
 121    stw %0,lo16(%2)(%1)"
 122   [(set_attr "type" "store")])
 123
 124 ;; 64-bit MachO load/store support
 125 (define_insn "movdi_low"
 126   [(set (match_operand:DI 0 "gpc_reg_operand" "=r,*!d")
 127         (mem:DI (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b")
 128                            (match_operand 2 "" ""))))]
 129   "TARGET_MACHO && TARGET_64BIT"
 130   "@
 131    ld %0,lo16(%2)(%1)
 132    lfd %0,lo16(%2)(%1)"
 133   [(set_attr "type" "load")])
 134
 135 (define_insn "movsi_low_st"
 136   [(set (mem:SI (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b")
 137                            (match_operand 2 "" "")))
 138         (match_operand:SI 0 "gpc_reg_operand" "r"))]
 139   "TARGET_MACHO && ! TARGET_64BIT"
 140   "stw %0,lo16(%2)(%1)"
 141   [(set_attr "type" "store")])
 142
 143 (define_insn "movdi_low_st"
 144   [(set (mem:DI (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b")
 145                            (match_operand 2 "" "")))
 146         (match_operand:DI 0 "gpc_reg_operand" "r,*!d"))]
 147   "TARGET_MACHO && TARGET_64BIT"
 148   "@
 149    std %0,lo16(%2)(%1)
 150    stfd %0,lo16(%2)(%1)"
 151   [(set_attr "type" "store")])
 152
 153 ;; Mach-O PIC trickery.
 154 (define_expand "macho_high"
 155   [(set (match_operand 0 "")
 156         (high (match_operand 1 "")))]
 157   "TARGET_MACHO"
 158 {
 159   if (TARGET_64BIT)
 160     emit_insn (gen_macho_high_di (operands[0], operands[1]));
 161   else
 162     emit_insn (gen_macho_high_si (operands[0], operands[1]));
 163
 164   DONE;
 165 })
 166
 167 (define_insn "macho_high_si"
 168   [(set (match_operand:SI 0 "gpc_reg_operand" "=b*r")
 169         (high:SI (match_operand 1 "" "")))]
 170   "TARGET_MACHO && ! TARGET_64BIT"
 171   "lis %0,ha16(%1)")
 172
 173
 174 (define_insn "macho_high_di"
 175   [(set (match_operand:DI 0 "gpc_reg_operand" "=b*r")
 176         (high:DI (match_operand 1 "" "")))]
 177   "TARGET_MACHO && TARGET_64BIT"
 178   "lis %0,ha16(%1)")
 179
 180 (define_expand "macho_low"
 181   [(set (match_operand 0 "")
 182         (lo_sum (match_operand 1 "")
 183                    (match_operand 2 "")))]
 184    "TARGET_MACHO"
 185 {
 186   if (TARGET_64BIT)
 187     emit_insn (gen_macho_low_di (operands[0], operands[1], operands[2]));
 188   else
 189     emit_insn (gen_macho_low_si (operands[0], operands[1], operands[2]));
 190
 191   DONE;
 192 })
 193
 194 (define_insn "macho_low_si"
 195   [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
 196         (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b")
 197                    (match_operand 2 "" "")))]
 198    "TARGET_MACHO && ! TARGET_64BIT"
 199    "la %0,lo16(%2)(%1)")
 200
 201 (define_insn "macho_low_di"
 202   [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
 203         (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b")
 204                    (match_operand 2 "" "")))]
 205    "TARGET_MACHO && TARGET_64BIT"
 206    "la %0,lo16(%2)(%1)")
 207
 208 (define_split
 209   [(set (mem:V4SI (plus:DI (match_operand:DI 0 "gpc_reg_operand")
 210                          (match_operand:DI 1 "short_cint_operand")))
 211         (match_operand:V4SI 2 "register_operand"))
 212    (clobber (match_operand:DI 3 "gpc_reg_operand"))]
 213   "TARGET_MACHO && TARGET_64BIT"
 214   [(set (match_dup 3) (plus:DI (match_dup 0) (match_dup 1)))
 215    (set (mem:V4SI (match_dup 3))
 216         (match_dup 2))]
 217   "")
 218
 219 (define_expand "load_macho_picbase"
 220   [(set (reg:SI LR_REGNO)
 221         (unspec [(match_operand 0 "")]
 222                    UNSPEC_LD_MPIC))]
 223   "(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
 224 {
 225   if (TARGET_32BIT)
 226     emit_insn (gen_load_macho_picbase_si (operands[0]));
 227   else
 228     emit_insn (gen_load_macho_picbase_di (operands[0]));
 229
 230   DONE;
 231 })
 232
 233 (define_insn "load_macho_picbase_si"
 234   [(set (reg:SI LR_REGNO)
 235         (unspec:SI [(match_operand:SI 0 "immediate_operand" "s")
 236                     (pc)] UNSPEC_LD_MPIC))]
 237   "(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
 238 {
 239 #if TARGET_MACHO
 240   machopic_should_output_picbase_label (); /* Update for new func.  */
 241 #else
 242   gcc_unreachable ();
 243 #endif
 244   return "bcl 20,31,%0\n%0:";
 245 }
 246   [(set_attr "type" "branch")
 247    (set_attr "cannot_copy" "yes")])
 248
 249 (define_insn "load_macho_picbase_di"
 250   [(set (reg:DI LR_REGNO)
 251         (unspec:DI [(match_operand:DI 0 "immediate_operand" "s")
 252                     (pc)] UNSPEC_LD_MPIC))]
 253   "(DEFAULT_ABI == ABI_DARWIN) && flag_pic && TARGET_64BIT"
 254 {
 255 #if TARGET_MACHO
 256   machopic_should_output_picbase_label (); /* Update for new func.  */
 257 #else
 258   gcc_unreachable ();
 259 #endif
 260   return "bcl 20,31,%0\n%0:";
 261 }
 262   [(set_attr "type" "branch")
 263    (set_attr "cannot_copy" "yes")])
 264
 265 (define_expand "macho_correct_pic"
 266   [(set (match_operand 0 "")
 267         (plus (match_operand 1 "")
 268                  (unspec [(match_operand 2 "")
 269                              (match_operand 3 "")]
 270                             UNSPEC_MPIC_CORRECT)))]
 271   "DEFAULT_ABI == ABI_DARWIN"
 272 {
 273   if (TARGET_32BIT)
 274     emit_insn (gen_macho_correct_pic_si (operands[0], operands[1], operands[2],
 275                operands[3]));
 276   else
 277     emit_insn (gen_macho_correct_pic_di (operands[0], operands[1], operands[2],
 278                operands[3]));
 279
 280   DONE;
 281 })
 282
 283 (define_insn "macho_correct_pic_si"
 284   [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
 285         (plus:SI (match_operand:SI 1 "gpc_reg_operand" "r")
 286                  (unspec:SI [(match_operand:SI 2 "immediate_operand" "s")
 287                              (match_operand:SI 3 "immediate_operand" "s")]
 288                             UNSPEC_MPIC_CORRECT)))]
 289   "DEFAULT_ABI == ABI_DARWIN"
 290   "addis %0,%1,ha16(%2-%3)\n\taddi %0,%0,lo16(%2-%3)"
 291   [(set_attr "length" "8")])
 292
 293 (define_insn "macho_correct_pic_di"
 294   [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
 295         (plus:DI (match_operand:DI 1 "gpc_reg_operand" "r")
 296                  (unspec:DI [(match_operand:DI 2 "immediate_operand" "s")
 297                              (match_operand:DI 3 "immediate_operand" "s")]
 298                             16)))]
 299   "DEFAULT_ABI == ABI_DARWIN && TARGET_64BIT"
 300   "addis %0,%1,ha16(%2-%3)\n\taddi %0,%0,lo16(%2-%3)"
 301   [(set_attr "length" "8")])
 302
 303 (define_insn "*call_indirect_nonlocal_darwin64"
 304   [(call (mem:SI (match_operand:DI 0 "register_operand" "c,*l,c,*l"))
 305          (match_operand 1 "" "g,g,g,g"))
 306    (use (match_operand:SI 2 "immediate_operand" "O,O,n,n"))
 307    (clobber (reg:SI LR_REGNO))]
 308   "DEFAULT_ABI == ABI_DARWIN && TARGET_64BIT"
 309 {
 310   return "b%T0l";
 311 }
 312   [(set_attr "type" "jmpreg,jmpreg,jmpreg,jmpreg")
 313    (set_attr "length" "4,4,8,8")])
 314
 315 (define_insn "*call_nonlocal_darwin64"
 316   [(call (mem:SI (match_operand:DI 0 "symbol_ref_operand" "s,s"))
 317          (match_operand 1 "" "g,g"))
 318    (use (match_operand:SI 2 "immediate_operand" "O,n"))
 319    (clobber (reg:SI LR_REGNO))]
 320   "(DEFAULT_ABI == ABI_DARWIN)
 321    && (INTVAL (operands[2]) & CALL_LONG) == 0"
 322 {
 323 #if TARGET_MACHO
 324   return output_call(insn, operands, 0, 2);
 325 #else
 326   gcc_unreachable ();
 327 #endif
 328 }
 329   [(set_attr "type" "branch,branch")
 330    (set_attr "length" "4,8")])
 331
 332 (define_insn "*call_value_indirect_nonlocal_darwin64"
 333   [(set (match_operand 0 "" "")
 334         (call (mem:SI (match_operand:DI 1 "register_operand" "c,*l,c,*l"))
 335               (match_operand 2 "" "g,g,g,g")))
 336    (use (match_operand:SI 3 "immediate_operand" "O,O,n,n"))
 337    (clobber (reg:SI LR_REGNO))]
 338   "DEFAULT_ABI == ABI_DARWIN"
 339 {
 340   return "b%T1l";
 341 }
 342   [(set_attr "type" "jmpreg,jmpreg,jmpreg,jmpreg")
 343    (set_attr "length" "4,4,8,8")])
 344
 345 (define_insn "*call_value_nonlocal_darwin64"
 346   [(set (match_operand 0 "" "")
 347         (call (mem:SI (match_operand:DI 1 "symbol_ref_operand" "s,s"))
 348               (match_operand 2 "" "g,g")))
 349    (use (match_operand:SI 3 "immediate_operand" "O,n"))
 350    (clobber (reg:SI LR_REGNO))]
 351   "(DEFAULT_ABI == ABI_DARWIN)
 352    && (INTVAL (operands[3]) & CALL_LONG) == 0"
 353 {
 354 #if TARGET_MACHO
 355   return output_call(insn, operands, 1, 3);
 356 #else
 357   gcc_unreachable ();
 358 #endif
 359 }
 360   [(set_attr "type" "branch,branch")
 361    (set_attr "length" "4,8")])
 362
 363 (define_expand "reload_macho_picbase"
 364   [(set (reg:SI LR_REGNO)
 365         (unspec [(match_operand 0 "")]
 366                    UNSPEC_RELD_MPIC))]
 367   "(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
 368 {
 369   if (TARGET_32BIT)
 370     emit_insn (gen_reload_macho_picbase_si (operands[0]));
 371   else
 372     emit_insn (gen_reload_macho_picbase_di (operands[0]));
 373
 374   DONE;
 375 })
 376
 377 (define_insn "reload_macho_picbase_si"
 378   [(set (reg:SI LR_REGNO)
 379         (unspec:SI [(match_operand:SI 0 "immediate_operand" "s")
 380                     (pc)] UNSPEC_RELD_MPIC))]
 381   "(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
 382 {
 383 #if TARGET_MACHO
 384   if (machopic_should_output_picbase_label ())
 385     {
 386       static char tmp[64];
 387       const char *cnam = machopic_get_function_picbase ();
 388       snprintf (tmp, 64, "bcl 20,31,%s\n%s:\n%%0:", cnam, cnam);
 389       return tmp;
 390     }
 391   else
 392 #else
 393   gcc_unreachable ();
 394 #endif
 395     return "bcl 20,31,%0\n%0:";
 396 }
 397   [(set_attr "type" "branch")
 398    (set_attr "cannot_copy" "yes")])
 399
 400 (define_insn "reload_macho_picbase_di"
 401   [(set (reg:DI LR_REGNO)
 402         (unspec:DI [(match_operand:DI 0 "immediate_operand" "s")
 403                     (pc)] UNSPEC_RELD_MPIC))]
 404   "(DEFAULT_ABI == ABI_DARWIN) && flag_pic && TARGET_64BIT"
 405 {
 406 #if TARGET_MACHO
 407   if (machopic_should_output_picbase_label ())
 408     {
 409       static char tmp[64];
 410       const char *cnam = machopic_get_function_picbase ();
 411       snprintf (tmp, 64, "bcl 20,31,%s\n%s:\n%%0:", cnam, cnam);
 412       return tmp;
 413     }
 414   else
 415 #else
 416   gcc_unreachable ();
 417 #endif
 418     return "bcl 20,31,%0\n%0:";
 419 }
 420   [(set_attr "type" "branch")
 421    (set_attr "cannot_copy" "yes")])
 422
 423 ;; We need to restore the PIC register, at the site of nonlocal label.
 424
 425 (define_insn_and_split "nonlocal_goto_receiver"
 426   [(unspec_volatile [(const_int 0)] UNSPECV_NLGR)]
 427   "TARGET_MACHO && flag_pic"
 428   "#"
 429   "&& reload_completed"
 430   [(const_int 0)]
 431 {
 432 #if TARGET_MACHO
 433   if (crtl->uses_pic_offset_table)
 434     {
 435       static unsigned n = 0;
 436       rtx picrtx = gen_rtx_SYMBOL_REF (Pmode, MACHOPIC_FUNCTION_BASE_NAME);
 437       rtx picreg = gen_rtx_REG (Pmode, RS6000_PIC_OFFSET_TABLE_REGNUM);
 438       rtx tmplrtx;
 439       char tmplab[20];
 440
 441       ASM_GENERATE_INTERNAL_LABEL(tmplab, "Lnlgr", ++n);
 442       tmplrtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (tmplab));
 443
 444       emit_insn (gen_reload_macho_picbase (tmplrtx));
 445       emit_move_insn (picreg, gen_rtx_REG (Pmode, LR_REGNO));
 446       emit_insn (gen_macho_correct_pic (picreg, picreg, picrtx, tmplrtx));
 447     }
 448   else
 449     /* Not using PIC reg, no reload needed.  */
 450     emit_note (NOTE_INSN_DELETED);
 451 #else
 452   gcc_unreachable ();
 453 #endif
 454   DONE;
 455 })