1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
4 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
5 Software Science at the University of Utah.
7 This file is part of GNU CC.
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 1, or (at your option)
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
23 enum cmp_type
/* comparison type */
25 CMP_SI
, /* compare integers */
26 CMP_SF
, /* compare single precision floats */
27 CMP_DF
, /* compare double precision floats */
28 CMP_MAX
/* max comparison type */
31 /* For long call handling. */
32 extern unsigned int total_code_bytes
;
34 /* Which processor to schedule for. */
43 #define pa_cpu_attr ((enum attr_cpu)pa_cpu)
45 /* For -mschedule= option. */
46 extern char *pa_cpu_string
;
47 extern enum processor_type pa_cpu
;
49 /* Print subsidiary information on the compiler version in use. */
51 #define TARGET_VERSION fprintf (stderr, " (hppa)");
53 /* Run-time compilation parameters selecting different hardware subsets. */
55 extern int target_flags
;
57 /* compile code for HP-PA 1.1 ("Snake") */
59 #define TARGET_SNAKE (target_flags & 1)
61 /* Disable all FP registers (they all become fixed). This may be necessary
62 for compiling kernels which perform lazy context switching of FP regs.
63 Note if you use this option and try to perform floating point operations
64 the compiler will abort! */
66 #define TARGET_DISABLE_FPREGS (target_flags & 2)
68 /* Generate code which assumes that calls through function pointers will
69 never cross a space boundary. Such assumptions are generally safe for
70 building kernels and statically linked executables. Code compiled with
71 this option will fail miserably if the executable is dynamically linked
72 or uses nested functions! */
73 #define TARGET_FAST_INDIRECT_CALLS (target_flags & 4)
75 /* Allow unconditional jumps in the delay slots of call instructions. */
76 #define TARGET_JUMP_IN_DELAY (target_flags & 8)
78 /* In rare cases, a millicode call via "bl" can not be turned into
79 a millicode call using "ble" (when SHLIB_INFO subspace is very large).
81 This option forces just millicode calls to use inline long-calls
82 This is far more efficient than the old long-call option which forced
83 every function to be called indirectly (as is still the case for
84 TARGET_PORTABLE_RUNTIME).
86 ??? What about simple jumps, they can suffer from the same problem.
87 Would require significant surgery in pa.md. */
89 #define TARGET_MILLICODE_LONG_CALLS (target_flags & 16)
91 /* Disable indexed addressing modes. */
93 #define TARGET_DISABLE_INDEXING (target_flags & 32)
95 /* Emit code which follows the new portable runtime calling conventions
96 HP wants everyone to use for ELF objects. If at all possible you want
97 to avoid this since it's a performance loss for non-prototyped code.
99 Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline
100 long-call stubs which is quite expensive. */
102 #define TARGET_PORTABLE_RUNTIME (target_flags & 64)
104 /* Emit directives only understood by GAS. This allows parameter
105 relocations to work for static functions. There is no way
106 to make them work the HP assembler at this time. */
108 #define TARGET_GAS (target_flags & 128)
110 /* Emit code for processors which do not have an FPU. */
112 #define TARGET_SOFT_FLOAT (target_flags & 256)
114 /* Macro to define tables used to set the flags.
115 This is a list in braces of pairs in braces,
116 each pair being { "NAME", VALUE }
117 where VALUE is the bits to set or minus the bits to clear.
118 An empty string NAME is used to identify the default VALUE. */
120 #define TARGET_SWITCHES \
123 {"pa-risc-1-0", -1}, \
124 {"pa-risc-1-1", 1}, \
125 {"disable-fpregs", 2}, \
126 {"no-disable-fpregs", 2}, \
127 {"fast-indirect-calls", 4}, \
128 {"no-fast-indirect-calls", -4},\
129 {"jump-in-delay", 8}, \
130 {"no-jump-in-delay", -8}, \
131 {"millicode-long-calls", 16},\
132 {"no-millicode-long-calls", -16},\
133 {"disable-indexing", 32}, \
134 {"no-disable-indexing", -32},\
135 {"portable-runtime", 64+16},\
136 {"no-portable-runtime", -(64+16)},\
139 {"soft-float", 256}, \
140 {"no-soft-float", -256}, \
141 { "", TARGET_DEFAULT}}
143 #ifndef TARGET_DEFAULT
144 #define TARGET_DEFAULT 0x88 /* TARGET_GAS + TARGET_JUMP_IN_DELAY */
147 #define TARGET_OPTIONS \
149 { "schedule=", &pa_cpu_string }\
152 #define OVERRIDE_OPTIONS override_options ()
154 #define DBX_DEBUGGING_INFO
155 #define DEFAULT_GDB_EXTENSIONS 1
157 /* This is the way other stabs-in-XXX tools do things. We will be
159 #define DBX_BLOCKS_FUNCTION_RELATIVE 1
161 /* Likewise for linenos.
163 We make the first line stab special to avoid adding several
164 gross hacks to GAS. */
165 #undef ASM_OUTPUT_SOURCE_LINE
166 #define ASM_OUTPUT_SOURCE_LINE(file, line) \
167 { static int sym_lineno = 1; \
168 static tree last_function_decl = NULL; \
169 if (current_function_decl == last_function_decl) \
170 fprintf (file, "\t.stabn 68,0,%d,L$M%d-%s\nL$M%d:\n", \
172 XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0) + 1, \
175 fprintf (file, "\t.stabn 68,0,%d,0\n", line); \
176 last_function_decl = current_function_decl; \
179 /* But, to make this work, we have to output the stabs for the function
181 #define DBX_FUNCTION_FIRST
183 /* Only lables should ever begin in colunm zero. */
184 #define ASM_STABS_OP "\t.stabs"
185 #define ASM_STABN_OP "\t.stabn"
187 /* GDB always assumes the current function's frame begins at the value
188 of the stack pointer upon entry to the current function. Accessing
189 local variables and parameters passed on the stack is done using the
190 base of the frame + an offset provided by GCC.
192 For functions which have frame pointers this method works fine;
193 the (frame pointer) == (stack pointer at function entry) and GCC provides
194 an offset relative to the frame pointer.
196 This loses for functions without a frame pointer; GCC provides an offset
197 which is relative to the stack pointer after adjusting for the function's
198 frame size. GDB would prefer the offset to be relative to the value of
199 the stack pointer at the function's entry. Yuk! */
200 #define DEBUGGER_AUTO_OFFSET(X) \
201 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
202 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
204 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
205 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
206 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
208 /* gdb needs a null N_SO at the end of each file for scattered loading. */
210 #undef DBX_OUTPUT_MAIN_SOURCE_FILE_END
211 #define DBX_OUTPUT_MAIN_SOURCE_FILE_END(FILE, FILENAME) \
213 "%s\n\t.stabs \"%s\",%d,0,0,L$text_end\nL$text_end:\n",\
214 TEXT_SECTION_ASM_OP, "" , N_SO)
216 #if (TARGET_DEFAULT & 1) == 0
217 #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
218 %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}"
220 #define CPP_SPEC "%{!mpa-risc-1-0:%{!mnosnake:%{!msoft-float:-D__hp9000s700 -D_PA_RISC1_1}}}"
223 /* Defines for a K&R CC */
225 #define CC1_SPEC "%{pg:} %{p:}"
227 #define LINK_SPEC "%{!shared:-u main} %{shared:-b}"
229 /* Allow $ in identifiers. */
230 #define DOLLARS_IN_IDENTIFIERS 2
232 /* Make gcc agree with <machine/ansi.h> */
234 #define SIZE_TYPE "unsigned int"
235 #define PTRDIFF_TYPE "int"
236 #define WCHAR_TYPE "unsigned int"
237 #define WCHAR_TYPE_SIZE 32
239 /* Show we can debug even without a frame pointer. */
240 #define CAN_DEBUG_WITHOUT_FP
242 /* Names to predefine in the preprocessor for this target machine. */
244 #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem(unix) -Asystem(bsd) -Acpu(hppa) -Amachine(hppa)"
246 /* HPUX has a program 'chatr' to list the dependencies of dynamically
247 linked executables and shared libraries. */
248 #define LDD_SUFFIX "chatr"
249 /* look for lines like "dynamic /usr/lib/X11R5/libX11.sl". */
250 #define PARSE_LDD_OUTPUT(PTR) \
252 while (*PTR == ' ') PTR++; \
253 if (strncmp (PTR, "dynamic", sizeof ("dynamic") - 1) == 0) \
255 PTR += sizeof ("dynamic") - 1; \
256 while (*p == ' ') PTR++; \
262 /* target machine storage layout */
264 /* Define for cross-compilation from a host with a different float format
265 or endianess (e.g. VAX, x86). */
266 #define REAL_ARITHMETIC
268 /* Define this if most significant bit is lowest numbered
269 in instructions that operate on numbered bit-fields. */
270 #define BITS_BIG_ENDIAN 1
272 /* Define this if most significant byte of a word is the lowest numbered. */
273 /* That is true on the HP-PA. */
274 #define BYTES_BIG_ENDIAN 1
276 /* Define this if most significant word of a multiword number is lowest
278 #define WORDS_BIG_ENDIAN 1
280 /* number of bits in an addressable storage unit */
281 #define BITS_PER_UNIT 8
283 /* Width in bits of a "word", which is the contents of a machine register.
284 Note that this is not necessarily the width of data type `int';
285 if using 16-bit ints on a 68000, this would still be 32.
286 But on a machine with 16-bit registers, this would be 16. */
287 #define BITS_PER_WORD 32
289 /* Width of a word, in units (bytes). */
290 #define UNITS_PER_WORD 4
292 /* Width in bits of a pointer.
293 See also the macro `Pmode' defined below. */
294 #define POINTER_SIZE 32
296 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
297 #define PARM_BOUNDARY 32
299 /* Largest alignment required for any stack parameter, in bits.
300 Don't define this if it is equal to PARM_BOUNDARY */
301 #define MAX_PARM_BOUNDARY 64
303 /* Boundary (in *bits*) on which stack pointer should be aligned. */
304 #define STACK_BOUNDARY 512
306 /* Allocation boundary (in *bits*) for the code of a function. */
307 #define FUNCTION_BOUNDARY 32
309 /* Alignment of field after `int : 0' in a structure. */
310 #define EMPTY_FIELD_BOUNDARY 32
312 /* Every structure's size must be a multiple of this. */
313 #define STRUCTURE_SIZE_BOUNDARY 8
315 /* A bitfield declared as `int' forces `int' alignment for the struct. */
316 #define PCC_BITFIELD_TYPE_MATTERS 1
318 /* No data type wants to be aligned rounder than this. */
319 #define BIGGEST_ALIGNMENT 64
321 /* The .align directive in the HP assembler allows up to a 32 alignment. */
322 #define MAX_OFILE_ALIGNMENT 32768
324 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
325 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
326 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
328 /* Make arrays of chars word-aligned for the same reasons. */
329 #define DATA_ALIGNMENT(TYPE, ALIGN) \
330 (TREE_CODE (TYPE) == ARRAY_TYPE \
331 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
332 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
335 /* Set this nonzero if move instructions will actually fail to work
336 when given unaligned data. */
337 #define STRICT_ALIGNMENT 1
339 /* Generate calls to memcpy, memcmp and memset. */
340 #define TARGET_MEM_FUNCTIONS
342 /* Standard register usage. */
344 /* Number of actual hardware registers.
345 The hardware registers are assigned numbers for the compiler
346 from 0 to just below FIRST_PSEUDO_REGISTER.
347 All registers that the compiler knows about must be given numbers,
348 even those that are not normally considered general registers.
350 HP-PA 1.0 has 32 fullword registers and 16 floating point
351 registers. The floating point registers hold either word or double
354 16 additional registers are reserved.
356 HP-PA 1.1 has 32 fullword registers and 32 floating point
357 registers. However, the floating point registers behave
358 differently: the left and right halves of registers are addressable
359 as 32 bit registers. So, we will set things up like the 68k which
360 has different fp units: define separate register sets for the 1.0
363 #define FIRST_PSEUDO_REGISTER 89 /* 32 general regs + 56 fp regs +
366 /* 1 for registers that have pervasive standard uses
367 and are not available for the register allocator.
369 On the HP-PA, these are:
370 Reg 0 = 0 (hardware). However, 0 is used for condition code,
372 Reg 1 = ADDIL target/Temporary (hardware).
373 Reg 2 = Return Pointer
374 Reg 3 = Frame Pointer
375 Reg 4 = Frame Pointer (>8k varying frame with HP compilers only)
376 Reg 4-18 = Preserved Registers
377 Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
378 Reg 20-22 = Temporary Registers
379 Reg 23-26 = Temporary/Parameter Registers
380 Reg 27 = Global Data Pointer (hp)
381 Reg 28 = Temporary/???/Return Value register
382 Reg 29 = Temporary/Static Chain/Return Value register #2
383 Reg 30 = stack pointer
384 Reg 31 = Temporary/Millicode Return Pointer (hp)
386 Freg 0-3 = Status Registers -- Not known to the compiler.
387 Freg 4-7 = Arguments/Return Value
388 Freg 8-11 = Temporary Registers
389 Freg 12-15 = Preserved Registers
391 Freg 16-31 = Reserved
393 On the Snake, fp regs are
395 Freg 0-3 = Status Registers -- Not known to the compiler.
396 Freg 4L-7R = Arguments/Return Value
397 Freg 8L-11R = Temporary Registers
398 Freg 12L-21R = Preserved Registers
399 Freg 22L-31R = Temporary Registers
403 #define FIXED_REGISTERS \
404 {0, 0, 0, 0, 0, 0, 0, 0, \
405 0, 0, 0, 0, 0, 0, 0, 0, \
406 0, 0, 0, 0, 0, 0, 0, 0, \
407 0, 0, 0, 1, 0, 0, 1, 0, \
409 0, 0, 0, 0, 0, 0, 0, 0, \
410 0, 0, 0, 0, 0, 0, 0, 0, \
411 0, 0, 0, 0, 0, 0, 0, 0, \
412 0, 0, 0, 0, 0, 0, 0, 0, \
413 0, 0, 0, 0, 0, 0, 0, 0, \
414 0, 0, 0, 0, 0, 0, 0, 0, \
415 0, 0, 0, 0, 0, 0, 0, 0, \
418 /* 1 for registers not available across function calls.
419 These must include the FIXED_REGISTERS and also any
420 registers that can be used without being saved.
421 The latter must include the registers where values are returned
422 and the register where structure-value addresses are passed.
423 Aside from that, you can include as many other registers as you like. */
424 #define CALL_USED_REGISTERS \
425 {1, 1, 1, 0, 0, 0, 0, 0, \
426 0, 0, 0, 0, 0, 0, 0, 0, \
427 0, 0, 0, 1, 1, 1, 1, 1, \
428 1, 1, 1, 1, 1, 1, 1, 1, \
430 1, 1, 1, 1, 1, 1, 1, 1, \
431 1, 1, 1, 1, 1, 1, 1, 1, \
432 0, 0, 0, 0, 0, 0, 0, 0, \
433 0, 0, 0, 0, 0, 0, 0, 0, \
434 0, 0, 0, 0, 1, 1, 1, 1, \
435 1, 1, 1, 1, 1, 1, 1, 1, \
436 1, 1, 1, 1, 1, 1, 1, 1, \
439 #define CONDITIONAL_REGISTER_USAGE \
443 for (i = 56; i < 88; i++) \
444 fixed_regs[i] = call_used_regs[i] = 1; \
445 for (i = 33; i < 88; i += 2) \
446 fixed_regs[i] = call_used_regs[i] = 1; \
448 else if (TARGET_DISABLE_FPREGS \
449 || TARGET_SOFT_FLOAT) \
451 for (i = 32; i < 88; i++) \
452 fixed_regs[i] = call_used_regs[i] = 1; \
455 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
458 /* Allocate the call used registers first. This should minimize
459 the number of registers that need to be saved (as call used
460 registers will generally not be allocated across a call).
462 Experimentation has shown slightly better results by allocating
463 FP registers first. */
465 #define REG_ALLOC_ORDER \
467 /* caller-saved fp regs. */ \
468 40, 41, 42, 43, 44, 45, 46, 47, \
469 68, 69, 70, 71, 72, 73, 74, 75, \
470 76, 77, 78, 79, 80, 81, 82, 83, \
472 32, 33, 34, 35, 36, 37, 38, 39, \
473 /* caller-saved general regs. */ \
474 19, 20, 21, 22, 23, 24, 25, 26, \
476 /* callee-saved fp regs. */ \
477 48, 49, 50, 51, 52, 53, 54, 55, \
478 56, 57, 58, 59, 60, 61, 62, 63, \
480 /* callee-saved general regs. */ \
481 3, 4, 5, 6, 7, 8, 9, 10, \
482 11, 12, 13, 14, 15, 16, 17, 18, \
483 /* special registers. */ \
487 /* True if register is floating-point. */
488 #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 87)
490 /* Return number of consecutive hard regs needed starting at reg REGNO
491 to hold something of mode MODE.
492 This is ordinarily the length in words of a value of mode MODE
493 but can be less for certain modes in special long registers.
495 On the HP-PA, ordinary registers hold 32 bits worth;
496 The floating point registers are 64 bits wide. Snake fp regs are 32
498 #define HARD_REGNO_NREGS(REGNO, MODE) \
499 (!TARGET_SNAKE && FP_REGNO_P (REGNO) ? 1 \
500 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
502 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
503 On the HP-PA, the cpu registers can hold any mode. We
504 force this to be an even register is it cannot hold the full mode. */
505 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
506 ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
507 /* On 1.0 machines, don't allow wide non-fp modes in fp regs. */ \
508 : !TARGET_SNAKE && FP_REGNO_P (REGNO) \
509 ? GET_MODE_SIZE (MODE) <= 4 || GET_MODE_CLASS (MODE) == MODE_FLOAT \
510 /* Make wide modes be in aligned registers. */ \
511 : GET_MODE_SIZE (MODE) <= 4 || ((REGNO) & 1) == 0)
513 /* Value is 1 if it is a good idea to tie two pseudo registers
514 when one has mode MODE1 and one has mode MODE2.
515 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
516 for any hard reg, then this must be 0 for correct output. */
517 #define MODES_TIEABLE_P(MODE1, MODE2) \
518 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
520 /* Specify the registers used for certain standard purposes.
521 The values of these macros are register numbers. */
523 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
524 /* #define PC_REGNUM */
526 /* Register to use for pushing function arguments. */
527 #define STACK_POINTER_REGNUM 30
529 /* Base register for access to local variables of the function. */
530 #define FRAME_POINTER_REGNUM 3
532 /* Value should be nonzero if functions must have frame pointers. */
533 #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
536 /* C statement to store the difference between the frame pointer
537 and the stack pointer values immediately after the function prologue.
539 Note, we always pretend that this is a leaf function because if
540 it's not, there's no point in trying to eliminate the
541 frame pointer. If it is a leaf function, we guessed right! */
542 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
543 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
545 /* Base register for access to arguments of the function. */
546 #define ARG_POINTER_REGNUM 3
548 /* Register in which static-chain is passed to a function. */
550 #define STATIC_CHAIN_REGNUM 29
552 /* Register which holds offset table for position-independent
555 #define PIC_OFFSET_TABLE_REGNUM 19
556 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
558 /* Initialize hppa_save_pic_table_rtx before RTL generation for
559 each function. We used to do this in FINALIZE_PIC, but FINALIZE_PIC
560 isn't always called for static inline functions. */
561 #define INIT_EXPANDERS hppa_save_pic_table_rtx = 0;
563 /* SOM ABI says that objects larger than 64 bits are returned in memory. */
564 #define DEFAULT_PCC_STRUCT_RETURN 0
565 #define RETURN_IN_MEMORY(TYPE) \
566 (int_size_in_bytes (TYPE) > 8 || TREE_ADDRESSABLE (TYPE))
568 /* Register in which address to store a structure value
569 is passed to a function. */
570 #define STRUCT_VALUE_REGNUM 28
572 /* Define the classes of registers for register constraints in the
573 machine description. Also define ranges of constants.
575 One of the classes must always be named ALL_REGS and include all hard regs.
576 If there is more than one class, another class must be named NO_REGS
577 and contain no registers.
579 The name GENERAL_REGS must be the name of a class (or an alias for
580 another name such as ALL_REGS). This is the class of registers
581 that is allowed by "g" or "r" in a register constraint.
582 Also, registers outside this class are allocated only when
583 instructions express preferences for them.
585 The classes must be numbered in nondecreasing order; that is,
586 a larger-numbered class must never be contained completely
587 in a smaller-numbered class.
589 For any two classes, it is very desirable that there be another
590 class that represents their union. */
592 /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
593 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
594 fmpyadd and fmpysub are restricted. */
596 enum reg_class
{ NO_REGS
, R1_REGS
, GENERAL_REGS
, FP_REGS
, GENERAL_OR_FP_REGS
,
597 SHIFT_REGS
, ALL_REGS
, LIM_REG_CLASSES
};
599 #define N_REG_CLASSES (int) LIM_REG_CLASSES
601 /* Give names of register classes as strings for dump file. */
603 #define REG_CLASS_NAMES \
604 {"NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", \
605 "GENERAL_OR_FP_REGS", "SHIFT_REGS", "ALL_REGS"}
607 /* Define which registers fit in which classes.
608 This is an initializer for a vector of HARD_REG_SET
609 of length N_REG_CLASSES. Register 0, the "condition code" register,
612 #define REG_CLASS_CONTENTS \
613 {{0x00000000, 0x00000000, 0x00000000}, /* NO_REGS */ \
614 {0x00000002, 0x00000000, 0x00000000}, /* R1_REGS */ \
615 {0xfffffffe, 0x00000000, 0x00000000}, /* GENERAL_REGS */ \
616 {0x00000000, 0xffffffff, 0x00ffffff}, /* FP_REGS */ \
617 {0xfffffffe, 0xffffffff, 0x00ffffff}, /* GENERAL_OR_FP_REGS */ \
618 {0x00000000, 0x00000000, 0x01000000}, /* SHIFT_REGS */ \
619 {0xfffffffe, 0xffffffff, 0x01ffffff}} /* ALL_REGS */
621 /* The same information, inverted:
622 Return the class number of the smallest class containing
623 reg number REGNO. This could be a conditional expression
624 or could index an array. */
626 #define REGNO_REG_CLASS(REGNO) \
627 ((REGNO) == 0 ? NO_REGS \
628 : (REGNO) == 1 ? R1_REGS \
629 : (REGNO) < 32 ? GENERAL_REGS \
630 : (REGNO) < 88 ? FP_REGS \
633 /* The class value for index registers, and the one for base regs. */
634 #define INDEX_REG_CLASS GENERAL_REGS
635 #define BASE_REG_CLASS GENERAL_REGS
637 #define FP_REG_CLASS_P(CLASS) \
640 /* Get reg_class from a letter such as appears in the machine description. */
641 /* Keep 'x' for backward compatibility with user asm. */
642 #define REG_CLASS_FROM_LETTER(C) \
643 ((C) == 'f' ? FP_REGS : \
644 (C) == 'x' ? FP_REGS : \
645 (C) == 'q' ? SHIFT_REGS : \
646 (C) == 'a' ? R1_REGS : \
647 (C) == 'Z' ? ALL_REGS : NO_REGS)
649 /* The letters I, J, K, L and M in a register constraint string
650 can be used to stand for particular ranges of immediate operands.
651 This macro defines what the ranges are.
652 C is the letter, and VALUE is a constant value.
653 Return 1 if VALUE is in the range specified by C.
655 `I' is used for the 11 bit constants.
656 `J' is used for the 14 bit constants.
657 `K' is used for values that can be moved with a zdepi insn.
658 `L' is used for the 5 bit constants.
660 `N' is used for values with the least significant 11 bits equal to zero.
661 `O' is used for numbers n such that n+1 is a power of 2.
664 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
665 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
666 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
667 : (C) == 'K' ? zdepi_cint_p (VALUE) \
668 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
669 : (C) == 'M' ? (VALUE) == 0 \
670 : (C) == 'N' ? ((VALUE) & 0x7ff) == 0 \
671 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
672 : (C) == 'P' ? and_mask_p (VALUE) \
675 /* Similar, but for floating or large integer constants, and defining letters
676 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
678 For PA, `G' is the floating-point constant zero. `H' is undefined. */
680 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
681 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
682 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
685 /* Given an rtx X being reloaded into a reg required to be
686 in class CLASS, return the class of reg to actually use.
687 In general this is just CLASS; but on some machines
688 in some cases it is preferable to use a more restrictive class. */
689 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
691 /* Return the register class of a scratch register needed to copy IN into
692 or out of a register in CLASS in MODE. If it can be done directly,
693 NO_REGS is returned. */
695 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
696 secondary_reload_class (CLASS, MODE, IN)
698 /* On the PA it is not possible to directly move data between
699 GENERAL_REGS and FP_REGS. */
700 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
701 (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
703 /* Return the stack location to use for secondary memory needed reloads. */
704 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
705 gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (-16)))
707 /* Return the maximum number of consecutive registers
708 needed to represent mode MODE in a register of class CLASS. */
709 #define CLASS_MAX_NREGS(CLASS, MODE) \
710 (!TARGET_SNAKE && (CLASS) == FP_REGS ? 1 : \
711 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
713 /* Stack layout; function entry, exit and calling. */
715 /* Define this if pushing a word on the stack
716 makes the stack pointer a smaller address. */
717 /* #define STACK_GROWS_DOWNWARD */
719 /* Believe it or not. */
720 #define ARGS_GROW_DOWNWARD
722 /* Define this if the nominal address of the stack frame
723 is at the high-address end of the local variables;
724 that is, each additional local variable allocated
725 goes at a more negative offset in the frame. */
726 /* #define FRAME_GROWS_DOWNWARD */
728 /* Offset within stack frame to start allocating local variables at.
729 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
730 first local allocated. Otherwise, it is the offset to the BEGINNING
731 of the first local allocated. */
732 #define STARTING_FRAME_OFFSET 8
734 /* If we generate an insn to push BYTES bytes,
735 this says how many the stack pointer really advances by.
736 On the HP-PA, don't define this because there are no push insns. */
737 /* #define PUSH_ROUNDING(BYTES) */
739 /* Offset of first parameter from the argument pointer register value.
740 This value will be negated because the arguments grow down.
741 Also note that on STACK_GROWS_UPWARD machines (such as this one)
742 this is the distance from the frame pointer to the end of the first
743 argument, not it's beginning. To get the real offset of the first
744 argument, the size of the argument must be added.
746 ??? Have to check on this.*/
748 #define FIRST_PARM_OFFSET(FNDECL) -32
750 /* Absolute value of offset from top-of-stack address to location to store the
751 function parameter if it can't go in a register.
752 Addresses for following parameters are computed relative to this one. */
753 #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
756 /* When a parameter is passed in a register, stack space is still
758 #define REG_PARM_STACK_SPACE(DECL) 16
760 /* Define this if the above stack space is to be considered part of the
761 space allocated by the caller. */
762 #define OUTGOING_REG_PARM_STACK_SPACE
764 /* Keep the stack pointer constant throughout the function.
765 This is both an optimization and a necessity: longjmp
766 doesn't behave itself when the stack pointer moves within
768 #define ACCUMULATE_OUTGOING_ARGS
770 /* The weird HPPA calling conventions require a minimum of 48 bytes on
771 the stack: 16 bytes for register saves, and 32 bytes for magic.
772 This is the difference between the logical top of stack and the
774 #define STACK_POINTER_OFFSET -32
776 #define STACK_DYNAMIC_OFFSET(FNDECL) \
777 ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
779 /* Value is 1 if returning from a function call automatically
780 pops the arguments described by the number-of-args field in the call.
781 FUNDECL is the declaration node of the function (as a tree),
782 FUNTYPE is the data type of the function (as a tree),
783 or for a library call it is an identifier node for the subroutine name. */
785 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
787 /* Define how to find the value returned by a function.
788 VALTYPE is the data type of the value (as a tree).
789 If the precise function being called is known, FUNC is its FUNCTION_DECL;
790 otherwise, FUNC is 0. */
792 /* On the HP-PA the value is found in register(s) 28(-29), unless
793 the mode is SF or DF. Then the value is returned in fr4 (32, ) */
796 #define FUNCTION_VALUE(VALTYPE, FUNC) \
797 gen_rtx (REG, TYPE_MODE (VALTYPE), ((! TARGET_SOFT_FLOAT \
798 && (TYPE_MODE (VALTYPE) == SFmode || \
799 TYPE_MODE (VALTYPE) == DFmode)) ? \
802 /* Define how to find the value returned by a library function
803 assuming the value has mode MODE. */
805 #define LIBCALL_VALUE(MODE) \
806 gen_rtx (REG, MODE, \
807 (! TARGET_SOFT_FLOAT \
808 && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
810 /* 1 if N is a possible register number for a function value
811 as seen by the caller. */
813 #define FUNCTION_VALUE_REGNO_P(N) \
814 ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
816 /* 1 if N is a possible register number for function argument passing. */
818 #define FUNCTION_ARG_REGNO_P(N) \
819 (((N) >= 23 && (N) <= 26) || (! TARGET_SOFT_FLOAT && (N) >= 32 && (N) <= 39))
821 /* Define a data type for recording info about an argument list
822 during the scan of that argument list. This data type should
823 hold all necessary information about the function itself
824 and about the args processed so far, enough to enable macros
825 such as FUNCTION_ARG to determine where the next arg should go.
827 On the HP-PA, this is a single integer, which is a number of words
828 of arguments scanned so far (including the invisible argument,
829 if any, which holds the structure-value-address).
830 Thus 4 or more means all following args should go on the stack. */
832 struct hppa_args
{int words
, nargs_prototype
; };
834 #define CUMULATIVE_ARGS struct hppa_args
836 /* Initialize a variable CUM of type CUMULATIVE_ARGS
837 for a call to a function whose data type is FNTYPE.
838 For a library call, FNTYPE is 0. */
840 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
842 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
843 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
844 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
845 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
850 /* Similar, but when scanning the definition of a procedure. We always
851 set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */
853 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
855 (CUM).nargs_prototype = 1000
857 /* Figure out the size in words of the function argument. */
859 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
860 ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
862 /* Update the data in CUM to advance over an argument
863 of mode MODE and data type TYPE.
864 (TYPE is null for libcalls where that information may not be available.) */
866 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
867 { (CUM).nargs_prototype--; \
868 ((((CUM).words & 01) && (TYPE) != 0 \
869 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1) \
871 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE); \
874 /* Determine where to put an argument to a function.
875 Value is zero to push the argument on the stack,
876 or a hard register in which to store the argument.
878 MODE is the argument's machine mode.
879 TYPE is the data type of the argument (as a tree).
880 This is null for libcalls where that information may
882 CUM is a variable of type CUMULATIVE_ARGS which gives info about
883 the preceding args and about the function being called.
884 NAMED is nonzero if this argument is a named parameter
885 (otherwise it is an extra parameter matching an ellipsis).
887 On the HP-PA the first four words of args are normally in registers
888 and the rest are pushed. But any arg that won't entirely fit in regs
891 Arguments passed in registers are either 1 or 2 words long.
893 The caller must make a distinction between calls to explicitly named
894 functions and calls through pointers to functions -- the conventions
895 are different! Calls through pointers to functions only use general
896 registers for the first four argument words.
898 Of course all this is different for the portable runtime model
899 HP wants everyone to use for ELF. Ugh. Here's a quick description
900 of how it's supposed to work.
902 1) callee side remains unchanged. It expects integer args to be
903 in the integer registers, float args in the float registers and
904 unnamed args in integer registers.
906 2) caller side now depends on if the function being called has
907 a prototype in scope (rather than if it's being called indirectly).
909 2a) If there is a prototype in scope, then arguments are passed
910 according to their type (ints in integer registers, floats in float
911 registers, unnamed args in integer registers.
913 2b) If there is no prototype in scope, then floating point arguments
914 are passed in both integer and float registers. egad.
916 FYI: The portable parameter passing conventions are almost exactly like
917 the standard parameter passing conventions on the RS6000. That's why
918 you'll see lots of similar code in rs6000.h. */
920 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
922 /* Do not expect to understand this without reading it several times. I'm
923 tempted to try and simply it, but I worry about breaking something. */
925 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
926 (4 >= ((CUM).words + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
927 ? (!TARGET_PORTABLE_RUNTIME || (TYPE) == 0 \
928 || !FLOAT_MODE_P (MODE) || TARGET_SOFT_FLOAT \
929 || (CUM).nargs_prototype > 0) \
930 ? gen_rtx (REG, (MODE), \
931 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
932 ? (((!current_call_is_indirect \
933 || TARGET_PORTABLE_RUNTIME) \
934 && (MODE) == DFmode \
935 && ! TARGET_SOFT_FLOAT) \
936 ? ((CUM).words ? 38 : 34) \
937 : ((CUM).words ? 23 : 25)) \
938 : (((!current_call_is_indirect \
939 || TARGET_PORTABLE_RUNTIME) \
940 && (MODE) == SFmode \
941 && ! TARGET_SOFT_FLOAT) \
942 ? (32 + 2 * (CUM).words) \
943 : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE), \
945 /* We are calling a non-prototyped function with floating point \
946 arguments using the portable conventions. */ \
947 : gen_rtx (EXPR_LIST, VOIDmode, \
948 gen_rtx (REG, (MODE), \
949 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
950 ? ((CUM).words ? 38 : 34) \
951 : (32 + 2 * (CUM).words))), \
952 gen_rtx (REG, (MODE), \
953 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
954 ? ((CUM).words ? 23 : 25) \
955 : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE),\
957 /* Pass this parameter in the stack. */ \
960 /* For an arg passed partly in registers and partly in memory,
961 this is the number of registers used.
962 For args passed entirely in registers or entirely in memory, zero. */
964 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
966 /* If defined, a C expression that gives the alignment boundary, in
967 bits, of an argument with the specified mode and type. If it is
968 not defined, `PARM_BOUNDARY' is used for all arguments. */
970 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
972 ? (((int_size_in_bytes (TYPE)) + 3) / 4) * BITS_PER_WORD \
973 : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
975 : GET_MODE_ALIGNMENT(MODE)))
977 /* Arguments larger than eight bytes are passed by invisible reference */
979 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
980 ((TYPE) && int_size_in_bytes (TYPE) > 8)
982 extern struct rtx_def
*hppa_compare_op0
, *hppa_compare_op1
;
983 extern enum cmp_type hppa_branch_type
;
985 /* Output the label for a function definition. */
986 #ifndef HP_FP_ARG_DESCRIPTOR_REVERSED
987 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
988 do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
989 fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
991 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
992 do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
993 fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
996 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
997 do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \
998 tree tree_type = TREE_TYPE (DECL); \
1001 if (TREE_PUBLIC (DECL) || TARGET_GAS) \
1002 { extern int current_function_varargs; \
1003 if (TREE_PUBLIC (DECL)) \
1005 fputs ("\t.EXPORT ", FILE); \
1006 assemble_name (FILE, NAME); \
1007 fputs (",ENTRY,PRIV_LEV=3", FILE); \
1011 fputs ("\t.PARAM ", FILE); \
1012 assemble_name (FILE, NAME); \
1014 if (TARGET_PORTABLE_RUNTIME) \
1016 fputs (",ARGW0=NO,ARGW1=NO,ARGW2=NO,ARGW3=NO,", FILE); \
1017 fputs ("RTNVAL=NO\n", FILE); \
1020 for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
1021 parm = TREE_CHAIN (parm)) \
1023 if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode \
1024 && ! TARGET_SOFT_FLOAT) \
1025 fprintf (FILE, ",ARGW%d=FR", i++); \
1026 else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode \
1027 && ! TARGET_SOFT_FLOAT) \
1032 ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
1040 FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
1041 DECL_ARG_TYPE (parm)); \
1042 if (arg_size == 2 && i <= 2) \
1045 fprintf (FILE, ",ARGW%d=GR", i++); \
1046 fprintf (FILE, ",ARGW%d=GR", i++); \
1048 else if (arg_size == 1) \
1049 fprintf (FILE, ",ARGW%d=GR", i++); \
1054 /* anonymous args */ \
1055 if ((TYPE_ARG_TYPES (tree_type) != 0 \
1056 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
1057 != void_type_node)) \
1058 || current_function_varargs) \
1060 for (; i < 4; i++) \
1061 fprintf (FILE, ",ARGW%d=GR", i); \
1063 if (TYPE_MODE (fntype) == DFmode && ! TARGET_SOFT_FLOAT) \
1064 fprintf (FILE, ",RTNVAL=FR"); \
1065 else if (TYPE_MODE (fntype) == SFmode && ! TARGET_SOFT_FLOAT) \
1066 fprintf (FILE, ",RTNVAL=FU"); \
1067 else if (fntype != void_type_node) \
1068 fprintf (FILE, ",RTNVAL=GR"); \
1069 fputs ("\n", FILE); \
1072 /* This macro generates the assembly code for function entry.
1073 FILE is a stdio stream to output the code to.
1074 SIZE is an int: how many units of temporary storage to allocate.
1075 Refer to the array `regs_ever_live' to determine which registers
1076 to save; `regs_ever_live[I]' is nonzero if register number I
1077 is ever used in the function. This macro is responsible for
1078 knowing which registers should not be saved even if used. */
1080 /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
1081 of memory. If any fpu reg is used in the function, we allocate
1082 such a block here, at the bottom of the frame, just in case it's needed.
1084 If this function is a leaf procedure, then we may choose not
1085 to do a "save" insn. The decision about whether or not
1086 to do this is made in regclass.c. */
1088 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1089 output_function_prologue (FILE, SIZE)
1091 /* Output assembler code to FILE to increment profiler label # LABELNO
1092 for profiling a function entry.
1094 Because HPUX _mcount is so different, we actually emit the
1095 profiling code in function_prologue. This just stores LABELNO for
1098 #define PROFILE_BEFORE_PROLOGUE
1099 #define FUNCTION_PROFILER(FILE, LABELNO) \
1100 { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
1102 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1103 the stack pointer does not matter. The value is tested only in
1104 functions that have frame pointers.
1105 No definition is equivalent to always zero. */
1107 extern int may_call_alloca
;
1108 extern int current_function_pretend_args_size
;
1110 #define EXIT_IGNORE_STACK \
1111 (get_frame_size () != 0 \
1112 || current_function_calls_alloca || current_function_outgoing_args_size)
1115 /* This macro generates the assembly code for function exit,
1116 on machines that need it. If FUNCTION_EPILOGUE is not defined
1117 then individual return instructions are generated for each
1118 return statement. Args are same as for FUNCTION_PROLOGUE.
1120 The function epilogue should not depend on the current stack pointer!
1121 It should use the frame pointer only. This is mandatory because
1122 of alloca; we also take advantage of it to omit stack adjustments
1123 before returning. */
1125 /* This declaration is needed due to traditional/ANSI
1126 incompatibilities which cannot be #ifdefed away
1127 because they occur inside of macros. Sigh. */
1128 extern union tree_node
*current_function_decl
;
1130 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1131 output_function_epilogue (FILE, SIZE)
1133 /* Output assembler code for a block containing the constant parts
1134 of a trampoline, leaving space for the variable parts.\
1136 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
1137 and then branches to the specified routine.
1139 This code template is copied from text segment to stack location
1140 and then patched with INITIALIZE_TRAMPOLINE to contain
1141 valid values, and then entered as a subroutine.
1143 It is best to keep this as small as possible to avoid having to
1144 flush multiple lines in the cache. */
1146 #define TRAMPOLINE_TEMPLATE(FILE) \
1148 fprintf (FILE, "\tldw 36(0,%%r22),%%r21\n"); \
1149 fprintf (FILE, "\tbb,>=,n %%r21,30,.+16\n"); \
1150 fprintf (FILE, "\tdepi 0,31,2,%%r21\n"); \
1151 fprintf (FILE, "\tldw 4(0,%%r21),%%r19\n"); \
1152 fprintf (FILE, "\tldw 0(0,%%r21),%%r21\n"); \
1153 fprintf (FILE, "\tldsid (0,%%r21),%%r1\n"); \
1154 fprintf (FILE, "\tmtsp %%r1,%%sr0\n"); \
1155 fprintf (FILE, "\tbe 0(%%sr0,%%r21)\n"); \
1156 fprintf (FILE, "\tldw 40(0,%%r22),%%r29\n"); \
1157 fprintf (FILE, "\t.word 0\n"); \
1158 fprintf (FILE, "\t.word 0\n"); \
1161 /* Length in units of the trampoline for entering a nested function.
1163 Flush the cache entries corresponding to the first and last addresses
1164 of the trampoline. This is necessary as the trampoline may cross two
1167 If the code part of the trampoline ever grows to > 32 bytes, then it
1168 will become necessary to hack on the cacheflush pattern in pa.md. */
1170 #define TRAMPOLINE_SIZE (11 * 4)
1172 /* Emit RTL insns to initialize the variable parts of a trampoline.
1173 FNADDR is an RTX for the address of the function's pure code.
1174 CXT is an RTX for the static chain value for the function.
1176 Move the function address to the trampoline template at offset 12.
1177 Move the static chain value to trampoline template at offset 16. */
1179 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1181 rtx start_addr, end_addr; \
1183 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1184 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \
1185 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1186 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \
1187 /* fdc and fic only use registers for the address to flush, \
1188 they do not accept integer displacements. */ \
1189 start_addr = force_reg (SImode, (TRAMP)); \
1190 end_addr = force_reg (SImode, plus_constant ((TRAMP), 32)); \
1191 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1192 end_addr = force_reg (SImode, plus_constant (start_addr, 32)); \
1193 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1194 gen_reg_rtx (SImode), gen_reg_rtx (SImode)));\
1197 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1198 reference the 4 integer arg registers and 4 fp arg registers.
1199 Ordinarily they are not call used registers, but they are for
1200 _builtin_saveregs, so we must make this explicit. */
1202 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) (rtx)hppa_builtin_saveregs (ARGLIST)
1205 /* Addressing modes, and classification of registers for them. */
1207 #define HAVE_POST_INCREMENT
1208 #define HAVE_POST_DECREMENT
1210 #define HAVE_PRE_DECREMENT
1211 #define HAVE_PRE_INCREMENT
1213 /* Macros to check register numbers against specific register classes. */
1215 /* These assume that REGNO is a hard or pseudo reg number.
1216 They give nonzero only if REGNO is a hard reg of the suitable class
1217 or a pseudo reg currently allocated to a suitable hard reg.
1218 Since they use reg_renumber, they are safe only once reg_renumber
1219 has been allocated, which happens in local-alloc.c. */
1221 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1222 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1223 #define REGNO_OK_FOR_BASE_P(REGNO) \
1224 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1225 #define REGNO_OK_FOR_FP_P(REGNO) \
1226 (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
1228 /* Now macros that check whether X is a register and also,
1229 strictly, whether it is in a specified class.
1231 These macros are specific to the the HP-PA, and may be used only
1232 in code for printing assembler insns and in conditions for
1233 define_optimization. */
1235 /* 1 if X is an fp register. */
1237 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1239 /* Maximum number of registers that can appear in a valid memory address. */
1241 #define MAX_REGS_PER_ADDRESS 2
1243 /* Recognize any constant value that is a valid address except
1244 for symbolic addresses. We get better CSE by rejecting them
1245 here and allowing hppa_legitimize_address to break them up. We
1246 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1248 #define CONSTANT_ADDRESS_P(X) \
1249 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1250 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1251 || GET_CODE (X) == HIGH) \
1252 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1254 /* Include all constant integers and constant doubles, but not
1255 floating-point, except for floating-point zero. */
1257 #define LEGITIMATE_CONSTANT_P(X) \
1258 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1259 || (X) == CONST0_RTX (GET_MODE (X))) \
1260 && !(flag_pic && function_label_operand (X, VOIDmode)))
1262 /* Subroutine for EXTRA_CONSTRAINT.
1264 Return 1 iff OP is a pseudo which did not get a hard register and
1265 we are running the reload pass. */
1267 #define IS_RELOADING_PSEUDO_P(OP) \
1268 ((reload_in_progress \
1269 && GET_CODE (OP) == REG \
1270 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1271 && reg_renumber [REGNO (OP)] < 0))
1273 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1275 For the HPPA, `Q' means that this is a memory operand but not a
1276 symbolic memory operand. Note that an unassigned pseudo register
1277 is such a memory operand. Needed because reload will generate
1278 these things in insns and then not re-recognize the insns, causing
1279 constrain_operands to fail.
1281 Also note `Q' accepts any memory operand during the reload pass.
1282 This includes out-of-range displacements in reg+d addressing.
1283 This makes for better code. (??? For 2.5 address this issue).
1289 `T' is for fp loads and stores. */
1290 #define EXTRA_CONSTRAINT(OP, C) \
1292 (IS_RELOADING_PSEUDO_P (OP) \
1293 || (GET_CODE (OP) == MEM \
1294 && reload_in_progress) \
1295 || (GET_CODE (OP) == MEM \
1296 && memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1297 && ! symbolic_memory_operand (OP, VOIDmode))) \
1299 (GET_CODE (OP) == MEM \
1300 /* Using DFmode forces only short displacements \
1301 to be recognized as valid in reg+d addresses. */\
1302 && memory_address_p (DFmode, XEXP (OP, 0))) : 0))
1304 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1305 and check its validity for a certain class.
1306 We have two alternate definitions for each of them.
1307 The usual definition accepts all pseudo regs; the other rejects
1308 them unless they have been allocated suitable hard regs.
1309 The symbol REG_OK_STRICT causes the latter definition to be used.
1311 Most source files want to accept pseudo regs in the hope that
1312 they will get allocated to the class that the insn wants them to be in.
1313 Source files for reload pass need to be strict.
1314 After reload, it makes no difference, since pseudo regs have
1315 been eliminated by then. */
1317 #ifndef REG_OK_STRICT
1319 /* Nonzero if X is a hard reg that can be used as an index
1320 or if it is a pseudo reg. */
1321 #define REG_OK_FOR_INDEX_P(X) \
1322 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1323 /* Nonzero if X is a hard reg that can be used as a base reg
1324 or if it is a pseudo reg. */
1325 #define REG_OK_FOR_BASE_P(X) \
1326 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1330 /* Nonzero if X is a hard reg that can be used as an index. */
1331 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1332 /* Nonzero if X is a hard reg that can be used as a base reg. */
1333 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1337 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1338 that is a valid memory address for an instruction.
1339 The MODE argument is the machine mode for the MEM expression
1340 that wants to use this address.
1342 On the HP-PA, the actual legitimate addresses must be
1343 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1344 But we can treat a SYMBOL_REF as legitimate if it is part of this
1345 function's constant-pool, because such addresses can actually
1346 be output as REG+SMALLINT.
1348 Note we only allow 5 bit immediates for access to a constant address;
1349 doing so avoids losing for loading/storing a FP register at an address
1350 which will not fit in 5 bits. */
1352 #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1353 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1355 #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1356 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1358 #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1359 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1361 #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1362 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1364 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1366 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1367 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1368 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1369 && REG_P (XEXP (X, 0)) \
1370 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1372 else if (GET_CODE (X) == PLUS) \
1374 rtx base = 0, index; \
1375 if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1377 if (GET_CODE (XEXP (X, 1)) == REG \
1378 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1380 else if (flag_pic == 1 \
1381 && GET_CODE (XEXP (X, 1)) == SYMBOL_REF)\
1384 else if (REG_P (XEXP (X, 0)) \
1385 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1386 base = XEXP (X, 0), index = XEXP (X, 1); \
1387 else if (REG_P (XEXP (X, 1)) \
1388 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1389 base = XEXP (X, 1), index = XEXP (X, 0); \
1391 if (GET_CODE (index) == CONST_INT \
1392 && ((INT_14_BITS (index) \
1393 && (TARGET_SOFT_FLOAT \
1394 || ((MODE) != SFmode && (MODE) != DFmode))) \
1395 || INT_5_BITS (index))) \
1398 else if (GET_CODE (X) == LO_SUM \
1399 && GET_CODE (XEXP (X, 0)) == REG \
1400 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1401 && CONSTANT_P (XEXP (X, 1)) \
1402 && (TARGET_SOFT_FLOAT \
1403 || ((MODE) != SFmode \
1404 && (MODE) != DFmode))) \
1406 else if (GET_CODE (X) == LO_SUM \
1407 && GET_CODE (XEXP (X, 0)) == SUBREG \
1408 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1409 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1410 && CONSTANT_P (XEXP (X, 1)) \
1411 && (TARGET_SOFT_FLOAT \
1412 || ((MODE) != SFmode \
1413 && (MODE) != DFmode))) \
1415 else if (GET_CODE (X) == LABEL_REF \
1416 || (GET_CODE (X) == CONST_INT \
1417 && INT_5_BITS (X))) \
1419 /* Needed for -fPIC */ \
1420 else if (GET_CODE (X) == LO_SUM \
1421 && GET_CODE (XEXP (X, 0)) == REG \
1422 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1423 && GET_CODE (XEXP (X, 1)) == UNSPEC) \
1427 /* Try machine-dependent ways of modifying an illegitimate address
1428 to be legitimate. If we find one, return the new, valid address.
1429 This macro is used in only one place: `memory_address' in explow.c.
1431 OLDX is the address as it was before break_out_memory_refs was called.
1432 In some cases it is useful to look at this to decide what needs to be done.
1434 MODE and WIN are passed so that this macro can use
1435 GO_IF_LEGITIMATE_ADDRESS.
1437 It is always safe for this macro to do nothing. It exists to recognize
1438 opportunities to optimize the output. */
1440 extern struct rtx_def
*hppa_legitimize_address ();
1441 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1442 { rtx orig_x = (X); \
1443 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1444 if ((X) != orig_x && memory_address_p (MODE, X)) \
1447 /* Go to LABEL if ADDR (a legitimate address expression)
1448 has an effect that depends on the machine mode it is used for. */
1450 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1451 if (GET_CODE (ADDR) == PRE_DEC \
1452 || GET_CODE (ADDR) == POST_DEC \
1453 || GET_CODE (ADDR) == PRE_INC \
1454 || GET_CODE (ADDR) == POST_INC) \
1457 /* Define this macro if references to a symbol must be treated
1458 differently depending on something about the variable or
1459 function named by the symbol (such as what section it is in).
1461 The macro definition, if any, is executed immediately after the
1462 rtl for DECL or other node is created.
1463 The value of the rtl will be a `mem' whose address is a
1466 The usual thing for this macro to do is to a flag in the
1467 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1468 name string in the `symbol_ref' (if one bit is not enough
1471 On the HP-PA we use this to indicate if a symbol is in text or
1472 data space. Also, function labels need special treatment. */
1474 #define TEXT_SPACE_P(DECL)\
1475 (TREE_CODE (DECL) == FUNCTION_DECL \
1476 || (TREE_CODE (DECL) == VAR_DECL \
1477 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1479 || (*tree_code_type[(int) TREE_CODE (DECL)] == 'c' \
1480 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1482 #define FUNCTION_NAME_P(NAME) \
1483 (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@'))
1485 #define ENCODE_SECTION_INFO(DECL)\
1487 { if (TEXT_SPACE_P (DECL)) \
1489 if (TREE_CODE (DECL) == FUNCTION_DECL \
1490 || TREE_CODE (DECL) == VAR_DECL) \
1491 _rtl = DECL_RTL (DECL); \
1493 _rtl = TREE_CST_RTL (DECL); \
1494 SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
1495 if (TREE_CODE (DECL) == FUNCTION_DECL) \
1496 hppa_encode_label (XEXP (DECL_RTL (DECL), 0));\
1501 /* Store the user-specified part of SYMBOL_NAME in VAR.
1502 This is sort of inverse to ENCODE_SECTION_INFO. */
1504 #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1505 (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \
1506 1 + (SYMBOL_NAME)[1] == '@'\
1507 : (SYMBOL_NAME)[0] == '@'))
1509 /* Arghh. This is used for stuff in the constant pool; this may include
1510 function addresses on the PA, which during PIC code generation must
1511 reside in the data space. Unfortuantely, there's no way to determine
1512 if a particular label in the constant pool refers to a function address.
1513 So just force everything into the data space during PIC generation. */
1514 #define SELECT_RTX_SECTION(RTX,MODE) \
1518 readonly_data_section ();
1520 /* Specify the machine mode that this machine uses
1521 for the index in the tablejump instruction. */
1522 #define CASE_VECTOR_MODE DImode
1524 /* Define this if the tablejump instruction expects the table
1525 to contain offsets from the address of the table.
1526 Do not define this if the table should contain absolute addresses. */
1527 /* #define CASE_VECTOR_PC_RELATIVE */
1529 #define CASE_DROPS_THROUGH
1530 /* Specify the tree operation to be used to convert reals to integers. */
1531 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1533 /* This is the kind of divide that is easiest to do in the general case. */
1534 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1536 /* Define this as 1 if `char' should by default be signed; else as 0. */
1537 #define DEFAULT_SIGNED_CHAR 1
1539 /* Max number of bytes we can move from memory to memory
1540 in one reasonably fast instruction. */
1543 /* Define if operations between registers always perform the operation
1544 on the full register even if a narrower mode is specified. */
1545 #define WORD_REGISTER_OPERATIONS
1547 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1548 will either zero-extend or sign-extend. The value of this macro should
1549 be the code that says which one of the two operations is implicitly
1550 done, NIL if none. */
1551 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1553 /* Nonzero if access to memory by bytes is slow and undesirable. */
1554 #define SLOW_BYTE_ACCESS 1
1556 /* Do not break .stabs pseudos into continuations. */
1557 #define DBX_CONTIN_LENGTH 0
1559 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1560 is done just by pretending it is already truncated. */
1561 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1563 /* We assume that the store-condition-codes instructions store 0 for false
1564 and some other value for true. This is the value stored for true. */
1566 #define STORE_FLAG_VALUE 1
1568 /* When a prototype says `char' or `short', really pass an `int'. */
1569 #define PROMOTE_PROTOTYPES
1571 /* Specify the machine mode that pointers have.
1572 After generation of rtl, the compiler makes no further distinction
1573 between pointers and any other objects of this machine mode. */
1574 #define Pmode SImode
1576 /* Add any extra modes needed to represent the condition code.
1578 HPPA floating comparisons produce condition codes. */
1579 #define EXTRA_CC_MODES CCFPmode
1581 /* Define the names for the modes specified above. */
1582 #define EXTRA_CC_NAMES "CCFP"
1584 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1585 return the mode to be used for the comparison. For floating-point, CCFPmode
1586 should be used. CC_NOOVmode should be used when the first operand is a
1587 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1589 #define SELECT_CC_MODE(OP,X,Y) \
1590 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1592 /* A function address in a call instruction
1593 is a byte address (for indexing purposes)
1594 so give the MEM rtx a byte's mode. */
1595 #define FUNCTION_MODE SImode
1597 /* Define this if addresses of constant functions
1598 shouldn't be put through pseudo regs where they can be cse'd.
1599 Desirable on machines where ordinary constants are expensive
1600 but a CALL with constant address is cheap. */
1601 #define NO_FUNCTION_CSE
1603 /* Define this to be nonzero if shift instructions ignore all but the low-order
1605 #define SHIFT_COUNT_TRUNCATED 1
1607 /* Use atexit for static constructors/destructors, instead of defining
1608 our own exit function. */
1611 /* Compute the cost of computing a constant rtl expression RTX
1612 whose rtx-code is CODE. The body of this macro is a portion
1613 of a switch statement. If the code is computed here,
1614 return it with a return statement. Otherwise, break from the switch. */
1616 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1618 if (INTVAL (RTX) == 0) return 0; \
1619 if (INT_14_BITS (RTX)) return 1; \
1626 case CONST_DOUBLE: \
1627 if (RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)\
1628 && OUTER_CODE != SET) \
1633 #define ADDRESS_COST(RTX) \
1634 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1636 /* Compute extra cost of moving data between one register class
1639 Make moves from SAR so expensive they should never happen. We used to
1640 have 0xffff here, but that generates overflow in rare cases.
1642 Copies involving a FP register and a non-FP register are relatively
1643 expensive because they must go through memory.
1645 Other copies are reasonably cheap. */
1646 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1647 (CLASS1 == SHIFT_REGS ? 0x100 \
1648 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1649 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1653 /* Provide the costs of a rtl expression. This is in the body of a
1654 switch on CODE. The purpose for the cost of MULT is to encourage
1655 `synth_mult' to find a synthetic multiply when reasonable. */
1657 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1659 return (TARGET_SNAKE && ! TARGET_DISABLE_FPREGS \
1660 && ! TARGET_SOFT_FLOAT \
1661 ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20)); \
1666 return COSTS_N_INSNS (60); \
1668 if (GET_CODE (XEXP (X, 0)) == MULT \
1669 && shadd_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1670 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1671 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1674 /* Adjust the cost of dependencies. */
1676 #define ADJUST_COST(INSN,LINK,DEP,COST) \
1677 (COST) = pa_adjust_cost (INSN, LINK, DEP, COST)
1679 /* Handling the special cases is going to get too complicated for a macro,
1680 just call `pa_adjust_insn_length' to do the real work. */
1681 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1682 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1684 /* Enable a bug fix. (This is for extra caution.) */
1685 #define SHORTEN_WITH_ADJUST_INSN_LENGTH
1687 /* Millicode insns are actually function calls with some special
1688 constraints on arguments and register usage.
1690 Millicode calls always expect their arguments in the integer argument
1691 registers, and always return their result in %r29 (ret1). They
1692 are expected to clobber their arguments, %r1, %r29, and %r31 and
1695 These macros tell reorg that the references to arguments and
1696 register clobbers for millicode calls do not appear to happen
1697 until after the millicode call. This allows reorg to put insns
1698 which set the argument registers into the delay slot of the millicode
1699 call -- thus they act more like traditional CALL_INSNs.
1701 get_attr_type will try to recognize the given insn, so make sure to
1702 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1704 #define INSN_SETS_ARE_DELAYED(X) \
1705 ((GET_CODE (X) == INSN \
1706 && GET_CODE (PATTERN (X)) != SEQUENCE \
1707 && GET_CODE (PATTERN (X)) != USE \
1708 && GET_CODE (PATTERN (X)) != CLOBBER \
1709 && get_attr_type (X) == TYPE_MILLI))
1711 #define INSN_REFERENCES_ARE_DELAYED(X) \
1712 ((GET_CODE (X) == INSN \
1713 && GET_CODE (PATTERN (X)) != SEQUENCE \
1714 && GET_CODE (PATTERN (X)) != USE \
1715 && GET_CODE (PATTERN (X)) != CLOBBER \
1716 && get_attr_type (X) == TYPE_MILLI))
1719 /* Control the assembler format that we output. */
1721 /* Output at beginning of assembler file. */
1723 #define ASM_FILE_START(FILE) \
1724 do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1725 \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1726 \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\
1728 \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1729 \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1730 \t.IMPORT $global$,DATA\n\
1731 \t.IMPORT $$dyncall,MILLICODE\n");\
1733 fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\
1734 if (write_symbols != NO_DEBUG) \
1735 output_file_directive ((FILE), main_input_filename); \
1738 /* Output to assembler file text saying following lines
1739 may contain character constants, extra white space, comments, etc. */
1741 #define ASM_APP_ON ""
1743 /* Output to assembler file text saying following lines
1744 no longer contain unusual constructs. */
1746 #define ASM_APP_OFF ""
1748 /* We don't yet know how to identify GCC to HP-PA machines. */
1749 #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1751 /* Output before code. */
1753 /* Supposedly the assembler rejects the command if there is no tab! */
1754 #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1756 /* Output before read-only data. */
1758 /* Supposedly the assembler rejects the command if there is no tab! */
1759 #define READONLY_DATA_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $LIT$\n"
1761 #define READONLY_DATA_SECTION readonly_data
1763 /* Output before writable data. */
1765 /* Supposedly the assembler rejects the command if there is no tab! */
1766 #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1768 /* Output before uninitialized data. */
1770 #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$\n"
1772 /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
1774 #define EXTRA_SECTIONS in_bss, in_readonly_data
1776 /* FIXME: HPUX ld generates incorrect GOT entries for "T" fixups
1777 which reference data within the $TEXT$ space (for example constant
1778 strings in the $LIT$ subspace).
1780 The assemblers (GAS and HP as) both have problems with handling
1781 the difference of two symbols which is the other correct way to
1782 reference constant data during PIC code generation.
1784 So, there's no way to reference constant data which is in the
1785 $TEXT$ space during PIC generation. Instead place all constant
1786 data into the $PRIVATE$ subspace (this reduces sharing, but it
1787 works correctly). */
1789 #define EXTRA_SECTION_FUNCTIONS \
1793 if (in_section != in_bss) \
1795 fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
1796 in_section = in_bss; \
1802 if (in_section != in_readonly_data) \
1805 fprintf (asm_out_file, "%s\n", DATA_SECTION_ASM_OP); \
1807 fprintf (asm_out_file, "%s\n", READONLY_DATA_ASM_OP); \
1808 in_section = in_readonly_data; \
1813 /* How to refer to registers in assembler output.
1814 This sequence is indexed by compiler's hard-register-number (see above). */
1816 #define REGISTER_NAMES \
1817 {"%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1818 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1819 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
1820 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
1821 "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
1822 "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R", \
1823 "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R", \
1824 "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R", \
1825 "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R", \
1826 "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R", \
1827 "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R", \
1830 #define ADDITIONAL_REGISTER_NAMES \
1831 {{"%fr4L",32}, {"%fr5L",34}, {"%fr6L",36}, {"%fr7L",38}, \
1832 {"%fr8L",40}, {"%fr9L",42}, {"%fr10L",44}, {"%fr11L",46}, \
1833 {"%fr12L",48}, {"%fr13L",50}, {"%fr14L",52}, {"%fr15L",54}, \
1834 {"%fr16L",56}, {"%fr17L",58}, {"%fr18L",60}, {"%fr19L",62}, \
1835 {"%fr20L",64}, {"%fr21L",66}, {"%fr22L",68}, {"%fr23L",70}, \
1836 {"%fr24L",72}, {"%fr25L",74}, {"%fr26L",76}, {"%fr27L",78}, \
1837 {"%fr28L",80}, {"%fr29L",82}, {"%fr30L",84}, {"%fr31R",86}, \
1840 /* How to renumber registers for dbx and gdb.
1842 Registers 0 - 31 remain unchanged.
1844 Registers 32 - 87 are mapped to 72 - 127
1846 Register 88 is mapped to 32. */
1848 #define DBX_REGISTER_NUMBER(REGNO) \
1849 ((REGNO) <= 31 ? (REGNO) : \
1850 ((REGNO) > 31 && (REGNO) <= 87 ? (REGNO) + 40 : 32))
1852 /* This is how to output the definition of a user-level label named NAME,
1853 such as the label on a static function or variable NAME. */
1855 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1856 do { assemble_name (FILE, NAME); \
1857 fputc ('\n', FILE); } while (0)
1859 /* This is how to output a command to make the user-level label named NAME
1860 defined for reference from other files. */
1862 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1863 do { fputs ("\t.IMPORT ", FILE); \
1864 assemble_name (FILE, NAME); \
1865 if (FUNCTION_NAME_P (NAME)) \
1866 fputs (",CODE\n", FILE); \
1868 fputs (",DATA\n", FILE); \
1871 /* The bogus HP assembler requires ALL external references to be
1872 "imported", even library calls. They look a bit different, so
1873 here's this macro. */
1875 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1876 do { fputs ("\t.IMPORT ", FILE); \
1877 assemble_name (FILE, XSTR ((RTL), 0)); \
1878 fputs (",CODE\n", FILE); \
1881 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1883 /* We only handle DATA objects here, functions are globalized in \
1884 ASM_DECLARE_FUNCTION_NAME. */ \
1885 if (! FUNCTION_NAME_P (NAME)) \
1887 fputs ("\t.EXPORT ", FILE); \
1888 assemble_name (FILE, NAME); \
1889 fputs (",DATA\n", FILE); \
1893 /* This is how to output a reference to a user-level label named NAME.
1894 `assemble_name' uses this. */
1896 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1897 fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1899 /* This is how to output an internal numbered label where
1900 PREFIX is the class of label and NUM is the number within the class. */
1902 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1903 {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);}
1905 /* This is how to store into the string LABEL
1906 the symbol_ref name of an internal numbered label where
1907 PREFIX is the class of label and NUM is the number within the class.
1908 This is suitable for output with `assemble_name'. */
1910 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1911 sprintf (LABEL, "*%c$%s%04d", (PREFIX)[0], (PREFIX) + 1, NUM)
1913 /* This is how to output an assembler line defining a `double' constant. */
1915 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1917 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
1918 fprintf (FILE, "\t.word 0x%lx\n\t.word 0x%lx\n", l[0], l[1]); \
1921 /* This is how to output an assembler line defining a `float' constant. */
1923 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1925 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1926 fprintf (FILE, "\t.word 0x%lx\n", l); \
1929 /* This is how to output an assembler line defining an `int' constant. */
1931 #define ASM_OUTPUT_INT(FILE,VALUE) \
1932 { fprintf (FILE, "\t.word "); \
1933 if (function_label_operand (VALUE, VOIDmode) \
1934 && !TARGET_PORTABLE_RUNTIME) \
1935 fprintf (FILE, "P%%"); \
1936 output_addr_const (FILE, (VALUE)); \
1937 fprintf (FILE, "\n");}
1939 /* Likewise for `short' and `char' constants. */
1941 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1942 ( fprintf (FILE, "\t.half "), \
1943 output_addr_const (FILE, (VALUE)), \
1944 fprintf (FILE, "\n"))
1946 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1947 ( fprintf (FILE, "\t.byte "), \
1948 output_addr_const (FILE, (VALUE)), \
1949 fprintf (FILE, "\n"))
1951 /* This is how to output an assembler line for a numeric constant byte. */
1953 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1954 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1956 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1957 output_ascii ((FILE), (P), (SIZE))
1959 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
1960 #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1961 /* This is how to output an element of a case-vector that is absolute.
1962 Note that this method makes filling these branch delay slots
1965 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1966 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1968 /* Jump tables are executable code and live in the TEXT section on the PA. */
1969 #define JUMP_TABLES_IN_TEXT_SECTION
1971 /* This is how to output an element of a case-vector that is relative.
1972 This must be defined correctly as it is used when generating PIC code.
1974 I belive it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
1975 on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
1976 rather than a table of absolute addresses. */
1978 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1979 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1981 /* This is how to output an assembler line
1982 that says to advance the location counter
1983 to a multiple of 2**LOG bytes. */
1985 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1986 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1988 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1989 fprintf (FILE, "\t.blockz %d\n", (SIZE))
1991 /* This says how to output an assembler line to define a global common symbol
1992 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1994 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \
1996 assemble_name ((FILE), (NAME)); \
1997 fputs ("\t.comm ", (FILE)); \
1998 fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));}
2000 /* This says how to output an assembler line to define a local common symbol
2001 with size SIZE (in bytes) and alignment ALIGN (in bits). */
2003 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \
2005 fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \
2006 assemble_name ((FILE), (NAME)); \
2007 fprintf ((FILE), "\n\t.block %d\n", (SIZE));}
2009 /* Store in OUTPUT a string (made with alloca) containing
2010 an assembler-name for a local static variable named NAME.
2011 LABELNO is an integer which is different for each call. */
2013 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2014 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
2015 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
2017 /* Define the parentheses used to group arithmetic operations
2018 in assembler code. */
2020 #define ASM_OPEN_PAREN "("
2021 #define ASM_CLOSE_PAREN ")"
2023 /* All HP assemblers use "!" to separate logical lines. */
2024 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
2026 /* Define results of standard character escape sequences. */
2027 #define TARGET_BELL 007
2028 #define TARGET_BS 010
2029 #define TARGET_TAB 011
2030 #define TARGET_NEWLINE 012
2031 #define TARGET_VT 013
2032 #define TARGET_FF 014
2033 #define TARGET_CR 015
2035 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
2036 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
2038 /* Print operand X (an rtx) in assembler syntax to file FILE.
2039 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2040 For `%' followed by punctuation, CODE is the punctuation and X is null.
2042 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
2043 and an immediate zero should be represented as `r0'.
2045 Several % codes are defined:
2047 C compare conditions
2048 N extract conditions
2049 M modifier to handle preincrement addressing for memory refs.
2050 F modifier to handle preincrement addressing for fp memory refs */
2052 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2055 /* Print a memory address as an operand to reference that memory location. */
2057 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2058 { register rtx addr = ADDR; \
2059 register rtx base; \
2061 switch (GET_CODE (addr)) \
2064 fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
2067 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
2068 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
2069 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
2070 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
2073 fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
2076 if (flag_pic == 0 || !symbolic_operand (XEXP (addr, 1))) \
2077 fputs ("R'", FILE); \
2078 else if (flag_pic == 1) \
2080 else if (flag_pic == 2) \
2081 fputs ("RT'", FILE); \
2082 output_global_address (FILE, XEXP (addr, 1)); \
2083 fputs ("(", FILE); \
2084 output_operand (XEXP (addr, 0), 0); \
2085 fputs (")", FILE); \
2088 fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
2091 output_addr_const (FILE, addr); \
2095 /* Define functions in pa.c and used in insn-output.c. */
2097 extern char *output_and ();
2098 extern char *output_ior ();
2099 extern char *output_move_double ();
2100 extern char *output_fp_move_double ();
2101 extern char *output_block_move ();
2102 extern char *output_cbranch ();
2103 extern char *output_bb ();
2104 extern char *output_dbra ();
2105 extern char *output_movb ();
2106 extern char *output_return ();
2107 extern char *output_call ();
2108 extern char *output_mul_insn ();
2109 extern char *output_div_insn ();
2110 extern char *output_mod_insn ();
2111 extern char *singlemove_string ();
2112 extern void output_arg_descriptor ();
2113 extern void output_global_address ();
2114 extern struct rtx_def
*legitimize_pic_address ();
2115 extern struct rtx_def
*gen_cmp_fp ();
2116 extern void hppa_encode_label ();
2118 extern struct rtx_def
*hppa_save_pic_table_rtx
;
2121 #define PREDICATE_CODES \
2122 {"reg_or_0_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \
2123 {"reg_or_cint_move_operand", {SUBREG, REG, CONST_INT}}, \
2124 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
2125 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
2126 {"arith11_operand", {SUBREG, REG, CONST_INT}}, \
2127 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
2128 {"pre_cint_operand", {CONST_INT}}, \
2129 {"post_cint_operand", {CONST_INT}}, \
2130 {"int5_operand", {CONST_INT}}, \
2131 {"uint5_operand", {CONST_INT}}, \
2132 {"uint32_operand", {CONST_INT}}, \
2133 {"int11_operand", {CONST_INT}}, \
2134 {"and_operand", {SUBREG, REG, CONST_INT}}, \
2135 {"ior_operand", {CONST_INT}}, \
2136 {"lhs_lshift_operand", {SUBREG, REG, CONST_INT}}, \
2137 {"lhs_lshift_cint_operand", {CONST_INT}}, \
2138 {"plus_xor_ior_operator", {PLUS, XOR, IOR}}, \
2139 {"shadd_operand", {CONST_INT}}, \
2140 {"eq_neq_comparison_operator", {EQ, NE}}, \
2141 {"movb_comparison_operator", {EQ, NE, LT, GE}}, \
2142 {"pc_or_label_operand", {LABEL_REF, PC}}, \
2143 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
2144 {"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \
2145 {"move_operand", {SUBREG, REG, CONST_INT, MEM}}, \
2146 {"pic_label_operand", {LABEL_REF, CONST}}, \
2147 {"function_label_operand", {SYMBOL_REF}}, \
2148 {"reg_or_0_or_nonsymb_mem_operand", {SUBREG, REG, CONST_INT, \
2149 CONST_DOUBLE, MEM}}, \
2150 {"div_operand", {REG, CONST_INT}}, \
2151 {"call_operand_address", {SYMBOL_REF, LABEL_REF, CONST_INT, \
2152 CONST_DOUBLE, CONST, HIGH}},
2155 #define DO_GLOBAL_DTORS_BODY \
2157 extern void __gcc_plt_call (); \
2158 volatile int reference = &__gcc_plt_call; \
2160 for (p = __DTOR_LIST__ + 1; *p; ) \