1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@mcc.com)
4 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
5 Software Science at the University of Utah.
7 This file is part of GNU CC.
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 1, or (at your option)
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
23 enum cmp_type
/* comparison type */
25 CMP_SI
, /* compare integers */
26 CMP_SF
, /* compare single precision floats */
27 CMP_DF
, /* compare double precision floats */
28 CMP_MAX
/* max comparison type */
31 /* Print subsidiary information on the compiler version in use. */
33 #define TARGET_VERSION fprintf (stderr, " (hppa)");
35 /* Run-time compilation parameters selecting different hardware subsets. */
37 extern int target_flags
;
39 /* compile code for HP-PA 1.1 ("Snake") */
41 #define TARGET_SNAKE (target_flags & 1)
43 /* Disable all FP registers (they all become fixed). This may be necessary
44 for compiling kernels which perform lazy context switching of FP regs.
45 Note if you use this option and try to perform floating point operations
46 the compiler will abort! */
48 #define TARGET_DISABLE_FPREGS (target_flags & 2)
50 /* Force gcc to only use instructions which are safe when compiling kernels.
51 Specifically, avoid using add instructions with dp (r27) as an argument.
52 Use addil instructions instead. Doing so avoids a nasty bug in the
53 HPUX linker. When HP fixes their linker take this option out. */
55 #define TARGET_KERNEL (target_flags & 4)
57 /* Generate code that will link against HPUX 8.0 shared libraries.
58 Older linkers and assemblers might not support this. */
60 #define TARGET_SHARED_LIBS 1 /* was (target_flags & 8) */
62 /* Force all function calls to indirect addressing via a register. This
63 avoids lossage when the function is very far away from the current PC.
65 ??? What about simple jumps, they can suffer from the same problem.
66 Would require significant surgery in pa.md. */
68 #define TARGET_LONG_CALLS (target_flags & 16)
70 /* Disable indexed addressing modes. Necessary under MACH.
72 ??? Some problem with a high bit being set in an address having
73 special meaning to the PA MACH ports. */
75 #define TARGET_DISABLE_INDEXING (target_flags & 32)
77 /* Force a colon to be tacked onto the end of local and global
78 labels. An option because the HP assembler croaks on them. */
80 #define TARGET_TRAILING_COLON (target_flags & 64)
82 /* Macro to define tables used to set the flags.
83 This is a list in braces of pairs in braces,
84 each pair being { "NAME", VALUE }
85 where VALUE is the bits to set or minus the bits to clear.
86 An empty string NAME is used to identify the default VALUE. */
88 #define TARGET_SWITCHES \
91 {"pa-risc-1-0", -1}, \
93 {"disable-fpregs", 2},\
96 {"no-shared-libs", -8},\
98 {"disable-indexing", 32},\
99 {"trailing-colon", 64},\
100 { "", TARGET_DEFAULT}}
102 #ifndef TARGET_DEFAULT
103 #define TARGET_DEFAULT 0
106 #define DBX_DEBUGGING_INFO
107 #define DEFAULT_GDB_EXTENSIONS 0
109 #if (TARGET_DEFAULT & 1) == 0
110 #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
111 %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}"
113 #define CPP_SPEC "%{!mpa-risc-1-0:%{!mnosnake:-D__hp700s700 -D_PA_RISC1_1}}"
116 /* Defines for a K&R CC */
118 #define CC1_SPEC "%{pg:} %{p:}"
120 #define LINK_SPEC "-u main"
122 /* Make gcc agree with <machine/ansi.h> */
124 #define SIZE_TYPE "unsigned int"
125 #define PTRDIFF_TYPE "int"
126 #define WCHAR_TYPE "short unsigned int"
127 #define WCHAR_TYPE_SIZE 16
129 /* Omit frame pointer at high optimization levels. */
131 #define OPTIMIZATION_OPTIONS(OPTIMIZE) \
134 flag_omit_frame_pointer = 1; \
137 /* Names to predefine in the preprocessor for this target machine. */
139 #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV"
141 /* target machine storage layout */
143 /* Define this if most significant bit is lowest numbered
144 in instructions that operate on numbered bit-fields. */
145 #define BITS_BIG_ENDIAN 1
147 /* Define this if most significant byte of a word is the lowest numbered. */
148 /* That is true on the HP-PA. */
149 #define BYTES_BIG_ENDIAN 1
151 /* Define this if most significant word of a multiword number is lowest
153 /* For the HP-PA we can decide arbitrarily
154 since there are no machine instructions for them. */
155 #define WORDS_BIG_ENDIAN 1
157 /* number of bits in an addressable storage unit */
158 #define BITS_PER_UNIT 8
160 /* Width in bits of a "word", which is the contents of a machine register.
161 Note that this is not necessarily the width of data type `int';
162 if using 16-bit ints on a 68000, this would still be 32.
163 But on a machine with 16-bit registers, this would be 16. */
164 #define BITS_PER_WORD 32
166 /* Width of a word, in units (bytes). */
167 #define UNITS_PER_WORD 4
169 /* Width in bits of a pointer.
170 See also the macro `Pmode' defined below. */
171 #define POINTER_SIZE 32
173 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
174 #define PARM_BOUNDARY 32
176 /* Largest alignment required for any stack parameter, in bits.
177 Don't define this if it is equal to PARM_BOUNDARY */
178 #define MAX_PARM_BOUNDARY 64
180 /* Boundary (in *bits*) on which stack pointer should be aligned. */
181 #define STACK_BOUNDARY (TARGET_SNAKE ? 512 : 64)
183 /* Allocation boundary (in *bits*) for the code of a function. */
184 #define FUNCTION_BOUNDARY 32
186 /* Alignment of field after `int : 0' in a structure. */
187 #define EMPTY_FIELD_BOUNDARY 32
189 /* Every structure's size must be a multiple of this. */
190 #define STRUCTURE_SIZE_BOUNDARY 8
192 /* A bitfield declared as `int' forces `int' alignment for the struct. */
193 #define PCC_BITFIELD_TYPE_MATTERS 1
195 /* No data type wants to be aligned rounder than this. */
196 #define BIGGEST_ALIGNMENT 64
198 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
199 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
200 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
202 /* Make arrays of chars word-aligned for the same reasons. */
203 #define DATA_ALIGNMENT(TYPE, ALIGN) \
204 (TREE_CODE (TYPE) == ARRAY_TYPE \
205 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
206 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
209 /* Set this nonzero if move instructions will actually fail to work
210 when given unaligned data. */
211 #define STRICT_ALIGNMENT 1
213 /* Generate calls to memcpy, memcmp and memset. */
214 #define TARGET_MEM_FUNCTIONS
216 /* Standard register usage. */
218 /* Number of actual hardware registers.
219 The hardware registers are assigned numbers for the compiler
220 from 0 to just below FIRST_PSEUDO_REGISTER.
221 All registers that the compiler knows about must be given numbers,
222 even those that are not normally considered general registers.
224 HP-PA 1.0 has 32 fullword registers and 16 floating point
225 registers. The floating point registers hold either word or double
228 16 additional registers are reserved.
230 HP-PA 1.1 has 32 fullword registers and 32 floating point
231 registers. However, the floating point registers behave
232 differently: the left and right halves of registers are addressable
233 as 32 bit registers. So, we will set things up like the 68k which
234 has different fp units: define separate register sets for the 1.0
237 #define FIRST_PSEUDO_REGISTER 101 /* 32 + 12 1.0 regs + 56 1.1 regs + */
240 /* 1 for registers that have pervasive standard uses
241 and are not available for the register allocator.
243 On the HP-PA, these are:
244 Reg 0 = 0 (hardware). However, 0 is used for condition code,
246 Reg 1 = ADDIL target/Temporary (hardware).
247 Reg 2 = Return Pointer
248 Reg 3 = Preserved Register (Gnu). Frame Pointer (> 8k frames HP.)
249 Reg 4 = Frame Pointer (Gnu)
250 Reg 5-18 = Preserved Registers
251 Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
252 Reg 20-22 = Temporary Registers
253 Reg 23-26 = Temporary/Parameter Registers
254 Reg 27 = Global Data Pointer (hp)
255 Reg 28 = Temporary/???/Return Value register
256 Reg 29 = Temporary/Static Chain/Return Value register
257 Reg 30 = stack pointer
258 Reg 31 = Temporary/Millicode Return Pointer (hp)
260 Freg 0-3 = Status Registers -- Not known to the compiler.
261 Freg 4-7 = Arguments/Return Value
262 Freg 8-11 = Temporary Registers
263 Freg 12-15 = Preserved Registers
265 Freg 16-31 = Reserved
267 On the Snake, fp regs are
269 Freg 0-3 = Status Registers -- Not known to the compiler.
270 Freg 4L-7R = Arguments/Return Value
271 Freg 8L-11R = Temporary Registers
272 Freg 12L-21R = Preserved Registers
273 Freg 22L-31R = Temporary Registers
278 #define FIXED_REGISTERS \
279 {0, 0, 0, 0, 0, 0, 0, 0, \
280 0, 0, 0, 0, 0, 0, 0, 0, \
281 0, 0, 0, 0, 0, 0, 0, 0, \
282 0, 0, 0, 1, 0, 0, 1, 0, \
283 /* 1.0 fp registers */ \
285 0, 0, 0, 0, 0, 0, 0, 0, \
286 /* 1.1 fp registers */ \
287 0, 0, 0, 0, 0, 0, 0, 0, \
288 0, 0, 0, 0, 0, 0, 0, 0, \
289 0, 0, 0, 0, 0, 0, 0, 0, \
290 0, 0, 0, 0, 0, 0, 0, 0, \
291 0, 0, 0, 0, 0, 0, 0, 0, \
292 0, 0, 0, 0, 0, 0, 0, 0, \
293 0, 0, 0, 0, 0, 0, 0, 0, \
296 /* 1 for registers not available across function calls.
297 These must include the FIXED_REGISTERS and also any
298 registers that can be used without being saved.
299 The latter must include the registers where values are returned
300 and the register where structure-value addresses are passed.
301 Aside from that, you can include as many other registers as you like. */
302 #define CALL_USED_REGISTERS \
303 {1, 1, 1, 0, 0, 0, 0, 0, \
304 0, 0, 0, 0, 0, 0, 0, 0, \
305 0, 0, 0, 1, 1, 1, 1, 1, \
306 1, 1, 1, 1, 1, 1, 1, 1, \
307 /* 1.0 fp registers */ \
309 1, 1, 1, 1, 0, 0, 0, 0, \
310 /* 1.1 fp registers */ \
311 1, 1, 1, 1, 1, 1, 1, 1, \
312 1, 1, 1, 1, 1, 1, 1, 1, \
313 0, 0, 0, 0, 0, 0, 0, 0, \
314 0, 0, 0, 0, 0, 0, 0, 0, \
315 0, 0, 0, 0, 1, 1, 1, 1, \
316 1, 1, 1, 1, 1, 1, 1, 1, \
317 1, 1, 1, 1, 1, 1, 1, 1, \
320 /* Make sure everything's fine if we *don't* have a given processor.
321 This assumes that putting a register in fixed_regs will keep the
322 compiler's mitts completely off it. We don't bother to zero it out
323 of register classes. */
325 #define CONDITIONAL_REGISTER_USAGE \
331 COPY_HARD_REG_SET (x, reg_class_contents[(int)SNAKE_FP_REGS]);\
332 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
333 if (TEST_HARD_REG_BIT (x, i)) \
334 fixed_regs[i] = call_used_regs[i] = 1; \
336 else if (TARGET_DISABLE_FPREGS) \
338 COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]);\
339 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
340 if (TEST_HARD_REG_BIT (x, i)) \
341 fixed_regs[i] = call_used_regs[i] = 1; \
342 COPY_HARD_REG_SET (x, reg_class_contents[(int)SNAKE_FP_REGS]);\
343 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
344 if (TEST_HARD_REG_BIT (x, i)) \
345 fixed_regs[i] = call_used_regs[i] = 1; \
349 COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
350 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
351 if (TEST_HARD_REG_BIT (x, i)) \
352 fixed_regs[i] = call_used_regs[i] = 1; \
355 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
358 /* Allocated the call used registers first. This should minimize
359 the number of registers that need to be saved (as call used
360 registers will generally not be allocated across a call).
362 Experimentation has shown slightly better results by allocating
363 FP registers first. */
365 #define REG_ALLOC_ORDER \
366 /* 1.0 caller-saved fp regs. */ \
367 {36, 37, 38, 39, 32, 33, 34, 35, \
368 /* 1.1 caller-saved fp regs. */ \
369 52, 53, 54, 55, 56, 57, 58, 59, \
370 80, 81, 82, 83, 84, 85, 86, 87, \
371 88, 89, 90, 91, 92, 93, 94, 95, \
373 44, 45, 46, 47, 48, 49, 50, 51, \
374 /* caller-saved general regs. */ \
375 19, 20, 21, 22, 23, 24, 25, 26, \
377 /* 1.0 callee-saved fp regs. */ \
379 /* 1.1 callee-saved fp regs. */ \
380 60, 61, 62, 63, 64, 65, 66, 67, \
381 68, 69, 70, 71, 72, 73, 74, 75, \
383 /* callee-saved general regs. */ \
384 3, 4, 5, 6, 7, 8, 9, 10, \
385 11, 12, 13, 14, 15, 16, 17, 18, \
386 /* special registers. */ \
390 /* Return number of consecutive hard regs needed starting at reg REGNO
391 to hold something of mode MODE.
392 This is ordinarily the length in words of a value of mode MODE
393 but can be less for certain modes in special long registers.
395 On the HP-PA, ordinary registers hold 32 bits worth;
396 The floating point registers are 64 bits wide. Snake fp regs are 32
398 #define HARD_REGNO_NREGS(REGNO, MODE) \
399 (((REGNO) < 32 || (REGNO) >= 44) \
400 ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) : 1)
402 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
403 On the HP-PA, the cpu registers can hold any mode. We
404 force this to be an even register is it cannot hold the full mode. */
405 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
406 ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
407 : (REGNO) < 32 ? ((GET_MODE_SIZE (MODE) <= 4) ? 1 : ((REGNO) & 1) == 0)\
408 : (REGNO) < 44 ? (GET_MODE_SIZE (MODE) <= 4 \
409 || (GET_MODE_SIZE (MODE) > 4 \
410 && GET_MODE_CLASS (MODE) == MODE_FLOAT)) \
411 : (GET_MODE_SIZE (MODE) > 4 ? ((REGNO) & 1) == 0 \
414 /* Value is 1 if it is a good idea to tie two pseudo registers
415 when one has mode MODE1 and one has mode MODE2.
416 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
417 for any hard reg, then this must be 0 for correct output. */
418 #define MODES_TIEABLE_P(MODE1, MODE2) \
419 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
421 /* Specify the registers used for certain standard purposes.
422 The values of these macros are register numbers. */
424 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
425 /* #define PC_REGNUM */
427 /* Register to use for pushing function arguments. */
428 #define STACK_POINTER_REGNUM 30
430 /* Base register for access to local variables of the function. */
431 #define FRAME_POINTER_REGNUM 4
433 /* Value should be nonzero if functions must have frame pointers. */
434 #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
437 /* C statement to store the difference between the frame pointer
438 and the stack pointer values immediately after the function prologue.
440 Note, we always pretend that this is a leaf function because if
441 it's not, there's no point in trying to eliminate the
442 frame pointer. If it is a leaf function, we guessed right! */
443 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
444 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
446 /* Base register for access to arguments of the function. */
447 #define ARG_POINTER_REGNUM 4
449 /* Register in which static-chain is passed to a function. */
451 #define STATIC_CHAIN_REGNUM 29
453 /* Register which holds offset table for position-independent
456 #define PIC_OFFSET_TABLE_REGNUM 19
458 #define INITIALIZE_PIC initialize_pic ()
459 #define FINALIZE_PIC finalize_pic ()
461 /* Register in which address to store a structure value
462 is passed to a function. */
463 #define STRUCT_VALUE_REGNUM 28
465 /* Define the classes of registers for register constraints in the
466 machine description. Also define ranges of constants.
468 One of the classes must always be named ALL_REGS and include all hard regs.
469 If there is more than one class, another class must be named NO_REGS
470 and contain no registers.
472 The name GENERAL_REGS must be the name of a class (or an alias for
473 another name such as ALL_REGS). This is the class of registers
474 that is allowed by "g" or "r" in a register constraint.
475 Also, registers outside this class are allocated only when
476 instructions express preferences for them.
478 The classes must be numbered in nondecreasing order; that is,
479 a larger-numbered class must never be contained completely
480 in a smaller-numbered class.
482 For any two classes, it is very desirable that there be another
483 class that represents their union. */
485 /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
486 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
487 fmpyadd and fmpysub are restricted.
489 FP_OR_SNAKE_FP_REGS is for reload_{in,out}di only and isn't used
492 enum reg_class
{ NO_REGS
, R1_REGS
, GENERAL_REGS
, FP_REGS
, GENERAL_OR_FP_REGS
,
493 HI_SNAKE_FP_REGS
, SNAKE_FP_REGS
, GENERAL_OR_SNAKE_FP_REGS
,
494 FP_OR_SNAKE_FP_REGS
, NON_SHIFT_REGS
, SHIFT_REGS
, ALL_REGS
, LIM_REG_CLASSES
};
496 #define N_REG_CLASSES (int) LIM_REG_CLASSES
498 /* Give names of register classes as strings for dump file. */
500 #define REG_CLASS_NAMES \
501 { "NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", "GENERAL_OR_FP_REGS",\
502 "HI_SNAKE_FP_REGS", "SNAKE_FP_REGS", "GENERAL_OR_SNAKE_FP_REGS",\
503 "FP_OR_SNAKE_FP_REGS", "NON_SHIFT_REGS", "SHIFT_REGS", "ALL_REGS"}
505 /* Define which registers fit in which classes.
506 This is an initializer for a vector of HARD_REG_SET
507 of length N_REG_CLASSES. Register 0, the "condition code" register,
510 #define REG_CLASS_CONTENTS \
511 { {0, 0, 0, 0}, /* NO_REGS */ \
512 {0x2, 0, 0, 0}, /* R1_REGS */ \
513 {-2, 0, 0, 0}, /* GENERAL_REGS */ \
514 {0, 0xfff, 0, 0}, /* FP_REGS */ \
515 {-2, 0xfff, 0, 0}, /* GENERAL_OR_FP_REGS */\
516 {0, 0, 0xfffffff0, 0xf}, /* HI_SNAKE_FP_REGS */ \
517 {0, 0xfffff000, ~0, 0xf}, /* SNAKE_FP_REGS */ \
518 {-2, 0xfffff000, ~0, 0xf}, /* GENERAL_OR_SNAKE_FP_REGS */\
519 {0, ~0, ~0, 0xf}, /* FP_OR_SNAKE_FP_REGS */\
520 {-2, ~0, ~0, ~0x10}, /* NON_SHIFT_REGS */ \
521 {0, 0, 0, 0x10}, /* SHIFT_REGS */ \
522 {-2, ~0, ~0, 0x1f}} /* ALL_REGS */
524 /* The same information, inverted:
525 Return the class number of the smallest class containing
526 reg number REGNO. This could be a conditional expression
527 or could index an array. */
529 #define REGNO_REG_CLASS(REGNO) \
530 ((REGNO) == 0 ? NO_REGS \
531 : (REGNO) == 1 ? R1_REGS \
532 : (REGNO) < 32 ? GENERAL_REGS \
533 : (REGNO) < 44 ? FP_REGS \
534 : (REGNO) < 68 ? SNAKE_FP_REGS \
535 : (REGNO) < 100 ? HI_SNAKE_FP_REGS \
538 /* The class value for index registers, and the one for base regs. */
539 #define INDEX_REG_CLASS GENERAL_REGS
540 #define BASE_REG_CLASS GENERAL_REGS
542 #define FP_REG_CLASS_P(CLASS) \
543 (CLASS == FP_REGS || CLASS == SNAKE_FP_REGS || CLASS == HI_SNAKE_FP_REGS)
545 /* Get reg_class from a letter such as appears in the machine description.
546 Note 'Z' is not the same as 'r' since SHIFT_REGS is not part of
549 #define REG_CLASS_FROM_LETTER(C) \
550 ((C) == 'f' ? (!TARGET_SNAKE ? FP_REGS : NO_REGS) : \
551 ((C) == 'x' ? (TARGET_SNAKE ? SNAKE_FP_REGS : NO_REGS) : \
552 ((C) == 'y' ? (TARGET_SNAKE ? HI_SNAKE_FP_REGS : NO_REGS) : \
553 ((C) == 'q' ? SHIFT_REGS : \
554 ((C) == 'a' ? R1_REGS : \
555 ((C) == 'z' ? FP_OR_SNAKE_FP_REGS : \
556 ((C) == 'Z' ? ALL_REGS : NO_REGS)))))))
558 /* The letters I, J, K, L and M in a register constraint string
559 can be used to stand for particular ranges of immediate operands.
560 This macro defines what the ranges are.
561 C is the letter, and VALUE is a constant value.
562 Return 1 if VALUE is in the range specified by C.
564 `I' is used for the 11 bit constants.
565 `J' is used for the 14 bit constants.
566 `K' is used for values that can be moved with a zdepi insn.
567 `L' is used for the 5 bit constants.
569 `N' is used for values with the least significant 11 bits equal to zero.
570 `O' is used for numbers n such that n+1 is a power of 2.
573 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
574 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
575 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
576 : (C) == 'K' ? zdepi_cint_p (VALUE) \
577 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
578 : (C) == 'M' ? (VALUE) == 0 \
579 : (C) == 'N' ? ((VALUE) & 0x7ff) == 0 \
580 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
581 : (C) == 'P' ? and_mask_p (VALUE) \
584 /* Similar, but for floating or large integer constants, and defining letters
585 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
587 For PA, `G' is the floating-point constant zero. `H' is undefined. */
589 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
590 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
591 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
594 /* Given an rtx X being reloaded into a reg required to be
595 in class CLASS, return the class of reg to actually use.
596 In general this is just CLASS; but on some machines
597 in some cases it is preferable to use a more restrictive class. */
598 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
600 /* Return the register class of a scratch register needed to copy IN into
601 or out of a register in CLASS in MODE. If it can be done directly,
602 NO_REGS is returned. */
604 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
605 secondary_reload_class (CLASS, MODE, IN)
607 /* On the PA it is not possible to directly move data between
608 GENERAL_REGS and FP_REGS. */
609 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
610 ((FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2)) \
611 || (! FP_REG_CLASS_P (CLASS1) && FP_REG_CLASS_P (CLASS2)))
613 /* Return the stack location to use for secondary memory needed reloads. */
614 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
615 gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (-16)))
617 /* Return the maximum number of consecutive registers
618 needed to represent mode MODE in a register of class CLASS. */
619 #define CLASS_MAX_NREGS(CLASS, MODE) \
620 ((CLASS) == FP_REGS ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
622 /* Stack layout; function entry, exit and calling. */
624 /* Define this if pushing a word on the stack
625 makes the stack pointer a smaller address. */
626 /* #define STACK_GROWS_DOWNWARD */
628 /* Believe it or not. */
629 #define ARGS_GROW_DOWNWARD
631 /* Define this if the nominal address of the stack frame
632 is at the high-address end of the local variables;
633 that is, each additional local variable allocated
634 goes at a more negative offset in the frame. */
635 /* #define FRAME_GROWS_DOWNWARD */
637 /* Offset within stack frame to start allocating local variables at.
638 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
639 first local allocated. Otherwise, it is the offset to the BEGINNING
640 of the first local allocated. */
641 #define STARTING_FRAME_OFFSET 8
643 /* If we generate an insn to push BYTES bytes,
644 this says how many the stack pointer really advances by.
645 On the HP-PA, don't define this because there are no push insns. */
646 /* #define PUSH_ROUNDING(BYTES) */
648 /* Offset of first parameter from the argument pointer register value.
649 This value will be negated because the arguments grow down.
650 Also note that on STACK_GROWS_UPWARD machines (such as this one)
651 this is the distance from the frame pointer to the end of the first
652 argument, not it's beginning. To get the real offset of the first
653 argument, the size of the argument must be added.
655 ??? Have to check on this.*/
657 #define FIRST_PARM_OFFSET(FNDECL) -32
659 /* Absolute value of offset from top-of-stack address to location to store the
660 function parameter if it can't go in a register.
661 Addresses for following parameters are computed relative to this one. */
662 #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
665 /* When a parameter is passed in a register, stack space is still
667 #define REG_PARM_STACK_SPACE(DECL) 16
669 /* Define this if the above stack space is to be considered part of the
670 space allocated by the caller. */
671 #define OUTGOING_REG_PARM_STACK_SPACE
673 /* Keep the stack pointer constant throughout the function.
674 This is both an optimization and a necessity: longjmp
675 doesn't behave itself when the stack pointer moves within
677 #define ACCUMULATE_OUTGOING_ARGS
679 /* The weird HPPA calling conventions require a minimum of 48 bytes on
680 the stack: 16 bytes for register saves, and 32 bytes for magic.
681 This is the difference between the logical top of stack and the
683 #define STACK_POINTER_OFFSET -32
685 #define STACK_DYNAMIC_OFFSET(FNDECL) \
686 ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
688 /* Value is 1 if returning from a function call automatically
689 pops the arguments described by the number-of-args field in the call.
690 FUNTYPE is the data type of the function (as a tree),
691 or for a library call it is an identifier node for the subroutine name. */
693 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
695 /* Define how to find the value returned by a function.
696 VALTYPE is the data type of the value (as a tree).
697 If the precise function being called is known, FUNC is its FUNCTION_DECL;
698 otherwise, FUNC is 0. */
700 /* On the HP-PA the value is found in register(s) 28(-29), unless
701 the mode is SF or DF. Then the value is returned in fr4 (32, ) */
704 #define FUNCTION_VALUE(VALTYPE, FUNC) \
705 gen_rtx (REG, TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode ||\
706 TYPE_MODE (VALTYPE) == DFmode) ? \
707 (TARGET_SNAKE ? 44 : 32) : 28))
709 /* Define how to find the value returned by a library function
710 assuming the value has mode MODE. */
712 #define LIBCALL_VALUE(MODE) \
713 gen_rtx (REG, MODE, (MODE == SFmode || MODE == DFmode ?\
714 (TARGET_SNAKE ? 44 : 32) : 28))
716 /* 1 if N is a possible register number for a function value
717 as seen by the caller. */
719 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 28 || (N) == (TARGET_SNAKE ? 44 : 32))
721 /* 1 if N is a possible register number for function argument passing. */
723 #define FUNCTION_ARG_REGNO_P(N) \
724 (((N) >= 23 && (N) <= 26) \
725 || ((N) >= 32 && (N) <= 35 && ! TARGET_SNAKE) \
726 || ((N) >= 44 && (N) <= 51 && TARGET_SNAKE))
728 /* Define a data type for recording info about an argument list
729 during the scan of that argument list. This data type should
730 hold all necessary information about the function itself
731 and about the args processed so far, enough to enable macros
732 such as FUNCTION_ARG to determine where the next arg should go.
734 On the HP-PA, this is a single integer, which is a number of words
735 of arguments scanned so far (including the invisible argument,
736 if any, which holds the structure-value-address).
737 Thus 4 or more means all following args should go on the stack. */
739 #define CUMULATIVE_ARGS int
741 /* Initialize a variable CUM of type CUMULATIVE_ARGS
742 for a call to a function whose data type is FNTYPE.
743 For a library call, FNTYPE is 0.
746 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) ((CUM) = 0)
748 /* Figure out the size in words of the function argument. */
750 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
751 ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
753 /* Update the data in CUM to advance over an argument
754 of mode MODE and data type TYPE.
755 (TYPE is null for libcalls where that information may not be available.) */
757 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
758 (((((CUM) & 01) && (TYPE) != 0 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1)\
759 && (CUM)++), (CUM) += FUNCTION_ARG_SIZE(MODE, TYPE))
761 /* Determine where to put an argument to a function.
762 Value is zero to push the argument on the stack,
763 or a hard register in which to store the argument.
765 MODE is the argument's machine mode.
766 TYPE is the data type of the argument (as a tree).
767 This is null for libcalls where that information may
769 CUM is a variable of type CUMULATIVE_ARGS which gives info about
770 the preceding args and about the function being called.
771 NAMED is nonzero if this argument is a named parameter
772 (otherwise it is an extra parameter matching an ellipsis). */
774 /* On the HP-PA the first four words of args are normally in registers
775 and the rest are pushed. But any arg that won't entirely fit in regs
778 Arguments passed in registers are either 1 or 2 words long.
780 The caller must make a distinction between calls to explicitly named
781 functions and calls through pointers to functions -- the conventions
782 are different! Calls through pointers to functions only use general
783 registers for the first four argument words. */
785 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
787 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
788 (4 >= ((CUM) + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
789 ? gen_rtx (REG, (MODE), \
790 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
791 ? ((! (TARGET_SHARED_LIBS && current_call_is_indirect) \
792 && (MODE) == DFmode) \
793 ? ((CUM) ? (TARGET_SNAKE ? 50 : 35) \
794 : (TARGET_SNAKE ? 46 : 33)) \
795 : ((CUM) ? 23 : 25)) \
796 : ((! (TARGET_SHARED_LIBS && current_call_is_indirect) \
797 && (MODE) == SFmode) \
798 ? (TARGET_SNAKE ? 44 + 2 * (CUM) : 32 + (CUM)) \
799 : (27 - (CUM) - FUNCTION_ARG_SIZE ((MODE), (TYPE))))))\
802 /* Define where a function finds its arguments.
803 This would be different from FUNCTION_ARG if we had register windows. */
805 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
806 FUNCTION_ARG (CUM, MODE, TYPE, NAMED)
808 /* For an arg passed partly in registers and partly in memory,
809 this is the number of registers used.
810 For args passed entirely in registers or entirely in memory, zero. */
812 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
814 /* If defined, a C expression that gives the alignment boundary, in
815 bits, of an argument with the specified mode and type. If it is
816 not defined, `PARM_BOUNDARY' is used for all arguments. */
818 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
820 ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \
822 : TYPE_ALIGN(TYPE)) \
823 : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
825 : GET_MODE_ALIGNMENT(MODE)))
827 /* Arguments larger than eight bytes are passed by invisible reference */
829 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
830 ((TYPE) && int_size_in_bytes (TYPE) > 8)
832 extern struct rtx_def
*hppa_compare_op0
, *hppa_compare_op1
;
833 extern enum cmp_type hppa_branch_type
;
835 /* Output the label for a function definition. */
836 #ifdef HP_FP_ARG_DESCRIPTOR_REVERSED
837 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
838 do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
839 fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
841 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
842 do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
843 fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
846 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
847 do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \
848 tree tree_type = TREE_TYPE (DECL); \
851 if (TREE_PUBLIC (DECL)) \
852 { extern int current_function_varargs; \
853 fputs ("\t.EXPORT ", FILE); assemble_name (FILE, NAME); \
854 fputs (",ENTRY,PRIV_LEV=3", FILE); \
855 for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
856 parm = TREE_CHAIN (parm)) \
858 if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode) \
859 fprintf (FILE, ",ARGW%d=FR", i++); \
860 else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode) \
865 ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
873 FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
874 DECL_ARG_TYPE (parm)); \
875 if (arg_size == 2 && i <= 2) \
878 fprintf (FILE, ",ARGW%d=GR", i++); \
879 fprintf (FILE, ",ARGW%d=GR", i++); \
881 else if (arg_size == 1) \
882 fprintf (FILE, ",ARGW%d=GR", i++); \
887 /* anonymous args */ \
888 if ((TYPE_ARG_TYPES (tree_type) != 0 \
889 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
890 != void_type_node)) \
891 || current_function_varargs) \
894 fprintf (FILE, ",ARGW%d=GR", i); \
896 if (TYPE_MODE (fntype) == DFmode) \
897 fprintf (FILE, ",RTNVAL=FR"); \
898 else if (TYPE_MODE (fntype) == SFmode) \
899 fprintf (FILE, ",RTNVAL=FU"); \
900 else if (fntype != void_type_node) \
901 fprintf (FILE, ",RTNVAL=GR"); \
902 fputs ("\n", FILE); \
904 ASM_OUTPUT_LABEL (FILE, NAME);} while (0)
906 /* This macro generates the assembly code for function entry.
907 FILE is a stdio stream to output the code to.
908 SIZE is an int: how many units of temporary storage to allocate.
909 Refer to the array `regs_ever_live' to determine which registers
910 to save; `regs_ever_live[I]' is nonzero if register number I
911 is ever used in the function. This macro is responsible for
912 knowing which registers should not be saved even if used. */
914 /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
915 of memory. If any fpu reg is used in the function, we allocate
916 such a block here, at the bottom of the frame, just in case it's needed.
918 If this function is a leaf procedure, then we may choose not
919 to do a "save" insn. The decision about whether or not
920 to do this is made in regclass.c. */
922 #define FUNCTION_PROLOGUE(FILE, SIZE) \
923 output_function_prologue (FILE, SIZE)
925 /* Output assembler code to FILE to increment profiler label # LABELNO
926 for profiling a function entry.
928 Because HPUX _mcount is so different, we actually emit the
929 profiling code in function_prologue. This just stores LABELNO for
932 #define PROFILE_BEFORE_PROLOGUE
933 #define FUNCTION_PROFILER(FILE, LABELNO) \
934 { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
936 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
937 the stack pointer does not matter. The value is tested only in
938 functions that have frame pointers.
939 No definition is equivalent to always zero. */
941 extern int may_call_alloca
;
942 extern int current_function_pretend_args_size
;
944 #define EXIT_IGNORE_STACK \
945 (get_frame_size () != 0 \
946 || current_function_calls_alloca || current_function_outgoing_args_size)
949 /* This macro generates the assembly code for function exit,
950 on machines that need it. If FUNCTION_EPILOGUE is not defined
951 then individual return instructions are generated for each
952 return statement. Args are same as for FUNCTION_PROLOGUE.
954 The function epilogue should not depend on the current stack pointer!
955 It should use the frame pointer only. This is mandatory because
956 of alloca; we also take advantage of it to omit stack adjustments
959 /* This declaration is needed due to traditional/ANSI
960 incompatibilities which cannot be #ifdefed away
961 because they occur inside of macros. Sigh. */
962 extern union tree_node
*current_function_decl
;
964 #define FUNCTION_EPILOGUE(FILE, SIZE) \
965 output_function_epilogue (FILE, SIZE)
967 /* Output assembler code for a block containing the constant parts
968 of a trampoline, leaving space for the variable parts.\
970 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
971 and then branches to the specified routine.
973 This code template is copied from text segment to stack location
974 and then patched with INITIALIZE_TRAMPOLINE to contain
975 valid values, and then entered as a subroutine.
977 It is best to keep this as small as possible to avoid having to
978 flush multiple lines in the cache. */
980 #define TRAMPOLINE_TEMPLATE(FILE) \
982 fprintf (FILE, "\tldw 12(0,%%r22),%%r21\n"); \
983 fprintf (FILE, "\tbe 0(4,%%r21)\n"); \
984 fprintf (FILE, "\tldw 16(0,%%r22),%%r29\n"); \
985 fprintf (FILE, "\t.word 0\n"); \
986 fprintf (FILE, "\t.word 0\n"); \
989 /* Length in units of the trampoline for entering a nested function.
991 Flush the cache entries corresponding to the first and last addresses
992 of the trampoline. This is necessary as the trampoline may cross two
995 If the trampoline ever grows to > 32 bytes, then it will become
996 necessary to hack on the cacheflush pattern in pa.md. */
998 #define TRAMPOLINE_SIZE (5 * 4)
1000 /* Emit RTL insns to initialize the variable parts of a trampoline.
1001 FNADDR is an RTX for the address of the function's pure code.
1002 CXT is an RTX for the static chain value for the function.
1004 Move the function address to the trampoline template at offset 12.
1005 Move the static chain value to trampoline template at offset 16. */
1007 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1009 rtx start_addr, end_addr, mem; \
1011 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 12));\
1012 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \
1013 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 16));\
1014 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \
1015 /* fdc and fic only use registers for the address to flush, \
1016 they do not accept integer displacements. */ \
1017 start_addr = force_reg (SImode, (TRAMP)); \
1018 end_addr = force_reg (SImode, plus_constant ((TRAMP), 8)); \
1019 emit_insn (gen_cacheflush (start_addr, end_addr)); \
1022 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1023 reference the 4 integer arg registers and 4 fp arg registers.
1024 Ordinarily they are not call used registers, but they are for
1025 _builtin_saveregs, so we must make this explicit. */
1027 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) (rtx)hppa_builtin_saveregs (ARGLIST)
1030 /* Addressing modes, and classification of registers for them. */
1032 #define HAVE_POST_INCREMENT
1033 #define HAVE_POST_DECREMENT
1035 #define HAVE_PRE_DECREMENT
1036 #define HAVE_PRE_INCREMENT
1038 /* Macros to check register numbers against specific register classes. */
1040 /* These assume that REGNO is a hard or pseudo reg number.
1041 They give nonzero only if REGNO is a hard reg of the suitable class
1042 or a pseudo reg currently allocated to a suitable hard reg.
1043 Since they use reg_renumber, they are safe only once reg_renumber
1044 has been allocated, which happens in local-alloc.c. */
1046 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1047 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1048 #define REGNO_OK_FOR_BASE_P(REGNO) \
1049 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1050 #define REGNO_OK_FOR_FP_P(REGNO) \
1051 (((REGNO) >= 32 && (REGNO) <= 99)\
1052 || (reg_renumber[REGNO] >= 32 && reg_renumber[REGNO] <= 99))
1054 /* Now macros that check whether X is a register and also,
1055 strictly, whether it is in a specified class.
1057 These macros are specific to the the HP-PA, and may be used only
1058 in code for printing assembler insns and in conditions for
1059 define_optimization. */
1061 /* 1 if X is an fp register. */
1063 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1065 /* Maximum number of registers that can appear in a valid memory address. */
1067 #define MAX_REGS_PER_ADDRESS 2
1069 /* Recognize any constant value that is a valid address except
1070 for symbolic addresses. We get better CSE by rejecting them
1071 here and allowing hppa_legitimize_address to break them up. We
1072 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1074 #define CONSTANT_ADDRESS_P(X) \
1075 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1076 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1077 || GET_CODE (X) == HIGH) \
1078 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1080 /* Include all constant integers and constant doubles, but not
1081 floating-point, except for floating-point zero. */
1083 #define LEGITIMATE_CONSTANT_P(X) \
1084 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1085 || (X) == CONST0_RTX (GET_MODE (X)))
1087 /* Subroutine for EXTRA_CONSTRAINT.
1089 Return 1 iff OP is a pseudo which did not get a hard register and
1090 we are running the reload pass. */
1092 #define IS_RELOADING_PSEUDO_P(OP) \
1093 ((reload_in_progress \
1094 && GET_CODE (OP) == REG \
1095 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1096 && reg_renumber [REGNO (OP)] < 0))
1098 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1100 For the HPPA, `Q' means that this is a memory operand but not a
1101 symbolic memory operand. Note that an unassigned pseudo register
1102 is such a memory operand. Needed because reload will generate
1103 these things in insns and then not re-recognize the insns, causing
1104 constrain_operands to fail.
1106 Also note `Q' accepts any memory operand during the reload pass.
1107 This includes out-of-range displacements in reg+d addressing.
1108 This makes for better code. (??? For 2.5 address this issue).
1112 `S' handles constraints for calls.
1114 `T' is for fp loads and stores. */
1115 #define EXTRA_CONSTRAINT(OP, C) \
1117 (IS_RELOADING_PSEUDO_P (OP) \
1118 || (GET_CODE (OP) == MEM \
1119 && reload_in_progress) \
1120 || (GET_CODE (OP) == MEM \
1121 && memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1122 && ! symbolic_memory_operand (OP, VOIDmode))) \
1124 (GET_CODE (OP) == MEM \
1125 /* Using DFmode forces only short displacements \
1126 to be recognized as valid in reg+d addresses. */\
1127 && memory_address_p (DFmode, XEXP (OP, 0))) \
1129 ((CONSTANT_P (OP) && ! TARGET_LONG_CALLS) \
1130 || (reload_in_progress \
1131 ? strict_memory_address_p (Pmode, OP) \
1132 : memory_address_p (Pmode, OP)) \
1133 || (reload_in_progress \
1134 && GET_CODE (OP) == REG \
1135 && reg_renumber[REGNO (OP)] > 0)) : 0)))
1137 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1138 and check its validity for a certain class.
1139 We have two alternate definitions for each of them.
1140 The usual definition accepts all pseudo regs; the other rejects
1141 them unless they have been allocated suitable hard regs.
1142 The symbol REG_OK_STRICT causes the latter definition to be used.
1144 Most source files want to accept pseudo regs in the hope that
1145 they will get allocated to the class that the insn wants them to be in.
1146 Source files for reload pass need to be strict.
1147 After reload, it makes no difference, since pseudo regs have
1148 been eliminated by then. */
1150 #ifndef REG_OK_STRICT
1152 /* Nonzero if X is a hard reg that can be used as an index
1153 or if it is a pseudo reg. */
1154 #define REG_OK_FOR_INDEX_P(X) \
1155 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1156 /* Nonzero if X is a hard reg that can be used as a base reg
1157 or if it is a pseudo reg. */
1158 #define REG_OK_FOR_BASE_P(X) \
1159 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1163 /* Nonzero if X is a hard reg that can be used as an index. */
1164 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1165 /* Nonzero if X is a hard reg that can be used as a base reg. */
1166 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1170 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1171 that is a valid memory address for an instruction.
1172 The MODE argument is the machine mode for the MEM expression
1173 that wants to use this address.
1175 On the HP-PA, the actual legitimate addresses must be
1176 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1177 But we can treat a SYMBOL_REF as legitimate if it is part of this
1178 function's constant-pool, because such addresses can actually
1179 be output as REG+SMALLINT. */
1181 #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1182 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1184 #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1185 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1187 #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1188 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1190 #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1191 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1193 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1195 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1196 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1197 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1198 && REG_P (XEXP (X, 0)) \
1199 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1201 else if (GET_CODE (X) == PLUS) \
1203 rtx base = 0, index; \
1204 if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1206 if (GET_CODE (XEXP (X, 1)) == REG \
1207 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1209 else if (flag_pic == 1 \
1210 && GET_CODE (XEXP (X, 1)) != REG \
1211 && GET_CODE (XEXP (X, 1)) != LO_SUM \
1212 && GET_CODE (XEXP (X, 1)) != MEM) \
1215 else if (REG_P (XEXP (X, 0)) \
1216 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1217 base = XEXP (X, 0), index = XEXP (X, 1); \
1218 else if (REG_P (XEXP (X, 1)) \
1219 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1220 base = XEXP (X, 1), index = XEXP (X, 0); \
1222 if (GET_CODE (index) == CONST_INT \
1223 && ((INT_14_BITS (index) && (MODE) != SFmode && (MODE) != DFmode) \
1224 || INT_5_BITS (index))) \
1227 else if (GET_CODE (X) == LO_SUM \
1228 && GET_CODE (XEXP (X, 0)) == REG \
1229 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1230 && CONSTANT_P (XEXP (X, 1)) \
1231 && (MODE) != SFmode \
1232 && (MODE) != DFmode) \
1234 else if (GET_CODE (X) == LO_SUM \
1235 && GET_CODE (XEXP (X, 0)) == SUBREG \
1236 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1237 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1238 && CONSTANT_P (XEXP (X, 1)) \
1239 && (MODE) != SFmode \
1240 && (MODE) != DFmode) \
1242 else if (GET_CODE (X) == LABEL_REF \
1243 || (GET_CODE (X) == CONST_INT \
1244 && INT_14_BITS (X))) \
1248 /* Try machine-dependent ways of modifying an illegitimate address
1249 to be legitimate. If we find one, return the new, valid address.
1250 This macro is used in only one place: `memory_address' in explow.c.
1252 OLDX is the address as it was before break_out_memory_refs was called.
1253 In some cases it is useful to look at this to decide what needs to be done.
1255 MODE and WIN are passed so that this macro can use
1256 GO_IF_LEGITIMATE_ADDRESS.
1258 It is always safe for this macro to do nothing. It exists to recognize
1259 opportunities to optimize the output. */
1261 extern struct rtx_def
*hppa_legitimize_address ();
1262 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1263 { rtx orig_x = (X); \
1264 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1265 if ((X) != orig_x && memory_address_p (MODE, X)) \
1268 /* Go to LABEL if ADDR (a legitimate address expression)
1269 has an effect that depends on the machine mode it is used for. */
1271 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1272 if (GET_CODE (ADDR) == PRE_DEC \
1273 || GET_CODE (ADDR) == POST_DEC \
1274 || GET_CODE (ADDR) == PRE_INC \
1275 || GET_CODE (ADDR) == POST_INC) \
1278 /* Define this macro if references to a symbol must be treated
1279 differently depending on something about the variable or
1280 function named by the symbol (such as what section it is in).
1282 The macro definition, if any, is executed immediately after the
1283 rtl for DECL or other node is created.
1284 The value of the rtl will be a `mem' whose address is a
1287 The usual thing for this macro to do is to a flag in the
1288 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1289 name string in the `symbol_ref' (if one bit is not enough
1292 On the HP-PA we use this to indicate if a symbol is in text or
1293 data space. Also, function labels need special treatment. */
1295 #define TEXT_SPACE_P(DECL)\
1296 (TREE_CODE (DECL) == FUNCTION_DECL \
1297 || (TREE_CODE (DECL) == VAR_DECL \
1298 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1300 || (*tree_code_type[(int) TREE_CODE (DECL)] == 'c' \
1301 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1303 #define FUNCTION_NAME_P(NAME) \
1304 (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@'))
1306 #define ENCODE_SECTION_INFO(DECL)\
1308 { if (TEXT_SPACE_P (DECL)) \
1310 if (TREE_CODE (DECL) == FUNCTION_DECL \
1311 || TREE_CODE (DECL) == VAR_DECL) \
1312 _rtl = DECL_RTL (DECL); \
1314 _rtl = TREE_CST_RTL (DECL); \
1315 SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
1316 if (TREE_CODE (DECL) == FUNCTION_DECL) \
1317 hppa_encode_label (XEXP (DECL_RTL (DECL), 0));\
1322 /* Store the user-specified part of SYMBOL_NAME in VAR.
1323 This is sort of inverse to ENCODE_SECTION_INFO. */
1325 #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1326 (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \
1327 1 + (SYMBOL_NAME)[1] == '@'\
1328 : (SYMBOL_NAME)[0] == '@'))
1330 /* Specify the machine mode that this machine uses
1331 for the index in the tablejump instruction. */
1332 #define CASE_VECTOR_MODE SImode
1334 /* Define this if the tablejump instruction expects the table
1335 to contain offsets from the address of the table.
1336 Do not define this if the table should contain absolute addresses. */
1337 /* #define CASE_VECTOR_PC_RELATIVE */
1339 #define CASE_DROPS_THROUGH
1340 /* Specify the tree operation to be used to convert reals to integers. */
1341 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1343 /* This is the kind of divide that is easiest to do in the general case. */
1344 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1346 /* Define this as 1 if `char' should by default be signed; else as 0. */
1347 #define DEFAULT_SIGNED_CHAR 1
1349 /* Max number of bytes we can move from memory to memory
1350 in one reasonably fast instruction. */
1353 /* Define if normal loads of shorter-than-word items from memory clears
1354 the rest of the bigs in the register. */
1355 #define BYTE_LOADS_ZERO_EXTEND
1357 /* Nonzero if access to memory by bytes is slow and undesirable. */
1358 #define SLOW_BYTE_ACCESS 1
1360 /* Do not break .stabs pseudos into continuations. */
1361 #define DBX_CONTIN_LENGTH 0
1363 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1364 is done just by pretending it is already truncated. */
1365 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1367 /* We assume that the store-condition-codes instructions store 0 for false
1368 and some other value for true. This is the value stored for true. */
1370 #define STORE_FLAG_VALUE 1
1372 /* When a prototype says `char' or `short', really pass an `int'. */
1373 #define PROMOTE_PROTOTYPES
1375 /* Specify the machine mode that pointers have.
1376 After generation of rtl, the compiler makes no further distinction
1377 between pointers and any other objects of this machine mode. */
1378 #define Pmode SImode
1380 /* Add any extra modes needed to represent the condition code.
1382 HPPA floating comparisons produce condition codes. */
1383 #define EXTRA_CC_MODES CCFPmode
1385 /* Define the names for the modes specified above. */
1386 #define EXTRA_CC_NAMES "CCFP"
1388 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1389 return the mode to be used for the comparison. For floating-point, CCFPmode
1390 should be used. CC_NOOVmode should be used when the first operand is a
1391 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1393 #define SELECT_CC_MODE(OP,X,Y) \
1394 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1396 /* A function address in a call instruction
1397 is a byte address (for indexing purposes)
1398 so give the MEM rtx a byte's mode. */
1399 #define FUNCTION_MODE SImode
1401 /* Define this if addresses of constant functions
1402 shouldn't be put through pseudo regs where they can be cse'd.
1403 Desirable on machines where ordinary constants are expensive
1404 but a CALL with constant address is cheap. */
1405 #define NO_FUNCTION_CSE
1407 /* Define this if shift instructions ignore all but the low-order
1409 #define SHIFT_COUNT_TRUNCATED
1411 /* Use atexit for static constructors/destructors, instead of defining
1412 our own exit function. */
1415 /* Compute the cost of computing a constant rtl expression RTX
1416 whose rtx-code is CODE. The body of this macro is a portion
1417 of a switch statement. If the code is computed here,
1418 return it with a return statement. Otherwise, break from the switch. */
1420 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1422 if (INTVAL (RTX) == 0) return 0; \
1423 if (INT_14_BITS (RTX)) return 1; \
1430 case CONST_DOUBLE: \
1431 if (RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)\
1432 && OUTER_CODE != SET) \
1437 #define ADDRESS_COST(RTX) \
1438 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1440 /* Compute extra cost of moving data between one register class
1443 Make moves from SAR so expensive they should never happen.
1445 Copies involving a FP register and a non-FP register are relatively
1446 expensive because they must go through memory.
1448 Other copies are reasonably cheap. */
1449 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1450 (CLASS1 == SHIFT_REGS ? 0xffff \
1451 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1452 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1456 /* Provide the costs of a rtl expression. This is in the body of a
1457 switch on CODE. The purpose for the cost of MULT is to encourage
1458 `synth_mult' to find a synthetic multiply when reasonable. */
1460 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1462 return TARGET_SNAKE && ! TARGET_DISABLE_FPREGS \
1463 ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
1468 return COSTS_N_INSNS (60); \
1469 case PLUS: /* this includes shNadd insns */ \
1470 return COSTS_N_INSNS (1) + 2;
1472 /* Adjust the cost of dependencies. */
1474 #define ADJUST_COST(INSN,LINK,DEP,COST) \
1475 (COST) = pa_adjust_cost (INSN, LINK, DEP, COST)
1477 /* Handling the special cases is going to get too complicated for a macro,
1478 just call `pa_adjust_insn_length' to do the real work. */
1479 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1480 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1482 /* Enable a bug fix. (This is for extra caution.) */
1483 #define SHORTEN_WITH_ADJUST_INSN_LENGTH
1485 /* Millicode insns are actually function calls with some special
1486 constraints on arguments and register usage.
1488 Millicode calls always expect their arguments in the integer argument
1489 registers, and always return their result in %r29 (ret1). They
1490 are expected to clobber their arguments, %r1, %r29, and %r31 and
1493 These macros tell reorg that the references to arguments and
1494 register clobbers for millicode calls do not appear to happen
1495 until after the millicode call. This allows reorg to put insns
1496 which set the argument registers into the delay slot of the millicode
1497 call -- thus they act more like traditional CALL_INSNs.
1499 get_attr_type will try to recognize the given insn, so make sure to
1500 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1502 #define INSN_SETS_ARE_DELAYED(X) \
1503 ((GET_CODE (X) == INSN \
1504 && GET_CODE (PATTERN (X)) != SEQUENCE \
1505 && GET_CODE (PATTERN (X)) != USE \
1506 && GET_CODE (PATTERN (X)) != CLOBBER \
1507 && get_attr_type (X) == TYPE_MILLI))
1509 #define INSN_REFERENCES_ARE_DELAYED(X) \
1510 ((GET_CODE (X) == INSN \
1511 && GET_CODE (PATTERN (X)) != SEQUENCE \
1512 && GET_CODE (PATTERN (X)) != USE \
1513 && GET_CODE (PATTERN (X)) != CLOBBER \
1514 && get_attr_type (X) == TYPE_MILLI))
1517 /* Control the assembler format that we output. */
1519 /* Output at beginning of assembler file. */
1521 #define ASM_FILE_START(FILE) \
1522 do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1523 \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1524 \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\
1526 \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1527 \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1528 \t.IMPORT $global$,DATA\n\
1529 \t.IMPORT $$dyncall,MILLICODE\n");\
1531 fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\
1534 /* Output to assembler file text saying following lines
1535 may contain character constants, extra white space, comments, etc. */
1537 #define ASM_APP_ON ""
1539 /* Output to assembler file text saying following lines
1540 no longer contain unusual constructs. */
1542 #define ASM_APP_OFF ""
1544 /* We don't yet know how to identify GCC to HP-PA machines. */
1545 #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1547 /* Output before code. */
1549 /* Supposedly the assembler rejects the command if there is no tab! */
1550 #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1552 /* Output before writable data. */
1554 /* Supposedly the assembler rejects the command if there is no tab! */
1555 #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1557 /* Output before uninitialized data. */
1559 #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$\n"
1561 /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
1563 #define EXTRA_SECTIONS in_bss
1565 #define EXTRA_SECTION_FUNCTIONS \
1569 if (in_section != in_bss) \
1571 fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
1572 in_section = in_bss; \
1577 /* How to refer to registers in assembler output.
1578 This sequence is indexed by compiler's hard-register-number (see above). */
1580 #define REGISTER_NAMES \
1581 {"0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1582 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1583 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
1584 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
1585 "%fr4", "%fr5", "%fr6", "%fr7", \
1586 "%fr8", "%fr9", "%fr10", "%fr11", "%fr12", "%fr13", "%fr14", "%fr15", \
1587 "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
1588 "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R",\
1589 "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R",\
1590 "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R",\
1591 "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R",\
1592 "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R",\
1593 "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R",\
1596 /* How to renumber registers for dbx and gdb. */
1598 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1600 /* This is how to output the definition of a user-level label named NAME,
1601 such as the label on a static function or variable NAME. */
1603 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1604 do { assemble_name (FILE, NAME); \
1605 if (TARGET_TRAILING_COLON) \
1606 fputc (':', FILE); \
1607 fputc ('\n', FILE); } while (0)
1609 /* This is how to output a command to make the user-level label named NAME
1610 defined for reference from other files. */
1612 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1613 do { fputs ("\t.IMPORT ", FILE); \
1614 assemble_name (FILE, NAME); \
1615 if (FUNCTION_NAME_P (NAME)) \
1616 fputs (",CODE\n", FILE); \
1618 fputs (",DATA\n", FILE); \
1621 /* hpux ld doesn't output the object file name, or anything useful at
1622 all, to indicate the start of an object file's symbols. This screws
1623 up gdb, so we'll output this magic cookie at the end of an object
1624 file with debugging symbols */
1626 #define ASM_FILE_END(FILE) \
1627 do { if (write_symbols == DBX_DEBUG)\
1628 { fputs (TEXT_SECTION_ASM_OP, FILE);\
1629 fputs (".stabs \"end_file.\",4,0,0,Ltext_end\nLtext_end:\n",\
1634 /* The bogus HP assembler requires ALL external references to be
1635 "imported", even library calls. They look a bit different, so
1636 here's this macro. */
1638 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1639 do { fputs ("\t.IMPORT ", FILE); \
1640 assemble_name (FILE, XSTR ((RTL), 0)); \
1641 fputs (",CODE\n", FILE); \
1644 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1645 do { fputs ("\t.EXPORT ", FILE); assemble_name (FILE, NAME); \
1646 if (FUNCTION_NAME_P (NAME)) \
1647 fputs (",CODE\n", FILE); \
1649 fputs (",DATA\n", FILE);} while (0)
1651 /* This is how to output a reference to a user-level label named NAME.
1652 `assemble_name' uses this. */
1654 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1655 fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1657 /* This is how to output an internal numbered label where
1658 PREFIX is the class of label and NUM is the number within the class. */
1660 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1661 {fprintf (FILE, "%s$%04d", PREFIX, NUM); \
1662 if (TARGET_TRAILING_COLON) \
1663 fputs (":\n", FILE); \
1665 fputs ("\n", FILE);}
1667 /* This is how to store into the string LABEL
1668 the symbol_ref name of an internal numbered label where
1669 PREFIX is the class of label and NUM is the number within the class.
1670 This is suitable for output with `assemble_name'. */
1672 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1673 sprintf (LABEL, "*%s$%04d", PREFIX, NUM)
1675 /* This is how to output an assembler line defining a `double' constant. */
1677 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1678 do { union { double d; int i[2];} __u; \
1680 fprintf (FILE, "\t; .double %.20e\n\t.word %d ; = 0x%x\n\t.word %d ; = 0x%x\n", \
1681 __u.d, __u.i[0], __u.i[0], __u.i[1], __u.i[1]); \
1684 /* This is how to output an assembler line defining a `float' constant. */
1686 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1687 do { union { float f; int i;} __u; \
1689 fprintf (FILE, "\t; .float %.12e\n\t.word %d ; = 0x%x\n", __u.f, __u.i, __u.i); \
1692 /* This is how to output an assembler line defining an `int' constant. */
1694 #define ASM_OUTPUT_INT(FILE,VALUE) \
1695 { fprintf (FILE, "\t.word "); \
1696 if (TARGET_SHARED_LIBS \
1697 && function_label_operand (VALUE, VOIDmode))\
1698 fprintf (FILE, "P%%"); \
1699 output_addr_const (FILE, (VALUE)); \
1700 fprintf (FILE, "\n");}
1702 /* Likewise for `short' and `char' constants. */
1704 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1705 ( fprintf (FILE, "\t.half "), \
1706 output_addr_const (FILE, (VALUE)), \
1707 fprintf (FILE, "\n"))
1709 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1710 ( fprintf (FILE, "\t.byte "), \
1711 output_addr_const (FILE, (VALUE)), \
1712 fprintf (FILE, "\n"))
1714 /* This is how to output an assembler line for a numeric constant byte. */
1716 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1717 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1719 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1720 output_ascii ((FILE), (P), (SIZE))
1722 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
1723 #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1724 /* This is how to output an element of a case-vector that is absolute.
1725 Note that this method makes filling these branch delay slots
1728 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1729 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1731 /* Jump tables are executable code and live in the TEXT section on the PA. */
1732 #define JUMP_TABLES_IN_TEXT_SECTION
1734 /* This is how to output an element of a case-vector that is relative.
1735 (The HP-PA does not use such vectors,
1736 but we must define this macro anyway.) */
1738 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1739 fprintf (FILE, "\tword L%d-L%d\n", VALUE, REL)
1741 /* This is how to output an assembler line
1742 that says to advance the location counter
1743 to a multiple of 2**LOG bytes. */
1745 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1746 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1748 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1749 fprintf (FILE, "\t.blockz %d\n", (SIZE))
1751 /* This says how to output an assembler line
1752 to define a global common symbol. */
1754 /* Supposedly the assembler rejects the command if there is no tab! */
1757 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1759 assemble_name ((FILE), (NAME)); \
1760 if (TARGET_TRAILING_COLON) \
1761 fputc (':', (FILE)); \
1762 fputs ("\t.comm ", (FILE)); \
1763 fprintf ((FILE), "%d\n", (ROUNDED));}
1765 /* This says how to output an assembler line
1766 to define a local common symbol. */
1768 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1770 fprintf ((FILE), "\t.align %d\n", (SIZE) <= 4 ? 4 : 8); \
1771 assemble_name ((FILE), (NAME)); \
1772 if (TARGET_TRAILING_COLON) \
1773 fputc (':', (FILE)); \
1774 fprintf ((FILE), "\n\t.block %d\n", (ROUNDED));}
1776 /* Store in OUTPUT a string (made with alloca) containing
1777 an assembler-name for a local static variable named NAME.
1778 LABELNO is an integer which is different for each call. */
1780 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1781 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1782 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1784 /* Define the parentheses used to group arithmetic operations
1785 in assembler code. */
1787 #define ASM_OPEN_PAREN "("
1788 #define ASM_CLOSE_PAREN ")"
1790 /* Define results of standard character escape sequences. */
1791 #define TARGET_BELL 007
1792 #define TARGET_BS 010
1793 #define TARGET_TAB 011
1794 #define TARGET_NEWLINE 012
1795 #define TARGET_VT 013
1796 #define TARGET_FF 014
1797 #define TARGET_CR 015
1799 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1800 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1802 /* Print operand X (an rtx) in assembler syntax to file FILE.
1803 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1804 For `%' followed by punctuation, CODE is the punctuation and X is null.
1806 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1807 and an immediate zero should be represented as `r0'.
1809 Several % codes are defined:
1811 C compare conditions
1812 N extract conditions
1813 M modifier to handle preincrement addressing for memory refs.
1814 F modifier to handle preincrement addressing for fp memory refs */
1816 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1819 /* Print a memory address as an operand to reference that memory location. */
1821 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1822 { register rtx addr = ADDR; \
1823 register rtx base; \
1825 switch (GET_CODE (addr)) \
1828 fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
1831 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1832 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1833 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1834 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
1837 fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
1840 fputs ("R'", FILE); \
1841 output_global_address (FILE, XEXP (addr, 1)); \
1842 fputs ("(", FILE); \
1843 output_operand (XEXP (addr, 0), 0); \
1844 fputs (")", FILE); \
1847 fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
1850 output_addr_const (FILE, addr); \
1854 /* Define functions in pa.c and used in insn-output.c. */
1856 extern char *output_and ();
1857 extern char *output_ior ();
1858 extern char *output_move_double ();
1859 extern char *output_fp_move_double ();
1860 extern char *output_block_move ();
1861 extern char *output_scc_insn ();
1862 extern char *output_cbranch ();
1863 extern char *output_bb ();
1864 extern char *output_return ();
1865 extern char *output_floatsisf2 ();
1866 extern char *output_floatsidf2 ();
1867 extern char *output_mul_insn ();
1868 extern char *output_div_insn ();
1869 extern char *output_mod_insn ();
1870 extern char *singlemove_string ();
1871 extern void output_arg_descriptor ();
1872 extern void output_global_address ();
1873 extern struct rtx_def
*legitimize_pic_address ();
1874 extern struct rtx_def
*gen_cmp_fp ();
1875 extern void hppa_encode_label ();
1877 extern struct rtx_def
*hppa_save_pic_table_rtx
;