1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@mcc.com)
4 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
5 Software Science at the University of Utah.
7 This file is part of GNU CC.
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 1, or (at your option)
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
23 enum cmp_type
/* comparison type */
25 CMP_SI
, /* compare integers */
26 CMP_SF
, /* compare single precision floats */
27 CMP_DF
, /* compare double precision floats */
28 CMP_MAX
/* max comparison type */
31 /* Print subsidiary information on the compiler version in use. */
33 #define TARGET_VERSION fprintf (stderr, " (hppa)");
35 /* Run-time compilation parameters selecting different hardware subsets. */
37 extern int target_flags
;
39 /* compile code for HP-PA 1.1 ("Snake") */
41 #define TARGET_SNAKE (target_flags & 1)
43 /* Disable all FP registers (they all become fixed). This may be necessary
44 for compiling kernels which perform lazy context switching of FP regs.
45 Note if you use this option and try to perform floating point operations
46 the compiler will abort! */
48 #define TARGET_DISABLE_FPREGS (target_flags & 2)
50 /* Force gcc to only use instructions which are safe when compiling kernels.
51 Specifically, avoid using add instructions with dp (r27) as an argument.
52 Use addil instructions instead. Doing so avoids a nasty bug in the
53 HPUX linker. When HP fixes their linker take this option out. */
55 #define TARGET_KERNEL (target_flags & 4)
57 /* Generate code that will link against HPUX 8.0 shared libraries.
58 Older linkers and assemblers might not support this. */
60 #define TARGET_SHARED_LIBS (target_flags & 8)
62 /* Force all function calls to indirect addressing via a register. This
63 avoids lossage when the function is very far away from the current PC.
65 ??? What about simple jumps, they can suffer from the same problem.
66 Would require significant surgery in pa.md. */
68 #define TARGET_LONG_CALLS (target_flags & 16)
70 /* Disable indexed addressing modes. Necessary under MACH.
72 ??? Some problem with a high bit being set in an address having
73 special meaning to the PA MACH ports. */
75 #define TARGET_DISABLE_INDEXING (target_flags & 32)
77 /* Force a colon to be tacked onto the end of local and global
78 labels. An option because the HP assembler croaks on them. */
80 #define TARGET_TRAILING_COLON (target_flags & 64)
82 /* Macro to define tables used to set the flags.
83 This is a list in braces of pairs in braces,
84 each pair being { "NAME", VALUE }
85 where VALUE is the bits to set or minus the bits to clear.
86 An empty string NAME is used to identify the default VALUE. */
88 #define TARGET_SWITCHES \
91 {"pa-risc-1-0", -1}, \
93 {"disable-fpregs", 2},\
96 {"no-shared-libs", -8},\
98 {"disable-indexing", 32},\
99 {"trailing-colon", 64},\
100 { "", TARGET_DEFAULT}}
102 #ifndef TARGET_DEFAULT
103 #define TARGET_DEFAULT 0
106 #define DBX_DEBUGGING_INFO
107 #define DEFAULT_GDB_EXTENSIONS 0
109 #if (TARGET_DEFAULT & 1) == 0
110 #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
111 %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}"
113 #define CPP_SPEC "%{!mpa-risc-1-0:-D__hp9000s700 -D_PA_RISC1_1}\
114 %{!mnosnake:-D__hp9000s700 -D_PA_RISC1_1}"
117 /* Defines for a K&R CC */
119 #define CC1_SPEC "%{pg:} %{p:}"
121 #define LINK_SPEC "-u main"
123 /* Make gcc agree with <machine/ansi.h> */
125 #define SIZE_TYPE "unsigned int"
126 #define PTRDIFF_TYPE "int"
127 #define WCHAR_TYPE "short unsigned int"
128 #define WCHAR_TYPE_SIZE 16
130 /* Omit frame pointer at high optimization levels. */
132 #define OPTIMIZATION_OPTIONS(OPTIMIZE) \
135 flag_omit_frame_pointer = 1; \
138 /* Names to predefine in the preprocessor for this target machine. */
140 #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV"
142 /* target machine storage layout */
144 /* Define this if most significant bit is lowest numbered
145 in instructions that operate on numbered bit-fields. */
146 #define BITS_BIG_ENDIAN 1
148 /* Define this if most significant byte of a word is the lowest numbered. */
149 /* That is true on the HP-PA. */
150 #define BYTES_BIG_ENDIAN 1
152 /* Define this if most significant word of a multiword number is lowest
154 /* For the HP-PA we can decide arbitrarily
155 since there are no machine instructions for them. */
156 #define WORDS_BIG_ENDIAN 1
158 /* number of bits in an addressable storage unit */
159 #define BITS_PER_UNIT 8
161 /* Width in bits of a "word", which is the contents of a machine register.
162 Note that this is not necessarily the width of data type `int';
163 if using 16-bit ints on a 68000, this would still be 32.
164 But on a machine with 16-bit registers, this would be 16. */
165 #define BITS_PER_WORD 32
167 /* Width of a word, in units (bytes). */
168 #define UNITS_PER_WORD 4
170 /* Width in bits of a pointer.
171 See also the macro `Pmode' defined below. */
172 #define POINTER_SIZE 32
174 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
175 #define PARM_BOUNDARY 32
177 /* Largest alignment required for any stack parameter, in bits.
178 Don't define this if it is equal to PARM_BOUNDARY */
179 #define MAX_PARM_BOUNDARY 64
181 /* Boundary (in *bits*) on which stack pointer should be aligned. */
182 #define STACK_BOUNDARY (TARGET_SNAKE ? 512 : 64)
184 /* Allocation boundary (in *bits*) for the code of a function. */
185 #define FUNCTION_BOUNDARY 32
187 /* Alignment of field after `int : 0' in a structure. */
188 #define EMPTY_FIELD_BOUNDARY 32
190 /* Every structure's size must be a multiple of this. */
191 #define STRUCTURE_SIZE_BOUNDARY 8
193 /* A bitfield declared as `int' forces `int' alignment for the struct. */
194 #define PCC_BITFIELD_TYPE_MATTERS 1
196 /* No data type wants to be aligned rounder than this. */
197 #define BIGGEST_ALIGNMENT 64
199 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
200 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
201 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
203 /* Make arrays of chars word-aligned for the same reasons. */
204 #define DATA_ALIGNMENT(TYPE, ALIGN) \
205 (TREE_CODE (TYPE) == ARRAY_TYPE \
206 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
207 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
210 /* Set this nonzero if move instructions will actually fail to work
211 when given unaligned data. */
212 #define STRICT_ALIGNMENT 1
214 /* Generate calls to memcpy, memcmp and memset. */
215 #define TARGET_MEM_FUNCTIONS
217 /* Standard register usage. */
219 /* Number of actual hardware registers.
220 The hardware registers are assigned numbers for the compiler
221 from 0 to just below FIRST_PSEUDO_REGISTER.
222 All registers that the compiler knows about must be given numbers,
223 even those that are not normally considered general registers.
225 HP-PA 1.0 has 32 fullword registers and 16 floating point
226 registers. The floating point registers hold either word or double
229 16 additional registers are reserved.
231 HP-PA 1.1 has 32 fullword registers and 32 floating point
232 registers. However, the floating point registers behave
233 differently: the left and right halves of registers are addressable
234 as 32 bit registers. So, we will set things up like the 68k which
235 has different fp units: define separate register sets for the 1.0
238 #define FIRST_PSEUDO_REGISTER 101 /* 32 + 12 1.0 regs + 56 1.1 regs + */
241 /* 1 for registers that have pervasive standard uses
242 and are not available for the register allocator.
244 On the HP-PA, these are:
245 Reg 0 = 0 (hardware). However, 0 is used for condition code,
247 Reg 1 = ADDIL target/Temporary (hardware).
248 Reg 2 = Return Pointer
249 Reg 3 = Preserved Register (Gnu). Frame Pointer (> 8k frames HP.)
250 Reg 4 = Frame Pointer (Gnu)
251 Reg 5-18 = Preserved Registers
252 Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
253 Reg 20-22 = Temporary Registers
254 Reg 23-26 = Temporary/Parameter Registers
255 Reg 27 = Global Data Pointer (hp)
256 Reg 28 = Temporary/???/Return Value register
257 Reg 29 = Temporary/Static Chain/Return Value register
258 Reg 30 = stack pointer
259 Reg 31 = Temporary/Millicode Return Pointer (hp)
261 Freg 0-3 = Status Registers -- Not known to the compiler.
262 Freg 4-7 = Arguments/Return Value
263 Freg 8-11 = Temporary Registers
264 Freg 12-15 = Preserved Registers
266 Freg 16-31 = Reserved
268 On the Snake, fp regs are
270 Freg 0-3 = Status Registers -- Not known to the compiler.
271 Freg 4L-7R = Arguments/Return Value
272 Freg 8L-11R = Temporary Registers
273 Freg 12L-21R = Preserved Registers
274 Freg 22L-31R = Temporary Registers
279 #define FIXED_REGISTERS \
280 {0, 0, 0, 0, 1, 0, 0, 0, \
281 0, 0, 0, 0, 0, 0, 0, 0, \
282 0, 0, 0, 0, 0, 0, 0, 0, \
283 0, 0, 0, 1, 0, 0, 1, 0, \
284 /* 1.0 fp registers */ \
286 0, 0, 0, 0, 0, 0, 0, 0, \
287 /* 1.1 fp registers */ \
288 0, 0, 0, 0, 0, 0, 0, 0, \
289 0, 0, 0, 0, 0, 0, 0, 0, \
290 0, 0, 0, 0, 0, 0, 0, 0, \
291 0, 0, 0, 0, 0, 0, 0, 0, \
292 0, 0, 0, 0, 0, 0, 0, 0, \
293 0, 0, 0, 0, 0, 0, 0, 0, \
294 0, 0, 0, 0, 0, 0, 0, 0, \
297 /* 1 for registers not available across function calls.
298 These must include the FIXED_REGISTERS and also any
299 registers that can be used without being saved.
300 The latter must include the registers where values are returned
301 and the register where structure-value addresses are passed.
302 Aside from that, you can include as many other registers as you like. */
303 #define CALL_USED_REGISTERS \
304 {1, 1, 1, 0, 1, 0, 0, 0, \
305 0, 0, 0, 0, 0, 0, 0, 0, \
306 0, 0, 0, 1, 1, 1, 1, 1, \
307 1, 1, 1, 1, 1, 1, 1, 1, \
308 /* 1.0 fp registers */ \
310 1, 1, 1, 1, 0, 0, 0, 0, \
311 /* 1.1 fp registers */ \
312 1, 1, 1, 1, 1, 1, 1, 1, \
313 1, 1, 1, 1, 1, 1, 1, 1, \
314 0, 0, 0, 0, 0, 0, 0, 0, \
315 0, 0, 0, 0, 0, 0, 0, 0, \
316 0, 0, 0, 0, 1, 1, 1, 1, \
317 1, 1, 1, 1, 1, 1, 1, 1, \
318 1, 1, 1, 1, 1, 1, 1, 1, \
321 /* Make sure everything's fine if we *don't* have a given processor.
322 This assumes that putting a register in fixed_regs will keep the
323 compiler's mitts completely off it. We don't bother to zero it out
324 of register classes. */
326 #define CONDITIONAL_REGISTER_USAGE \
332 COPY_HARD_REG_SET (x, reg_class_contents[(int)SNAKE_FP_REGS]);\
333 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
334 if (TEST_HARD_REG_BIT (x, i)) \
335 fixed_regs[i] = call_used_regs[i] = 1; \
337 else if (TARGET_DISABLE_FPREGS) \
339 COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]);\
340 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
341 if (TEST_HARD_REG_BIT (x, i)) \
342 fixed_regs[i] = call_used_regs[i] = 1; \
343 COPY_HARD_REG_SET (x, reg_class_contents[(int)SNAKE_FP_REGS]);\
344 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
345 if (TEST_HARD_REG_BIT (x, i)) \
346 fixed_regs[i] = call_used_regs[i] = 1; \
350 COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
351 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
352 if (TEST_HARD_REG_BIT (x, i)) \
353 fixed_regs[i] = call_used_regs[i] = 1; \
357 /* Allocated the call used registers first. This should minimize
358 the number of registers that need to be saved (as call used
359 registers will generally not be allocated across a call).
361 Experimentation has shown slightly better results by allocating
362 FP registers first. */
364 #define REG_ALLOC_ORDER \
365 /* 1.0 caller-saved fp regs. */ \
366 {36, 37, 38, 39, 32, 33, 34, 35, \
367 /* 1.1 caller-saved fp regs. */ \
368 52, 53, 54, 55, 56, 57, 58, 59, \
369 80, 81, 82, 83, 84, 85, 86, 87, \
370 88, 89, 90, 91, 92, 93, 94, 95, \
372 44, 45, 46, 47, 48, 49, 50, 51, \
373 /* caller-saved general regs. */ \
374 19, 20, 21, 22, 23, 24, 25, 26, \
376 /* 1.0 callee-saved fp regs. */ \
378 /* 1.1 callee-saved fp regs. */ \
379 60, 61, 62, 63, 64, 65, 66, 67, \
380 68, 69, 70, 71, 72, 73, 74, 75, \
382 /* callee-saved general regs. */ \
383 3, 5, 6, 7, 8, 9, 10, 11, \
384 12, 13, 14, 15, 16, 17, 18, \
385 /* special registers. */ \
389 /* Return number of consecutive hard regs needed starting at reg REGNO
390 to hold something of mode MODE.
391 This is ordinarily the length in words of a value of mode MODE
392 but can be less for certain modes in special long registers.
394 On the HP-PA, ordinary registers hold 32 bits worth;
395 The floating point registers are 64 bits wide. Snake fp regs are 32
397 #define HARD_REGNO_NREGS(REGNO, MODE) \
398 (((REGNO) < 32 || (REGNO) >= 44) \
399 ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) : 1)
401 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
402 On the HP-PA, the cpu registers can hold any mode. We
403 force this to be an even register is it cannot hold the full mode. */
404 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
405 ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
406 : (REGNO) < 32 ? ((GET_MODE_SIZE (MODE) <= 4) ? 1 : ((REGNO) & 1) == 0)\
407 : (REGNO) < 44 ? (GET_MODE_SIZE (MODE) >= 4) \
408 : (GET_MODE_SIZE (MODE) > 4 ? ((REGNO) & 1) == 0 \
411 /* Value is 1 if it is a good idea to tie two pseudo registers
412 when one has mode MODE1 and one has mode MODE2.
413 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
414 for any hard reg, then this must be 0 for correct output. */
415 #define MODES_TIEABLE_P(MODE1, MODE2) \
416 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
418 /* Specify the registers used for certain standard purposes.
419 The values of these macros are register numbers. */
421 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
422 /* #define PC_REGNUM */
424 /* Register to use for pushing function arguments. */
425 #define STACK_POINTER_REGNUM 30
427 /* Base register for access to local variables of the function. */
428 #define FRAME_POINTER_REGNUM 4
430 /* Value should be nonzero if functions must have frame pointers. */
431 #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
434 /* C statement to store the difference between the frame pointer
435 and the stack pointer values immediately after the function prologue.
437 Note, we always pretend that this is a leaf function because if
438 it's not, there's no point in trying to eliminate the
439 frame pointer. If it is a leaf function, we guessed right! */
440 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
441 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
443 /* Base register for access to arguments of the function. */
444 #define ARG_POINTER_REGNUM 4
446 /* Register in which static-chain is passed to a function. */
448 #define STATIC_CHAIN_REGNUM 29
450 /* Register which holds offset table for position-independent
453 #define PIC_OFFSET_TABLE_REGNUM 19
455 #define INITIALIZE_PIC initialize_pic ()
456 #define FINALIZE_PIC finalize_pic ()
458 /* Register in which address to store a structure value
459 is passed to a function. */
460 #define STRUCT_VALUE_REGNUM 28
462 /* Define the classes of registers for register constraints in the
463 machine description. Also define ranges of constants.
465 One of the classes must always be named ALL_REGS and include all hard regs.
466 If there is more than one class, another class must be named NO_REGS
467 and contain no registers.
469 The name GENERAL_REGS must be the name of a class (or an alias for
470 another name such as ALL_REGS). This is the class of registers
471 that is allowed by "g" or "r" in a register constraint.
472 Also, registers outside this class are allocated only when
473 instructions express preferences for them.
475 The classes must be numbered in nondecreasing order; that is,
476 a larger-numbered class must never be contained completely
477 in a smaller-numbered class.
479 For any two classes, it is very desirable that there be another
480 class that represents their union. */
482 /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
483 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
484 fmpyadd and fmpysub are restricted.
486 FP_OR_SNAKE_FP_REGS is for reload_{in,out}di only and isn't used
489 enum reg_class
{ NO_REGS
, R1_REGS
, GENERAL_REGS
, FP_REGS
, GENERAL_OR_FP_REGS
,
490 HI_SNAKE_FP_REGS
, SNAKE_FP_REGS
, GENERAL_OR_SNAKE_FP_REGS
,
491 FP_OR_SNAKE_FP_REGS
, SHIFT_REGS
, ALL_REGS
, LIM_REG_CLASSES
};
493 #define N_REG_CLASSES (int) LIM_REG_CLASSES
495 /* Give names of register classes as strings for dump file. */
497 #define REG_CLASS_NAMES \
498 { "NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", "GENERAL_OR_FP_REGS",\
499 "HI_SNAKE_FP_REGS", "SNAKE_FP_REGS", "GENERAL_OR_SNAKE_FP_REGS",\
500 "FP_OR_SNAKE_FP_REGS", "SHIFT_REGS", "ALL_REGS"}
502 /* Define which registers fit in which classes.
503 This is an initializer for a vector of HARD_REG_SET
504 of length N_REG_CLASSES. Register 0, the "condition code" register,
507 #define REG_CLASS_CONTENTS \
508 { {0, 0, 0, 0}, /* NO_REGS */ \
509 {0x2, 0, 0, 0}, /* R1_REGS */ \
510 {-2, 0, 0, 0}, /* GENERAL_REGS */ \
511 {0, 0xfff, 0, 0}, /* FP_REGS */ \
512 {-2, 0xfff, 0, 0}, /* GENERAL_OR_FP_REGS */\
513 {0, 0, 0xfffffff0, 0xf}, /* HI_SNAKE_FP_REGS */ \
514 {0, 0xfffff000, ~0, 0xf}, /* SNAKE_FP_REGS */ \
515 {-2, 0xfffff000, ~0, 0xf}, /* GENERAL_OR_SNAKE_FP_REGS */\
516 {0, ~0, ~0, 0xf}, /* FP_OR_SNAKE_FP_REGS */\
517 {0, 0, 0, 0x10}, /* SHIFT_REGS */ \
518 {-2, ~0, ~0, 0x1f}} /* ALL_REGS */
520 /* The same information, inverted:
521 Return the class number of the smallest class containing
522 reg number REGNO. This could be a conditional expression
523 or could index an array. */
525 #define REGNO_REG_CLASS(REGNO) \
526 ((REGNO) == 0 ? NO_REGS \
527 : (REGNO) == 1 ? R1_REGS \
528 : (REGNO) < 32 ? GENERAL_REGS \
529 : (REGNO) < 44 ? FP_REGS \
530 : (REGNO) < 68 ? SNAKE_FP_REGS \
531 : (REGNO) < 100 ? HI_SNAKE_FP_REGS \
534 /* The class value for index registers, and the one for base regs. */
535 #define INDEX_REG_CLASS GENERAL_REGS
536 #define BASE_REG_CLASS GENERAL_REGS
538 #define FP_REG_CLASS_P(CLASS) \
539 (CLASS == FP_REGS || CLASS == SNAKE_FP_REGS || CLASS == HI_SNAKE_FP_REGS)
541 /* Get reg_class from a letter such as appears in the machine description.
542 Note 'Z' is not the same as 'r' since SHIFT_REGS is not part of
545 #define REG_CLASS_FROM_LETTER(C) \
546 ((C) == 'f' ? (!TARGET_SNAKE ? FP_REGS : NO_REGS) : \
547 ((C) == 'x' ? (TARGET_SNAKE ? SNAKE_FP_REGS : NO_REGS) : \
548 ((C) == 'y' ? (TARGET_SNAKE ? HI_SNAKE_FP_REGS : NO_REGS) : \
549 ((C) == 'q' ? SHIFT_REGS : \
550 ((C) == 'a' ? R1_REGS : \
551 ((C) == 'z' ? FP_OR_SNAKE_FP_REGS : \
552 ((C) == 'Z' ? ALL_REGS : NO_REGS)))))))
554 /* The letters I, J, K, L and M in a register constraint string
555 can be used to stand for particular ranges of immediate operands.
556 This macro defines what the ranges are.
557 C is the letter, and VALUE is a constant value.
558 Return 1 if VALUE is in the range specified by C.
560 `I' is used for the 11 bit constants.
561 `J' is used for the 14 bit constants.
562 `K' is used for values that can be moved with a zdepi insn.
563 `L' is used for the 5 bit constants.
565 `N' is used for values with the least significant 11 bits equal to zero.
566 `O' is used for numbers n such that n+1 is a power of 2.
569 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
570 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
571 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
572 : (C) == 'K' ? zdepi_cint_p (VALUE) \
573 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
574 : (C) == 'M' ? (VALUE) == 0 \
575 : (C) == 'N' ? ((VALUE) & 0x7ff) == 0 \
576 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
577 : (C) == 'P' ? and_mask_p (VALUE) \
580 /* Similar, but for floating or large integer constants, and defining letters
581 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
583 For PA, `G' is the floating-point constant zero. `H' is undefined. */
585 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
586 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
587 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
590 /* Given an rtx X being reloaded into a reg required to be
591 in class CLASS, return the class of reg to actually use.
592 In general this is just CLASS; but on some machines
593 in some cases it is preferable to use a more restrictive class. */
594 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
596 /* Return the register class of a scratch register needed to copy IN into
597 or out of a register in CLASS in MODE. If it can be done directly,
598 NO_REGS is returned. */
600 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
601 secondary_reload_class (CLASS, MODE, IN)
603 /* Return the maximum number of consecutive registers
604 needed to represent mode MODE in a register of class CLASS. */
605 #define CLASS_MAX_NREGS(CLASS, MODE) \
606 ((CLASS) == FP_REGS ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
608 /* Stack layout; function entry, exit and calling. */
610 /* Define this if pushing a word on the stack
611 makes the stack pointer a smaller address. */
612 /* #define STACK_GROWS_DOWNWARD */
614 /* Believe it or not. */
615 #define ARGS_GROW_DOWNWARD
617 /* Define this if the nominal address of the stack frame
618 is at the high-address end of the local variables;
619 that is, each additional local variable allocated
620 goes at a more negative offset in the frame. */
621 /* #define FRAME_GROWS_DOWNWARD */
623 /* Offset within stack frame to start allocating local variables at.
624 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
625 first local allocated. Otherwise, it is the offset to the BEGINNING
626 of the first local allocated. */
627 #define STARTING_FRAME_OFFSET 8
629 /* If we generate an insn to push BYTES bytes,
630 this says how many the stack pointer really advances by.
631 On the HP-PA, don't define this because there are no push insns. */
632 /* #define PUSH_ROUNDING(BYTES) */
634 /* Offset of first parameter from the argument pointer register value.
635 This value will be negated because the arguments grow down.
636 Also note that on STACK_GROWS_UPWARD machines (such as this one)
637 this is the distance from the frame pointer to the end of the first
638 argument, not it's beginning. To get the real offset of the first
639 argument, the size of the argument must be added.
641 ??? Have to check on this.*/
643 #define FIRST_PARM_OFFSET(FNDECL) -32
645 /* Absolute value of offset from top-of-stack address to location to store the
646 function parameter if it can't go in a register.
647 Addresses for following parameters are computed relative to this one. */
648 #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
651 /* When a parameter is passed in a register, stack space is still
653 #define REG_PARM_STACK_SPACE(DECL) 16
655 /* Define this if the above stack space is to be considered part of the
656 space allocated by the caller. */
657 #define OUTGOING_REG_PARM_STACK_SPACE
659 /* Keep the stack pointer constant throughout the function.
660 This is both an optimization and a necessity: longjmp
661 doesn't behave itself when the stack pointer moves within
663 #define ACCUMULATE_OUTGOING_ARGS
665 /* The weird HPPA calling conventions require a minimum of 48 bytes on
666 the stack: 16 bytes for register saves, and 32 bytes for magic.
667 This is the difference between the logical top of stack and the
669 #define STACK_POINTER_OFFSET -32
671 #define STACK_DYNAMIC_OFFSET(FNDECL) \
672 ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
674 /* Value is 1 if returning from a function call automatically
675 pops the arguments described by the number-of-args field in the call.
676 FUNTYPE is the data type of the function (as a tree),
677 or for a library call it is an identifier node for the subroutine name. */
679 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
681 /* Define how to find the value returned by a function.
682 VALTYPE is the data type of the value (as a tree).
683 If the precise function being called is known, FUNC is its FUNCTION_DECL;
684 otherwise, FUNC is 0. */
686 /* On the HP-PA the value is found in register(s) 28(-29), unless
687 the mode is SF or DF. Then the value is returned in fr4 (32, ) */
690 #define FUNCTION_VALUE(VALTYPE, FUNC) \
691 gen_rtx (REG, TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode ||\
692 TYPE_MODE (VALTYPE) == DFmode) ? \
693 (TARGET_SNAKE ? 44 : 32) : 28))
695 #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
696 FUNCTION_VALUE(VALTYPE, FUNC)
698 /* Define how to find the value returned by a library function
699 assuming the value has mode MODE. */
701 #define LIBCALL_VALUE(MODE) \
702 gen_rtx (REG, MODE, (MODE == SFmode || MODE == DFmode ?\
703 (TARGET_SNAKE ? 44 : 32) : 28))
705 /* 1 if N is a possible register number for a function value
706 as seen by the caller. */
708 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 28 || (N) == 32 || (N) == 44)
710 /* 1 if N is a possible register number for function argument passing. */
712 #define FUNCTION_ARG_REGNO_P(N) (((N) >= 23 && (N) <= 26) || \
713 ((N) >= 32 && (N) <= 35) || \
714 ((N) >= 44 && (N) <= 51))
716 /* Define a data type for recording info about an argument list
717 during the scan of that argument list. This data type should
718 hold all necessary information about the function itself
719 and about the args processed so far, enough to enable macros
720 such as FUNCTION_ARG to determine where the next arg should go.
722 On the HP-PA, this is a single integer, which is a number of words
723 of arguments scanned so far (including the invisible argument,
724 if any, which holds the structure-value-address).
725 Thus 4 or more means all following args should go on the stack. */
727 #define CUMULATIVE_ARGS int
729 /* Initialize a variable CUM of type CUMULATIVE_ARGS
730 for a call to a function whose data type is FNTYPE.
731 For a library call, FNTYPE is 0.
734 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) ((CUM) = 0)
736 /* Figure out the size in words of the function argument. */
738 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
739 ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
741 /* Update the data in CUM to advance over an argument
742 of mode MODE and data type TYPE.
743 (TYPE is null for libcalls where that information may not be available.) */
745 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
746 (((((CUM) & 01) && (TYPE) != 0 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1)\
747 && (CUM)++), (CUM) += FUNCTION_ARG_SIZE(MODE, TYPE))
749 /* Determine where to put an argument to a function.
750 Value is zero to push the argument on the stack,
751 or a hard register in which to store the argument.
753 MODE is the argument's machine mode.
754 TYPE is the data type of the argument (as a tree).
755 This is null for libcalls where that information may
757 CUM is a variable of type CUMULATIVE_ARGS which gives info about
758 the preceding args and about the function being called.
759 NAMED is nonzero if this argument is a named parameter
760 (otherwise it is an extra parameter matching an ellipsis). */
762 /* On the HP-PA the first four words of args are normally in registers
763 and the rest are pushed. But any arg that won't entirely fit in regs
766 Arguments passed in registers are either 1 or 2 words long. */
768 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
770 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
771 (4 >= ((CUM) + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
772 ? gen_rtx (REG, (MODE), \
773 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
774 ? ((MODE) == DFmode \
775 ? ((CUM) ? (TARGET_SNAKE ? 50 : 35) \
776 : (TARGET_SNAKE ? 46 : 33)) \
777 : ((CUM) ? 23 : 25)) \
778 : ((MODE) == SFmode \
779 ? (TARGET_SNAKE ? 44 + 2 * (CUM) : 32 + (CUM)) \
780 : (27 - (CUM) - FUNCTION_ARG_SIZE ((MODE), (TYPE))))))\
783 /* Define where a function finds its arguments.
784 This would be different from FUNCTION_ARG if we had register windows. */
786 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
787 FUNCTION_ARG (CUM, MODE, TYPE, NAMED)
789 /* For an arg passed partly in registers and partly in memory,
790 this is the number of registers used.
791 For args passed entirely in registers or entirely in memory, zero. */
793 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
795 /* If defined, a C expression that gives the alignment boundary, in
796 bits, of an argument with the specified mode and type. If it is
797 not defined, `PARM_BOUNDARY' is used for all arguments. */
799 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
801 ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \
803 : TYPE_ALIGN(TYPE)) \
804 : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
806 : GET_MODE_ALIGNMENT(MODE)))
808 /* Arguments larger than eight bytes are passed by invisible reference */
810 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
811 ((TYPE) && int_size_in_bytes (TYPE) > 8)
813 extern struct rtx_def
*hppa_compare_op0
, *hppa_compare_op1
;
814 extern enum cmp_type hppa_branch_type
;
816 /* Output the label for a function definition. */
817 #ifdef HP_FP_ARG_DESCRIPTOR_REVERSED
818 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
819 do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
820 fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
822 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
823 do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
824 fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
827 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
828 do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \
829 tree tree_type = TREE_TYPE (DECL); \
832 if (TREE_PUBLIC (DECL)) \
833 { extern int current_function_varargs; \
834 fputs ("\t.EXPORT ", FILE); assemble_name (FILE, NAME); \
835 fputs (",ENTRY,PRIV_LEV=3", FILE); \
836 for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
837 parm = TREE_CHAIN (parm)) \
839 if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode) \
840 fprintf (FILE, ",ARGW%d=FR", i++); \
841 else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode) \
846 ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
854 FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
855 DECL_ARG_TYPE (parm)); \
856 if (arg_size == 2 && i <= 2) \
859 fprintf (FILE, ",ARGW%d=GR", i++); \
860 fprintf (FILE, ",ARGW%d=GR", i++); \
862 else if (arg_size == 1) \
863 fprintf (FILE, ",ARGW%d=GR", i++); \
868 /* anonymous args */ \
869 if ((TYPE_ARG_TYPES (tree_type) != 0 \
870 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
871 != void_type_node)) \
872 || current_function_varargs) \
875 fprintf (FILE, ",ARGW%d=GR", i); \
877 if (TYPE_MODE (fntype) == DFmode) \
878 fprintf (FILE, ",RTNVAL=FR"); \
879 else if (TYPE_MODE (fntype) == SFmode) \
880 fprintf (FILE, ",RTNVAL=FU"); \
881 else if (fntype != void_type_node) \
882 fprintf (FILE, ",RTNVAL=GR"); \
883 fputs ("\n", FILE); \
885 ASM_OUTPUT_LABEL (FILE, NAME);} while (0)
887 /* This macro generates the assembly code for function entry.
888 FILE is a stdio stream to output the code to.
889 SIZE is an int: how many units of temporary storage to allocate.
890 Refer to the array `regs_ever_live' to determine which registers
891 to save; `regs_ever_live[I]' is nonzero if register number I
892 is ever used in the function. This macro is responsible for
893 knowing which registers should not be saved even if used. */
895 /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
896 of memory. If any fpu reg is used in the function, we allocate
897 such a block here, at the bottom of the frame, just in case it's needed.
899 If this function is a leaf procedure, then we may choose not
900 to do a "save" insn. The decision about whether or not
901 to do this is made in regclass.c. */
903 #define FUNCTION_PROLOGUE(FILE, SIZE) \
904 output_function_prologue (FILE, SIZE)
906 /* Output assembler code to FILE to increment profiler label # LABELNO
907 for profiling a function entry.
909 Because HPUX _mcount is so different, we actually emit the
910 profiling code in function_prologue. This just stores LABELNO for
913 #define PROFILE_BEFORE_PROLOGUE
914 #define FUNCTION_PROFILER(FILE, LABELNO) \
915 { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
917 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
918 the stack pointer does not matter. The value is tested only in
919 functions that have frame pointers.
920 No definition is equivalent to always zero. */
922 extern int may_call_alloca
;
923 extern int current_function_pretend_args_size
;
925 #define EXIT_IGNORE_STACK \
926 (get_frame_size () != 0 \
927 || current_function_calls_alloca || current_function_outgoing_args_size)
930 /* This macro generates the assembly code for function exit,
931 on machines that need it. If FUNCTION_EPILOGUE is not defined
932 then individual return instructions are generated for each
933 return statement. Args are same as for FUNCTION_PROLOGUE.
935 The function epilogue should not depend on the current stack pointer!
936 It should use the frame pointer only. This is mandatory because
937 of alloca; we also take advantage of it to omit stack adjustments
940 /* This declaration is needed due to traditional/ANSI
941 incompatibilities which cannot be #ifdefed away
942 because they occur inside of macros. Sigh. */
943 extern union tree_node
*current_function_decl
;
945 #define FUNCTION_EPILOGUE(FILE, SIZE) \
946 output_function_epilogue (FILE, SIZE)
947 #define DELAY_SLOTS_FOR_EPILOGUE hppa_epilogue_delay_slots ()
949 #define ELIGIBLE_FOR_EPILOGUE_DELAY(trial, slots_filled) \
950 eligible_for_epilogue_delay (trial, slots_filled)
952 /* Output assembler code for a block containing the constant parts
953 of a trampoline, leaving space for the variable parts. */
955 #define TRAMPOLINE_TEMPLATE(FILE) {}
957 /* Length in units of the trampoline for entering a nested function. */
959 #define TRAMPOLINE_SIZE 0
961 /* Emit RTL insns to initialize the variable parts of a trampoline.
962 FNADDR is an RTX for the address of the function's pure code.
963 CXT is an RTX for the static chain value for the function.
965 This takes 16 insns: 2 shifts & 2 ands (to split up addresses), 4 sethi
966 (to load in opcodes), 4 iors (to merge address and opcodes), and 4 writes
967 (to store insns). This is a bit excessive. Perhaps a different
968 mechanism would be better here. */
969 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) {}
971 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
972 reference the 4 integer arg registers and 4 fp arg registers.
973 Ordinarily they are not call used registers, but they are for
974 _builtin_saveregs, so we must make this explicit. */
976 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) (rtx)hppa_builtin_saveregs (ARGLIST)
979 /* Addressing modes, and classification of registers for them. */
981 #define HAVE_POST_INCREMENT
982 #define HAVE_POST_DECREMENT
984 #define HAVE_PRE_DECREMENT
985 #define HAVE_PRE_INCREMENT
987 /* Macros to check register numbers against specific register classes. */
989 /* These assume that REGNO is a hard or pseudo reg number.
990 They give nonzero only if REGNO is a hard reg of the suitable class
991 or a pseudo reg currently allocated to a suitable hard reg.
992 Since they use reg_renumber, they are safe only once reg_renumber
993 has been allocated, which happens in local-alloc.c. */
995 #define REGNO_OK_FOR_INDEX_P(REGNO) \
996 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
997 #define REGNO_OK_FOR_BASE_P(REGNO) \
998 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
999 #define REGNO_OK_FOR_FP_P(REGNO) \
1000 (((REGNO) >= 32 && (REGNO) <= 99)\
1001 || (reg_renumber[REGNO] >= 32 && reg_renumber[REGNO] <= 99))
1003 /* Now macros that check whether X is a register and also,
1004 strictly, whether it is in a specified class.
1006 These macros are specific to the the HP-PA, and may be used only
1007 in code for printing assembler insns and in conditions for
1008 define_optimization. */
1010 /* 1 if X is an fp register. */
1012 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1014 /* Maximum number of registers that can appear in a valid memory address. */
1016 #define MAX_REGS_PER_ADDRESS 2
1018 /* Recognize any constant value that is a valid address except
1019 for symbolic addresses. We get better CSE by rejecting them
1020 here and allowing hppa_legitimize_address to break them up. */
1022 #define CONSTANT_ADDRESS_P(X) \
1023 (CONSTANT_P (X) && ! symbolic_expression_p (X))
1025 /* Include all constant integers and constant doubles, but not
1026 floating-point, except for floating-point zero. */
1028 #define LEGITIMATE_CONSTANT_P(X) \
1029 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1030 || (X) == CONST0_RTX (GET_MODE (X)))
1032 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1033 and check its validity for a certain class.
1034 We have two alternate definitions for each of them.
1035 The usual definition accepts all pseudo regs; the other rejects
1036 them unless they have been allocated suitable hard regs.
1037 The symbol REG_OK_STRICT causes the latter definition to be used.
1039 Most source files want to accept pseudo regs in the hope that
1040 they will get allocated to the class that the insn wants them to be in.
1041 Source files for reload pass need to be strict.
1042 After reload, it makes no difference, since pseudo regs have
1043 been eliminated by then. */
1045 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1047 For the HPPA, `Q' means that this is a memory operand but not a
1048 symbolic memory operand. Note that an unassigned pseudo register
1049 is such a memory operand. Needed because reload will generate
1050 these things in insns and then not re-recognize the insns, causing
1051 constrain_operands to fail.
1053 `R' handles the LO_SUM which can be an address for `Q'.
1055 `S' handles constraints for calls.
1057 `T' is for fp load and store addresses.*/
1059 #ifndef REG_OK_STRICT
1061 /* Nonzero if X is a hard reg that can be used as an index
1062 or if it is a pseudo reg. */
1063 #define REG_OK_FOR_INDEX_P(X) \
1064 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1065 /* Nonzero if X is a hard reg that can be used as a base reg
1066 or if it is a pseudo reg. */
1067 #define REG_OK_FOR_BASE_P(X) \
1068 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1070 #define EXTRA_CONSTRAINT(OP, C) \
1072 ((GET_CODE (OP) == MEM \
1073 && memory_address_p (GET_MODE (OP), XEXP (OP, 0)) \
1074 && ! symbolic_memory_operand (OP, VOIDmode))) \
1076 (GET_CODE (OP) == LO_SUM \
1077 && GET_CODE (XEXP (OP, 0)) == REG \
1078 && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \
1080 ? CONSTANT_P (OP) || memory_address_p (Pmode, OP)\
1081 : ((C) == 'T' ? short_memory_operand (OP, VOIDmode) : 0))))\
1086 /* Nonzero if X is a hard reg that can be used as an index. */
1087 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1088 /* Nonzero if X is a hard reg that can be used as a base reg. */
1089 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1091 #define EXTRA_CONSTRAINT(OP, C) \
1092 (((C) == 'Q' || (C) == 'T') ? \
1093 (GET_CODE (OP) == REG ? \
1094 (REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1095 && reg_renumber[REGNO (OP)] < 0) \
1096 : GET_CODE (OP) == MEM) \
1098 (GET_CODE (OP) == LO_SUM \
1099 && GET_CODE (XEXP (OP, 0)) == REG \
1100 && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \
1101 : (CONSTANT_P (OP) \
1102 || (GET_CODE (OP) == REG && reg_renumber[REGNO (OP)] > 0)\
1103 || strict_memory_address_p (Pmode, OP))))
1107 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1108 that is a valid memory address for an instruction.
1109 The MODE argument is the machine mode for the MEM expression
1110 that wants to use this address.
1112 On the HP-PA, the actual legitimate addresses must be
1113 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1114 But we can treat a SYMBOL_REF as legitimate if it is part of this
1115 function's constant-pool, because such addresses can actually
1116 be output as REG+SMALLINT. */
1118 #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1119 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1121 #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1122 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1124 #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1125 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1127 #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1128 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1130 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1132 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1133 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1134 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1135 && REG_P (XEXP (X, 0)) \
1136 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1138 else if (GET_CODE (X) == PLUS) \
1140 rtx base = 0, index; \
1141 if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1143 if (GET_CODE (XEXP (X, 1)) == REG \
1144 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1146 else if (flag_pic == 1 \
1147 && GET_CODE (XEXP (X, 1)) != REG \
1148 && GET_CODE (XEXP (X, 1)) != LO_SUM \
1149 && GET_CODE (XEXP (X, 1)) != MEM) \
1152 else if (REG_P (XEXP (X, 0)) \
1153 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1154 base = XEXP (X, 0), index = XEXP (X, 1); \
1155 else if (REG_P (XEXP (X, 1)) \
1156 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1157 base = XEXP (X, 1), index = XEXP (X, 0); \
1159 if (GET_CODE (index) == CONST_INT \
1160 && ((INT_14_BITS (index) && (MODE) != SFmode && (MODE) != DFmode) \
1161 || INT_5_BITS (index))) \
1164 else if (GET_CODE (X) == LO_SUM \
1165 && GET_CODE (XEXP (X, 0)) == REG \
1166 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1167 && CONSTANT_P (XEXP (X, 1)) \
1168 && (MODE) != SFmode \
1169 && (MODE) != DFmode) \
1171 else if (GET_CODE (X) == LO_SUM \
1172 && GET_CODE (XEXP (X, 0)) == SUBREG \
1173 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1174 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1175 && CONSTANT_P (XEXP (X, 1)) \
1176 && (MODE) != SFmode \
1177 && (MODE) != DFmode) \
1179 else if (GET_CODE (X) == LABEL_REF \
1180 || (GET_CODE (X) == CONST_INT \
1181 && INT_14_BITS (X))) \
1185 /* Try machine-dependent ways of modifying an illegitimate address
1186 to be legitimate. If we find one, return the new, valid address.
1187 This macro is used in only one place: `memory_address' in explow.c.
1189 OLDX is the address as it was before break_out_memory_refs was called.
1190 In some cases it is useful to look at this to decide what needs to be done.
1192 MODE and WIN are passed so that this macro can use
1193 GO_IF_LEGITIMATE_ADDRESS.
1195 It is always safe for this macro to do nothing. It exists to recognize
1196 opportunities to optimize the output. */
1198 extern struct rtx_def
*hppa_legitimize_address ();
1199 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1200 { rtx orig_x = (X); \
1201 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1202 if ((X) != orig_x && memory_address_p (MODE, X)) \
1205 /* Go to LABEL if ADDR (a legitimate address expression)
1206 has an effect that depends on the machine mode it is used for. */
1208 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1209 if (GET_CODE (ADDR) == PRE_DEC \
1210 || GET_CODE (ADDR) == POST_DEC \
1211 || GET_CODE (ADDR) == PRE_INC \
1212 || GET_CODE (ADDR) == POST_INC) \
1215 /* Define this macro if references to a symbol must be treated
1216 differently depending on something about the variable or
1217 function named by the symbol (such as what section it is in).
1219 The macro definition, if any, is executed immediately after the
1220 rtl for DECL or other node is created.
1221 The value of the rtl will be a `mem' whose address is a
1224 The usual thing for this macro to do is to a flag in the
1225 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1226 name string in the `symbol_ref' (if one bit is not enough
1229 On the HP-PA we use this to indicate if a symbol is in text or
1230 data space. Also, function labels need special treatment. */
1232 #define TEXT_SPACE_P(DECL)\
1233 (TREE_CODE (DECL) == FUNCTION_DECL \
1234 || (TREE_CODE (DECL) == VAR_DECL \
1235 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1237 || (*tree_code_type[(int) TREE_CODE (DECL)] == 'c' \
1238 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1240 #define FUNCTION_NAME_P(NAME) \
1241 (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@'))
1243 #define ENCODE_SECTION_INFO(DECL)\
1245 { if (TEXT_SPACE_P (DECL)) \
1247 if (TREE_CODE (DECL) == FUNCTION_DECL \
1248 || TREE_CODE (DECL) == VAR_DECL) \
1249 _rtl = DECL_RTL (DECL); \
1251 _rtl = TREE_CST_RTL (DECL); \
1252 SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
1253 if (TREE_CODE (DECL) == FUNCTION_DECL) \
1254 hppa_encode_label (XEXP (DECL_RTL (DECL), 0));\
1259 /* Store the user-specified part of SYMBOL_NAME in VAR.
1260 This is sort of inverse to ENCODE_SECTION_INFO. */
1262 #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1263 (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \
1264 1 + (SYMBOL_NAME)[1] == '@'\
1265 : (SYMBOL_NAME)[0] == '@'))
1267 /* Specify the machine mode that this machine uses
1268 for the index in the tablejump instruction. */
1269 #define CASE_VECTOR_MODE SImode
1271 /* Define this if the tablejump instruction expects the table
1272 to contain offsets from the address of the table.
1273 Do not define this if the table should contain absolute addresses. */
1274 /* #define CASE_VECTOR_PC_RELATIVE */
1276 /* Specify the tree operation to be used to convert reals to integers. */
1277 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1279 /* This is the kind of divide that is easiest to do in the general case. */
1280 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1282 /* Define this as 1 if `char' should by default be signed; else as 0. */
1283 #define DEFAULT_SIGNED_CHAR 1
1285 /* Max number of bytes we can move from memory to memory
1286 in one reasonably fast instruction. */
1289 /* Define if normal loads of shorter-than-word items from memory clears
1290 the rest of the bigs in the register. */
1291 #define BYTE_LOADS_ZERO_EXTEND
1293 /* Nonzero if access to memory by bytes is slow and undesirable. */
1294 #define SLOW_BYTE_ACCESS 1
1296 /* Do not break .stabs pseudos into continuations. */
1297 #define DBX_CONTIN_LENGTH 0
1299 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1300 is done just by pretending it is already truncated. */
1301 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1303 /* We assume that the store-condition-codes instructions store 0 for false
1304 and some other value for true. This is the value stored for true. */
1306 #define STORE_FLAG_VALUE 1
1308 /* When a prototype says `char' or `short', really pass an `int'. */
1309 #define PROMOTE_PROTOTYPES
1311 /* Specify the machine mode that pointers have.
1312 After generation of rtl, the compiler makes no further distinction
1313 between pointers and any other objects of this machine mode. */
1314 #define Pmode SImode
1316 /* Add any extra modes needed to represent the condition code.
1318 HPPA floating comparisons produce condition codes. */
1319 #define EXTRA_CC_MODES CCFPmode
1321 /* Define the names for the modes specified above. */
1322 #define EXTRA_CC_NAMES "CCFP"
1324 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1325 return the mode to be used for the comparison. For floating-point, CCFPmode
1326 should be used. CC_NOOVmode should be used when the first operand is a
1327 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1329 #define SELECT_CC_MODE(OP,X,Y) \
1330 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1332 /* A function address in a call instruction
1333 is a byte address (for indexing purposes)
1334 so give the MEM rtx a byte's mode. */
1335 #define FUNCTION_MODE SImode
1337 /* Define this if addresses of constant functions
1338 shouldn't be put through pseudo regs where they can be cse'd.
1339 Desirable on machines where ordinary constants are expensive
1340 but a CALL with constant address is cheap. */
1341 #define NO_FUNCTION_CSE
1343 /* Define this if shift instructions ignore all but the low-order
1345 #define SHIFT_COUNT_TRUNCATED
1347 /* Use atexit for static constructors/destructors, instead of defining
1348 our own exit function. */
1351 /* Compute the cost of computing a constant rtl expression RTX
1352 whose rtx-code is CODE. The body of this macro is a portion
1353 of a switch statement. If the code is computed here,
1354 return it with a return statement. Otherwise, break from the switch. */
1356 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1358 if (INTVAL (RTX) == 0) return 0; \
1359 if (INT_14_BITS (RTX)) return 1; \
1366 case CONST_DOUBLE: \
1367 if (RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)\
1368 && OUTER_CODE != SET) \
1373 #define ADDRESS_COST(RTX) \
1374 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1376 /* Compute extra cost of moving data between one register class
1379 Make moves from SAR so expensive they should never happen.
1381 Copies involving a FP register and a non-FP register are relatively
1382 expensive because they must go through memory.
1384 Other copies are reasonably cheap. */
1385 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1386 (CLASS1 == SHIFT_REGS ? 0xffff \
1387 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1388 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1392 /* Provide the costs of a rtl expression. This is in the body of a
1393 switch on CODE. The purpose for the cost of MULT is to encourage
1394 `synth_mult' to find a synthetic multiply when reasonable. */
1396 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1398 return COSTS_N_INSNS (20); \
1403 return COSTS_N_INSNS (60); \
1404 case PLUS: /* this includes shNadd insns */ \
1405 return COSTS_N_INSNS (1) + 2;
1407 /* Adjust the cost of dependencies. */
1409 #define ADJUST_COST(INSN,LINK,DEP,COST) \
1410 (COST) = pa_adjust_cost (INSN, LINK, DEP, COST)
1412 /* Conditional branches with empty delay slots have a length of two. */
1413 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1414 if (GET_CODE (INSN) == CALL_INSN \
1415 || (GET_CODE (INSN) == JUMP_INSN && ! simplejump_p (insn))) \
1418 /* Control the assembler format that we output. */
1420 /* Output at beginning of assembler file. */
1422 #define ASM_FILE_START(FILE) \
1423 do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1424 \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1425 \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\
1427 \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1428 \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1429 \t.IMPORT $global$,DATA\n\
1430 \t.IMPORT $$dyncall,MILLICODE\n");\
1432 fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\
1435 /* Output to assembler file text saying following lines
1436 may contain character constants, extra white space, comments, etc. */
1438 #define ASM_APP_ON ""
1440 /* Output to assembler file text saying following lines
1441 no longer contain unusual constructs. */
1443 #define ASM_APP_OFF ""
1445 /* We don't yet know how to identify GCC to HP-PA machines. */
1446 #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1448 /* Output before code. */
1450 /* Supposedly the assembler rejects the command if there is no tab! */
1451 #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1453 /* Output before writable data. */
1455 /* Supposedly the assembler rejects the command if there is no tab! */
1456 #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1458 /* Output before uninitialized data. */
1460 #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$\n"
1462 /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
1464 #define EXTRA_SECTIONS in_bss
1466 #define EXTRA_SECTION_FUNCTIONS \
1470 if (in_section != in_bss) \
1472 fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
1473 in_section = in_bss; \
1478 /* How to refer to registers in assembler output.
1479 This sequence is indexed by compiler's hard-register-number (see above). */
1481 #define REGISTER_NAMES \
1482 {"0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1483 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1484 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
1485 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
1486 "%fr4", "%fr5", "%fr6", "%fr7", \
1487 "%fr8", "%fr9", "%fr10", "%fr11", "%fr12", "%fr13", "%fr14", "%fr15", \
1488 "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
1489 "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R",\
1490 "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R",\
1491 "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R",\
1492 "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R",\
1493 "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R",\
1494 "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R",\
1497 /* How to renumber registers for dbx and gdb. */
1499 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1501 /* This is how to output the definition of a user-level label named NAME,
1502 such as the label on a static function or variable NAME. */
1504 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1505 do { assemble_name (FILE, NAME); \
1506 if (TARGET_TRAILING_COLON) \
1507 fputc (':', FILE); \
1508 fputc ('\n', FILE); } while (0)
1510 /* This is how to output a command to make the user-level label named NAME
1511 defined for reference from other files. */
1513 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1514 do { fputs ("\t.IMPORT ", FILE); \
1515 assemble_name (FILE, NAME); \
1516 if (FUNCTION_NAME_P (NAME)) \
1517 fputs (",CODE\n", FILE); \
1519 fputs (",DATA\n", FILE); \
1522 /* hpux ld doesn't output the object file name, or anything useful at
1523 all, to indicate the start of an object file's symbols. This screws
1524 up gdb, so we'll output this magic cookie at the end of an object
1525 file with debugging symbols */
1527 #define ASM_FILE_END(FILE) \
1528 do { if (write_symbols == DBX_DEBUG)\
1529 { fputs (TEXT_SECTION_ASM_OP, FILE);\
1530 fputs (".stabs \"end_file.\",4,0,0,Ltext_end\nLtext_end:\n",\
1535 /* The bogus HP assembler requires ALL external references to be
1536 "imported", even library calls. They look a bit different, so
1537 here's this macro. */
1539 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1540 do { fputs ("\t.IMPORT ", FILE); \
1541 assemble_name (FILE, XSTR ((RTL), 0)); \
1542 fputs (",CODE\n", FILE); \
1545 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1546 do { fputs ("\t.EXPORT ", FILE); assemble_name (FILE, NAME); \
1547 if (FUNCTION_NAME_P (NAME)) \
1548 fputs (",CODE\n", FILE); \
1550 fputs (",DATA\n", FILE);} while (0)
1552 /* This is how to output a reference to a user-level label named NAME.
1553 `assemble_name' uses this. */
1555 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1556 fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1558 /* This is how to output an internal numbered label where
1559 PREFIX is the class of label and NUM is the number within the class. */
1561 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1562 {fprintf (FILE, "%s$%04d", PREFIX, NUM); \
1563 if (TARGET_TRAILING_COLON) \
1564 fputs (":\n", FILE); \
1566 fputs ("\n", FILE);}
1568 /* This is how to store into the string LABEL
1569 the symbol_ref name of an internal numbered label where
1570 PREFIX is the class of label and NUM is the number within the class.
1571 This is suitable for output with `assemble_name'. */
1573 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1574 sprintf (LABEL, "*%s$%04d", PREFIX, NUM)
1576 /* This is how to output an assembler line defining a `double' constant. */
1578 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1579 do { union { double d; int i[2];} __u; \
1581 fprintf (FILE, "\t; .double %.20e\n\t.word %d ; = 0x%x\n\t.word %d ; = 0x%x\n", \
1582 __u.d, __u.i[0], __u.i[0], __u.i[1], __u.i[1]); \
1585 /* This is how to output an assembler line defining a `float' constant. */
1587 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1588 do { union { float f; int i;} __u; \
1590 fprintf (FILE, "\t; .float %.12e\n\t.word %d ; = 0x%x\n", __u.f, __u.i, __u.i); \
1593 /* This is how to output an assembler line defining an `int' constant. */
1595 #define ASM_OUTPUT_INT(FILE,VALUE) \
1596 { fprintf (FILE, "\t.word "); \
1597 if (TARGET_SHARED_LIBS \
1598 && function_label_operand (VALUE, VOIDmode)\
1599 && in_section != in_text) \
1600 fprintf (FILE, "P%%"); \
1601 output_addr_const (FILE, (VALUE)); \
1602 fprintf (FILE, "\n");}
1604 /* Likewise for `short' and `char' constants. */
1606 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1607 ( fprintf (FILE, "\t.half "), \
1608 output_addr_const (FILE, (VALUE)), \
1609 fprintf (FILE, "\n"))
1611 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1612 ( fprintf (FILE, "\t.byte "), \
1613 output_addr_const (FILE, (VALUE)), \
1614 fprintf (FILE, "\n"))
1616 /* This is how to output an assembler line for a numeric constant byte. */
1618 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1619 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1621 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1622 output_ascii ((FILE), (P), (SIZE))
1624 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
1625 #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1626 /* This is how to output an element of a case-vector that is absolute.
1627 Note that this method makes filling these branch delay slots
1630 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1631 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1633 /* Jump tables are executable code and live in the TEXT section on the PA. */
1634 #define JUMP_TABLES_IN_TEXT_SECTION
1636 /* This is how to output an element of a case-vector that is relative.
1637 (The HP-PA does not use such vectors,
1638 but we must define this macro anyway.) */
1640 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1641 fprintf (FILE, "\tword L%d-L%d\n", VALUE, REL)
1643 /* This is how to output an assembler line
1644 that says to advance the location counter
1645 to a multiple of 2**LOG bytes. */
1647 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1648 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1650 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1651 fprintf (FILE, "\t.blockz %d\n", (SIZE))
1653 /* This says how to output an assembler line
1654 to define a global common symbol. */
1656 /* Supposedly the assembler rejects the command if there is no tab! */
1659 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1661 assemble_name ((FILE), (NAME)); \
1662 if (TARGET_TRAILING_COLON) \
1663 fputc (':', (FILE)); \
1664 fputs ("\t.comm ", (FILE)); \
1665 fprintf ((FILE), "%d\n", (ROUNDED));}
1667 /* This says how to output an assembler line
1668 to define a local common symbol. */
1670 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1672 fprintf ((FILE), "\t.align %d\n", (SIZE) <= 4 ? 4 : 8); \
1673 assemble_name ((FILE), (NAME)); \
1674 if (TARGET_TRAILING_COLON) \
1675 fputc (':', (FILE)); \
1676 fprintf ((FILE), "\n\t.block %d\n", (ROUNDED));}
1678 /* Store in OUTPUT a string (made with alloca) containing
1679 an assembler-name for a local static variable named NAME.
1680 LABELNO is an integer which is different for each call. */
1682 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1683 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1684 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1686 /* Define the parentheses used to group arithmetic operations
1687 in assembler code. */
1689 #define ASM_OPEN_PAREN "("
1690 #define ASM_CLOSE_PAREN ")"
1692 /* Define results of standard character escape sequences. */
1693 #define TARGET_BELL 007
1694 #define TARGET_BS 010
1695 #define TARGET_TAB 011
1696 #define TARGET_NEWLINE 012
1697 #define TARGET_VT 013
1698 #define TARGET_FF 014
1699 #define TARGET_CR 015
1701 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1702 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1704 /* Print operand X (an rtx) in assembler syntax to file FILE.
1705 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1706 For `%' followed by punctuation, CODE is the punctuation and X is null.
1708 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1709 and an immediate zero should be represented as `r0'.
1711 Several % codes are defined:
1713 C compare conditions
1714 N extract conditions
1715 M modifier to handle preincrement addressing for memory refs.
1716 F modifier to handle preincrement addressing for fp memory refs */
1718 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1721 /* Print a memory address as an operand to reference that memory location. */
1723 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1724 { register rtx addr = ADDR; \
1725 register rtx base; \
1727 switch (GET_CODE (addr)) \
1730 fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
1733 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1734 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1735 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1736 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
1739 fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
1742 fputs ("R'", FILE); \
1743 output_global_address (FILE, XEXP (addr, 1)); \
1744 fputs ("(", FILE); \
1745 output_operand (XEXP (addr, 0), 0); \
1746 fputs (")", FILE); \
1749 fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
1752 output_addr_const (FILE, addr); \
1756 /* Define functions in pa.c and used in insn-output.c. */
1758 extern char *output_and ();
1759 extern char *output_ior ();
1760 extern char *output_move_double ();
1761 extern char *output_fp_move_double ();
1762 extern char *output_block_move ();
1763 extern char *output_scc_insn ();
1764 extern char *output_cbranch ();
1765 extern char *output_return ();
1766 extern char *output_floatsisf2 ();
1767 extern char *output_floatsidf2 ();
1768 extern char *output_mul_insn ();
1769 extern char *output_div_insn ();
1770 extern char *output_mod_insn ();
1771 extern void output_arg_descriptor ();
1772 extern void output_global_address ();
1773 extern struct rtx_def
*legitimize_pic_address ();
1774 extern struct rtx_def
*gen_cmp_fp ();
1775 extern void hppa_encode_label ();
1777 extern struct rtx_def
*hppa_save_pic_table_rtx
;