1 /* Definitions of target machine for GNU compiler. NS32000 version.
2 Copyright (C) 1988, 1993, 1994 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@cygnus.com)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* Note that some other tm.h files include this one and then override
23 many of the definitions that relate to assembler syntax. */
25 extern enum reg_class
secondary_reload_class();
27 /* Names to predefine in the preprocessor for this target machine. */
29 #define CPP_PREDEFINES "-Dns32000 -Dunix -Asystem(unix) -Acpu(ns32k) -Amachine(ns32k)"
31 /* Print subsidiary information on the compiler version in use. */
32 #define TARGET_VERSION fprintf (stderr, " (32000, GAS syntax)");
35 /* ABSOLUTE PREFIX, IMMEDIATE_PREFIX and EXTERNAL_PREFIX can be defined
36 to cover most NS32k addressing syntax variations. This way we don't
37 need to redefine long macros in all the tm.h files for just slight
38 variations in assembler syntax. */
40 #ifndef ABSOLUTE_PREFIX
41 #define ABSOLUTE_PREFIX '@'
44 #if defined(IMMEDIATE_PREFIX) && IMMEDIATE_PREFIX
45 #define PUT_IMMEDIATE_PREFIX(FILE) putc(IMMEDIATE_PREFIX, FILE)
47 #define PUT_IMMEDIATE_PREFIX(FILE)
49 #if defined(ABSOLUTE_PREFIX) && ABSOLUTE_PREFIX
50 #define PUT_ABSOLUTE_PREFIX(FILE) putc(ABSOLUTE_PREFIX, FILE)
52 #define PUT_ABSOLUTE_PREFIX(FILE)
54 #if defined(EXTERNAL_PREFIX) && EXTERNAL_PREFIX
55 #define PUT_EXTERNAL_PREFIX(FILE) putc(EXTERNAL_PREFIX, FILE)
57 #define PUT_EXTERNAL_PREFIX(FILE)
60 /* Run-time compilation parameters selecting different hardware subsets. */
62 extern int target_flags
;
64 /* Macros used in the machine description to test the flags. */
66 /* Compile 32081 insns for floating point (not library calls). */
67 #define TARGET_32081 (target_flags & 1)
69 /* Compile using rtd insn calling sequence.
70 This will not work unless you use prototypes at least
71 for all functions that can take varying numbers of args. */
72 #define TARGET_RTD (target_flags & 2)
74 /* Compile passing first two args in regs 0 and 1. */
75 #define TARGET_REGPARM (target_flags & 4)
77 /* Options to select type of CPU, for better optimization.
78 The output is correct for any kind of 32000 regardless of these options. */
79 #define TARGET_32532 (target_flags & 8)
80 #define TARGET_32332 (target_flags & 16)
82 /* Ok to use the static base register (and presume it's 0) */
83 #define TARGET_SB ((target_flags & 32) == 0)
84 #define TARGET_HIMEM (target_flags & 128)
86 /* Compile using bitfield insns. */
87 #define TARGET_BITFIELD ((target_flags & 64) == 0)
89 /* Macro to define tables used to set the flags.
90 This is a list in braces of pairs in braces,
91 each pair being { "NAME", VALUE }
92 where VALUE is the bits to set or minus the bits to clear.
93 An empty string NAME is used to identify the default VALUE. */
95 #define TARGET_SWITCHES \
97 { "soft-float", -1}, \
101 { "noregparm", -4}, \
108 { "bitfield", -64}, \
109 { "nobitfield", 64}, \
111 { "nohimem", -128}, \
112 { "", TARGET_DEFAULT}}
113 /* TARGET_DEFAULT is defined in encore.h, pc532.h, etc. */
115 /* When we are generating PIC, the sb is used as a pointer
118 #define OVERRIDE_OPTIONS \
120 if (flag_pic || TARGET_HIMEM) target_flags |= 32; \
124 /* target machine storage layout */
126 /* Define this if most significant bit is lowest numbered
127 in instructions that operate on numbered bit-fields.
128 This is not true on the ns32k. */
129 #define BITS_BIG_ENDIAN 0
131 /* Define this if most significant byte of a word is the lowest numbered. */
132 /* That is not true on the ns32k. */
133 #define BYTES_BIG_ENDIAN 0
135 /* Define this if most significant word of a multiword number is lowest
136 numbered. This is not true on the ns32k. */
137 #define WORDS_BIG_ENDIAN 0
139 /* Number of bits in an addressable storage unit */
140 #define BITS_PER_UNIT 8
142 /* Width in bits of a "word", which is the contents of a machine register.
143 Note that this is not necessarily the width of data type `int';
144 if using 16-bit ints on a 32000, this would still be 32.
145 But on a machine with 16-bit registers, this would be 16. */
146 #define BITS_PER_WORD 32
148 /* Width of a word, in units (bytes). */
149 #define UNITS_PER_WORD 4
151 /* Width in bits of a pointer.
152 See also the macro `Pmode' defined below. */
153 #define POINTER_SIZE 32
155 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
156 #define PARM_BOUNDARY 32
158 /* Boundary (in *bits*) on which stack pointer should be aligned. */
159 #define STACK_BOUNDARY 32
161 /* Allocation boundary (in *bits*) for the code of a function. */
162 #define FUNCTION_BOUNDARY 16
164 /* Alignment of field after `int : 0' in a structure. */
165 #define EMPTY_FIELD_BOUNDARY 32
167 /* Every structure's size must be a multiple of this. */
168 #define STRUCTURE_SIZE_BOUNDARY 8
170 /* No data type wants to be aligned rounder than this. */
171 #define BIGGEST_ALIGNMENT 32
173 /* Set this nonzero if move instructions will actually fail to work
174 when given unaligned data. National claims that the NS32032
175 works without strict alignment, but rumor has it that operands
176 crossing a page boundary cause unpredictable results. */
177 #define STRICT_ALIGNMENT 1
179 /* If bit field type is int, dont let it cross an int,
180 and give entire struct the alignment of an int. */
181 /* Required on the 386 since it doesn't have a full set of bitfield insns.
182 (There is no signed extv insn.) */
183 #define PCC_BITFIELD_TYPE_MATTERS 1
185 /* Standard register usage. */
187 /* Number of actual hardware registers.
188 The hardware registers are assigned numbers for the compiler
189 from 0 to just below FIRST_PSEUDO_REGISTER.
190 All registers that the compiler knows about must be given numbers,
191 even those that are not normally considered general registers. */
192 #define FIRST_PSEUDO_REGISTER 18
194 /* 1 for registers that have pervasive standard uses
195 and are not available for the register allocator.
196 On the ns32k, these are the FP, SP, (SB and PC are not included here). */
197 #define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, \
198 0, 0, 0, 0, 0, 0, 0, 0, \
201 /* 1 for registers not available across function calls.
202 These must include the FIXED_REGISTERS and also any
203 registers that can be used without being saved.
204 The latter must include the registers where values are returned
205 and the register where structure-value addresses are passed.
206 Aside from that, you can include as many other registers as you like. */
207 #define CALL_USED_REGISTERS {1, 1, 1, 0, 0, 0, 0, 0, \
208 1, 1, 1, 1, 0, 0, 0, 0, \
211 /* Return number of consecutive hard regs needed starting at reg REGNO
212 to hold something of mode MODE.
213 This is ordinarily the length in words of a value of mode MODE
214 but can be less for certain modes in special long registers.
215 On the ns32k, all registers are 32 bits long. */
216 #define HARD_REGNO_NREGS(REGNO, MODE) \
217 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
219 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
220 #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok (REGNO, MODE)
222 /* Value is 1 if it is a good idea to tie two pseudo registers
223 when one has mode MODE1 and one has mode MODE2.
224 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
225 for any hard reg, then this must be 0 for correct output. */
226 #define MODES_TIEABLE_P(MODE1, MODE2) \
227 (((MODE1) == DFmode || (MODE1) == DCmode || (MODE1) == DImode) == \
228 ((MODE2) == DFmode || (MODE2) == DCmode || (MODE2) == DImode))
230 /* Specify the registers used for certain standard purposes.
231 The values of these macros are register numbers. */
233 /* NS32000 pc is not overloaded on a register. */
234 /* #define PC_REGNUM */
236 /* Register to use for pushing function arguments. */
237 #define STACK_POINTER_REGNUM 17
239 /* Base register for access to local variables of the function. */
240 #define FRAME_POINTER_REGNUM 16
242 /* Value should be nonzero if functions must have frame pointers.
243 Zero means the frame pointer need not be set up (and parms
244 may be accessed via the stack pointer) in functions that seem suitable.
245 This is computed in `reload', in reload1.c. */
246 #define FRAME_POINTER_REQUIRED 0
248 /* Base register for access to arguments of the function. */
249 #define ARG_POINTER_REGNUM 16
251 /* Register in which static-chain is passed to a function. */
252 #define STATIC_CHAIN_REGNUM 1
254 /* Register in which address to store a structure value
255 is passed to a function. */
256 #define STRUCT_VALUE_REGNUM 2
258 /* Define the classes of registers for register constraints in the
259 machine description. Also define ranges of constants.
261 One of the classes must always be named ALL_REGS and include all hard regs.
262 If there is more than one class, another class must be named NO_REGS
263 and contain no registers.
265 The name GENERAL_REGS must be the name of a class (or an alias for
266 another name such as ALL_REGS). This is the class of registers
267 that is allowed by "g" or "r" in a register constraint.
268 Also, registers outside this class are allocated only when
269 instructions express preferences for them.
271 The classes must be numbered in nondecreasing order; that is,
272 a larger-numbered class must never be contained completely
273 in a smaller-numbered class.
275 For any two classes, it is very desirable that there be another
276 class that represents their union. */
278 enum reg_class
{ NO_REGS
, GENERAL_REGS
, FLOAT_REGS
, GEN_AND_FP_REGS
,
279 FRAME_POINTER_REG
, STACK_POINTER_REG
,
280 GEN_AND_MEM_REGS
, ALL_REGS
, LIM_REG_CLASSES
};
282 #define N_REG_CLASSES (int) LIM_REG_CLASSES
284 /* Give names of register classes as strings for dump file. */
286 #define REG_CLASS_NAMES \
287 {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "GEN_AND_FP_REGS", \
288 "FRAME_POINTER_REG", "STACK_POINTER_REG", "GEN_AND_MEM_REGS", "ALL_REGS" }
290 /* Define which registers fit in which classes.
291 This is an initializer for a vector of HARD_REG_SET
292 of length N_REG_CLASSES. */
294 #define REG_CLASS_CONTENTS {0, 0x00ff, 0xff00, 0xffff, \
295 0x10000, 0x20000, 0x300ff, 0x3ffff }
297 /* The same information, inverted:
298 Return the class number of the smallest class containing
299 reg number REGNO. This could be a conditional expression
300 or could index an array. */
302 #define REGNO_REG_CLASS(REGNO) \
303 ((REGNO) < 8 ? GENERAL_REGS \
304 : (REGNO) < 16 ? FLOAT_REGS \
305 : (REGNO) == 16 ? FRAME_POINTER_REG \
306 : (REGNO) == 17 ? STACK_POINTER_REG \
309 /* The class value for index registers, and the one for base regs. */
311 #define INDEX_REG_CLASS GENERAL_REGS
312 #define BASE_REG_CLASS GEN_AND_MEM_REGS
314 /* Get reg_class from a letter such as appears in the machine description. */
316 #define REG_CLASS_FROM_LETTER(C) \
317 ((C) == 'f' ? FLOAT_REGS \
318 : (C) == 'x' ? FRAME_POINTER_REG \
319 : (C) == 'y' ? STACK_POINTER_REG \
322 /* The letters I, J, K, L and M in a register constraint string
323 can be used to stand for particular ranges of immediate operands.
324 This macro defines what the ranges are.
325 C is the letter, and VALUE is a constant value.
326 Return 1 if VALUE is in the range specified by C.
328 On the ns32k, these letters are used as follows:
330 I : Matches integers which are valid shift amounts for scaled indexing.
331 These are 0, 1, 2, 3 for byte, word, double, and quadword.
332 Used for matching arithmetic shifts only on 32032 & 32332.
333 J : Matches integers which fit a "quick" operand.
334 K : Matches integers 0 to 7 (for inss and exts instructions).
337 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
338 ((VALUE) < 8 && (VALUE) + 8 >= 0 ? \
339 ((C) == 'I' ? (!TARGET_32532 && 0 <= (VALUE) && (VALUE) <= 3) : \
340 (C) == 'J' ? (VALUE) <= 7 : \
341 (C) == 'K' ? 0 <= (VALUE) : 0) : 0)
343 /* Similar, but for floating constants, and defining letters G and H.
344 Here VALUE is the CONST_DOUBLE rtx itself. */
346 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
348 /* Given an rtx X being reloaded into a reg required to be
349 in class CLASS, return the class of reg to actually use.
350 In general this is just CLASS; but on some machines
351 in some cases it is preferable to use a more restrictive class. */
353 /* We return GENERAL_REGS instead of GEN_AND_MEM_REGS.
354 The latter offers no real additional possibilities
355 and can cause spurious secondary reloading. */
356 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
357 ((CLASS) == GEN_AND_MEM_REGS ? GENERAL_REGS : (CLASS))
359 /* Return the maximum number of consecutive registers
360 needed to represent mode MODE in a register of class CLASS. */
361 /* On the 32000, this is the size of MODE in words */
362 #define CLASS_MAX_NREGS(CLASS, MODE) \
363 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
365 /* Stack layout; function entry, exit and calling. */
367 /* Define this if pushing a word on the stack
368 makes the stack pointer a smaller address. */
369 #define STACK_GROWS_DOWNWARD
371 /* Define this if the nominal address of the stack frame
372 is at the high-address end of the local variables;
373 that is, each additional local variable allocated
374 goes at a more negative offset in the frame. */
375 #define FRAME_GROWS_DOWNWARD
377 /* Offset within stack frame to start allocating local variables at.
378 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
379 first local allocated. Otherwise, it is the offset to the BEGINNING
380 of the first local allocated. */
381 #define STARTING_FRAME_OFFSET 0
383 /* If we generate an insn to push BYTES bytes,
384 this says how many the stack pointer really advances by.
385 On the 32000, sp@- in a byte insn really pushes a BYTE. */
386 #define PUSH_ROUNDING(BYTES) (BYTES)
388 /* Offset of first parameter from the argument pointer register value. */
389 #define FIRST_PARM_OFFSET(FNDECL) 8
391 /* Value is the number of byte of arguments automatically
392 popped when returning from a subroutine call.
393 FUNTYPE is the data type of the function (as a tree),
394 or for a library call it is an identifier node for the subroutine name.
395 SIZE is the number of bytes of arguments passed on the stack.
397 On the 32000, the RET insn may be used to pop them if the number
398 of args is fixed, but if the number is variable then the caller
399 must pop them all. RET can't be used for library calls now
400 because the library is compiled with the Unix compiler.
401 Use of RET is a selectable option, since it is incompatible with
402 standard Unix calling sequences. If the option is not selected,
403 the caller must always pop the args. */
405 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \
406 ((TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \
407 && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
408 || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
409 == void_type_node))) \
412 /* Define how to find the value returned by a function.
413 VALTYPE is the data type of the value (as a tree).
414 If the precise function being called is known, FUNC is its FUNCTION_DECL;
415 otherwise, FUNC is 0. */
417 /* On the 32000 the return value is in R0,
418 or perhaps in F0 is there is fp support. */
420 #define FUNCTION_VALUE(VALTYPE, FUNC) \
421 (TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_32081 \
422 ? gen_rtx (REG, TYPE_MODE (VALTYPE), 8) \
423 : gen_rtx (REG, TYPE_MODE (VALTYPE), 0))
425 /* Define how to find the value returned by a library function
426 assuming the value has mode MODE. */
428 /* On the 32000 the return value is in R0,
429 or perhaps F0 is there is fp support. */
431 #define LIBCALL_VALUE(MODE) \
432 (((MODE) == DFmode || (MODE) == SFmode) && TARGET_32081 \
433 ? gen_rtx (REG, MODE, 8) \
434 : gen_rtx (REG, MODE, 0))
436 /* Define this if PCC uses the nonreentrant convention for returning
437 structure and union values. */
439 #define PCC_STATIC_STRUCT_RETURN
441 /* 1 if N is a possible register number for a function value.
442 On the 32000, R0 and F0 are the only registers thus used. */
444 #define FUNCTION_VALUE_REGNO_P(N) (((N) & ~8) == 0)
446 /* 1 if N is a possible register number for function argument passing.
447 On the 32000, no registers are used in this way. */
449 #define FUNCTION_ARG_REGNO_P(N) 0
451 /* Define a data type for recording info about an argument list
452 during the scan of that argument list. This data type should
453 hold all necessary information about the function itself
454 and about the args processed so far, enough to enable macros
455 such as FUNCTION_ARG to determine where the next arg should go.
457 On the ns32k, this is a single integer, which is a number of bytes
458 of arguments scanned so far. */
460 #define CUMULATIVE_ARGS int
462 /* Initialize a variable CUM of type CUMULATIVE_ARGS
463 for a call to a function whose data type is FNTYPE.
464 For a library call, FNTYPE is 0.
466 On the ns32k, the offset starts at 0. */
468 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
471 /* Update the data in CUM to advance over an argument
472 of mode MODE and data type TYPE.
473 (TYPE is null for libcalls where that information may not be available.) */
475 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
476 ((CUM) += ((MODE) != BLKmode \
477 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
478 : (int_size_in_bytes (TYPE) + 3) & ~3))
480 /* Define where to put the arguments to a function.
481 Value is zero to push the argument on the stack,
482 or a hard register in which to store the argument.
484 MODE is the argument's machine mode.
485 TYPE is the data type of the argument (as a tree).
486 This is null for libcalls where that information may
488 CUM is a variable of type CUMULATIVE_ARGS which gives info about
489 the preceding args and about the function being called.
490 NAMED is nonzero if this argument is a named parameter
491 (otherwise it is an extra parameter matching an ellipsis). */
493 /* On the 32000 all args are pushed, except if -mregparm is specified
494 then the first two words of arguments are passed in r0, r1.
495 *NOTE* -mregparm does not work.
496 It exists only to test register calling conventions. */
498 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
499 ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
501 /* For an arg passed partly in registers and partly in memory,
502 this is the number of registers used.
503 For args passed entirely in registers or entirely in memory, zero. */
505 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
506 ((TARGET_REGPARM && (CUM) < 8 \
507 && 8 < ((CUM) + ((MODE) == BLKmode \
508 ? int_size_in_bytes (TYPE) \
509 : GET_MODE_SIZE (MODE)))) \
512 #ifndef MAIN_FUNCTION_PROLOGUE
513 #define MAIN_FUNCTION_PROLOGUE
517 * The function prologue for the ns32k is fairly simple.
518 * If a frame pointer is needed (decided in reload.c ?) then
519 * we need assembler of the form
521 * # Save the oldframe pointer, set the new frame pointer, make space
522 * # on the stack and save any general purpose registers necessary
524 * enter [<general purpose regs to save>], <local stack space>
526 * movf fn, tos # Save any floating point registers necessary
530 * If a frame pointer is not needed we need assembler of the form
532 * # Make space on the stack
534 * adjspd <local stack space + 4>
536 * # Save any general purpose registers necessary
538 * save [<general purpose regs to save>]
540 * movf fn, tos # Save any floating point registers necessary
544 #if defined(IMMEDIATE_PREFIX) && IMMEDIATE_PREFIX
545 #define ADJSP(FILE, n) \
546 fprintf (FILE, "\tadjspd %c%d\n", IMMEDIATE_PREFIX, (n))
548 #define ADJSP(FILE, n) \
549 fprintf (FILE, "\tadjspd %d\n", (n))
552 #define FUNCTION_PROLOGUE(FILE, SIZE) \
553 { register int regno, g_regs_used = 0; \
554 int used_regs_buf[8], *bufp = used_regs_buf; \
555 int used_fregs_buf[8], *fbufp = used_fregs_buf; \
556 extern char call_used_regs[]; \
557 extern int current_function_uses_pic_offset_table, flag_pic; \
558 MAIN_FUNCTION_PROLOGUE; \
559 for (regno = 0; regno < 8; regno++) \
560 if (regs_ever_live[regno] \
561 && ! call_used_regs[regno]) \
563 *bufp++ = regno; g_regs_used++; \
566 for (; regno < 16; regno++) \
567 if (regs_ever_live[regno] && !call_used_regs[regno]) \
572 bufp = used_regs_buf; \
573 if (frame_pointer_needed) \
574 fprintf (FILE, "\tenter ["); \
578 ADJSP (FILE, SIZE + 4); \
579 if (g_regs_used && g_regs_used > 4) \
580 fprintf (FILE, "\tsave ["); \
584 fprintf (FILE, "\tmovd r%d,tos\n", *bufp++); \
590 fprintf (FILE, "r%d", *bufp++); \
594 if (frame_pointer_needed) \
595 fprintf (FILE, "],%d\n", SIZE); \
596 else if (g_regs_used) \
597 fprintf (FILE, "]\n"); \
598 fbufp = used_fregs_buf; \
599 while (*fbufp >= 0) \
601 if ((*fbufp & 1) || (fbufp[0] != fbufp[1] - 1)) \
602 fprintf (FILE, "\tmovf f%d,tos\n", *fbufp++ - 8); \
605 fprintf (FILE, "\tmovl f%d,tos\n", fbufp[0] - 8); \
609 if (flag_pic && current_function_uses_pic_offset_table) \
611 fprintf (FILE, "\tsprd sb,tos\n"); \
612 if (TARGET_REGPARM) \
614 fprintf (FILE, "\taddr __GLOBAL_OFFSET_TABLE_(pc),tos\n"); \
615 fprintf (FILE, "\tlprd sb,tos\n"); \
619 fprintf (FILE, "\taddr __GLOBAL_OFFSET_TABLE_(pc),r0\n"); \
620 fprintf (FILE, "\tlprd sb,r0\n"); \
625 /* Output assembler code to FILE to increment profiler label # LABELNO
626 for profiling a function entry.
628 THIS DEFINITION FOR THE 32000 IS A GUESS. IT HAS NOT BEEN TESTED. */
630 #define FUNCTION_PROFILER(FILE, LABELNO) \
631 fprintf (FILE, "\taddr LP%d,r0\n\tbsr mcount\n", (LABELNO))
633 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
634 the stack pointer does not matter. The value is tested only in
635 functions that have frame pointers.
636 No definition is equivalent to always zero.
638 We use 0, because using 1 requires hair in FUNCTION_EPILOGUE
639 that is worse than the stack adjust we could save. */
641 /* #define EXIT_IGNORE_STACK 1 */
643 /* This macro generates the assembly code for function exit,
644 on machines that need it. If FUNCTION_EPILOGUE is not defined
645 then individual return instructions are generated for each
646 return statement. Args are same as for FUNCTION_PROLOGUE.
648 The function epilogue should not depend on the current stack pointer,
649 if EXIT_IGNORE_STACK is nonzero. That doesn't apply here.
651 If a frame pointer is needed (decided in reload.c ?) then
652 we need assembler of the form
654 movf tos, fn # Restore any saved floating point registers
658 # Restore any saved general purpose registers, restore the stack
659 # pointer from the frame pointer, restore the old frame pointer.
660 exit [<general purpose regs to save>]
662 If a frame pointer is not needed we need assembler of the form
663 # Restore any general purpose registers saved
665 movf tos, fn # Restore any saved floating point registers
669 restore [<general purpose regs to save>]
671 # reclaim space allocated on stack
673 adjspd <-(local stack space + 4)> */
676 #define FUNCTION_EPILOGUE(FILE, SIZE) \
677 { register int regno, g_regs_used = 0, f_regs_used = 0; \
678 int used_regs_buf[8], *bufp = used_regs_buf; \
679 int used_fregs_buf[8], *fbufp = used_fregs_buf; \
680 extern char call_used_regs[]; \
681 extern int current_function_uses_pic_offset_table, flag_pic; \
682 if (flag_pic && current_function_uses_pic_offset_table) \
683 fprintf (FILE, "\tlprd sb,tos\n"); \
685 for (regno = 8; regno < 16; regno++) \
686 if (regs_ever_live[regno] && !call_used_regs[regno]) \
688 *fbufp++ = regno; f_regs_used++; \
691 for (regno = 0; regno < 8; regno++) \
692 if (regs_ever_live[regno] \
693 && ! call_used_regs[regno]) \
695 *bufp++ = regno; g_regs_used++; \
697 while (fbufp > used_fregs_buf) \
699 if ((*fbufp & 1) && fbufp[0] == fbufp[-1] + 1) \
701 fprintf (FILE, "\tmovl tos,f%d\n", fbufp[-1] - 8); \
704 else fprintf (FILE, "\tmovf tos,f%d\n", *fbufp-- - 8); \
706 if (frame_pointer_needed) \
707 fprintf (FILE, "\texit ["); \
710 if (g_regs_used && g_regs_used > 4) \
711 fprintf (FILE, "\trestore ["); \
714 while (bufp > used_regs_buf) \
715 fprintf (FILE, "\tmovd tos,r%d\n", *--bufp); \
719 while (bufp > used_regs_buf) \
721 fprintf (FILE, "r%d", *--bufp); \
722 if (bufp > used_regs_buf) \
725 if (g_regs_used || frame_pointer_needed) \
726 fprintf (FILE, "]\n"); \
727 if (SIZE && !frame_pointer_needed) \
728 ADJSP (FILE, -(SIZE + 4)); \
729 if (current_function_pops_args) \
730 fprintf (FILE, "\tret %d\n", current_function_pops_args); \
731 else fprintf (FILE, "\tret 0\n"); }
733 /* Store in the variable DEPTH the initial difference between the
734 frame pointer reg contents and the stack pointer reg contents,
735 as of the start of the function body. This depends on the layout
736 of the fixed parts of the stack frame and on how registers are saved. */
738 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
742 extern int current_function_uses_pic_offset_table, flag_pic; \
743 for (regno = 0; regno < 16; regno++) \
744 if (regs_ever_live[regno] && ! call_used_regs[regno]) \
746 if (flag_pic && current_function_uses_pic_offset_table) \
748 (DEPTH) = (offset + get_frame_size () \
749 + (get_frame_size () == 0 ? 0 : 4)); \
753 /* Output assembler code for a block containing the constant parts
754 of a trampoline, leaving space for the variable parts. */
756 /* On the 32k, the trampoline looks like this:
761 Doing trampolines with a library assist function is easier than figuring
762 out how to do stores to memory in reverse byte order (the way immediate
763 operands on the 32k are stored). */
765 #define TRAMPOLINE_TEMPLATE(FILE) \
767 fprintf (FILE, "\taddr .,r2\n" ); \
768 fprintf (FILE, "\tjump " ); \
769 PUT_ABSOLUTE_PREFIX (FILE); \
770 fprintf (FILE, "__trampoline\n" ); \
771 ASM_OUTPUT_INT (FILE, const0_rtx); \
772 ASM_OUTPUT_INT (FILE, const0_rtx); \
775 /* Length in units of the trampoline for entering a nested function. */
777 #define TRAMPOLINE_SIZE 20
779 /* Emit RTL insns to initialize the variable parts of a trampoline.
780 FNADDR is an RTX for the address of the function's pure code.
781 CXT is an RTX for the static chain value for the function. */
783 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
785 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), CXT); \
786 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 16)), FNADDR); \
789 /* This is the library routine that is used
790 to transfer control from the trampoline
791 to the actual nested function. */
793 /* The function name __transfer_from_trampoline is not actually used.
794 The function definition just permits use of "asm with operands"
795 (though the operand list is empty). */
796 #define TRANSFER_FROM_TRAMPOLINE \
798 __transfer_from_trampoline () \
800 asm ("___trampoline:"); \
801 asm ("movd 16(r2),tos"); \
802 asm ("movd 12(r2),r2"); \
806 /* Addressing modes, and classification of registers for them. */
808 /* #define HAVE_POST_INCREMENT */
809 /* #define HAVE_POST_DECREMENT */
811 /* #define HAVE_PRE_DECREMENT */
812 /* #define HAVE_PRE_INCREMENT */
814 /* Macros to check register numbers against specific register classes. */
816 /* These assume that REGNO is a hard or pseudo reg number.
817 They give nonzero only if REGNO is a hard reg of the suitable class
818 or a pseudo reg currently allocated to a suitable hard reg.
819 Since they use reg_renumber, they are safe only once reg_renumber
820 has been allocated, which happens in local-alloc.c. */
822 /* note that FP and SP cannot be used as an index. What about PC? */
823 #define REGNO_OK_FOR_INDEX_P(REGNO) \
824 ((REGNO) < 8 || (unsigned)reg_renumber[REGNO] < 8)
825 #define REGNO_OK_FOR_BASE_P(REGNO) \
826 ((REGNO) < 8 || (unsigned)reg_renumber[REGNO] < 8 \
827 || (REGNO) == FRAME_POINTER_REGNUM || (REGNO) == STACK_POINTER_REGNUM)
829 #define FP_REG_P(X) (GET_CODE (X) == REG && REGNO (X) > 7 && REGNO (X) < 16)
831 /* Maximum number of registers that can appear in a valid memory address. */
833 #define MAX_REGS_PER_ADDRESS 2
835 /* Recognize any constant value that is a valid address.
836 This might not work on future ns32k processors as negative
837 displacements are not officially allowed but a mode reserved
838 to National. This works on processors up to 32532, though. */
840 #define CONSTANT_ADDRESS_P(X) \
841 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
842 || GET_CODE (X) == CONST \
843 || (GET_CODE (X) == CONST_INT \
844 && ((unsigned)INTVAL (X) >= 0xe0000000 \
845 || (unsigned)INTVAL (X) < 0x20000000)))
847 #define CONSTANT_ADDRESS_NO_LABEL_P(X) \
848 (GET_CODE (X) == CONST_INT \
849 && ((unsigned)INTVAL (X) >= 0xe0000000 \
850 || (unsigned)INTVAL (X) < 0x20000000))
852 /* Return the register class of a scratch register needed to copy IN into
853 or out of a register in CLASS in MODE. If it can be done directly,
854 NO_REGS is returned. */
856 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
857 secondary_reload_class (CLASS, MODE, IN)
859 /* Nonzero if the constant value X is a legitimate general operand.
860 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
862 #define LEGITIMATE_CONSTANT_P(X) 1
864 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
865 and check its validity for a certain class.
866 We have two alternate definitions for each of them.
867 The usual definition accepts all pseudo regs; the other rejects
868 them unless they have been allocated suitable hard regs.
869 The symbol REG_OK_STRICT causes the latter definition to be used.
871 Most source files want to accept pseudo regs in the hope that
872 they will get allocated to the class that the insn wants them to be in.
873 Source files for reload pass need to be strict.
874 After reload, it makes no difference, since pseudo regs have
875 been eliminated by then. */
877 #ifndef REG_OK_STRICT
879 /* Nonzero if X is a hard reg that can be used as an index
880 or if it is a pseudo reg. */
881 #define REG_OK_FOR_INDEX_P(X) \
882 (REGNO (X) < 8 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
883 /* Nonzero if X is a hard reg that can be used as a base reg
884 of if it is a pseudo reg. */
885 #define REG_OK_FOR_BASE_P(X) (REGNO (X) < 8 || REGNO (X) >= FRAME_POINTER_REGNUM)
886 /* Nonzero if X is a floating point reg or a pseudo reg. */
890 /* Nonzero if X is a hard reg that can be used as an index. */
891 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
892 /* Nonzero if X is a hard reg that can be used as a base reg. */
893 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
897 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
898 that is a valid memory address for an instruction.
899 The MODE argument is the machine mode for the MEM expression
900 that wants to use this address.
902 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
904 /* 1 if X is an address that we could indirect through. */
905 /***** NOTE ***** There is a bug in the Sequent assembler which fails
906 to fixup addressing information for symbols used as offsets
907 from registers which are not FP or SP (or SB or PC). This
908 makes _x(fp) valid, while _x(r0) is invalid. */
910 #define INDIRECTABLE_1_ADDRESS_P(X) \
911 (CONSTANT_ADDRESS_P (X) \
912 || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
913 || (GET_CODE (X) == PLUS \
914 && GET_CODE (XEXP (X, 0)) == REG \
915 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
916 && ((flag_pic || TARGET_HIMEM) ? \
917 CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1)) \
919 CONSTANT_ADDRESS_P (XEXP (X, 1))) \
920 && (GET_CODE (X) != CONST_INT || NS32K_DISPLACEMENT_P (INTVAL (X)))))
922 /* 1 if integer I will fit in a 4 byte displacement field.
923 Strictly speaking, we can't be sure that a symbol will fit this range.
924 But, in practice, it always will. */
926 /* idall@eleceng.adelaide.edu.au says that the 32016 and 32032
927 can handle the full range of displacements--it is only the addresses
928 that have a limited range. So the following was deleted:
929 (((i) <= 16777215 && (i) >= -16777216)
930 || ((TARGET_32532 || TARGET_32332) && ...)) */
931 #define NS32K_DISPLACEMENT_P(i) \
932 ((i) < (1 << 29) && (i) >= - (1 << 29))
934 /* Check for frame pointer or stack pointer. */
936 (GET_CODE (X) == REG && (REGNO (X) ^ 16) < 2)
938 /* A memory ref whose address is the FP or SP, with optional integer offset,
939 or (on certain machines) a constant address. */
940 #define INDIRECTABLE_2_ADDRESS_P(X) \
941 (GET_CODE (X) == MEM \
942 && (((xfoo0 = XEXP (X, 0), MEM_REG (xfoo0)) \
943 || (GET_CODE (xfoo0) == PLUS \
944 && MEM_REG (XEXP (xfoo0, 0)) \
945 && CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfoo0, 1)))) \
946 || (TARGET_SB && CONSTANT_ADDRESS_P (xfoo0))))
948 /* Go to ADDR if X is a valid address not using indexing.
949 (This much is the easy part.) */
950 #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
951 { register rtx xfoob = (X); \
952 if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; \
953 if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR; \
954 if (GET_CODE (X) == PLUS) \
955 if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1))) \
956 if (INDIRECTABLE_2_ADDRESS_P (XEXP (X, 0))) \
960 /* Go to ADDR if X is a valid address not using indexing.
961 (This much is the easy part.) */
962 #define GO_IF_INDEXING(X, MODE, ADDR) \
963 { register rtx xfoob = (X); \
964 if (GET_CODE (xfoob) == PLUS && INDEX_TERM_P (XEXP (xfoob, 0), MODE)) \
965 GO_IF_INDEXABLE_ADDRESS (XEXP (xfoob, 1), ADDR); \
966 if (GET_CODE (xfoob) == PLUS && INDEX_TERM_P (XEXP (xfoob, 1), MODE)) \
967 GO_IF_INDEXABLE_ADDRESS (XEXP (xfoob, 0), ADDR); } \
969 #define GO_IF_INDEXABLE_ADDRESS(X, ADDR) \
970 { if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR; \
971 if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR; \
972 if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; \
975 /* 1 if PROD is either a reg times size of mode MODE
976 or just a reg, if MODE is just one byte. Actually, on the ns32k,
977 since the index mode is independent of the operand size,
978 we can match more stuff...
980 This macro's expansion uses the temporary variables xfoo0, xfoo1
981 and xfoo2 that must be declared in the surrounding context. */
982 #define INDEX_TERM_P(PROD, MODE) \
983 ((GET_CODE (PROD) == REG && REG_OK_FOR_INDEX_P (PROD)) \
984 || (GET_CODE (PROD) == MULT \
985 && (xfoo0 = XEXP (PROD, 0), xfoo1 = XEXP (PROD, 1), \
986 (GET_CODE (xfoo1) == CONST_INT \
987 && GET_CODE (xfoo0) == REG \
988 && FITS_INDEX_RANGE (INTVAL (xfoo1)) \
989 && REG_OK_FOR_INDEX_P (xfoo0)))))
991 #define FITS_INDEX_RANGE(X) \
992 ((xfoo2 = (unsigned)(X)-1), \
993 ((xfoo2 < 4 && xfoo2 != 2) || xfoo2 == 7))
995 /* Note that xfoo0, xfoo1, xfoo2 are used in some of the submacros above. */
996 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
997 { register rtx xfooy, xfoo0, xfoo1; \
999 extern int current_function_uses_pic_offset_table, flag_pic; \
1001 if (flag_pic && ! current_function_uses_pic_offset_table \
1002 && global_symbolic_reference_mentioned_p (X, 1)) \
1003 current_function_uses_pic_offset_table = 1; \
1004 GO_IF_NONINDEXED_ADDRESS (xfooy, ADDR); \
1005 if (GET_CODE (xfooy) == PLUS) \
1007 if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfooy, 1)) \
1008 && GET_CODE (XEXP (xfooy, 0)) == PLUS) \
1009 xfooy = XEXP (xfooy, 0); \
1010 else if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfooy, 0)) \
1011 && GET_CODE (XEXP (xfooy, 1)) == PLUS) \
1012 xfooy = XEXP (xfooy, 1); \
1013 GO_IF_INDEXING (xfooy, MODE, ADDR); \
1015 else if (INDEX_TERM_P (xfooy, MODE)) \
1017 else if (GET_CODE (xfooy) == PRE_DEC) \
1018 if (REGNO (XEXP (xfooy, 0)) == STACK_POINTER_REGNUM) goto ADDR; \
1022 /* Try machine-dependent ways of modifying an illegitimate address
1023 to be legitimate. If we find one, return the new, valid address.
1024 This macro is used in only one place: `memory_address' in explow.c.
1026 OLDX is the address as it was before break_out_memory_refs was called.
1027 In some cases it is useful to look at this to decide what needs to be done.
1029 MODE and WIN are passed so that this macro can use
1030 GO_IF_LEGITIMATE_ADDRESS.
1032 It is always safe for this macro to do nothing. It exists to recognize
1033 opportunities to optimize the output.
1035 For the ns32k, we do nothing */
1037 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
1039 /* Nonzero if the constant value X is a legitimate general operand
1040 when generating PIC code. It is given that flag_pic is on and
1041 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1043 extern int current_function_uses_pic_offset_table
, flag_pic
;
1044 #define LEGITIMATE_PIC_OPERAND_P(X) \
1045 (((! current_function_uses_pic_offset_table \
1046 && global_symbolic_reference_mentioned_p (X, 1))? \
1047 (current_function_uses_pic_offset_table = 1):0 \
1050 /* Define this macro if references to a symbol must be treated
1051 differently depending on something about the variable or
1052 function named by the symbol (such as what section it is in).
1054 On the ns32k, if using PIC, mark a SYMBOL_REF for a non-global
1055 symbol or a code symbol. These symbols are referenced via pc
1058 #define ENCODE_SECTION_INFO(DECL) \
1061 extern int flag_pic; \
1064 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1065 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1066 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1067 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1068 || ! TREE_PUBLIC (DECL)); \
1073 /* Go to LABEL if ADDR (a legitimate address expression)
1074 has an effect that depends on the machine mode it is used for.
1075 On the ns32k, only predecrement and postincrement address depend thus
1076 (the amount of decrement or increment being the length of the operand). */
1078 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1079 { if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \
1082 /* Specify the machine mode that this machine uses
1083 for the index in the tablejump instruction.
1084 HI mode is more efficient but the range is not wide enough for
1086 #define CASE_VECTOR_MODE SImode
1088 /* Define this if the tablejump instruction expects the table
1089 to contain offsets from the address of the table.
1090 Do not define this if the table should contain absolute addresses. */
1091 #define CASE_VECTOR_PC_RELATIVE
1093 /* Specify the tree operation to be used to convert reals to integers. */
1094 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1096 /* This is the kind of divide that is easiest to do in the general case. */
1097 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1099 /* Define this as 1 if `char' should by default be signed; else as 0. */
1100 #define DEFAULT_SIGNED_CHAR 1
1102 /* Max number of bytes we can move from memory to memory
1103 in one reasonably fast instruction. */
1106 /* Define this if zero-extension is slow (more than one real instruction). */
1107 /* #define SLOW_ZERO_EXTEND */
1109 /* Nonzero if access to memory by bytes is slow and undesirable. */
1110 #define SLOW_BYTE_ACCESS 0
1112 /* Define if shifts truncate the shift count
1113 which implies one can omit a sign-extension or zero-extension
1114 of a shift count. */
1115 /* #define SHIFT_COUNT_TRUNCATED */
1117 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1118 is done just by pretending it is already truncated. */
1119 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1121 /* We assume that the store-condition-codes instructions store 0 for false
1122 and some other value for true. This is the value stored for true. */
1124 #define STORE_FLAG_VALUE 1
1126 /* Specify the machine mode that pointers have.
1127 After generation of rtl, the compiler makes no further distinction
1128 between pointers and any other objects of this machine mode. */
1129 #define Pmode SImode
1131 /* A function address in a call instruction
1132 is a byte address (for indexing purposes)
1133 so give the MEM rtx a byte's mode. */
1134 #define FUNCTION_MODE QImode
1136 /* Compute the cost of address ADDRESS. */
1138 #define ADDRESS_COST(RTX) calc_address_cost (RTX)
1140 /* Compute the cost of computing a constant rtl expression RTX
1141 whose rtx-code is CODE. The body of this macro is a portion
1142 of a switch statement. If the code is computed here,
1143 return it with a return statement. Otherwise, break from the switch. */
1145 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1147 if (INTVAL (RTX) <= 7 && INTVAL (RTX) >= -8) return 0; \
1148 if (INTVAL (RTX) < 0x2000 && INTVAL (RTX) >= -0x2000) \
1154 case CONST_DOUBLE: \
1157 /* Tell final.c how to eliminate redundant test instructions. */
1159 /* Here we define machine-dependent flags and fields in cc_status
1160 (see `conditions.h'). */
1162 /* This bit means that what ought to be in the Z bit
1163 should be tested in the F bit. */
1164 #define CC_Z_IN_F 04000
1166 /* This bit means that what ought to be in the Z bit
1167 is complemented in the F bit. */
1168 #define CC_Z_IN_NOT_F 010000
1170 /* Store in cc_status the expressions
1171 that the condition codes will describe
1172 after execution of an instruction whose pattern is EXP.
1173 Do not alter them if the instruction would not alter the cc's. */
1175 #define NOTICE_UPDATE_CC(EXP, INSN) \
1176 { if (GET_CODE (EXP) == SET) \
1177 { if (GET_CODE (SET_DEST (EXP)) == CC0) \
1178 { cc_status.flags = 0; \
1179 cc_status.value1 = SET_DEST (EXP); \
1180 cc_status.value2 = SET_SRC (EXP); \
1182 else if (GET_CODE (SET_SRC (EXP)) == CALL) \
1183 { CC_STATUS_INIT; } \
1184 else if (GET_CODE (SET_DEST (EXP)) == REG) \
1185 { if (cc_status.value1 \
1186 && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value1)) \
1187 cc_status.value1 = 0; \
1188 if (cc_status.value2 \
1189 && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value2)) \
1190 cc_status.value2 = 0; \
1192 else if (GET_CODE (SET_DEST (EXP)) == MEM) \
1193 { CC_STATUS_INIT; } \
1195 else if (GET_CODE (EXP) == PARALLEL \
1196 && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
1197 { if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == CC0) \
1198 { cc_status.flags = 0; \
1199 cc_status.value1 = SET_DEST (XVECEXP (EXP, 0, 0)); \
1200 cc_status.value2 = SET_SRC (XVECEXP (EXP, 0, 0)); \
1202 else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == REG) \
1203 { if (cc_status.value1 \
1204 && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value1)) \
1205 cc_status.value1 = 0; \
1206 if (cc_status.value2 \
1207 && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value2)) \
1208 cc_status.value2 = 0; \
1210 else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == MEM) \
1211 { CC_STATUS_INIT; } \
1213 else if (GET_CODE (EXP) == CALL) \
1214 { /* all bets are off */ CC_STATUS_INIT; } \
1215 else { /* nothing happens? CC_STATUS_INIT; */} \
1216 if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \
1217 && cc_status.value2 \
1218 && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \
1222 /* Describe the costs of the following register moves which are discouraged:
1223 1.) Moves between the Floating point registers and the frame pointer and stack pointer
1224 2.) Moves between the stack pointer and the frame pointer
1225 3.) Moves between the floating point and general registers */
1227 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1228 ((((CLASS1) == FLOAT_REGS && ((CLASS2) == STACK_POINTER_REG || (CLASS2) == FRAME_POINTER_REG)) \
1229 || ((CLASS2) == FLOAT_REGS && ((CLASS1) == STACK_POINTER_REG || (CLASS1) == FRAME_POINTER_REG)) \
1230 || ((CLASS1) == STACK_POINTER_REG && (CLASS2) == FRAME_POINTER_REG) \
1231 || ((CLASS2) == STACK_POINTER_REG && (CLASS1) == FRAME_POINTER_REG) \
1232 || ((CLASS1) == FLOAT_REGS && (CLASS2) == GENERAL_REGS) \
1233 || ((CLASS1) == GENERAL_REGS && (CLASS2) == FLOAT_REGS)) \
1236 #define OUTPUT_JUMP(NORMAL, NO_OV) \
1237 { if (cc_status.flags & CC_NO_OVERFLOW) \
1241 /* Dividing the output into sections */
1243 /* Output before read-only data. */
1245 #define TEXT_SECTION_ASM_OP ".text"
1247 /* Output before writable data. */
1249 #define DATA_SECTION_ASM_OP ".data"
1251 /* Define the output Assembly Language */
1253 /* Output at beginning of assembler file. */
1255 #define ASM_FILE_START(FILE) fprintf (FILE, "#NO_APP\n");
1257 /* Output to assembler file text saying following lines
1258 may contain character constants, extra white space, comments, etc. */
1260 #define ASM_APP_ON "#APP\n"
1262 /* Output to assembler file text saying following lines
1263 no longer contain unusual constructs. */
1265 #define ASM_APP_OFF "#NO_APP\n"
1267 /* Output of Data */
1269 /* This is how to output an assembler line defining a `double' constant. */
1271 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1272 fprintf (FILE, "\t.double 0d%.20e\n", (VALUE))
1274 /* This is how to output an assembler line defining a `float' constant. */
1276 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1277 fprintf (FILE, "\t.float 0f%.20e\n", (VALUE))
1279 /* This is how to output an assembler line defining an `int' constant. */
1281 #define ASM_OUTPUT_INT(FILE,VALUE) \
1282 ( fprintf (FILE, "\t.long "), \
1283 output_addr_const (FILE, (VALUE)), \
1284 fprintf (FILE, "\n"))
1286 /* Likewise for `char' and `short' constants. */
1288 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1289 ( fprintf (FILE, "\t.word "), \
1290 output_addr_const (FILE, (VALUE)), \
1291 fprintf (FILE, "\n"))
1293 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1294 ( fprintf (FILE, "\t.byte "), \
1295 output_addr_const (FILE, (VALUE)), \
1296 fprintf (FILE, "\n"))
1298 /* This is how to output an assembler line for a numeric constant byte. */
1300 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1301 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1303 /* This is how to output an assembler line defining an external/static
1304 address which is not in tree format (for collect.c). */
1306 #define ASM_OUTPUT_LABELREF_AS_INT(STREAM, NAME) \
1308 fprintf (STREAM, "\t.long\t"); \
1309 ASM_OUTPUT_LABELREF (STREAM, NAME); \
1310 fprintf (STREAM, "\n"); \
1313 /* This is how to output an insn to push a register on the stack.
1314 It need not be very fast code. */
1316 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1317 fprintf (FILE, "\tmovd %s,tos\n", reg_names[REGNO])
1319 /* This is how to output an insn to pop a register from the stack.
1320 It need not be very fast code. */
1322 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1323 fprintf (FILE, "\tmovd tos,%s\n", reg_names[REGNO])
1325 /* How to refer to registers in assembler output.
1326 This sequence is indexed by compiler's hard-register-number (see above). */
1328 #define REGISTER_NAMES \
1329 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1330 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
1333 /* How to renumber registers for dbx and gdb.
1334 NS32000 may need more change in the numeration. */
1336 #define DBX_REGISTER_NUMBER(REGNO) ((REGNO < 8) ? (REGNO)+4 : (REGNO))
1338 /* This is how to output the definition of a user-level label named NAME,
1339 such as the label on a static function or variable NAME. */
1342 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1343 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1345 #define ASM_OUTPUT_LABEL(STREAM,NAME) \
1347 fprintf (STREAM, "%s:\n", NAME); \
1351 /* This is how to output a command to make the user-level label named NAME
1352 defined for reference from other files. */
1355 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1356 do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1358 #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
1360 fprintf (STREAM, "\t.globl\t%s\n", NAME); \
1364 /* This is how to output a reference to a user-level label named NAME.
1365 `assemble_name' uses this. */
1367 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1368 fprintf (FILE, "_%s", NAME)
1370 /* This is how to output an internal numbered label where
1371 PREFIX is the class of label and NUM is the number within the class. */
1373 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1374 fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1376 /* This is how to store into the string LABEL
1377 the symbol_ref name of an internal numbered label where
1378 PREFIX is the class of label and NUM is the number within the class.
1379 This is suitable for output with `assemble_name'. */
1381 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1382 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1384 /* This is how to align the code that follows an unconditional branch.
1385 Note that 0xa2 is a no-op. */
1387 #define ASM_OUTPUT_ALIGN_CODE(FILE) \
1388 fprintf (FILE, "\t.align 2,0xa2\n")
1390 /* This is how to output an element of a case-vector that is absolute.
1391 (The ns32k does not use such vectors,
1392 but we must define this macro anyway.) */
1394 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1395 fprintf (FILE, "\t.long L%d\n", VALUE)
1397 /* This is how to output an element of a case-vector that is relative. */
1398 /* ** Notice that the second element is LI format! */
1399 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1400 fprintf (FILE, "\t.long L%d-LI%d\n", VALUE, REL)
1402 /* This is how to output an assembler line
1403 that says to advance the location counter
1404 to a multiple of 2**LOG bytes. */
1406 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1407 fprintf (FILE, "\t.align %d\n", (LOG))
1409 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1410 fprintf (FILE, "\t.space %u\n", (SIZE))
1412 /* This says how to output an assembler line
1413 to define a global common symbol. */
1415 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1416 ( fputs (".comm ", (FILE)), \
1417 assemble_name ((FILE), (NAME)), \
1418 fprintf ((FILE), ",%u\n", (ROUNDED)))
1420 /* This says how to output an assembler line
1421 to define a local common symbol. */
1423 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1424 ( fputs (".lcomm ", (FILE)), \
1425 assemble_name ((FILE), (NAME)), \
1426 fprintf ((FILE), ",%u\n", (ROUNDED)))
1428 /* Store in OUTPUT a string (made with alloca) containing
1429 an assembler-name for a local static variable named NAME.
1430 LABELNO is an integer which is different for each call. */
1432 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1433 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1434 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1436 /* Define the parentheses used to group arithmetic operations
1437 in assembler code. */
1439 #define ASM_OPEN_PAREN "("
1440 #define ASM_CLOSE_PAREN ")"
1442 /* Define results of standard character escape sequences. */
1443 #define TARGET_BELL 007
1444 #define TARGET_BS 010
1445 #define TARGET_TAB 011
1446 #define TARGET_NEWLINE 012
1447 #define TARGET_VT 013
1448 #define TARGET_FF 014
1449 #define TARGET_CR 015
1451 /* Print an instruction operand X on file FILE.
1452 CODE is the code from the %-spec that requested printing this operand;
1453 if `%z3' was used to print operand 3, then CODE is 'z'. */
1455 /* %$ means print the prefix for an immediate operand. */
1457 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1458 ((CODE) == '$' || (CODE) == '?')
1460 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE)
1462 /* Print a memory operand whose address is X, on file FILE. */
1464 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address(FILE, ADDR)
1466 /* Define functions in ns32k.c and used in insn-output.c. */
1468 extern char *output_move_double ();
1469 extern char *output_shift_insn ();
1470 extern char *output_move_dconst ();