1 /* Definitions of target machine for GNU compiler. MIPS version.
2 Contributed by A. Lichnewsky, lich@inria.inria.fr
3 Changed by Michael Meissner, meissner@osf.org
4 Copyright (C) 1989, 1990, 1991, 1992 Free Software Foundation, Inc.
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
23 /* Make Saber happier on obstack.[ch]. */
24 #if defined(__mips__) || defined(mips)
25 #define __PTR_TO_INT(P) ((int)(P))
26 #define __INT_TO_PTR(P) ((char *)(P))
29 /* Standard GCC variables that we reference. */
31 extern char *asm_file_name
;
32 extern char call_used_regs
[];
33 extern int current_function_calls_alloca
;
34 extern int flag_omit_frame_pointer
;
35 extern int frame_pointer_needed
;
36 extern char *language_string
;
37 extern int may_call_alloca
;
39 extern char **save_argv
;
40 extern int target_flags
;
41 extern char *version_string
;
43 /* MIPS external variables defined in mips.c. */
47 CMP_SI
, /* compare integers */
48 CMP_SF
, /* compare single precision floats */
49 CMP_DF
, /* compare double precision floats */
50 CMP_MAX
/* max comparison type */
53 /* types of delay slot */
55 DELAY_NONE
, /* no delay slot */
56 DELAY_LOAD
, /* load from memory delay */
57 DELAY_HILO
, /* move from/to hi/lo registers */
58 DELAY_FCMP
/* delay after doing c.<xx>.{d,s} */
61 /* Which processor to schedule for. Since there is no difference between
62 a R2000 and R3000 in terms of the scheduler, we collapse them into
63 just an R3000. The elements of the enumeration must match exactly
64 the cpu attribute in the mips.md machine description. */
73 /* Recast the cpu class to be the cpu attribute. */
74 #define mips_cpu_attr ((enum attr_cpu)mips_cpu)
76 /* Which type of block move to do (whether or not the last store is
77 split out so it can fill a branch delay slot). */
79 enum block_move_type
{
80 BLOCK_MOVE_NORMAL
, /* generate complete block move */
81 BLOCK_MOVE_NOT_LAST
, /* generate all but last store */
82 BLOCK_MOVE_LAST
/* generate just the last store */
85 extern char mips_reg_names
[][8]; /* register names (a0 vs. $4). */
86 extern char mips_print_operand_punct
[]; /* print_operand punctuation chars */
87 extern char *current_function_name
; /* current function being compiled */
88 extern char *current_function_file
; /* filename current function is in */
89 extern int num_source_filenames
; /* current .file # */
90 extern int inside_function
; /* != 0 if inside of a function */
91 extern int ignore_line_number
; /* != 0 if we are to ignore next .loc */
92 extern int file_in_function_warning
; /* warning given about .file in func */
93 extern int sdb_label_count
; /* block start/end next label # */
94 extern int mips_section_threshold
; /* # bytes of data/sdata cutoff */
95 extern int g_switch_value
; /* value of the -G xx switch */
96 extern int g_switch_set
; /* whether -G xx was passed. */
97 extern int sym_lineno
; /* sgi next label # for each stmt */
98 extern int set_noreorder
; /* # of nested .set noreorder's */
99 extern int set_nomacro
; /* # of nested .set nomacro's */
100 extern int set_noat
; /* # of nested .set noat's */
101 extern int set_volatile
; /* # of nested .set volatile's */
102 extern int mips_branch_likely
; /* emit 'l' after br (branch likely) */
103 extern int mips_dbx_regno
[]; /* Map register # to debug register # */
104 extern char mips_rtx_classify
[]; /* classify an RTX code */
105 extern struct rtx_def
*branch_cmp
[2]; /* operands for compare */
106 extern enum cmp_type branch_type
; /* what type of branch to use */
107 extern enum processor_type mips_cpu
; /* which cpu are we scheduling for */
108 extern int mips_isa
; /* architectural level */
109 extern char *mips_cpu_string
; /* for -mcpu=<xxx> */
110 extern char *mips_isa_string
; /* for -mips{1,2,3} */
111 extern int dslots_load_total
; /* total # load related delay slots */
112 extern int dslots_load_filled
; /* # filled load delay slots */
113 extern int dslots_jump_total
; /* total # jump related delay slots */
114 extern int dslots_jump_filled
; /* # filled jump delay slots */
115 extern int dslots_number_nops
; /* # of nops needed by previous insn */
116 extern int num_refs
[3]; /* # 1/2/3 word references */
117 extern struct rtx_def
*mips_load_reg
; /* register to check for load delay */
118 extern struct rtx_def
*mips_load_reg2
; /* 2nd reg to check for load delay */
119 extern struct rtx_def
*mips_load_reg3
; /* 3rd reg to check for load delay */
120 extern struct rtx_def
*mips_load_reg4
; /* 4th reg to check for load delay */
122 /* Functions within mips.c that we reference. */
124 extern void abort_with_insn ();
125 extern int arith32_operand ();
126 extern int arith_operand ();
127 extern int cmp_op ();
128 extern int cmp2_op ();
129 extern long compute_frame_size ();
130 extern int epilogue_reg_mentioned_p ();
131 extern void expand_block_move ();
132 extern int equality_op ();
133 extern int fcmp_op ();
134 extern void final_prescan_insn ();
135 extern int fpsw_register_operand ();
136 extern struct rtx_def
* function_arg ();
137 extern void function_arg_advance ();
138 extern int function_arg_partial_nregs ();
139 extern void function_epilogue ();
140 extern void function_prologue ();
141 extern void gen_conditional_branch ();
142 extern struct rtx_def
* gen_int_relational ();
143 extern void init_cumulative_args ();
144 extern int large_int ();
145 extern int md_register_operand ();
146 extern int mips_address_cost ();
147 extern void mips_asm_file_end ();
148 extern void mips_asm_file_start ();
149 extern int mips_const_double_ok ();
150 extern void mips_count_memory_refs ();
151 extern int mips_debugger_offset ();
152 extern void mips_declare_object ();
153 extern int mips_epilogue_delay_slots ();
154 extern void mips_expand_epilogue ();
155 extern void mips_expand_prologue ();
156 extern char *mips_fill_delay_slot ();
157 extern char *mips_move_1word ();
158 extern char *mips_move_2words ();
159 extern void mips_output_double ();
160 extern int mips_output_external ();
161 extern void mips_output_float ();
162 extern void mips_output_filename ();
163 extern void mips_output_lineno ();
164 extern char *output_block_move ();
165 extern void override_options ();
166 extern int pc_or_label_operand ();
167 extern void print_operand_address ();
168 extern void print_operand ();
169 extern void print_options ();
170 extern int reg_or_0_operand ();
171 extern int simple_epilogue_p ();
172 extern int simple_memory_operand ();
173 extern int small_int ();
175 extern int uns_arith_operand ();
176 extern int uns_cmp_op ();
178 /* Recognition functions that return if a condition is true. */
179 extern int address_operand ();
180 extern int const_double_operand ();
181 extern int const_int_operand ();
182 extern int general_operand ();
183 extern int immediate_operand ();
184 extern int memory_address_p ();
185 extern int memory_operand ();
186 extern int nonimmediate_operand ();
187 extern int nonmemory_operand ();
188 extern int register_operand ();
189 extern int scratch_operand ();
191 /* Functions to change what output section we are using. */
192 extern void data_section ();
193 extern void rdata_section ();
194 extern void readonly_data_section ();
195 extern void sdata_section ();
196 extern void text_section ();
198 /* Functions in the rest of the compiler that we reference. */
199 extern void abort_with_insn ();
200 extern void debug_rtx ();
201 extern void fatal_io_error ();
202 extern int get_frame_size ();
203 extern int offsettable_address_p ();
204 extern void output_address ();
205 extern char *permalloc ();
206 extern int reg_mentioned_p ();
208 /* Functions in the standard library that we reference. */
209 extern void abort ();
211 extern char *getenv ();
212 extern char *mktemp ();
215 /* Stubs for half-pic support if not OSF/1 reference platform. */
218 #define HALF_PIC_P() 0
219 #define HALF_PIC_NUMBER_PTRS 0
220 #define HALF_PIC_NUMBER_REFS 0
221 #define HALF_PIC_ENCODE(DECL)
222 #define HALF_PIC_DECLARE(NAME)
223 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
224 #define HALF_PIC_ADDRESS_P(X) 0
225 #define HALF_PIC_PTR(X) X
226 #define HALF_PIC_FINISH(STREAM)
230 /* Switch Recognition by gcc.c. Add -G xx support */
232 #ifdef SWITCH_TAKES_ARG
233 #undef SWITCH_TAKES_ARG
236 #define SWITCH_TAKES_ARG(CHAR) \
237 ((CHAR) == 'D' || (CHAR) == 'U' || (CHAR) == 'o' \
238 || (CHAR) == 'e' || (CHAR) == 'T' || (CHAR) == 'u' \
239 || (CHAR) == 'I' || (CHAR) == 'm' \
240 || (CHAR) == 'L' || (CHAR) == 'A' || (CHAR) == 'G')
242 /* Sometimes certain combinations of command options do not make sense
243 on a particular target machine. You can define a macro
244 `OVERRIDE_OPTIONS' to take account of this. This macro, if
245 defined, is executed once just after all the command options have
248 On the MIPS, it is used to handle -G. We also use it to set up all
249 of the tables referenced in the other macros. */
251 #define OVERRIDE_OPTIONS override_options ()
253 /* Zero or more C statements that may conditionally modify two
254 variables `fixed_regs' and `call_used_regs' (both of type `char
255 []') after they have been initialized from the two preceding
258 This is necessary in case the fixed or call-clobbered registers
259 depend on target flags.
261 You need not define this macro if it has no work to do.
263 If the usage of an entire class of registers depends on the target
264 flags, you may indicate this to GCC by using this macro to modify
265 `fixed_regs' and `call_used_regs' to 1 for each of the registers in
266 the classes which should not be used by GCC. Also define the macro
267 `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
268 letter for a class that shouldn't be used.
270 (However, if this class is not included in `GENERAL_REGS' and all
271 of the insn patterns whose constraints permit this class are
272 controlled by target switches, then GCC will automatically avoid
273 using these registers when the target switches are opposed to
276 #define CONDITIONAL_REGISTER_USAGE \
279 if (!TARGET_HARD_FLOAT) \
283 for (regno = FP_REG_FIRST; regno <= FP_REG_LAST; regno++) \
284 fixed_regs[regno] = call_used_regs[regno] = 1; \
290 /* Some machines may desire to change what optimizations are
291 performed for various optimization levels. This macro, if
292 defined, is executed once just after the optimization level is
293 determined and before the remainder of the command options have
294 been parsed. Values set in this macro are used as the default
295 values for the other command line options.
297 LEVEL is the optimization level specified; 2 if -O2 is
298 specified, 1 if -O is specified, and 0 if neither is specified. */
300 #define OPTIMIZATION_OPTIONS(LEVEL) \
304 flag_omit_frame_pointer = TRUE; \
305 flag_schedule_insns_after_reload = TRUE; \
310 /* Complain about missing specs and predefines that should be defined in each
311 of the target tm files to override the defaults. This is mostly a place-
312 holder until I can get each of the files updated [mm]. */
314 #if defined(OSF_OS) \
315 || defined(DECSTATION) \
316 || defined(SGI_TARGET) \
317 || defined(MIPS_NEWS) \
318 || defined(MIPS_SYSV) \
319 || defined(MIPS_SVR4) \
320 || defined(MIPS_BSD43)
322 #ifndef CPP_PREDEFINES
323 #error "Define CPP_PREDEFINES in the appropriate tm.h file"
327 #error "Define CPP_SPEC in the appropriate tm.h file"
331 #error "Define LINK_SPEC in the appropriate tm.h file"
335 #error "Define LIB_SPEC in the appropriate tm.h file"
338 #ifndef STARTFILE_SPEC
339 #error "Define STARTFILE_SPEC in the appropriate tm.h file"
343 #error "Define MACHINE_TYPE in the appropriate tm.h file"
347 /* Tell collect what flags to pass to nm. */
349 #define NM_FLAGS "-Bp"
353 /* Names to predefine in the preprocessor for this target machine. */
355 #ifndef CPP_PREDEFINES
356 #define CPP_PREDEFINES "-Dmips -Dunix -Dhost_mips -DMIPSEB -DR3000 -DSYSTYPE_BSD43 \
357 -D_mips -D_unix -D_host_mips -D_MIPSEB -D_R3000 -D_SYSTYPE_BSD43"
360 /* Extra switches sometimes passed to the assembler. */
365 %{!mrnames: %{!.s:-nocpp} %{.s: %{cpp} %{nocpp}}} \
366 %{pipe: %e-pipe is not supported.} \
368 %{EL: %e-EL not supported} \
369 %{mips1} %{mips2} %{mips3} \
370 %{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3} \
371 %{g} %{g0} %{g1} %{g2} %{g3} %{v} %{K}} \
374 #endif /* ASM_SPEC */
376 /* Specify to run a post-processor, mips-tfile after the assembler
377 has run to stuff the mips debug information into the object file.
378 This is needed because the $#!%^ MIPS assembler provides no way
379 of specifying such information in the assembly file. If we are
380 cross compiling, disable mips-tfile unless the user specifies
383 #ifndef ASM_FINAL_SPEC
384 #ifndef CROSS_COMPILE
385 #define ASM_FINAL_SPEC "\
386 %{!mgas: %{!mno-mips-tfile: \
387 \n mips-tfile %{v*: -v} \
389 %{!K: %{save-temps: -I %b.o~}} \
390 %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
391 %{.s:%i} %{!.s:%g.s}}}"
393 #else /* CROSS_COMPILE */
394 #define ASM_FINAL_SPEC "\
395 %{!mgas: %{mmips-tfile: \
396 \n mips-tfile %{v*: -v} \
398 %{!K: %{save-temps: -I %b.o~}} \
399 %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
400 %{.s:%i} %{!.s:%g.s}}}"
402 #endif /* CROSS_COMPILE */
403 #endif /* ASM_FINAL_SPEC */
405 /* Redefinition of libraries used. Mips doesn't support normal
406 UNIX style profiling via calling _mcount. It does offer
407 profiling that samples the PC, so do what we can... */
410 #define LIB_SPEC "%{pg:-lprof1} %{p:-lprof1} -lc"
413 /* Extra switches sometimes passed to the linker. */
419 %{pipe: %e-pipe is not supported.} \
421 %{EL: %e-EL not supported} \
422 %{mips1} %{mips2} %{mips3} \
423 %{bestGnum} %{shared} %{non_shared}}"
424 #endif /* LINK_SPEC defined */
426 /* Specs for the compiler proper */
430 %{O*: %{!mno-gpOPT:%{!mno-gpopt: -mgpopt}}} \
431 %{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} \
433 %{pic-none: -mno-half-pic} \
434 %{pic-lib: -mhalf-pic} \
435 %{pic-extern: -mhalf-pic} \
436 %{pic-calls: -mhalf-pic} \
440 /* Preprocessor specs */
444 %{.cc: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
445 %{.cxx: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
446 %{.C: -D__LANGUAGE_C_PLUS_PLUS -D_LANGUAGE_C_PLUS_PLUS} \
447 %{.m: -D__LANGUAGE_OBJECTIVE_C -D_LANGUAGE_OBJECTIVE_C} \
448 %{.S: -D__LANGUAGE_ASSEMBLY -D_LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
449 %{!.S: -D__LANGUAGE_C -D_LANGUAGE_C %{!ansi:-DLANGUAGE_C}}"
452 /* If defined, this macro is an additional prefix to try after
453 `STANDARD_EXEC_PREFIX'. */
455 #ifndef MD_EXEC_PREFIX
456 #define MD_EXEC_PREFIX "/usr/lib/cmplrs/cc/"
459 #ifndef MD_STARTFILE_PREFIX
460 #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/"
464 /* Print subsidiary information on the compiler version in use. */
466 #define MIPS_VERSION "[AL 1.1, MM 34]"
469 #define MACHINE_TYPE "BSD Mips"
472 #ifndef TARGET_VERSION_INTERNAL
473 #define TARGET_VERSION_INTERNAL(STREAM) \
474 fprintf (STREAM, " %s %s", MIPS_VERSION, MACHINE_TYPE)
477 #ifndef TARGET_VERSION
478 #define TARGET_VERSION TARGET_VERSION_INTERNAL (stderr)
482 #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */
483 #define DBX_DEBUGGING_INFO /* generate stabs (OSF/rose) */
484 #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */
486 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
487 #define PREFERRED_DEBUGGING_TYPE ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG)
490 /* By default, turn on GDB extensions. */
491 #define DEFAULT_GDB_EXTENSIONS 1
493 /* If we are passing smuggling stabs through the MIPS ECOFF object
494 format, put a comment in front of the .stab<x> operation so
495 that the MIPS assembler does not choke. The mips-tfile program
496 will correctly put the stab into the object file. */
498 #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs")
499 #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn")
500 #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd")
502 /* Forward references to tags are allowed. */
503 #define SDB_ALLOW_FORWARD_REFERENCES
505 /* Unknown tags are also allowed. */
506 #define SDB_ALLOW_UNKNOWN_REFERENCES
508 /* On Sun 4, this limit is 2048. We use 1500 to be safe,
509 since the length can run past this up to a continuation point. */
510 #define DBX_CONTIN_LENGTH 1500
513 /* How to renumber registers for dbx and gdb. */
514 #define DBX_REGISTER_NUMBER(REGNO) mips_dbx_regno[ (REGNO) ]
517 /* Overrides for the COFF debug format. */
518 #define PUT_SDB_SCL(a) \
520 extern FILE *asm_out_text_file; \
521 fprintf (asm_out_text_file, "\t.scl\t%d;", (a)); \
524 #define PUT_SDB_INT_VAL(a) \
526 extern FILE *asm_out_text_file; \
527 fprintf (asm_out_text_file, "\t.val\t%d;", (a)); \
530 #define PUT_SDB_VAL(a) \
532 extern FILE *asm_out_text_file; \
533 fputs ("\t.val\t", asm_out_text_file); \
534 output_addr_const (asm_out_text_file, (a)); \
535 fputc (';', asm_out_text_file); \
538 #define PUT_SDB_DEF(a) \
540 extern FILE *asm_out_text_file; \
541 fprintf (asm_out_text_file, "\t#.def\t"); \
542 ASM_OUTPUT_LABELREF (asm_out_text_file, a); \
543 fputc (';', asm_out_text_file); \
546 #define PUT_SDB_PLAIN_DEF(a) \
548 extern FILE *asm_out_text_file; \
549 fprintf (asm_out_text_file, "\t#.def\t.%s;", (a)); \
552 #define PUT_SDB_ENDEF \
554 extern FILE *asm_out_text_file; \
555 fprintf (asm_out_text_file, "\t.endef\n"); \
558 #define PUT_SDB_TYPE(a) \
560 extern FILE *asm_out_text_file; \
561 fprintf (asm_out_text_file, "\t.type\t0x%x;", (a)); \
564 #define PUT_SDB_SIZE(a) \
566 extern FILE *asm_out_text_file; \
567 fprintf (asm_out_text_file, "\t.size\t%d;", (a)); \
570 #define PUT_SDB_DIM(a) \
572 extern FILE *asm_out_text_file; \
573 fprintf (asm_out_text_file, "\t.dim\t%d;", (a)); \
576 #ifndef PUT_SDB_START_DIM
577 #define PUT_SDB_START_DIM \
579 extern FILE *asm_out_text_file; \
580 fprintf (asm_out_text_file, "\t.dim\t"); \
584 #ifndef PUT_SDB_NEXT_DIM
585 #define PUT_SDB_NEXT_DIM(a) \
587 extern FILE *asm_out_text_file; \
588 fprintf (asm_out_text_file, "%d,", a); \
592 #ifndef PUT_SDB_LAST_DIM
593 #define PUT_SDB_LAST_DIM(a) \
595 extern FILE *asm_out_text_file; \
596 fprintf (asm_out_text_file, "%d;", a); \
600 #define PUT_SDB_TAG(a) \
602 extern FILE *asm_out_text_file; \
603 fprintf (asm_out_text_file, "\t.tag\t"); \
604 ASM_OUTPUT_LABELREF (asm_out_text_file, a); \
605 fputc (';', asm_out_text_file); \
608 /* For block start and end, we create labels, so that
609 later we can figure out where the correct offset is.
610 The normal .ent/.end serve well enough for functions,
611 so those are just commented out. */
613 #define PUT_SDB_BLOCK_START(LINE) \
615 extern FILE *asm_out_text_file; \
616 fprintf (asm_out_text_file, \
617 "$Lb%d:\n\t#.begin\t$Lb%d\t%d\n", \
624 #define PUT_SDB_BLOCK_END(LINE) \
626 extern FILE *asm_out_text_file; \
627 fprintf (asm_out_text_file, \
628 "$Le%d:\n\t#.bend\t$Le%d\t%d\n", \
635 #define PUT_SDB_FUNCTION_START(LINE)
637 #define PUT_SDB_FUNCTION_END(LINE)
639 #define PUT_SDB_EPILOGUE_END(NAME)
641 #define SDB_GENERATE_FAKE(BUFFER, NUMBER) \
642 sprintf ((BUFFER), ".%dfake", (NUMBER));
644 /* Correct the offset of automatic variables and arguments. Note that
645 the MIPS debug format wants all automatic variables and arguments
646 to be in terms of the virtual frame pointer (stack pointer before
647 any adjustment in the function), while the MIPS 3.0 linker wants
648 the frame pointer to be the stack pointer after the initial
651 #define DEBUGGER_AUTO_OFFSET(X) mips_debugger_offset (X, 0)
652 #define DEBUGGER_ARG_OFFSET(OFFSET, X) mips_debugger_offset (X, OFFSET)
655 /* Tell collect that the object format is ECOFF */
656 #ifndef OBJECT_FORMAT_ROSE
657 #define OBJECT_FORMAT_COFF /* Object file looks like COFF */
658 #define EXTENDED_COFF /* ECOFF, not normal coff */
661 /* Don't use the default definitions, because we don't have gld.
662 Also, we don't want stabs when generating ECOFF output.
663 Instead we depend on collect to handle these. */
665 #define ASM_OUTPUT_CONSTRUCTOR(file, name)
666 #define ASM_OUTPUT_DESTRUCTOR(file, name)
669 /* Run-time compilation parameters selecting different hardware subsets. */
671 /* Macros used in the machine description to test the flags. */
673 /* Bits for real switches */
674 #define MASK_INT64 0x00000001 /* ints are 64 bits */
675 #define MASK_LONG64 0x00000002 /* longs are 64 bits */
676 #define MASK_LLONG128 0x00000004 /* long longs are 128 bits */
677 #define MASK_GPOPT 0x00000008 /* Optimize for global pointer */
678 #define MASK_GAS 0x00000010 /* Gas used instead of MIPS as */
679 #define MASK_NAME_REGS 0x00000020 /* Use MIPS s/w reg name convention */
680 #define MASK_STATS 0x00000040 /* print statistics to stderr */
681 #define MASK_MEMCPY 0x00000080 /* call memcpy instead of inline code*/
682 #define MASK_SOFT_FLOAT 0x00000100 /* software floating point */
683 #define MASK_FLOAT64 0x00000200 /* fp registers are 64 bits */
684 #define MASK_ABICALLS 0x00000400 /* emit .abicalls/.cprestore/.cpload */
685 #define MASK_HALF_PIC 0x00000800 /* Emit OSF-style pic refs to externs*/
686 #define MASK_UNUSED1 0x00001000
687 #define MASK_UNUSED2 0x00002000
688 #define MASK_UNUSED3 0x00004000
689 #define MASK_UNUSED4 0x00008000
690 #define MASK_UNUSED5 0x00010000
691 #define MASK_UNUSED6 0x00020000
692 #define MASK_UNUSED7 0x00040000
693 #define MASK_UNUSED8 0x00080000
695 /* Dummy switches used only in spec's*/
696 #define MASK_MIPS_TFILE 0x00000000 /* flag for mips-tfile usage */
698 /* switches not used yet */
699 #define MASK_WC8 0x00000000 /* wchar's are 8 bits, not 32 */
700 #define MASK_WC16 0x00000000 /* wchar's are 16 bits, not 32 */
701 #define MASK_WC32 0x00000000 /* dummy for consistency */
703 /* Debug switches, not documented */
704 #define MASK_DEBUG 0x40000000 /* Eliminate version # in .s file */
705 #define MASK_DEBUG_A 0x20000000 /* don't allow <label>($reg) addrs */
706 #define MASK_DEBUG_B 0x10000000 /* GO_IF_LEGITIMATE_ADDRESS debug */
707 #define MASK_DEBUG_C 0x08000000 /* don't expand seq, etc. */
708 #define MASK_DEBUG_D 0x04000000 /* don't do define_split's */
709 #define MASK_DEBUG_E 0x02000000 /* function_arg debug */
710 #define MASK_DEBUG_F 0x01000000 /* don't try to suppress load nop's */
711 #define MASK_DEBUG_G 0x00800000 /* don't support 64 bit arithmetic */
712 #define MASK_DEBUG_H 0x00400000 /* allow ints in FP registers */
713 #define MASK_DEBUG_I 0x00200000 /* unused */
714 #define MASK_DEBUG_J 0x00100000 /* unused */
716 /* r4000 64 bit sizes */
717 #define TARGET_INT64 (target_flags & MASK_INT64)
718 #define TARGET_LONG64 (target_flags & MASK_LONG64)
719 #define TARGET_LLONG128 (target_flags & MASK_LLONG128)
720 #define TARGET_FLOAT64 (target_flags & MASK_FLOAT64)
722 /* Mips vs. GNU assembler */
723 #define TARGET_GAS (target_flags & MASK_GAS)
724 #define TARGET_UNIX_ASM (!TARGET_GAS)
725 #define TARGET_MIPS_AS TARGET_UNIX_ASM
728 #define TARGET_DEBUG_MODE (target_flags & MASK_DEBUG)
729 #define TARGET_DEBUG_A_MODE (target_flags & MASK_DEBUG_A)
730 #define TARGET_DEBUG_B_MODE (target_flags & MASK_DEBUG_B)
731 #define TARGET_DEBUG_C_MODE (target_flags & MASK_DEBUG_C)
732 #define TARGET_DEBUG_D_MODE (target_flags & MASK_DEBUG_D)
733 #define TARGET_DEBUG_E_MODE (target_flags & MASK_DEBUG_E)
734 #define TARGET_DEBUG_F_MODE (target_flags & MASK_DEBUG_F)
735 #define TARGET_DEBUG_G_MODE (target_flags & MASK_DEBUG_G)
736 #define TARGET_DEBUG_H_MODE (target_flags & MASK_DEBUG_H)
737 #define TARGET_DEBUG_I_MODE (target_flags & MASK_DEBUG_I)
738 #define TARGET_DEBUG_J_MODE (target_flags & MASK_DEBUG_J)
740 /* Reg. Naming in .s ($21 vs. $a0) */
741 #define TARGET_NAME_REGS (target_flags & MASK_NAME_REGS)
743 /* Optimize for Sdata/Sbss */
744 #define TARGET_GP_OPT (target_flags & MASK_GPOPT)
746 /* print program statistics */
747 #define TARGET_STATS (target_flags & MASK_STATS)
749 /* call memcpy instead of inline code */
750 #define TARGET_MEMCPY (target_flags & MASK_MEMCPY)
752 /* .abicalls, etc from Pyramid V.4 */
753 #define TARGET_ABICALLS (target_flags & MASK_ABICALLS)
755 /* OSF pic references to externs */
756 #define TARGET_HALF_PIC (target_flags & MASK_HALF_PIC)
759 #define TARGET_WC8 (target_flags & MASK_WC8)
760 #define TARGET_WC16 (target_flags & MASK_WC16)
761 #define TARGET_WC32 ((target_flags & (MASK_WC8 | MASK_WC16)) == 0)
763 /* software floating point */
764 #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
765 #define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT)
767 /* Macro to define tables used to set the flags.
768 This is a list in braces of pairs in braces,
769 each pair being { "NAME", VALUE }
770 where VALUE is the bits to set or minus the bits to clear.
771 An empty string NAME is used to identify the default VALUE. */
773 #define TARGET_SWITCHES \
775 {"int64", MASK_INT64 | MASK_LONG64}, \
776 {"long64", MASK_LONG64}, \
777 {"longlong128", MASK_INT64 | MASK_LONG64 | MASK_LLONG128}, \
778 {"mips-as", -MASK_GAS}, \
780 {"rnames", MASK_NAME_REGS}, \
781 {"no-rnames", -MASK_NAME_REGS}, \
782 {"gpOPT", MASK_GPOPT}, \
783 {"gpopt", MASK_GPOPT}, \
784 {"no-gpOPT", -MASK_GPOPT}, \
785 {"no-gpopt", -MASK_GPOPT}, \
786 {"stats", MASK_STATS}, \
787 {"no-stats", -MASK_STATS}, \
788 {"memcpy", MASK_MEMCPY}, \
789 {"no-memcpy", -MASK_MEMCPY}, \
791 {"wc16", MASK_WC16}, \
792 {"wc32", MASK_WC32}, \
793 {"mips-tfile", MASK_MIPS_TFILE}, \
794 {"no-mips-tfile", -MASK_MIPS_TFILE}, \
795 {"soft-float", MASK_SOFT_FLOAT}, \
796 {"hard-float", -MASK_SOFT_FLOAT}, \
797 {"fp64", MASK_FLOAT64}, \
798 {"fp32", -MASK_FLOAT64}, \
799 {"abicalls", MASK_ABICALLS}, \
800 {"no-abicalls", -MASK_ABICALLS}, \
801 {"half-pic", MASK_HALF_PIC}, \
802 {"no-half-pic", -MASK_HALF_PIC}, \
803 {"debug", MASK_DEBUG}, \
804 {"debuga", MASK_DEBUG_A}, \
805 {"debugb", MASK_DEBUG_B}, \
806 {"debugc", MASK_DEBUG_C}, \
807 {"debugd", MASK_DEBUG_D}, \
808 {"debuge", MASK_DEBUG_E}, \
809 {"debugf", MASK_DEBUG_F}, \
810 {"debugg", MASK_DEBUG_G}, \
811 {"debugh", MASK_DEBUG_H}, \
812 {"debugi", MASK_DEBUG_I}, \
813 {"debugj", MASK_DEBUG_J}, \
814 {"", TARGET_DEFAULT} \
817 /* Default target_flags if no switches are specified */
819 #ifndef TARGET_DEFAULT
820 #define TARGET_DEFAULT 0
823 /* This macro is similar to `TARGET_SWITCHES' but defines names of
824 command options that have values. Its definition is an
825 initializer with a subgrouping for each command option.
827 Each subgrouping contains a string constant, that defines the
828 fixed part of the option name, and the address of a variable.
829 The variable, type `char *', is set to the variable part of the
830 given option if the fixed part matches. The actual option name
831 is made by appending `-m' to the specified name.
833 Here is an example which defines `-mshort-data-NUMBER'. If the
834 given option is `-mshort-data-512', the variable `m88k_short_data'
835 will be set to the string `"512"'.
837 extern char *m88k_short_data;
838 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
840 #define TARGET_OPTIONS \
842 { "cpu=", &mips_cpu_string }, \
843 { "ips", &mips_isa_string } \
846 /* Macros to decide whether certain features are available or not,
847 depending on the instruction set architecture level. */
849 #define BRANCH_LIKELY_P() (mips_isa >= 2)
850 #define HAVE_64BIT_P() (mips_isa >= 3)
851 #define HAVE_SQRT_P() (mips_isa >= 2)
854 /* Target machine storage layout */
856 /* Define this if most significant bit is lowest numbered
857 in instructions that operate on numbered bit-fields.
859 /* #define BITS_BIG_ENDIAN */
861 /* Define this if most significant byte of a word is the lowest numbered. */
862 #ifndef BYTES_BIG_ENDIAN
864 #define BYTES_BIG_ENDIAN 1
866 #define BYTES_BIG_ENDIAN 0
870 /* Define this if most significant word of a multiword number is the lowest. */
871 #ifndef WORDS_BIG_ENDIAN
873 #define WORDS_BIG_ENDIAN 1
875 #define WORDS_BIG_ENDIAN 0
879 /* Define macros to easily access the most and least significant words
880 without a lot of #ifdef's. */
883 #define MOST_SIGNIFICANT_WORD 0
884 #define LEAST_SIGNIFICANT_WORD 1
887 #define MOST_SIGNIFICANT_WORD 1
888 #define LEAST_SIGNIFICANT_WORD 0
891 /* Number of bits in an addressable storage unit */
892 #define BITS_PER_UNIT 8
894 /* Width in bits of a "word", which is the contents of a machine register.
895 Note that this is not necessarily the width of data type `int';
896 if using 16-bit ints on a 68000, this would still be 32.
897 But on a machine with 16-bit registers, this would be 16. */
898 #define BITS_PER_WORD 32
900 /* Width of a word, in units (bytes). */
901 #define UNITS_PER_WORD 4
903 /* A C expression for the size in bits of the type `int' on the
904 target machine. If you don't define this, the default is one
906 #define INT_TYPE_SIZE 32
908 /* A C expression for the size in bits of the type `short' on the
909 target machine. If you don't define this, the default is half a
910 word. (If this would be less than one storage unit, it is
911 rounded up to one unit.) */
912 #define SHORT_TYPE_SIZE 16
914 /* A C expression for the size in bits of the type `long' on the
915 target machine. If you don't define this, the default is one
917 #define LONG_TYPE_SIZE 32
919 /* A C expression for the size in bits of the type `long long' on the
920 target machine. If you don't define this, the default is two
922 #define LONG_LONG_TYPE_SIZE 64
924 /* A C expression for the size in bits of the type `char' on the
925 target machine. If you don't define this, the default is one
926 quarter of a word. (If this would be less than one storage unit,
927 it is rounded up to one unit.) */
928 #define CHAR_TYPE_SIZE BITS_PER_UNIT
930 /* A C expression for the size in bits of the type `float' on the
931 target machine. If you don't define this, the default is one
933 #define FLOAT_TYPE_SIZE 32
935 /* A C expression for the size in bits of the type `double' on the
936 target machine. If you don't define this, the default is two
938 #define DOUBLE_TYPE_SIZE 64
940 /* A C expression for the size in bits of the type `long double' on
941 the target machine. If you don't define this, the default is two
943 #define LONG_DOUBLE_TYPE_SIZE 64
945 /* Width in bits of a pointer.
946 See also the macro `Pmode' defined below. */
947 #define POINTER_SIZE 32
949 /* Allocation boundary (in *bits*) for storing pointers in memory. */
950 #define POINTER_BOUNDARY 32
952 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
953 #define PARM_BOUNDARY 32
955 /* Allocation boundary (in *bits*) for the code of a function. */
956 #define FUNCTION_BOUNDARY 32
958 /* Alignment of field after `int : 0' in a structure. */
959 #define EMPTY_FIELD_BOUNDARY 32
961 /* Every structure's size must be a multiple of this. */
962 /* 8 is observed right on a DECstation and on riscos 4.02. */
963 #define STRUCTURE_SIZE_BOUNDARY 8
965 /* There is no point aligning anything to a rounder boundary than this. */
966 #define BIGGEST_ALIGNMENT 64
968 /* Biggest alignment any structure field can require in bits. */
969 #define BIGGEST_FIELD_ALIGNMENT 64
971 /* Set this nonzero if move instructions will actually fail to work
972 when given unaligned data. */
973 #define STRICT_ALIGNMENT 1
975 /* Define this if you wish to imitate the way many other C compilers
976 handle alignment of bitfields and the structures that contain
979 The behavior is that the type written for a bitfield (`int',
980 `short', or other integer type) imposes an alignment for the
981 entire structure, as if the structure really did contain an
982 ordinary field of that type. In addition, the bitfield is placed
983 within the structure so that it would fit within such a field,
984 not crossing a boundary for it.
986 Thus, on most machines, a bitfield whose type is written as `int'
987 would not cross a four-byte boundary, and would force four-byte
988 alignment for the whole structure. (The alignment used may not
989 be four bytes; it is controlled by the other alignment
992 If the macro is defined, its definition should be a C expression;
993 a nonzero value for the expression enables this behavior. */
995 #define PCC_BITFIELD_TYPE_MATTERS 1
997 /* If defined, a C expression to compute the alignment given to a
998 constant that is being placed in memory. CONSTANT is the constant
999 and ALIGN is the alignment that the object would ordinarily have.
1000 The value of this macro is used instead of that alignment to align
1003 If this macro is not defined, then ALIGN is used.
1005 The typical use of this macro is to increase alignment for string
1006 constants to be word aligned so that `strcpy' calls that copy
1007 constants can be done inline. */
1009 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
1010 ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \
1011 && (ALIGN) < BITS_PER_WORD \
1015 /* If defined, a C expression to compute the alignment for a static
1016 variable. TYPE is the data type, and ALIGN is the alignment that
1017 the object would ordinarily have. The value of this macro is used
1018 instead of that alignment to align the object.
1020 If this macro is not defined, then ALIGN is used.
1022 One use of this macro is to increase alignment of medium-size
1023 data to make it all fit in fewer cache lines. Another is to
1024 cause character arrays to be word-aligned so that `strcpy' calls
1025 that copy constants to character arrays can be done inline. */
1027 #undef DATA_ALIGNMENT
1028 #define DATA_ALIGNMENT(TYPE, ALIGN) \
1029 ((((ALIGN) < BITS_PER_WORD) \
1030 && (TREE_CODE (TYPE) == ARRAY_TYPE \
1031 || TREE_CODE (TYPE) == UNION_TYPE \
1032 || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
1034 /* Define this macro if an argument declared as `char' or `short' in a
1035 prototype should actually be passed as an `int'. In addition to
1036 avoiding errors in certain cases of mismatch, it also makes for
1037 better code on certain machines. */
1039 #define PROMOTE_PROTOTYPES
1041 /* Define this macro if an instruction to load a value narrower
1042 than a word from memory into a register also zero-extends the
1043 value to the whole register. */
1045 #define BYTE_LOADS_ZERO_EXTEND
1048 /* Standard register usage. */
1050 /* Number of actual hardware registers.
1051 The hardware registers are assigned numbers for the compiler
1052 from 0 to just below FIRST_PSEUDO_REGISTER.
1053 All registers that the compiler knows about must be given numbers,
1054 even those that are not normally considered general registers.
1056 On the Mips, we have 32 integer registers, 32 floating point registers
1057 and the special registers hi, lo, and fp status. */
1059 #define FIRST_PSEUDO_REGISTER 67
1061 /* 1 for registers that have pervasive standard uses
1062 and are not available for the register allocator.
1064 On the MIPS, see conventions, page D-2 */
1066 #define FIXED_REGISTERS \
1068 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1069 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, \
1070 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1071 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1076 /* 1 for registers not available across function calls.
1077 These must include the FIXED_REGISTERS and also any
1078 registers that can be used without being saved.
1079 The latter must include the registers where values are returned
1080 and the register where structure-value addresses are passed.
1081 Aside from that, you can include as many other registers as you like. */
1083 #define CALL_USED_REGISTERS \
1085 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1086 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
1087 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1088 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1093 /* Internal macros to classify a register number as to whether it's a
1094 general purpose register, a floating point register, a
1095 multiply/divide register, or a status register.
1097 The macro FP_CALL_REG_P also allows registers $4 and $6 as floating
1098 point registers to pass floating point as per MIPS spec. */
1100 #define GP_REG_FIRST 0
1101 #define GP_REG_LAST 31
1102 #define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1)
1103 #define GP_DBX_FIRST 0
1105 #define FP_REG_FIRST 32
1106 #define FP_REG_LAST 63
1107 #define FP_REG_NUM (FP_REG_LAST - FP_REG_FIRST + 1)
1108 #define FP_DBX_FIRST ((write_symbols == DBX_DEBUG) ? 38 : 32)
1110 #define MD_REG_FIRST 64
1111 #define MD_REG_LAST 65
1112 #define MD_REG_NUM (MD_REG_LAST - MD_REG_FIRST + 1)
1114 #define ST_REG_FIRST 66
1115 #define ST_REG_LAST 66
1116 #define ST_REG_NUM (ST_REG_LAST - ST_REG_FIRST + 1)
1118 #define AT_REGNUM (GP_REG_FIRST + 1)
1119 #define HI_REGNUM (MD_REG_FIRST + 0)
1120 #define LO_REGNUM (MD_REG_FIRST + 1)
1121 #define FPSW_REGNUM ST_REG_FIRST
1123 #define GP_REG_P(REGNO) ((unsigned) ((REGNO) - GP_REG_FIRST) < GP_REG_NUM)
1124 #define FP_REG_P(REGNO) ((unsigned) ((REGNO) - FP_REG_FIRST) < FP_REG_NUM)
1125 #define MD_REG_P(REGNO) ((unsigned) ((REGNO) - MD_REG_FIRST) < MD_REG_NUM)
1126 #define ST_REG_P(REGNO) ((REGNO) == ST_REG_FIRST)
1128 #define FP_CALL_REG_P(REGNO) \
1130 || (REGNO) == (4 + GP_REG_FIRST) \
1131 || (REGNO) == (6 + GP_REG_FIRST))
1133 /* Return number of consecutive hard regs needed starting at reg REGNO
1134 to hold something of mode MODE.
1135 This is ordinarily the length in words of a value of mode MODE
1136 but can be less for certain modes in special long registers.
1138 On the MIPS, all general registers are one word long. Except on
1139 the R4000 with the FR bit set, the floating point uses register
1140 pairs, with the second register not being allocatable. */
1142 #define HARD_REGNO_NREGS(REGNO, MODE) \
1143 (! FP_REG_P (REGNO) \
1144 ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \
1145 : (((GET_MODE_SIZE (MODE) + (2*UNITS_PER_WORD) - 1) / (2*UNITS_PER_WORD)) \
1146 << (TARGET_FLOAT64 == 0)))
1148 /* Value is 1 if hard register REGNO can hold a value of machine-mode
1149 MODE. Require that DImode and DFmode be in even registers. For
1150 DImode, this makes some of the insns easier to write, since you
1151 don't have to worry about a DImode value in registers 3 & 4,
1152 producing a result in 4 & 5.
1154 To make the code simpler HARD_REGNO_MODE_OK now just references an
1155 array built in override_options. Because machmodes.h is not yet
1156 included before this file is processed, the MODE bound can't be
1159 extern char mips_hard_regno_mode_ok
[][FIRST_PSEUDO_REGISTER
];
1161 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
1162 mips_hard_regno_mode_ok[ (int)(MODE) ][ (REGNO) ]
1164 /* Value is 1 if it is a good idea to tie two pseudo registers
1165 when one has mode MODE1 and one has mode MODE2.
1166 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
1167 for any hard reg, then this must be 0 for correct output. */
1168 #define MODES_TIEABLE_P(MODE1, MODE2) \
1169 ((GET_MODE_CLASS (MODE1) == MODE_FLOAT || \
1170 GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
1171 == (GET_MODE_CLASS (MODE2) == MODE_FLOAT || \
1172 GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
1174 /* MIPS pc is not overloaded on a register. */
1175 /* #define PC_REGNUM xx */
1177 /* Register to use for pushing function arguments. */
1178 #define STACK_POINTER_REGNUM (GP_REG_FIRST + 29)
1180 /* Offset from the stack pointer to the first available location. */
1181 #define STACK_POINTER_OFFSET 0
1183 /* Base register for access to local variables of the function. */
1184 #define FRAME_POINTER_REGNUM (GP_REG_FIRST + 30)
1186 /* Value should be nonzero if functions must have frame pointers.
1187 Zero means the frame pointer need not be set up (and parms
1188 may be accessed via the stack pointer) in functions that seem suitable.
1189 This is computed in `reload', in reload1.c. */
1190 #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
1192 /* Base register for access to arguments of the function. */
1193 #define ARG_POINTER_REGNUM GP_REG_FIRST
1195 /* Register in which static-chain is passed to a function. */
1196 #define STATIC_CHAIN_REGNUM (GP_REG_FIRST + 2)
1198 /* If the structure value address is passed in a register, then
1199 `STRUCT_VALUE_REGNUM' should be the number of that register. */
1200 /* #define STRUCT_VALUE_REGNUM (GP_REG_FIRST + 4) */
1202 /* If the structure value address is not passed in a register, define
1203 `STRUCT_VALUE' as an expression returning an RTX for the place
1204 where the address is passed. If it returns 0, the address is
1205 passed as an "invisible" first argument. */
1206 #define STRUCT_VALUE ((rtx)0)
1208 /* Mips registers used in prologue/epilogue code when the stack frame
1209 is larger than 32K bytes. These registers must come from the
1210 scratch register set, and not used for passing and returning
1211 arguments and any other information used in the calling sequence
1214 #define MIPS_TEMP1_REGNUM (GP_REG_FIRST + 8)
1215 #define MIPS_TEMP2_REGNUM (GP_REG_FIRST + 9)
1217 /* Define this macro if it is as good or better to call a constant
1218 function address than to call an address kept in a register. */
1219 #define NO_FUNCTION_CSE 1
1221 /* Define this macro if it is as good or better for a function to
1222 call itself with an explicit address than to call an address
1223 kept in a register. */
1224 #define NO_RECURSIVE_FUNCTION_CSE 1
1226 /* The register number of the register used to address a table of
1227 static data addresses in memory. In some cases this register is
1228 defined by a processor's "application binary interface" (ABI).
1229 When this macro is defined, RTL is generated for this register
1230 once, as with the stack pointer and frame pointer registers. If
1231 this macro is not defined, it is up to the machine-dependent
1232 files to allocate such a register (if necessary). */
1233 #define PIC_OFFSET_TABLE_REGNUM (GP_REG_FIRST + 28)
1236 /* Define the classes of registers for register constraints in the
1237 machine description. Also define ranges of constants.
1239 One of the classes must always be named ALL_REGS and include all hard regs.
1240 If there is more than one class, another class must be named NO_REGS
1241 and contain no registers.
1243 The name GENERAL_REGS must be the name of a class (or an alias for
1244 another name such as ALL_REGS). This is the class of registers
1245 that is allowed by "g" or "r" in a register constraint.
1246 Also, registers outside this class are allocated only when
1247 instructions express preferences for them.
1249 The classes must be numbered in nondecreasing order; that is,
1250 a larger-numbered class must never be contained completely
1251 in a smaller-numbered class.
1253 For any two classes, it is very desirable that there be another
1254 class that represents their union. */
1258 NO_REGS
, /* no registers in set */
1259 GR_REGS
, /* integer registers */
1260 FP_REGS
, /* floating point registers */
1261 HI_REG
, /* hi register */
1262 LO_REG
, /* lo register */
1263 MD_REGS
, /* multiply/divide registers (hi/lo) */
1264 ST_REGS
, /* status registers (fp status) */
1265 ALL_REGS
, /* all registers */
1266 LIM_REG_CLASSES
/* max value + 1 */
1269 #define N_REG_CLASSES (int) LIM_REG_CLASSES
1271 #define GENERAL_REGS GR_REGS
1273 /* An initializer containing the names of the register classes as C
1274 string constants. These names are used in writing some of the
1277 #define REG_CLASS_NAMES \
1289 /* An initializer containing the contents of the register classes,
1290 as integers which are bit masks. The Nth integer specifies the
1291 contents of class N. The way the integer MASK is interpreted is
1292 that register R is in the class if `MASK & (1 << R)' is 1.
1294 When the machine has more than 32 registers, an integer does not
1295 suffice. Then the integers are replaced by sub-initializers,
1296 braced groupings containing several integers. Each
1297 sub-initializer must be suitable as an initializer for the type
1298 `HARD_REG_SET' which is defined in `hard-reg-set.h'. */
1300 #define REG_CLASS_CONTENTS \
1302 { 0x00000000, 0x00000000, 0x00000000 }, /* no registers */ \
1303 { 0xffffffff, 0x00000000, 0x00000000 }, /* integer registers */ \
1304 { 0x00000000, 0xffffffff, 0x00000000 }, /* floating registers*/ \
1305 { 0x00000000, 0x00000000, 0x00000001 }, /* hi register */ \
1306 { 0x00000000, 0x00000000, 0x00000002 }, /* lo register */ \
1307 { 0x00000000, 0x00000000, 0x00000003 }, /* mul/div registers */ \
1308 { 0x00000000, 0x00000000, 0x00000004 }, /* status registers */ \
1309 { 0xffffffff, 0xffffffff, 0x00000007 } /* all registers */ \
1313 /* A C expression whose value is a register class containing hard
1314 register REGNO. In general there is more that one such class;
1315 choose a class which is "minimal", meaning that no smaller class
1316 also contains the register. */
1318 extern enum reg_class mips_regno_to_class
[];
1320 #define REGNO_REG_CLASS(REGNO) mips_regno_to_class[ (REGNO) ]
1322 /* A macro whose definition is the name of the class to which a
1323 valid base register must belong. A base register is one used in
1324 an address which is the register value plus a displacement. */
1326 #define BASE_REG_CLASS GR_REGS
1328 /* A macro whose definition is the name of the class to which a
1329 valid index register must belong. An index register is one used
1330 in an address where its value is either multiplied by a scale
1331 factor or added to another register (as well as added to a
1334 #define INDEX_REG_CLASS GR_REGS
1337 /* REGISTER AND CONSTANT CLASSES */
1339 /* Get reg_class from a letter such as appears in the machine
1342 DEFINED REGISTER CLASSES:
1344 'd' General (aka integer) registers
1345 'f' Floating point registers
1348 'x' Multiply/divide registers
1349 'z' FP Status register */
1351 extern enum reg_class mips_char_to_class
[];
1353 #define REG_CLASS_FROM_LETTER(C) mips_char_to_class[ (C) ]
1355 /* The letters I, J, K, L, M, N, O, and P in a register constraint
1356 string can be used to stand for particular ranges of immediate
1357 operands. This macro defines what the ranges are. C is the
1358 letter, and VALUE is a constant value. Return 1 if VALUE is
1359 in the range specified by C. */
1363 `I' is used for the range of constants an arithmetic insn can
1364 actually contain (16 bits signed integers).
1366 `J' is used for the range which is just zero (ie, $r0).
1368 `K' is used for the range of constants a logical insn can actually
1369 contain (16 bit zero-extended integers).
1371 `L' is used for the range of constants that be loaded with lui
1372 (ie, the bottom 16 bits are zero).
1374 `M' is used for the range of constants that take two words to load
1375 (ie, not matched by `I', `K', and `L').
1377 `N' is used for negative 16 bit constants.
1379 `O' is an exact power of 2 (not yet used in the md file).
1381 `P' is used for positive 16 bit constants. */
1383 #define SMALL_INT(X) ((unsigned) (INTVAL (X) + 0x8000) < 0x10000)
1384 #define SMALL_INT_UNSIGNED(X) ((unsigned) (INTVAL (X)) < 0x10000)
1386 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1387 ((C) == 'I' ? ((unsigned) ((VALUE) + 0x8000) < 0x10000) \
1388 : (C) == 'J' ? ((VALUE) == 0) \
1389 : (C) == 'K' ? ((unsigned) (VALUE) < 0x10000) \
1390 : (C) == 'L' ? (((VALUE) & 0xffff0000) == (VALUE)) \
1391 : (C) == 'M' ? ((((VALUE) & ~0x0000ffff) != 0) \
1392 && (((VALUE) & ~0x0000ffff) != ~0x0000ffff) \
1393 && ((VALUE) & 0x0000ffff) != 0) \
1394 : (C) == 'N' ? (((VALUE) & ~0x0000ffff) == ~0x0000ffff) \
1395 : (C) == 'O' ? (exact_log2 (VALUE) >= 0) \
1396 : (C) == 'P' ? ((VALUE) != 0 && (((VALUE) & ~0x0000ffff) == 0)) \
1399 /* Similar, but for floating constants, and defining letters G and H.
1400 Here VALUE is the CONST_DOUBLE rtx itself. */
1404 'G' : Floating point 0 */
1406 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1408 && CONST_DOUBLE_HIGH (VALUE) == 0 \
1409 && CONST_DOUBLE_LOW (VALUE) == 0)
1411 /* Letters in the range `Q' through `U' may be defined in a
1412 machine-dependent fashion to stand for arbitrary operand types.
1413 The machine description macro `EXTRA_CONSTRAINT' is passed the
1414 operand as its first argument and the constraint letter as its
1417 `Q' is for memory references which take more than 1 instruction.
1418 `R' is for memory references which take 1 word for the instruction.
1419 `S' is for references to extern items which are PIC for OSF/rose. */
1421 #define EXTRA_CONSTRAINT(OP,CODE) \
1422 ((GET_CODE (OP) != MEM) ? FALSE \
1423 : ((CODE) == 'Q') ? !simple_memory_operand (OP, GET_MODE (OP)) \
1424 : ((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \
1425 : ((CODE) == 'S') ? (HALF_PIC_P () && CONSTANT_P (OP) \
1426 && HALF_PIC_ADDRESS_P (OP)) \
1429 /* Given an rtx X being reloaded into a reg required to be
1430 in class CLASS, return the class of reg to actually use.
1431 In general this is just CLASS; but on some machines
1432 in some cases it is preferable to use a more restrictive class. */
1434 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
1435 ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1436 || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT) \
1437 ? (TARGET_SOFT_FLOAT ? GR_REGS : FP_REGS) \
1438 : ((GET_MODE (X) == VOIDmode) \
1442 /* Certain machines have the property that some registers cannot be
1443 copied to some other registers without using memory. Define this
1444 macro on those machines to be a C expression that is non-zero if
1445 objects of mode MODE in registers of CLASS1 can only be copied to
1446 registers of class CLASS2 by storing a register of CLASS1 into
1447 memory and loading that memory location into a register of CLASS2.
1449 Do not define this macro if its value would always be zero. */
1451 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
1452 (!TARGET_DEBUG_H_MODE \
1453 && GET_MODE_CLASS (MODE) == MODE_INT \
1454 && ((CLASS1 == FP_REGS && CLASS2 == GR_REGS) \
1455 || (CLASS1 == GR_REGS && CLASS2 == FP_REGS)))
1457 /* Return the maximum number of consecutive registers
1458 needed to represent mode MODE in a register of class CLASS. */
1460 #define CLASS_MAX_NREGS(CLASS, MODE) \
1461 ((((MODE) == DFmode) || ((MODE) == SFmode)) ? 2 \
1462 : ((MODE) == VOIDmode)? ((CLASS) == FP_REGS ? 2 : 1) \
1463 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
1465 /* If defined, this is a C expression whose value should be
1466 nonzero if the insn INSN has the effect of mysteriously
1467 clobbering the contents of hard register number REGNO. By
1468 "mysterious" we mean that the insn's RTL expression doesn't
1469 describe such an effect.
1471 If this macro is not defined, it means that no insn clobbers
1472 registers mysteriously. This is the usual situation; all else
1473 being equal, it is best for the RTL expression to show all the
1476 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) */
1479 /* Stack layout; function entry, exit and calling. */
1481 /* Define this if pushing a word on the stack
1482 makes the stack pointer a smaller address. */
1483 #define STACK_GROWS_DOWNWARD
1485 /* Define this if the nominal address of the stack frame
1486 is at the high-address end of the local variables;
1487 that is, each additional local variable allocated
1488 goes at a more negative offset in the frame. */
1489 /* #define FRAME_GROWS_DOWNWARD */
1491 /* Offset within stack frame to start allocating local variables at.
1492 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1493 first local allocated. Otherwise, it is the offset to the BEGINNING
1494 of the first local allocated. */
1495 #define STARTING_FRAME_OFFSET current_function_outgoing_args_size
1497 /* Offset from the stack pointer register to an item dynamically
1498 allocated on the stack, e.g., by `alloca'.
1500 The default value for this macro is `STACK_POINTER_OFFSET' plus the
1501 length of the outgoing arguments. The default is correct for most
1502 machines. See `function.c' for details.
1504 The MIPS ABI states that functions which dynamically allocate the
1505 stack must not have 0 for STACK_DYNAMIC_OFFSET, since it looks like
1506 we are trying to create a second frame pointer to the function, so
1507 allocate some stack space to make it happy.
1509 However, the linker currently complains about linking any code that
1510 dynamically allocates stack space, and there seems to be a bug in
1511 STACK_DYNAMIC_OFFSET, so don't define this right now. */
1514 #define STACK_DYNAMIC_OFFSET(FUNDECL) \
1515 ((current_function_outgoing_args_size == 0 && current_function_calls_alloca) \
1516 ? 4*UNITS_PER_WORD \
1517 : current_function_outgoing_args_size)
1520 /* Structure to be filled in by compute_frame_size with register
1521 save masks, and offsets for the current function. */
1523 struct mips_frame_info
1525 long total_size
; /* # bytes that the entire frame takes up */
1526 long var_size
; /* # bytes that variables take up */
1527 long args_size
; /* # bytes that outgoing arguments take up */
1528 long extra_size
; /* # bytes of extra gunk */
1529 int gp_reg_size
; /* # bytes needed to store gp regs */
1530 int fp_reg_size
; /* # bytes needed to store fp regs */
1531 long mask
; /* mask of saved gp registers */
1532 long fmask
; /* mask of saved fp registers */
1533 long gp_save_offset
; /* offset from vfp to store gp registers */
1534 long fp_save_offset
; /* offset from vfp to store fp registers */
1535 long gp_sp_offset
; /* offset from new sp to store gp registers */
1536 long fp_sp_offset
; /* offset from new sp to store fp registers */
1537 int initialized
; /* != 0 if frame size already calculated */
1538 int num_gp
; /* number of gp registers saved */
1539 int num_fp
; /* number of fp registers saved */
1542 extern struct mips_frame_info current_frame_info
;
1544 /* Store in the variable DEPTH the initial difference between the
1545 frame pointer reg contents and the stack pointer reg contents,
1546 as of the start of the function body. This depends on the layout
1547 of the fixed parts of the stack frame and on how registers are saved. */
1549 /* #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
1550 ((VAR) = compute_frame_size (get_frame_size ())) */
1552 /* If defined, this macro specifies a table of register pairs used to
1553 eliminate unneeded registers that point into the stack frame. If
1554 it is not defined, the only elimination attempted by the compiler
1555 is to replace references to the frame pointer with references to
1558 The definition of this macro is a list of structure
1559 initializations, each of which specifies an original and
1560 replacement register.
1562 On some machines, the position of the argument pointer is not
1563 known until the compilation is completed. In such a case, a
1564 separate hard register must be used for the argument pointer.
1565 This register can be eliminated by replacing it with either the
1566 frame pointer or the argument pointer, depending on whether or not
1567 the frame pointer has been eliminated.
1569 In this case, you might specify:
1570 #define ELIMINABLE_REGS \
1571 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1572 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1573 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1575 Note that the elimination of the argument pointer with the stack
1576 pointer is specified first since that is the preferred elimination. */
1578 #define ELIMINABLE_REGS \
1579 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1580 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1581 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1584 /* A C expression that returns non-zero if the compiler is allowed to
1585 try to replace register number FROM-REG with register number
1586 TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is
1587 defined, and will usually be the constant 1, since most of the
1588 cases preventing register elimination are things that the compiler
1589 already knows about. */
1591 #define CAN_ELIMINATE(FROM, TO) \
1592 (!frame_pointer_needed \
1593 || ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM))
1595 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
1596 specifies the initial difference between the specified pair of
1597 registers. This macro must be defined if `ELIMINABLE_REGS' is
1600 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1601 { compute_frame_size (get_frame_size ()); \
1602 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1604 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1605 (OFFSET) = current_frame_info.total_size; \
1606 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1607 (OFFSET) = current_frame_info.total_size; \
1613 /* If we generate an insn to push BYTES bytes,
1614 this says how many the stack pointer really advances by.
1615 On the vax, sp@- in a byte insn really pushes a word. */
1617 /* #define PUSH_ROUNDING(BYTES) 0 */
1619 /* If defined, the maximum amount of space required for outgoing
1620 arguments will be computed and placed into the variable
1621 `current_function_outgoing_args_size'. No space will be pushed
1622 onto the stack for each call; instead, the function prologue
1623 should increase the stack frame size by this amount.
1625 It is not proper to define both `PUSH_ROUNDING' and
1626 `ACCUMULATE_OUTGOING_ARGS'. */
1627 #define ACCUMULATE_OUTGOING_ARGS
1629 /* Offset from the argument pointer register to the first argument's
1630 address. On some machines it may depend on the data type of the
1633 If `ARGS_GROW_DOWNWARD', this is the offset to the location above
1634 the first argument's address.
1636 On the MIPS, we must skip the first argument position if we are
1637 returning a structure or a union, to account for it's address being
1638 passed in $4. However, at the current time, this produces a compiler
1639 that can't bootstrap, so comment it out for now. */
1642 #define FIRST_PARM_OFFSET(FNDECL) \
1644 && TREE_TYPE (FNDECL) != 0 \
1645 && TREE_TYPE (TREE_TYPE (FNDECL)) != 0 \
1646 && (TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == RECORD_TYPE \
1647 || TREE_CODE (TREE_TYPE (TREE_TYPE (FNDECL))) == UNION_TYPE) \
1651 #define FIRST_PARM_OFFSET(FNDECL) 0
1654 /* When a parameter is passed in a register, stack space is still
1655 allocated for it. For the MIPS, stack space must be allocated, cf
1656 Asm Lang Prog Guide page 7-8.
1658 BEWARE that some space is also allocated for non existing arguments
1659 in register. In case an argument list is of form GF used registers
1660 are a0 (a2,a3), but we should push over a1... */
1662 #define REG_PARM_STACK_SPACE(FNDECL) ((4*UNITS_PER_WORD) - FIRST_PARM_OFFSET (FNDECL))
1664 /* Define this if it is the responsibility of the caller to
1665 allocate the area reserved for arguments passed in registers.
1666 If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect
1667 of this macro is to determine whether the space is included in
1668 `current_function_outgoing_args_size'. */
1669 #define OUTGOING_REG_PARM_STACK_SPACE
1671 /* Align stack frames on 64 bits (Double Word ). */
1672 #define STACK_BOUNDARY 64
1674 /* Make sure 16 bytes are always allocated on the stack. */
1676 #ifndef STACK_ARGS_ADJUST
1677 #define STACK_ARGS_ADJUST(SIZE) \
1679 if (SIZE.constant < 16) \
1680 SIZE.constant = 16; \
1685 /* A C expression that should indicate the number of bytes of its
1686 own arguments that a function function pops on returning, or 0
1687 if the function pops no arguments and the caller must therefore
1688 pop them all after the function returns.
1690 FUNTYPE is a C variable whose value is a tree node that
1691 describes the function in question. Normally it is a node of
1692 type `FUNCTION_TYPE' that describes the data type of the function.
1693 From this it is possible to obtain the data types of the value
1694 and arguments (if known).
1696 When a call to a library function is being considered, FUNTYPE
1697 will contain an identifier node for the library function. Thus,
1698 if you need to distinguish among various library functions, you
1699 can do so by their names. Note that "library function" in this
1700 context means a function used to perform arithmetic, whose name
1701 is known specially in the compiler and was not mentioned in the
1702 C code being compiled.
1704 STACK-SIZE is the number of bytes of arguments passed on the
1705 stack. If a variable number of bytes is passed, it is zero, and
1706 argument popping will always be the responsibility of the
1707 calling function. */
1709 #define RETURN_POPS_ARGS(FUNTYPE, SIZE) 0
1712 /* Symbolic macros for the registers used to return integer and floating
1715 #define GP_RETURN (GP_REG_FIRST + 2)
1716 #define FP_RETURN ((TARGET_SOFT_FLOAT) ? GP_RETURN : (FP_REG_FIRST + 0))
1718 /* Symbolic macros for the first/last argument registers. */
1720 #define GP_ARG_FIRST (GP_REG_FIRST + 4)
1721 #define GP_ARG_LAST (GP_REG_FIRST + 7)
1722 #define FP_ARG_FIRST (FP_REG_FIRST + 12)
1723 #define FP_ARG_LAST (FP_REG_FIRST + 15)
1725 #define MAX_ARGS_IN_REGISTERS 4
1727 /* Define how to find the value returned by a library function
1728 assuming the value has mode MODE. */
1730 #define LIBCALL_VALUE(MODE) \
1731 gen_rtx (REG, MODE, \
1732 (GET_MODE_CLASS (MODE) == MODE_FLOAT) \
1736 /* Define how to find the value returned by a function.
1737 VALTYPE is the data type of the value (as a tree).
1738 If the precise function being called is known, FUNC is its FUNCTION_DECL;
1739 otherwise, FUNC is 0. */
1741 #define FUNCTION_VALUE(VALTYPE, FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE))
1744 /* 1 if N is a possible register number for a function value.
1745 On the MIPS, R2 R3 and F0 F2 are the only register thus used.
1746 Currently, R2 and F0 are only implemented here (C has no complex type) */
1748 #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN)
1750 /* 1 if N is a possible register number for function argument passing. */
1752 #define FUNCTION_ARG_REGNO_P(N) (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST) \
1753 || ((N) >= FP_ARG_FIRST && (N) <= FP_ARG_LAST \
1756 /* A C expression which can inhibit the returning of certain function
1757 values in registers, based on the type of value. A nonzero value says
1758 to return the function value in memory, just as large structures are
1759 always returned. Here TYPE will be a C expression of type
1760 `tree', representing the data type of the value.
1762 Note that values of mode `BLKmode' are returned in memory
1763 regardless of this macro. Also, the option `-fpcc-struct-return'
1764 takes effect regardless of this macro. On most systems, it is
1765 possible to leave the macro undefined; this causes a default
1766 definition to be used, whose value is the constant 0.
1768 GCC normally converts 1 byte structures into chars, 2 byte
1769 structs into shorts, and 4 byte structs into ints, and returns
1770 them this way. Defining the following macro overrides this,
1771 to give us MIPS cc compatibility. */
1773 #define RETURN_IN_MEMORY(TYPE) \
1774 ((TREE_CODE (TYPE) == RECORD_TYPE) || (TREE_CODE (TYPE) == UNION_TYPE))
1777 /* A code distinguishing the floating point format of the target
1778 machine. There are three defined values: IEEE_FLOAT_FORMAT,
1779 VAX_FLOAT_FORMAT, and UNKNOWN_FLOAT_FORMAT. */
1781 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
1784 /* Define a data type for recording info about an argument list
1785 during the scan of that argument list. This data type should
1786 hold all necessary information about the function itself
1787 and about the args processed so far, enough to enable macros
1788 such as FUNCTION_ARG to determine where the next arg should go.
1791 typedef struct mips_args
{
1792 int gp_reg_found
; /* whether a gp register was found yet */
1793 int arg_number
; /* argument number */
1794 int arg_words
; /* # total words the arguments take */
1795 int num_adjusts
; /* number of adjustments made */
1796 /* Adjustments made to args pass in regs. */
1797 struct rtx_def
*adjust
[MAX_ARGS_IN_REGISTERS
];
1800 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1801 for a call to a function whose data type is FNTYPE.
1802 For a library call, FNTYPE is 0.
1806 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
1807 init_cumulative_args (&CUM, FNTYPE, LIBNAME) \
1809 /* Update the data in CUM to advance over an argument
1810 of mode MODE and data type TYPE.
1811 (TYPE is null for libcalls where that information may not be available.) */
1813 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1814 function_arg_advance (&CUM, MODE, TYPE, NAMED)
1816 /* Determine where to put an argument to a function.
1817 Value is zero to push the argument on the stack,
1818 or a hard register in which to store the argument.
1820 MODE is the argument's machine mode.
1821 TYPE is the data type of the argument (as a tree).
1822 This is null for libcalls where that information may
1824 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1825 the preceding args and about the function being called.
1826 NAMED is nonzero if this argument is a named parameter
1827 (otherwise it is an extra parameter matching an ellipsis). */
1829 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1830 function_arg( &CUM, MODE, TYPE, NAMED)
1832 /* For an arg passed partly in registers and partly in memory,
1833 this is the number of registers used.
1834 For args passed entirely in registers or entirely in memory, zero. */
1836 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1837 function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
1839 /* If defined, a C expression that gives the alignment boundary, in
1840 bits, of an argument with the specified mode and type. If it is
1841 not defined, `PARM_BOUNDARY' is used for all arguments. */
1843 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1845 ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \
1847 : TYPE_ALIGN(TYPE)) \
1848 : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
1850 : GET_MODE_ALIGNMENT(MODE)))
1853 /* This macro generates the assembly code for function entry.
1854 FILE is a stdio stream to output the code to.
1855 SIZE is an int: how many units of temporary storage to allocate.
1856 Refer to the array `regs_ever_live' to determine which registers
1857 to save; `regs_ever_live[I]' is nonzero if register number I
1858 is ever used in the function. This macro is responsible for
1859 knowing which registers should not be saved even if used. */
1861 #define FUNCTION_PROLOGUE(FILE, SIZE) function_prologue(FILE, SIZE)
1863 /* This macro generates the assembly code for function exit,
1864 on machines that need it. If FUNCTION_EPILOGUE is not defined
1865 then individual return instructions are generated for each
1866 return statement. Args are same as for FUNCTION_PROLOGUE. */
1868 #define FUNCTION_EPILOGUE(FILE, SIZE) function_epilogue(FILE, SIZE)
1870 /* Define the number of delay slots needed for the function epilogue.
1872 On the mips, we need a slot if either no stack has been allocated,
1873 or the only register saved is the return register. */
1875 #define DELAY_SLOTS_FOR_EPILOGUE mips_epilogue_delay_slots ()
1877 /* Define whether INSN can be placed in delay slot N for the epilogue.
1878 No references to the stack must be made, since on the MIPS, the
1879 delay slot is done after the stack has been cleaned up. */
1881 #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \
1882 (get_attr_dslot (INSN) == DSLOT_NO \
1883 && get_attr_length (INSN) == 1 \
1884 && ! epilogue_reg_mentioned_p (PATTERN (INSN)))
1886 /* Tell prologue and epilogue if register REGNO should be saved / restored. */
1888 #define MUST_SAVE_REGISTER(regno) \
1889 ((regs_ever_live[regno] && !call_used_regs[regno]) \
1890 || (regno == FRAME_POINTER_REGNUM && frame_pointer_needed) \
1891 || (regno == (GP_REG_FIRST + 31) && regs_ever_live[GP_REG_FIRST + 31]))
1893 /* ALIGN FRAMES on double word boundaries */
1895 #define MIPS_STACK_ALIGN(LOC) (((LOC)+7) & ~7)
1898 /* Output assembler code to FILE to increment profiler label # LABELNO
1899 for profiling a function entry. */
1901 #define FUNCTION_PROFILER(FILE, LABELNO) \
1903 fprintf (FILE, "\t.set\tnoreorder\n"); \
1904 fprintf (FILE, "\t.set\tnoat\n"); \
1905 fprintf (FILE, "\tmove\t%s,%s\t\t# save current return address\n", \
1906 reg_names[GP_REG_FIRST + 1], reg_names[GP_REG_FIRST + 31]); \
1907 fprintf (FILE, "\tjal\t_mcount\n"); \
1908 fprintf (FILE, "\tsubu\t%s,%s,8\t\t# _mcount pops 2 words from stack\n", \
1909 reg_names[STACK_POINTER_REGNUM], \
1910 reg_names[STACK_POINTER_REGNUM]); \
1911 fprintf (FILE, "\t.set\treorder\n"); \
1912 fprintf (FILE, "\t.set\tat\n"); \
1915 /* Define this macro if the code for function profiling should come
1916 before the function prologue. Normally, the profiling code comes
1919 /* #define PROFILE_BEFORE_PROLOGUE */
1921 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1922 the stack pointer does not matter. The value is tested only in
1923 functions that have frame pointers.
1924 No definition is equivalent to always zero. */
1926 #define EXIT_IGNORE_STACK 1
1929 /* A C statement to output, on the stream FILE, assembler code for a
1930 block of data that contains the constant parts of a trampoline.
1931 This code should not include a label--the label is taken care of
1934 #define TRAMPOLINE_TEMPLATE(STREAM) \
1936 fprintf (STREAM, "\t.word\t0x03e00821\t\t# move $1,$31\n"); \
1937 fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n"); \
1938 fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n"); \
1939 fprintf (STREAM, "\t.word\t0x8fe30010\t\t# lw $3,16($31)\n"); \
1940 fprintf (STREAM, "\t.word\t0x8fe20014\t\t# lw $2,20($31)\n"); \
1941 fprintf (STREAM, "\t.word\t0x00600008\t\t# jr $3\n"); \
1942 fprintf (STREAM, "\t.word\t0x0020f821\t\t# move $31,$1\n"); \
1943 fprintf (STREAM, "\t.word\t0x00000000\t\t# <function address>\n"); \
1944 fprintf (STREAM, "\t.word\t0x00000000\t\t# <static chain value>\n"); \
1947 /* A C expression for the size in bytes of the trampoline, as an
1950 #define TRAMPOLINE_SIZE (9*4)
1952 /* Alignment required for trampolines, in bits.
1954 If you don't define this macro, the value of `BIGGEST_ALIGNMENT'
1955 is used for aligning trampolines. */
1957 /* #define TRAMPOLINE_ALIGNMENT 32 */
1959 /* A C statement to initialize the variable parts of a trampoline.
1960 ADDR is an RTX for the address of the trampoline; FNADDR is an
1961 RTX for the address of the nested function; STATIC_CHAIN is an
1962 RTX for the static chain value that should be passed to the
1963 function when it is called. */
1965 #define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \
1968 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 28)), FUNC); \
1969 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 32)), CHAIN); \
1971 /* Attempt to make stack executable */ \
1972 emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__enable_execute_stack"), \
1973 0, VOIDmode, 1, addr, Pmode); \
1977 /* Attempt to turn on access permissions for the stack. */
1979 #define TRANSFER_FROM_TRAMPOLINE \
1982 __enable_execute_stack (addr) \
1985 int size = getpagesize (); \
1986 int mask = ~(size-1); \
1987 char *page = (char *) (((int) addr) & mask); \
1988 char *end = (char *) ((((int) (addr + TRAMPOLINE_SIZE)) & mask) + size); \
1990 /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \
1991 if (mprotect (page, end - page, 7) < 0) \
1992 perror ("mprotect of trampoline code"); \
1995 if (cacheflush (addr, TRAMPOLINE_SIZE, 1) < 0) \
1996 perror ("cacheflush of trampoline code"); \
2001 /* Addressing modes, and classification of registers for them. */
2003 /* #define HAVE_POST_INCREMENT */
2004 /* #define HAVE_POST_DECREMENT */
2006 /* #define HAVE_PRE_DECREMENT */
2007 /* #define HAVE_PRE_INCREMENT */
2009 /* These assume that REGNO is a hard or pseudo reg number.
2010 They give nonzero only if REGNO is a hard reg of the suitable class
2011 or a pseudo reg currently allocated to a suitable hard reg.
2012 These definitions are NOT overridden anywhere. */
2014 #define GP_REG_OR_PSEUDO_STRICT_P(regno) \
2015 GP_REG_P((regno < FIRST_PSEUDO_REGISTER) ? regno : reg_renumber[regno])
2017 #define GP_REG_OR_PSEUDO_NONSTRICT_P(regno) \
2018 (((regno) >= FIRST_PSEUDO_REGISTER) || (GP_REG_P (regno)))
2020 #define REGNO_OK_FOR_INDEX_P(regno) GP_REG_OR_PSEUDO_STRICT_P (regno)
2021 #define REGNO_OK_FOR_BASE_P(regno) GP_REG_OR_PSEUDO_STRICT_P (regno)
2023 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
2024 and check its validity for a certain class.
2025 We have two alternate definitions for each of them.
2026 The usual definition accepts all pseudo regs; the other rejects them all.
2027 The symbol REG_OK_STRICT causes the latter definition to be used.
2029 Most source files want to accept pseudo regs in the hope that
2030 they will get allocated to the class that the insn wants them to be in.
2031 Some source files that are used after register allocation
2032 need to be strict. */
2034 #ifndef REG_OK_STRICT
2036 #define REG_OK_STRICT_P 0
2037 #define REG_OK_FOR_INDEX_P(X) GP_REG_OR_PSEUDO_NONSTRICT_P (REGNO (X))
2038 #define REG_OK_FOR_BASE_P(X) GP_REG_OR_PSEUDO_NONSTRICT_P (REGNO (X))
2042 #define REG_OK_STRICT_P 1
2043 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
2044 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
2049 /* Maximum number of registers that can appear in a valid memory address. */
2051 #define MAX_REGS_PER_ADDRESS 1
2053 /* A C compound statement with a conditional `goto LABEL;' executed
2054 if X (an RTX) is a legitimate memory address on the target
2055 machine for a memory operand of mode MODE.
2057 It usually pays to define several simpler macros to serve as
2058 subroutines for this one. Otherwise it may be too complicated
2061 This macro must exist in two variants: a strict variant and a
2062 non-strict one. The strict variant is used in the reload pass.
2063 It must be defined so that any pseudo-register that has not been
2064 allocated a hard register is considered a memory reference. In
2065 contexts where some kind of register is required, a
2066 pseudo-register with no hard register must be rejected.
2068 The non-strict variant is used in other passes. It must be
2069 defined to accept all pseudo-registers in every context where
2070 some kind of register is required.
2072 Compiler source files that want to use the strict variant of
2073 this macro define the macro `REG_OK_STRICT'. You should use an
2074 `#ifdef REG_OK_STRICT' conditional to define the strict variant
2075 in that case and the non-strict variant otherwise.
2077 Typically among the subroutines used to define
2078 `GO_IF_LEGITIMATE_ADDRESS' are subroutines to check for
2079 acceptable registers for various purposes (one for base
2080 registers, one for index registers, and so on). Then only these
2081 subroutine macros need have two variants; the higher levels of
2082 macros may be the same whether strict or not.
2084 Normally, constant addresses which are the sum of a `symbol_ref'
2085 and an integer are stored inside a `const' RTX to mark them as
2086 constant. Therefore, there is no need to recognize such sums
2087 specifically as legitimate addresses. Normally you would simply
2088 recognize any `const' as legitimate.
2090 Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle
2091 constant sums that are not marked with `const'. It assumes
2092 that a naked `plus' indicates indexing. If so, then you *must*
2093 reject such naked constant sums as illegitimate addresses, so
2094 that none of them will be given to `PRINT_OPERAND_ADDRESS'.
2096 On some machines, whether a symbolic address is legitimate
2097 depends on the section that the address refers to. On these
2098 machines, define the macro `ENCODE_SECTION_INFO' to store the
2099 information into the `symbol_ref', and then check for it here.
2100 When you see a `const', you will have to look inside it to find
2101 the `symbol_ref' in order to determine the section. */
2104 #define GO_PRINTF(x) trace(x)
2105 #define GO_PRINTF2(x,y) trace(x,y)
2106 #define GO_DEBUG_RTX(x) debug_rtx(x)
2109 #define GO_PRINTF(x)
2110 #define GO_PRINTF2(x,y)
2111 #define GO_DEBUG_RTX(x)
2114 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
2116 register rtx xinsn = (X); \
2118 if (TARGET_DEBUG_B_MODE) \
2120 GO_PRINTF2 ("\n========== GO_IF_LEGITIMATE_ADDRESS, %sstrict\n", \
2121 (REG_OK_STRICT_P) ? "" : "not "); \
2122 GO_DEBUG_RTX (xinsn); \
2125 if (GET_CODE (xinsn) == REG && REG_OK_FOR_BASE_P (xinsn)) \
2128 if (CONSTANT_ADDRESS_P (xinsn)) \
2131 if (GET_CODE (xinsn) == PLUS) \
2133 register rtx xplus0 = XEXP (xinsn, 0); \
2134 register rtx xplus1 = XEXP (xinsn, 1); \
2135 register enum rtx_code code0 = GET_CODE (xplus0); \
2136 register enum rtx_code code1 = GET_CODE (xplus1); \
2138 if (code0 != REG && code1 == REG) \
2140 xplus0 = XEXP (xinsn, 1); \
2141 xplus1 = XEXP (xinsn, 0); \
2142 code0 = GET_CODE (xplus0); \
2143 code1 = GET_CODE (xplus1); \
2146 if (code0 == REG && REG_OK_FOR_BASE_P (xplus0)) \
2148 if (code1 == CONST_INT) \
2150 register unsigned adj_offset = INTVAL (xplus1) + 0x8000; \
2152 if ((adj_offset <= 0xffff) \
2153 && (adj_offset + GET_MODE_SIZE (MODE) - 1 <= 0xffff)) \
2157 /* For some code sequences, you actually get better code by \
2158 pretending that the MIPS supports an address mode of a \
2159 constant address + a register, even though the real \
2160 machine doesn't support it. This is because the \
2161 assembler can use $r1 to load just the high 16 bits, add \
2162 in the register, and fold the low 16 bits into the memory \
2163 reference, whereas the compiler generates a 4 instruction \
2164 sequence. On the other hand, CSE is not as effective. \
2165 It would be a win to generate the lui directly, but the \
2166 MIPS assembler does not have syntax to generate the \
2167 appropriate relocation. */ \
2169 else if (!TARGET_DEBUG_A_MODE \
2171 && CONSTANT_ADDRESS_P (xplus1)) \
2176 if (TARGET_DEBUG_B_MODE) \
2177 GO_PRINTF ("Not a legitimate address\n"); \
2181 /* A C expression that is 1 if the RTX X is a constant which is a
2182 valid address. On most machines, this can be defined as
2183 `CONSTANT_P (X)', but a few machines are more restrictive in
2184 which constant addresses are supported.
2186 `CONSTANT_P' accepts integer-values expressions whose values are
2187 not explicitly known, such as `symbol_ref', `label_ref', and
2188 `high' expressions and `const' arithmetic expressions, in
2189 addition to `const_int' and `const_double' expressions. */
2191 #define CONSTANT_ADDRESS_P(X) \
2192 (CONSTANT_P (X) && (!HALF_PIC_P () || !HALF_PIC_ADDRESS_P (X)))
2195 /* Nonzero if the constant value X is a legitimate general operand.
2196 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
2198 At present, GAS doesn't understand li.[sd], so don't allow it
2199 to be generated at present. Also, the MIPS assembler does not
2200 grok li.d Infinity. */
2202 #define LEGITIMATE_CONSTANT_P(X) \
2203 (GET_CODE (X) != CONST_DOUBLE || mips_const_double_ok (X, GET_MODE (X)))
2206 /* A C compound statement that attempts to replace X with a valid
2207 memory address for an operand of mode MODE. WIN will be a C
2208 statement label elsewhere in the code; the macro definition may
2211 GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN);
2213 to avoid further processing if the address has become legitimate.
2215 X will always be the result of a call to `break_out_memory_refs',
2216 and OLDX will be the operand that was given to that function to
2219 The code generated by this macro should not alter the
2220 substructure of X. If it transforms X into a more legitimate
2221 form, it should assign X (which will always be a C variable) a
2224 It is not necessary for this macro to come up with a legitimate
2225 address. The compiler has standard ways of doing so in all
2226 cases. In fact, it is safe for this macro to do nothing. But
2227 often a machine-dependent strategy can generate better code.
2229 For the MIPS, transform:
2231 memory(X + <large int>)
2235 Y = <large int> & ~0x7fff;
2237 memory (Z + (<large int> & 0x7fff));
2239 This is for CSE to find several similar references, and only use one Z. */
2241 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
2243 register rtx xinsn = (X); \
2245 if (TARGET_DEBUG_B_MODE) \
2247 GO_PRINTF ("\n========== LEGITIMIZE_ADDRESS\n"); \
2248 GO_DEBUG_RTX (xinsn); \
2251 if (GET_CODE (xinsn) == PLUS) \
2253 register rtx xplus0 = XEXP (xinsn, 0); \
2254 register rtx xplus1 = XEXP (xinsn, 1); \
2255 register enum rtx_code code0 = GET_CODE (xplus0); \
2256 register enum rtx_code code1 = GET_CODE (xplus1); \
2258 if (code0 != REG && code1 == REG) \
2260 xplus0 = XEXP (xinsn, 1); \
2261 xplus1 = XEXP (xinsn, 0); \
2262 code0 = GET_CODE (xplus0); \
2263 code1 = GET_CODE (xplus1); \
2266 if (code0 == REG && REG_OK_FOR_BASE_P (xplus0) \
2267 && code1 == CONST_INT && !SMALL_INT (xplus1)) \
2269 rtx int_reg = gen_reg_rtx (Pmode); \
2270 rtx ptr_reg = gen_reg_rtx (Pmode); \
2272 emit_move_insn (int_reg, \
2273 GEN_INT (INTVAL (xplus1) & ~ 0x7fff)); \
2275 emit_insn (gen_rtx (SET, VOIDmode, \
2277 gen_rtx (PLUS, Pmode, xplus0, int_reg))); \
2279 X = gen_rtx (PLUS, Pmode, ptr_reg, \
2280 GEN_INT (INTVAL (xplus1) & 0x7fff)); \
2285 if (TARGET_DEBUG_B_MODE) \
2286 GO_PRINTF ("LEGITIMIZE_ADDRESS could not fix.\n"); \
2290 /* A C statement or compound statement with a conditional `goto
2291 LABEL;' executed if memory address X (an RTX) can have different
2292 meanings depending on the machine mode of the memory reference it
2295 Autoincrement and autodecrement addresses typically have
2296 mode-dependent effects because the amount of the increment or
2297 decrement is the size of the operand being addressed. Some
2298 machines have other mode-dependent addresses. Many RISC machines
2299 have no mode-dependent addresses.
2301 You may assume that ADDR is a valid address for the machine. */
2303 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
2306 /* Define this macro if references to a symbol must be treated
2307 differently depending on something about the variable or
2308 function named by the symbol (such as what section it is in).
2310 The macro definition, if any, is executed immediately after the
2311 rtl for DECL has been created and stored in `DECL_RTL (DECL)'.
2312 The value of the rtl will be a `mem' whose address is a
2315 The usual thing for this macro to do is to a flag in the
2316 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
2317 name string in the `symbol_ref' (if one bit is not enough
2320 The best way to modify the name string is by adding text to the
2321 beginning, with suitable punctuation to prevent any ambiguity.
2322 Allocate the new name in `saveable_obstack'. You will have to
2323 modify `ASM_OUTPUT_LABELREF' to remove and decode the added text
2324 and output the name accordingly.
2326 You can also check the information stored in the `symbol_ref' in
2327 the definition of `GO_IF_LEGITIMATE_ADDRESS' or
2328 `PRINT_OPERAND_ADDRESS'. */
2330 #define ENCODE_SECTION_INFO(DECL) \
2333 if (optimize && mips_section_threshold > 0 && TARGET_GP_OPT \
2334 && TREE_CODE (DECL) == VAR_DECL) \
2336 int size = int_size_in_bytes (TREE_TYPE (DECL)); \
2338 if (size > 0 && size <= mips_section_threshold) \
2339 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
2342 else if (HALF_PIC_P ()) \
2343 HALF_PIC_ENCODE (DECL); \
2348 /* Specify the machine mode that this machine uses
2349 for the index in the tablejump instruction. */
2350 #define CASE_VECTOR_MODE SImode
2352 /* Define this if the tablejump instruction expects the table
2353 to contain offsets from the address of the table.
2354 Do not define this if the table should contain absolute addresses. */
2355 /* #define CASE_VECTOR_PC_RELATIVE */
2357 /* Specify the tree operation to be used to convert reals to integers. */
2358 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
2360 /* This is the kind of divide that is easiest to do in the general case. */
2361 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
2363 /* Define this as 1 if `char' should by default be signed; else as 0. */
2364 #ifndef DEFAULT_SIGNED_CHAR
2365 #define DEFAULT_SIGNED_CHAR 1
2368 /* Max number of bytes we can move from memory to memory
2369 in one reasonably fast instruction. */
2372 /* Define this macro as a C expression which is nonzero if
2373 accessing less than a word of memory (i.e. a `char' or a
2374 `short') is no faster than accessing a word of memory, i.e., if
2375 such access require more than one instruction or if there is no
2376 difference in cost between byte and (aligned) word loads.
2378 On RISC machines, it tends to generate better code to define
2379 this as 1, since it avoids making a QI or HI mode register. */
2380 #define SLOW_BYTE_ACCESS 1
2382 /* We assume that the store-condition-codes instructions store 0 for false
2383 and some other value for true. This is the value stored for true. */
2385 #define STORE_FLAG_VALUE 1
2387 /* Define this if zero-extension is slow (more than one real instruction). */
2388 #define SLOW_ZERO_EXTEND
2390 /* Define if shifts truncate the shift count
2391 which implies one can omit a sign-extension or zero-extension
2394 Only 5 bits are used in SLLV and SRLV */
2396 #define SHIFT_COUNT_TRUNCATED
2398 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
2399 is done just by pretending it is already truncated. */
2400 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
2402 /* Define this macro to control use of the character `$' in
2403 identifier names. The value should be 0, 1, or 2. 0 means `$'
2404 is not allowed by default; 1 means it is allowed by default if
2405 `-traditional' is used; 2 means it is allowed by default provided
2406 `-ansi' is not used. 1 is the default; there is no need to
2407 define this macro in that case. */
2409 #ifndef DOLLARS_IN_IDENTIFIERS
2410 #define DOLLARS_IN_IDENTIFIERS 1
2413 /* Specify the machine mode that pointers have.
2414 After generation of rtl, the compiler makes no further distinction
2415 between pointers and any other objects of this machine mode. */
2416 #define Pmode SImode
2418 /* A function address in a call instruction
2419 is a word address (for indexing purposes)
2420 so give the MEM rtx a words's mode. */
2422 #define FUNCTION_MODE SImode
2424 /* Define TARGET_MEM_FUNCTIONS if we want to use calls to memcpy and
2425 memset, instead of the BSD functions bcopy and bzero. */
2427 #if defined(MIPS_SYSV) || defined(OSF_OS)
2428 #define TARGET_MEM_FUNCTIONS
2432 /* A part of a C `switch' statement that describes the relative
2433 costs of constant RTL expressions. It must contain `case'
2434 labels for expression codes `const_int', `const', `symbol_ref',
2435 `label_ref' and `const_double'. Each case must ultimately reach
2436 a `return' statement to return the relative cost of the use of
2437 that kind of constant value in an expression. The cost may
2438 depend on the precise value of the constant, which is available
2439 for examination in X.
2441 CODE is the expression code--redundant, since it can be obtained
2442 with `GET_CODE (X)'. */
2444 #define CONST_COSTS(X,CODE,OUTER_CODE) \
2446 /* Always return 0, since we don't have different sized \
2447 instructions, hence different costs according to Richard \
2449 return COSTS_N_INSNS (0); \
2452 return COSTS_N_INSNS (2); \
2456 rtx offset = const0_rtx; \
2457 rtx symref = eliminate_constant_term (X, &offset); \
2459 if (GET_CODE (symref) == LABEL_REF) \
2460 return COSTS_N_INSNS (2); \
2462 if (GET_CODE (symref) != SYMBOL_REF) \
2463 return COSTS_N_INSNS (4); \
2465 /* let's be paranoid.... */ \
2466 if (INTVAL (offset) < -32768 || INTVAL (offset) > 32767) \
2467 return COSTS_N_INSNS (2); \
2469 return COSTS_N_INSNS (SYMBOL_REF_FLAG (symref) ? 1 : 2); \
2473 return COSTS_N_INSNS (SYMBOL_REF_FLAG (X) ? 1 : 2); \
2475 case CONST_DOUBLE: \
2476 return COSTS_N_INSNS ((CONST_DOUBLE_HIGH (X) == 0 \
2477 && CONST_DOUBLE_LOW (X)) ? 2 : 4);
2480 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
2481 This can be used, for example, to indicate how costly a multiply
2482 instruction is. In writing this macro, you can use the construct
2483 `COSTS_N_INSNS (N)' to specify a cost equal to N fast instructions.
2485 This macro is optional; do not define it if the default cost
2486 assumptions are adequate for the target machine.
2488 If -mdebugd is used, change the multiply cost to 2, so multiply by
2489 a constant isn't converted to a series of shifts. This helps
2490 strength reduction, and also makes it easier to identify what the
2491 compiler is doing. */
2493 #define RTX_COSTS(X,CODE,OUTER_CODE) \
2496 int num_words = (GET_MODE_SIZE (GET_MODE (X)) > UNITS_PER_WORD) ? 2 : 1; \
2497 if (simple_memory_operand (X, GET_MODE (X))) \
2498 return COSTS_N_INSNS (num_words); \
2500 return COSTS_N_INSNS (2*num_words); \
2504 return COSTS_N_INSNS (6); \
2507 return COSTS_N_INSNS ((GET_MODE (X) == DImode) ? 2 : 1); \
2512 if (GET_MODE (X) == DImode) \
2513 return COSTS_N_INSNS (2); \
2515 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
2517 rtx number = XEXP (X, 1); \
2518 if (SMALL_INT_UNSIGNED (number)) \
2519 return COSTS_N_INSNS (1); \
2521 else if (SMALL_INT (number)) \
2522 return COSTS_N_INSNS (2); \
2524 return COSTS_N_INSNS (3); \
2527 return COSTS_N_INSNS (1); \
2533 if (GET_MODE (X) == DImode) \
2534 return COSTS_N_INSNS ((GET_CODE (XEXP (X, 1)) == CONST_INT) ? 12 : 4); \
2536 return COSTS_N_INSNS (1); \
2540 enum machine_mode xmode = GET_MODE (X); \
2541 if (xmode == SFmode || xmode == DFmode) \
2542 return COSTS_N_INSNS (1); \
2544 return COSTS_N_INSNS (4); \
2550 enum machine_mode xmode = GET_MODE (X); \
2551 if (xmode == SFmode || xmode == DFmode) \
2552 return COSTS_N_INSNS (2); \
2554 if (xmode == DImode) \
2555 return COSTS_N_INSNS (4); \
2557 return COSTS_N_INSNS (1); \
2561 return COSTS_N_INSNS ((GET_MODE (X) == DImode) ? 4 : 1); \
2565 enum machine_mode xmode = GET_MODE (X); \
2566 if (xmode == SFmode) \
2567 return COSTS_N_INSNS (4); \
2569 if (xmode == DFmode) \
2570 return COSTS_N_INSNS (5); \
2572 return COSTS_N_INSNS (12); \
2578 enum machine_mode xmode = GET_MODE (X); \
2579 if (xmode == SFmode) \
2580 return COSTS_N_INSNS (12); \
2582 if (xmode == DFmode) \
2583 return COSTS_N_INSNS (19); \
2585 /* fall through */ \
2589 return COSTS_N_INSNS (35);
2591 /* An expression giving the cost of an addressing mode that
2592 contains ADDRESS. If not defined, the cost is computed from the
2593 form of the ADDRESS expression and the `CONST_COSTS' values.
2595 For most CISC machines, the default cost is a good approximation
2596 of the true cost of the addressing mode. However, on RISC
2597 machines, all instructions normally have the same length and
2598 execution time. Hence all addresses will have equal costs.
2600 In cases where more than one form of an address is known, the
2601 form with the lowest cost will be used. If multiple forms have
2602 the same, lowest, cost, the one that is the most complex will be
2605 For example, suppose an address that is equal to the sum of a
2606 register and a constant is used twice in the same basic block.
2607 When this macro is not defined, the address will be computed in
2608 a register and memory references will be indirect through that
2609 register. On machines where the cost of the addressing mode
2610 containing the sum is no higher than that of a simple indirect
2611 reference, this will produce an additional instruction and
2612 possibly require an additional register. Proper specification
2613 of this macro eliminates this overhead for such machines.
2615 Similar use of this macro is made in strength reduction of loops.
2617 ADDRESS need not be valid as an address. In such a case, the
2618 cost is not relevant and can be any value; invalid addresses
2619 need not be assigned a different cost.
2621 On machines where an address involving more than one register is
2622 as cheap as an address computation involving only one register,
2623 defining `ADDRESS_COST' to reflect this can cause two registers
2624 to be live over a region of code where only one would have been
2625 if `ADDRESS_COST' were not defined in that manner. This effect
2626 should be considered in the definition of this macro.
2627 Equivalent costs should probably only be given to addresses with
2628 different numbers of registers on machines with lots of registers.
2630 This macro will normally either not be defined or be defined as
2633 #define ADDRESS_COST(ADDR) (REG_P (ADDR) ? 1 : mips_address_cost (ADDR))
2635 /* A C expression for the cost of moving data from a register in
2636 class FROM to one in class TO. The classes are expressed using
2637 the enumeration values such as `GENERAL_REGS'. A value of 2 is
2638 the default; other values are interpreted relative to that.
2640 It is not required that the cost always equal 2 when FROM is the
2641 same as TO; on some machines it is expensive to move between
2642 registers if they are not general registers.
2644 If reload sees an insn consisting of a single `set' between two
2645 hard registers, and if `REGISTER_MOVE_COST' applied to their
2646 classes returns a value of 2, reload does not check to ensure
2647 that the constraints of the insn are met. Setting a cost of
2648 other than 2 will allow reload to verify that the constraints are
2649 met. You should do this if the `movM' pattern's constraints do
2650 not allow such copying. */
2652 #define REGISTER_MOVE_COST(FROM, TO) 4 /* force reload to use constraints */
2654 /* A C expression for the cost of a branch instruction. A value of
2655 1 is the default; other values are interpreted relative to that. */
2657 #define BRANCH_COST \
2658 ((mips_cpu == PROCESSOR_R4000 || mips_cpu == PROCESSOR_R6000) ? 2 : 1)
2661 /* Used in by the peephole code. */
2662 #define classify_op(op,mode) (mips_rtx_classify[ (int)GET_CODE (op) ])
2663 #define additive_op(op,mode) ((classify_op (op,mode) & CLASS_ADD_OP) != 0)
2664 #define divmod_op(op,mode) ((classify_op (op,mode) & CLASS_DIVMOD_OP) != 0)
2665 #define unsigned_op(op,mode) ((classify_op (op,mode) & CLASS_UNSIGNED_OP) != 0)
2667 #define CLASS_ADD_OP 0x01 /* operator is PLUS/MINUS */
2668 #define CLASS_DIVMOD_OP 0x02 /* operator is {,U}{DIV,MOD} */
2669 #define CLASS_UNSIGNED_OP 0x04 /* operator is U{DIV,MOD} */
2670 #define CLASS_CMP_OP 0x08 /* operator is comparison */
2671 #define CLASS_EQUALITY_OP 0x10 /* operator is == or != */
2672 #define CLASS_FCMP_OP 0x08 /* operator is fp. compare */
2674 #define CLASS_UNS_CMP_OP (CLASS_UNSIGNED_OP | CLASS_CMP_OP)
2677 /* Optionally define this if you have added predicates to
2678 `MACHINE.c'. This macro is called within an initializer of an
2679 array of structures. The first field in the structure is the
2680 name of a predicate and the second field is an array of rtl
2681 codes. For each predicate, list all rtl codes that can be in
2682 expressions matched by the predicate. The list should have a
2683 trailing comma. Here is an example of two entries in the list
2684 for a typical RISC machine:
2686 #define PREDICATE_CODES \
2687 {"gen_reg_rtx_operand", {SUBREG, REG}}, \
2688 {"reg_or_short_cint_operand", {SUBREG, REG, CONST_INT}},
2690 Defining this macro does not affect the generated code (however,
2691 incorrect definitions that omit an rtl code that may be matched
2692 by the predicate can cause the compiler to malfunction).
2693 Instead, it allows the table built by `genrecog' to be more
2694 compact and efficient, thus speeding up the compiler. The most
2695 important predicates to include in the list specified by this
2696 macro are thoses used in the most insn patterns. */
2698 #define PREDICATE_CODES \
2699 {"uns_arith_operand", { REG, CONST_INT, SUBREG }}, \
2700 {"arith_operand", { REG, CONST_INT, SUBREG }}, \
2701 {"arith32_operand", { REG, CONST_INT, SUBREG }}, \
2702 {"reg_or_0_operand", { REG, CONST_INT, SUBREG }}, \
2703 {"small_int", { CONST_INT }}, \
2704 {"large_int", { CONST_INT }}, \
2705 {"md_register_operand", { REG }}, \
2706 {"mips_const_double_ok", { CONST_DOUBLE }}, \
2707 {"simple_memory_operand", { MEM, SUBREG }}, \
2708 {"equality_op", { EQ, NE }}, \
2709 {"cmp_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \
2711 {"cmp2_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \
2713 {"fcmp_op", { EQ, NE, GT, GE, LT, LE }}, \
2714 {"uns_cmp_op", { GTU, GEU, LTU, LEU }},
2717 /* If defined, a C statement to be executed just prior to the
2718 output of assembler code for INSN, to modify the extracted
2719 operands so they will be output differently.
2721 Here the argument OPVEC is the vector containing the operands
2722 extracted from INSN, and NOPERANDS is the number of elements of
2723 the vector which contain meaningful data for this insn. The
2724 contents of this vector are what will be used to convert the
2725 insn template into assembler code, so you can change the
2726 assembler output by changing the contents of the vector.
2728 We use it to check if the current insn needs a nop in front of it
2729 because of load delays, and also to update the delay slot
2732 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
2733 final_prescan_insn (INSN, OPVEC, NOPERANDS)
2736 /* Tell final.c how to eliminate redundant test instructions.
2737 Here we define machine-dependent flags and fields in cc_status
2738 (see `conditions.h'). */
2740 /* A C compound statement to set the components of `cc_status'
2741 appropriately for an insn INSN whose body is EXP. It is this
2742 macro's responsibility to recognize insns that set the condition
2743 code as a byproduct of other activity as well as those that
2744 explicitly set `(cc0)'.
2746 This macro is not used on machines that do not use `cc0'. */
2748 #define NOTICE_UPDATE_CC(EXP, INSN) \
2751 enum attr_type type = get_attr_type (INSN); \
2752 if (type == TYPE_ICMP || type == TYPE_FCMP) \
2757 /* A list of names to be used for additional modes for condition code
2758 values in registers. These names are added to `enum machine_mode'
2759 and all have class `MODE_CC'. By convention, they should start
2760 with `CC' and end with `mode'.
2762 You should only define this macro if your machine does not use
2763 `cc0' and only if additional modes are required.
2765 On the MIPS, we use CC_FPmode for all floating point except for not
2766 equal, CC_REV_FPmode for not equal (to reverse the sense of the
2767 jump), CC_EQmode for integer equality/inequality comparisons,
2768 CC_0mode for comparisons against 0, and CCmode for other integer
2771 #define EXTRA_CC_MODES CC_EQmode, CC_FPmode, CC_0mode, CC_REV_FPmode
2773 /* A list of C strings giving the names for the modes listed in
2774 `EXTRA_CC_MODES'. */
2776 #define EXTRA_CC_NAMES "CC_EQ", "CC_FP", "CC_0", "CC_REV_FP"
2778 /* Returns a mode from class `MODE_CC' to be used when comparison
2779 operation code OP is applied to rtx X. */
2781 #define SELECT_CC_MODE(OP, X, Y) \
2782 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
2784 : ((OP == NE) ? CC_REV_FPmode : CC_FPmode))
2787 /* Control the assembler format that we output. */
2789 /* Output at beginning of assembler file.
2790 If we are optimizing to use the global pointer, create a temporary
2791 file to hold all of the text stuff, and write it out to the end.
2792 This is needed because the MIPS assembler is evidently one pass,
2793 and if it hasn't seen the relevant .comm/.lcomm/.extern/.sdata
2794 declaration when the code is processed, it generates a two
2795 instruction sequence. */
2797 #define ASM_FILE_START(STREAM) mips_asm_file_start (STREAM)
2799 /* Output to assembler file text saying following lines
2800 may contain character constants, extra white space, comments, etc. */
2802 #define ASM_APP_ON " #APP\n"
2804 /* Output to assembler file text saying following lines
2805 no longer contain unusual constructs. */
2807 #define ASM_APP_OFF " #NO_APP\n"
2809 /* How to refer to registers in assembler output.
2810 This sequence is indexed by compiler's hard-register-number (see above).
2812 In order to support the two different conventions for register names,
2813 we use the name of a table set up in mips.c, which is overwritten
2814 if -mrnames is used. */
2816 #define REGISTER_NAMES \
2818 &mips_reg_names[ 0][0], \
2819 &mips_reg_names[ 1][0], \
2820 &mips_reg_names[ 2][0], \
2821 &mips_reg_names[ 3][0], \
2822 &mips_reg_names[ 4][0], \
2823 &mips_reg_names[ 5][0], \
2824 &mips_reg_names[ 6][0], \
2825 &mips_reg_names[ 7][0], \
2826 &mips_reg_names[ 8][0], \
2827 &mips_reg_names[ 9][0], \
2828 &mips_reg_names[10][0], \
2829 &mips_reg_names[11][0], \
2830 &mips_reg_names[12][0], \
2831 &mips_reg_names[13][0], \
2832 &mips_reg_names[14][0], \
2833 &mips_reg_names[15][0], \
2834 &mips_reg_names[16][0], \
2835 &mips_reg_names[17][0], \
2836 &mips_reg_names[18][0], \
2837 &mips_reg_names[19][0], \
2838 &mips_reg_names[20][0], \
2839 &mips_reg_names[21][0], \
2840 &mips_reg_names[22][0], \
2841 &mips_reg_names[23][0], \
2842 &mips_reg_names[24][0], \
2843 &mips_reg_names[25][0], \
2844 &mips_reg_names[26][0], \
2845 &mips_reg_names[27][0], \
2846 &mips_reg_names[28][0], \
2847 &mips_reg_names[29][0], \
2848 &mips_reg_names[30][0], \
2849 &mips_reg_names[31][0], \
2850 &mips_reg_names[32][0], \
2851 &mips_reg_names[33][0], \
2852 &mips_reg_names[34][0], \
2853 &mips_reg_names[35][0], \
2854 &mips_reg_names[36][0], \
2855 &mips_reg_names[37][0], \
2856 &mips_reg_names[38][0], \
2857 &mips_reg_names[39][0], \
2858 &mips_reg_names[40][0], \
2859 &mips_reg_names[41][0], \
2860 &mips_reg_names[42][0], \
2861 &mips_reg_names[43][0], \
2862 &mips_reg_names[44][0], \
2863 &mips_reg_names[45][0], \
2864 &mips_reg_names[46][0], \
2865 &mips_reg_names[47][0], \
2866 &mips_reg_names[48][0], \
2867 &mips_reg_names[49][0], \
2868 &mips_reg_names[50][0], \
2869 &mips_reg_names[51][0], \
2870 &mips_reg_names[52][0], \
2871 &mips_reg_names[53][0], \
2872 &mips_reg_names[54][0], \
2873 &mips_reg_names[55][0], \
2874 &mips_reg_names[56][0], \
2875 &mips_reg_names[57][0], \
2876 &mips_reg_names[58][0], \
2877 &mips_reg_names[59][0], \
2878 &mips_reg_names[60][0], \
2879 &mips_reg_names[61][0], \
2880 &mips_reg_names[62][0], \
2881 &mips_reg_names[63][0], \
2882 &mips_reg_names[64][0], \
2883 &mips_reg_names[65][0], \
2884 &mips_reg_names[66][0], \
2887 /* print-rtl.c can't use REGISTER_NAMES, since it depends on mips.c.
2888 So define this for it. */
2889 #define DEBUG_REGISTER_NAMES \
2891 "$0", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
2892 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
2893 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
2894 "t8", "t9", "k0", "k1", "gp", "sp", "$fp", "ra", \
2895 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", \
2896 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
2897 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", \
2898 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", \
2899 "hi", "lo", "$fcr31" \
2902 /* If defined, a C initializer for an array of structures
2903 containing a name and a register number. This macro defines
2904 additional names for hard registers, thus allowing the `asm'
2905 option in declarations to refer to registers using alternate
2908 We define both names for the integer registers here. */
2910 #define ADDITIONAL_REGISTER_NAMES \
2912 { "$0", 0 + GP_REG_FIRST }, \
2913 { "$1", 1 + GP_REG_FIRST }, \
2914 { "$2", 2 + GP_REG_FIRST }, \
2915 { "$3", 3 + GP_REG_FIRST }, \
2916 { "$4", 4 + GP_REG_FIRST }, \
2917 { "$5", 5 + GP_REG_FIRST }, \
2918 { "$6", 6 + GP_REG_FIRST }, \
2919 { "$7", 7 + GP_REG_FIRST }, \
2920 { "$8", 8 + GP_REG_FIRST }, \
2921 { "$9", 9 + GP_REG_FIRST }, \
2922 { "$10", 10 + GP_REG_FIRST }, \
2923 { "$11", 11 + GP_REG_FIRST }, \
2924 { "$12", 12 + GP_REG_FIRST }, \
2925 { "$13", 13 + GP_REG_FIRST }, \
2926 { "$14", 14 + GP_REG_FIRST }, \
2927 { "$15", 15 + GP_REG_FIRST }, \
2928 { "$16", 16 + GP_REG_FIRST }, \
2929 { "$17", 17 + GP_REG_FIRST }, \
2930 { "$18", 18 + GP_REG_FIRST }, \
2931 { "$19", 19 + GP_REG_FIRST }, \
2932 { "$20", 20 + GP_REG_FIRST }, \
2933 { "$21", 21 + GP_REG_FIRST }, \
2934 { "$22", 22 + GP_REG_FIRST }, \
2935 { "$23", 23 + GP_REG_FIRST }, \
2936 { "$24", 24 + GP_REG_FIRST }, \
2937 { "$25", 25 + GP_REG_FIRST }, \
2938 { "$26", 26 + GP_REG_FIRST }, \
2939 { "$27", 27 + GP_REG_FIRST }, \
2940 { "$28", 28 + GP_REG_FIRST }, \
2941 { "$29", 29 + GP_REG_FIRST }, \
2942 { "$30", 30 + GP_REG_FIRST }, \
2943 { "$31", 31 + GP_REG_FIRST }, \
2944 { "$sp", 29 + GP_REG_FIRST }, \
2945 { "$fp", 30 + GP_REG_FIRST }, \
2946 { "at", 1 + GP_REG_FIRST }, \
2947 { "v0", 2 + GP_REG_FIRST }, \
2948 { "v1", 3 + GP_REG_FIRST }, \
2949 { "a0", 4 + GP_REG_FIRST }, \
2950 { "a1", 5 + GP_REG_FIRST }, \
2951 { "a2", 6 + GP_REG_FIRST }, \
2952 { "a3", 7 + GP_REG_FIRST }, \
2953 { "t0", 8 + GP_REG_FIRST }, \
2954 { "t1", 9 + GP_REG_FIRST }, \
2955 { "t2", 10 + GP_REG_FIRST }, \
2956 { "t3", 11 + GP_REG_FIRST }, \
2957 { "t4", 12 + GP_REG_FIRST }, \
2958 { "t5", 13 + GP_REG_FIRST }, \
2959 { "t6", 14 + GP_REG_FIRST }, \
2960 { "t7", 15 + GP_REG_FIRST }, \
2961 { "s0", 16 + GP_REG_FIRST }, \
2962 { "s1", 17 + GP_REG_FIRST }, \
2963 { "s2", 18 + GP_REG_FIRST }, \
2964 { "s3", 19 + GP_REG_FIRST }, \
2965 { "s4", 20 + GP_REG_FIRST }, \
2966 { "s5", 21 + GP_REG_FIRST }, \
2967 { "s6", 22 + GP_REG_FIRST }, \
2968 { "s7", 23 + GP_REG_FIRST }, \
2969 { "t8", 24 + GP_REG_FIRST }, \
2970 { "t9", 25 + GP_REG_FIRST }, \
2971 { "k0", 26 + GP_REG_FIRST }, \
2972 { "k1", 27 + GP_REG_FIRST }, \
2973 { "gp", 28 + GP_REG_FIRST }, \
2974 { "sp", 29 + GP_REG_FIRST }, \
2975 { "fp", 30 + GP_REG_FIRST }, \
2976 { "ra", 31 + GP_REG_FIRST }, \
2977 { "$sp", 29 + GP_REG_FIRST }, \
2978 { "$fp", 30 + GP_REG_FIRST }, \
2979 { "cc", FPSW_REGNUM }, \
2982 /* Define results of standard character escape sequences. */
2983 #define TARGET_BELL 007
2984 #define TARGET_BS 010
2985 #define TARGET_TAB 011
2986 #define TARGET_NEWLINE 012
2987 #define TARGET_VT 013
2988 #define TARGET_FF 014
2989 #define TARGET_CR 015
2991 /* A C compound statement to output to stdio stream STREAM the
2992 assembler syntax for an instruction operand X. X is an RTL
2995 CODE is a value that can be used to specify one of several ways
2996 of printing the operand. It is used when identical operands
2997 must be printed differently depending on the context. CODE
2998 comes from the `%' specification that was used to request
2999 printing of the operand. If the specification was just `%DIGIT'
3000 then CODE is 0; if the specification was `%LTR DIGIT' then CODE
3001 is the ASCII code for LTR.
3003 If X is a register, this macro should print the register's name.
3004 The names can be found in an array `reg_names' whose type is
3005 `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'.
3007 When the machine description has a specification `%PUNCT' (a `%'
3008 followed by a punctuation character), this macro is called with
3009 a null pointer for X and the punctuation character for CODE.
3011 See mips.c for the MIPS specific codes. */
3013 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
3015 /* A C expression which evaluates to true if CODE is a valid
3016 punctuation character for use in the `PRINT_OPERAND' macro. If
3017 `PRINT_OPERAND_PUNCT_VALID_P' is not defined, it means that no
3018 punctuation characters (except for the standard one, `%') are
3019 used in this way. */
3021 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) mips_print_operand_punct[CODE]
3023 /* A C compound statement to output to stdio stream STREAM the
3024 assembler syntax for an instruction operand that is a memory
3025 reference whose address is ADDR. ADDR is an RTL expression.
3027 On some machines, the syntax for a symbolic address depends on
3028 the section that the address refers to. On these machines,
3029 define the macro `ENCODE_SECTION_INFO' to store the information
3030 into the `symbol_ref', and then check for it here. */
3032 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
3035 /* A C statement, to be executed after all slot-filler instructions
3036 have been output. If necessary, call `dbr_sequence_length' to
3037 determine the number of slots filled in a sequence (zero if not
3038 currently outputting a sequence), to decide how many no-ops to
3039 output, or whatever.
3041 Don't define this macro if it has nothing to do, but it is
3042 helpful in reading assembly output if the extent of the delay
3043 sequence is made explicit (e.g. with white space).
3045 Note that output routines for instructions with delay slots must
3046 be prepared to deal with not being output as part of a sequence
3047 (i.e. when the scheduling pass is not run, or when no slot
3048 fillers could be found.) The variable `final_sequence' is null
3049 when not processing a sequence, otherwise it contains the
3050 `sequence' rtx being output. */
3052 #define DBR_OUTPUT_SEQEND(STREAM) \
3055 if (set_nomacro > 0 && --set_nomacro == 0) \
3056 fputs ("\t.set\tmacro\n", STREAM); \
3058 if (set_noreorder > 0 && --set_noreorder == 0) \
3059 fputs ("\t.set\treorder\n", STREAM); \
3061 dslots_jump_filled++; \
3062 fputs ("\n", STREAM); \
3067 /* How to tell the debugger about changes of source files. Note, the
3068 mips ECOFF format cannot deal with changes of files inside of
3069 functions, which means the output of parser generators like bison
3070 is generally not debuggable without using the -l switch. Lose,
3071 lose, lose. Silicon graphics seems to want all .file's hardwired
3074 #ifndef SET_FILE_NUMBER
3075 #define SET_FILE_NUMBER() ++num_source_filenames
3078 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
3079 mips_output_filename (STREAM, NAME)
3081 /* This is how to output a note the debugger telling it the line number
3082 to which the following sequence of instructions corresponds.
3083 Silicon graphics puts a label after each .loc. */
3085 #ifndef LABEL_AFTER_LOC
3086 #define LABEL_AFTER_LOC(STREAM)
3089 #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \
3090 mips_output_lineno (STREAM, LINE)
3092 /* The MIPS implementation uses some labels for it's own purposed. The
3093 following lists what labels are created, and are all formed by the
3094 pattern $L[a-z].*. The machine independent portion of GCC creates
3095 labels matching: $L[A-Z][0-9]+ and $L[0-9]+.
3097 LM[0-9]+ Silicon Graphics/ECOFF stabs label before each stmt.
3098 $Lb[0-9]+ Begin blocks for MIPS debug support
3099 $Lc[0-9]+ Label for use in s<xx> operation.
3100 $Le[0-9]+ End blocks for MIPS debug support
3101 $Lp\..+ Half-pic labels. */
3103 /* This is how to output the definition of a user-level label named NAME,
3104 such as the label on a static function or variable NAME.
3106 If we are optimizing the gp, remember that this label has been put
3107 out, so we know not to emit an .extern for it in mips_asm_file_end.
3108 We use one of the common bits in the IDENTIFIER tree node for this,
3109 since those bits seem to be unused, and we don't have any method
3110 of getting the decl nodes from the name. */
3112 #define ASM_OUTPUT_LABEL(STREAM,NAME) \
3114 assemble_name (STREAM, NAME); \
3115 fputs (":\n", STREAM); \
3119 /* A C statement (sans semicolon) to output to the stdio stream
3120 STREAM any text necessary for declaring the name NAME of an
3121 initialized variable which is being defined. This macro must
3122 output the label definition (perhaps using `ASM_OUTPUT_LABEL').
3123 The argument DECL is the `VAR_DECL' tree node representing the
3126 If this macro is not defined, then the variable name is defined
3127 in the usual manner as a label (by means of `ASM_OUTPUT_LABEL'). */
3129 #define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \
3132 mips_declare_object (STREAM, NAME, "", ":\n", 0); \
3133 HALF_PIC_DECLARE (NAME); \
3138 /* This is how to output a command to make the user-level label named NAME
3139 defined for reference from other files. */
3141 #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
3143 fputs ("\t.globl\t", STREAM); \
3144 assemble_name (STREAM, NAME); \
3145 fputs ("\n", STREAM); \
3148 /* This says how to define a global common symbol. */
3150 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
3151 mips_declare_object (STREAM, NAME, "\n\t.comm\t", ",%u\n", (ROUNDED))
3153 /* This says how to define a local common symbol (ie, not visible to
3156 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
3157 mips_declare_object (STREAM, NAME, "\n\t.lcomm\t", ",%u\n", (ROUNDED))
3160 /* This says how to output an external. It would be possible not to
3161 output anything and let undefined symbol become external. However
3162 the assembler uses length information on externals to allocate in
3163 data/sdata bss/sbss, thereby saving exec time. */
3165 #define ASM_OUTPUT_EXTERNAL(STREAM,DECL,NAME) \
3166 mips_output_external(STREAM,DECL,NAME)
3168 /* This says what to print at the end of the assembly file */
3169 #define ASM_FILE_END(STREAM) mips_asm_file_end(STREAM)
3172 /* This is how to declare a function name. The actual work of
3173 emitting the label is moved to function_prologue, so that we can
3174 get the line number correctly emitted before the .ent directive,
3175 and after any .file directives.
3177 Also, switch files if we are optimizing the global pointer. */
3179 #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \
3181 extern FILE *asm_out_text_file; \
3182 if (TARGET_GP_OPT) \
3183 STREAM = asm_out_text_file; \
3185 current_function_name = NAME; \
3186 HALF_PIC_DECLARE (NAME); \
3189 /* This is how to output a reference to a user-level label named NAME.
3190 `assemble_name' uses this. */
3192 #define ASM_OUTPUT_LABELREF(STREAM,NAME) fprintf (STREAM, "%s", NAME)
3194 /* This is how to output an internal numbered label where
3195 PREFIX is the class of label and NUM is the number within the class. */
3197 #define ASM_OUTPUT_INTERNAL_LABEL(STREAM,PREFIX,NUM) \
3198 fprintf (STREAM, "$%s%d:\n", PREFIX, NUM)
3200 /* This is how to store into the string LABEL
3201 the symbol_ref name of an internal numbered label where
3202 PREFIX is the class of label and NUM is the number within the class.
3203 This is suitable for output with `assemble_name'. */
3205 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
3206 sprintf (LABEL, "*$%s%d", PREFIX, NUM)
3208 /* This is how to output an assembler line defining a `double' constant. */
3210 #define ASM_OUTPUT_DOUBLE(STREAM,VALUE) \
3211 mips_output_double (STREAM, VALUE)
3214 /* This is how to output an assembler line defining a `float' constant. */
3216 #define ASM_OUTPUT_FLOAT(STREAM,VALUE) \
3217 mips_output_float (STREAM, VALUE)
3220 /* This is how to output an assembler line defining an `int' constant. */
3222 #define ASM_OUTPUT_INT(STREAM,VALUE) \
3224 fprintf (STREAM, "\t.word\t"); \
3225 output_addr_const (STREAM, (VALUE)); \
3226 fprintf (STREAM, "\n"); \
3229 /* Likewise for `char' and `short' constants. */
3231 #define ASM_OUTPUT_SHORT(STREAM,VALUE) \
3233 fprintf (STREAM, "\t.half\t"); \
3234 output_addr_const (STREAM, (VALUE)); \
3235 fprintf (STREAM, "\n"); \
3238 #define ASM_OUTPUT_CHAR(STREAM,VALUE) \
3240 fprintf (STREAM, "\t.byte\t"); \
3241 output_addr_const (STREAM, (VALUE)); \
3242 fprintf (STREAM, "\n"); \
3245 /* This is how to output an assembler line for a numeric constant byte. */
3247 #define ASM_OUTPUT_BYTE(STREAM,VALUE) \
3248 fprintf (STREAM, "\t.byte\t0x%x\n", (VALUE))
3250 /* This is how to output an element of a case-vector that is absolute. */
3252 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
3253 fprintf (STREAM, "\t.word\t$L%d\n", VALUE)
3255 /* This is how to output an element of a case-vector that is relative.
3256 (We do not use such vectors,
3257 but we must define this macro anyway.) */
3259 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, VALUE, REL) \
3260 fprintf (STREAM, "\t.word\t$L%d-$L%d\n", VALUE, REL)
3262 /* This is how to emit the initial label for switch statements. We
3263 need to put the switch labels somewhere else from the text section,
3264 because the MIPS assembler gets real confused about line numbers if
3265 .word's appear in the text section. */
3267 #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, JUMPTABLE) \
3270 ASM_OUTPUT_ALIGN (STREAM, 2); \
3271 ASM_OUTPUT_INTERNAL_LABEL (STREAM, PREFIX, NUM); \
3274 /* This is how to output an assembler line
3275 that says to advance the location counter
3276 to a multiple of 2**LOG bytes. */
3278 #define ASM_OUTPUT_ALIGN(STREAM,LOG) \
3280 int mask = (1 << (LOG)) - 1; \
3281 fprintf (STREAM, "\t.align\t%d\n", (LOG)); \
3284 /* This is how to output an assembler line to to advance the location
3285 counter by SIZE bytes. */
3287 #define ASM_OUTPUT_SKIP(STREAM,SIZE) \
3288 fprintf (STREAM, "\t.space\t%u\n", (SIZE))
3291 /* This is how to output a string. */
3292 #define ASM_OUTPUT_ASCII(STREAM, STRING, LEN) \
3294 register int i, c, len = (LEN), cur_pos = 17; \
3295 register unsigned char *string = (unsigned char *)(STRING); \
3296 fprintf ((STREAM), "\t.ascii\t\""); \
3297 for (i = 0; i < len; i++) \
3299 register int c = string[i]; \
3305 putc ('\\', (STREAM)); \
3306 putc (c, (STREAM)); \
3310 case TARGET_NEWLINE: \
3311 fputs ("\\n", (STREAM)); \
3313 && (((c = string[i+1]) >= '\040' && c <= '~') \
3314 || c == TARGET_TAB)) \
3315 cur_pos = 32767; /* break right here */ \
3321 fputs ("\\t", (STREAM)); \
3326 fputs ("\\f", (STREAM)); \
3331 fputs ("\\b", (STREAM)); \
3336 fputs ("\\r", (STREAM)); \
3341 if (c >= ' ' && c < 0177) \
3343 putc (c, (STREAM)); \
3348 fprintf ((STREAM), "\\%03o", c); \
3353 if (cur_pos > 72 && i+1 < len) \
3356 fprintf ((STREAM), "\"\n\t.ascii\t\""); \
3359 fprintf ((STREAM), "\"\n"); \
3362 /* Handle certain cpp directives used in header files on sysV. */
3363 #define SCCS_DIRECTIVE
3365 /* Output #ident as a in the read-only data section. */
3366 #define ASM_OUTPUT_IDENT(FILE, STRING) \
3369 int size = strlen (p) + 1; \
3371 assemble_string (p, size); \
3375 /* Define the strings to put out for each section in the object file. */
3376 #define TEXT_SECTION_ASM_OP "\t.text" /* instructions */
3377 #define DATA_SECTION_ASM_OP "\t.data" /* large data */
3378 #define SDATA_SECTION_ASM_OP "\t.sdata" /* small data */
3379 #define RDATA_SECTION_ASM_OP "\t.rdata" /* read-only data */
3380 #define READONLY_DATA_SECTION rdata_section
3382 /* What other sections we support other than the normal .data/.text. */
3384 #define EXTRA_SECTIONS in_sdata, in_rdata, in_last_p1
3386 /* Define the additional functions to select our additional sections. */
3388 /* on the MIPS it is not a good idea to put constants in the text
3389 section, since this defeats the sdata/data mechanism. This is
3390 especially true when -O is used. In this case an effort is made to
3391 address with faster (gp) register relative addressing, which can
3392 only get at sdata and sbss items (there is no stext !!) However,
3393 if the constant is too large for sdata, and it's readonly, it
3394 will go into the .rdata section. */
3396 #define EXTRA_SECTION_FUNCTIONS \
3400 if (in_section != in_sdata) \
3402 fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
3403 in_section = in_sdata; \
3410 if (in_section != in_rdata) \
3412 fprintf (asm_out_file, "%s\n", RDATA_SECTION_ASM_OP); \
3413 in_section = in_rdata; \
3417 /* Given a decl node or constant node, choose the section to output it in
3418 and select that section. */
3420 #define SELECT_RTX_SECTION(MODE,RTX) \
3422 if ((GET_MODE_SIZE(MODE) / BITS_PER_UNIT) <= mips_section_threshold \
3423 && mips_section_threshold > 0) \
3429 #define SELECT_SECTION(DECL,RELOC) \
3431 if (int_size_in_bytes (TREE_TYPE (DECL)) <= mips_section_threshold \
3432 && mips_section_threshold > 0) \
3434 else if (TREE_CODE (DECL) == STRING_CST) \
3436 if (flag_writable_strings) \
3441 else if (TREE_CODE (DECL) != VAR_DECL) \
3443 else if (!TREE_READONLY (DECL)) \
3450 /* Store in OUTPUT a string (made with alloca) containing
3451 an assembler-name for a local static variable named NAME.
3452 LABELNO is an integer which is different for each call. */
3454 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
3455 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
3456 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
3458 #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
3461 fprintf (STREAM, "\tsubu\t%s,%s,8\n\tsw\t%s,0(%s)\n", \
3462 reg_names[STACK_POINTER_REGNUM], \
3463 reg_names[STACK_POINTER_REGNUM], \
3465 reg_names[STACK_POINTER_REGNUM]); \
3469 #define ASM_OUTPUT_REG_POP(STREAM,REGNO) \
3472 if (! set_noreorder) \
3473 fprintf (STREAM, "\t.set\tnoreorder\n"); \
3475 dslots_load_total++; \
3476 dslots_load_filled++; \
3477 fprintf (STREAM, "\tlw\t%s,0(%s)\n\taddu\t%s,%s,8\n", \
3479 reg_names[STACK_POINTER_REGNUM], \
3480 reg_names[STACK_POINTER_REGNUM], \
3481 reg_names[STACK_POINTER_REGNUM]); \
3483 if (! set_noreorder) \
3484 fprintf (STREAM, "\t.set\treorder\n"); \
3488 /* Define the parentheses used to group arithmetic operations
3489 in assembler code. */
3491 #define ASM_OPEN_PAREN "("
3492 #define ASM_CLOSE_PAREN ")"
3494 /* How to start an assembler comment. */
3495 #ifndef ASM_COMMENT_START
3496 #define ASM_COMMENT_START "\t\t# "
3501 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
3502 and mips-tdump.c to print them out.
3504 These must match the corresponding definitions in gdb/mipsread.c.
3505 Unfortunately, gcc and gdb do not currently share any directories. */
3507 #define CODE_MASK 0x8F300
3508 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
3509 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
3510 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
3513 /* Default definitions for size_t and ptrdiff_t. */
3516 #define SIZE_TYPE "unsigned int"
3519 #ifndef PTRDIFF_TYPE
3520 #define PTRDIFF_TYPE "int"