1 /* Definitions of target machine for GNU compiler,
2 for Motorola M*CORE Processor.
3 Copyright (C) 1993-2024 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
24 /* RBE: need to move these elsewhere. */
26 #define MCORE_STRUCT_ARGS
27 /* RBE: end of "move elsewhere". */
29 /* Run-time Target Specification. */
32 /* Get tree.cc to declare a target-specific specialization of
33 merge_decl_attributes. */
34 #define TARGET_DLLIMPORT_DECL_ATTRIBUTES 1
36 #define TARGET_CPU_CPP_BUILTINS() \
39 builtin_define ("__mcore__"); \
40 builtin_define ("__MCORE__"); \
41 if (TARGET_LITTLE_END) \
42 builtin_define ("__MCORELE__"); \
44 builtin_define ("__MCOREBE__"); \
46 builtin_define ("__M340__"); \
48 builtin_define ("__M210__"); \
53 #define CPP_SPEC "%{m210:%{mlittle-endian:%ethe m210 does not have little endian support}}"
55 /* We don't have a -lg library, so don't put it in the list. */
57 #define LIB_SPEC "%{!shared: %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}}"
60 #define ASM_SPEC "%{mbig-endian:-EB} %{m210:-cpu=210 -EB}"
63 #define LINK_SPEC "%{mbig-endian:-EB} %{m210:-EB} -X"
65 #define TARGET_DEFAULT \
72 #ifndef MULTILIB_DEFAULTS
73 #define MULTILIB_DEFAULTS { "mlittle-endian", "m340" }
76 /* The ability to have 4 byte alignment is being suppressed for now.
77 If this ability is reenabled, you must disable the definition below
78 *and* edit t-mcore to enable multilibs for 4 byte alignment code. */
80 #define TARGET_8ALIGN 1
82 extern char * mcore_current_function_name
;
84 /* Target machine storage Layout. */
86 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
87 if (GET_MODE_CLASS (MODE) == MODE_INT \
88 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
94 /* Define this if most significant bit is lowest numbered
95 in instructions that operate on numbered bit-fields. */
96 #define BITS_BIG_ENDIAN 0
98 /* Define this if most significant byte of a word is the lowest numbered. */
99 #define BYTES_BIG_ENDIAN (! TARGET_LITTLE_END)
101 /* Define this if most significant word of a multiword number is the lowest
103 #define WORDS_BIG_ENDIAN (! TARGET_LITTLE_END)
105 #define MAX_BITS_PER_WORD 32
107 /* Width of a word, in units (bytes). */
108 #define UNITS_PER_WORD 4
110 /* A C expression for the size in bits of the type `long long' on the
111 target machine. If you don't define this, the default is two
113 #define LONG_LONG_TYPE_SIZE 64
115 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
116 #define PARM_BOUNDARY 32
118 /* Boundary (in *bits*) on which stack pointer should be aligned. */
119 #define STACK_BOUNDARY (TARGET_8ALIGN ? 64 : 32)
121 /* Largest increment in UNITS we allow the stack to grow in a single operation. */
122 #define STACK_UNITS_MAXSTEP 4096
124 /* Allocation boundary (in *bits*) for the code of a function. */
125 #define FUNCTION_BOUNDARY ((TARGET_OVERALIGN_FUNC) ? 32 : 16)
127 /* Alignment of field after `int : 0' in a structure. */
128 #define EMPTY_FIELD_BOUNDARY 32
130 /* No data type wants to be aligned rounder than this. */
131 #define BIGGEST_ALIGNMENT (TARGET_8ALIGN ? 64 : 32)
133 /* The best alignment to use in cases where we have a choice. */
134 #define FASTEST_ALIGNMENT 32
136 /* Every structures size must be a multiple of 8 bits. */
137 #define STRUCTURE_SIZE_BOUNDARY 8
139 /* Look at the fundamental type that is used for a bit-field and use
140 that to impose alignment on the enclosing structure.
141 struct s {int a:8}; should have same alignment as "int", not "char". */
142 #define PCC_BITFIELD_TYPE_MATTERS 1
144 /* Largest integer machine mode for structures. If undefined, the default
145 is GET_MODE_SIZE(DImode). */
146 #define MAX_FIXED_MODE_SIZE 32
148 /* Make arrays of chars word-aligned for the same reasons. */
149 #define DATA_ALIGNMENT(TYPE, ALIGN) \
150 (TREE_CODE (TYPE) == ARRAY_TYPE \
151 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
152 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
154 /* Set this nonzero if move instructions will actually fail to work
155 when given unaligned data. */
156 #define STRICT_ALIGNMENT 1
158 /* Standard register usage. */
160 /* Register allocation for our first guess
163 r1 scratch, target reg for xtrb?
167 ap arg pointer (doesn't really exist, always eliminated)
169 fp frame pointer (doesn't really exist, always eliminated)
170 x19 two control registers. */
172 /* Number of actual hardware registers.
173 The hardware registers are assigned numbers for the compiler
174 from 0 to just below FIRST_PSEUDO_REGISTER.
175 All registers that the compiler knows about must be given numbers,
176 even those that are not normally considered general registers.
178 MCore has 16 integer registers and 2 control registers + the arg
181 #define FIRST_PSEUDO_REGISTER 20
183 #define R1_REG 1 /* Where literals are forced. */
184 #define LK_REG 15 /* Overloaded on general register. */
185 #define AP_REG 16 /* Fake arg pointer register. */
186 /* RBE: mcore.md depends on CC_REG being set to 17. */
187 #define CC_REG 17 /* Can't name it C_REG. */
188 #define FP_REG 18 /* Fake frame pointer register. */
190 /* Specify the registers used for certain standard purposes.
191 The values of these macros are register numbers. */
194 #undef PC_REGNUM /* Define this if the program counter is overloaded on a register. */
195 #define STACK_POINTER_REGNUM 0 /* Register to use for pushing function arguments. */
196 #define FRAME_POINTER_REGNUM 8 /* When we need FP, use r8. */
198 /* The assembler's names for the registers. RFP need not always be used as
199 the Real framepointer; it can also be used as a normal general register.
200 Note that the name `fp' is horribly misleading since `fp' is in fact only
201 the argument-and-return-context pointer. */
202 #define REGISTER_NAMES \
204 "sp", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
205 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
206 "apvirtual", "c", "fpvirtual", "x19" \
209 /* 1 for registers that have pervasive standard uses
210 and are not available for the register allocator. */
211 #define FIXED_REGISTERS \
212 /* r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 ap c fp x19 */ \
213 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1}
215 /* 1 for registers not available across function calls.
216 These must include the FIXED_REGISTERS and also any
217 registers that can be used without being saved.
218 The latter must include the registers where values are returned
219 and the register where structure-value addresses are passed.
220 Aside from that, you can include as many other registers as you like. */
222 /* RBE: r15 {link register} not available across calls,
223 But we don't mark it that way here.... */
224 #define CALL_USED_REGISTERS \
225 /* r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 ap c fp x19 */ \
226 { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1}
228 /* The order in which register should be allocated. */
229 #define REG_ALLOC_ORDER \
230 /* r7 r6 r5 r4 r3 r2 r15 r14 r13 r12 r11 r10 r9 r8 r1 r0 ap c fp x19*/ \
231 { 7, 6, 5, 4, 3, 2, 15, 14, 13, 12, 11, 10, 9, 8, 1, 0, 16, 17, 18, 19}
233 /* Definitions for register eliminations.
235 We have two registers that can be eliminated on the MCore. First, the
236 frame pointer register can often be eliminated in favor of the stack
237 pointer register. Secondly, the argument pointer register can always be
238 eliminated; it is replaced with either the stack or frame pointer. */
240 /* Base register for access to arguments of the function. */
241 #define ARG_POINTER_REGNUM 16
243 /* Register in which the static-chain is passed to a function. */
244 #define STATIC_CHAIN_REGNUM 1
246 /* This is an array of structures. Each structure initializes one pair
247 of eliminable registers. The "from" register number is given first,
248 followed by "to". Eliminations of the same "from" register are listed
249 in order of preference. */
250 #define ELIMINABLE_REGS \
251 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
252 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
253 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},}
255 /* Define the offset between two registers, one to be eliminated, and the other
256 its replacement, at the start of a routine. */
257 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
258 OFFSET = mcore_initial_elimination_offset (FROM, TO)
260 /* Define the classes of registers for register constraints in the
261 machine description. Also define ranges of constants.
263 One of the classes must always be named ALL_REGS and include all hard regs.
264 If there is more than one class, another class must be named NO_REGS
265 and contain no registers.
267 The name GENERAL_REGS must be the name of a class (or an alias for
268 another name such as ALL_REGS). This is the class of registers
269 that is allowed by "g" or "r" in a register constraint.
270 Also, registers outside this class are allocated only when
271 instructions express preferences for them.
273 The classes must be numbered in nondecreasing order; that is,
274 a larger-numbered class must never be contained completely
275 in a smaller-numbered class.
277 For any two classes, it is very desirable that there be another
278 class that represents their union. */
280 /* The MCore has only general registers. There are
281 also some special purpose registers: the T bit register, the
282 procedure Link and the Count Registers. */
294 #define N_REG_CLASSES (int) LIM_REG_CLASSES
297 /* Give names of register classes as strings for dump file. */
298 #define REG_CLASS_NAMES \
308 /* Define which registers fit in which classes.
309 This is an initializer for a vector of HARD_REG_SET
310 of length N_REG_CLASSES. */
312 /* ??? STACK_POINTER_REGNUM should be excluded from LRW_REGS. */
313 #define REG_CLASS_CONTENTS \
315 {0x000000}, /* NO_REGS */ \
316 {0x000002}, /* ONLYR1_REGS */ \
317 {0x007FFE}, /* LRW_REGS */ \
318 {0x01FFFF}, /* GENERAL_REGS */ \
319 {0x020000}, /* C_REGS */ \
320 {0x0FFFFF} /* ALL_REGS */ \
323 /* The same information, inverted:
324 Return the class number of the smallest class containing
325 reg number REGNO. This could be a conditional expression
326 or could index an array. */
328 extern const enum reg_class regno_reg_class
[FIRST_PSEUDO_REGISTER
];
329 #define REGNO_REG_CLASS(REGNO) ((REGNO) < FIRST_PSEUDO_REGISTER ? regno_reg_class[REGNO] : NO_REGS)
331 /* When this hook returns true for MODE, the compiler allows
332 registers explicitly used in the rtl to be used as spill registers
333 but prevents the compiler from extending the lifetime of these
335 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
337 /* The class value for index registers, and the one for base regs. */
338 #define INDEX_REG_CLASS NO_REGS
339 #define BASE_REG_CLASS GENERAL_REGS
341 /* Convenience wrappers around insn_const_int_ok_for_constraint. */
342 #define CONST_OK_FOR_I(VALUE) \
343 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_I)
344 #define CONST_OK_FOR_J(VALUE) \
345 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_J)
346 #define CONST_OK_FOR_L(VALUE) \
347 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_L)
348 #define CONST_OK_FOR_K(VALUE) \
349 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_K)
350 #define CONST_OK_FOR_M(VALUE) \
351 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_M)
352 #define CONST_OK_FOR_N(VALUE) \
353 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_N)
354 #define CONST_OK_FOR_O(VALUE) \
355 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_O)
356 #define CONST_OK_FOR_P(VALUE) \
357 insn_const_int_ok_for_constraint (VALUE, CONSTRAINT_P)
359 /* Given an rtx X being reloaded into a reg required to be
360 in class CLASS, return the class of reg to actually use.
361 In general this is just CLASS; but on some machines
362 in some cases it is preferable to use a more restrictive class. */
363 #define PREFERRED_RELOAD_CLASS(X, CLASS) mcore_reload_class (X, CLASS)
365 /* Return the register class of a scratch register needed to copy IN into
366 or out of a register in CLASS in MODE. If it can be done directly,
367 NO_REGS is returned. */
368 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
369 mcore_secondary_reload_class (CLASS, MODE, X)
371 /* Return the maximum number of consecutive registers
372 needed to represent mode MODE in a register of class CLASS.
374 On MCore this is the size of MODE in words. */
375 #define CLASS_MAX_NREGS(CLASS, MODE) \
376 (ROUND_ADVANCE (GET_MODE_SIZE (MODE)))
378 /* Stack layout; function entry, exit and calling. */
380 /* Define the number of register that can hold parameters.
381 These two macros are used only in other macro definitions below. */
383 #define FIRST_PARM_REG 2
384 #define FIRST_RET_REG 2
386 /* Define this if pushing a word on the stack
387 makes the stack pointer a smaller address. */
388 #define STACK_GROWS_DOWNWARD 1
390 /* If defined, the maximum amount of space required for outgoing arguments
391 will be computed and placed into the variable
392 `crtl->outgoing_args_size'. No space will be pushed
393 onto the stack for each call; instead, the function prologue should
394 increase the stack frame size by this amount. */
395 #define ACCUMULATE_OUTGOING_ARGS 1
397 /* Offset of first parameter from the argument pointer register value. */
398 #define FIRST_PARM_OFFSET(FNDECL) 0
400 /* Define how to find the value returned by a function.
401 VALTYPE is the data type of the value (as a tree).
402 If the precise function being called is known, FUNC is its FUNCTION_DECL;
403 otherwise, FUNC is 0. */
404 #define FUNCTION_VALUE(VALTYPE, FUNC) mcore_function_value (VALTYPE, FUNC)
406 /* Don't default to pcc-struct-return, because gcc is the only compiler, and
407 we want to retain compatibility with older gcc versions. */
408 #define DEFAULT_PCC_STRUCT_RETURN 0
410 /* Define how to find the value returned by a library function
411 assuming the value has mode MODE. */
412 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_RET_REG)
414 /* 1 if N is a possible register number for a function value.
415 On the MCore, only r4 can return results. */
416 #define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == FIRST_RET_REG)
418 /* 1 if N is a possible register number for function argument passing. */
419 #define FUNCTION_ARG_REGNO_P(REGNO) \
420 ((REGNO) >= FIRST_PARM_REG && (REGNO) < (NPARM_REGS + FIRST_PARM_REG))
422 /* Define a data type for recording info about an argument list
423 during the scan of that argument list. This data type should
424 hold all necessary information about the function itself
425 and about the args processed so far, enough to enable macros
426 such as FUNCTION_ARG to determine where the next arg should go.
428 On MCore, this is a single integer, which is a number of words
429 of arguments scanned so far (including the invisible argument,
430 if any, which holds the structure-value-address).
431 Thus NARGREGS or more means all following args should go on the stack. */
432 #define CUMULATIVE_ARGS int
434 #define ROUND_ADVANCE(SIZE) \
435 ((SIZE + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
437 /* Round a register number up to a proper boundary for an arg of mode
440 We round to an even reg for things larger than a word. */
441 #define ROUND_REG(X, MODE) \
443 && GET_MODE_UNIT_SIZE ((MODE)) > UNITS_PER_WORD) \
444 ? ((X) + ((X) & 1)) : (X))
447 /* Initialize a variable CUM of type CUMULATIVE_ARGS
448 for a call to a function whose data type is FNTYPE.
449 For a library call, FNTYPE is 0.
451 On MCore, the offset always starts at 0: the first parm reg is always
453 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
456 /* Call the function profiler with a given profile label. */
457 #define FUNCTION_PROFILER(STREAM,LABELNO) \
459 fprintf (STREAM, " trap 1\n"); \
460 fprintf (STREAM, " .align 2\n"); \
461 fprintf (STREAM, " .long LP%d\n", (LABELNO)); \
464 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
465 the stack pointer does not matter. The value is tested only in
466 functions that have frame pointers.
467 No definition is equivalent to always zero. */
468 #define EXIT_IGNORE_STACK 0
470 /* Length in units of the trampoline for entering a nested function. */
471 #define TRAMPOLINE_SIZE 12
473 /* Alignment required for a trampoline in bits. */
474 #define TRAMPOLINE_ALIGNMENT 32
476 /* Macros to check register numbers against specific register classes. */
478 /* These assume that REGNO is a hard or pseudo reg number.
479 They give nonzero only if REGNO is a hard reg of the suitable class
480 or a pseudo reg currently allocated to a suitable hard reg.
481 Since they use reg_renumber, they are safe only once reg_renumber
482 has been allocated, which happens in reginfo.cc during register
484 #define REGNO_OK_FOR_BASE_P(REGNO) \
485 ((REGNO) < AP_REG || (unsigned) reg_renumber[(REGNO)] < AP_REG)
487 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
489 /* Maximum number of registers that can appear in a valid memory
491 #define MAX_REGS_PER_ADDRESS 1
493 /* Recognize any constant value that is a valid address. */
494 #define CONSTANT_ADDRESS_P(X) (GET_CODE (X) == LABEL_REF)
496 /* Specify the machine mode that this machine uses
497 for the index in the tablejump instruction. */
498 #define CASE_VECTOR_MODE SImode
500 /* 'char' is signed by default. */
501 #define DEFAULT_SIGNED_CHAR 0
504 #define SIZE_TYPE "unsigned int"
507 #define PTRDIFF_TYPE "int"
510 #define WCHAR_TYPE "long int"
512 #undef WCHAR_TYPE_SIZE
513 #define WCHAR_TYPE_SIZE BITS_PER_WORD
515 /* Max number of bytes we can move from memory to memory
516 in one reasonably fast instruction. */
519 /* Define if operations between registers always perform the operation
520 on the full register even if a narrower mode is specified. */
521 #define WORD_REGISTER_OPERATIONS 1
523 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
524 will either zero-extend or sign-extend. The value of this macro should
525 be the code that says which one of the two operations is implicitly
526 done, UNKNOWN if none. */
527 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
529 /* Nonzero if access to memory by bytes is slow and undesirable. */
530 #define SLOW_BYTE_ACCESS TARGET_SLOW_BYTES
532 /* Shift counts are truncated to 6-bits (0 to 63) instead of the expected
533 5-bits, so we cannot define SHIFT_COUNT_TRUNCATED to true for this
535 #define SHIFT_COUNT_TRUNCATED 0
537 /* Define this if addresses of constant functions
538 shouldn't be put through pseudo regs where they can be cse'd.
539 Desirable on machines where ordinary constants are expensive
540 but a CALL with constant address is cheap. */
541 /* Why is this defined??? -- dac */
542 #define NO_FUNCTION_CSE 1
544 /* The machine modes of pointers and functions. */
546 #define FUNCTION_MODE Pmode
548 /* Compute extra cost of moving data between one register class
549 and another. All register moves are cheap. */
550 #define REGISTER_MOVE_COST(MODE, SRCCLASS, DSTCLASS) 2
552 /* Assembler output control. */
553 #define ASM_COMMENT_START "\t//"
555 #define ASM_APP_ON "// inline asm begin\n"
556 #define ASM_APP_OFF "// inline asm end\n"
558 #define FILE_ASM_OP "\t.file\n"
560 /* Switch to the text or data segment. */
561 #define TEXT_SECTION_ASM_OP "\t.text"
562 #define DATA_SECTION_ASM_OP "\t.data"
564 /* Switch into a generic section. */
565 #undef TARGET_ASM_NAMED_SECTION
566 #define TARGET_ASM_NAMED_SECTION mcore_asm_named_section
568 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (SImode, LK_REG)
570 /* This is how to output an insn to push a register on the stack.
571 It need not be very fast code. */
572 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
573 fprintf (FILE, "\tsubi\t %s,%d\n\tstw\t %s,(%s)\n", \
574 reg_names[STACK_POINTER_REGNUM], \
575 (STACK_BOUNDARY / BITS_PER_UNIT), \
577 reg_names[STACK_POINTER_REGNUM])
579 /* Length in instructions of the code output by ASM_OUTPUT_REG_PUSH. */
580 #define REG_PUSH_LENGTH 2
582 /* This is how to output an insn to pop a register from the stack. */
583 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
584 fprintf (FILE, "\tldw\t %s,(%s)\n\taddi\t %s,%d\n", \
586 reg_names[STACK_POINTER_REGNUM], \
587 reg_names[STACK_POINTER_REGNUM], \
588 (STACK_BOUNDARY / BITS_PER_UNIT))
591 /* Output a reference to a label. */
592 #undef ASM_OUTPUT_LABELREF
593 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
594 fprintf (STREAM, "%s%s", USER_LABEL_PREFIX, \
595 (* targetm.strip_name_encoding) (NAME))
597 /* This is how to output an assembler line
598 that says to advance the location counter
599 to a multiple of 2**LOG bytes. */
600 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
602 fprintf (FILE, "\t.align\t%d\n", LOG)
604 #ifndef ASM_DECLARE_RESULT
605 #define ASM_DECLARE_RESULT(FILE, RESULT)
608 #define MULTIPLE_SYMBOL_SPACES 1
610 #define SUPPORTS_ONE_ONLY 1
612 /* A pair of macros to output things for the callgraph data.
613 VALUE means (to the tools that reads this info later):
614 0 a call from src to dst
615 1 the call is special (e.g. dst is "unknown" or "alloca")
616 2 the call is special (e.g., the src is a table instead of routine)
618 Frame sizes are augmented with timestamps to help later tools
619 differentiate between static entities with same names in different
621 extern long mcore_current_compilation_timestamp
;
622 #define ASM_OUTPUT_CG_NODE(FILE,SRCNAME,VALUE) \
625 if (mcore_current_compilation_timestamp == 0) \
626 mcore_current_compilation_timestamp = time (0); \
627 fprintf ((FILE),"\t.equ\t__$frame$size$_%s_$_%08lx,%d\n", \
628 (SRCNAME), mcore_current_compilation_timestamp, (VALUE)); \
632 #define ASM_OUTPUT_CG_EDGE(FILE,SRCNAME,DSTNAME,VALUE) \
635 fprintf ((FILE),"\t.equ\t__$function$call$_%s_$_%s,%d\n", \
636 (SRCNAME), (DSTNAME), (VALUE)); \
640 /* Globalizing directive for a label. */
641 #define GLOBAL_ASM_OP "\t.export\t"
643 /* The prefix to add to user-visible assembler symbols. */
644 #undef USER_LABEL_PREFIX
645 #define USER_LABEL_PREFIX ""
647 /* Make an internal label into a string. */
648 #undef ASM_GENERATE_INTERNAL_LABEL
649 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
650 sprintf (STRING, "*.%s%ld", PREFIX, (long) NUM)
652 /* Jump tables must be 32 bit aligned. */
653 #undef ASM_OUTPUT_CASE_LABEL
654 #define ASM_OUTPUT_CASE_LABEL(STREAM,PREFIX,NUM,TABLE) \
655 fprintf (STREAM, "\t.align 2\n.%s%d:\n", PREFIX, NUM);
657 /* Output a relative address. Not needed since jump tables are absolute
658 but we must define it anyway. */
659 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM,BODY,VALUE,REL) \
660 fputs ("- - - ASM_OUTPUT_ADDR_DIFF_ELT called!\n", STREAM)
662 /* Output an element of a dispatch table. */
663 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE) \
664 fprintf (STREAM, "\t.long\t.L%d\n", VALUE)
666 /* Output various types of constants. */
668 /* This is how to output an assembler line
669 that says to advance the location counter by SIZE bytes. */
670 #undef ASM_OUTPUT_SKIP
671 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
672 fprintf (FILE, "\t.fill %d, 1\n", (int)(SIZE))
674 /* This says how to output an assembler line
675 to define a global common symbol, with alignment information. */
676 /* XXX - for now we ignore the alignment. */
677 #undef ASM_OUTPUT_ALIGNED_COMMON
678 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
681 if (mcore_dllexport_name_p (NAME)) \
682 MCORE_EXPORT_NAME (FILE, NAME); \
683 if (! mcore_dllimport_name_p (NAME)) \
685 fputs ("\t.comm\t", FILE); \
686 assemble_name (FILE, NAME); \
687 fprintf (FILE, ",%lu\n", (unsigned long)(SIZE)); \
692 /* This says how to output an assembler line
693 to define a local common symbol.... */
694 #undef ASM_OUTPUT_LOCAL
695 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
696 (fputs ("\t.lcomm\t", FILE), \
697 assemble_name (FILE, NAME), \
698 fprintf (FILE, ",%d\n", (int)SIZE))
700 /* ... and how to define a local common symbol whose alignment
701 we wish to specify. ALIGN comes in as bits, we have to turn
703 #undef ASM_OUTPUT_ALIGNED_LOCAL
704 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
707 fputs ("\t.bss\t", (FILE)); \
708 assemble_name ((FILE), (NAME)); \
709 fprintf ((FILE), ",%d,%d\n", (int)(SIZE), (ALIGN) / BITS_PER_UNIT);\
713 #endif /* ! GCC_MCORE_H */