]> gcc.gnu.org Git - gcc.git/blob - gcc/config/m88k/m88k.h
Added arg to RETURN_POPS_ARGS.
[gcc.git] / gcc / config / m88k / m88k.h
1 /* Definitions of target machine for GNU compiler for
2 Motorola m88100 in an 88open OCS/BCS environment.
3 Copyright (C) 1988, 89, 90, 91, 93, 94, 1995 Free Software Foundation, Inc.
4 Contributed by Michael Tiemann (tiemann@cygnus.com)
5 Enhanced by Michael Meissner (meissner@cygnus.com)
6 Version 2 port by Tom Wood (twood@pets.sps.mot.com)
7
8 This file is part of GNU CC.
9
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
13 any later version.
14
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
23
24 /* The m88100 port of GNU CC adheres to the various standards from 88open.
25 These documents are available by writing:
26
27 88open Consortium Ltd.
28 100 Homeland Court, Suite 800
29 San Jose, CA 95112
30 (408) 436-6600
31
32 In brief, the current standards are:
33
34 Binary Compatibility Standard, Release 1.1A, May 1991
35 This provides for portability of application-level software at the
36 executable level for AT&T System V Release 3.2.
37
38 Object Compatibility Standard, Release 1.1A, May 1991
39 This provides for portability of application-level software at the
40 object file and library level for C, Fortran, and Cobol, and again,
41 largely for SVR3.
42
43 Under development are standards for AT&T System V Release 4, based on the
44 [generic] System V Application Binary Interface from AT&T. These include:
45
46 System V Application Binary Interface, Motorola 88000 Processor Supplement
47 Another document from AT&T for SVR4 specific to the m88100.
48 Available from Prentice Hall.
49
50 System V Application Binary Interface, Motorola 88000 Processor Supplement,
51 Release 1.1, Draft H, May 6, 1991
52 A proposed update to the AT&T document from 88open.
53
54 System V ABI Implementation Guide for the M88000 Processor,
55 Release 1.0, January 1991
56 A companion ABI document from 88open. */
57
58 /* Other *.h files in config/m88k include this one and override certain items.
59 Currently these are sysv3.h, sysv4.h, dgux.h, dolph.h, tekXD88.h, and luna.h.
60 Additionally, sysv4.h and dgux.h include svr4.h first. All other
61 m88k targets except luna.h are based on svr3.h. */
62
63 /* Choose SVR3 as the default. */
64 #if !defined(DBX_DEBUGGING_INFO) && !defined(DWARF_DEBUGGING_INFO)
65 #include "svr3.h"
66 #endif
67 \f
68 /* External types used. */
69
70 /* What instructions are needed to manufacture an integer constant. */
71 enum m88k_instruction {
72 m88k_zero,
73 m88k_or,
74 m88k_subu,
75 m88k_or_lo16,
76 m88k_or_lo8,
77 m88k_set,
78 m88k_oru_hi16,
79 m88k_oru_or
80 };
81
82 /* Which processor to schedule for. The elements of the enumeration
83 must match exactly the cpu attribute in the m88k.md machine description. */
84
85 enum processor_type {
86 PROCESSOR_M88100,
87 PROCESSOR_M88110,
88 PROCESSOR_M88000,
89 };
90
91 /* Recast the cpu class to be the cpu attribute. */
92 #define m88k_cpu_attr ((enum attr_cpu)m88k_cpu)
93
94 /* External variables/functions defined in m88k.c. */
95
96 extern char *m88k_pound_sign;
97 extern char *m88k_short_data;
98 extern char *m88k_version;
99 extern char m88k_volatile_code;
100
101 extern unsigned m88k_gp_threshold;
102 extern int m88k_prologue_done;
103 extern int m88k_function_number;
104 extern int m88k_fp_offset;
105 extern int m88k_stack_size;
106 extern int m88k_case_index;
107
108 extern struct rtx_def *m88k_compare_reg;
109 extern struct rtx_def *m88k_compare_op0;
110 extern struct rtx_def *m88k_compare_op1;
111
112 extern enum processor_type m88k_cpu;
113
114 extern int null_prologue ();
115 extern int integer_ok_for_set ();
116 extern int m88k_debugger_offset ();
117
118 extern void emit_bcnd ();
119 extern void expand_block_move ();
120 extern void m88k_layout_frame ();
121 extern void m88k_expand_prologue ();
122 extern void m88k_begin_prologue ();
123 extern void m88k_end_prologue ();
124 extern void m88k_expand_epilogue ();
125 extern void m88k_begin_epilogue ();
126 extern void m88k_end_epilogue ();
127 extern void output_function_profiler ();
128 extern void output_function_block_profiler ();
129 extern void output_block_profiler ();
130 extern void output_file_start ();
131 extern void output_ascii ();
132 extern void output_label ();
133 extern void print_operand ();
134 extern void print_operand_address ();
135
136 extern char *output_load_const_int ();
137 extern char *output_load_const_float ();
138 extern char *output_load_const_double ();
139 extern char *output_load_const_dimode ();
140 extern char *output_and ();
141 extern char *output_ior ();
142 extern char *output_xor ();
143 extern char *output_call ();
144
145 extern struct rtx_def *emit_test ();
146 extern struct rtx_def *legitimize_address ();
147 extern struct rtx_def *legitimize_operand ();
148 extern struct rtx_def *m88k_function_arg ();
149 extern struct rtx_def *m88k_builtin_saveregs ();
150
151 extern enum m88k_instruction classify_integer ();
152
153 /* external variables defined elsewhere in the compiler */
154
155 extern int target_flags; /* -m compiler switches */
156 extern int frame_pointer_needed; /* current function has a FP */
157 extern int current_function_pretend_args_size; /* args size without ... */
158 extern int flag_delayed_branch; /* -fdelayed-branch */
159 extern int flag_pic; /* -fpic */
160 extern char * reg_names[];
161
162 /* Specify the default monitors. The meaning of these values can
163 be obtained by doing "grep MONITOR_GCC *m88k*". Generally, the
164 values downward from 0x8000 are tests that will soon go away.
165 values upward from 0x1 are generally useful tests that will remain. */
166
167 #ifndef MONITOR_GCC
168 #define MONITOR_GCC 0
169 #endif
170 \f
171 /*** Controlling the Compilation Driver, `gcc' ***/
172 /* Show we can debug even without a frame pointer. */
173 #define CAN_DEBUG_WITHOUT_FP
174
175 /* If -m88100 is in effect, add -D__m88100__; similarly for -m88110.
176 Here, the CPU_DEFAULT is assumed to be -m88100. */
177 #undef CPP_SPEC
178 #define CPP_SPEC "%{!m88000:%{!m88100:%{m88110:-D__m88110__}}} \
179 %{!m88000:%{!m88110:-D__m88100__}}"
180
181 /* LIB_SPEC, LINK_SPEC, and STARTFILE_SPEC defined in svr3.h.
182 ASM_SPEC, ASM_FINAL_SPEC, LIB_SPEC, LINK_SPEC, and STARTFILE_SPEC redefined
183 in svr4.h.
184 CPP_SPEC, ASM_SPEC, ASM_FINAL_SPEC, LIB_SPEC, LINK_SPEC, and
185 STARTFILE_SPEC redefined in dgux.h. */
186 \f
187 /*** Run-time Target Specification ***/
188
189 /* Names to predefine in the preprocessor for this target machine.
190 Redefined in sysv3.h, sysv4.h, dgux.h, and luna.h. */
191 #define CPP_PREDEFINES "-Dm88000 -Dm88k -Dunix -D__CLASSIFY_TYPE__=2"
192
193 #define TARGET_VERSION fprintf (stderr, " (%s%s)", \
194 VERSION_INFO1, VERSION_INFO2)
195
196 /* Print subsidiary information on the compiler version in use.
197 Redefined in sysv4.h, and luna.h. */
198 #define VERSION_INFO1 "88open OCS/BCS, "
199 #ifndef VERSION_INFO2
200 #define VERSION_INFO2 "$Revision: 1.61 $"
201 #endif
202
203 #ifndef VERSION_STRING
204 #define VERSION_STRING version_string
205 #ifdef __STDC__
206 #define TM_RCS_ID "@(#)" __FILE__ " $Revision: 1.61 $ " __DATE__
207 #else
208 #define TM_RCS_ID "$What$"
209 #endif /* __STDC__ */
210 #else
211 #define TM_RCS_ID "@(#)" __FILE__ " " VERSION_INFO2 " " __DATE__
212 #endif /* VERSION_STRING */
213
214 /* Run-time compilation parameters selecting different hardware subsets. */
215
216 /* Macro to define tables used to set the flags.
217 This is a list in braces of pairs in braces,
218 each pair being { "NAME", VALUE }
219 where VALUE is the bits to set or minus the bits to clear.
220 An empty string NAME is used to identify the default VALUE. */
221
222 #define MASK_88100 0x00000001 /* Target m88100 */
223 #define MASK_88110 0x00000002 /* Target m88110 */
224 #define MASK_OCS_DEBUG_INFO 0x00000004 /* Emit .tdesc info */
225 #define MASK_OCS_FRAME_POSITION 0x00000008 /* Debug frame = CFA, not r30 */
226 #define MASK_SVR4 0x00000010 /* Target is AT&T System V.4 */
227 #define MASK_SVR3 0x00000020 /* Target is AT&T System V.3 */
228 #define MASK_NO_UNDERSCORES 0x00000040 /* Don't emit a leading `_' */
229 #define MASK_BIG_PIC 0x00000080 /* PIC with large got-rel's -fPIC */
230 #define MASK_TRAP_LARGE_SHIFT 0x00000100 /* Trap if shift not <= 31 */
231 #define MASK_HANDLE_LARGE_SHIFT 0x00000200 /* Handle shift count >= 32 */
232 #define MASK_CHECK_ZERO_DIV 0x00000400 /* Check for int div. by 0 */
233 #define MASK_USE_DIV 0x00000800 /* No signed div. checks */
234 #define MASK_IDENTIFY_REVISION 0x00001000 /* Emit ident, with GCC rev */
235 #define MASK_WARN_PASS_STRUCT 0x00002000 /* Warn about passed structs */
236 #define MASK_OPTIMIZE_ARG_AREA 0x00004000 /* Save stack space */
237 #define MASK_NO_SERIALIZE_VOLATILE 0x00008000 /* Serialize volatile refs */
238
239 #define MASK_88000 (MASK_88100 | MASK_88110)
240 #define MASK_EITHER_LARGE_SHIFT (MASK_TRAP_LARGE_SHIFT | \
241 MASK_HANDLE_LARGE_SHIFT)
242
243 #define TARGET_88100 ((target_flags & MASK_88000) == MASK_88100)
244 #define TARGET_88110 ((target_flags & MASK_88000) == MASK_88110)
245 #define TARGET_88000 ((target_flags & MASK_88000) == MASK_88000)
246
247 #define TARGET_OCS_DEBUG_INFO (target_flags & MASK_OCS_DEBUG_INFO)
248 #define TARGET_OCS_FRAME_POSITION (target_flags & MASK_OCS_FRAME_POSITION)
249 #define TARGET_SVR4 (target_flags & MASK_SVR4)
250 #define TARGET_SVR3 (target_flags & MASK_SVR3)
251 #define TARGET_NO_UNDERSCORES (target_flags & MASK_NO_UNDERSCORES)
252 #define TARGET_BIG_PIC (target_flags & MASK_BIG_PIC)
253 #define TARGET_TRAP_LARGE_SHIFT (target_flags & MASK_TRAP_LARGE_SHIFT)
254 #define TARGET_HANDLE_LARGE_SHIFT (target_flags & MASK_HANDLE_LARGE_SHIFT)
255 #define TARGET_CHECK_ZERO_DIV (target_flags & MASK_CHECK_ZERO_DIV)
256 #define TARGET_USE_DIV (target_flags & MASK_USE_DIV)
257 #define TARGET_IDENTIFY_REVISION (target_flags & MASK_IDENTIFY_REVISION)
258 #define TARGET_WARN_PASS_STRUCT (target_flags & MASK_WARN_PASS_STRUCT)
259 #define TARGET_OPTIMIZE_ARG_AREA (target_flags & MASK_OPTIMIZE_ARG_AREA)
260 #define TARGET_SERIALIZE_VOLATILE (!(target_flags & MASK_NO_SERIALIZE_VOLATILE))
261
262 #define TARGET_EITHER_LARGE_SHIFT (target_flags & MASK_EITHER_LARGE_SHIFT)
263
264 /* Redefined in sysv3.h, sysv4.h, and dgux.h. */
265 #define TARGET_DEFAULT (MASK_CHECK_ZERO_DIV)
266 #define CPU_DEFAULT MASK_88100
267
268 #define TARGET_SWITCHES \
269 { \
270 { "88110", MASK_88110 }, \
271 { "88100", MASK_88100 }, \
272 { "88000", MASK_88000 }, \
273 { "ocs-debug-info", MASK_OCS_DEBUG_INFO }, \
274 { "no-ocs-debug-info", -MASK_OCS_DEBUG_INFO }, \
275 { "ocs-frame-position", MASK_OCS_FRAME_POSITION }, \
276 { "no-ocs-frame-position", -MASK_OCS_FRAME_POSITION }, \
277 { "svr4", MASK_SVR4 }, \
278 { "svr3", -MASK_SVR4 }, \
279 { "no-underscores", MASK_NO_UNDERSCORES }, \
280 { "big-pic", MASK_BIG_PIC }, \
281 { "trap-large-shift", MASK_TRAP_LARGE_SHIFT }, \
282 { "handle-large-shift", MASK_HANDLE_LARGE_SHIFT }, \
283 { "check-zero-division", MASK_CHECK_ZERO_DIV }, \
284 { "no-check-zero-division", -MASK_CHECK_ZERO_DIV }, \
285 { "use-div-instruction", MASK_USE_DIV }, \
286 { "identify-revision", MASK_IDENTIFY_REVISION }, \
287 { "warn-passed-structs", MASK_WARN_PASS_STRUCT }, \
288 { "optimize-arg-area", MASK_OPTIMIZE_ARG_AREA }, \
289 { "no-optimize-arg-area", -MASK_OPTIMIZE_ARG_AREA }, \
290 { "no-serialize-volatile", MASK_NO_SERIALIZE_VOLATILE }, \
291 { "serialize-volatile", -MASK_NO_SERIALIZE_VOLATILE }, \
292 SUBTARGET_SWITCHES \
293 /* Default switches */ \
294 { "", TARGET_DEFAULT }, \
295 }
296
297 /* Redefined in dgux.h. */
298 #define SUBTARGET_SWITCHES
299
300 /* Macro to define table for command options with values. */
301
302 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data }, \
303 { "version-", &m88k_version } }
304
305 /* Do any checking or such that is needed after processing the -m switches. */
306
307 #define OVERRIDE_OPTIONS \
308 do { \
309 register int i; \
310 \
311 if ((target_flags & MASK_88000) == 0) \
312 target_flags |= CPU_DEFAULT; \
313 \
314 if (TARGET_88110) \
315 { \
316 target_flags |= MASK_USE_DIV; \
317 target_flags &= ~MASK_CHECK_ZERO_DIV; \
318 } \
319 \
320 m88k_cpu = (TARGET_88000 ? PROCESSOR_M88000 \
321 : (TARGET_88100 ? PROCESSOR_M88100 : PROCESSOR_M88110)); \
322 \
323 if (TARGET_BIG_PIC) \
324 flag_pic = 2; \
325 \
326 if ((target_flags & MASK_EITHER_LARGE_SHIFT) == MASK_EITHER_LARGE_SHIFT) \
327 error ("-mtrap-large-shift and -mhandle-large-shift are incompatible");\
328 \
329 if (TARGET_SVR4) \
330 { \
331 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \
332 reg_names[i]--; \
333 m88k_pound_sign = "#"; \
334 } \
335 else \
336 { \
337 target_flags |= MASK_SVR3; \
338 target_flags &= ~MASK_SVR4; \
339 } \
340 \
341 if (m88k_short_data) \
342 { \
343 char *p = m88k_short_data; \
344 while (*p) \
345 if (*p >= '0' && *p <= '9') \
346 p++; \
347 else \
348 { \
349 error ("Invalid option `-mshort-data-%s'", m88k_short_data); \
350 break; \
351 } \
352 m88k_gp_threshold = atoi (m88k_short_data); \
353 if (m88k_gp_threshold > 0x7fffffff) \
354 error ("-mshort-data-%s is too large ", m88k_short_data); \
355 if (flag_pic) \
356 error ("-mshort-data-%s and PIC are incompatible", m88k_short_data); \
357 } \
358 } while (0)
359 \f
360 /*** Storage Layout ***/
361
362 /* Sizes in bits of the various types. */
363 #define CHAR_TYPE_SIZE 8
364 #define SHORT_TYPE_SIZE 16
365 #define INT_TYPE_SIZE 32
366 #define LONG_TYPE_SIZE 32
367 #define LONG_LONG_TYPE_SIZE 64
368 #define FLOAT_TYPE_SIZE 32
369 #define DOUBLE_TYPE_SIZE 64
370 #define LONG_DOUBLE_TYPE_SIZE 64
371
372 /* Define this if most significant bit is lowest numbered
373 in instructions that operate on numbered bit-fields.
374 Somewhat arbitrary. It matches the bit field patterns. */
375 #define BITS_BIG_ENDIAN 1
376
377 /* Define this if most significant byte of a word is the lowest numbered.
378 That is true on the m88000. */
379 #define BYTES_BIG_ENDIAN 1
380
381 /* Define this if most significant word of a multiword number is the lowest
382 numbered.
383 For the m88000 we can decide arbitrarily since there are no machine
384 instructions for them. */
385 #define WORDS_BIG_ENDIAN 1
386
387 /* Number of bits in an addressable storage unit */
388 #define BITS_PER_UNIT 8
389
390 /* Width in bits of a "word", which is the contents of a machine register.
391 Note that this is not necessarily the width of data type `int';
392 if using 16-bit ints on a 68000, this would still be 32.
393 But on a machine with 16-bit registers, this would be 16. */
394 #define BITS_PER_WORD 32
395
396 /* Width of a word, in units (bytes). */
397 #define UNITS_PER_WORD 4
398
399 /* Width in bits of a pointer.
400 See also the macro `Pmode' defined below. */
401 #define POINTER_SIZE 32
402
403 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
404 #define PARM_BOUNDARY 32
405
406 /* Largest alignment for stack parameters (if greater than PARM_BOUNDARY). */
407 #define MAX_PARM_BOUNDARY 64
408
409 /* Boundary (in *bits*) on which stack pointer should be aligned. */
410 #define STACK_BOUNDARY 128
411
412 /* Allocation boundary (in *bits*) for the code of a function. On the
413 m88100, it is desirable to align to a cache line. However, SVR3 targets
414 only provided 8 byte alignment. The m88110 cache is small, so align
415 to an 8 byte boundary. Pack code tightly when compiling crtstuff.c. */
416 #define FUNCTION_BOUNDARY (flag_inhibit_size_directive ? 32 : \
417 (TARGET_88100 && TARGET_SVR4 ? 128 : 64))
418
419 /* No data type wants to be aligned rounder than this. */
420 #define BIGGEST_ALIGNMENT 64
421
422 /* The best alignment to use in cases where we have a choice. */
423 #define FASTEST_ALIGNMENT (TARGET_88100 ? 32 : 64)
424
425 /* Make strings 4/8 byte aligned so strcpy from constants will be faster. */
426 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
427 ((TREE_CODE (EXP) == STRING_CST \
428 && (ALIGN) < FASTEST_ALIGNMENT) \
429 ? FASTEST_ALIGNMENT : (ALIGN))
430
431 /* Make arrays of chars 4/8 byte aligned for the same reasons. */
432 #define DATA_ALIGNMENT(TYPE, ALIGN) \
433 (TREE_CODE (TYPE) == ARRAY_TYPE \
434 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
435 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
436
437 /* Alignment of field after `int : 0' in a structure.
438 Ignored with PCC_BITFIELD_TYPE_MATTERS. */
439 /* #define EMPTY_FIELD_BOUNDARY 8 */
440
441 /* Every structure's size must be a multiple of this. */
442 #define STRUCTURE_SIZE_BOUNDARY 8
443
444 /* Set this nonzero if move instructions will actually fail to work
445 when given unaligned data. */
446 #define STRICT_ALIGNMENT 1
447
448 /* A bitfield declared as `int' forces `int' alignment for the struct. */
449 #define PCC_BITFIELD_TYPE_MATTERS 1
450
451 /* Maximum size (in bits) to use for the largest integral type that
452 replaces a BLKmode type. */
453 /* #define MAX_FIXED_MODE_SIZE 0 */
454
455 /* Check a `double' value for validity for a particular machine mode.
456 This is defined to avoid crashes outputting certain constants.
457 Since we output the number in hex, the assembler won't choke on it. */
458 /* #define CHECK_FLOAT_VALUE(MODE,VALUE) */
459
460 /* A code distinguishing the floating point format of the target machine. */
461 /* #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT */
462 \f
463 /*** Register Usage ***/
464
465 /* Number of actual hardware registers.
466 The hardware registers are assigned numbers for the compiler
467 from 0 to just below FIRST_PSEUDO_REGISTER.
468 All registers that the compiler knows about must be given numbers,
469 even those that are not normally considered general registers.
470
471 The m88100 has a General Register File (GRF) of 32 32-bit registers.
472 The m88110 adds an Extended Register File (XRF) of 32 80-bit registers. */
473 #define FIRST_PSEUDO_REGISTER 64
474 #define FIRST_EXTENDED_REGISTER 32
475
476 /* General notes on extended registers, their use and misuse.
477
478 Possible good uses:
479
480 spill area instead of memory.
481 -waste if only used once
482
483 floating point calculations
484 -probably a waste unless we have run out of general purpose registers
485
486 freeing up general purpose registers
487 -e.g. may be able to have more loop invariants if floating
488 point is moved into extended registers.
489
490
491 I've noticed wasteful moves into and out of extended registers; e.g. a load
492 into x21, then inside a loop a move into r24, then r24 used as input to
493 an fadd. Why not just load into r24 to begin with? Maybe the new cse.c
494 will address this. This wastes a move, but the load,store and move could
495 have been saved had extended registers been used throughout.
496 E.g. in the code following code, if z and xz are placed in extended
497 registers, there is no need to save preserve registers.
498
499 long c=1,d=1,e=1,f=1,g=1,h=1,i=1,j=1,k;
500
501 double z=0,xz=4.5;
502
503 foo(a,b)
504 long a,b;
505 {
506 while (a < b)
507 {
508 k = b + c + d + e + f + g + h + a + i + j++;
509 z += xz;
510 a++;
511 }
512 printf("k= %d; z=%f;\n", k, z);
513 }
514
515 I've found that it is possible to change the constraints (putting * before
516 the 'r' constraints int the fadd.ddd instruction) and get the entire
517 addition and store to go into extended registers. However, this also
518 forces simple addition and return of floating point arguments to a
519 function into extended registers. Not the correct solution.
520
521 Found the following note in local-alloc.c which may explain why I can't
522 get both registers to be in extended registers since two are allocated in
523 local-alloc and one in global-alloc. Doesn't explain (I don't believe)
524 why an extended register is used instead of just using the preserve
525 register.
526
527 from local-alloc.c:
528 We have provision to exempt registers, even when they are contained
529 within the block, that can be tied to others that are not contained in it.
530 This is so that global_alloc could process them both and tie them then.
531 But this is currently disabled since tying in global_alloc is not
532 yet implemented.
533
534 The explanation of why the preserved register is not used is as follows,
535 I believe. The registers are being allocated in order. Tying is not
536 done so efficiently, so when it comes time to do the first allocation,
537 there are no registers left to use without spilling except extended
538 registers. Then when the next pseudo register needs a hard reg, there
539 are still no registers to be had for free, but this one must be a GRF
540 reg instead of an extended reg, so a preserve register is spilled. Thus
541 the move from extended to GRF is necessitated. I do not believe this can
542 be 'fixed' through the config/*m88k* files.
543
544 gcc seems to sometimes make worse use of register allocation -- not counting
545 moves -- whenever extended registers are present. For example in the
546 whetstone, the simple for loop (slightly modified)
547 for(i = 1; i <= n1; i++)
548 {
549 x1 = (x1 + x2 + x3 - x4) * t;
550 x2 = (x1 + x2 - x3 + x4) * t;
551 x3 = (x1 - x2 + x3 + x4) * t;
552 x4 = (x1 + x2 + x3 + x4) * t;
553 }
554 in general loads the high bits of the addresses of x2-x4 and i into registers
555 outside the loop. Whenever extended registers are used, it loads all of
556 these inside the loop. My conjecture is that since the 88110 has so many
557 registers, and gcc makes no distinction at this point -- just that they are
558 not fixed, that in loop.c it believes it can expect a number of registers
559 to be available. Then it allocates 'too many' in local-alloc which causes
560 problems later. 'Too many' are allocated because a large portion of the
561 registers are extended registers and cannot be used for certain purposes
562 ( e.g. hold the address of a variable). When this loop is compiled on its
563 own, the problem does not occur. I don't know the solution yet, though it
564 is probably in the base sources. Possibly a different way to calculate
565 "threshold". */
566
567 /* 1 for registers that have pervasive standard uses and are not available
568 for the register allocator. Registers r14-r25 and x22-x29 are expected
569 to be preserved across function calls.
570
571 On the 88000, the standard uses of the General Register File (GRF) are:
572 Reg 0 = Pseudo argument pointer (hardware fixed to 0).
573 Reg 1 = Subroutine return pointer (hardware).
574 Reg 2-9 = Parameter registers (OCS).
575 Reg 10 = OCS reserved temporary.
576 Reg 11 = Static link if needed [OCS reserved temporary].
577 Reg 12 = Address of structure return (OCS).
578 Reg 13 = OCS reserved temporary.
579 Reg 14-25 = Preserved register set.
580 Reg 26-29 = Reserved by OCS and ABI.
581 Reg 30 = Frame pointer (Common use).
582 Reg 31 = Stack pointer.
583
584 The following follows the current 88open UCS specification for the
585 Extended Register File (XRF):
586 Reg 32 = x0 Always equal to zero
587 Reg 33-53 = x1-x21 Temporary registers (Caller Save)
588 Reg 54-61 = x22-x29 Preserver registers (Callee Save)
589 Reg 62-63 = x30-x31 Reserved for future ABI use.
590
591 Note: The current 88110 extended register mapping is subject to change.
592 The bias towards caller-save registers is based on the
593 presumption that memory traffic can potentially be reduced by
594 allowing the "caller" to save only that part of the register
595 which is actually being used. (i.e. don't do a st.x if a st.d
596 is sufficient). Also, in scientific code (a.k.a. Fortran), the
597 large number of variables defined in common blocks may require
598 that almost all registers be saved across calls anyway. */
599
600 #define FIXED_REGISTERS \
601 {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
602 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
603 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
604 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1}
605
606 /* 1 for registers not available across function calls.
607 These must include the FIXED_REGISTERS and also any
608 registers that can be used without being saved.
609 The latter must include the registers where values are returned
610 and the register where structure-value addresses are passed.
611 Aside from that, you can include as many other registers as you like. */
612
613 #define CALL_USED_REGISTERS \
614 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
615 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
616 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
617 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1}
618
619 /* Macro to conditionally modify fixed_regs/call_used_regs. */
620 #define CONDITIONAL_REGISTER_USAGE \
621 { \
622 if (! TARGET_88110) \
623 { \
624 register int i; \
625 for (i = FIRST_EXTENDED_REGISTER; i < FIRST_PSEUDO_REGISTER; i++) \
626 { \
627 fixed_regs[i] = 1; \
628 call_used_regs[i] = 1; \
629 } \
630 } \
631 if (flag_pic) \
632 { \
633 /* Current hack to deal with -fpic -O2 problems. */ \
634 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
635 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
636 global_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
637 } \
638 }
639
640 /* These interfaces that don't apply to the m88000. */
641 /* OVERLAPPING_REGNO_P(REGNO) 0 */
642 /* INSN_CLOBBERS_REGNO_P(INSN, REGNO) 0 */
643 /* PRESERVE_DEATH_INFO_REGNO_P(REGNO) 0 */
644
645 /* True if register is an extended register. */
646 #define XRF_REGNO_P(N) ((N) < FIRST_PSEUDO_REGISTER && (N) >= FIRST_EXTENDED_REGISTER)
647
648 /* Return number of consecutive hard regs needed starting at reg REGNO
649 to hold something of mode MODE.
650 This is ordinarily the length in words of a value of mode MODE
651 but can be less for certain modes in special long registers.
652
653 On the m88000, GRF registers hold 32-bits and XRF registers hold 80-bits.
654 An XRF register can hold any mode, but two GRF registers are required
655 for larger modes. */
656 #define HARD_REGNO_NREGS(REGNO, MODE) \
657 (XRF_REGNO_P (REGNO) \
658 ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
659
660 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
661
662 For double integers, we never put the value into an odd register so that
663 the operators don't run into the situation where the high part of one of
664 the inputs is the low part of the result register. (It's ok if the output
665 registers are the same as the input registers.) The XRF registers can
666 hold all modes, but only DF and SF modes can be manipulated in these
667 registers. The compiler should be allowed to use these as a fast spill
668 area. */
669 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
670 (XRF_REGNO_P(REGNO) \
671 ? (TARGET_88110 && GET_MODE_CLASS (MODE) == MODE_FLOAT) \
672 : (((MODE) != DImode && (MODE) != DFmode && (MODE) != DCmode) \
673 || ((REGNO) & 1) == 0))
674
675 /* Value is 1 if it is a good idea to tie two pseudo registers
676 when one has mode MODE1 and one has mode MODE2.
677 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
678 for any hard reg, then this must be 0 for correct output. */
679 #define MODES_TIEABLE_P(MODE1, MODE2) \
680 (((MODE1) == DFmode || (MODE1) == DCmode || (MODE1) == DImode \
681 || (TARGET_88110 && GET_MODE_CLASS (MODE1) == MODE_FLOAT)) \
682 == ((MODE2) == DFmode || (MODE2) == DCmode || (MODE2) == DImode \
683 || (TARGET_88110 && GET_MODE_CLASS (MODE2) == MODE_FLOAT)))
684
685 /* Specify the registers used for certain standard purposes.
686 The values of these macros are register numbers. */
687
688 /* the m88000 pc isn't overloaded on a register that the compiler knows about. */
689 /* #define PC_REGNUM */
690
691 /* Register to use for pushing function arguments. */
692 #define STACK_POINTER_REGNUM 31
693
694 /* Base register for access to local variables of the function. */
695 #define FRAME_POINTER_REGNUM 30
696
697 /* Base register for access to arguments of the function. */
698 #define ARG_POINTER_REGNUM 0
699
700 /* Register used in cases where a temporary is known to be safe to use. */
701 #define TEMP_REGNUM 10
702
703 /* Register in which static-chain is passed to a function. */
704 #define STATIC_CHAIN_REGNUM 11
705
706 /* Register in which address to store a structure value
707 is passed to a function. */
708 #define STRUCT_VALUE_REGNUM 12
709
710 /* Register to hold the addressing base for position independent
711 code access to data items. */
712 #define PIC_OFFSET_TABLE_REGNUM 25
713
714 /* Order in which registers are preferred (most to least). Use temp
715 registers, then param registers top down. Preserve registers are
716 top down to maximize use of double memory ops for register save.
717 The 88open reserved registers (r26-r29 and x30-x31) may commonly be used
718 in most environments with the -fcall-used- or -fcall-saved- options. */
719 #define REG_ALLOC_ORDER \
720 { \
721 13, 12, 11, 10, 29, 28, 27, 26, \
722 62, 63, 9, 8, 7, 6, 5, 4, \
723 3, 2, 1, 53, 52, 51, 50, 49, \
724 48, 47, 46, 45, 44, 43, 42, 41, \
725 40, 39, 38, 37, 36, 35, 34, 33, \
726 25, 24, 23, 22, 21, 20, 19, 18, \
727 17, 16, 15, 14, 61, 60, 59, 58, \
728 57, 56, 55, 54, 30, 31, 0, 32}
729
730 /* Order for leaf functions. */
731 #define REG_LEAF_ALLOC_ORDER \
732 { \
733 9, 8, 7, 6, 13, 12, 11, 10, \
734 29, 28, 27, 26, 62, 63, 5, 4, \
735 3, 2, 0, 53, 52, 51, 50, 49, \
736 48, 47, 46, 45, 44, 43, 42, 41, \
737 40, 39, 38, 37, 36, 35, 34, 33, \
738 25, 24, 23, 22, 21, 20, 19, 18, \
739 17, 16, 15, 14, 61, 60, 59, 58, \
740 57, 56, 55, 54, 30, 31, 1, 32}
741
742 /* Switch between the leaf and non-leaf orderings. The purpose is to avoid
743 write-over scoreboard delays between caller and callee. */
744 #define ORDER_REGS_FOR_LOCAL_ALLOC \
745 { \
746 static int leaf[] = REG_LEAF_ALLOC_ORDER; \
747 static int nonleaf[] = REG_ALLOC_ORDER; \
748 \
749 bcopy (regs_ever_live[1] ? nonleaf : leaf, reg_alloc_order, \
750 FIRST_PSEUDO_REGISTER * sizeof (int)); \
751 }
752 \f
753 /*** Register Classes ***/
754
755 /* Define the classes of registers for register constraints in the
756 machine description. Also define ranges of constants.
757
758 One of the classes must always be named ALL_REGS and include all hard regs.
759 If there is more than one class, another class must be named NO_REGS
760 and contain no registers.
761
762 The name GENERAL_REGS must be the name of a class (or an alias for
763 another name such as ALL_REGS). This is the class of registers
764 that is allowed by "g" or "r" in a register constraint.
765 Also, registers outside this class are allocated only when
766 instructions express preferences for them.
767
768 The classes must be numbered in nondecreasing order; that is,
769 a larger-numbered class must never be contained completely
770 in a smaller-numbered class.
771
772 For any two classes, it is very desirable that there be another
773 class that represents their union. */
774
775 /* The m88000 hardware has two kinds of registers. In addition, we denote
776 the arg pointer as a separate class. */
777
778 enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
779 XGRF_REGS, ALL_REGS, LIM_REG_CLASSES };
780
781 #define N_REG_CLASSES (int) LIM_REG_CLASSES
782
783 /* Give names of register classes as strings for dump file. */
784 #define REG_CLASS_NAMES {"NO_REGS", "AP_REG", "XRF_REGS", "GENERAL_REGS", \
785 "AGRF_REGS", "XGRF_REGS", "ALL_REGS" }
786
787 /* Define which registers fit in which classes.
788 This is an initializer for a vector of HARD_REG_SET
789 of length N_REG_CLASSES. */
790 #define REG_CLASS_CONTENTS {{0x00000000, 0x00000000}, \
791 {0x00000001, 0x00000000}, \
792 {0x00000000, 0xffffffff}, \
793 {0xfffffffe, 0x00000000}, \
794 {0xffffffff, 0x00000000}, \
795 {0xfffffffe, 0xffffffff}, \
796 {0xffffffff, 0xffffffff}}
797
798 /* The same information, inverted:
799 Return the class number of the smallest class containing
800 reg number REGNO. This could be a conditional expression
801 or could index an array. */
802 #define REGNO_REG_CLASS(REGNO) \
803 ((REGNO) ? ((REGNO < 32) ? GENERAL_REGS : XRF_REGS) : AP_REG)
804
805 /* The class value for index registers, and the one for base regs. */
806 #define BASE_REG_CLASS AGRF_REGS
807 #define INDEX_REG_CLASS GENERAL_REGS
808
809 /* Get reg_class from a letter such as appears in the machine description.
810 For the 88000, the following class/letter is defined for the XRF:
811 x - Extended register file */
812 #define REG_CLASS_FROM_LETTER(C) \
813 (((C) == 'x') ? XRF_REGS : NO_REGS)
814
815 /* Macros to check register numbers against specific register classes.
816 These assume that REGNO is a hard or pseudo reg number.
817 They give nonzero only if REGNO is a hard reg of the suitable class
818 or a pseudo reg currently allocated to a suitable hard reg.
819 Since they use reg_renumber, they are safe only once reg_renumber
820 has been allocated, which happens in local-alloc.c. */
821 #define REGNO_OK_FOR_BASE_P(REGNO) \
822 ((REGNO) < FIRST_EXTENDED_REGISTER \
823 || (unsigned) reg_renumber[REGNO] < FIRST_EXTENDED_REGISTER)
824 #define REGNO_OK_FOR_INDEX_P(REGNO) \
825 (((REGNO) && (REGNO) < FIRST_EXTENDED_REGISTER) \
826 || (unsigned) reg_renumber[REGNO] < FIRST_EXTENDED_REGISTER)
827
828 /* Given an rtx X being reloaded into a reg required to be
829 in class CLASS, return the class of reg to actually use.
830 In general this is just CLASS; but on some machines
831 in some cases it is preferable to use a more restrictive class.
832 Double constants should be in a register iff they can be made cheaply. */
833 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
834 (CONSTANT_P(X) && (CLASS == XRF_REGS) ? NO_REGS : (CLASS))
835
836 /* Return the register class of a scratch register needed to load IN
837 into a register of class CLASS in MODE. On the m88k, when PIC, we
838 need a temporary when loading some addresses into a register. */
839 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
840 ((flag_pic \
841 && GET_CODE (IN) == CONST \
842 && GET_CODE (XEXP (IN, 0)) == PLUS \
843 && GET_CODE (XEXP (XEXP (IN, 0), 0)) == CONST_INT \
844 && ! SMALL_INT (XEXP (XEXP (IN, 0), 1))) ? GENERAL_REGS : NO_REGS)
845
846 /* Return the maximum number of consecutive registers
847 needed to represent mode MODE in a register of class CLASS. */
848 #define CLASS_MAX_NREGS(CLASS, MODE) \
849 ((((CLASS) == XRF_REGS) ? 1 \
850 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
851
852 /* Letters in the range `I' through `P' in a register constraint string can
853 be used to stand for particular ranges of immediate operands. The C
854 expression is true iff C is a known letter and VALUE is appropriate for
855 that letter.
856
857 For the m88000, the following constants are used:
858 `I' requires a non-negative 16-bit value.
859 `J' requires a non-positive 16-bit value.
860 `K' requires a non-negative value < 32.
861 `L' requires a constant with only the upper 16-bits set.
862 `M' requires constant values that can be formed with `set'.
863 `N' requires a negative value.
864 `O' requires zero.
865 `P' requires a non-negative value. */
866
867 /* Quick tests for certain values. */
868 #define SMALL_INT(X) (SMALL_INTVAL (INTVAL (X)))
869 #define SMALL_INTVAL(I) ((unsigned) (I) < 0x10000)
870 #define ADD_INT(X) (ADD_INTVAL (INTVAL (X)))
871 #define ADD_INTVAL(I) ((unsigned) (I) + 0xffff < 0x1ffff)
872 #define POWER_OF_2(I) ((I) && POWER_OF_2_or_0(I))
873 #define POWER_OF_2_or_0(I) (((I) & ((unsigned)(I) - 1)) == 0)
874
875 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
876 ((C) == 'I' ? SMALL_INTVAL (VALUE) \
877 : (C) == 'J' ? SMALL_INTVAL (-(VALUE)) \
878 : (C) == 'K' ? (unsigned)(VALUE) < 32 \
879 : (C) == 'L' ? ((VALUE) & 0xffff) == 0 \
880 : (C) == 'M' ? integer_ok_for_set (VALUE) \
881 : (C) == 'N' ? (VALUE) < 0 \
882 : (C) == 'O' ? (VALUE) == 0 \
883 : (C) == 'P' ? (VALUE) >= 0 \
884 : 0)
885
886 /* Similar, but for floating constants, and defining letters G and H.
887 Here VALUE is the CONST_DOUBLE rtx itself. For the m88000, the
888 constraints are: `G' requires zero, and `H' requires one or two. */
889 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
890 ((C) == 'G' ? (CONST_DOUBLE_HIGH (VALUE) == 0 \
891 && CONST_DOUBLE_LOW (VALUE) == 0) \
892 : 0)
893
894 /* Letters in the range `Q' through `U' in a register constraint string
895 may be defined in a machine-dependent fashion to stand for arbitrary
896 operand types.
897
898 For the m88k, `Q' handles addresses in a call context. */
899
900 #define EXTRA_CONSTRAINT(OP, C) \
901 ((C) == 'Q' ? symbolic_address_p (OP) : 0)
902 \f
903 /*** Describing Stack Layout ***/
904
905 /* Define this if pushing a word on the stack moves the stack pointer
906 to a smaller address. */
907 #define STACK_GROWS_DOWNWARD
908
909 /* Define this if the addresses of local variable slots are at negative
910 offsets from the frame pointer. */
911 /* #define FRAME_GROWS_DOWNWARD */
912
913 /* Offset from the frame pointer to the first local variable slot to be
914 allocated. For the m88k, the debugger wants the return address (r1)
915 stored at location r30+4, and the previous frame pointer stored at
916 location r30. */
917 #define STARTING_FRAME_OFFSET 8
918
919 /* If we generate an insn to push BYTES bytes, this says how many the
920 stack pointer really advances by. The m88k has no push instruction. */
921 /* #define PUSH_ROUNDING(BYTES) */
922
923 /* If defined, the maximum amount of space required for outgoing arguments
924 will be computed and placed into the variable
925 `current_function_outgoing_args_size'. No space will be pushed
926 onto the stack for each call; instead, the function prologue should
927 increase the stack frame size by this amount. */
928 #define ACCUMULATE_OUTGOING_ARGS
929
930 /* Offset from the stack pointer register to the first location at which
931 outgoing arguments are placed. Use the default value zero. */
932 /* #define STACK_POINTER_OFFSET 0 */
933
934 /* Offset of first parameter from the argument pointer register value.
935 Using an argument pointer, this is 0 for the m88k. GCC knows
936 how to eliminate the argument pointer references if necessary. */
937 #define FIRST_PARM_OFFSET(FNDECL) 0
938
939 /* Define this if functions should assume that stack space has been
940 allocated for arguments even when their values are passed in
941 registers.
942
943 The value of this macro is the size, in bytes, of the area reserved for
944 arguments passed in registers.
945
946 This space can either be allocated by the caller or be a part of the
947 machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE'
948 says which. */
949 #define REG_PARM_STACK_SPACE(FNDECL) 32
950
951 /* Define this macro if REG_PARM_STACK_SPACE is defined but stack
952 parameters don't skip the area specified by REG_PARM_STACK_SPACE.
953 Normally, when a parameter is not passed in registers, it is placed on
954 the stack beyond the REG_PARM_STACK_SPACE area. Defining this macro
955 suppresses this behavior and causes the parameter to be passed on the
956 stack in its natural location. */
957 #define STACK_PARMS_IN_REG_PARM_AREA
958
959 /* Define this if it is the responsibility of the caller to allocate the
960 area reserved for arguments passed in registers. If
961 `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect of this
962 macro is to determine whether the space is included in
963 `current_function_outgoing_args_size'. */
964 /* #define OUTGOING_REG_PARM_STACK_SPACE */
965
966 /* Offset from the stack pointer register to an item dynamically allocated
967 on the stack, e.g., by `alloca'.
968
969 The default value for this macro is `STACK_POINTER_OFFSET' plus the
970 length of the outgoing arguments. The default is correct for most
971 machines. See `function.c' for details. */
972 /* #define STACK_DYNAMIC_OFFSET(FUNDECL) ... */
973
974 /* Value is the number of bytes of arguments automatically
975 popped when returning from a subroutine call.
976 FUNDECL is the declaration node of the function (as a tree),
977 FUNTYPE is the data type of the function (as a tree),
978 or for a library call it is an identifier node for the subroutine name.
979 SIZE is the number of bytes of arguments passed on the stack. */
980 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
981
982 /* Define how to find the value returned by a function.
983 VALTYPE is the data type of the value (as a tree).
984 If the precise function being called is known, FUNC is its FUNCTION_DECL;
985 otherwise, FUNC is 0. */
986 #define FUNCTION_VALUE(VALTYPE, FUNC) \
987 gen_rtx (REG, \
988 TYPE_MODE (VALTYPE) == BLKmode ? SImode : TYPE_MODE (VALTYPE), \
989 2)
990
991 /* Define this if it differs from FUNCTION_VALUE. */
992 /* #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) ... */
993
994 /* Disable the promotion of some structures and unions to registers. */
995 #define RETURN_IN_MEMORY(TYPE) \
996 (TYPE_MODE (TYPE) == BLKmode \
997 || ((TREE_CODE (TYPE) == RECORD_TYPE || TREE_CODE(TYPE) == UNION_TYPE) \
998 && !(TYPE_MODE (TYPE) == SImode \
999 || (TYPE_MODE (TYPE) == BLKmode \
1000 && TYPE_ALIGN (TYPE) == BITS_PER_WORD \
1001 && int_size_in_bytes (TYPE) == UNITS_PER_WORD))))
1002
1003 /* Don't default to pcc-struct-return, because we have already specified
1004 exactly how to return structures in the RETURN_IN_MEMORY macro. */
1005 #define DEFAULT_PCC_STRUCT_RETURN 0
1006
1007 /* Define how to find the value returned by a library function
1008 assuming the value has mode MODE. */
1009 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 2)
1010
1011 /* True if N is a possible register number for a function value
1012 as seen by the caller. */
1013 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2)
1014
1015 /* Determine whether a function argument is passed in a register, and
1016 which register. See m88k.c. */
1017 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1018 m88k_function_arg (CUM, MODE, TYPE, NAMED)
1019
1020 /* Define this if it differs from FUNCTION_ARG. */
1021 /* #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) ... */
1022
1023 /* A C expression for the number of words, at the beginning of an
1024 argument, must be put in registers. The value must be zero for
1025 arguments that are passed entirely in registers or that are entirely
1026 pushed on the stack. */
1027 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0)
1028
1029 /* A C expression that indicates when an argument must be passed by
1030 reference. If nonzero for an argument, a copy of that argument is
1031 made in memory and a pointer to the argument is passed instead of the
1032 argument itself. The pointer is passed in whatever way is appropriate
1033 for passing a pointer to that type. */
1034 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) (0)
1035
1036 /* A C type for declaring a variable that is used as the first argument
1037 of `FUNCTION_ARG' and other related values. It suffices to count
1038 the number of words of argument so far. */
1039 #define CUMULATIVE_ARGS int
1040
1041 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to a
1042 function whose data type is FNTYPE. For a library call, FNTYPE is 0. */
1043 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) ((CUM) = 0)
1044
1045 /* A C statement (sans semicolon) to update the summarizer variable
1046 CUM to advance past an argument in the argument list. The values
1047 MODE, TYPE and NAMED describe that argument. Once this is done,
1048 the variable CUM is suitable for analyzing the *following* argument
1049 with `FUNCTION_ARG', etc. (TYPE is null for libcalls where that
1050 information may not be available.) */
1051 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1052 do { \
1053 enum machine_mode __mode = (TYPE) ? TYPE_MODE (TYPE) : (MODE); \
1054 if ((CUM & 1) \
1055 && (__mode == DImode || __mode == DFmode \
1056 || ((TYPE) && TYPE_ALIGN (TYPE) > BITS_PER_WORD))) \
1057 CUM++; \
1058 CUM += (((__mode != BLKmode) \
1059 ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE)) \
1060 + 3) / 4; \
1061 } while (0)
1062
1063 /* True if N is a possible register number for function argument passing.
1064 On the m88000, these are registers 2 through 9. */
1065 #define FUNCTION_ARG_REGNO_P(N) ((N) <= 9 && (N) >= 2)
1066
1067 /* A C expression which determines whether, and in which direction,
1068 to pad out an argument with extra space. The value should be of
1069 type `enum direction': either `upward' to pad above the argument,
1070 `downward' to pad below, or `none' to inhibit padding.
1071
1072 This macro does not control the *amount* of padding; that is always
1073 just enough to reach the next multiple of `FUNCTION_ARG_BOUNDARY'. */
1074 #define FUNCTION_ARG_PADDING(MODE, TYPE) \
1075 ((MODE) == BLKmode \
1076 || ((TYPE) && (TREE_CODE (TYPE) == RECORD_TYPE \
1077 || TREE_CODE (TYPE) == UNION_TYPE)) \
1078 ? upward : GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY ? downward : none)
1079
1080 /* If defined, a C expression that gives the alignment boundary, in bits,
1081 of an argument with the specified mode and type. If it is not defined,
1082 `PARM_BOUNDARY' is used for all arguments. */
1083 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1084 (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_SIZE (MODE)) <= PARM_BOUNDARY \
1085 ? PARM_BOUNDARY : 2 * PARM_BOUNDARY)
1086
1087 /* Generate necessary RTL for __builtin_saveregs().
1088 ARGLIST is the argument list; see expr.c. */
1089 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) m88k_builtin_saveregs (ARGLIST)
1090
1091 /* Generate the assembly code for function entry. */
1092 #define FUNCTION_PROLOGUE(FILE, SIZE) m88k_begin_prologue(FILE, SIZE)
1093
1094 /* Perform special actions at the point where the prologue ends. */
1095 #define FUNCTION_END_PROLOGUE(FILE) m88k_end_prologue(FILE)
1096
1097 /* Output assembler code to FILE to increment profiler label # LABELNO
1098 for profiling a function entry. Redefined in sysv3.h, sysv4.h and
1099 dgux.h. */
1100 #define FUNCTION_PROFILER(FILE, LABELNO) \
1101 output_function_profiler (FILE, LABELNO, "mcount", 1)
1102
1103 /* Maximum length in instructions of the code output by FUNCTION_PROFILER. */
1104 #define FUNCTION_PROFILER_LENGTH (5+3+1+5)
1105
1106 /* Output assembler code to FILE to initialize basic-block profiling for
1107 the current module. LABELNO is unique to each instance. */
1108 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
1109 output_function_block_profiler (FILE, LABELNO)
1110
1111 /* Maximum length in instructions of the code output by
1112 FUNCTION_BLOCK_PROFILER. */
1113 #define FUNCTION_BLOCK_PROFILER_LENGTH (3+5+2+5)
1114
1115 /* Output assembler code to FILE to increment the count associated with
1116 the basic block number BLOCKNO. */
1117 #define BLOCK_PROFILER(FILE, BLOCKNO) output_block_profiler (FILE, BLOCKNO)
1118
1119 /* Maximum length in instructions of the code output by BLOCK_PROFILER. */
1120 #define BLOCK_PROFILER_LENGTH 4
1121
1122 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1123 the stack pointer does not matter. The value is tested only in
1124 functions that have frame pointers.
1125 No definition is equivalent to always zero. */
1126 #define EXIT_IGNORE_STACK (1)
1127
1128 /* Generate the assembly code for function exit. */
1129 #define FUNCTION_EPILOGUE(FILE, SIZE) m88k_end_epilogue(FILE, SIZE)
1130
1131 /* Perform special actions at the point where the epilogue begins. */
1132 #define FUNCTION_BEGIN_EPILOGUE(FILE) m88k_begin_epilogue(FILE)
1133
1134 /* Value should be nonzero if functions must have frame pointers.
1135 Zero means the frame pointer need not be set up (and parms
1136 may be accessed via the stack pointer) in functions that seem suitable.
1137 This is computed in `reload', in reload1.c. */
1138 #define FRAME_POINTER_REQUIRED \
1139 (frame_pointer_needed \
1140 || (write_symbols != NO_DEBUG && !TARGET_OCS_FRAME_POSITION))
1141
1142 /* Definitions for register eliminations.
1143
1144 We have two registers that can be eliminated on the m88k. First, the
1145 frame pointer register can often be eliminated in favor of the stack
1146 pointer register. Secondly, the argument pointer register can always be
1147 eliminated; it is replaced with either the stack or frame pointer. */
1148
1149 /* This is an array of structures. Each structure initializes one pair
1150 of eliminable registers. The "from" register number is given first,
1151 followed by "to". Eliminations of the same "from" register are listed
1152 in order of preference. */
1153 #define ELIMINABLE_REGS \
1154 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1155 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1156 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1157
1158 /* Given FROM and TO register numbers, say whether this elimination
1159 is allowed. */
1160 #define CAN_ELIMINATE(FROM, TO) \
1161 (!((FROM) == FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED))
1162
1163 /* Define the offset between two registers, one to be eliminated, and the other
1164 its replacement, at the start of a routine. */
1165 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1166 { m88k_layout_frame (); \
1167 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1168 (OFFSET) = m88k_fp_offset; \
1169 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1170 (OFFSET) = m88k_stack_size - m88k_fp_offset; \
1171 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1172 (OFFSET) = m88k_stack_size; \
1173 else \
1174 abort (); \
1175 }
1176 \f
1177 /*** Trampolines for Nested Functions ***/
1178
1179 /* Output assembler code for a block containing the constant parts
1180 of a trampoline, leaving space for the variable parts.
1181
1182 This block is placed on the stack and filled in. It is aligned
1183 0 mod 128 and those portions that are executed are constant.
1184 This should work for instruction caches that have cache lines up
1185 to the aligned amount (128 is arbitrary), provided no other code
1186 producer is attempting to play the same game. This of course is
1187 in violation of any number of 88open standards. */
1188
1189 #define TRAMPOLINE_TEMPLATE(FILE) \
1190 { \
1191 char buf[256]; \
1192 static int labelno = 0; \
1193 labelno++; \
1194 ASM_GENERATE_INTERNAL_LABEL (buf, "LTRMP", labelno); \
1195 /* Save the return address (r1) in the static chain reg (r11). */ \
1196 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[11], reg_names[1]); \
1197 /* Locate this block; transfer to the next instruction. */ \
1198 fprintf (FILE, "\tbsr\t %s\n", &buf[1]); \
1199 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LTRMP", labelno); \
1200 /* Save r10; use it as the relative pointer; restore r1. */ \
1201 fprintf (FILE, "\tst\t %s,%s,24\n", reg_names[10], reg_names[1]); \
1202 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[10], reg_names[1]); \
1203 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[1], reg_names[11]); \
1204 /* Load the function's address and go there. */ \
1205 fprintf (FILE, "\tld\t %s,%s,32\n", reg_names[11], reg_names[10]); \
1206 fprintf (FILE, "\tjmp.n\t %s\n", reg_names[11]); \
1207 /* Restore r10 and load the static chain register. */ \
1208 fprintf (FILE, "\tld.d\t %s,%s,24\n", reg_names[10], reg_names[10]); \
1209 /* Storage: r10 save area, static chain, function address. */ \
1210 ASM_OUTPUT_INT (FILE, const0_rtx); \
1211 ASM_OUTPUT_INT (FILE, const0_rtx); \
1212 ASM_OUTPUT_INT (FILE, const0_rtx); \
1213 }
1214
1215 /* Length in units of the trampoline for entering a nested function.
1216 This is really two components. The first 32 bytes are fixed and
1217 must be copied; the last 12 bytes are just storage that's filled
1218 in later. So for allocation purposes, it's 32+12 bytes, but for
1219 initialization purposes, it's 32 bytes. */
1220
1221 #define TRAMPOLINE_SIZE (32+12)
1222
1223 /* Alignment required for a trampoline. 128 is used to find the
1224 beginning of a line in the instruction cache and to allow for
1225 instruction cache lines of up to 128 bytes. */
1226
1227 #define TRAMPOLINE_ALIGNMENT 128
1228
1229 /* Emit RTL insns to initialize the variable parts of a trampoline.
1230 FNADDR is an RTX for the address of the function's pure code.
1231 CXT is an RTX for the static chain value for the function. */
1232
1233 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1234 { \
1235 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 40)), FNADDR); \
1236 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 36)), CXT); \
1237 }
1238
1239 /*** Library Subroutine Names ***/
1240
1241 /* Define this macro if GNU CC should generate calls to the System V
1242 (and ANSI C) library functions `memcpy' and `memset' rather than
1243 the BSD functions `bcopy' and `bzero'. */
1244 #define TARGET_MEM_FUNCTIONS
1245 \f
1246 /*** Addressing Modes ***/
1247
1248 #define EXTRA_CC_MODES CCEVENmode
1249
1250 #define EXTRA_CC_NAMES "CCEVEN"
1251
1252 #define SELECT_CC_MODE(OP,X,Y) CCmode
1253
1254 /* #define HAVE_POST_INCREMENT */
1255 /* #define HAVE_POST_DECREMENT */
1256
1257 /* #define HAVE_PRE_DECREMENT */
1258 /* #define HAVE_PRE_INCREMENT */
1259
1260 /* Recognize any constant value that is a valid address.
1261 When PIC, we do not accept an address that would require a scratch reg
1262 to load into a register. */
1263
1264 #define CONSTANT_ADDRESS_P(X) \
1265 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1266 || GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH \
1267 || (GET_CODE (X) == CONST \
1268 && ! (flag_pic && pic_address_needs_scratch (X))))
1269
1270
1271 /* Maximum number of registers that can appear in a valid memory address. */
1272 #define MAX_REGS_PER_ADDRESS 2
1273
1274 /* The condition for memory shift insns. */
1275 #define SCALED_ADDRESS_P(ADDR) \
1276 (GET_CODE (ADDR) == PLUS \
1277 && (GET_CODE (XEXP (ADDR, 0)) == MULT \
1278 || GET_CODE (XEXP (ADDR, 1)) == MULT))
1279
1280 /* Can the reference to X be made short? */
1281 #define SHORT_ADDRESS_P(X,TEMP) \
1282 ((TEMP) = (GET_CODE (X) == CONST ? get_related_value (X) : X), \
1283 ((TEMP) && GET_CODE (TEMP) == SYMBOL_REF && SYMBOL_REF_FLAG (TEMP)))
1284
1285 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1286 that is a valid memory address for an instruction.
1287 The MODE argument is the machine mode for the MEM expression
1288 that wants to use this address.
1289
1290 On the m88000, a legitimate address has the form REG, REG+REG,
1291 REG+SMALLINT, REG+(REG*modesize) (REG[REG]), or SMALLINT.
1292
1293 The register elimination process should deal with the argument
1294 pointer and frame pointer changing to REG+SMALLINT. */
1295
1296 #define LEGITIMATE_INDEX_P(X, MODE) \
1297 ((GET_CODE (X) == CONST_INT \
1298 && SMALL_INT (X)) \
1299 || (REG_P (X) \
1300 && REG_OK_FOR_INDEX_P (X)) \
1301 || (GET_CODE (X) == MULT \
1302 && REG_P (XEXP (X, 0)) \
1303 && REG_OK_FOR_INDEX_P (XEXP (X, 0)) \
1304 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1305 && INTVAL (XEXP (X, 1)) == GET_MODE_SIZE (MODE)))
1306
1307 #define RTX_OK_FOR_BASE_P(X) \
1308 ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1309 || (GET_CODE (X) == SUBREG \
1310 && GET_CODE (SUBREG_REG (X)) == REG \
1311 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
1312
1313 #define RTX_OK_FOR_INDEX_P(X) \
1314 ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
1315 || (GET_CODE (X) == SUBREG \
1316 && GET_CODE (SUBREG_REG (X)) == REG \
1317 && REG_OK_FOR_INDEX_P (SUBREG_REG (X))))
1318
1319 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1320 { \
1321 register rtx _x; \
1322 if (REG_P (X)) \
1323 { \
1324 if (REG_OK_FOR_BASE_P (X)) \
1325 goto ADDR; \
1326 } \
1327 else if (GET_CODE (X) == PLUS) \
1328 { \
1329 register rtx _x0 = XEXP (X, 0); \
1330 register rtx _x1 = XEXP (X, 1); \
1331 if ((flag_pic \
1332 && _x0 == pic_offset_table_rtx \
1333 && (flag_pic == 2 \
1334 ? RTX_OK_FOR_BASE_P (_x1) \
1335 : (GET_CODE (_x1) == SYMBOL_REF \
1336 || GET_CODE (_x1) == LABEL_REF))) \
1337 || (REG_P (_x0) \
1338 && (REG_OK_FOR_BASE_P (_x0) \
1339 && LEGITIMATE_INDEX_P (_x1, MODE))) \
1340 || (REG_P (_x1) \
1341 && (REG_OK_FOR_BASE_P (_x1) \
1342 && LEGITIMATE_INDEX_P (_x0, MODE)))) \
1343 goto ADDR; \
1344 } \
1345 else if (GET_CODE (X) == LO_SUM) \
1346 { \
1347 register rtx _x0 = XEXP (X, 0); \
1348 register rtx _x1 = XEXP (X, 1); \
1349 if (((REG_P (_x0) \
1350 && REG_OK_FOR_BASE_P (_x0)) \
1351 || (GET_CODE (_x0) == SUBREG \
1352 && REG_P (SUBREG_REG (_x0)) \
1353 && REG_OK_FOR_BASE_P (SUBREG_REG (_x0)))) \
1354 && CONSTANT_P (_x1)) \
1355 goto ADDR; \
1356 } \
1357 else if (GET_CODE (X) == CONST_INT \
1358 && SMALL_INT (X)) \
1359 goto ADDR; \
1360 else if (SHORT_ADDRESS_P (X, _x)) \
1361 goto ADDR; \
1362 }
1363
1364 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1365 and check its validity for a certain class.
1366 We have two alternate definitions for each of them.
1367 The usual definition accepts all pseudo regs; the other rejects
1368 them unless they have been allocated suitable hard regs.
1369 The symbol REG_OK_STRICT causes the latter definition to be used.
1370
1371 Most source files want to accept pseudo regs in the hope that
1372 they will get allocated to the class that the insn wants them to be in.
1373 Source files for reload pass need to be strict.
1374 After reload, it makes no difference, since pseudo regs have
1375 been eliminated by then. */
1376
1377 #ifndef REG_OK_STRICT
1378
1379 /* Nonzero if X is a hard reg that can be used as an index
1380 or if it is a pseudo reg. Not the argument pointer. */
1381 #define REG_OK_FOR_INDEX_P(X) \
1382 (!XRF_REGNO_P(REGNO (X)))
1383 /* Nonzero if X is a hard reg that can be used as a base reg
1384 or if it is a pseudo reg. */
1385 #define REG_OK_FOR_BASE_P(X) (REG_OK_FOR_INDEX_P (X))
1386
1387 #else
1388
1389 /* Nonzero if X is a hard reg that can be used as an index. */
1390 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1391 /* Nonzero if X is a hard reg that can be used as a base reg. */
1392 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1393
1394 #endif
1395
1396 /* Try machine-dependent ways of modifying an illegitimate address
1397 to be legitimate. If we find one, return the new, valid address.
1398 This macro is used in only one place: `memory_address' in explow.c.
1399
1400 OLDX is the address as it was before break_out_memory_refs was called.
1401 In some cases it is useful to look at this to decide what needs to be done.
1402
1403 MODE and WIN are passed so that this macro can use
1404 GO_IF_LEGITIMATE_ADDRESS.
1405
1406 It is always safe for this macro to do nothing. It exists to recognize
1407 opportunities to optimize the output. */
1408
1409 /* On the m88000, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
1410
1411 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1412 { \
1413 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1414 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1415 copy_to_mode_reg (SImode, XEXP (X, 1))); \
1416 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
1417 (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
1418 copy_to_mode_reg (SImode, XEXP (X, 0))); \
1419 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
1420 (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
1421 force_operand (XEXP (X, 0), 0)); \
1422 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
1423 (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
1424 force_operand (XEXP (X, 1), 0)); \
1425 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \
1426 (X) = gen_rtx (PLUS, Pmode, force_operand (XEXP (X, 0), NULL_RTX),\
1427 XEXP (X, 1)); \
1428 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \
1429 (X) = gen_rtx (PLUS, Pmode, XEXP (X, 0), \
1430 force_operand (XEXP (X, 1), NULL_RTX)); \
1431 if (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \
1432 || GET_CODE (X) == LABEL_REF) \
1433 (X) = legitimize_address (flag_pic, X, 0, 0); \
1434 if (memory_address_p (MODE, X)) \
1435 goto WIN; }
1436
1437 /* Go to LABEL if ADDR (a legitimate address expression)
1438 has an effect that depends on the machine mode it is used for.
1439 On the the m88000 this is never true. */
1440
1441 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
1442
1443 /* Nonzero if the constant value X is a legitimate general operand.
1444 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1445 #define LEGITIMATE_CONSTANT_P(X) (1)
1446
1447 /* Define this, so that when PIC, reload won't try to reload invalid
1448 addresses which require two reload registers. */
1449
1450 #define LEGITIMATE_PIC_OPERAND_P(X) (! pic_address_needs_scratch (X))
1451
1452 \f
1453 /*** Condition Code Information ***/
1454
1455 /* C code for a data type which is used for declaring the `mdep'
1456 component of `cc_status'. It defaults to `int'. */
1457 /* #define CC_STATUS_MDEP int */
1458
1459 /* A C expression to initialize the `mdep' field to "empty". */
1460 /* #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0) */
1461
1462 /* Macro to zap the normal portions of CC_STATUS, but leave the
1463 machine dependent parts (ie, literal synthesis) alone. */
1464 /* #define CC_STATUS_INIT_NO_MDEP \
1465 (cc_status.flags = 0, cc_status.value1 = 0, cc_status.value2 = 0) */
1466
1467 /* When using a register to hold the condition codes, the cc_status
1468 mechanism cannot be used. */
1469 #define NOTICE_UPDATE_CC(EXP, INSN) (0)
1470 \f
1471 /*** Miscellaneous Parameters ***/
1472
1473 /* Define the codes that are matched by predicates in m88k.c. */
1474 #define PREDICATE_CODES \
1475 {"move_operand", {SUBREG, REG, CONST_INT, LO_SUM, MEM}}, \
1476 {"call_address_operand", {SUBREG, REG, SYMBOL_REF, LABEL_REF, CONST}}, \
1477 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
1478 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
1479 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
1480 {"arith64_operand", {SUBREG, REG, CONST_INT}}, \
1481 {"int5_operand", {CONST_INT}}, \
1482 {"int32_operand", {CONST_INT}}, \
1483 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1484 {"reg_or_bbx_mask_operand", {SUBREG, REG, CONST_INT}}, \
1485 {"real_or_0_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1486 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1487 {"relop", {EQ, NE, LT, LE, GE, GT, LTU, LEU, GEU, GTU}}, \
1488 {"even_relop", {EQ, LT, GT, LTU, GTU}}, \
1489 {"odd_relop", { NE, LE, GE, LEU, GEU}}, \
1490 {"partial_ccmode_register_operand", { SUBREG, REG}}, \
1491 {"relop_no_unsigned", {EQ, NE, LT, LE, GE, GT}}, \
1492 {"equality_op", {EQ, NE}}, \
1493 {"pc_or_label_ref", {PC, LABEL_REF}},
1494
1495 /* The case table contains either words or branch instructions. This says
1496 which. We always claim that the vector is PC-relative. It is position
1497 independent when -fpic is used. */
1498 #define CASE_VECTOR_INSNS (TARGET_88100 || flag_pic)
1499
1500 /* An alias for a machine mode name. This is the machine mode that
1501 elements of a jump-table should have. */
1502 #define CASE_VECTOR_MODE SImode
1503
1504 /* Define this macro if jump-tables should contain relative addresses. */
1505 #define CASE_VECTOR_PC_RELATIVE
1506
1507 /* Define this if control falls through a `case' insn when the index
1508 value is out of range. This means the specified default-label is
1509 actually ignored by the `case' insn proper. */
1510 /* #define CASE_DROPS_THROUGH */
1511
1512 /* Define this to be the smallest number of different values for which it
1513 is best to use a jump-table instead of a tree of conditional branches.
1514 The default is 4 for machines with a casesi instruction and 5 otherwise.
1515 The best 88110 number is around 7, though the exact number isn't yet
1516 known. A third alternative for the 88110 is to use a binary tree of
1517 bb1 instructions on bits 2/1/0 if the range is dense. This may not
1518 win very much though. */
1519 #define CASE_VALUES_THRESHOLD (TARGET_88100 ? 4 : 7)
1520
1521 /* Specify the tree operation to be used to convert reals to integers. */
1522 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1523
1524 /* This is the kind of divide that is easiest to do in the general case. */
1525 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1526
1527 /* Define this as 1 if `char' should by default be signed; else as 0. */
1528 #define DEFAULT_SIGNED_CHAR 1
1529
1530 /* The 88open ABI says size_t is unsigned int. */
1531 #define SIZE_TYPE "unsigned int"
1532
1533 /* Allow and ignore #sccs directives */
1534 #define SCCS_DIRECTIVE
1535
1536 /* Handle #pragma pack and sometimes #pragma weak. */
1537 #define HANDLE_SYSV_PRAGMA
1538
1539 /* Tell when to handle #pragma weak. This is only done for V.4. */
1540 #define HANDLE_PRAGMA_WEAK TARGET_SVR4
1541
1542 /* Max number of bytes we can move from memory to memory
1543 in one reasonably fast instruction. */
1544 #define MOVE_MAX 8
1545
1546 /* Define if normal loads of shorter-than-word items from memory clears
1547 the rest of the bigs in the register. */
1548 #define BYTE_LOADS_ZERO_EXTEND
1549
1550 /* Zero if access to memory by bytes is faster. */
1551 #define SLOW_BYTE_ACCESS 1
1552
1553 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1554 is done just by pretending it is already truncated. */
1555 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1556
1557 /* Define this if addresses of constant functions
1558 shouldn't be put through pseudo regs where they can be cse'd.
1559 Desirable on machines where ordinary constants are expensive
1560 but a CALL with constant address is cheap. */
1561 #define NO_FUNCTION_CSE
1562
1563 /* Define this macro if an argument declared as `char' or
1564 `short' in a prototype should actually be passed as an
1565 `int'. In addition to avoiding errors in certain cases of
1566 mismatch, it also makes for better code on certain machines. */
1567 #define PROMOTE_PROTOTYPES
1568
1569 /* Define this macro if a float function always returns float
1570 (even in traditional mode). Redefined in luna.h. */
1571 #define TRADITIONAL_RETURN_FLOAT
1572
1573 /* We assume that the store-condition-codes instructions store 0 for false
1574 and some other value for true. This is the value stored for true. */
1575 #define STORE_FLAG_VALUE -1
1576
1577 /* Specify the machine mode that pointers have.
1578 After generation of rtl, the compiler makes no further distinction
1579 between pointers and any other objects of this machine mode. */
1580 #define Pmode SImode
1581
1582 /* A function address in a call instruction
1583 is a word address (for indexing purposes)
1584 so give the MEM rtx word mode. */
1585 #define FUNCTION_MODE SImode
1586
1587 /* A barrier will be aligned so account for the possible expansion.
1588 A volatile load may be preceded by a serializing instruction.
1589 Account for profiling code output at NOTE_INSN_PROLOGUE_END.
1590 Account for block profiling code at basic block boundaries. */
1591 #define ADJUST_INSN_LENGTH(RTX, LENGTH) \
1592 if (GET_CODE (RTX) == BARRIER \
1593 || (TARGET_SERIALIZE_VOLATILE \
1594 && GET_CODE (RTX) == INSN \
1595 && GET_CODE (PATTERN (RTX)) == SET \
1596 && ((GET_CODE (SET_SRC (PATTERN (RTX))) == MEM \
1597 && MEM_VOLATILE_P (SET_SRC (PATTERN (RTX))))))) \
1598 LENGTH += 1; \
1599 else if (GET_CODE (RTX) == NOTE \
1600 && NOTE_LINE_NUMBER (RTX) == NOTE_INSN_PROLOGUE_END) \
1601 { \
1602 if (profile_block_flag) \
1603 LENGTH += FUNCTION_BLOCK_PROFILER_LENGTH; \
1604 if (profile_flag) \
1605 LENGTH += (FUNCTION_PROFILER_LENGTH + REG_PUSH_LENGTH \
1606 + REG_POP_LENGTH); \
1607 } \
1608 else if (profile_block_flag \
1609 && (GET_CODE (RTX) == CODE_LABEL \
1610 || GET_CODE (RTX) == JUMP_INSN \
1611 || (GET_CODE (RTX) == INSN \
1612 && GET_CODE (PATTERN (RTX)) == SEQUENCE \
1613 && GET_CODE (XVECEXP (PATTERN (RTX), 0, 0)) == JUMP_INSN)))\
1614 LENGTH += BLOCK_PROFILER_LENGTH;
1615
1616 /* Track the state of the last volatile memory reference. Clear the
1617 state with CC_STATUS_INIT for now. */
1618 #define CC_STATUS_INIT m88k_volatile_code = '\0'
1619
1620 /* Compute the cost of computing a constant rtl expression RTX
1621 whose rtx-code is CODE. The body of this macro is a portion
1622 of a switch statement. If the code is computed here,
1623 return it with a return statement. Otherwise, break from the switch.
1624
1625 We assume that any 16 bit integer can easily be recreated, so we
1626 indicate 0 cost, in an attempt to get GCC not to optimize things
1627 like comparison against a constant.
1628
1629 The cost of CONST_DOUBLE is zero (if it can be placed in an insn, it
1630 is as good as a register; since it can't be placed in any insn, it
1631 won't do anything in cse, but it will cause expand_binop to pass the
1632 constant to the define_expands). */
1633 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1634 case CONST_INT: \
1635 if (SMALL_INT (RTX)) \
1636 return 0; \
1637 else if (SMALL_INTVAL (- INTVAL (RTX))) \
1638 return 2; \
1639 else if (classify_integer (SImode, INTVAL (RTX)) != m88k_oru_or) \
1640 return 4; \
1641 return 7; \
1642 case HIGH: \
1643 return 2; \
1644 case CONST: \
1645 case LABEL_REF: \
1646 case SYMBOL_REF: \
1647 if (flag_pic) \
1648 return (flag_pic == 2) ? 11 : 8; \
1649 return 5; \
1650 case CONST_DOUBLE: \
1651 return 0;
1652
1653 /* Provide the costs of an addressing mode that contains ADDR.
1654 If ADDR is not a valid address, its cost is irrelevant.
1655 REG+REG is made slightly more expensive because it might keep
1656 a register live for longer than we might like. */
1657 #define ADDRESS_COST(ADDR) \
1658 (GET_CODE (ADDR) == REG ? 1 : \
1659 GET_CODE (ADDR) == LO_SUM ? 1 : \
1660 GET_CODE (ADDR) == HIGH ? 2 : \
1661 GET_CODE (ADDR) == MULT ? 1 : \
1662 GET_CODE (ADDR) != PLUS ? 4 : \
1663 (REG_P (XEXP (ADDR, 0)) && REG_P (XEXP (ADDR, 1))) ? 2 : 1)
1664
1665 /* Provide the costs of a rtl expression. This is in the body of a
1666 switch on CODE. */
1667 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1668 case MEM: \
1669 return COSTS_N_INSNS (2); \
1670 case MULT: \
1671 return COSTS_N_INSNS (3); \
1672 case DIV: \
1673 case UDIV: \
1674 case MOD: \
1675 case UMOD: \
1676 return COSTS_N_INSNS (38);
1677
1678 /* A C expressions returning the cost of moving data of MODE from a register
1679 to or from memory. This is more costly than between registers. */
1680 #define MEMORY_MOVE_COST(MODE) 4
1681
1682 /* Provide the cost of a branch. Exact meaning under development. */
1683 #define BRANCH_COST (TARGET_88100 ? 1 : 2)
1684
1685 /* A C statement (sans semicolon) to update the integer variable COST
1686 based on the relationship between INSN that is dependent on
1687 DEP_INSN through the dependence LINK. The default is to make no
1688 adjustment to COST. On the m88k, ignore the cost of anti- and
1689 output-dependencies. On the m88100, a store can issue two cycles
1690 before the value (not the address) has finished computing. */
1691 #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
1692 do { \
1693 if (REG_NOTE_KIND (LINK) != 0) \
1694 (COST) = 0; /* Anti or output dependence. */ \
1695 else if (! TARGET_88100 \
1696 && recog_memoized (INSN) >= 0 \
1697 && get_attr_type (INSN) == TYPE_STORE \
1698 && SET_SRC (PATTERN (INSN)) == SET_DEST (PATTERN (DEP_INSN))) \
1699 (COST) -= 4; /* 88110 store reservation station. */ \
1700 } while (0)
1701
1702 /* Define this to be nonzero if the character `$' should be allowed
1703 by default in identifier names. */
1704 #define DOLLARS_IN_IDENTIFIERS 1
1705
1706 /* Do not break .stabs pseudos into continuations. */
1707 #define DBX_CONTIN_LENGTH 0
1708 \f
1709 /*** Output of Assembler Code ***/
1710
1711 /* Control the assembler format that we output. */
1712
1713 /* Allow pseudo-ops to be overridden. Override these in svr[34].h. */
1714 #undef INT_ASM_OP
1715 #undef ASCII_DATA_ASM_OP
1716 #undef CONST_SECTION_ASM_OP
1717 #undef CTORS_SECTION_ASM_OP
1718 #undef DTORS_SECTION_ASM_OP
1719 #undef INIT_SECTION_ASM_OP
1720 #undef FINI_SECTION_ASM_OP
1721 #undef TYPE_ASM_OP
1722 #undef SIZE_ASM_OP
1723 #undef WEAK_ASM_OP
1724 #undef SET_ASM_OP
1725 #undef SKIP_ASM_OP
1726 #undef COMMON_ASM_OP
1727 #undef ALIGN_ASM_OP
1728 #undef IDENT_ASM_OP
1729
1730 /* These are used in varasm.c as well. */
1731 #define TEXT_SECTION_ASM_OP "text"
1732 #define DATA_SECTION_ASM_OP "data"
1733
1734 /* Other sections. */
1735 #define CONST_SECTION_ASM_OP (TARGET_SVR4 \
1736 ? "section\t .rodata,\"a\"" \
1737 : "section\t .rodata,\"x\"")
1738 #define TDESC_SECTION_ASM_OP (TARGET_SVR4 \
1739 ? "section\t .tdesc,\"a\"" \
1740 : "section\t .tdesc,\"x\"")
1741
1742 /* These must be constant strings for crtstuff.c. */
1743 #define CTORS_SECTION_ASM_OP "section\t .ctors,\"d\""
1744 #define DTORS_SECTION_ASM_OP "section\t .dtors,\"d\""
1745 #define INIT_SECTION_ASM_OP "section\t .init,\"x\""
1746 #define FINI_SECTION_ASM_OP "section\t .fini,\"x\""
1747
1748 /* These are pretty much common to all assemblers. */
1749 #define IDENT_ASM_OP "ident"
1750 #define FILE_ASM_OP "file"
1751 #define SECTION_ASM_OP "section"
1752 #define SET_ASM_OP "def"
1753 #define GLOBAL_ASM_OP "global"
1754 #define ALIGN_ASM_OP "align"
1755 #define SKIP_ASM_OP "zero"
1756 #define COMMON_ASM_OP "comm"
1757 #define BSS_ASM_OP "bss"
1758 #define FLOAT_ASM_OP "float"
1759 #define DOUBLE_ASM_OP "double"
1760 #define INT_ASM_OP "word"
1761 #define ASM_LONG INT_ASM_OP
1762 #define SHORT_ASM_OP "half"
1763 #define CHAR_ASM_OP "byte"
1764 #define ASCII_DATA_ASM_OP "string"
1765
1766 /* These are particular to the global pool optimization. */
1767 #define SBSS_ASM_OP "sbss"
1768 #define SCOMM_ASM_OP "scomm"
1769 #define SDATA_SECTION_ASM_OP "sdata"
1770
1771 /* These are specific to PIC. */
1772 #define TYPE_ASM_OP "type"
1773 #define SIZE_ASM_OP "size"
1774 #define WEAK_ASM_OP "weak"
1775 #ifndef AS_BUG_POUND_TYPE /* Faulty assemblers require @ rather than #. */
1776 #undef TYPE_OPERAND_FMT
1777 #define TYPE_OPERAND_FMT "#%s"
1778 #endif
1779
1780 /* These are specific to version 03.00 assembler syntax. */
1781 #define INTERNAL_ASM_OP "local"
1782 #define VERSION_ASM_OP "version"
1783 #define UNALIGNED_SHORT_ASM_OP "uahalf"
1784 #define UNALIGNED_INT_ASM_OP "uaword"
1785 #define PUSHSECTION_ASM_OP "section"
1786 #define POPSECTION_ASM_OP "previous"
1787
1788 /* These are specific to the version 04.00 assembler syntax. */
1789 #define REQUIRES_88110_ASM_OP "requires_88110"
1790
1791 /* Output any initial stuff to the assembly file. Always put out
1792 a file directive, even if not debugging.
1793
1794 Immediately after putting out the file, put out a "sem.<value>"
1795 declaration. This should be harmless on other systems, and
1796 is used in DG/UX by the debuggers to supplement COFF. The
1797 fields in the integer value are as follows:
1798
1799 Bits Value Meaning
1800 ---- ----- -------
1801 0-1 0 No information about stack locations
1802 1 Auto/param locations are based on r30
1803 2 Auto/param locations are based on CFA
1804
1805 3-2 0 No information on dimension order
1806 1 Array dims in sym table matches source language
1807 2 Array dims in sym table is in reverse order
1808
1809 5-4 0 No information about the case of global names
1810 1 Global names appear in the symbol table as in the source
1811 2 Global names have been converted to lower case
1812 3 Global names have been converted to upper case. */
1813
1814 #ifdef SDB_DEBUGGING_INFO
1815 #define ASM_COFFSEM(FILE) \
1816 if (write_symbols == SDB_DEBUG) \
1817 { \
1818 fprintf (FILE, "\nsem.%x:\t\t; %s\n", \
1819 (((TARGET_OCS_FRAME_POSITION) ? 2 : 1) << 0) + (1 << 2) + (1 << 4),\
1820 (TARGET_OCS_FRAME_POSITION) \
1821 ? "frame is CFA, normal array dims, case unchanged" \
1822 : "frame is r30, normal array dims, case unchanged"); \
1823 }
1824 #else
1825 #define ASM_COFFSEM(FILE)
1826 #endif
1827
1828 /* Output the first line of the assembly file. Redefined in dgux.h. */
1829
1830 #define ASM_FIRST_LINE(FILE) \
1831 do { \
1832 if (TARGET_SVR4) \
1833 { \
1834 if (TARGET_88110) \
1835 fprintf (FILE, "\t%s\t \"%s\"\n", VERSION_ASM_OP, "04.00"); \
1836 else \
1837 fprintf (FILE, "\t%s\t \"%s\"\n", VERSION_ASM_OP, "03.00"); \
1838 } \
1839 } while (0)
1840
1841 /* Override svr[34].h. */
1842 #undef ASM_FILE_START
1843 #define ASM_FILE_START(FILE) \
1844 output_file_start (FILE, f_options, sizeof f_options / sizeof f_options[0], \
1845 W_options, sizeof W_options / sizeof W_options[0])
1846
1847 #undef ASM_FILE_END
1848
1849 #define ASM_OUTPUT_SOURCE_FILENAME(FILE, NAME) \
1850 fprintf (FILE, "\t%s\t \"%s\"\n", FILE_ASM_OP, NAME)
1851
1852 #ifdef SDB_DEBUGGING_INFO
1853 #undef ASM_OUTPUT_SOURCE_LINE
1854 #define ASM_OUTPUT_SOURCE_LINE(FILE, LINE) \
1855 if (m88k_prologue_done) \
1856 fprintf (FILE, "\n\tln\t %d\t\t\t\t; Real source line %d\n",\
1857 LINE - sdb_begin_function_line, LINE)
1858 #endif
1859
1860 /* Code to handle #ident directives. Override svr[34].h definition. */
1861 #undef ASM_OUTPUT_IDENT
1862 #ifdef DBX_DEBUGGING_INFO
1863 #define ASM_OUTPUT_IDENT(FILE, NAME)
1864 #else
1865 #define ASM_OUTPUT_IDENT(FILE, NAME) \
1866 output_ascii (FILE, IDENT_ASM_OP, 4000, NAME, strlen (NAME));
1867 #endif
1868
1869 /* Output to assembler file text saying following lines
1870 may contain character constants, extra white space, comments, etc. */
1871 #define ASM_APP_ON ""
1872
1873 /* Output to assembler file text saying following lines
1874 no longer contain unusual constructs. */
1875 #define ASM_APP_OFF ""
1876
1877 /* Format the assembly opcode so that the arguments are all aligned.
1878 The maximum instruction size is 8 characters (fxxx.xxx), so a tab and a
1879 space will do to align the output. Abandon the output if a `%' is
1880 encountered. */
1881 #define ASM_OUTPUT_OPCODE(STREAM, PTR) \
1882 { \
1883 int ch; \
1884 char *orig_ptr; \
1885 \
1886 for (orig_ptr = (PTR); \
1887 (ch = *(PTR)) && ch != ' ' && ch != '\t' && ch != '\n' && ch != '%'; \
1888 (PTR)++) \
1889 putc (ch, STREAM); \
1890 \
1891 if (ch == ' ' && orig_ptr != (PTR) && (PTR) - orig_ptr < 8) \
1892 putc ('\t', STREAM); \
1893 }
1894
1895 /* How to refer to registers in assembler output.
1896 This sequence is indexed by compiler's hard-register-number.
1897 Updated by OVERRIDE_OPTIONS to include the # for version 03.00 syntax. */
1898
1899 #define REGISTER_NAMES \
1900 {"#r0"+1, "#r1"+1, "#r2"+1, "#r3"+1, "#r4"+1, "#r5"+1, "#r6"+1, "#r7"+1, \
1901 "#r8"+1, "#r9"+1, "#r10"+1,"#r11"+1,"#r12"+1,"#r13"+1,"#r14"+1,"#r15"+1,\
1902 "#r16"+1,"#r17"+1,"#r18"+1,"#r19"+1,"#r20"+1,"#r21"+1,"#r22"+1,"#r23"+1,\
1903 "#r24"+1,"#r25"+1,"#r26"+1,"#r27"+1,"#r28"+1,"#r29"+1,"#r30"+1,"#r31"+1,\
1904 "#x0"+1, "#x1"+1, "#x2"+1, "#x3"+1, "#x4"+1, "#x5"+1, "#x6"+1, "#x7"+1, \
1905 "#x8"+1, "#x9"+1, "#x10"+1,"#x11"+1,"#x12"+1,"#x13"+1,"#x14"+1,"#x15"+1,\
1906 "#x16"+1,"#x17"+1,"#x18"+1,"#x19"+1,"#x20"+1,"#x21"+1,"#x22"+1,"#x23"+1,\
1907 "#x24"+1,"#x25"+1,"#x26"+1,"#x27"+1,"#x28"+1,"#x29"+1,"#x30"+1,"#x31"+1}
1908
1909 /* Define additional names for use in asm clobbers and asm declarations.
1910
1911 We define the fake Condition Code register as an alias for reg 0 (which
1912 is our `condition code' register), so that condition codes can easily
1913 be clobbered by an asm. The carry bit in the PSR is now used. */
1914
1915 #define ADDITIONAL_REGISTER_NAMES {"psr", 0, "cc", 0}
1916
1917 /* How to renumber registers for dbx and gdb. */
1918 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1919
1920 /* Tell when to declare ASM names. Override svr4.h to provide this hook. */
1921 #undef DECLARE_ASM_NAME
1922 #define DECLARE_ASM_NAME TARGET_SVR4
1923
1924 /* Write the extra assembler code needed to declare a function properly. */
1925 #undef ASM_DECLARE_FUNCTION_NAME
1926 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1927 do { \
1928 if (DECLARE_ASM_NAME) \
1929 { \
1930 fprintf (FILE, "\t%s\t ", TYPE_ASM_OP); \
1931 assemble_name (FILE, NAME); \
1932 putc (',', FILE); \
1933 fprintf (FILE, TYPE_OPERAND_FMT, "function"); \
1934 putc ('\n', FILE); \
1935 } \
1936 ASM_OUTPUT_LABEL(FILE, NAME); \
1937 } while (0)
1938
1939 /* Write the extra assembler code needed to declare an object properly. */
1940 #undef ASM_DECLARE_OBJECT_NAME
1941 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
1942 do { \
1943 if (DECLARE_ASM_NAME) \
1944 { \
1945 fprintf (FILE, "\t%s\t ", TYPE_ASM_OP); \
1946 assemble_name (FILE, NAME); \
1947 putc (',', FILE); \
1948 fprintf (FILE, TYPE_OPERAND_FMT, "object"); \
1949 putc ('\n', FILE); \
1950 size_directive_output = 0; \
1951 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
1952 { \
1953 size_directive_output = 1; \
1954 fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
1955 assemble_name (FILE, NAME); \
1956 fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
1957 } \
1958 } \
1959 ASM_OUTPUT_LABEL(FILE, NAME); \
1960 } while (0)
1961
1962 /* Output the size directive for a decl in rest_of_decl_compilation
1963 in the case where we did not do so before the initializer.
1964 Once we find the error_mark_node, we know that the value of
1965 size_directive_output was set
1966 by ASM_DECLARE_OBJECT_NAME when it was run for the same decl. */
1967
1968 #undef ASM_FINISH_DECLARE_OBJECT
1969 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
1970 do { \
1971 char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
1972 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
1973 && DECLARE_ASM_NAME \
1974 && ! AT_END && TOP_LEVEL \
1975 && DECL_INITIAL (DECL) == error_mark_node \
1976 && !size_directive_output) \
1977 { \
1978 size_directive_output = 1; \
1979 fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
1980 assemble_name (FILE, name); \
1981 fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
1982 } \
1983 } while (0)
1984
1985 /* This is how to declare the size of a function. */
1986 #undef ASM_DECLARE_FUNCTION_SIZE
1987 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
1988 do { \
1989 if (DECLARE_ASM_NAME) \
1990 { \
1991 if (!flag_inhibit_size_directive) \
1992 { \
1993 char label[256]; \
1994 static int labelno = 0; \
1995 labelno++; \
1996 ASM_GENERATE_INTERNAL_LABEL (label, "Lfe", labelno); \
1997 ASM_OUTPUT_INTERNAL_LABEL (FILE, "Lfe", labelno); \
1998 fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
1999 assemble_name (FILE, (FNAME)); \
2000 fprintf (FILE, ",%s-", &label[1]); \
2001 assemble_name (FILE, (FNAME)); \
2002 putc ('\n', FILE); \
2003 } \
2004 } \
2005 } while (0)
2006
2007 /* This is how to output the definition of a user-level label named NAME,
2008 such as the label on a static function or variable NAME. */
2009 #define ASM_OUTPUT_LABEL(FILE,NAME) \
2010 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
2011
2012 /* This is how to output a command to make the user-level label named NAME
2013 defined for reference from other files. */
2014 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
2015 do { \
2016 fprintf (FILE, "\t%s\t ", GLOBAL_ASM_OP); \
2017 assemble_name (FILE, NAME); \
2018 putc ('\n', FILE); \
2019 } while (0)
2020
2021 /* This is how to output a reference to a user-level label named NAME.
2022 Override svr[34].h. */
2023 #undef ASM_OUTPUT_LABELREF
2024 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
2025 { \
2026 if (!TARGET_NO_UNDERSCORES && !TARGET_SVR4) \
2027 fputc ('_', FILE); \
2028 fputs (NAME, FILE); \
2029 }
2030
2031 /* This is how to output an internal numbered label where
2032 PREFIX is the class of label and NUM is the number within the class.
2033 For V.4, labels use `.' rather than `@'. */
2034
2035 #undef ASM_OUTPUT_INTERNAL_LABEL
2036 #ifdef AS_BUG_DOT_LABELS /* The assembler requires a declaration of local. */
2037 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
2038 fprintf (FILE, TARGET_SVR4 ? ".%s%d:\n\t%s\t .%s%d\n" : "@%s%d:\n", \
2039 PREFIX, NUM, INTERNAL_ASM_OP, PREFIX, NUM)
2040 #else
2041 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
2042 fprintf (FILE, TARGET_SVR4 ? ".%s%d:\n" : "@%s%d:\n", PREFIX, NUM)
2043 #endif /* AS_BUG_DOT_LABELS */
2044
2045 /* This is how to store into the string LABEL
2046 the symbol_ref name of an internal numbered label where
2047 PREFIX is the class of label and NUM is the number within the class.
2048 This is suitable for output with `assemble_name'. This must agree
2049 with ASM_OUTPUT_INTERNAL_LABEL above, except for being prefixed
2050 with an `*'. */
2051
2052 #undef ASM_GENERATE_INTERNAL_LABEL
2053 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
2054 sprintf (LABEL, TARGET_SVR4 ? "*.%s%d" : "*@%s%d", PREFIX, NUM)
2055
2056 /* Internal macro to get a single precision floating point value into
2057 an int, so we can print it's value in hex. */
2058 #define FLOAT_TO_INT_INTERNAL( FVALUE, IVALUE ) \
2059 { union { \
2060 REAL_VALUE_TYPE d; \
2061 struct { \
2062 unsigned sign : 1; \
2063 unsigned exponent1 : 1; \
2064 unsigned exponent2 : 3; \
2065 unsigned exponent3 : 7; \
2066 unsigned mantissa1 : 20; \
2067 unsigned mantissa2 : 3; \
2068 unsigned mantissa3 : 29; \
2069 } s; \
2070 } _u; \
2071 \
2072 union { \
2073 int i; \
2074 struct { \
2075 unsigned sign : 1; \
2076 unsigned exponent1 : 1; \
2077 unsigned exponent3 : 7; \
2078 unsigned mantissa1 : 20; \
2079 unsigned mantissa2 : 3; \
2080 } s; \
2081 } _u2; \
2082 \
2083 _u.d = REAL_VALUE_TRUNCATE (SFmode, FVALUE); \
2084 _u2.s.sign = _u.s.sign; \
2085 _u2.s.exponent1 = _u.s.exponent1; \
2086 _u2.s.exponent3 = _u.s.exponent3; \
2087 _u2.s.mantissa1 = _u.s.mantissa1; \
2088 _u2.s.mantissa2 = _u.s.mantissa2; \
2089 IVALUE = _u2.i; \
2090 }
2091
2092 /* This is how to output an assembler line defining a `double' constant.
2093 Use "word" pseudos to avoid printing NaNs, infinity, etc. */
2094 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2095 do { \
2096 union { REAL_VALUE_TYPE d; long l[2]; } x; \
2097 x.d = (VALUE); \
2098 fprintf (FILE, "\t%s\t 0x%.8x, 0x%.8x\n", INT_ASM_OP, \
2099 x.l[0], x.l[1]); \
2100 } while (0)
2101
2102 /* This is how to output an assembler line defining a `float' constant. */
2103 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2104 do { \
2105 int i; \
2106 FLOAT_TO_INT_INTERNAL (VALUE, i); \
2107 fprintf (FILE, "\t%s\t 0x%.8x\n", INT_ASM_OP, i); \
2108 } while (0)
2109
2110 /* Likewise for `int', `short', and `char' constants. */
2111 #define ASM_OUTPUT_INT(FILE,VALUE) \
2112 ( fprintf (FILE, "\t%s\t ", INT_ASM_OP), \
2113 output_addr_const (FILE, (VALUE)), \
2114 fprintf (FILE, "\n"))
2115
2116 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2117 ( fprintf (FILE, "\t%s\t ", SHORT_ASM_OP), \
2118 output_addr_const (FILE, (VALUE)), \
2119 fprintf (FILE, "\n"))
2120
2121 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
2122 ( fprintf (FILE, "\t%s\t ", CHAR_ASM_OP), \
2123 output_addr_const (FILE, (VALUE)), \
2124 fprintf (FILE, "\n"))
2125
2126 /* This is how to output an assembler line for a numeric constant byte. */
2127 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
2128 fprintf (FILE, "\t%s\t 0x%x\n", CHAR_ASM_OP, (VALUE))
2129
2130 /* The single-byte pseudo-op is the default. Override svr[34].h. */
2131 #undef ASM_BYTE_OP
2132 #define ASM_BYTE_OP "byte"
2133 #undef ASM_OUTPUT_ASCII
2134 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
2135 output_ascii (FILE, ASCII_DATA_ASM_OP, 48, P, SIZE)
2136
2137 /* Override svr4.h. Change to the readonly data section for a table of
2138 addresses. final_scan_insn changes back to the text section. */
2139 #undef ASM_OUTPUT_CASE_LABEL
2140 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
2141 do { \
2142 if (! CASE_VECTOR_INSNS) \
2143 { \
2144 readonly_data_section (); \
2145 ASM_OUTPUT_ALIGN (FILE, 2); \
2146 } \
2147 ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \
2148 } while (0)
2149
2150 /* Epilogue for case labels. This jump instruction is called by casesi
2151 to transfer to the appropriate branch instruction within the table.
2152 The label `@L<n>e' is coined to mark the end of the table. */
2153 #define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
2154 do { \
2155 if (CASE_VECTOR_INSNS) \
2156 { \
2157 char label[256]; \
2158 ASM_GENERATE_INTERNAL_LABEL (label, "L", NUM); \
2159 fprintf (FILE, "%se:\n", &label[1]); \
2160 if (! flag_delayed_branch) \
2161 fprintf (FILE, "\tlda\t %s,%s[%s]\n", reg_names[1], \
2162 reg_names[1], reg_names[m88k_case_index]); \
2163 fprintf (FILE, "\tjmp\t %s\n", reg_names[1]); \
2164 } \
2165 } while (0)
2166
2167 /* This is how to output an element of a case-vector that is absolute. */
2168 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2169 do { \
2170 char buffer[256]; \
2171 ASM_GENERATE_INTERNAL_LABEL (buffer, "L", VALUE); \
2172 fprintf (FILE, CASE_VECTOR_INSNS ? "\tbr\t %s\n" : "\tword\t %s\n", \
2173 &buffer[1]); \
2174 } while (0)
2175
2176 /* This is how to output an element of a case-vector that is relative. */
2177 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
2178 ASM_OUTPUT_ADDR_VEC_ELT (FILE, VALUE)
2179
2180 /* This is how to output an assembler line
2181 that says to advance the location counter
2182 to a multiple of 2**LOG bytes. */
2183 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
2184 if ((LOG) != 0) \
2185 fprintf (FILE, "\t%s\t %d\n", ALIGN_ASM_OP, 1<<(LOG))
2186
2187 /* On the m88100, align the text address to half a cache boundary when it
2188 can only be reached by jumping. Pack code tightly when compiling
2189 crtstuff.c. */
2190 #define ASM_OUTPUT_ALIGN_CODE(FILE) \
2191 ASM_OUTPUT_ALIGN (FILE, \
2192 (TARGET_88100 && !flag_inhibit_size_directive ? 3 : 2))
2193
2194 /* Override svr[34].h. */
2195 #undef ASM_OUTPUT_SKIP
2196 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
2197 fprintf (FILE, "\t%s\t %u\n", SKIP_ASM_OP, (SIZE))
2198
2199 /* Override svr4.h. */
2200 #undef ASM_OUTPUT_EXTERNAL_LIBCALL
2201
2202 /* This says how to output an assembler line to define a global common
2203 symbol. Size can be zero for the unusual case of a `struct { int : 0; }'.
2204 Override svr[34].h. */
2205 #undef ASM_OUTPUT_COMMON
2206 #undef ASM_OUTPUT_ALIGNED_COMMON
2207 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
2208 ( fprintf ((FILE), "\t%s\t ", \
2209 ((SIZE) ? (SIZE) : 1) <= m88k_gp_threshold ? SCOMM_ASM_OP : COMMON_ASM_OP), \
2210 assemble_name ((FILE), (NAME)), \
2211 fprintf ((FILE), ",%u\n", (SIZE) ? (SIZE) : 1))
2212
2213 /* This says how to output an assembler line to define a local common
2214 symbol. Override svr[34].h. */
2215 #undef ASM_OUTPUT_LOCAL
2216 #undef ASM_OUTPUT_ALIGNED_LOCAL
2217 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
2218 ( fprintf ((FILE), "\t%s\t ", \
2219 ((SIZE) ? (SIZE) : 1) <= m88k_gp_threshold ? SBSS_ASM_OP : BSS_ASM_OP), \
2220 assemble_name ((FILE), (NAME)), \
2221 fprintf ((FILE), ",%u,%d\n", (SIZE) ? (SIZE) : 1, (SIZE) <= 4 ? 4 : 8))
2222
2223 /* Store in OUTPUT a string (made with alloca) containing
2224 an assembler-name for a local static variable named NAME.
2225 LABELNO is an integer which is different for each call. */
2226 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2227 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2228 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2229
2230 /* This is how to output an insn to push a register on the stack.
2231 It need not be very fast code. */
2232 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2233 fprintf (FILE, "\tsubu\t %s,%s,%d\n\tst\t %s,%s,0\n", \
2234 reg_names[STACK_POINTER_REGNUM], \
2235 reg_names[STACK_POINTER_REGNUM], \
2236 (STACK_BOUNDARY / BITS_PER_UNIT), \
2237 reg_names[REGNO], \
2238 reg_names[STACK_POINTER_REGNUM])
2239
2240 /* Length in instructions of the code output by ASM_OUTPUT_REG_PUSH. */
2241 #define REG_PUSH_LENGTH 2
2242
2243 /* This is how to output an insn to pop a register from the stack. */
2244 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2245 fprintf (FILE, "\tld\t %s,%s,0\n\taddu\t %s,%s,%d\n", \
2246 reg_names[REGNO], \
2247 reg_names[STACK_POINTER_REGNUM], \
2248 reg_names[STACK_POINTER_REGNUM], \
2249 reg_names[STACK_POINTER_REGNUM], \
2250 (STACK_BOUNDARY / BITS_PER_UNIT))
2251
2252 /* Length in instructions of the code output by ASM_OUTPUT_REG_POP. */
2253 #define REG_POP_LENGTH 2
2254
2255 /* Define the parentheses used to group arithmetic operations
2256 in assembler code. */
2257 #define ASM_OPEN_PAREN "("
2258 #define ASM_CLOSE_PAREN ")"
2259
2260 /* Define results of standard character escape sequences. */
2261 #define TARGET_BELL 007
2262 #define TARGET_BS 010
2263 #define TARGET_TAB 011
2264 #define TARGET_NEWLINE 012
2265 #define TARGET_VT 013
2266 #define TARGET_FF 014
2267 #define TARGET_CR 015
2268 \f
2269 /* Macros to deal with OCS debug information */
2270
2271 #define OCS_START_PREFIX "Ltb"
2272 #define OCS_END_PREFIX "Lte"
2273
2274 #define PUT_OCS_FUNCTION_START(FILE) \
2275 { ASM_OUTPUT_INTERNAL_LABEL (FILE, OCS_START_PREFIX, m88k_function_number); }
2276
2277 #define PUT_OCS_FUNCTION_END(FILE) \
2278 { ASM_OUTPUT_INTERNAL_LABEL (FILE, OCS_END_PREFIX, m88k_function_number); }
2279
2280 /* Macros for debug information */
2281 #define DEBUGGER_AUTO_OFFSET(X) \
2282 (m88k_debugger_offset (X, 0) \
2283 + (TARGET_OCS_FRAME_POSITION ? 0 : m88k_stack_size - m88k_fp_offset))
2284
2285 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
2286 (m88k_debugger_offset (X, OFFSET) \
2287 + (TARGET_OCS_FRAME_POSITION ? 0 : m88k_stack_size - m88k_fp_offset))
2288
2289 /* Macros to deal with SDB debug information */
2290 #ifdef SDB_DEBUGGING_INFO
2291
2292 /* Output structure tag names even when it causes a forward reference. */
2293 #define SDB_ALLOW_FORWARD_REFERENCES
2294
2295 /* Print out extra debug information in the assembler file */
2296 #define PUT_SDB_SCL(a) \
2297 do { \
2298 register int s = (a); \
2299 register char *scl; \
2300 switch (s) \
2301 { \
2302 case C_EFCN: scl = "end of function"; break; \
2303 case C_NULL: scl = "NULL storage class"; break; \
2304 case C_AUTO: scl = "automatic"; break; \
2305 case C_EXT: scl = "external"; break; \
2306 case C_STAT: scl = "static"; break; \
2307 case C_REG: scl = "register"; break; \
2308 case C_EXTDEF: scl = "external definition"; break; \
2309 case C_LABEL: scl = "label"; break; \
2310 case C_ULABEL: scl = "undefined label"; break; \
2311 case C_MOS: scl = "structure member"; break; \
2312 case C_ARG: scl = "argument"; break; \
2313 case C_STRTAG: scl = "structure tag"; break; \
2314 case C_MOU: scl = "union member"; break; \
2315 case C_UNTAG: scl = "union tag"; break; \
2316 case C_TPDEF: scl = "typedef"; break; \
2317 case C_USTATIC: scl = "uninitialized static"; break; \
2318 case C_ENTAG: scl = "enumeration tag"; break; \
2319 case C_MOE: scl = "member of enumeration"; break; \
2320 case C_REGPARM: scl = "register parameter"; break; \
2321 case C_FIELD: scl = "bit field"; break; \
2322 case C_BLOCK: scl = "block start/end"; break; \
2323 case C_FCN: scl = "function start/end"; break; \
2324 case C_EOS: scl = "end of structure"; break; \
2325 case C_FILE: scl = "filename"; break; \
2326 case C_LINE: scl = "line"; break; \
2327 case C_ALIAS: scl = "duplicated tag"; break; \
2328 case C_HIDDEN: scl = "hidden"; break; \
2329 default: scl = "unknown"; break; \
2330 } \
2331 \
2332 fprintf(asm_out_file, "\tscl\t %d\t\t\t\t; %s\n", s, scl); \
2333 } while (0)
2334
2335 #define PUT_SDB_TYPE(a) \
2336 do { \
2337 register int t = (a); \
2338 static char buffer[100]; \
2339 register char *p = buffer, *q; \
2340 register int typ = t; \
2341 register int i,d; \
2342 \
2343 for (i = 0; i <= 5; i++) \
2344 { \
2345 switch ((typ >> ((i*N_TSHIFT) + N_BTSHFT)) & 03) \
2346 { \
2347 case DT_PTR: \
2348 strcpy (p, "ptr to "); \
2349 p += sizeof("ptr to"); \
2350 break; \
2351 \
2352 case DT_ARY: \
2353 strcpy (p, "array of "); \
2354 p += sizeof("array of"); \
2355 break; \
2356 \
2357 case DT_FCN: \
2358 strcpy (p, "func ret "); \
2359 p += sizeof("func ret"); \
2360 break; \
2361 } \
2362 } \
2363 \
2364 switch (typ & N_BTMASK) \
2365 { \
2366 case T_NULL: q = "<no type>"; break; \
2367 case T_CHAR: q = "char"; break; \
2368 case T_SHORT: q = "short"; break; \
2369 case T_INT: q = "int"; break; \
2370 case T_LONG: q = "long"; break; \
2371 case T_FLOAT: q = "float"; break; \
2372 case T_DOUBLE: q = "double"; break; \
2373 case T_STRUCT: q = "struct"; break; \
2374 case T_UNION: q = "union"; break; \
2375 case T_ENUM: q = "enum"; break; \
2376 case T_MOE: q = "enum member"; break; \
2377 case T_UCHAR: q = "unsigned char"; break; \
2378 case T_USHORT: q = "unsigned short"; break; \
2379 case T_UINT: q = "unsigned int"; break; \
2380 case T_ULONG: q = "unsigned long"; break; \
2381 default: q = "void"; break; \
2382 } \
2383 \
2384 strcpy (p, q); \
2385 fprintf(asm_out_file, "\ttype\t %d\t\t\t\t; %s\n", \
2386 t, buffer); \
2387 } while (0)
2388
2389 #define PUT_SDB_INT_VAL(a) \
2390 fprintf (asm_out_file, "\tval\t %d\n", (a))
2391
2392 #define PUT_SDB_VAL(a) \
2393 ( fprintf (asm_out_file, "\tval\t "), \
2394 output_addr_const (asm_out_file, (a)), \
2395 fputc ('\n', asm_out_file))
2396
2397 #define PUT_SDB_DEF(a) \
2398 do { fprintf (asm_out_file, "\tsdef\t "); \
2399 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2400 fputc ('\n', asm_out_file); \
2401 } while (0)
2402
2403 #define PUT_SDB_PLAIN_DEF(a) \
2404 fprintf(asm_out_file,"\tsdef\t .%s\n", a)
2405
2406 /* Simply and endef now. */
2407 #define PUT_SDB_ENDEF \
2408 fputs("\tendef\n\n", asm_out_file)
2409
2410 #define PUT_SDB_SIZE(a) \
2411 fprintf (asm_out_file, "\tsize\t %d\n", (a))
2412
2413 /* Max dimensions to store for debug information (limited by COFF). */
2414 #define SDB_MAX_DIM 6
2415
2416 /* New method for dim operations. */
2417 #define PUT_SDB_START_DIM \
2418 fputs("\tdim\t ", asm_out_file)
2419
2420 /* How to end the DIM sequence. */
2421 #define PUT_SDB_LAST_DIM(a) \
2422 fprintf(asm_out_file, "%d\n", a)
2423
2424 #define PUT_SDB_TAG(a) \
2425 do { \
2426 fprintf (asm_out_file, "\ttag\t "); \
2427 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2428 fputc ('\n', asm_out_file); \
2429 } while( 0 )
2430
2431 #define PUT_SDB_BLOCK_OR_FUNCTION(NAME, SCL, LINE) \
2432 do { \
2433 fprintf (asm_out_file, "\n\tsdef\t %s\n\tval\t .\n", \
2434 NAME); \
2435 PUT_SDB_SCL( SCL ); \
2436 fprintf (asm_out_file, "\tline\t %d\n\tendef\n\n", \
2437 (LINE)); \
2438 } while (0)
2439
2440 #define PUT_SDB_BLOCK_START(LINE) \
2441 PUT_SDB_BLOCK_OR_FUNCTION (".bb", C_BLOCK, (LINE))
2442
2443 #define PUT_SDB_BLOCK_END(LINE) \
2444 PUT_SDB_BLOCK_OR_FUNCTION (".eb", C_BLOCK, (LINE))
2445
2446 #define PUT_SDB_FUNCTION_START(LINE) \
2447 do { \
2448 fprintf (asm_out_file, "\tln\t 1\n"); \
2449 PUT_SDB_BLOCK_OR_FUNCTION (".bf", C_FCN, (LINE)); \
2450 } while (0)
2451
2452 #define PUT_SDB_FUNCTION_END(LINE) \
2453 do { \
2454 PUT_SDB_BLOCK_OR_FUNCTION (".ef", C_FCN, (LINE)); \
2455 } while (0)
2456
2457 #define PUT_SDB_EPILOGUE_END(NAME) \
2458 do { \
2459 text_section (); \
2460 fprintf (asm_out_file, "\n\tsdef\t "); \
2461 ASM_OUTPUT_LABELREF(asm_out_file, (NAME)); \
2462 fputc('\n', asm_out_file); \
2463 PUT_SDB_SCL( C_EFCN ); \
2464 fprintf (asm_out_file, "\tendef\n\n"); \
2465 } while (0)
2466
2467 #define SDB_GENERATE_FAKE(BUFFER, NUMBER) \
2468 sprintf ((BUFFER), ".%dfake", (NUMBER));
2469
2470 #endif /* SDB_DEBUGGING_INFO */
2471 \f
2472 /* Support const and tdesc sections. Generally, a const section will
2473 be distinct from the text section whenever we do V.4-like things
2474 and so follows DECLARE_ASM_NAME. Note that strings go in text
2475 rather than const. Override svr[34].h. */
2476
2477 #undef USE_CONST_SECTION
2478 #undef EXTRA_SECTIONS
2479
2480 #define USE_CONST_SECTION DECLARE_ASM_NAME
2481
2482 #if defined(USING_SVR4_H)
2483
2484 #define EXTRA_SECTIONS in_const, in_tdesc, in_sdata, in_ctors, in_dtors
2485 #define INIT_SECTION_FUNCTION
2486 #define FINI_SECTION_FUNCTION
2487
2488 #else
2489 #if defined(USING_SVR3_H)
2490
2491 #define EXTRA_SECTIONS in_const, in_tdesc, in_sdata, in_ctors, in_dtors, \
2492 in_init, in_fini
2493
2494 #else /* luna or other not based on svr[34].h. */
2495
2496 #undef INIT_SECTION_ASM_OP
2497 #define EXTRA_SECTIONS in_const, in_tdesc, in_sdata
2498 #define CONST_SECTION_FUNCTION \
2499 void \
2500 const_section () \
2501 { \
2502 text_section(); \
2503 }
2504 #define CTORS_SECTION_FUNCTION
2505 #define DTORS_SECTION_FUNCTION
2506 #define INIT_SECTION_FUNCTION
2507 #define FINI_SECTION_FUNCTION
2508
2509 #endif /* USING_SVR3_H */
2510 #endif /* USING_SVR4_H */
2511
2512 #undef EXTRA_SECTION_FUNCTIONS
2513 #define EXTRA_SECTION_FUNCTIONS \
2514 CONST_SECTION_FUNCTION \
2515 \
2516 void \
2517 tdesc_section () \
2518 { \
2519 if (in_section != in_tdesc) \
2520 { \
2521 fprintf (asm_out_file, "%s\n", TDESC_SECTION_ASM_OP); \
2522 in_section = in_tdesc; \
2523 } \
2524 } \
2525 \
2526 void \
2527 sdata_section () \
2528 { \
2529 if (in_section != in_sdata) \
2530 { \
2531 fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
2532 in_section = in_sdata; \
2533 } \
2534 } \
2535 \
2536 CTORS_SECTION_FUNCTION \
2537 DTORS_SECTION_FUNCTION \
2538 INIT_SECTION_FUNCTION \
2539 FINI_SECTION_FUNCTION
2540
2541 /* A C statement or statements to switch to the appropriate
2542 section for output of DECL. DECL is either a `VAR_DECL' node
2543 or a constant of some sort. RELOC indicates whether forming
2544 the initial value of DECL requires link-time relocations.
2545
2546 For strings, the section is selected before the segment info is encoded. */
2547 #undef SELECT_SECTION
2548 #define SELECT_SECTION(DECL,RELOC) \
2549 { \
2550 if (TREE_CODE (DECL) == STRING_CST) \
2551 { \
2552 if (! flag_writable_strings) \
2553 const_section (); \
2554 else if ( TREE_STRING_LENGTH (DECL) <= m88k_gp_threshold) \
2555 sdata_section (); \
2556 else \
2557 data_section (); \
2558 } \
2559 else if (TREE_CODE (DECL) == VAR_DECL) \
2560 { \
2561 if (SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0))) \
2562 sdata_section (); \
2563 else if ((flag_pic && RELOC) \
2564 || !TREE_READONLY (DECL) || TREE_SIDE_EFFECTS (DECL) \
2565 || !DECL_INITIAL (DECL) \
2566 || (DECL_INITIAL (DECL) != error_mark_node \
2567 && !TREE_CONSTANT (DECL_INITIAL (DECL)))) \
2568 data_section (); \
2569 else \
2570 const_section (); \
2571 } \
2572 else \
2573 const_section (); \
2574 }
2575
2576 /* Jump tables consist of branch instructions and should be output in
2577 the text section. When we use a table of addresses, we explicitly
2578 change to the readonly data section. */
2579 #define JUMP_TABLES_IN_TEXT_SECTION 1
2580
2581 /* Define this macro if references to a symbol must be treated differently
2582 depending on something about the variable or function named by the
2583 symbol (such as what section it is in).
2584
2585 The macro definition, if any, is executed immediately after the rtl for
2586 DECL has been created and stored in `DECL_RTL (DECL)'. The value of the
2587 rtl will be a `mem' whose address is a `symbol_ref'.
2588
2589 For the m88k, determine if the item should go in the global pool. */
2590 #define ENCODE_SECTION_INFO(DECL) \
2591 do { \
2592 if (m88k_gp_threshold > 0) \
2593 if (TREE_CODE (DECL) == VAR_DECL) \
2594 { \
2595 if (!TREE_READONLY (DECL) || TREE_SIDE_EFFECTS (DECL)) \
2596 { \
2597 int size = int_size_in_bytes (TREE_TYPE (DECL)); \
2598 \
2599 if (size > 0 && size <= m88k_gp_threshold) \
2600 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
2601 } \
2602 } \
2603 else if (TREE_CODE (DECL) == STRING_CST \
2604 && flag_writable_strings \
2605 && TREE_STRING_LENGTH (DECL) <= m88k_gp_threshold) \
2606 SYMBOL_REF_FLAG (XEXP (TREE_CST_RTL (DECL), 0)) = 1; \
2607 } while (0)
2608 \f
2609 /* Print operand X (an rtx) in assembler syntax to file FILE.
2610 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2611 For `%' followed by punctuation, CODE is the punctuation and X is null. */
2612 #define PRINT_OPERAND_PUNCT_VALID_P(c) \
2613 ((c) == '#' || (c) == '.' || (c) == '!' || (c) == '*' || (c) == ';')
2614
2615 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2616
2617 /* Print a memory address as an operand to reference that memory location. */
2618 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
2619
2620 /* This says not to strength reduce the addr calculations within loops
2621 (otherwise it does not take advantage of m88k scaled loads and stores */
2622
2623 #define DONT_REDUCE_ADDR
This page took 0.161165 seconds and 5 git commands to generate.