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1 /* Definitions of target machine for GNU compiler for
2 Motorola m88100 in an 88open OCS/BCS environment.
3 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
4 2001, 2002 Free Software Foundation, Inc.
5 Contributed by Michael Tiemann (tiemann@cygnus.com).
6 Currently maintained by (gcc@dg-rtp.dg.com)
7
8 This file is part of GNU CC.
9
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
13 any later version.
14
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
24
25 /* The m88100 port of GNU CC adheres to the various standards from 88open.
26 These documents are available by writing:
27
28 88open Consortium Ltd.
29 100 Homeland Court, Suite 800
30 San Jose, CA 95112
31 (408) 436-6600
32
33 In brief, the current standards are:
34
35 Binary Compatibility Standard, Release 1.1A, May 1991
36 This provides for portability of application-level software at the
37 executable level for AT&T System V Release 3.2.
38
39 Object Compatibility Standard, Release 1.1A, May 1991
40 This provides for portability of application-level software at the
41 object file and library level for C, Fortran, and Cobol, and again,
42 largely for SVR3.
43
44 Under development are standards for AT&T System V Release 4, based on the
45 [generic] System V Application Binary Interface from AT&T. These include:
46
47 System V Application Binary Interface, Motorola 88000 Processor Supplement
48 Another document from AT&T for SVR4 specific to the m88100.
49 Available from Prentice Hall.
50
51 System V Application Binary Interface, Motorola 88000 Processor Supplement,
52 Release 1.1, Draft H, May 6, 1991
53 A proposed update to the AT&T document from 88open.
54
55 System V ABI Implementation Guide for the M88000 Processor,
56 Release 1.0, January 1991
57 A companion ABI document from 88open. */
58
59 /* Other *.h files in config/m88k include this one and override certain items.
60 Currently these are sysv3.h, sysv4.h, dgux.h, dolph.h, tekXD88.h, and luna.h.
61 Additionally, sysv4.h and dgux.h include svr4.h first. All other
62 m88k targets except luna.h are based on svr3.h. */
63
64 /* Choose SVR3 as the default. */
65 #if !defined(DBX_DEBUGGING_INFO) && !defined(DWARF_DEBUGGING_INFO)
66 #include "svr3.h"
67 #endif
68 \f
69 /* External types used. */
70
71 /* What instructions are needed to manufacture an integer constant. */
72 enum m88k_instruction {
73 m88k_zero,
74 m88k_or,
75 m88k_subu,
76 m88k_or_lo16,
77 m88k_or_lo8,
78 m88k_set,
79 m88k_oru_hi16,
80 m88k_oru_or
81 };
82
83 /* Which processor to schedule for. The elements of the enumeration
84 must match exactly the cpu attribute in the m88k.md machine description. */
85
86 enum processor_type {
87 PROCESSOR_M88100,
88 PROCESSOR_M88110,
89 PROCESSOR_M88000
90 };
91
92 /* Recast the cpu class to be the cpu attribute. */
93 #define m88k_cpu_attr ((enum attr_cpu)m88k_cpu)
94
95 /* External variables/functions defined in m88k.c. */
96
97 extern const char *m88k_pound_sign;
98 extern const char *m88k_short_data;
99 extern const char *m88k_version;
100 extern char m88k_volatile_code;
101
102 extern unsigned m88k_gp_threshold;
103 extern int m88k_prologue_done;
104 extern int m88k_function_number;
105 extern int m88k_fp_offset;
106 extern int m88k_stack_size;
107 extern int m88k_case_index;
108
109 extern struct rtx_def *m88k_compare_reg;
110 extern struct rtx_def *m88k_compare_op0;
111 extern struct rtx_def *m88k_compare_op1;
112
113 extern enum processor_type m88k_cpu;
114
115 /* external variables defined elsewhere in the compiler */
116
117 extern int target_flags; /* -m compiler switches */
118 extern int frame_pointer_needed; /* current function has a FP */
119 extern int flag_delayed_branch; /* -fdelayed-branch */
120 extern int flag_pic; /* -fpic */
121
122 /* Specify the default monitors. The meaning of these values can
123 be obtained by doing "grep MONITOR_GCC *m88k*". Generally, the
124 values downward from 0x8000 are tests that will soon go away.
125 values upward from 0x1 are generally useful tests that will remain. */
126
127 #ifndef MONITOR_GCC
128 #define MONITOR_GCC 0
129 #endif
130 \f
131 /*** Controlling the Compilation Driver, `gcc' ***/
132 /* Show we can debug even without a frame pointer. */
133 #define CAN_DEBUG_WITHOUT_FP
134
135 /* If -m88100 is in effect, add -D__m88100__; similarly for -m88110.
136 Here, the CPU_DEFAULT is assumed to be -m88100. */
137 #undef CPP_SPEC
138 #define CPP_SPEC "%{!m88000:%{!m88100:%{m88110:-D__m88110__}}} \
139 %{!m88000:%{!m88110:-D__m88100__}}"
140
141 /* LIB_SPEC, LINK_SPEC, and STARTFILE_SPEC defined in svr3.h.
142 ASM_SPEC, ASM_FINAL_SPEC, LIB_SPEC, LINK_SPEC, and STARTFILE_SPEC redefined
143 in svr4.h.
144 CPP_SPEC, ASM_SPEC, ASM_FINAL_SPEC, LIB_SPEC, LINK_SPEC, and
145 STARTFILE_SPEC redefined in dgux.h. */
146 \f
147 /*** Run-time Target Specification ***/
148
149 /* Names to predefine in the preprocessor for this target machine.
150 Redefined in sysv3.h, sysv4.h, dgux.h, and luna.h. */
151 #define CPP_PREDEFINES "-Dm88000 -Dm88k -Dunix -D__CLASSIFY_TYPE__=2"
152
153 #define TARGET_VERSION fprintf (stderr, " (%s)", VERSION_INFO1)
154
155 #ifndef VERSION_INFO1
156 #define VERSION_INFO1 "m88k"
157 #endif
158
159 /* Run-time compilation parameters selecting different hardware subsets. */
160
161 /* Macro to define tables used to set the flags.
162 This is a list in braces of pairs in braces,
163 each pair being { "NAME", VALUE }
164 where VALUE is the bits to set or minus the bits to clear.
165 An empty string NAME is used to identify the default VALUE. */
166
167 #define MASK_88100 0x00000001 /* Target m88100 */
168 #define MASK_88110 0x00000002 /* Target m88110 */
169 #define MASK_88000 (MASK_88100 | MASK_88110)
170
171 #define MASK_OCS_DEBUG_INFO 0x00000004 /* Emit .tdesc info */
172 #define MASK_OCS_FRAME_POSITION 0x00000008 /* Debug frame = CFA, not r30 */
173 #define MASK_SVR4 0x00000010 /* Target is AT&T System V.4 */
174 #define MASK_SVR3 0x00000020 /* Target is AT&T System V.3 */
175 #define MASK_NO_UNDERSCORES 0x00000040 /* Don't emit a leading `_' */
176 #define MASK_BIG_PIC 0x00000080 /* PIC with large got-rel's -fPIC */
177 #define MASK_TRAP_LARGE_SHIFT 0x00000100 /* Trap if shift not <= 31 */
178 #define MASK_HANDLE_LARGE_SHIFT 0x00000200 /* Handle shift count >= 32 */
179 #define MASK_CHECK_ZERO_DIV 0x00000400 /* Check for int div. by 0 */
180 #define MASK_USE_DIV 0x00000800 /* No signed div. checks */
181 #define MASK_IDENTIFY_REVISION 0x00001000 /* Emit ident, with GCC rev */
182 #define MASK_WARN_PASS_STRUCT 0x00002000 /* Warn about passed structs */
183 #define MASK_OPTIMIZE_ARG_AREA 0x00004000 /* Save stack space */
184 #define MASK_NO_SERIALIZE_VOLATILE 0x00008000 /* Serialize volatile refs */
185 #define MASK_EITHER_LARGE_SHIFT (MASK_TRAP_LARGE_SHIFT | \
186 MASK_HANDLE_LARGE_SHIFT)
187 #define MASK_OMIT_LEAF_FRAME_POINTER 0x00020000 /* omit leaf frame pointers */
188
189
190 #define TARGET_88100 ((target_flags & MASK_88000) == MASK_88100)
191 #define TARGET_88110 ((target_flags & MASK_88000) == MASK_88110)
192 #define TARGET_88000 ((target_flags & MASK_88000) == MASK_88000)
193
194 #define TARGET_OCS_DEBUG_INFO (target_flags & MASK_OCS_DEBUG_INFO)
195 #define TARGET_OCS_FRAME_POSITION (target_flags & MASK_OCS_FRAME_POSITION)
196 #define TARGET_SVR4 (target_flags & MASK_SVR4)
197 #define TARGET_SVR3 (target_flags & MASK_SVR3)
198 #define TARGET_NO_UNDERSCORES (target_flags & MASK_NO_UNDERSCORES)
199 #define TARGET_BIG_PIC (target_flags & MASK_BIG_PIC)
200 #define TARGET_TRAP_LARGE_SHIFT (target_flags & MASK_TRAP_LARGE_SHIFT)
201 #define TARGET_HANDLE_LARGE_SHIFT (target_flags & MASK_HANDLE_LARGE_SHIFT)
202 #define TARGET_CHECK_ZERO_DIV (target_flags & MASK_CHECK_ZERO_DIV)
203 #define TARGET_USE_DIV (target_flags & MASK_USE_DIV)
204 #define TARGET_IDENTIFY_REVISION (target_flags & MASK_IDENTIFY_REVISION)
205 #define TARGET_WARN_PASS_STRUCT (target_flags & MASK_WARN_PASS_STRUCT)
206 #define TARGET_OPTIMIZE_ARG_AREA (target_flags & MASK_OPTIMIZE_ARG_AREA)
207 #define TARGET_SERIALIZE_VOLATILE (!(target_flags & MASK_NO_SERIALIZE_VOLATILE))
208
209 #define TARGET_EITHER_LARGE_SHIFT (target_flags & MASK_EITHER_LARGE_SHIFT)
210 #define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
211
212 /* Redefined in sysv3.h, sysv4.h, and dgux.h. */
213 #define TARGET_DEFAULT (MASK_CHECK_ZERO_DIV)
214 #define CPU_DEFAULT MASK_88100
215
216 #define TARGET_SWITCHES \
217 { \
218 { "88110", MASK_88110 }, \
219 { "88100", MASK_88100 }, \
220 { "88000", MASK_88000 }, \
221 { "ocs-debug-info", MASK_OCS_DEBUG_INFO }, \
222 { "no-ocs-debug-info", -MASK_OCS_DEBUG_INFO }, \
223 { "ocs-frame-position", MASK_OCS_FRAME_POSITION }, \
224 { "no-ocs-frame-position", -MASK_OCS_FRAME_POSITION }, \
225 { "svr4", MASK_SVR4 }, \
226 { "svr3", -MASK_SVR4 }, \
227 { "no-underscores", MASK_NO_UNDERSCORES }, \
228 { "big-pic", MASK_BIG_PIC }, \
229 { "trap-large-shift", MASK_TRAP_LARGE_SHIFT }, \
230 { "handle-large-shift", MASK_HANDLE_LARGE_SHIFT }, \
231 { "check-zero-division", MASK_CHECK_ZERO_DIV }, \
232 { "no-check-zero-division", -MASK_CHECK_ZERO_DIV }, \
233 { "use-div-instruction", MASK_USE_DIV }, \
234 { "identify-revision", MASK_IDENTIFY_REVISION }, \
235 { "warn-passed-structs", MASK_WARN_PASS_STRUCT }, \
236 { "optimize-arg-area", MASK_OPTIMIZE_ARG_AREA }, \
237 { "no-optimize-arg-area", -MASK_OPTIMIZE_ARG_AREA }, \
238 { "no-serialize-volatile", MASK_NO_SERIALIZE_VOLATILE }, \
239 { "serialize-volatile", -MASK_NO_SERIALIZE_VOLATILE }, \
240 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER }, \
241 { "no-omit-leaf-frame-pointer", -MASK_OMIT_LEAF_FRAME_POINTER }, \
242 SUBTARGET_SWITCHES \
243 /* Default switches */ \
244 { "", TARGET_DEFAULT }, \
245 }
246
247 /* Redefined in dgux.h. */
248 #define SUBTARGET_SWITCHES
249
250 /* Macro to define table for command options with values. */
251
252 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data }, \
253 { "version-", &m88k_version } }
254
255 /* Do any checking or such that is needed after processing the -m switches. */
256
257 #define OVERRIDE_OPTIONS \
258 do { \
259 register int i; \
260 \
261 if ((target_flags & MASK_88000) == 0) \
262 target_flags |= CPU_DEFAULT; \
263 \
264 if (TARGET_88110) \
265 { \
266 target_flags |= MASK_USE_DIV; \
267 target_flags &= ~MASK_CHECK_ZERO_DIV; \
268 } \
269 \
270 m88k_cpu = (TARGET_88000 ? PROCESSOR_M88000 \
271 : (TARGET_88100 ? PROCESSOR_M88100 : PROCESSOR_M88110)); \
272 \
273 if (TARGET_BIG_PIC) \
274 flag_pic = 2; \
275 \
276 if ((target_flags & MASK_EITHER_LARGE_SHIFT) == MASK_EITHER_LARGE_SHIFT) \
277 error ("-mtrap-large-shift and -mhandle-large-shift are incompatible");\
278 \
279 if (TARGET_SVR4) \
280 { \
281 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \
282 reg_names[i]--; \
283 m88k_pound_sign = "#"; \
284 } \
285 else \
286 { \
287 target_flags |= MASK_SVR3; \
288 target_flags &= ~MASK_SVR4; \
289 } \
290 \
291 if (m88k_short_data) \
292 { \
293 const char *p = m88k_short_data; \
294 while (*p) \
295 if (ISDIGIT (*p)) \
296 p++; \
297 else \
298 { \
299 error ("invalid option `-mshort-data-%s'", m88k_short_data); \
300 break; \
301 } \
302 m88k_gp_threshold = atoi (m88k_short_data); \
303 if (m88k_gp_threshold > 0x7fffffff) \
304 error ("-mshort-data-%s is too large ", m88k_short_data); \
305 if (flag_pic) \
306 error ("-mshort-data-%s and PIC are incompatible", m88k_short_data); \
307 } \
308 if (TARGET_OMIT_LEAF_FRAME_POINTER) /* keep nonleaf frame pointers */ \
309 flag_omit_frame_pointer = 1; \
310 } while (0)
311 \f
312 /*** Storage Layout ***/
313
314 /* Sizes in bits of the various types. */
315 #define SHORT_TYPE_SIZE 16
316 #define INT_TYPE_SIZE 32
317 #define LONG_TYPE_SIZE 32
318 #define LONG_LONG_TYPE_SIZE 64
319 #define FLOAT_TYPE_SIZE 32
320 #define DOUBLE_TYPE_SIZE 64
321 #define LONG_DOUBLE_TYPE_SIZE 64
322
323 /* Define this if most significant bit is lowest numbered
324 in instructions that operate on numbered bit-fields.
325 Somewhat arbitrary. It matches the bit field patterns. */
326 #define BITS_BIG_ENDIAN 1
327
328 /* Define this if most significant byte of a word is the lowest numbered.
329 That is true on the m88000. */
330 #define BYTES_BIG_ENDIAN 1
331
332 /* Define this if most significant word of a multiword number is the lowest
333 numbered.
334 For the m88000 we can decide arbitrarily since there are no machine
335 instructions for them. */
336 #define WORDS_BIG_ENDIAN 1
337
338 /* Width of a word, in units (bytes). */
339 #define UNITS_PER_WORD 4
340
341 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
342 #define PARM_BOUNDARY 32
343
344 /* Largest alignment for stack parameters (if greater than PARM_BOUNDARY). */
345 #define MAX_PARM_BOUNDARY 64
346
347 /* Boundary (in *bits*) on which stack pointer should be aligned. */
348 #define STACK_BOUNDARY 128
349
350 /* Allocation boundary (in *bits*) for the code of a function. On the
351 m88100, it is desirable to align to a cache line. However, SVR3 targets
352 only provided 8 byte alignment. The m88110 cache is small, so align
353 to an 8 byte boundary. Pack code tightly when compiling crtstuff.c. */
354 #define FUNCTION_BOUNDARY (flag_inhibit_size_directive ? 32 : \
355 (TARGET_88100 && TARGET_SVR4 ? 128 : 64))
356
357 /* No data type wants to be aligned rounder than this. */
358 #define BIGGEST_ALIGNMENT 64
359
360 /* The best alignment to use in cases where we have a choice. */
361 #define FASTEST_ALIGNMENT (TARGET_88100 ? 32 : 64)
362
363 /* Make strings 4/8 byte aligned so strcpy from constants will be faster. */
364 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
365 ((TREE_CODE (EXP) == STRING_CST \
366 && (ALIGN) < FASTEST_ALIGNMENT) \
367 ? FASTEST_ALIGNMENT : (ALIGN))
368
369 /* Make arrays of chars 4/8 byte aligned for the same reasons. */
370 #define DATA_ALIGNMENT(TYPE, ALIGN) \
371 (TREE_CODE (TYPE) == ARRAY_TYPE \
372 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
373 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
374
375 /* Alignment of field after `int : 0' in a structure.
376 Ignored with PCC_BITFIELD_TYPE_MATTERS. */
377 /* #define EMPTY_FIELD_BOUNDARY 8 */
378
379 /* Every structure's size must be a multiple of this. */
380 #define STRUCTURE_SIZE_BOUNDARY 8
381
382 /* Set this nonzero if move instructions will actually fail to work
383 when given unaligned data. */
384 #define STRICT_ALIGNMENT 1
385
386 /* A bitfield declared as `int' forces `int' alignment for the struct. */
387 #define PCC_BITFIELD_TYPE_MATTERS 1
388
389 /* Maximum size (in bits) to use for the largest integral type that
390 replaces a BLKmode type. */
391 /* #define MAX_FIXED_MODE_SIZE 0 */
392
393 /* Check a `double' value for validity for a particular machine mode.
394 This is defined to avoid crashes outputting certain constants.
395 Since we output the number in hex, the assembler won't choke on it. */
396 /* #define CHECK_FLOAT_VALUE(MODE,VALUE) */
397
398 /* A code distinguishing the floating point format of the target machine. */
399 /* #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT */
400 \f
401 /*** Register Usage ***/
402
403 /* Number of actual hardware registers.
404 The hardware registers are assigned numbers for the compiler
405 from 0 to just below FIRST_PSEUDO_REGISTER.
406 All registers that the compiler knows about must be given numbers,
407 even those that are not normally considered general registers.
408
409 The m88100 has a General Register File (GRF) of 32 32-bit registers.
410 The m88110 adds an Extended Register File (XRF) of 32 80-bit registers. */
411 #define FIRST_PSEUDO_REGISTER 64
412 #define FIRST_EXTENDED_REGISTER 32
413
414 /* General notes on extended registers, their use and misuse.
415
416 Possible good uses:
417
418 spill area instead of memory.
419 -waste if only used once
420
421 floating point calculations
422 -probably a waste unless we have run out of general purpose registers
423
424 freeing up general purpose registers
425 -e.g. may be able to have more loop invariants if floating
426 point is moved into extended registers.
427
428
429 I've noticed wasteful moves into and out of extended registers; e.g. a load
430 into x21, then inside a loop a move into r24, then r24 used as input to
431 an fadd. Why not just load into r24 to begin with? Maybe the new cse.c
432 will address this. This wastes a move, but the load,store and move could
433 have been saved had extended registers been used throughout.
434 E.g. in the code following code, if z and xz are placed in extended
435 registers, there is no need to save preserve registers.
436
437 long c=1,d=1,e=1,f=1,g=1,h=1,i=1,j=1,k;
438
439 double z=0,xz=4.5;
440
441 foo(a,b)
442 long a,b;
443 {
444 while (a < b)
445 {
446 k = b + c + d + e + f + g + h + a + i + j++;
447 z += xz;
448 a++;
449 }
450 printf("k= %d; z=%f;\n", k, z);
451 }
452
453 I've found that it is possible to change the constraints (putting * before
454 the 'r' constraints int the fadd.ddd instruction) and get the entire
455 addition and store to go into extended registers. However, this also
456 forces simple addition and return of floating point arguments to a
457 function into extended registers. Not the correct solution.
458
459 Found the following note in local-alloc.c which may explain why I can't
460 get both registers to be in extended registers since two are allocated in
461 local-alloc and one in global-alloc. Doesn't explain (I don't believe)
462 why an extended register is used instead of just using the preserve
463 register.
464
465 from local-alloc.c:
466 We have provision to exempt registers, even when they are contained
467 within the block, that can be tied to others that are not contained in it.
468 This is so that global_alloc could process them both and tie them then.
469 But this is currently disabled since tying in global_alloc is not
470 yet implemented.
471
472 The explanation of why the preserved register is not used is as follows,
473 I believe. The registers are being allocated in order. Tying is not
474 done so efficiently, so when it comes time to do the first allocation,
475 there are no registers left to use without spilling except extended
476 registers. Then when the next pseudo register needs a hard reg, there
477 are still no registers to be had for free, but this one must be a GRF
478 reg instead of an extended reg, so a preserve register is spilled. Thus
479 the move from extended to GRF is necessitated. I do not believe this can
480 be 'fixed' through the files in config/m88k.
481
482 gcc seems to sometimes make worse use of register allocation -- not counting
483 moves -- whenever extended registers are present. For example in the
484 whetstone, the simple for loop (slightly modified)
485 for(i = 1; i <= n1; i++)
486 {
487 x1 = (x1 + x2 + x3 - x4) * t;
488 x2 = (x1 + x2 - x3 + x4) * t;
489 x3 = (x1 - x2 + x3 + x4) * t;
490 x4 = (x1 + x2 + x3 + x4) * t;
491 }
492 in general loads the high bits of the addresses of x2-x4 and i into registers
493 outside the loop. Whenever extended registers are used, it loads all of
494 these inside the loop. My conjecture is that since the 88110 has so many
495 registers, and gcc makes no distinction at this point -- just that they are
496 not fixed, that in loop.c it believes it can expect a number of registers
497 to be available. Then it allocates 'too many' in local-alloc which causes
498 problems later. 'Too many' are allocated because a large portion of the
499 registers are extended registers and cannot be used for certain purposes
500 ( e.g. hold the address of a variable). When this loop is compiled on its
501 own, the problem does not occur. I don't know the solution yet, though it
502 is probably in the base sources. Possibly a different way to calculate
503 "threshold". */
504
505 /* 1 for registers that have pervasive standard uses and are not available
506 for the register allocator. Registers r14-r25 and x22-x29 are expected
507 to be preserved across function calls.
508
509 On the 88000, the standard uses of the General Register File (GRF) are:
510 Reg 0 = Pseudo argument pointer (hardware fixed to 0).
511 Reg 1 = Subroutine return pointer (hardware).
512 Reg 2-9 = Parameter registers (OCS).
513 Reg 10 = OCS reserved temporary.
514 Reg 11 = Static link if needed [OCS reserved temporary].
515 Reg 12 = Address of structure return (OCS).
516 Reg 13 = OCS reserved temporary.
517 Reg 14-25 = Preserved register set.
518 Reg 26-29 = Reserved by OCS and ABI.
519 Reg 30 = Frame pointer (Common use).
520 Reg 31 = Stack pointer.
521
522 The following follows the current 88open UCS specification for the
523 Extended Register File (XRF):
524 Reg 32 = x0 Always equal to zero
525 Reg 33-53 = x1-x21 Temporary registers (Caller Save)
526 Reg 54-61 = x22-x29 Preserver registers (Callee Save)
527 Reg 62-63 = x30-x31 Reserved for future ABI use.
528
529 Note: The current 88110 extended register mapping is subject to change.
530 The bias towards caller-save registers is based on the
531 presumption that memory traffic can potentially be reduced by
532 allowing the "caller" to save only that part of the register
533 which is actually being used. (i.e. don't do a st.x if a st.d
534 is sufficient). Also, in scientific code (a.k.a. Fortran), the
535 large number of variables defined in common blocks may require
536 that almost all registers be saved across calls anyway. */
537
538 #define FIXED_REGISTERS \
539 {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
540 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
541 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
542 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1}
543
544 /* 1 for registers not available across function calls.
545 These must include the FIXED_REGISTERS and also any
546 registers that can be used without being saved.
547 The latter must include the registers where values are returned
548 and the register where structure-value addresses are passed.
549 Aside from that, you can include as many other registers as you like. */
550
551 #define CALL_USED_REGISTERS \
552 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
553 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
554 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
555 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1}
556
557 /* Macro to conditionally modify fixed_regs/call_used_regs. */
558 #define CONDITIONAL_REGISTER_USAGE \
559 { \
560 if (! TARGET_88110) \
561 { \
562 register int i; \
563 for (i = FIRST_EXTENDED_REGISTER; i < FIRST_PSEUDO_REGISTER; i++) \
564 { \
565 fixed_regs[i] = 1; \
566 call_used_regs[i] = 1; \
567 } \
568 } \
569 if (flag_pic) \
570 { \
571 /* Current hack to deal with -fpic -O2 problems. */ \
572 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
573 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
574 global_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
575 } \
576 }
577
578 /* True if register is an extended register. */
579 #define XRF_REGNO_P(N) ((N) < FIRST_PSEUDO_REGISTER && (N) >= FIRST_EXTENDED_REGISTER)
580
581 /* Return number of consecutive hard regs needed starting at reg REGNO
582 to hold something of mode MODE.
583 This is ordinarily the length in words of a value of mode MODE
584 but can be less for certain modes in special long registers.
585
586 On the m88000, GRF registers hold 32-bits and XRF registers hold 80-bits.
587 An XRF register can hold any mode, but two GRF registers are required
588 for larger modes. */
589 #define HARD_REGNO_NREGS(REGNO, MODE) \
590 (XRF_REGNO_P (REGNO) \
591 ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
592
593 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
594
595 For double integers, we never put the value into an odd register so that
596 the operators don't run into the situation where the high part of one of
597 the inputs is the low part of the result register. (It's ok if the output
598 registers are the same as the input registers.) The XRF registers can
599 hold all modes, but only DF and SF modes can be manipulated in these
600 registers. The compiler should be allowed to use these as a fast spill
601 area. */
602 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
603 (XRF_REGNO_P(REGNO) \
604 ? (TARGET_88110 && GET_MODE_CLASS (MODE) == MODE_FLOAT) \
605 : (((MODE) != DImode && (MODE) != DFmode && (MODE) != DCmode) \
606 || ((REGNO) & 1) == 0))
607
608 /* Value is 1 if it is a good idea to tie two pseudo registers
609 when one has mode MODE1 and one has mode MODE2.
610 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
611 for any hard reg, then this must be 0 for correct output. */
612 #define MODES_TIEABLE_P(MODE1, MODE2) \
613 (((MODE1) == DFmode || (MODE1) == DCmode || (MODE1) == DImode \
614 || (TARGET_88110 && GET_MODE_CLASS (MODE1) == MODE_FLOAT)) \
615 == ((MODE2) == DFmode || (MODE2) == DCmode || (MODE2) == DImode \
616 || (TARGET_88110 && GET_MODE_CLASS (MODE2) == MODE_FLOAT)))
617
618 /* Specify the registers used for certain standard purposes.
619 The values of these macros are register numbers. */
620
621 /* the m88000 pc isn't overloaded on a register that the compiler knows about. */
622 /* #define PC_REGNUM */
623
624 /* Register to use for pushing function arguments. */
625 #define STACK_POINTER_REGNUM 31
626
627 /* Base register for access to local variables of the function. */
628 #define FRAME_POINTER_REGNUM 30
629
630 /* Base register for access to arguments of the function. */
631 #define ARG_POINTER_REGNUM 0
632
633 /* Register used in cases where a temporary is known to be safe to use. */
634 #define TEMP_REGNUM 10
635
636 /* Register in which static-chain is passed to a function. */
637 #define STATIC_CHAIN_REGNUM 11
638
639 /* Register in which address to store a structure value
640 is passed to a function. */
641 #define STRUCT_VALUE_REGNUM 12
642
643 /* Register to hold the addressing base for position independent
644 code access to data items. */
645 #define PIC_OFFSET_TABLE_REGNUM 25
646
647 /* Order in which registers are preferred (most to least). Use temp
648 registers, then param registers top down. Preserve registers are
649 top down to maximize use of double memory ops for register save.
650 The 88open reserved registers (r26-r29 and x30-x31) may commonly be used
651 in most environments with the -fcall-used- or -fcall-saved- options. */
652 #define REG_ALLOC_ORDER \
653 { \
654 13, 12, 11, 10, 29, 28, 27, 26, \
655 62, 63, 9, 8, 7, 6, 5, 4, \
656 3, 2, 1, 53, 52, 51, 50, 49, \
657 48, 47, 46, 45, 44, 43, 42, 41, \
658 40, 39, 38, 37, 36, 35, 34, 33, \
659 25, 24, 23, 22, 21, 20, 19, 18, \
660 17, 16, 15, 14, 61, 60, 59, 58, \
661 57, 56, 55, 54, 30, 31, 0, 32}
662
663 /* Order for leaf functions. */
664 #define REG_LEAF_ALLOC_ORDER \
665 { \
666 9, 8, 7, 6, 13, 12, 11, 10, \
667 29, 28, 27, 26, 62, 63, 5, 4, \
668 3, 2, 0, 53, 52, 51, 50, 49, \
669 48, 47, 46, 45, 44, 43, 42, 41, \
670 40, 39, 38, 37, 36, 35, 34, 33, \
671 25, 24, 23, 22, 21, 20, 19, 18, \
672 17, 16, 15, 14, 61, 60, 59, 58, \
673 57, 56, 55, 54, 30, 31, 1, 32}
674
675 /* Switch between the leaf and non-leaf orderings. The purpose is to avoid
676 write-over scoreboard delays between caller and callee. */
677 #define ORDER_REGS_FOR_LOCAL_ALLOC \
678 { \
679 static const int leaf[] = REG_LEAF_ALLOC_ORDER; \
680 static const int nonleaf[] = REG_ALLOC_ORDER; \
681 \
682 memcpy (reg_alloc_order, regs_ever_live[1] ? nonleaf : leaf, \
683 FIRST_PSEUDO_REGISTER * sizeof (int)); \
684 }
685 \f
686 /*** Register Classes ***/
687
688 /* Define the classes of registers for register constraints in the
689 machine description. Also define ranges of constants.
690
691 One of the classes must always be named ALL_REGS and include all hard regs.
692 If there is more than one class, another class must be named NO_REGS
693 and contain no registers.
694
695 The name GENERAL_REGS must be the name of a class (or an alias for
696 another name such as ALL_REGS). This is the class of registers
697 that is allowed by "g" or "r" in a register constraint.
698 Also, registers outside this class are allocated only when
699 instructions express preferences for them.
700
701 The classes must be numbered in nondecreasing order; that is,
702 a larger-numbered class must never be contained completely
703 in a smaller-numbered class.
704
705 For any two classes, it is very desirable that there be another
706 class that represents their union. */
707
708 /* The m88000 hardware has two kinds of registers. In addition, we denote
709 the arg pointer as a separate class. */
710
711 enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
712 XGRF_REGS, ALL_REGS, LIM_REG_CLASSES };
713
714 #define N_REG_CLASSES (int) LIM_REG_CLASSES
715
716 /* Give names of register classes as strings for dump file. */
717 #define REG_CLASS_NAMES {"NO_REGS", "AP_REG", "XRF_REGS", "GENERAL_REGS", \
718 "AGRF_REGS", "XGRF_REGS", "ALL_REGS" }
719
720 /* Define which registers fit in which classes.
721 This is an initializer for a vector of HARD_REG_SET
722 of length N_REG_CLASSES. */
723 #define REG_CLASS_CONTENTS {{0x00000000, 0x00000000}, \
724 {0x00000001, 0x00000000}, \
725 {0x00000000, 0xffffffff}, \
726 {0xfffffffe, 0x00000000}, \
727 {0xffffffff, 0x00000000}, \
728 {0xfffffffe, 0xffffffff}, \
729 {0xffffffff, 0xffffffff}}
730
731 /* The same information, inverted:
732 Return the class number of the smallest class containing
733 reg number REGNO. This could be a conditional expression
734 or could index an array. */
735 #define REGNO_REG_CLASS(REGNO) \
736 ((REGNO) ? ((REGNO < 32) ? GENERAL_REGS : XRF_REGS) : AP_REG)
737
738 /* The class value for index registers, and the one for base regs. */
739 #define BASE_REG_CLASS AGRF_REGS
740 #define INDEX_REG_CLASS GENERAL_REGS
741
742 /* Get reg_class from a letter such as appears in the machine description.
743 For the 88000, the following class/letter is defined for the XRF:
744 x - Extended register file */
745 #define REG_CLASS_FROM_LETTER(C) \
746 (((C) == 'x') ? XRF_REGS : NO_REGS)
747
748 /* Macros to check register numbers against specific register classes.
749 These assume that REGNO is a hard or pseudo reg number.
750 They give nonzero only if REGNO is a hard reg of the suitable class
751 or a pseudo reg currently allocated to a suitable hard reg.
752 Since they use reg_renumber, they are safe only once reg_renumber
753 has been allocated, which happens in local-alloc.c. */
754 #define REGNO_OK_FOR_BASE_P(REGNO) \
755 ((REGNO) < FIRST_EXTENDED_REGISTER \
756 || (unsigned) reg_renumber[REGNO] < FIRST_EXTENDED_REGISTER)
757 #define REGNO_OK_FOR_INDEX_P(REGNO) \
758 (((REGNO) && (REGNO) < FIRST_EXTENDED_REGISTER) \
759 || (unsigned) reg_renumber[REGNO] < FIRST_EXTENDED_REGISTER)
760
761 /* Given an rtx X being reloaded into a reg required to be
762 in class CLASS, return the class of reg to actually use.
763 In general this is just CLASS; but on some machines
764 in some cases it is preferable to use a more restrictive class.
765 Double constants should be in a register iff they can be made cheaply. */
766 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
767 (CONSTANT_P(X) && (CLASS == XRF_REGS) ? NO_REGS : (CLASS))
768
769 /* Return the register class of a scratch register needed to load IN
770 into a register of class CLASS in MODE. On the m88k, when PIC, we
771 need a temporary when loading some addresses into a register. */
772 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
773 ((flag_pic \
774 && GET_CODE (IN) == CONST \
775 && GET_CODE (XEXP (IN, 0)) == PLUS \
776 && GET_CODE (XEXP (XEXP (IN, 0), 0)) == CONST_INT \
777 && ! SMALL_INT (XEXP (XEXP (IN, 0), 1))) ? GENERAL_REGS : NO_REGS)
778
779 /* Return the maximum number of consecutive registers
780 needed to represent mode MODE in a register of class CLASS. */
781 #define CLASS_MAX_NREGS(CLASS, MODE) \
782 ((((CLASS) == XRF_REGS) ? 1 \
783 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
784
785 /* Letters in the range `I' through `P' in a register constraint string can
786 be used to stand for particular ranges of immediate operands. The C
787 expression is true iff C is a known letter and VALUE is appropriate for
788 that letter.
789
790 For the m88000, the following constants are used:
791 `I' requires a non-negative 16-bit value.
792 `J' requires a non-positive 16-bit value.
793 `K' requires a non-negative value < 32.
794 `L' requires a constant with only the upper 16-bits set.
795 `M' requires constant values that can be formed with `set'.
796 `N' requires a negative value.
797 `O' requires zero.
798 `P' requires a non-negative value. */
799
800 /* Quick tests for certain values. */
801 #define SMALL_INT(X) (SMALL_INTVAL (INTVAL (X)))
802 #define SMALL_INTVAL(I) ((unsigned) (I) < 0x10000)
803 #define ADD_INT(X) (ADD_INTVAL (INTVAL (X)))
804 #define ADD_INTVAL(I) ((unsigned) (I) + 0xffff < 0x1ffff)
805 #define POWER_OF_2(I) ((I) && POWER_OF_2_or_0(I))
806 #define POWER_OF_2_or_0(I) (((I) & ((unsigned)(I) - 1)) == 0)
807
808 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
809 ((C) == 'I' ? SMALL_INTVAL (VALUE) \
810 : (C) == 'J' ? SMALL_INTVAL (-(VALUE)) \
811 : (C) == 'K' ? (unsigned)(VALUE) < 32 \
812 : (C) == 'L' ? ((VALUE) & 0xffff) == 0 \
813 : (C) == 'M' ? integer_ok_for_set (VALUE) \
814 : (C) == 'N' ? (VALUE) < 0 \
815 : (C) == 'O' ? (VALUE) == 0 \
816 : (C) == 'P' ? (VALUE) >= 0 \
817 : 0)
818
819 /* Similar, but for floating constants, and defining letters G and H.
820 Here VALUE is the CONST_DOUBLE rtx itself. For the m88000, the
821 constraints are: `G' requires zero, and `H' requires one or two. */
822 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
823 ((C) == 'G' ? (CONST_DOUBLE_HIGH (VALUE) == 0 \
824 && CONST_DOUBLE_LOW (VALUE) == 0) \
825 : 0)
826
827 /* Letters in the range `Q' through `U' in a register constraint string
828 may be defined in a machine-dependent fashion to stand for arbitrary
829 operand types.
830
831 For the m88k, `Q' handles addresses in a call context. */
832
833 #define EXTRA_CONSTRAINT(OP, C) \
834 ((C) == 'Q' ? symbolic_address_p (OP) : 0)
835 \f
836 /*** Describing Stack Layout ***/
837
838 /* Define this if pushing a word on the stack moves the stack pointer
839 to a smaller address. */
840 #define STACK_GROWS_DOWNWARD
841
842 /* Define this if the addresses of local variable slots are at negative
843 offsets from the frame pointer. */
844 /* #define FRAME_GROWS_DOWNWARD */
845
846 /* Offset from the frame pointer to the first local variable slot to be
847 allocated. For the m88k, the debugger wants the return address (r1)
848 stored at location r30+4, and the previous frame pointer stored at
849 location r30. */
850 #define STARTING_FRAME_OFFSET 8
851
852 /* If we generate an insn to push BYTES bytes, this says how many the
853 stack pointer really advances by. The m88k has no push instruction. */
854 /* #define PUSH_ROUNDING(BYTES) */
855
856 /* If defined, the maximum amount of space required for outgoing arguments
857 will be computed and placed into the variable
858 `current_function_outgoing_args_size'. No space will be pushed
859 onto the stack for each call; instead, the function prologue should
860 increase the stack frame size by this amount. */
861 #define ACCUMULATE_OUTGOING_ARGS 1
862
863 /* Offset from the stack pointer register to the first location at which
864 outgoing arguments are placed. Use the default value zero. */
865 /* #define STACK_POINTER_OFFSET 0 */
866
867 /* Offset of first parameter from the argument pointer register value.
868 Using an argument pointer, this is 0 for the m88k. GCC knows
869 how to eliminate the argument pointer references if necessary. */
870 #define FIRST_PARM_OFFSET(FNDECL) 0
871
872 /* Define this if functions should assume that stack space has been
873 allocated for arguments even when their values are passed in
874 registers.
875
876 The value of this macro is the size, in bytes, of the area reserved for
877 arguments passed in registers.
878
879 This space can either be allocated by the caller or be a part of the
880 machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE'
881 says which. */
882 #define REG_PARM_STACK_SPACE(FNDECL) 32
883
884 /* Define this macro if REG_PARM_STACK_SPACE is defined but stack
885 parameters don't skip the area specified by REG_PARM_STACK_SPACE.
886 Normally, when a parameter is not passed in registers, it is placed on
887 the stack beyond the REG_PARM_STACK_SPACE area. Defining this macro
888 suppresses this behavior and causes the parameter to be passed on the
889 stack in its natural location. */
890 #define STACK_PARMS_IN_REG_PARM_AREA
891
892 /* Define this if it is the responsibility of the caller to allocate the
893 area reserved for arguments passed in registers. If
894 `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect of this
895 macro is to determine whether the space is included in
896 `current_function_outgoing_args_size'. */
897 /* #define OUTGOING_REG_PARM_STACK_SPACE */
898
899 /* Offset from the stack pointer register to an item dynamically allocated
900 on the stack, e.g., by `alloca'.
901
902 The default value for this macro is `STACK_POINTER_OFFSET' plus the
903 length of the outgoing arguments. The default is correct for most
904 machines. See `function.c' for details. */
905 /* #define STACK_DYNAMIC_OFFSET(FUNDECL) ... */
906
907 /* Value is the number of bytes of arguments automatically
908 popped when returning from a subroutine call.
909 FUNDECL is the declaration node of the function (as a tree),
910 FUNTYPE is the data type of the function (as a tree),
911 or for a library call it is an identifier node for the subroutine name.
912 SIZE is the number of bytes of arguments passed on the stack. */
913 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
914
915 /* Define how to find the value returned by a function.
916 VALTYPE is the data type of the value (as a tree).
917 If the precise function being called is known, FUNC is its FUNCTION_DECL;
918 otherwise, FUNC is 0. */
919 #define FUNCTION_VALUE(VALTYPE, FUNC) \
920 gen_rtx_REG (TYPE_MODE (VALTYPE) == BLKmode ? SImode : TYPE_MODE (VALTYPE), \
921 2)
922
923 /* Define this if it differs from FUNCTION_VALUE. */
924 /* #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) ... */
925
926 /* Disable the promotion of some structures and unions to registers. */
927 #define RETURN_IN_MEMORY(TYPE) \
928 (TYPE_MODE (TYPE) == BLKmode \
929 || ((TREE_CODE (TYPE) == RECORD_TYPE || TREE_CODE(TYPE) == UNION_TYPE) \
930 && !(TYPE_MODE (TYPE) == SImode \
931 || (TYPE_MODE (TYPE) == BLKmode \
932 && TYPE_ALIGN (TYPE) == BITS_PER_WORD \
933 && int_size_in_bytes (TYPE) == UNITS_PER_WORD))))
934
935 /* Don't default to pcc-struct-return, because we have already specified
936 exactly how to return structures in the RETURN_IN_MEMORY macro. */
937 #define DEFAULT_PCC_STRUCT_RETURN 0
938
939 /* Define how to find the value returned by a library function
940 assuming the value has mode MODE. */
941 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 2)
942
943 /* True if N is a possible register number for a function value
944 as seen by the caller. */
945 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2)
946
947 /* Determine whether a function argument is passed in a register, and
948 which register. See m88k.c. */
949 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
950 m88k_function_arg (CUM, MODE, TYPE, NAMED)
951
952 /* Define this if it differs from FUNCTION_ARG. */
953 /* #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) ... */
954
955 /* A C expression for the number of words, at the beginning of an
956 argument, must be put in registers. The value must be zero for
957 arguments that are passed entirely in registers or that are entirely
958 pushed on the stack. */
959 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0)
960
961 /* A C expression that indicates when an argument must be passed by
962 reference. If nonzero for an argument, a copy of that argument is
963 made in memory and a pointer to the argument is passed instead of the
964 argument itself. The pointer is passed in whatever way is appropriate
965 for passing a pointer to that type. */
966 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) (0)
967
968 /* A C type for declaring a variable that is used as the first argument
969 of `FUNCTION_ARG' and other related values. It suffices to count
970 the number of words of argument so far. */
971 #define CUMULATIVE_ARGS int
972
973 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to a
974 function whose data type is FNTYPE. For a library call, FNTYPE is 0. */
975 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) ((CUM) = 0)
976
977 /* A C statement (sans semicolon) to update the summarizer variable
978 CUM to advance past an argument in the argument list. The values
979 MODE, TYPE and NAMED describe that argument. Once this is done,
980 the variable CUM is suitable for analyzing the *following* argument
981 with `FUNCTION_ARG', etc. (TYPE is null for libcalls where that
982 information may not be available.) */
983 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
984 do { \
985 enum machine_mode __mode = (TYPE) ? TYPE_MODE (TYPE) : (MODE); \
986 if ((CUM & 1) \
987 && (__mode == DImode || __mode == DFmode \
988 || ((TYPE) && TYPE_ALIGN (TYPE) > BITS_PER_WORD))) \
989 CUM++; \
990 CUM += (((__mode != BLKmode) \
991 ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE)) \
992 + 3) / 4; \
993 } while (0)
994
995 /* True if N is a possible register number for function argument passing.
996 On the m88000, these are registers 2 through 9. */
997 #define FUNCTION_ARG_REGNO_P(N) ((N) <= 9 && (N) >= 2)
998
999 /* A C expression which determines whether, and in which direction,
1000 to pad out an argument with extra space. The value should be of
1001 type `enum direction': either `upward' to pad above the argument,
1002 `downward' to pad below, or `none' to inhibit padding.
1003
1004 This macro does not control the *amount* of padding; that is always
1005 just enough to reach the next multiple of `FUNCTION_ARG_BOUNDARY'. */
1006 #define FUNCTION_ARG_PADDING(MODE, TYPE) \
1007 ((MODE) == BLKmode \
1008 || ((TYPE) && (TREE_CODE (TYPE) == RECORD_TYPE \
1009 || TREE_CODE (TYPE) == UNION_TYPE)) \
1010 ? upward : GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY ? downward : none)
1011
1012 /* If defined, a C expression that gives the alignment boundary, in bits,
1013 of an argument with the specified mode and type. If it is not defined,
1014 `PARM_BOUNDARY' is used for all arguments. */
1015 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1016 (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \
1017 ? PARM_BOUNDARY : 2 * PARM_BOUNDARY)
1018
1019 /* Generate necessary RTL for __builtin_saveregs().
1020 ARGLIST is the argument list; see expr.c. */
1021 #define EXPAND_BUILTIN_SAVEREGS() m88k_builtin_saveregs ()
1022
1023 /* Define the `__builtin_va_list' type for the ABI. */
1024 #define BUILD_VA_LIST_TYPE(VALIST) \
1025 (VALIST) = m88k_build_va_list ()
1026
1027 /* Implement `va_start' for varargs and stdarg. */
1028 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
1029 m88k_va_start (stdarg, valist, nextarg)
1030
1031 /* Implement `va_arg'. */
1032 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1033 m88k_va_arg (valist, type)
1034
1035 /* Output assembler code to FILE to increment profiler label # LABELNO
1036 for profiling a function entry. Redefined in sysv3.h, sysv4.h and
1037 dgux.h. */
1038 #define FUNCTION_PROFILER(FILE, LABELNO) \
1039 output_function_profiler (FILE, LABELNO, "mcount", 1)
1040
1041 /* Maximum length in instructions of the code output by FUNCTION_PROFILER. */
1042 #define FUNCTION_PROFILER_LENGTH (5+3+1+5)
1043
1044 /* Output assembler code to FILE to initialize basic-block profiling for
1045 the current module. LABELNO is unique to each instance. */
1046 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
1047 output_function_block_profiler (FILE, LABELNO)
1048
1049 /* Maximum length in instructions of the code output by
1050 FUNCTION_BLOCK_PROFILER. */
1051 #define FUNCTION_BLOCK_PROFILER_LENGTH (3+5+2+5)
1052
1053 /* Output assembler code to FILE to increment the count associated with
1054 the basic block number BLOCKNO. */
1055 #define BLOCK_PROFILER(FILE, BLOCKNO) output_block_profiler (FILE, BLOCKNO)
1056
1057 /* Maximum length in instructions of the code output by BLOCK_PROFILER. */
1058 #define BLOCK_PROFILER_LENGTH 4
1059
1060 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1061 the stack pointer does not matter. The value is tested only in
1062 functions that have frame pointers.
1063 No definition is equivalent to always zero. */
1064 #define EXIT_IGNORE_STACK (1)
1065
1066 /* Value should be nonzero if functions must have frame pointers.
1067 Zero means the frame pointer need not be set up (and parms
1068 may be accessed via the stack pointer) in functions that seem suitable.
1069 This is computed in `reload', in reload1.c. */
1070 #define FRAME_POINTER_REQUIRED \
1071 (current_function_varargs \
1072 || (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ()) \
1073 || (write_symbols != NO_DEBUG && !TARGET_OCS_FRAME_POSITION))
1074
1075 /* Definitions for register eliminations.
1076
1077 We have two registers that can be eliminated on the m88k. First, the
1078 frame pointer register can often be eliminated in favor of the stack
1079 pointer register. Secondly, the argument pointer register can always be
1080 eliminated; it is replaced with either the stack or frame pointer. */
1081
1082 /* This is an array of structures. Each structure initializes one pair
1083 of eliminable registers. The "from" register number is given first,
1084 followed by "to". Eliminations of the same "from" register are listed
1085 in order of preference. */
1086 #define ELIMINABLE_REGS \
1087 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1088 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1089 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1090
1091 /* Given FROM and TO register numbers, say whether this elimination
1092 is allowed. */
1093 #define CAN_ELIMINATE(FROM, TO) \
1094 (!((FROM) == FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED))
1095
1096 /* Define the offset between two registers, one to be eliminated, and the other
1097 its replacement, at the start of a routine. */
1098 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1099 { m88k_layout_frame (); \
1100 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1101 (OFFSET) = m88k_fp_offset; \
1102 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1103 (OFFSET) = m88k_stack_size - m88k_fp_offset; \
1104 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1105 (OFFSET) = m88k_stack_size; \
1106 else \
1107 abort (); \
1108 }
1109 \f
1110 /*** Trampolines for Nested Functions ***/
1111
1112 /* Output assembler code for a block containing the constant parts
1113 of a trampoline, leaving space for the variable parts.
1114
1115 This block is placed on the stack and filled in. It is aligned
1116 0 mod 128 and those portions that are executed are constant.
1117 This should work for instruction caches that have cache lines up
1118 to the aligned amount (128 is arbitrary), provided no other code
1119 producer is attempting to play the same game. This of course is
1120 in violation of any number of 88open standards. */
1121
1122 #define TRAMPOLINE_TEMPLATE(FILE) \
1123 { \
1124 char buf[256]; \
1125 static int labelno = 0; \
1126 labelno++; \
1127 ASM_GENERATE_INTERNAL_LABEL (buf, "LTRMP", labelno); \
1128 /* Save the return address (r1) in the static chain reg (r11). */ \
1129 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[11], reg_names[1]); \
1130 /* Locate this block; transfer to the next instruction. */ \
1131 fprintf (FILE, "\tbsr\t %s\n", &buf[1]); \
1132 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LTRMP", labelno); \
1133 /* Save r10; use it as the relative pointer; restore r1. */ \
1134 fprintf (FILE, "\tst\t %s,%s,24\n", reg_names[10], reg_names[1]); \
1135 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[10], reg_names[1]); \
1136 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[1], reg_names[11]); \
1137 /* Load the function's address and go there. */ \
1138 fprintf (FILE, "\tld\t %s,%s,32\n", reg_names[11], reg_names[10]); \
1139 fprintf (FILE, "\tjmp.n\t %s\n", reg_names[11]); \
1140 /* Restore r10 and load the static chain register. */ \
1141 fprintf (FILE, "\tld.d\t %s,%s,24\n", reg_names[10], reg_names[10]); \
1142 /* Storage: r10 save area, static chain, function address. */ \
1143 assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
1144 assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
1145 assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
1146 }
1147
1148 /* Length in units of the trampoline for entering a nested function.
1149 This is really two components. The first 32 bytes are fixed and
1150 must be copied; the last 12 bytes are just storage that's filled
1151 in later. So for allocation purposes, it's 32+12 bytes, but for
1152 initialization purposes, it's 32 bytes. */
1153
1154 #define TRAMPOLINE_SIZE (32+12)
1155
1156 /* Alignment required for a trampoline. 128 is used to find the
1157 beginning of a line in the instruction cache and to allow for
1158 instruction cache lines of up to 128 bytes. */
1159
1160 #define TRAMPOLINE_ALIGNMENT 128
1161
1162 /* Emit RTL insns to initialize the variable parts of a trampoline.
1163 FNADDR is an RTX for the address of the function's pure code.
1164 CXT is an RTX for the static chain value for the function. */
1165
1166 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1167 { \
1168 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 40)), FNADDR); \
1169 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 36)), CXT); \
1170 }
1171
1172 /*** Library Subroutine Names ***/
1173
1174 /* Define this macro if GNU CC should generate calls to the System V
1175 (and ANSI C) library functions `memcpy' and `memset' rather than
1176 the BSD functions `bcopy' and `bzero'. */
1177 #define TARGET_MEM_FUNCTIONS
1178 \f
1179 /*** Addressing Modes ***/
1180
1181 #define EXTRA_CC_MODES CC(CCEVENmode, "CCEVEN")
1182
1183 #define SELECT_CC_MODE(OP,X,Y) CCmode
1184
1185 /* #define HAVE_POST_INCREMENT 0 */
1186 /* #define HAVE_POST_DECREMENT 0 */
1187
1188 /* #define HAVE_PRE_DECREMENT 0 */
1189 /* #define HAVE_PRE_INCREMENT 0 */
1190
1191 /* Recognize any constant value that is a valid address.
1192 When PIC, we do not accept an address that would require a scratch reg
1193 to load into a register. */
1194
1195 #define CONSTANT_ADDRESS_P(X) \
1196 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1197 || GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH \
1198 || (GET_CODE (X) == CONST \
1199 && ! (flag_pic && pic_address_needs_scratch (X))))
1200
1201
1202 /* Maximum number of registers that can appear in a valid memory address. */
1203 #define MAX_REGS_PER_ADDRESS 2
1204
1205 /* The condition for memory shift insns. */
1206 #define SCALED_ADDRESS_P(ADDR) \
1207 (GET_CODE (ADDR) == PLUS \
1208 && (GET_CODE (XEXP (ADDR, 0)) == MULT \
1209 || GET_CODE (XEXP (ADDR, 1)) == MULT))
1210
1211 /* Can the reference to X be made short? */
1212 #define SHORT_ADDRESS_P(X,TEMP) \
1213 ((TEMP) = (GET_CODE (X) == CONST ? get_related_value (X) : X), \
1214 ((TEMP) && GET_CODE (TEMP) == SYMBOL_REF && SYMBOL_REF_FLAG (TEMP)))
1215
1216 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1217 that is a valid memory address for an instruction.
1218 The MODE argument is the machine mode for the MEM expression
1219 that wants to use this address.
1220
1221 On the m88000, a legitimate address has the form REG, REG+REG,
1222 REG+SMALLINT, REG+(REG*modesize) (REG[REG]), or SMALLINT.
1223
1224 The register elimination process should deal with the argument
1225 pointer and frame pointer changing to REG+SMALLINT. */
1226
1227 #define LEGITIMATE_INDEX_P(X, MODE) \
1228 ((GET_CODE (X) == CONST_INT \
1229 && SMALL_INT (X)) \
1230 || (REG_P (X) \
1231 && REG_OK_FOR_INDEX_P (X)) \
1232 || (GET_CODE (X) == MULT \
1233 && REG_P (XEXP (X, 0)) \
1234 && REG_OK_FOR_INDEX_P (XEXP (X, 0)) \
1235 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1236 && INTVAL (XEXP (X, 1)) == GET_MODE_SIZE (MODE)))
1237
1238 #define RTX_OK_FOR_BASE_P(X) \
1239 ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1240 || (GET_CODE (X) == SUBREG \
1241 && GET_CODE (SUBREG_REG (X)) == REG \
1242 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
1243
1244 #define RTX_OK_FOR_INDEX_P(X) \
1245 ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
1246 || (GET_CODE (X) == SUBREG \
1247 && GET_CODE (SUBREG_REG (X)) == REG \
1248 && REG_OK_FOR_INDEX_P (SUBREG_REG (X))))
1249
1250 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1251 { \
1252 register rtx _x; \
1253 if (REG_P (X)) \
1254 { \
1255 if (REG_OK_FOR_BASE_P (X)) \
1256 goto ADDR; \
1257 } \
1258 else if (GET_CODE (X) == PLUS) \
1259 { \
1260 register rtx _x0 = XEXP (X, 0); \
1261 register rtx _x1 = XEXP (X, 1); \
1262 if ((flag_pic \
1263 && _x0 == pic_offset_table_rtx \
1264 && (flag_pic == 2 \
1265 ? RTX_OK_FOR_BASE_P (_x1) \
1266 : (GET_CODE (_x1) == SYMBOL_REF \
1267 || GET_CODE (_x1) == LABEL_REF))) \
1268 || (REG_P (_x0) \
1269 && (REG_OK_FOR_BASE_P (_x0) \
1270 && LEGITIMATE_INDEX_P (_x1, MODE))) \
1271 || (REG_P (_x1) \
1272 && (REG_OK_FOR_BASE_P (_x1) \
1273 && LEGITIMATE_INDEX_P (_x0, MODE)))) \
1274 goto ADDR; \
1275 } \
1276 else if (GET_CODE (X) == LO_SUM) \
1277 { \
1278 register rtx _x0 = XEXP (X, 0); \
1279 register rtx _x1 = XEXP (X, 1); \
1280 if (((REG_P (_x0) \
1281 && REG_OK_FOR_BASE_P (_x0)) \
1282 || (GET_CODE (_x0) == SUBREG \
1283 && REG_P (SUBREG_REG (_x0)) \
1284 && REG_OK_FOR_BASE_P (SUBREG_REG (_x0)))) \
1285 && CONSTANT_P (_x1)) \
1286 goto ADDR; \
1287 } \
1288 else if (GET_CODE (X) == CONST_INT \
1289 && SMALL_INT (X)) \
1290 goto ADDR; \
1291 else if (SHORT_ADDRESS_P (X, _x)) \
1292 goto ADDR; \
1293 }
1294
1295 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1296 and check its validity for a certain class.
1297 We have two alternate definitions for each of them.
1298 The usual definition accepts all pseudo regs; the other rejects
1299 them unless they have been allocated suitable hard regs.
1300 The symbol REG_OK_STRICT causes the latter definition to be used.
1301
1302 Most source files want to accept pseudo regs in the hope that
1303 they will get allocated to the class that the insn wants them to be in.
1304 Source files for reload pass need to be strict.
1305 After reload, it makes no difference, since pseudo regs have
1306 been eliminated by then. */
1307
1308 #ifndef REG_OK_STRICT
1309
1310 /* Nonzero if X is a hard reg that can be used as an index
1311 or if it is a pseudo reg. Not the argument pointer. */
1312 #define REG_OK_FOR_INDEX_P(X) \
1313 (!XRF_REGNO_P(REGNO (X)))
1314 /* Nonzero if X is a hard reg that can be used as a base reg
1315 or if it is a pseudo reg. */
1316 #define REG_OK_FOR_BASE_P(X) (REG_OK_FOR_INDEX_P (X))
1317
1318 #else
1319
1320 /* Nonzero if X is a hard reg that can be used as an index. */
1321 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1322 /* Nonzero if X is a hard reg that can be used as a base reg. */
1323 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1324
1325 #endif
1326
1327 /* Try machine-dependent ways of modifying an illegitimate address
1328 to be legitimate. If we find one, return the new, valid address.
1329 This macro is used in only one place: `memory_address' in explow.c.
1330
1331 OLDX is the address as it was before break_out_memory_refs was called.
1332 In some cases it is useful to look at this to decide what needs to be done.
1333
1334 MODE and WIN are passed so that this macro can use
1335 GO_IF_LEGITIMATE_ADDRESS.
1336
1337 It is always safe for this macro to do nothing. It exists to recognize
1338 opportunities to optimize the output. */
1339
1340 /* On the m88000, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
1341
1342 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1343 { \
1344 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1345 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
1346 copy_to_mode_reg (SImode, XEXP (X, 1))); \
1347 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
1348 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
1349 copy_to_mode_reg (SImode, XEXP (X, 0))); \
1350 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
1351 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
1352 force_operand (XEXP (X, 0), 0)); \
1353 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
1354 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
1355 force_operand (XEXP (X, 1), 0)); \
1356 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \
1357 (X) = gen_rtx_PLUS (Pmode, force_operand (XEXP (X, 0), NULL_RTX),\
1358 XEXP (X, 1)); \
1359 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \
1360 (X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \
1361 force_operand (XEXP (X, 1), NULL_RTX)); \
1362 if (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \
1363 || GET_CODE (X) == LABEL_REF) \
1364 (X) = legitimize_address (flag_pic, X, 0, 0); \
1365 if (memory_address_p (MODE, X)) \
1366 goto WIN; }
1367
1368 /* Go to LABEL if ADDR (a legitimate address expression)
1369 has an effect that depends on the machine mode it is used for.
1370 On the m88000 this is never true. */
1371
1372 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
1373
1374 /* Nonzero if the constant value X is a legitimate general operand.
1375 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1376 #define LEGITIMATE_CONSTANT_P(X) (1)
1377
1378 /* Define this, so that when PIC, reload won't try to reload invalid
1379 addresses which require two reload registers. */
1380
1381 #define LEGITIMATE_PIC_OPERAND_P(X) (! pic_address_needs_scratch (X))
1382
1383 \f
1384 /*** Condition Code Information ***/
1385
1386 /* C code for a data type which is used for declaring the `mdep'
1387 component of `cc_status'. It defaults to `int'. */
1388 /* #define CC_STATUS_MDEP int */
1389
1390 /* A C expression to initialize the `mdep' field to "empty". */
1391 /* #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0) */
1392
1393 /* Macro to zap the normal portions of CC_STATUS, but leave the
1394 machine dependent parts (ie, literal synthesis) alone. */
1395 /* #define CC_STATUS_INIT_NO_MDEP \
1396 (cc_status.flags = 0, cc_status.value1 = 0, cc_status.value2 = 0) */
1397
1398 /* When using a register to hold the condition codes, the cc_status
1399 mechanism cannot be used. */
1400 #define NOTICE_UPDATE_CC(EXP, INSN) (0)
1401 \f
1402 /*** Miscellaneous Parameters ***/
1403
1404 /* Define the codes that are matched by predicates in m88k.c. */
1405 #define PREDICATE_CODES \
1406 {"move_operand", {SUBREG, REG, CONST_INT, LO_SUM, MEM}}, \
1407 {"call_address_operand", {SUBREG, REG, SYMBOL_REF, LABEL_REF, CONST}}, \
1408 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
1409 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
1410 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
1411 {"arith64_operand", {SUBREG, REG, CONST_INT}}, \
1412 {"int5_operand", {CONST_INT}}, \
1413 {"int32_operand", {CONST_INT}}, \
1414 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1415 {"reg_or_bbx_mask_operand", {SUBREG, REG, CONST_INT}}, \
1416 {"real_or_0_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1417 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1418 {"relop", {EQ, NE, LT, LE, GE, GT, LTU, LEU, GEU, GTU}}, \
1419 {"even_relop", {EQ, LT, GT, LTU, GTU}}, \
1420 {"odd_relop", { NE, LE, GE, LEU, GEU}}, \
1421 {"partial_ccmode_register_operand", { SUBREG, REG}}, \
1422 {"relop_no_unsigned", {EQ, NE, LT, LE, GE, GT}}, \
1423 {"equality_op", {EQ, NE}}, \
1424 {"pc_or_label_ref", {PC, LABEL_REF}},
1425
1426 /* A list of predicates that do special things with modes, and so
1427 should not elicit warnings for VOIDmode match_operand. */
1428
1429 #define SPECIAL_MODE_PREDICATES \
1430 "partial_ccmode_register_operand", \
1431 "pc_or_label_ref",
1432
1433 /* The case table contains either words or branch instructions. This says
1434 which. We always claim that the vector is PC-relative. It is position
1435 independent when -fpic is used. */
1436 #define CASE_VECTOR_INSNS (TARGET_88100 || flag_pic)
1437
1438 /* An alias for a machine mode name. This is the machine mode that
1439 elements of a jump-table should have. */
1440 #define CASE_VECTOR_MODE SImode
1441
1442 /* Define as C expression which evaluates to nonzero if the tablejump
1443 instruction expects the table to contain offsets from the address of the
1444 table.
1445 Do not define this if the table should contain absolute addresses. */
1446 #define CASE_VECTOR_PC_RELATIVE 1
1447
1448 /* Define this if control falls through a `case' insn when the index
1449 value is out of range. This means the specified default-label is
1450 actually ignored by the `case' insn proper. */
1451 /* #define CASE_DROPS_THROUGH */
1452
1453 /* Define this to be the smallest number of different values for which it
1454 is best to use a jump-table instead of a tree of conditional branches.
1455 The default is 4 for machines with a casesi instruction and 5 otherwise.
1456 The best 88110 number is around 7, though the exact number isn't yet
1457 known. A third alternative for the 88110 is to use a binary tree of
1458 bb1 instructions on bits 2/1/0 if the range is dense. This may not
1459 win very much though. */
1460 #define CASE_VALUES_THRESHOLD (TARGET_88100 ? 4 : 7)
1461
1462 /* Define this as 1 if `char' should by default be signed; else as 0. */
1463 #define DEFAULT_SIGNED_CHAR 1
1464
1465 /* The 88open ABI says size_t is unsigned int. */
1466 #define SIZE_TYPE "unsigned int"
1467
1468 /* Allow and ignore #sccs directives */
1469 #define SCCS_DIRECTIVE
1470
1471 /* Handle #pragma pack and sometimes #pragma weak. */
1472 #define HANDLE_SYSV_PRAGMA
1473
1474 /* Tell when to handle #pragma weak. This is only done for V.4. */
1475 #define SUPPORTS_WEAK TARGET_SVR4
1476 #define SUPPORTS_ONE_ONLY TARGET_SVR4
1477
1478 /* Max number of bytes we can move from memory to memory
1479 in one reasonably fast instruction. */
1480 #define MOVE_MAX 8
1481
1482 /* Define if normal loads of shorter-than-word items from memory clears
1483 the rest of the bigs in the register. */
1484 #define BYTE_LOADS_ZERO_EXTEND
1485
1486 /* Zero if access to memory by bytes is faster. */
1487 #define SLOW_BYTE_ACCESS 1
1488
1489 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1490 is done just by pretending it is already truncated. */
1491 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1492
1493 /* Define this if addresses of constant functions
1494 shouldn't be put through pseudo regs where they can be cse'd.
1495 Desirable on machines where ordinary constants are expensive
1496 but a CALL with constant address is cheap. */
1497 #define NO_FUNCTION_CSE
1498
1499 /* Define this macro if an argument declared as `char' or
1500 `short' in a prototype should actually be passed as an
1501 `int'. In addition to avoiding errors in certain cases of
1502 mismatch, it also makes for better code on certain machines. */
1503 #define PROMOTE_PROTOTYPES 1
1504
1505 /* We assume that the store-condition-codes instructions store 0 for false
1506 and some other value for true. This is the value stored for true. */
1507 #define STORE_FLAG_VALUE (-1)
1508
1509 /* Specify the machine mode that pointers have.
1510 After generation of rtl, the compiler makes no further distinction
1511 between pointers and any other objects of this machine mode. */
1512 #define Pmode SImode
1513
1514 /* A function address in a call instruction
1515 is a word address (for indexing purposes)
1516 so give the MEM rtx word mode. */
1517 #define FUNCTION_MODE SImode
1518
1519 /* A barrier will be aligned so account for the possible expansion.
1520 A volatile load may be preceded by a serializing instruction.
1521 Account for profiling code output at NOTE_INSN_PROLOGUE_END.
1522 Account for block profiling code at basic block boundaries. */
1523 #define ADJUST_INSN_LENGTH(RTX, LENGTH) \
1524 if (GET_CODE (RTX) == BARRIER \
1525 || (TARGET_SERIALIZE_VOLATILE \
1526 && GET_CODE (RTX) == INSN \
1527 && GET_CODE (PATTERN (RTX)) == SET \
1528 && ((GET_CODE (SET_SRC (PATTERN (RTX))) == MEM \
1529 && MEM_VOLATILE_P (SET_SRC (PATTERN (RTX))))))) \
1530 LENGTH += 1; \
1531 else if (GET_CODE (RTX) == NOTE \
1532 && NOTE_LINE_NUMBER (RTX) == NOTE_INSN_PROLOGUE_END) \
1533 { \
1534 if (current_function_profile) \
1535 LENGTH += (FUNCTION_PROFILER_LENGTH + REG_PUSH_LENGTH \
1536 + REG_POP_LENGTH); \
1537 } \
1538
1539 /* Track the state of the last volatile memory reference. Clear the
1540 state with CC_STATUS_INIT for now. */
1541 #define CC_STATUS_INIT m88k_volatile_code = '\0'
1542
1543 /* Compute the cost of computing a constant rtl expression RTX
1544 whose rtx-code is CODE. The body of this macro is a portion
1545 of a switch statement. If the code is computed here,
1546 return it with a return statement. Otherwise, break from the switch.
1547
1548 We assume that any 16 bit integer can easily be recreated, so we
1549 indicate 0 cost, in an attempt to get GCC not to optimize things
1550 like comparison against a constant.
1551
1552 The cost of CONST_DOUBLE is zero (if it can be placed in an insn, it
1553 is as good as a register; since it can't be placed in any insn, it
1554 won't do anything in cse, but it will cause expand_binop to pass the
1555 constant to the define_expands). */
1556 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1557 case CONST_INT: \
1558 if (SMALL_INT (RTX)) \
1559 return 0; \
1560 else if (SMALL_INTVAL (- INTVAL (RTX))) \
1561 return 2; \
1562 else if (classify_integer (SImode, INTVAL (RTX)) != m88k_oru_or) \
1563 return 4; \
1564 return 7; \
1565 case HIGH: \
1566 return 2; \
1567 case CONST: \
1568 case LABEL_REF: \
1569 case SYMBOL_REF: \
1570 if (flag_pic) \
1571 return (flag_pic == 2) ? 11 : 8; \
1572 return 5; \
1573 case CONST_DOUBLE: \
1574 return 0;
1575
1576 /* Provide the costs of an addressing mode that contains ADDR.
1577 If ADDR is not a valid address, its cost is irrelevant.
1578 REG+REG is made slightly more expensive because it might keep
1579 a register live for longer than we might like. */
1580 #define ADDRESS_COST(ADDR) \
1581 (GET_CODE (ADDR) == REG ? 1 : \
1582 GET_CODE (ADDR) == LO_SUM ? 1 : \
1583 GET_CODE (ADDR) == HIGH ? 2 : \
1584 GET_CODE (ADDR) == MULT ? 1 : \
1585 GET_CODE (ADDR) != PLUS ? 4 : \
1586 (REG_P (XEXP (ADDR, 0)) && REG_P (XEXP (ADDR, 1))) ? 2 : 1)
1587
1588 /* Provide the costs of a rtl expression. This is in the body of a
1589 switch on CODE. */
1590 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1591 case MEM: \
1592 return COSTS_N_INSNS (2); \
1593 case MULT: \
1594 return COSTS_N_INSNS (3); \
1595 case DIV: \
1596 case UDIV: \
1597 case MOD: \
1598 case UMOD: \
1599 return COSTS_N_INSNS (38);
1600
1601 /* A C expressions returning the cost of moving data of MODE from a register
1602 to or from memory. This is more costly than between registers. */
1603 #define MEMORY_MOVE_COST(MODE,CLASS,IN) 4
1604
1605 /* Provide the cost of a branch. Exact meaning under development. */
1606 #define BRANCH_COST (TARGET_88100 ? 1 : 2)
1607
1608 /* Do not break .stabs pseudos into continuations. */
1609 #define DBX_CONTIN_LENGTH 0
1610 \f
1611 /*** Output of Assembler Code ***/
1612
1613 /* Control the assembler format that we output. */
1614
1615 /* A C string constant describing how to begin a comment in the target
1616 assembler language. The compiler assumes that the comment will end at
1617 the end of the line. */
1618 #define ASM_COMMENT_START ";"
1619
1620 /* Allow pseudo-ops to be overridden. Override these in svr[34].h. */
1621 #undef ASCII_DATA_ASM_OP
1622 #undef CONST_SECTION_ASM_OP
1623 #undef CTORS_SECTION_ASM_OP
1624 #undef DTORS_SECTION_ASM_OP
1625 #undef TARGET_ASM_NAMED_SECTION
1626 #undef INIT_SECTION_ASM_OP
1627 #undef FINI_SECTION_ASM_OP
1628 #undef TYPE_ASM_OP
1629 #undef SIZE_ASM_OP
1630 #undef SET_ASM_OP
1631 #undef SKIP_ASM_OP
1632 #undef COMMON_ASM_OP
1633 #undef ALIGN_ASM_OP
1634 #undef IDENT_ASM_OP
1635
1636 /* These are used in varasm.c as well. */
1637 #define TEXT_SECTION_ASM_OP "\ttext"
1638 #define DATA_SECTION_ASM_OP "\tdata"
1639
1640 /* Other sections. */
1641 #define CONST_SECTION_ASM_OP (TARGET_SVR4 \
1642 ? "\tsection\t .rodata,\"a\"" \
1643 : "\tsection\t .rodata,\"x\"")
1644 #define TDESC_SECTION_ASM_OP (TARGET_SVR4 \
1645 ? "\tsection\t .tdesc,\"a\"" \
1646 : "\tsection\t .tdesc,\"x\"")
1647
1648 /* These must be constant strings for crtstuff.c. */
1649 #define CTORS_SECTION_ASM_OP "\tsection\t .ctors,\"d\""
1650 #define DTORS_SECTION_ASM_OP "\tsection\t .dtors,\"d\""
1651 #define INIT_SECTION_ASM_OP "\tsection\t .init,\"x\""
1652 #define FINI_SECTION_ASM_OP "\tsection\t .fini,\"x\""
1653
1654 /* These are pretty much common to all assemblers. */
1655 #define IDENT_ASM_OP "\tident\t"
1656 #define FILE_ASM_OP "\tfile\t"
1657 #define SECTION_ASM_OP "\tsection\t"
1658 #define SET_ASM_OP "\tdef\t"
1659 #define GLOBAL_ASM_OP "\tglobal\t"
1660 #define ALIGN_ASM_OP "\talign\t"
1661 #define SKIP_ASM_OP "\tzero\t"
1662 #define COMMON_ASM_OP "\tcomm\t"
1663 #define BSS_ASM_OP "\tbss\t"
1664 #define FLOAT_ASM_OP "\tfloat\t"
1665 #define DOUBLE_ASM_OP "\tdouble\t"
1666 #define ASCII_DATA_ASM_OP "\tstring\t"
1667
1668 /* These are particular to the global pool optimization. */
1669 #define SBSS_ASM_OP "\tsbss\t"
1670 #define SCOMM_ASM_OP "\tscomm\t"
1671 #define SDATA_SECTION_ASM_OP "\tsdata"
1672
1673 /* These are specific to PIC. */
1674 #define TYPE_ASM_OP "\ttype\t"
1675 #define SIZE_ASM_OP "\tsize\t"
1676 #ifndef AS_BUG_POUND_TYPE /* Faulty assemblers require @ rather than #. */
1677 #undef TYPE_OPERAND_FMT
1678 #define TYPE_OPERAND_FMT "#%s"
1679 #endif
1680
1681 /* This is how we tell the assembler that a symbol is weak. */
1682
1683 #undef ASM_WEAKEN_LABEL
1684 #define ASM_WEAKEN_LABEL(FILE,NAME) \
1685 do { fputs ("\tweak\t", FILE); assemble_name (FILE, NAME); \
1686 fputc ('\n', FILE); } while (0)
1687
1688 /* These are specific to version 03.00 assembler syntax. */
1689 #define INTERNAL_ASM_OP "\tlocal\t"
1690 #define VERSION_ASM_OP "\tversion\t"
1691 #define PUSHSECTION_ASM_OP "\tsection\t"
1692 #define POPSECTION_ASM_OP "\tprevious"
1693
1694 /* These are specific to the version 04.00 assembler syntax. */
1695 #define REQUIRES_88110_ASM_OP "\trequires_88110"
1696
1697 /* Output any initial stuff to the assembly file. Always put out
1698 a file directive, even if not debugging.
1699
1700 Immediately after putting out the file, put out a "sem.<value>"
1701 declaration. This should be harmless on other systems, and
1702 is used in DG/UX by the debuggers to supplement COFF. The
1703 fields in the integer value are as follows:
1704
1705 Bits Value Meaning
1706 ---- ----- -------
1707 0-1 0 No information about stack locations
1708 1 Auto/param locations are based on r30
1709 2 Auto/param locations are based on CFA
1710
1711 3-2 0 No information on dimension order
1712 1 Array dims in sym table matches source language
1713 2 Array dims in sym table is in reverse order
1714
1715 5-4 0 No information about the case of global names
1716 1 Global names appear in the symbol table as in the source
1717 2 Global names have been converted to lower case
1718 3 Global names have been converted to upper case. */
1719
1720 #ifdef SDB_DEBUGGING_INFO
1721 #define ASM_COFFSEM(FILE) \
1722 if (write_symbols == SDB_DEBUG) \
1723 { \
1724 fprintf (FILE, "\nsem.%x:\t\t; %s\n", \
1725 (((TARGET_OCS_FRAME_POSITION) ? 2 : 1) << 0) + (1 << 2) + (1 << 4),\
1726 (TARGET_OCS_FRAME_POSITION) \
1727 ? "frame is CFA, normal array dims, case unchanged" \
1728 : "frame is r30, normal array dims, case unchanged"); \
1729 }
1730 #else
1731 #define ASM_COFFSEM(FILE)
1732 #endif
1733
1734 /* Output the first line of the assembly file. Redefined in dgux.h. */
1735
1736 #define ASM_FIRST_LINE(FILE) \
1737 do { \
1738 if (TARGET_SVR4) \
1739 { \
1740 if (TARGET_88110) \
1741 fprintf (FILE, "%s\"%s\"\n", VERSION_ASM_OP, "04.00"); \
1742 else \
1743 fprintf (FILE, "%s\"%s\"\n", VERSION_ASM_OP, "03.00"); \
1744 } \
1745 } while (0)
1746
1747 /* Override svr[34].h. */
1748 #undef ASM_FILE_START
1749 #define ASM_FILE_START(FILE) \
1750 output_file_start (FILE, \
1751 (struct m88k_lang_independent_options *) f_options, \
1752 ARRAY_SIZE (f_options), \
1753 (struct m88k_lang_independent_options *) W_options, \
1754 ARRAY_SIZE (W_options))
1755
1756 #undef ASM_FILE_END
1757
1758 #define ASM_OUTPUT_SOURCE_FILENAME(FILE, NAME) \
1759 fprintf (FILE, "%s\"%s\"\n", FILE_ASM_OP, NAME)
1760
1761 #ifdef SDB_DEBUGGING_INFO
1762 #undef ASM_OUTPUT_SOURCE_LINE
1763 #define ASM_OUTPUT_SOURCE_LINE(FILE, LINE) \
1764 if (m88k_prologue_done) \
1765 fprintf (FILE, "\n\tln\t %d\t\t\t\t; Real source line %d\n",\
1766 LINE - sdb_begin_function_line, LINE)
1767 #endif
1768
1769 /* Code to handle #ident directives. Override svr[34].h definition. */
1770 #undef ASM_OUTPUT_IDENT
1771 #ifdef DBX_DEBUGGING_INFO
1772 #define ASM_OUTPUT_IDENT(FILE, NAME)
1773 #else
1774 #define ASM_OUTPUT_IDENT(FILE, NAME) \
1775 output_ascii (FILE, IDENT_ASM_OP, 4000, NAME, strlen (NAME));
1776 #endif
1777
1778 /* Output to assembler file text saying following lines
1779 may contain character constants, extra white space, comments, etc. */
1780 #define ASM_APP_ON ""
1781
1782 /* Output to assembler file text saying following lines
1783 no longer contain unusual constructs. */
1784 #define ASM_APP_OFF ""
1785
1786 /* Format the assembly opcode so that the arguments are all aligned.
1787 The maximum instruction size is 8 characters (fxxx.xxx), so a tab and a
1788 space will do to align the output. Abandon the output if a `%' is
1789 encountered. */
1790 #define ASM_OUTPUT_OPCODE(STREAM, PTR) \
1791 { \
1792 int ch; \
1793 const char *orig_ptr; \
1794 \
1795 for (orig_ptr = (PTR); \
1796 (ch = *(PTR)) && ch != ' ' && ch != '\t' && ch != '\n' && ch != '%'; \
1797 (PTR)++) \
1798 putc (ch, STREAM); \
1799 \
1800 if (ch == ' ' && orig_ptr != (PTR) && (PTR) - orig_ptr < 8) \
1801 putc ('\t', STREAM); \
1802 }
1803
1804 /* How to refer to registers in assembler output.
1805 This sequence is indexed by compiler's hard-register-number.
1806 Updated by OVERRIDE_OPTIONS to include the # for version 03.00 syntax. */
1807
1808 #define REGISTER_NAMES \
1809 {"#r0"+1, "#r1"+1, "#r2"+1, "#r3"+1, "#r4"+1, "#r5"+1, "#r6"+1, "#r7"+1, \
1810 "#r8"+1, "#r9"+1, "#r10"+1,"#r11"+1,"#r12"+1,"#r13"+1,"#r14"+1,"#r15"+1,\
1811 "#r16"+1,"#r17"+1,"#r18"+1,"#r19"+1,"#r20"+1,"#r21"+1,"#r22"+1,"#r23"+1,\
1812 "#r24"+1,"#r25"+1,"#r26"+1,"#r27"+1,"#r28"+1,"#r29"+1,"#r30"+1,"#r31"+1,\
1813 "#x0"+1, "#x1"+1, "#x2"+1, "#x3"+1, "#x4"+1, "#x5"+1, "#x6"+1, "#x7"+1, \
1814 "#x8"+1, "#x9"+1, "#x10"+1,"#x11"+1,"#x12"+1,"#x13"+1,"#x14"+1,"#x15"+1,\
1815 "#x16"+1,"#x17"+1,"#x18"+1,"#x19"+1,"#x20"+1,"#x21"+1,"#x22"+1,"#x23"+1,\
1816 "#x24"+1,"#x25"+1,"#x26"+1,"#x27"+1,"#x28"+1,"#x29"+1,"#x30"+1,"#x31"+1}
1817
1818 /* Define additional names for use in asm clobbers and asm declarations.
1819
1820 We define the fake Condition Code register as an alias for reg 0 (which
1821 is our `condition code' register), so that condition codes can easily
1822 be clobbered by an asm. The carry bit in the PSR is now used. */
1823
1824 #define ADDITIONAL_REGISTER_NAMES {{"psr", 0}, {"cc", 0}}
1825
1826 /* Tell when to declare ASM names. Override svr4.h to provide this hook. */
1827 #undef DECLARE_ASM_NAME
1828 #define DECLARE_ASM_NAME TARGET_SVR4
1829
1830 /* Write the extra assembler code needed to declare a function properly. */
1831 #undef ASM_DECLARE_FUNCTION_NAME
1832 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1833 do { \
1834 if (DECLARE_ASM_NAME) \
1835 { \
1836 fprintf (FILE, "%s", TYPE_ASM_OP); \
1837 assemble_name (FILE, NAME); \
1838 putc (',', FILE); \
1839 fprintf (FILE, TYPE_OPERAND_FMT, "function"); \
1840 putc ('\n', FILE); \
1841 } \
1842 ASM_OUTPUT_LABEL(FILE, NAME); \
1843 } while (0)
1844
1845 /* Write the extra assembler code needed to declare an object properly. */
1846 #undef ASM_DECLARE_OBJECT_NAME
1847 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
1848 do { \
1849 if (DECLARE_ASM_NAME) \
1850 { \
1851 fprintf (FILE, "%s", TYPE_ASM_OP); \
1852 assemble_name (FILE, NAME); \
1853 putc (',', FILE); \
1854 fprintf (FILE, TYPE_OPERAND_FMT, "object"); \
1855 putc ('\n', FILE); \
1856 size_directive_output = 0; \
1857 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
1858 { \
1859 size_directive_output = 1; \
1860 fprintf (FILE, "%s", SIZE_ASM_OP); \
1861 assemble_name (FILE, NAME); \
1862 fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
1863 } \
1864 } \
1865 ASM_OUTPUT_LABEL(FILE, NAME); \
1866 } while (0)
1867
1868 /* Output the size directive for a decl in rest_of_decl_compilation
1869 in the case where we did not do so before the initializer.
1870 Once we find the error_mark_node, we know that the value of
1871 size_directive_output was set
1872 by ASM_DECLARE_OBJECT_NAME when it was run for the same decl. */
1873
1874 #undef ASM_FINISH_DECLARE_OBJECT
1875 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
1876 do { \
1877 const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
1878 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
1879 && DECLARE_ASM_NAME \
1880 && ! AT_END && TOP_LEVEL \
1881 && DECL_INITIAL (DECL) == error_mark_node \
1882 && !size_directive_output) \
1883 { \
1884 size_directive_output = 1; \
1885 fprintf (FILE, "%s", SIZE_ASM_OP); \
1886 assemble_name (FILE, name); \
1887 fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
1888 } \
1889 } while (0)
1890
1891 /* This is how to declare the size of a function. */
1892 #undef ASM_DECLARE_FUNCTION_SIZE
1893 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
1894 do { \
1895 if (DECLARE_ASM_NAME) \
1896 { \
1897 if (!flag_inhibit_size_directive) \
1898 { \
1899 char label[256]; \
1900 static int labelno = 0; \
1901 labelno++; \
1902 ASM_GENERATE_INTERNAL_LABEL (label, "Lfe", labelno); \
1903 ASM_OUTPUT_INTERNAL_LABEL (FILE, "Lfe", labelno); \
1904 fprintf (FILE, "%s", SIZE_ASM_OP); \
1905 assemble_name (FILE, (FNAME)); \
1906 fprintf (FILE, ",%s-", &label[1]); \
1907 assemble_name (FILE, (FNAME)); \
1908 putc ('\n', FILE); \
1909 } \
1910 } \
1911 } while (0)
1912
1913 /* This is how to output the definition of a user-level label named NAME,
1914 such as the label on a static function or variable NAME. */
1915 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1916 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1917
1918 /* This is how to output a command to make the user-level label named NAME
1919 defined for reference from other files. */
1920 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1921 do { \
1922 fprintf (FILE, "%s", GLOBAL_ASM_OP); \
1923 assemble_name (FILE, NAME); \
1924 putc ('\n', FILE); \
1925 } while (0)
1926
1927 /* The prefix to add to user-visible assembler symbols.
1928 Override svr[34].h. */
1929 #undef USER_LABEL_PREFIX
1930 #define USER_LABEL_PREFIX "_"
1931
1932 /* This is how to output a reference to a user-level label named NAME.
1933 Override svr[34].h. */
1934 #undef ASM_OUTPUT_LABELREF
1935 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1936 { \
1937 if (!TARGET_NO_UNDERSCORES && !TARGET_SVR4) \
1938 fputc ('_', FILE); \
1939 fputs (NAME, FILE); \
1940 }
1941
1942 /* This is how to output an internal numbered label where
1943 PREFIX is the class of label and NUM is the number within the class.
1944 For V.4, labels use `.' rather than `@'. */
1945
1946 #undef ASM_OUTPUT_INTERNAL_LABEL
1947 #ifdef AS_BUG_DOT_LABELS /* The assembler requires a declaration of local. */
1948 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1949 fprintf (FILE, TARGET_SVR4 ? ".%s%d:\n%s.%s%d\n" : "@%s%d:\n", \
1950 PREFIX, NUM, INTERNAL_ASM_OP, PREFIX, NUM)
1951 #else
1952 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1953 fprintf (FILE, TARGET_SVR4 ? ".%s%d:\n" : "@%s%d:\n", PREFIX, NUM)
1954 #endif /* AS_BUG_DOT_LABELS */
1955
1956 /* This is how to store into the string LABEL
1957 the symbol_ref name of an internal numbered label where
1958 PREFIX is the class of label and NUM is the number within the class.
1959 This is suitable for output with `assemble_name'. This must agree
1960 with ASM_OUTPUT_INTERNAL_LABEL above, except for being prefixed
1961 with an `*'. */
1962
1963 #undef ASM_GENERATE_INTERNAL_LABEL
1964 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1965 sprintf (LABEL, TARGET_SVR4 ? "*.%s%ld" : "*@%s%ld", PREFIX, (long)(NUM))
1966
1967 /* The single-byte pseudo-op is the default. Override svr[34].h. */
1968 #undef ASM_OUTPUT_ASCII
1969 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1970 output_ascii (FILE, ASCII_DATA_ASM_OP, 48, P, SIZE)
1971
1972 /* Override svr4.h. Change to the readonly data section for a table of
1973 addresses. final_scan_insn changes back to the text section. */
1974 #undef ASM_OUTPUT_CASE_LABEL
1975 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
1976 do { \
1977 if (! CASE_VECTOR_INSNS) \
1978 { \
1979 readonly_data_section (); \
1980 ASM_OUTPUT_ALIGN (FILE, 2); \
1981 } \
1982 ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \
1983 } while (0)
1984
1985 /* Epilogue for case labels. This jump instruction is called by casesi
1986 to transfer to the appropriate branch instruction within the table.
1987 The label `@L<n>e' is coined to mark the end of the table. */
1988 #define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
1989 do { \
1990 if (CASE_VECTOR_INSNS) \
1991 { \
1992 char label[256]; \
1993 ASM_GENERATE_INTERNAL_LABEL (label, "L", NUM); \
1994 fprintf (FILE, "%se:\n", &label[1]); \
1995 if (! flag_delayed_branch) \
1996 fprintf (FILE, "\tlda\t %s,%s[%s]\n", reg_names[1], \
1997 reg_names[1], reg_names[m88k_case_index]); \
1998 fprintf (FILE, "\tjmp\t %s\n", reg_names[1]); \
1999 } \
2000 } while (0)
2001
2002 /* This is how to output an element of a case-vector that is absolute. */
2003 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2004 do { \
2005 char buffer[256]; \
2006 ASM_GENERATE_INTERNAL_LABEL (buffer, "L", VALUE); \
2007 fprintf (FILE, CASE_VECTOR_INSNS ? "\tbr\t %s\n" : "\tword\t %s\n", \
2008 &buffer[1]); \
2009 } while (0)
2010
2011 /* This is how to output an element of a case-vector that is relative. */
2012 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
2013 ASM_OUTPUT_ADDR_VEC_ELT (FILE, VALUE)
2014
2015 /* This is how to output an assembler line
2016 that says to advance the location counter
2017 to a multiple of 2**LOG bytes. */
2018 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
2019 if ((LOG) != 0) \
2020 fprintf (FILE, "%s%d\n", ALIGN_ASM_OP, 1<<(LOG))
2021
2022 /* On the m88100, align the text address to half a cache boundary when it
2023 can only be reached by jumping. Pack code tightly when compiling
2024 crtstuff.c. */
2025 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) \
2026 (TARGET_88100 && !flag_inhibit_size_directive ? 3 : 2)
2027
2028 /* Override svr[34].h. */
2029 #undef ASM_OUTPUT_SKIP
2030 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
2031 fprintf (FILE, "%s%u\n", SKIP_ASM_OP, (SIZE))
2032
2033 /* Override svr4.h. */
2034 #undef ASM_OUTPUT_EXTERNAL_LIBCALL
2035
2036 /* This says how to output an assembler line to define a global common
2037 symbol. Size can be zero for the unusual case of a `struct { int : 0; }'.
2038 Override svr[34].h. */
2039 #undef ASM_OUTPUT_COMMON
2040 #undef ASM_OUTPUT_ALIGNED_COMMON
2041 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
2042 ( fprintf ((FILE), "%s", \
2043 ((SIZE) ? (SIZE) : 1) <= m88k_gp_threshold ? SCOMM_ASM_OP : COMMON_ASM_OP), \
2044 assemble_name ((FILE), (NAME)), \
2045 fprintf ((FILE), ",%u\n", (SIZE) ? (SIZE) : 1))
2046
2047 /* This says how to output an assembler line to define a local common
2048 symbol. Override svr[34].h. */
2049 #undef ASM_OUTPUT_LOCAL
2050 #undef ASM_OUTPUT_ALIGNED_LOCAL
2051 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
2052 ( fprintf ((FILE), "%s", \
2053 ((SIZE) ? (SIZE) : 1) <= m88k_gp_threshold ? SBSS_ASM_OP : BSS_ASM_OP), \
2054 assemble_name ((FILE), (NAME)), \
2055 fprintf ((FILE), ",%u,%d\n", (SIZE) ? (SIZE) : 1, (SIZE) <= 4 ? 4 : 8))
2056
2057 /* Store in OUTPUT a string (made with alloca) containing
2058 an assembler-name for a local static variable named NAME.
2059 LABELNO is an integer which is different for each call. */
2060 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2061 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2062 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2063
2064 /* This is how to output an insn to push a register on the stack.
2065 It need not be very fast code. */
2066 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2067 fprintf (FILE, "\tsubu\t %s,%s,%d\n\tst\t %s,%s,0\n", \
2068 reg_names[STACK_POINTER_REGNUM], \
2069 reg_names[STACK_POINTER_REGNUM], \
2070 (STACK_BOUNDARY / BITS_PER_UNIT), \
2071 reg_names[REGNO], \
2072 reg_names[STACK_POINTER_REGNUM])
2073
2074 /* Length in instructions of the code output by ASM_OUTPUT_REG_PUSH. */
2075 #define REG_PUSH_LENGTH 2
2076
2077 /* This is how to output an insn to pop a register from the stack. */
2078 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2079 fprintf (FILE, "\tld\t %s,%s,0\n\taddu\t %s,%s,%d\n", \
2080 reg_names[REGNO], \
2081 reg_names[STACK_POINTER_REGNUM], \
2082 reg_names[STACK_POINTER_REGNUM], \
2083 reg_names[STACK_POINTER_REGNUM], \
2084 (STACK_BOUNDARY / BITS_PER_UNIT))
2085
2086 /* Length in instructions of the code output by ASM_OUTPUT_REG_POP. */
2087 #define REG_POP_LENGTH 2
2088 \f
2089 /* Macros to deal with OCS debug information */
2090
2091 #define OCS_START_PREFIX "Ltb"
2092 #define OCS_END_PREFIX "Lte"
2093
2094 #define PUT_OCS_FUNCTION_START(FILE) \
2095 { ASM_OUTPUT_INTERNAL_LABEL (FILE, OCS_START_PREFIX, m88k_function_number); }
2096
2097 #define PUT_OCS_FUNCTION_END(FILE) \
2098 { ASM_OUTPUT_INTERNAL_LABEL (FILE, OCS_END_PREFIX, m88k_function_number); }
2099
2100 /* Macros for debug information */
2101 #define DEBUGGER_AUTO_OFFSET(X) \
2102 (m88k_debugger_offset (X, 0) \
2103 + (TARGET_OCS_FRAME_POSITION ? 0 : m88k_stack_size - m88k_fp_offset))
2104
2105 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
2106 (m88k_debugger_offset (X, OFFSET) \
2107 + (TARGET_OCS_FRAME_POSITION ? 0 : m88k_stack_size - m88k_fp_offset))
2108
2109 /* Macros to deal with SDB debug information */
2110 #ifdef SDB_DEBUGGING_INFO
2111
2112 /* Output structure tag names even when it causes a forward reference. */
2113 #define SDB_ALLOW_FORWARD_REFERENCES
2114
2115 /* Print out extra debug information in the assembler file */
2116 #define PUT_SDB_SCL(a) \
2117 do { \
2118 register int s = (a); \
2119 register const char *scl; \
2120 switch (s) \
2121 { \
2122 case C_EFCN: scl = "end of function"; break; \
2123 case C_NULL: scl = "NULL storage class"; break; \
2124 case C_AUTO: scl = "automatic"; break; \
2125 case C_EXT: scl = "external"; break; \
2126 case C_STAT: scl = "static"; break; \
2127 case C_REG: scl = "register"; break; \
2128 case C_EXTDEF: scl = "external definition"; break; \
2129 case C_LABEL: scl = "label"; break; \
2130 case C_ULABEL: scl = "undefined label"; break; \
2131 case C_MOS: scl = "structure member"; break; \
2132 case C_ARG: scl = "argument"; break; \
2133 case C_STRTAG: scl = "structure tag"; break; \
2134 case C_MOU: scl = "union member"; break; \
2135 case C_UNTAG: scl = "union tag"; break; \
2136 case C_TPDEF: scl = "typedef"; break; \
2137 case C_USTATIC: scl = "uninitialized static"; break; \
2138 case C_ENTAG: scl = "enumeration tag"; break; \
2139 case C_MOE: scl = "member of enumeration"; break; \
2140 case C_REGPARM: scl = "register parameter"; break; \
2141 case C_FIELD: scl = "bit field"; break; \
2142 case C_BLOCK: scl = "block start/end"; break; \
2143 case C_FCN: scl = "function start/end"; break; \
2144 case C_EOS: scl = "end of structure"; break; \
2145 case C_FILE: scl = "filename"; break; \
2146 case C_LINE: scl = "line"; break; \
2147 case C_ALIAS: scl = "duplicated tag"; break; \
2148 case C_HIDDEN: scl = "hidden"; break; \
2149 default: scl = "unknown"; break; \
2150 } \
2151 \
2152 fprintf(asm_out_file, "\tscl\t %d\t\t\t\t; %s\n", s, scl); \
2153 } while (0)
2154
2155 #define PUT_SDB_TYPE(a) \
2156 do { \
2157 register int t = (a); \
2158 static char buffer[100]; \
2159 register char *p = buffer; \
2160 register const char *q; \
2161 register int typ = t; \
2162 register int i; \
2163 \
2164 for (i = 0; i <= 5; i++) \
2165 { \
2166 switch ((typ >> ((i*N_TSHIFT) + N_BTSHFT)) & 03) \
2167 { \
2168 case DT_PTR: \
2169 strcpy (p, "ptr to "); \
2170 p += sizeof("ptr to"); \
2171 break; \
2172 \
2173 case DT_ARY: \
2174 strcpy (p, "array of "); \
2175 p += sizeof("array of"); \
2176 break; \
2177 \
2178 case DT_FCN: \
2179 strcpy (p, "func ret "); \
2180 p += sizeof("func ret"); \
2181 break; \
2182 } \
2183 } \
2184 \
2185 switch (typ & N_BTMASK) \
2186 { \
2187 case T_NULL: q = "<no type>"; break; \
2188 case T_CHAR: q = "char"; break; \
2189 case T_SHORT: q = "short"; break; \
2190 case T_INT: q = "int"; break; \
2191 case T_LONG: q = "long"; break; \
2192 case T_FLOAT: q = "float"; break; \
2193 case T_DOUBLE: q = "double"; break; \
2194 case T_STRUCT: q = "struct"; break; \
2195 case T_UNION: q = "union"; break; \
2196 case T_ENUM: q = "enum"; break; \
2197 case T_MOE: q = "enum member"; break; \
2198 case T_UCHAR: q = "unsigned char"; break; \
2199 case T_USHORT: q = "unsigned short"; break; \
2200 case T_UINT: q = "unsigned int"; break; \
2201 case T_ULONG: q = "unsigned long"; break; \
2202 default: q = "void"; break; \
2203 } \
2204 \
2205 strcpy (p, q); \
2206 fprintf(asm_out_file, "\ttype\t %d\t\t\t\t; %s\n", \
2207 t, buffer); \
2208 } while (0)
2209
2210 #define PUT_SDB_INT_VAL(a) \
2211 fprintf (asm_out_file, "\tval\t %d\n", (a))
2212
2213 #define PUT_SDB_VAL(a) \
2214 ( fprintf (asm_out_file, "\tval\t "), \
2215 output_addr_const (asm_out_file, (a)), \
2216 fputc ('\n', asm_out_file))
2217
2218 #define PUT_SDB_DEF(a) \
2219 do { fprintf (asm_out_file, "\tsdef\t "); \
2220 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2221 fputc ('\n', asm_out_file); \
2222 } while (0)
2223
2224 #define PUT_SDB_PLAIN_DEF(a) \
2225 fprintf(asm_out_file,"\tsdef\t .%s\n", a)
2226
2227 /* Simply and endef now. */
2228 #define PUT_SDB_ENDEF \
2229 fputs("\tendef\n\n", asm_out_file)
2230
2231 #define PUT_SDB_SIZE(a) \
2232 fprintf (asm_out_file, "\tsize\t %d\n", (a))
2233
2234 /* Max dimensions to store for debug information (limited by COFF). */
2235 #define SDB_MAX_DIM 6
2236
2237 /* New method for dim operations. */
2238 #define PUT_SDB_START_DIM \
2239 fputs("\tdim\t ", asm_out_file)
2240
2241 /* How to end the DIM sequence. */
2242 #define PUT_SDB_LAST_DIM(a) \
2243 fprintf(asm_out_file, "%d\n", a)
2244
2245 #define PUT_SDB_TAG(a) \
2246 do { \
2247 fprintf (asm_out_file, "\ttag\t "); \
2248 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2249 fputc ('\n', asm_out_file); \
2250 } while( 0 )
2251
2252 #define PUT_SDB_BLOCK_OR_FUNCTION(NAME, SCL, LINE) \
2253 do { \
2254 fprintf (asm_out_file, "\n\tsdef\t %s\n\tval\t .\n", \
2255 NAME); \
2256 PUT_SDB_SCL( SCL ); \
2257 fprintf (asm_out_file, "\tline\t %d\n\tendef\n\n", \
2258 (LINE)); \
2259 } while (0)
2260
2261 #define PUT_SDB_BLOCK_START(LINE) \
2262 PUT_SDB_BLOCK_OR_FUNCTION (".bb", C_BLOCK, (LINE))
2263
2264 #define PUT_SDB_BLOCK_END(LINE) \
2265 PUT_SDB_BLOCK_OR_FUNCTION (".eb", C_BLOCK, (LINE))
2266
2267 #define PUT_SDB_FUNCTION_START(LINE) \
2268 do { \
2269 fprintf (asm_out_file, "\tln\t 1\n"); \
2270 PUT_SDB_BLOCK_OR_FUNCTION (".bf", C_FCN, (LINE)); \
2271 } while (0)
2272
2273 #define PUT_SDB_FUNCTION_END(LINE) \
2274 do { \
2275 PUT_SDB_BLOCK_OR_FUNCTION (".ef", C_FCN, (LINE)); \
2276 } while (0)
2277
2278 #define PUT_SDB_EPILOGUE_END(NAME) \
2279 do { \
2280 text_section (); \
2281 fprintf (asm_out_file, "\n\tsdef\t "); \
2282 ASM_OUTPUT_LABELREF(asm_out_file, (NAME)); \
2283 fputc('\n', asm_out_file); \
2284 PUT_SDB_SCL( C_EFCN ); \
2285 fprintf (asm_out_file, "\tendef\n\n"); \
2286 } while (0)
2287
2288 #define SDB_GENERATE_FAKE(BUFFER, NUMBER) \
2289 sprintf ((BUFFER), ".%dfake", (NUMBER));
2290
2291 #endif /* SDB_DEBUGGING_INFO */
2292 \f
2293 /* Support const and tdesc sections. Generally, a const section will
2294 be distinct from the text section whenever we do V.4-like things
2295 and so follows DECLARE_ASM_NAME. Note that strings go in text
2296 rather than const. Override svr[34].h. */
2297
2298 #undef USE_CONST_SECTION
2299 #undef EXTRA_SECTIONS
2300
2301 #define USE_CONST_SECTION DECLARE_ASM_NAME
2302
2303 #if defined(USING_SVR4_H)
2304
2305 #define EXTRA_SECTIONS in_const, in_tdesc, in_sdata
2306 #define INIT_SECTION_FUNCTION
2307 #define FINI_SECTION_FUNCTION
2308
2309 #else
2310 #if defined(USING_SVR3_H)
2311
2312 #define EXTRA_SECTIONS in_const, in_tdesc, in_sdata, in_init, in_fini
2313
2314 #else /* luna or other not based on svr[34].h. */
2315
2316 #undef INIT_SECTION_ASM_OP
2317 #define EXTRA_SECTIONS in_const, in_tdesc, in_sdata
2318 #define CONST_SECTION_FUNCTION \
2319 void \
2320 const_section () \
2321 { \
2322 text_section(); \
2323 }
2324 #define INIT_SECTION_FUNCTION
2325 #define FINI_SECTION_FUNCTION
2326
2327 #endif /* USING_SVR3_H */
2328 #endif /* USING_SVR4_H */
2329
2330 #undef EXTRA_SECTION_FUNCTIONS
2331 #define EXTRA_SECTION_FUNCTIONS \
2332 CONST_SECTION_FUNCTION \
2333 \
2334 void \
2335 tdesc_section () \
2336 { \
2337 if (in_section != in_tdesc) \
2338 { \
2339 fprintf (asm_out_file, "%s\n", TDESC_SECTION_ASM_OP); \
2340 in_section = in_tdesc; \
2341 } \
2342 } \
2343 \
2344 void \
2345 sdata_section () \
2346 { \
2347 if (in_section != in_sdata) \
2348 { \
2349 fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
2350 in_section = in_sdata; \
2351 } \
2352 } \
2353 \
2354 INIT_SECTION_FUNCTION \
2355 FINI_SECTION_FUNCTION
2356
2357 #define TARGET_ASM_SELECT_SECTION m88k_select_section
2358
2359 /* Jump tables consist of branch instructions and should be output in
2360 the text section. When we use a table of addresses, we explicitly
2361 change to the readonly data section. */
2362 #define JUMP_TABLES_IN_TEXT_SECTION 1
2363
2364 /* Define this macro if references to a symbol must be treated differently
2365 depending on something about the variable or function named by the
2366 symbol (such as what section it is in).
2367
2368 The macro definition, if any, is executed immediately after the rtl for
2369 DECL has been created and stored in `DECL_RTL (DECL)'. The value of the
2370 rtl will be a `mem' whose address is a `symbol_ref'.
2371
2372 For the m88k, determine if the item should go in the global pool. */
2373 #define ENCODE_SECTION_INFO(DECL, FIRST) \
2374 do { \
2375 if (m88k_gp_threshold > 0) \
2376 { \
2377 if (TREE_CODE (DECL) == VAR_DECL) \
2378 { \
2379 if (!TREE_READONLY (DECL) || TREE_SIDE_EFFECTS (DECL)) \
2380 { \
2381 int size = int_size_in_bytes (TREE_TYPE (DECL)); \
2382 \
2383 if (size > 0 && size <= m88k_gp_threshold) \
2384 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
2385 } \
2386 } \
2387 else if (TREE_CODE (DECL) == STRING_CST \
2388 && flag_writable_strings \
2389 && TREE_STRING_LENGTH (DECL) <= m88k_gp_threshold) \
2390 SYMBOL_REF_FLAG (XEXP (TREE_CST_RTL (DECL), 0)) = 1; \
2391 } \
2392 } while (0)
2393 \f
2394 /* Print operand X (an rtx) in assembler syntax to file FILE.
2395 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2396 For `%' followed by punctuation, CODE is the punctuation and X is null. */
2397 #define PRINT_OPERAND_PUNCT_VALID_P(c) \
2398 ((c) == '#' || (c) == '.' || (c) == '!' || (c) == '*' || (c) == ';')
2399
2400 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2401
2402 /* Print a memory address as an operand to reference that memory location. */
2403 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
2404
2405 /* This says not to strength reduce the addr calculations within loops
2406 (otherwise it does not take advantage of m88k scaled loads and stores */
2407
2408 #define DONT_REDUCE_ADDR
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