1 /* Definitions of target machine for GNU compiler. Sun 68000/68020 version.
2 Copyright (C) 1987, 1988, 1993 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* Note that some other tm.h files include this one and then override
22 many of the definitions that relate to assembler syntax. */
25 /* Names to predefine in the preprocessor for this target machine. */
27 /* See sun3.h, sun2.h, isi.h for different CPP_PREDEFINES. */
29 /* Print subsidiary information on the compiler version in use. */
31 #define TARGET_VERSION fprintf (stderr, " (68k, Motorola syntax)");
33 #define TARGET_VERSION fprintf (stderr, " (68k, MIT syntax)");
36 /* Define SUPPORT_SUN_FPA to include support for generating code for
37 the Sun Floating Point Accelerator, an optional product for Sun 3
38 machines. By default, it is not defined. Avoid defining it unless
39 you need to output code for the Sun3+FPA architecture, as it has the
40 effect of slowing down the register set operations in hard-reg-set.h
41 (total number of registers will exceed number of bits in a long,
42 if defined, causing the set operations to expand to loops).
43 SUPPORT_SUN_FPA is typically defined in sun3.h. */
45 /* Run-time compilation parameters selecting different hardware subsets. */
47 extern int target_flags
;
49 /* Macros used in the machine description to test the flags. */
51 /* Compile for a 68020 (not a 68000 or 68010). */
52 #define TARGET_68020 (target_flags & 1)
54 /* Compile 68881 insns for floating point (not library calls). */
55 #define TARGET_68881 (target_flags & 2)
57 /* Compile using 68020 bitfield insns. */
58 #define TARGET_BITFIELD (target_flags & 4)
60 /* Compile using rtd insn calling sequence.
61 This will not work unless you use prototypes at least
62 for all functions that can take varying numbers of args. */
63 #define TARGET_RTD (target_flags & 8)
65 /* Compile passing first two args in regs 0 and 1.
66 This exists only to test compiler features that will
67 be needed for RISC chips. It is not usable
68 and is not intended to be usable on this cpu. */
69 #define TARGET_REGPARM (target_flags & 020)
71 /* Compile with 16-bit `int'. */
72 #define TARGET_SHORT (target_flags & 040)
74 /* Compile with special insns for Sun FPA. */
75 #ifdef SUPPORT_SUN_FPA
76 #define TARGET_FPA (target_flags & 0100)
81 /* Compile (actually, link) for Sun SKY board. */
82 #define TARGET_SKY (target_flags & 0200)
84 /* Optimize for 68040, but still allow execution on 68020
85 (-m68020-40 or -m68040).
86 The 68040 will execute all 68030 and 68881/2 instructions, but some
87 of them must be emulated in software by the OS. When TARGET_68040 is
88 turned on, these instructions won't be used. This code will still
89 run on a 68030 and 68881/2. */
90 #define TARGET_68040 (target_flags & 01400)
92 /* Use the 68040-only fp instructions (-m68040). */
93 #define TARGET_68040_ONLY (target_flags & 01000)
95 /* Macro to define tables used to set the flags.
96 This is a list in braces of pairs in braces,
97 each pair being { "NAME", VALUE }
98 where VALUE is the bits to set or minus the bits to clear.
99 An empty string NAME is used to identify the default VALUE. */
101 #define TARGET_SWITCHES \
102 { { "68020", -01400}, \
103 { "c68020", -01400}, \
108 { "68000", -01405}, \
109 { "c68000", -01405}, \
110 { "soft-float", -01102}, \
111 { "nobitfield", -4}, \
115 { "noshort", -040}, \
120 { "68020-40", 0407}, \
121 { "68030", -01400}, \
124 { "68851", 0}, /* Affects *_SPEC and/or GAS. */ \
125 { "no-68851", 0}, /* Affects *_SPEC and/or GAS. */ \
126 { "68302", 0}, /* Affects *_SPEC and/or GAS. */ \
127 { "no-68302", 0}, /* Affects *_SPEC and/or GAS. */ \
128 { "68332", 0}, /* Affects *_SPEC and/or GAS. */ \
129 { "no-68332", 0}, /* Affects *_SPEC and/or GAS. */ \
131 { "", TARGET_DEFAULT}}
132 /* TARGET_DEFAULT is defined in sun*.h and isi.h, etc. */
134 /* This is meant to be redefined in the host dependent files */
135 #define SUBTARGET_SWITCHES
137 #ifdef SUPPORT_SUN_FPA
138 /* Blow away 68881 flag silently on TARGET_FPA (since we can't clear
139 any bits in TARGET_SWITCHES above) */
140 #define OVERRIDE_OPTIONS \
142 if (TARGET_FPA) target_flags &= ~2; \
143 if (! TARGET_68020 && flag_pic == 2) \
144 error("-fPIC is not currently supported on the 68000 or 68010\n"); \
145 SUBTARGET_OVERRIDE_OPTIONS \
148 #define OVERRIDE_OPTIONS \
150 if (! TARGET_68020 && flag_pic == 2) \
151 error("-fPIC is not currently supported on the 68000 or 68010\n"); \
152 SUBTARGET_OVERRIDE_OPTIONS \
154 #endif /* defined SUPPORT_SUN_FPA */
156 /* This is meant to be redefined in the host dependent files */
157 #define SUBTARGET_OVERRIDE_OPTIONS
159 /* target machine storage layout */
161 /* Define for XFmode extended real floating point support.
162 This will automatically cause REAL_ARITHMETIC to be defined. */
163 #define LONG_DOUBLE_TYPE_SIZE 96
165 /* Define if you don't want extended real, but do want to use the
166 software floating point emulator for REAL_ARITHMETIC and
167 decimal <-> binary conversion. */
168 /* #define REAL_ARITHMETIC */
170 /* Define this if most significant bit is lowest numbered
171 in instructions that operate on numbered bit-fields.
172 This is true for 68020 insns such as bfins and bfexts.
173 We make it true always by avoiding using the single-bit insns
174 except in special cases with constant bit numbers. */
175 #define BITS_BIG_ENDIAN 1
177 /* Define this if most significant byte of a word is the lowest numbered. */
178 /* That is true on the 68000. */
179 #define BYTES_BIG_ENDIAN 1
181 /* Define this if most significant word of a multiword number is the lowest
183 /* For 68000 we can decide arbitrarily
184 since there are no machine instructions for them.
185 So let's be consistent. */
186 #define WORDS_BIG_ENDIAN 1
188 /* number of bits in an addressable storage unit */
189 #define BITS_PER_UNIT 8
191 /* Width in bits of a "word", which is the contents of a machine register.
192 Note that this is not necessarily the width of data type `int';
193 if using 16-bit ints on a 68000, this would still be 32.
194 But on a machine with 16-bit registers, this would be 16. */
195 #define BITS_PER_WORD 32
197 /* Width of a word, in units (bytes). */
198 #define UNITS_PER_WORD 4
200 /* Width in bits of a pointer.
201 See also the macro `Pmode' defined below. */
202 #define POINTER_SIZE 32
204 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
205 #define PARM_BOUNDARY (TARGET_SHORT ? 16 : 32)
207 /* Boundary (in *bits*) on which stack pointer should be aligned. */
208 #define STACK_BOUNDARY 16
210 /* Allocation boundary (in *bits*) for the code of a function. */
211 #define FUNCTION_BOUNDARY 16
213 /* Alignment of field after `int : 0' in a structure. */
214 #define EMPTY_FIELD_BOUNDARY 16
216 /* No data type wants to be aligned rounder than this. */
217 #define BIGGEST_ALIGNMENT 16
219 /* Set this nonzero if move instructions will actually fail to work
220 when given unaligned data. */
221 #define STRICT_ALIGNMENT 1
223 #define SELECT_RTX_SECTION(MODE, X) \
226 readonly_data_section(); \
227 else if (LEGITIMATE_PIC_OPERAND_P (X)) \
228 readonly_data_section(); \
233 /* Define number of bits in most basic integer type.
234 (If undefined, default is BITS_PER_WORD). */
236 #define INT_TYPE_SIZE (TARGET_SHORT ? 16 : 32)
238 /* Define these to avoid dependence on meaning of `int'.
239 Note that WCHAR_TYPE_SIZE is used in cexp.y,
240 where TARGET_SHORT is not available. */
242 #define WCHAR_TYPE "long int"
243 #define WCHAR_TYPE_SIZE 32
245 /* Standard register usage. */
247 /* Number of actual hardware registers.
248 The hardware registers are assigned numbers for the compiler
249 from 0 to just below FIRST_PSEUDO_REGISTER.
250 All registers that the compiler knows about must be given numbers,
251 even those that are not normally considered general registers.
252 For the 68000, we give the data registers numbers 0-7,
253 the address registers numbers 010-017,
254 and the 68881 floating point registers numbers 020-027. */
255 #ifndef SUPPORT_SUN_FPA
256 #define FIRST_PSEUDO_REGISTER 24
258 #define FIRST_PSEUDO_REGISTER 56
261 /* This defines the register which is used to hold the offset table for PIC. */
262 #define PIC_OFFSET_TABLE_REGNUM 13
264 /* Used to output a (use pic_offset_table_rtx) so that we
265 always save/restore a5 in functions that use PIC relocation
266 at *any* time during the compilation process. */
267 #define FINALIZE_PIC finalize_pic()
269 #ifndef SUPPORT_SUN_FPA
271 /* 1 for registers that have pervasive standard uses
272 and are not available for the register allocator.
273 On the 68000, only the stack pointer is such. */
275 #define FIXED_REGISTERS \
276 {/* Data registers. */ \
277 0, 0, 0, 0, 0, 0, 0, 0, \
279 /* Address registers. */ \
280 0, 0, 0, 0, 0, 0, 0, 1, \
282 /* Floating point registers \
284 0, 0, 0, 0, 0, 0, 0, 0 }
286 /* 1 for registers not available across function calls.
287 These must include the FIXED_REGISTERS and also any
288 registers that can be used without being saved.
289 The latter must include the registers where values are returned
290 and the register where structure-value addresses are passed.
291 Aside from that, you can include as many other registers as you like. */
292 #define CALL_USED_REGISTERS \
293 {1, 1, 0, 0, 0, 0, 0, 0, \
294 1, 1, 0, 0, 0, 0, 0, 1, \
295 1, 1, 0, 0, 0, 0, 0, 0 }
297 #else /* SUPPORT_SUN_FPA */
299 /* 1 for registers that have pervasive standard uses
300 and are not available for the register allocator.
301 On the 68000, only the stack pointer is such. */
303 /* fpa0 is also reserved so that it can be used to move shit back and
304 forth between high fpa regs and everything else. */
306 #define FIXED_REGISTERS \
307 {/* Data registers. */ \
308 0, 0, 0, 0, 0, 0, 0, 0, \
310 /* Address registers. */ \
311 0, 0, 0, 0, 0, 0, 0, 1, \
313 /* Floating point registers \
315 0, 0, 0, 0, 0, 0, 0, 0, \
317 /* Sun3 FPA registers. */ \
318 1, 0, 0, 0, 0, 0, 0, 0, \
319 0, 0, 0, 0, 0, 0, 0, 0, \
320 0, 0, 0, 0, 0, 0, 0, 0, \
321 0, 0, 0, 0, 0, 0, 0, 0 }
323 /* 1 for registers not available across function calls.
324 These must include the FIXED_REGISTERS and also any
325 registers that can be used without being saved.
326 The latter must include the registers where values are returned
327 and the register where structure-value addresses are passed.
328 Aside from that, you can include as many other registers as you like. */
329 #define CALL_USED_REGISTERS \
330 {1, 1, 0, 0, 0, 0, 0, 0, \
331 1, 1, 0, 0, 0, 0, 0, 1, \
332 1, 1, 0, 0, 0, 0, 0, 0, \
333 /* FPA registers. */ \
334 1, 1, 1, 1, 0, 0, 0, 0, \
335 0, 0, 0, 0, 0, 0, 0, 0, \
336 0, 0, 0, 0, 0, 0, 0, 0, \
337 0, 0, 0, 0, 0, 0, 0, 0 }
339 #endif /* defined SUPPORT_SUN_FPA */
342 /* Make sure everything's fine if we *don't* have a given processor.
343 This assumes that putting a register in fixed_regs will keep the
344 compiler's mitts completely off it. We don't bother to zero it out
345 of register classes. If neither TARGET_FPA or TARGET_68881 is set,
346 the compiler won't touch since no instructions that use these
347 registers will be valid.
349 Reserve PIC_OFFSET_TABLE_REGNUM (a5) for doing PIC relocation if
350 position independent code is being generated by making it a
353 #ifndef SUPPORT_SUN_FPA
355 #define CONDITIONAL_REGISTER_USAGE \
358 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
361 #else /* defined SUPPORT_SUN_FPA */
363 #define CONDITIONAL_REGISTER_USAGE \
369 COPY_HARD_REG_SET (x, reg_class_contents[(int)FPA_REGS]); \
370 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
371 if (TEST_HARD_REG_BIT (x, i)) \
372 fixed_regs[i] = call_used_regs[i] = 1; \
376 COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
377 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
378 if (TEST_HARD_REG_BIT (x, i)) \
379 fixed_regs[i] = call_used_regs[i] = 1; \
382 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
385 #endif /* defined SUPPORT_SUN_FPA */
387 /* Return number of consecutive hard regs needed starting at reg REGNO
388 to hold something of mode MODE.
389 This is ordinarily the length in words of a value of mode MODE
390 but can be less for certain modes in special long registers.
392 On the 68000, ordinary registers hold 32 bits worth;
393 for the 68881 registers, a single register is always enough for
394 anything that can be stored in them at all. */
395 #define HARD_REGNO_NREGS(REGNO, MODE) \
396 ((REGNO) >= 16 ? GET_MODE_NUNITS (MODE) \
397 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
399 #ifndef SUPPORT_SUN_FPA
401 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
402 On the 68000, the cpu registers can hold any mode but the 68881 registers
403 can hold only SFmode or DFmode. The 68881 registers can't hold anything
404 if 68881 use is disabled. */
406 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
410 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
411 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)))
413 #else /* defined SUPPORT_SUN_FPA */
415 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
416 On the 68000, the cpu registers can hold any mode but the 68881 registers
417 can hold only SFmode or DFmode. And the 68881 registers can't hold anything
418 if 68881 use is disabled. However, the Sun FPA register can
419 (apparently) hold whatever you feel like putting in them.
420 If using the fpa, don't put a double in d7/a0. */
422 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
425 && GET_MODE_CLASS ((MODE)) != MODE_INT \
426 && GET_MODE_UNIT_SIZE ((MODE)) > 4 \
427 && (REGNO) < 8 && (REGNO) + GET_MODE_SIZE ((MODE)) / 4 > 8 \
428 && (REGNO) % (GET_MODE_UNIT_SIZE ((MODE)) / 4) != 0)) \
430 ? TARGET_68881 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
431 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
432 : ((REGNO) < 56 ? TARGET_FPA : 0)))
434 #endif /* defined SUPPORT_SUN_FPA */
436 /* Value is 1 if it is a good idea to tie two pseudo registers
437 when one has mode MODE1 and one has mode MODE2.
438 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
439 for any hard reg, then this must be 0 for correct output. */
440 #define MODES_TIEABLE_P(MODE1, MODE2) \
442 || ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
443 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
444 == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
445 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT)))
447 /* Specify the registers used for certain standard purposes.
448 The values of these macros are register numbers. */
450 /* m68000 pc isn't overloaded on a register. */
451 /* #define PC_REGNUM */
453 /* Register to use for pushing function arguments. */
454 #define STACK_POINTER_REGNUM 15
456 /* Base register for access to local variables of the function. */
457 #define FRAME_POINTER_REGNUM 14
459 /* Value should be nonzero if functions must have frame pointers.
460 Zero means the frame pointer need not be set up (and parms
461 may be accessed via the stack pointer) in functions that seem suitable.
462 This is computed in `reload', in reload1.c. */
463 #define FRAME_POINTER_REQUIRED 0
465 /* Base register for access to arguments of the function. */
466 #define ARG_POINTER_REGNUM 14
468 /* Register in which static-chain is passed to a function. */
469 #define STATIC_CHAIN_REGNUM 8
471 /* Register in which address to store a structure value
472 is passed to a function. */
473 #define STRUCT_VALUE_REGNUM 9
475 /* Define the classes of registers for register constraints in the
476 machine description. Also define ranges of constants.
478 One of the classes must always be named ALL_REGS and include all hard regs.
479 If there is more than one class, another class must be named NO_REGS
480 and contain no registers.
482 The name GENERAL_REGS must be the name of a class (or an alias for
483 another name such as ALL_REGS). This is the class of registers
484 that is allowed by "g" or "r" in a register constraint.
485 Also, registers outside this class are allocated only when
486 instructions express preferences for them.
488 The classes must be numbered in nondecreasing order; that is,
489 a larger-numbered class must never be contained completely
490 in a smaller-numbered class.
492 For any two classes, it is very desirable that there be another
493 class that represents their union. */
495 /* The 68000 has three kinds of registers, so eight classes would be
496 a complete set. One of them is not needed. */
498 #ifndef SUPPORT_SUN_FPA
503 GENERAL_REGS
, DATA_OR_FP_REGS
,
504 ADDR_OR_FP_REGS
, ALL_REGS
,
507 #define N_REG_CLASSES (int) LIM_REG_CLASSES
509 /* Give names of register classes as strings for dump file. */
511 #define REG_CLASS_NAMES \
512 { "NO_REGS", "DATA_REGS", \
513 "ADDR_REGS", "FP_REGS", \
514 "GENERAL_REGS", "DATA_OR_FP_REGS", \
515 "ADDR_OR_FP_REGS", "ALL_REGS" }
517 /* Define which registers fit in which classes.
518 This is an initializer for a vector of HARD_REG_SET
519 of length N_REG_CLASSES. */
521 #define REG_CLASS_CONTENTS \
523 0x00000000, /* NO_REGS */ \
524 0x000000ff, /* DATA_REGS */ \
525 0x0000ff00, /* ADDR_REGS */ \
526 0x00ff0000, /* FP_REGS */ \
527 0x0000ffff, /* GENERAL_REGS */ \
528 0x00ff00ff, /* DATA_OR_FP_REGS */ \
529 0x00ffff00, /* ADDR_OR_FP_REGS */ \
530 0x00ffffff, /* ALL_REGS */ \
533 /* The same information, inverted:
534 Return the class number of the smallest class containing
535 reg number REGNO. This could be a conditional expression
536 or could index an array. */
538 #define REGNO_REG_CLASS(REGNO) (((REGNO)>>3)+1)
540 #else /* defined SUPPORT_SUN_FPA */
543 * Notes on final choices:
545 * 1) Didn't feel any need to union-ize LOW_FPA_REGS with anything
547 * 2) Removed all unions that involve address registers with
548 * floating point registers (left in unions of address and data with
550 * 3) Defined GENERAL_REGS as ADDR_OR_DATA_REGS.
551 * 4) Defined ALL_REGS as FPA_OR_FP_OR_GENERAL_REGS.
552 * 4) Left in everything else.
554 enum reg_class
{ NO_REGS
, LO_FPA_REGS
, FPA_REGS
, FP_REGS
,
555 FP_OR_FPA_REGS
, DATA_REGS
, DATA_OR_FPA_REGS
, DATA_OR_FP_REGS
,
556 DATA_OR_FP_OR_FPA_REGS
, ADDR_REGS
, GENERAL_REGS
,
557 GENERAL_OR_FPA_REGS
, GENERAL_OR_FP_REGS
, ALL_REGS
,
560 #define N_REG_CLASSES (int) LIM_REG_CLASSES
562 /* Give names of register classes as strings for dump file. */
564 #define REG_CLASS_NAMES \
565 { "NO_REGS", "LO_FPA_REGS", "FPA_REGS", "FP_REGS", \
566 "FP_OR_FPA_REGS", "DATA_REGS", "DATA_OR_FPA_REGS", "DATA_OR_FP_REGS", \
567 "DATA_OR_FP_OR_FPA_REGS", "ADDR_REGS", "GENERAL_REGS", \
568 "GENERAL_OR_FPA_REGS", "GENERAL_OR_FP_REGS", "ALL_REGS" }
570 /* Define which registers fit in which classes.
571 This is an initializer for a vector of HARD_REG_SET
572 of length N_REG_CLASSES. */
574 #define REG_CLASS_CONTENTS \
576 {0, 0}, /* NO_REGS */ \
577 {0xff000000, 0x000000ff}, /* LO_FPA_REGS */ \
578 {0xff000000, 0x00ffffff}, /* FPA_REGS */ \
579 {0x00ff0000, 0x00000000}, /* FP_REGS */ \
580 {0xffff0000, 0x00ffffff}, /* FP_OR_FPA_REGS */ \
581 {0x000000ff, 0x00000000}, /* DATA_REGS */ \
582 {0xff0000ff, 0x00ffffff}, /* DATA_OR_FPA_REGS */ \
583 {0x00ff00ff, 0x00000000}, /* DATA_OR_FP_REGS */ \
584 {0xffff00ff, 0x00ffffff}, /* DATA_OR_FP_OR_FPA_REGS */\
585 {0x0000ff00, 0x00000000}, /* ADDR_REGS */ \
586 {0x0000ffff, 0x00000000}, /* GENERAL_REGS */ \
587 {0xff00ffff, 0x00ffffff}, /* GENERAL_OR_FPA_REGS */\
588 {0x00ffffff, 0x00000000}, /* GENERAL_OR_FP_REGS */\
589 {0xffffffff, 0x00ffffff}, /* ALL_REGS */ \
592 /* The same information, inverted:
593 Return the class number of the smallest class containing
594 reg number REGNO. This could be a conditional expression
595 or could index an array. */
597 extern enum reg_class regno_reg_class
[];
598 #define REGNO_REG_CLASS(REGNO) (regno_reg_class[(REGNO)>>3])
600 #endif /* SUPPORT_SUN_FPA */
602 /* The class value for index registers, and the one for base regs. */
604 #define INDEX_REG_CLASS GENERAL_REGS
605 #define BASE_REG_CLASS ADDR_REGS
607 /* Get reg_class from a letter such as appears in the machine description.
608 We do a trick here to modify the effective constraints on the
609 machine description; we zorch the constraint letters that aren't
610 appropriate for a specific target. This allows us to guarantee
611 that a specific kind of register will not be used for a given target
612 without fiddling with the register classes above. */
614 #ifndef SUPPORT_SUN_FPA
616 #define REG_CLASS_FROM_LETTER(C) \
617 ((C) == 'a' ? ADDR_REGS : \
618 ((C) == 'd' ? DATA_REGS : \
619 ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \
623 #else /* defined SUPPORT_SUN_FPA */
625 #define REG_CLASS_FROM_LETTER(C) \
626 ((C) == 'a' ? ADDR_REGS : \
627 ((C) == 'd' ? DATA_REGS : \
628 ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \
630 ((C) == 'x' ? (TARGET_FPA ? FPA_REGS : \
632 ((C) == 'y' ? (TARGET_FPA ? LO_FPA_REGS : \
636 #endif /* defined SUPPORT_SUN_FPA */
638 /* The letters I, J, K, L and M in a register constraint string
639 can be used to stand for particular ranges of immediate operands.
640 This macro defines what the ranges are.
641 C is the letter, and VALUE is a constant value.
642 Return 1 if VALUE is in the range specified by C.
644 For the 68000, `I' is used for the range 1 to 8
645 allowed as immediate shift counts and in addq.
646 `J' is used for the range of signed numbers that fit in 16 bits.
647 `K' is for numbers that moveq can't handle.
648 `L' is for range -8 to -1, range of values that can be added with subq. */
650 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
651 ((C) == 'I' ? (VALUE) > 0 && (VALUE) <= 8 : \
652 (C) == 'J' ? (VALUE) >= -0x8000 && (VALUE) <= 0x7FFF : \
653 (C) == 'K' ? (VALUE) < -0x80 || (VALUE) >= 0x80 : \
654 (C) == 'L' ? (VALUE) < 0 && (VALUE) >= -8 : 0)
657 * A small bit of explanation:
658 * "G" defines all of the floating constants that are *NOT* 68881
659 * constants. this is so 68881 constants get reloaded and the
660 * fpmovecr is used. "H" defines *only* the class of constants that
661 * the fpa can use, because these can be gotten at in any fpa
662 * instruction and there is no need to force reloads.
664 #ifndef SUPPORT_SUN_FPA
665 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
666 ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : 0 )
667 #else /* defined SUPPORT_SUN_FPA */
668 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
669 ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : \
670 (C) == 'H' ? (TARGET_FPA && standard_sun_fpa_constant_p (VALUE)) : 0)
671 #endif /* defined SUPPORT_SUN_FPA */
673 /* Given an rtx X being reloaded into a reg required to be
674 in class CLASS, return the class of reg to actually use.
675 In general this is just CLASS; but on some machines
676 in some cases it is preferable to use a more restrictive class.
677 On the 68000 series, use a data reg if possible when the
678 value is a constant in the range where moveq could be used
679 and we ensure that QImodes are reloaded into data regs.
680 Also, if a floating constant needs reloading, put it in memory
683 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
684 ((GET_CODE (X) == CONST_INT \
685 && (unsigned) (INTVAL (X) + 0x80) < 0x100 \
686 && (CLASS) != ADDR_REGS) \
688 : (GET_MODE (X) == QImode && (CLASS) != ADDR_REGS) \
690 : (GET_CODE (X) == CONST_DOUBLE \
691 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
695 /* Return the maximum number of consecutive registers
696 needed to represent mode MODE in a register of class CLASS. */
697 /* On the 68000, this is the size of MODE in words,
698 except in the FP regs, where a single reg is always enough. */
699 #ifndef SUPPORT_SUN_FPA
701 #define CLASS_MAX_NREGS(CLASS, MODE) \
702 ((CLASS) == FP_REGS ? 1 \
703 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
705 /* Moves between fp regs and other regs are two insns. */
706 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
707 (((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \
708 || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \
711 #else /* defined SUPPORT_SUN_FPA */
713 #define CLASS_MAX_NREGS(CLASS, MODE) \
714 ((CLASS) == FP_REGS || (CLASS) == FPA_REGS || (CLASS) == LO_FPA_REGS ? 1 \
715 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
717 /* Moves between fp regs and other regs are two insns. */
718 /* Likewise for high fpa regs and other regs. */
719 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
720 ((((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \
721 || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \
722 || ((CLASS1) == FPA_REGS && (CLASS2) != FPA_REGS) \
723 || ((CLASS2) == FPA_REGS && (CLASS1) != FPA_REGS)) \
726 #endif /* define SUPPORT_SUN_FPA */
728 /* Stack layout; function entry, exit and calling. */
730 /* Define this if pushing a word on the stack
731 makes the stack pointer a smaller address. */
732 #define STACK_GROWS_DOWNWARD
734 /* Nonzero if we need to generate stack-probe insns.
735 On most systems they are not needed.
736 When they are needed, define this as the stack offset to probe at. */
739 /* Define this if the nominal address of the stack frame
740 is at the high-address end of the local variables;
741 that is, each additional local variable allocated
742 goes at a more negative offset in the frame. */
743 #define FRAME_GROWS_DOWNWARD
745 /* Offset within stack frame to start allocating local variables at.
746 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
747 first local allocated. Otherwise, it is the offset to the BEGINNING
748 of the first local allocated. */
749 #define STARTING_FRAME_OFFSET 0
751 /* If we generate an insn to push BYTES bytes,
752 this says how many the stack pointer really advances by.
753 On the 68000, sp@- in a byte insn really pushes a word. */
754 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1)
756 /* Offset of first parameter from the argument pointer register value. */
757 #define FIRST_PARM_OFFSET(FNDECL) 8
759 /* Value is the number of byte of arguments automatically
760 popped when returning from a subroutine call.
761 FUNTYPE is the data type of the function (as a tree),
762 or for a library call it is an identifier node for the subroutine name.
763 SIZE is the number of bytes of arguments passed on the stack.
765 On the 68000, the RTS insn cannot pop anything.
766 On the 68010, the RTD insn may be used to pop them if the number
767 of args is fixed, but if the number is variable then the caller
768 must pop them all. RTD can't be used for library calls now
769 because the library is compiled with the Unix compiler.
770 Use of RTD is a selectable option, since it is incompatible with
771 standard Unix calling sequences. If the option is not selected,
772 the caller must always pop the args. */
774 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \
775 ((TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \
776 && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
777 || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
778 == void_type_node))) \
781 /* Define how to find the value returned by a function.
782 VALTYPE is the data type of the value (as a tree).
783 If the precise function being called is known, FUNC is its FUNCTION_DECL;
784 otherwise, FUNC is 0. */
786 /* On the 68000 the return value is in D0 regardless. */
788 #define FUNCTION_VALUE(VALTYPE, FUNC) \
789 gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
791 /* Define how to find the value returned by a library function
792 assuming the value has mode MODE. */
794 /* On the 68000 the return value is in D0 regardless. */
796 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
798 /* 1 if N is a possible register number for a function value.
799 On the 68000, d0 is the only register thus used. */
801 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
803 /* Define this to be true when FUNCTION_VALUE_REGNO_P is true for
804 more than one register. */
806 #define NEEDS_UNTYPED_CALL 0
808 /* Define this if PCC uses the nonreentrant convention for returning
809 structure and union values. */
811 #define PCC_STATIC_STRUCT_RETURN
813 /* 1 if N is a possible register number for function argument passing.
814 On the 68000, no registers are used in this way. */
816 #define FUNCTION_ARG_REGNO_P(N) 0
818 /* Define a data type for recording info about an argument list
819 during the scan of that argument list. This data type should
820 hold all necessary information about the function itself
821 and about the args processed so far, enough to enable macros
822 such as FUNCTION_ARG to determine where the next arg should go.
824 On the m68k, this is a single integer, which is a number of bytes
825 of arguments scanned so far. */
827 #define CUMULATIVE_ARGS int
829 /* Initialize a variable CUM of type CUMULATIVE_ARGS
830 for a call to a function whose data type is FNTYPE.
831 For a library call, FNTYPE is 0.
833 On the m68k, the offset starts at 0. */
835 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
838 /* Update the data in CUM to advance over an argument
839 of mode MODE and data type TYPE.
840 (TYPE is null for libcalls where that information may not be available.) */
842 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
843 ((CUM) += ((MODE) != BLKmode \
844 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
845 : (int_size_in_bytes (TYPE) + 3) & ~3))
847 /* Define where to put the arguments to a function.
848 Value is zero to push the argument on the stack,
849 or a hard register in which to store the argument.
851 MODE is the argument's machine mode.
852 TYPE is the data type of the argument (as a tree).
853 This is null for libcalls where that information may
855 CUM is a variable of type CUMULATIVE_ARGS which gives info about
856 the preceding args and about the function being called.
857 NAMED is nonzero if this argument is a named parameter
858 (otherwise it is an extra parameter matching an ellipsis). */
860 /* On the 68000 all args are pushed, except if -mregparm is specified
861 then the first two words of arguments are passed in d0, d1.
862 *NOTE* -mregparm does not work.
863 It exists only to test register calling conventions. */
865 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
866 ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
868 /* For an arg passed partly in registers and partly in memory,
869 this is the number of registers used.
870 For args passed entirely in registers or entirely in memory, zero. */
872 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
873 ((TARGET_REGPARM && (CUM) < 8 \
874 && 8 < ((CUM) + ((MODE) == BLKmode \
875 ? int_size_in_bytes (TYPE) \
876 : GET_MODE_SIZE (MODE)))) \
879 /* Generate the assembly code for function entry. */
880 #define FUNCTION_PROLOGUE(FILE, SIZE) output_function_prologue(FILE, SIZE)
882 /* Output assembler code to FILE to increment profiler label # LABELNO
883 for profiling a function entry. */
885 #define FUNCTION_PROFILER(FILE, LABELNO) \
886 asm_fprintf (FILE, "\tlea %LLP%d,%Ra0\n\tjsr mcount\n", (LABELNO))
888 /* Output assembler code to FILE to initialize this source file's
889 basic block profiling info, if that has not already been done. */
891 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
892 asm_fprintf (FILE, "\ttstl %LLPBX0\n\tbne %LLPI%d\n\tpea %LLPBX0\n\tjsr %U__bb_init_func\n\taddql %I4,%Rsp\n%LLPI%d:\n", \
895 /* Output assembler code to FILE to increment the entry-count for
896 the BLOCKNO'th basic block in this source file. */
898 #define BLOCK_PROFILER(FILE, BLOCKNO) \
899 asm_fprintf (FILE, "\taddql %I1,%LLPBX2+%d\n", 4 * BLOCKNO)
901 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
902 the stack pointer does not matter. The value is tested only in
903 functions that have frame pointers.
904 No definition is equivalent to always zero. */
906 #define EXIT_IGNORE_STACK 1
908 /* Generate the assembly code for function exit. */
909 #define FUNCTION_EPILOGUE(FILE, SIZE) output_function_epilogue (FILE, SIZE)
911 /* This is a hook for other tm files to change. */
912 /* #define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE) */
914 /* Determine if the epilogue should be output as RTL.
915 You should override this if you define FUNCTION_EXTRA_EPILOGUE. */
916 #define USE_RETURN_INSN use_return_insn ()
918 /* Store in the variable DEPTH the initial difference between the
919 frame pointer reg contents and the stack pointer reg contents,
920 as of the start of the function body. This depends on the layout
921 of the fixed parts of the stack frame and on how registers are saved.
923 On the 68k, if we have a frame, we must add one word to its length
924 to allow for the place that a6 is stored when we do have a frame pointer.
925 Otherwise, we would need to compute the offset from the frame pointer
926 of a local variable as a function of frame_pointer_needed, which
929 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
932 for (regno = 16; regno < FIRST_PSEUDO_REGISTER; regno++) \
933 if (regs_ever_live[regno] && ! call_used_regs[regno]) \
935 for (regno = 0; regno < 16; regno++) \
936 if (regs_ever_live[regno] && ! call_used_regs[regno]) \
938 (DEPTH) = (offset + ((get_frame_size () + 3) & -4) \
939 + (get_frame_size () == 0 ? 0 : 4)); \
942 /* Output assembler code for a block containing the constant parts
943 of a trampoline, leaving space for the variable parts. */
945 /* On the 68k, the trampoline looks like this:
951 The reason for having three jsr insns is so that an entire line
952 of the instruction cache is filled in a predictable way
953 that will always be the same.
955 We always use the assembler label ___trampoline
956 regardless of whether the system adds underscores. */
958 #define TRAMPOLINE_TEMPLATE(FILE) \
960 ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x207c)); \
961 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
962 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
963 ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x4eb9)); \
964 ASM_OUTPUT_INT (FILE, gen_rtx (SYMBOL_REF, SImode, "*___trampoline"));\
965 ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x4eb9)); \
966 ASM_OUTPUT_INT (FILE, gen_rtx (SYMBOL_REF, SImode, "*___trampoline"));\
967 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
968 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
969 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
970 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
973 /* Length in units of the trampoline for entering a nested function. */
975 #define TRAMPOLINE_SIZE 26
977 /* Alignment required for a trampoline. 16 is used to find the
978 beginning of a line in the instruction cache. */
980 #define TRAMPOLINE_ALIGN 16
982 /* Emit RTL insns to initialize the variable parts of a trampoline.
983 FNADDR is an RTX for the address of the function's pure code.
984 CXT is an RTX for the static chain value for the function. */
986 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
988 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 2)), TRAMP); \
989 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 18)), CXT); \
990 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 22)), FNADDR); \
993 /* This is the library routine that is used
994 to transfer control from the trampoline
995 to the actual nested function. */
997 /* A colon is used with no explicit operands
998 to cause the template string to be scanned for %-constructs. */
999 /* The function name __transfer_from_trampoline is not actually used.
1000 The function definition just permits use of "asm with operands"
1001 (though the operand list is empty). */
1002 #define TRANSFER_FROM_TRAMPOLINE \
1004 __transfer_from_trampoline () \
1006 register char *a0 asm ("%a0"); \
1007 asm (GLOBAL_ASM_OP " ___trampoline"); \
1008 asm ("___trampoline:"); \
1009 asm volatile ("move%.l %0,%@" : : "m" (a0[22])); \
1010 asm volatile ("move%.l %1,%0" : "=a" (a0) : "m" (a0[18])); \
1014 /* Addressing modes, and classification of registers for them. */
1016 #define HAVE_POST_INCREMENT
1017 /* #define HAVE_POST_DECREMENT */
1019 #define HAVE_PRE_DECREMENT
1020 /* #define HAVE_PRE_INCREMENT */
1022 /* Macros to check register numbers against specific register classes. */
1024 /* These assume that REGNO is a hard or pseudo reg number.
1025 They give nonzero only if REGNO is a hard reg of the suitable class
1026 or a pseudo reg currently allocated to a suitable hard reg.
1027 Since they use reg_renumber, they are safe only once reg_renumber
1028 has been allocated, which happens in local-alloc.c. */
1030 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1031 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
1032 #define REGNO_OK_FOR_BASE_P(REGNO) \
1033 (((REGNO) ^ 010) < 8 || (unsigned) (reg_renumber[REGNO] ^ 010) < 8)
1034 #define REGNO_OK_FOR_DATA_P(REGNO) \
1035 ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
1036 #define REGNO_OK_FOR_FP_P(REGNO) \
1037 (((REGNO) ^ 020) < 8 || (unsigned) (reg_renumber[REGNO] ^ 020) < 8)
1038 #ifdef SUPPORT_SUN_FPA
1039 #define REGNO_OK_FOR_FPA_P(REGNO) \
1040 (((REGNO) >= 24 && (REGNO) < 56) || (reg_renumber[REGNO] >= 24 && reg_renumber[REGNO] < 56))
1043 /* Now macros that check whether X is a register and also,
1044 strictly, whether it is in a specified class.
1046 These macros are specific to the 68000, and may be used only
1047 in code for printing assembler insns and in conditions for
1048 define_optimization. */
1050 /* 1 if X is a data register. */
1052 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
1054 /* 1 if X is an fp register. */
1056 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1058 /* 1 if X is an address register */
1060 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
1062 #ifdef SUPPORT_SUN_FPA
1063 /* 1 if X is a register in the Sun FPA. */
1064 #define FPA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FPA_P (REGNO (X)))
1066 /* Answer must be no if we don't have an FPA. */
1067 #define FPA_REG_P(X) 0
1070 /* Maximum number of registers that can appear in a valid memory address. */
1072 #define MAX_REGS_PER_ADDRESS 2
1074 /* Recognize any constant value that is a valid address. */
1076 #define CONSTANT_ADDRESS_P(X) \
1077 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1078 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1079 || GET_CODE (X) == HIGH)
1081 /* Nonzero if the constant value X is a legitimate general operand.
1082 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1084 #define LEGITIMATE_CONSTANT_P(X) 1
1086 /* Nonzero if the constant value X is a legitimate general operand
1087 when generating PIC code. It is given that flag_pic is on and
1088 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1090 #define LEGITIMATE_PIC_OPERAND_P(X) \
1091 (! symbolic_operand (X, VOIDmode))
1093 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1094 and check its validity for a certain class.
1095 We have two alternate definitions for each of them.
1096 The usual definition accepts all pseudo regs; the other rejects
1097 them unless they have been allocated suitable hard regs.
1098 The symbol REG_OK_STRICT causes the latter definition to be used.
1100 Most source files want to accept pseudo regs in the hope that
1101 they will get allocated to the class that the insn wants them to be in.
1102 Source files for reload pass need to be strict.
1103 After reload, it makes no difference, since pseudo regs have
1104 been eliminated by then. */
1106 #ifndef REG_OK_STRICT
1108 /* Nonzero if X is a hard reg that can be used as an index
1109 or if it is a pseudo reg. */
1110 #define REG_OK_FOR_INDEX_P(X) ((REGNO (X) ^ 020) >= 8)
1111 /* Nonzero if X is a hard reg that can be used as a base reg
1112 or if it is a pseudo reg. */
1113 #define REG_OK_FOR_BASE_P(X) ((REGNO (X) & ~027) != 0)
1117 /* Nonzero if X is a hard reg that can be used as an index. */
1118 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1119 /* Nonzero if X is a hard reg that can be used as a base reg. */
1120 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1124 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1125 that is a valid memory address for an instruction.
1126 The MODE argument is the machine mode for the MEM expression
1127 that wants to use this address.
1129 When generating PIC, an address involving a SYMBOL_REF is legitimate
1130 if and only if it is the sum of pic_offset_table_rtx and the SYMBOL_REF.
1131 We use LEGITIMATE_PIC_OPERAND_P to throw out the illegitimate addresses,
1132 and we explicitly check for the sum of pic_offset_table_rtx and a SYMBOL_REF.
1134 Likewise for a LABEL_REF when generating PIC.
1136 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
1138 /* Allow SUBREG everywhere we allow REG. This results in better code. It
1139 also makes function inlining work when inline functions are called with
1140 arguments that are SUBREGs. */
1142 #define LEGITIMATE_BASE_REG_P(X) \
1143 ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1144 || (GET_CODE (X) == SUBREG \
1145 && GET_CODE (SUBREG_REG (X)) == REG \
1146 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
1148 #define INDIRECTABLE_1_ADDRESS_P(X) \
1149 ((CONSTANT_ADDRESS_P (X) && (!flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \
1150 || LEGITIMATE_BASE_REG_P (X) \
1151 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \
1152 && LEGITIMATE_BASE_REG_P (XEXP (X, 0))) \
1153 || (GET_CODE (X) == PLUS \
1154 && LEGITIMATE_BASE_REG_P (XEXP (X, 0)) \
1155 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1156 && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000) \
1157 || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \
1158 && flag_pic && GET_CODE (XEXP (X, 1)) == SYMBOL_REF) \
1159 || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \
1160 && flag_pic && GET_CODE (XEXP (X, 1)) == LABEL_REF)) \
1163 /* This should replace the last two (non-pic) lines
1164 except that Sun's assembler does not seem to handle such operands. */
1165 && (TARGET_68020
? CONSTANT_ADDRESS_P (XEXP (X
, 1)) \
1166 : (GET_CODE (XEXP (X
, 1)) == CONST_INT \
1167 && ((unsigned) INTVAL (XEXP (X
, 1)) + 0x8000) < 0x10000))))
1171 #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
1172 { if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; }
1174 /* Only labels on dispatch tables are valid for indexing from. */
1175 #define GO_IF_INDEXABLE_BASE(X, ADDR) \
1177 if (GET_CODE (X) == LABEL_REF \
1178 && (temp = next_nonnote_insn (XEXP (X, 0))) != 0 \
1179 && GET_CODE (temp) == JUMP_INSN \
1180 && (GET_CODE (PATTERN (temp)) == ADDR_VEC \
1181 || GET_CODE (PATTERN (temp)) == ADDR_DIFF_VEC)) \
1183 if (LEGITIMATE_BASE_REG_P (X)) goto ADDR; }
1185 #define GO_IF_INDEXING(X, ADDR) \
1186 { if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
1187 { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
1188 if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
1189 { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
1191 #define GO_IF_INDEXED_ADDRESS(X, ADDR) \
1192 { GO_IF_INDEXING (X, ADDR); \
1193 if (GET_CODE (X) == PLUS) \
1194 { if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1195 && (unsigned) INTVAL (XEXP (X, 1)) + 0x80 < 0x100) \
1196 { rtx go_temp = XEXP (X, 0); GO_IF_INDEXING (go_temp, ADDR); } \
1197 if (GET_CODE (XEXP (X, 0)) == CONST_INT \
1198 && (unsigned) INTVAL (XEXP (X, 0)) + 0x80 < 0x100) \
1199 { rtx go_temp = XEXP (X, 1); GO_IF_INDEXING (go_temp, ADDR); } } }
1201 #define LEGITIMATE_INDEX_REG_P(X) \
1202 ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
1203 || (GET_CODE (X) == SIGN_EXTEND \
1204 && GET_CODE (XEXP (X, 0)) == REG \
1205 && GET_MODE (XEXP (X, 0)) == HImode \
1206 && REG_OK_FOR_INDEX_P (XEXP (X, 0))) \
1207 || (GET_CODE (X) == SUBREG \
1208 && GET_CODE (SUBREG_REG (X)) == REG \
1209 && REG_OK_FOR_INDEX_P (SUBREG_REG (X))))
1211 #define LEGITIMATE_INDEX_P(X) \
1212 (LEGITIMATE_INDEX_REG_P (X) \
1213 || (TARGET_68020 && GET_CODE (X) == MULT \
1214 && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
1215 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1216 && (INTVAL (XEXP (X, 1)) == 2 \
1217 || INTVAL (XEXP (X, 1)) == 4 \
1218 || INTVAL (XEXP (X, 1)) == 8)))
1220 /* If pic, we accept INDEX+LABEL, which is what do_tablejump makes. */
1221 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1222 { GO_IF_NONINDEXED_ADDRESS (X, ADDR); \
1223 GO_IF_INDEXED_ADDRESS (X, ADDR); \
1224 if (flag_pic && MODE == CASE_VECTOR_MODE && GET_CODE (X) == PLUS \
1225 && LEGITIMATE_INDEX_P (XEXP (X, 0)) \
1226 && GET_CODE (XEXP (X, 1)) == LABEL_REF) \
1229 /* Don't call memory_address_noforce for the address to fetch
1230 the switch offset. This address is ok as it stands (see above),
1231 but memory_address_noforce would alter it. */
1232 #define PIC_CASE_VECTOR_ADDRESS(index) index
1234 /* Try machine-dependent ways of modifying an illegitimate address
1235 to be legitimate. If we find one, return the new, valid address.
1236 This macro is used in only one place: `memory_address' in explow.c.
1238 OLDX is the address as it was before break_out_memory_refs was called.
1239 In some cases it is useful to look at this to decide what needs to be done.
1241 MODE and WIN are passed so that this macro can use
1242 GO_IF_LEGITIMATE_ADDRESS.
1244 It is always safe for this macro to do nothing. It exists to recognize
1245 opportunities to optimize the output.
1247 For the 68000, we handle X+REG by loading X into a register R and
1248 using R+REG. R will go in an address reg and indexing will be used.
1249 However, if REG is a broken-out memory address or multiplication,
1250 nothing needs to be done because REG can certainly go in an address reg. */
1252 #define COPY_ONCE(Y) if (!copied) { Y = copy_rtx (Y); copied = ch = 1; }
1253 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1254 { register int ch = (X) != (OLDX); \
1255 if (GET_CODE (X) == PLUS) \
1257 if (GET_CODE (XEXP (X, 0)) == MULT) \
1258 { COPY_ONCE (X); XEXP (X, 0) = force_operand (XEXP (X, 0), 0);} \
1259 if (GET_CODE (XEXP (X, 1)) == MULT) \
1260 { COPY_ONCE (X); XEXP (X, 1) = force_operand (XEXP (X, 1), 0);} \
1261 if (ch && GET_CODE (XEXP (X, 1)) == REG \
1262 && GET_CODE (XEXP (X, 0)) == REG) \
1264 if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
1265 if (GET_CODE (XEXP (X, 0)) == REG \
1266 || (GET_CODE (XEXP (X, 0)) == SIGN_EXTEND \
1267 && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \
1268 && GET_MODE (XEXP (XEXP (X, 0), 0)) == HImode)) \
1269 { register rtx temp = gen_reg_rtx (Pmode); \
1270 register rtx val = force_operand (XEXP (X, 1), 0); \
1271 emit_move_insn (temp, val); \
1273 XEXP (X, 1) = temp; \
1275 else if (GET_CODE (XEXP (X, 1)) == REG \
1276 || (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND \
1277 && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \
1278 && GET_MODE (XEXP (XEXP (X, 1), 0)) == HImode)) \
1279 { register rtx temp = gen_reg_rtx (Pmode); \
1280 register rtx val = force_operand (XEXP (X, 0), 0); \
1281 emit_move_insn (temp, val); \
1283 XEXP (X, 0) = temp; \
1286 /* Go to LABEL if ADDR (a legitimate address expression)
1287 has an effect that depends on the machine mode it is used for.
1288 On the 68000, only predecrement and postincrement address depend thus
1289 (the amount of decrement or increment being the length of the operand). */
1291 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1292 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL
1294 /* Specify the machine mode that this machine uses
1295 for the index in the tablejump instruction. */
1296 #define CASE_VECTOR_MODE HImode
1298 /* Define this if the tablejump instruction expects the table
1299 to contain offsets from the address of the table.
1300 Do not define this if the table should contain absolute addresses. */
1301 #define CASE_VECTOR_PC_RELATIVE
1303 /* Specify the tree operation to be used to convert reals to integers. */
1304 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1306 /* This is the kind of divide that is easiest to do in the general case. */
1307 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1309 /* Define this as 1 if `char' should by default be signed; else as 0. */
1310 #define DEFAULT_SIGNED_CHAR 1
1312 /* Don't cse the address of the function being compiled. */
1313 #define NO_RECURSIVE_FUNCTION_CSE
1315 /* Max number of bytes we can move from memory to memory
1316 in one reasonably fast instruction. */
1319 /* Define this if zero-extension is slow (more than one real instruction). */
1320 #define SLOW_ZERO_EXTEND
1322 /* Nonzero if access to memory by bytes is slow and undesirable. */
1323 #define SLOW_BYTE_ACCESS 0
1325 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1326 is done just by pretending it is already truncated. */
1327 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1329 /* We assume that the store-condition-codes instructions store 0 for false
1330 and some other value for true. This is the value stored for true. */
1332 #define STORE_FLAG_VALUE -1
1334 /* When a prototype says `char' or `short', really pass an `int'. */
1335 #define PROMOTE_PROTOTYPES
1337 /* Specify the machine mode that pointers have.
1338 After generation of rtl, the compiler makes no further distinction
1339 between pointers and any other objects of this machine mode. */
1340 #define Pmode SImode
1342 /* A function address in a call instruction
1343 is a byte address (for indexing purposes)
1344 so give the MEM rtx a byte's mode. */
1345 #define FUNCTION_MODE QImode
1347 /* Compute the cost of computing a constant rtl expression RTX
1348 whose rtx-code is CODE. The body of this macro is a portion
1349 of a switch statement. If the code is computed here,
1350 return it with a return statement. Otherwise, break from the switch. */
1352 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1354 /* Constant zero is super cheap due to clr instruction. */ \
1355 if (RTX == const0_rtx) return 0; \
1356 /* Constants between -128 and 127 are cheap due to moveq */ \
1357 if (INTVAL (RTX) >= -128 && INTVAL (RTX) <= 127) return 1; \
1358 /* Constants between -136 and 254 are easily generated */ \
1359 /* by intelligent uses of moveq, add[q], and subq */ \
1360 if ((OUTER_CODE) == SET && INTVAL (RTX) >= -136 \
1361 && INTVAL (RTX) <= 254) return 2; \
1366 case CONST_DOUBLE: \
1369 /* Compute the cost of various arithmetic operations.
1370 These are vaguely right for a 68020. */
1371 /* The costs for long multiply have been adjusted to
1372 work properly in synth_mult on the 68020,
1373 relative to an average of the time for add and the time for shift,
1374 taking away a little more because sometimes move insns are needed. */
1375 #define MULL_COST (TARGET_68040 ? 5 : 13)
1376 #define MULW_COST (TARGET_68040 ? 3 : 8)
1378 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1380 /* An lea costs about three times as much as a simple add. */ \
1381 if (GET_MODE (X) == SImode \
1382 && GET_CODE (XEXP (X, 0)) == REG \
1383 && GET_CODE (XEXP (X, 1)) == MULT \
1384 && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \
1385 && GET_CODE (XEXP (XEXP (X, 1), 1)) == CONST_INT \
1386 && (INTVAL (XEXP (XEXP (X, 1), 1)) == 2 \
1387 || INTVAL (XEXP (XEXP (X, 1), 1)) == 4 \
1388 || INTVAL (XEXP (XEXP (X, 1), 1)) == 8)) \
1389 return COSTS_N_INSNS (3); /* lea an@(dx:l:i),am */ \
1395 /* A shift by a big integer takes an extra instruction. */ \
1396 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1397 && (INTVAL (XEXP (X, 1)) == 16)) \
1398 return COSTS_N_INSNS (2); /* clrw;swap */ \
1399 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1400 && !(INTVAL (XEXP (X, 1)) > 0 \
1401 && INTVAL (XEXP (X, 1)) <= 8)) \
1402 return COSTS_N_INSNS (3); /* lsr #i,dn */ \
1405 if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \
1406 return COSTS_N_INSNS (MULW_COST); \
1408 return COSTS_N_INSNS (MULL_COST); \
1413 if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \
1414 return COSTS_N_INSNS (27); /* div.w */ \
1415 return COSTS_N_INSNS (43); /* div.l */
1417 /* Tell final.c how to eliminate redundant test instructions. */
1419 /* Here we define machine-dependent flags and fields in cc_status
1420 (see `conditions.h'). */
1422 /* Set if the cc value is actually in the 68881, so a floating point
1423 conditional branch must be output. */
1424 #define CC_IN_68881 04000
1426 /* Store in cc_status the expressions that the condition codes will
1427 describe after execution of an instruction whose pattern is EXP.
1428 Do not alter them if the instruction would not alter the cc's. */
1430 /* On the 68000, all the insns to store in an address register fail to
1431 set the cc's. However, in some cases these instructions can make it
1432 possibly invalid to use the saved cc's. In those cases we clear out
1433 some or all of the saved cc's so they won't be used. */
1435 #define NOTICE_UPDATE_CC(EXP,INSN) notice_update_cc (EXP, INSN)
1437 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1438 { if (cc_prev_status.flags & CC_IN_68881) \
1440 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1444 /* Control the assembler format that we output. */
1446 /* Output at beginning of assembler file. */
1448 #define ASM_FILE_START(FILE) \
1449 fprintf (FILE, "#NO_APP\n");
1451 /* Output to assembler file text saying following lines
1452 may contain character constants, extra white space, comments, etc. */
1454 #define ASM_APP_ON "#APP\n"
1456 /* Output to assembler file text saying following lines
1457 no longer contain unusual constructs. */
1459 #define ASM_APP_OFF "#NO_APP\n"
1461 /* Output before read-only data. */
1463 #define TEXT_SECTION_ASM_OP ".text"
1465 /* Output before writable data. */
1467 #define DATA_SECTION_ASM_OP ".data"
1469 /* Here are four prefixes that are used by asm_fprintf to
1470 facilitate customization for alternate assembler syntaxes.
1471 Machines with no likelihood of an alternate syntax need not
1472 define these and need not use asm_fprintf. */
1474 /* The prefix for register names. Note that REGISTER_NAMES
1475 is supposed to include this prefix. */
1477 #define REGISTER_PREFIX ""
1479 /* The prefix for local labels. You should be able to define this as
1480 an empty string, or any arbitrary string (such as ".", ".L%", etc)
1481 without having to make any other changes to account for the specific
1482 definition. Note it is a string literal, not interpreted by printf
1485 #define LOCAL_LABEL_PREFIX ""
1487 /* The prefix to add to user-visible assembler symbols. */
1489 #define USER_LABEL_PREFIX "_"
1491 /* The prefix for immediate operands. */
1493 #define IMMEDIATE_PREFIX "#"
1495 /* How to refer to registers in assembler output.
1496 This sequence is indexed by compiler's hard-register-number (see above). */
1498 #ifndef SUPPORT_SUN_FPA
1500 #define REGISTER_NAMES \
1501 {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
1502 "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \
1503 "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7" }
1505 #else /* SUPPORTED_SUN_FPA */
1507 #define REGISTER_NAMES \
1508 {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
1509 "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \
1510 "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7", \
1511 "fpa0", "fpa1", "fpa2", "fpa3", "fpa4", "fpa5", "fpa6", "fpa7", \
1512 "fpa8", "fpa9", "fpa10", "fpa11", "fpa12", "fpa13", "fpa14", "fpa15", \
1513 "fpa16", "fpa17", "fpa18", "fpa19", "fpa20", "fpa21", "fpa22", "fpa23", \
1514 "fpa24", "fpa25", "fpa26", "fpa27", "fpa28", "fpa29", "fpa30", "fpa31" }
1516 #endif /* defined SUPPORT_SUN_FPA */
1518 /* How to renumber registers for dbx and gdb.
1519 On the Sun-3, the floating point registers have numbers
1520 18 to 25, not 16 to 23 as they do in the compiler. */
1522 #define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2)
1524 /* This is how to output the definition of a user-level label named NAME,
1525 such as the label on a static function or variable NAME. */
1527 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1528 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1530 /* This is how to output a command to make the user-level label named NAME
1531 defined for reference from other files. */
1533 #define GLOBAL_ASM_OP ".globl"
1534 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1535 do { fprintf (FILE, "%s ", GLOBAL_ASM_OP); \
1536 assemble_name (FILE, NAME); \
1537 fputs ("\n", FILE);} while (0)
1539 /* This is how to output a reference to a user-level label named NAME.
1540 `assemble_name' uses this. */
1542 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1543 asm_fprintf (FILE, "%0U%s", NAME)
1545 /* This is how to output an internal numbered label where
1546 PREFIX is the class of label and NUM is the number within the class. */
1548 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1549 asm_fprintf (FILE, "%0L%s%d:\n", PREFIX, NUM)
1551 /* This is how to store into the string LABEL
1552 the symbol_ref name of an internal numbered label where
1553 PREFIX is the class of label and NUM is the number within the class.
1554 This is suitable for output with `assemble_name'. */
1556 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1557 sprintf (LABEL, "*%s%s%d", LOCAL_LABEL_PREFIX, PREFIX, NUM)
1559 /* This is how to output a `long double' extended real constant. */
1561 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
1563 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
1564 if (sizeof (int) == sizeof (long)) \
1565 fprintf (FILE, "\t.long 0x%x,0x%x,0x%x\n", l[0], l[1], l[2]); \
1567 fprintf (FILE, "\t.long 0x%lx,0x%lx,0x%lx\n", l[0], l[1], l[2]); \
1570 /* This is how to output an assembler line defining a `double' constant. */
1572 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1573 do { char dstr[30]; \
1574 REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \
1575 fprintf (FILE, "\t.double 0r%s\n", dstr); \
1578 /* This is how to output an assembler line defining a `float' constant. */
1580 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1582 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1583 if (sizeof (int) == sizeof (long)) \
1584 fprintf (FILE, "\t.long 0x%x\n", l); \
1586 fprintf (FILE, "\t.long 0x%lx\n", l); \
1589 /* This is how to output an assembler line defining an `int' constant. */
1591 #define ASM_OUTPUT_INT(FILE,VALUE) \
1592 ( fprintf (FILE, "\t.long "), \
1593 output_addr_const (FILE, (VALUE)), \
1594 fprintf (FILE, "\n"))
1596 /* Likewise for `char' and `short' constants. */
1598 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1599 ( fprintf (FILE, "\t.word "), \
1600 output_addr_const (FILE, (VALUE)), \
1601 fprintf (FILE, "\n"))
1603 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1604 ( fprintf (FILE, "\t.byte "), \
1605 output_addr_const (FILE, (VALUE)), \
1606 fprintf (FILE, "\n"))
1608 /* This is how to output an assembler line for a numeric constant byte. */
1610 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1611 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1613 /* This is how to output an insn to push a register on the stack.
1614 It need not be very fast code. */
1616 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1617 asm_fprintf (FILE, "\tmovel %s,%Rsp@-\n", reg_names[REGNO])
1619 /* This is how to output an insn to pop a register from the stack.
1620 It need not be very fast code. */
1622 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1623 asm_fprintf (FILE, "\tmovel %Rsp@+,%s\n", reg_names[REGNO])
1625 /* This is how to output an element of a case-vector that is absolute.
1626 (The 68000 does not use such vectors,
1627 but we must define this macro anyway.) */
1629 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1630 asm_fprintf (FILE, "\t.long %LL%d\n", VALUE)
1632 /* This is how to output an element of a case-vector that is relative. */
1634 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1635 asm_fprintf (FILE, "\t.word %LL%d-%LL%d\n", VALUE, REL)
1637 /* This is how to output an assembler line
1638 that says to advance the location counter
1639 to a multiple of 2**LOG bytes. */
1641 /* We don't have a way to align to more than a two-byte boundary, so do the
1642 best we can and don't complain. */
1643 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1645 fprintf (FILE, "\t.even\n");
1647 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1648 fprintf (FILE, "\t.skip %u\n", (SIZE))
1650 /* This says how to output an assembler line
1651 to define a global common symbol. */
1653 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1654 ( fputs (".comm ", (FILE)), \
1655 assemble_name ((FILE), (NAME)), \
1656 fprintf ((FILE), ",%u\n", (ROUNDED)))
1658 /* This says how to output an assembler line
1659 to define a local common symbol. */
1661 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1662 ( fputs (".lcomm ", (FILE)), \
1663 assemble_name ((FILE), (NAME)), \
1664 fprintf ((FILE), ",%u\n", (ROUNDED)))
1666 /* Store in OUTPUT a string (made with alloca) containing
1667 an assembler-name for a local static variable named NAME.
1668 LABELNO is an integer which is different for each call. */
1670 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1671 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1672 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1674 /* Define the parentheses used to group arithmetic operations
1675 in assembler code. */
1677 #define ASM_OPEN_PAREN "("
1678 #define ASM_CLOSE_PAREN ")"
1680 /* Define results of standard character escape sequences. */
1681 #define TARGET_BELL 007
1682 #define TARGET_BS 010
1683 #define TARGET_TAB 011
1684 #define TARGET_NEWLINE 012
1685 #define TARGET_VT 013
1686 #define TARGET_FF 014
1687 #define TARGET_CR 015
1689 /* Output a float value (represented as a C double) as an immediate operand.
1690 This macro is a 68k-specific macro. */
1692 #define ASM_OUTPUT_FLOAT_OPERAND(CODE,FILE,VALUE) \
1697 REAL_VALUE_TO_DECIMAL (VALUE, "%.9g", dstr); \
1698 asm_fprintf ((FILE), "%I0r%s", dstr); \
1703 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1704 if (sizeof (int) == sizeof (long)) \
1705 asm_fprintf ((FILE), "%I0x%x", l); \
1707 asm_fprintf ((FILE), "%I0x%lx", l); \
1711 /* Output a double value (represented as a C double) as an immediate operand.
1712 This macro is a 68k-specific macro. */
1713 #define ASM_OUTPUT_DOUBLE_OPERAND(FILE,VALUE) \
1714 do { char dstr[30]; \
1715 REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \
1716 asm_fprintf (FILE, "%I0r%s", dstr); \
1719 /* Note, long double immediate operands are not actually
1720 generated by m68k.md. */
1721 #define ASM_OUTPUT_LONG_DOUBLE_OPERAND(FILE,VALUE) \
1722 do { char dstr[30]; \
1723 REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \
1724 asm_fprintf (FILE, "%I0r%s", dstr); \
1727 /* Print operand X (an rtx) in assembler syntax to file FILE.
1728 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1729 For `%' followed by punctuation, CODE is the punctuation and X is null.
1731 On the 68000, we use several CODE characters:
1732 '.' for dot needed in Motorola-style opcode names.
1733 '-' for an operand pushing on the stack:
1734 sp@-, -(sp) or -(%sp) depending on the style of syntax.
1735 '+' for an operand pushing on the stack:
1736 sp@+, (sp)+ or (%sp)+ depending on the style of syntax.
1737 '@' for a reference to the top word on the stack:
1738 sp@, (sp) or (%sp) depending on the style of syntax.
1739 '#' for an immediate operand prefix (# in MIT and Motorola syntax
1740 but & in SGS syntax).
1741 '!' for the fpcr register (used in some float-to-fixed conversions).
1742 '$' for the letter `s' in an op code, but only on the 68040.
1743 '&' for the letter `d' in an op code, but only on the 68040.
1744 '/' for register prefix needed by longlong.h.
1746 'b' for byte insn (no effect, on the Sun; this is for the ISI).
1747 'd' to force memory addressing to be absolute, not relative.
1748 'f' for float insn (print a CONST_DOUBLE as a float rather than in hex)
1749 'w' for FPA insn (print a CONST_DOUBLE as a SunFPA constant rather
1750 than directly). Second part of 'y' below.
1751 'x' for float insn (print a CONST_DOUBLE as a float rather than in hex),
1752 or print pair of registers as rx:ry.
1753 'y' for a FPA insn (print pair of registers as rx:ry). This also outputs
1754 CONST_DOUBLE's as SunFPA constant RAM registers if
1755 possible, so it should not be used except for the SunFPA. */
1757 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1758 ((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \
1759 || (CODE) == '+' || (CODE) == '@' || (CODE) == '!' \
1760 || (CODE) == '$' || (CODE) == '&' || (CODE) == '/')
1762 /* A C compound statement to output to stdio stream STREAM the
1763 assembler syntax for an instruction operand X. X is an RTL
1766 CODE is a value that can be used to specify one of several ways
1767 of printing the operand. It is used when identical operands
1768 must be printed differently depending on the context. CODE
1769 comes from the `%' specification that was used to request
1770 printing of the operand. If the specification was just `%DIGIT'
1771 then CODE is 0; if the specification was `%LTR DIGIT' then CODE
1772 is the ASCII code for LTR.
1774 If X is a register, this macro should print the register's name.
1775 The names can be found in an array `reg_names' whose type is
1776 `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'.
1778 When the machine description has a specification `%PUNCT' (a `%'
1779 followed by a punctuation character), this macro is called with
1780 a null pointer for X and the punctuation character for CODE.
1782 See m68k.c for the m68k specific codes. */
1784 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1786 /* A C compound statement to output to stdio stream STREAM the
1787 assembler syntax for an instruction operand that is a memory
1788 reference whose address is ADDR. ADDR is an RTL expression.
1790 On some machines, the syntax for a symbolic address depends on
1791 the section that the address refers to. On these machines,
1792 define the macro `ENCODE_SECTION_INFO' to store the information
1793 into the `symbol_ref', and then check for it here. */
1795 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1798 /* Definitions for generating bytecode */
1800 /* Just so it's known this target is supported by the bytecode generator.
1801 If this define isn't found anywhere in the target config files, then
1802 dummy stubs are supplied by bytecode.h, and any attempt to use
1803 -fbytecode will result in an error message. */
1805 #define TARGET_SUPPORTS_BYTECODE
1807 /* Minimal segment alignment within sections is 8 units. */
1808 #define MACHINE_SEG_ALIGN 3
1810 /* Integer alignment is two units. */
1813 /* Pointer alignment is eight units. */
1816 /* Global symbols begin with `_' */
1817 #define NAMES_HAVE_UNDERSCORES
1819 /* BC_xxx below are similar to their ASM_xxx counterparts above. */
1820 #define BC_GLOBALIZE_LABEL(FP, NAME) bc_globalize_label(NAME)
1822 #define BC_OUTPUT_COMMON(FP, NAME, SIZE, ROUNDED) \
1823 do { bc_emit_common(NAME, ROUNDED); bc_globalize_label(NAME); } while (0)
1825 #define BC_OUTPUT_LOCAL(FP, NAME, SIZE, ROUNDED) \
1826 bc_emit_common(NAME, ROUNDED)
1828 #define BC_OUTPUT_ALIGN(FP, ALIGN) bc_align(ALIGN)
1830 #define BC_OUTPUT_LABEL(FP, NAME) bc_emit_labeldef(NAME)
1832 #define BC_OUTPUT_SKIP(FP, SIZE) bc_emit_skip(SIZE)
1834 #define BC_OUTPUT_LABELREF(FP, NAME) \
1836 char *foo = (char *) xmalloc(strlen(NAME) + 2); \
1838 strcat(foo, NAME); \
1839 bc_emit_labelref (foo); \
1843 #define BC_OUTPUT_FLOAT(FP, VAL) \
1846 bc_emit ((char *) &F, sizeof F); \
1849 #define BC_OUTPUT_DOUBLE(FP, VAL) \
1852 bc_emit ((char *) &D, sizeof D); \
1855 #define BC_OUTPUT_BYTE(FP, VAL) \
1862 #define BC_OUTPUT_FILE ASM_OUTPUT_FILE
1863 #define BC_OUTPUT_ASCII ASM_OUTPUT_ASCII
1864 #define BC_OUTPUT_IDENT ASM_OUTPUT_IDENT
1866 /* Same as XSTR, but for bytecode */
1867 #define BCXSTR(RTX) ((RTX)->bc_label)
1870 /* Flush bytecode buffer onto file */
1871 #define BC_WRITE_FILE(FP) \
1873 fprintf (FP, ".text\n"); \
1874 bc_seg_write (bc_text_seg, FP); \
1875 fprintf(FP, "\n.data\n"); \
1876 bc_seg_write (bc_data_seg, FP); \
1877 bc_sym_write (FP); /* do .globl, .bss, etc. */ \
1880 /* Write one symbol */
1881 #define BC_WRITE_SEGSYM(SEGSYM, FP) \
1883 prsym (FP, (SEGSYM)->sym->name); \
1884 fprintf (FP, ":\n"); \
1888 /* Write one reloc entry */
1889 #define BC_WRITE_RELOC_ENTRY(SEGRELOC, FP, OFFSET) \
1891 fprintf (FP, "\t.long "); \
1892 prsym (FP, (SEGRELOC)->sym->name); \
1893 fprintf (FP, " + %d\n", OFFSET); \
1896 /* Start new line of bytecodes */
1897 #define BC_START_BYTECODE_LINE(FP) \
1899 fprintf (FP, "\t.byte"); \
1902 /* Write one bytecode */
1903 #define BC_WRITE_BYTECODE(SEP, VAL, FP) \
1905 fprintf (FP, "%c0x%02X", (SEP), (VAL) & 0xff); \
1908 /* Write one bytecode RTL entry */
1909 #define BC_WRITE_RTL(R, FP) \
1911 fprintf (FP, "%s+%d/0x%08X\n", (R)->label, (R)->offset, (R)->bc_label); \
1915 /* Emit function entry trampoline */
1916 #define BC_EMIT_TRAMPOLINE(TRAMPSEG, CALLINFO) \
1920 /* Push a reference to the callinfo structure. */ \
1921 insn = 0x4879; /* pea xxx.L */ \
1922 seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \
1923 seg_refsym (TRAMPSEG, CALLINFO, 0); \
1925 /* Call __interp, pop arguments, and return. */ \
1926 insn = 0x4eb9; /* jsr xxx.L */ \
1927 seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \
1928 seg_refsym (TRAMPSEG, "__callint", 0); \
1929 insn = 0x588f; /* addql #4, sp */ \
1930 seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \
1931 insn = 0x4e75; /* rts */ \
1932 seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \
1938 #define VALIDATE_STACK() if (stack_depth < 0) abort ();
1941 #define VALIDATE_STACK() \
1942 fprintf (stderr, " %%%d%%", stack_depth);
1946 /* Define functions defined in aux-output.c and used in templates. */
1948 extern char *output_move_double ();
1949 extern char *output_move_const_single ();
1950 extern char *output_move_const_double ();
1951 extern char *output_btst ();