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1 ;; Predicate definitions for LoongArch target.
2 ;; Copyright (C) 2021-2023 Free Software Foundation, Inc.
3 ;; Contributed by Loongson Ltd.
4 ;; Based on MIPS target for GNU compiler.
5 ;;
6 ;; This file is part of GCC.
7 ;;
8 ;; GCC is free software; you can redistribute it and/or modify
9 ;; it under the terms of the GNU General Public License as published by
10 ;; the Free Software Foundation; either version 3, or (at your option)
11 ;; any later version.
12 ;;
13 ;; GCC is distributed in the hope that it will be useful,
14 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
15 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 ;; GNU General Public License for more details.
17 ;;
18 ;; You should have received a copy of the GNU General Public License
19 ;; along with GCC; see the file COPYING3. If not see
20 ;; <http://www.gnu.org/licenses/>.
21
22 (define_predicate "const_uns_arith_operand"
23 (and (match_code "const_int")
24 (match_test "IMM12_OPERAND_UNSIGNED (INTVAL (op))")))
25
26 (define_predicate "uns_arith_operand"
27 (ior (match_operand 0 "const_uns_arith_operand")
28 (match_operand 0 "register_operand")))
29
30 (define_predicate "const_lu32i_operand"
31 (and (match_code "const_int")
32 (match_test "LU32I_OPERAND (INTVAL (op))")))
33
34 (define_predicate "const_lu52i_operand"
35 (and (match_code "const_int")
36 (match_test "LU52I_OPERAND (INTVAL (op))")))
37
38 (define_predicate "const_arith_operand"
39 (and (match_code "const_int")
40 (match_test "IMM12_OPERAND (INTVAL (op))")))
41
42 (define_predicate "const_dual_imm12_operand"
43 (and (match_code "const_int")
44 (match_test "DUAL_IMM12_OPERAND (INTVAL (op))")))
45
46 (define_predicate "const_imm16_operand"
47 (and (match_code "const_int")
48 (match_test "IMM16_OPERAND (INTVAL (op))")))
49
50 (define_predicate "const_addu16i_operand"
51 (and (match_code "const_int")
52 (match_test "ADDU16I_OPERAND (INTVAL (op))")))
53
54 (define_predicate "const_addu16i_imm12_di_operand"
55 (and (match_code "const_int")
56 (match_test "loongarch_addu16i_imm12_operand_p (INTVAL (op), DImode)")))
57
58 (define_predicate "const_addu16i_imm12_si_operand"
59 (and (match_code "const_int")
60 (match_test "loongarch_addu16i_imm12_operand_p (INTVAL (op), SImode)")))
61
62 (define_predicate "const_dual_addu16i_operand"
63 (and (match_code "const_int")
64 (match_test "DUAL_ADDU16I_OPERAND (INTVAL (op))")))
65
66 (define_predicate "arith_operand"
67 (ior (match_operand 0 "const_arith_operand")
68 (match_operand 0 "register_operand")))
69
70 (define_predicate "plus_di_operand"
71 (ior (match_operand 0 "arith_operand")
72 (match_operand 0 "const_dual_imm12_operand")
73 (match_operand 0 "const_addu16i_operand")
74 (match_operand 0 "const_addu16i_imm12_di_operand")
75 (match_operand 0 "const_dual_addu16i_operand")))
76
77 (define_predicate "plus_si_extend_operand"
78 (ior (match_operand 0 "arith_operand")
79 (match_operand 0 "const_dual_imm12_operand")
80 (match_operand 0 "const_addu16i_imm12_si_operand")))
81
82 (define_predicate "plus_si_operand"
83 (ior (match_operand 0 "plus_si_extend_operand")
84 (match_operand 0 "const_addu16i_operand")))
85
86 (define_predicate "const_immalsl_operand"
87 (and (match_code "const_int")
88 (match_test "IN_RANGE (INTVAL (op), 1, 4)")))
89
90 (define_predicate "const_lsx_branch_operand"
91 (and (match_code "const_int")
92 (match_test "IN_RANGE (INTVAL (op), -1024, 1023)")))
93
94 (define_predicate "const_uimm3_operand"
95 (and (match_code "const_int")
96 (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
97
98 (define_predicate "const_8_to_11_operand"
99 (and (match_code "const_int")
100 (match_test "IN_RANGE (INTVAL (op), 8, 11)")))
101
102 (define_predicate "const_12_to_15_operand"
103 (and (match_code "const_int")
104 (match_test "IN_RANGE (INTVAL (op), 12, 15)")))
105
106 (define_predicate "const_uimm4_operand"
107 (and (match_code "const_int")
108 (match_test "IN_RANGE (INTVAL (op), 0, 15)")))
109
110 (define_predicate "const_uimm5_operand"
111 (and (match_code "const_int")
112 (match_test "IN_RANGE (INTVAL (op), 0, 31)")))
113
114 (define_predicate "const_uimm6_operand"
115 (and (match_code "const_int")
116 (match_test "UIMM6_OPERAND (INTVAL (op))")))
117
118 (define_predicate "const_uimm7_operand"
119 (and (match_code "const_int")
120 (match_test "IN_RANGE (INTVAL (op), 0, 127)")))
121
122 (define_predicate "const_uimm8_operand"
123 (and (match_code "const_int")
124 (match_test "IN_RANGE (INTVAL (op), 0, 255)")))
125
126 (define_predicate "const_uimm14_operand"
127 (and (match_code "const_int")
128 (match_test "IN_RANGE (INTVAL (op), 0, 16383)")))
129
130 (define_predicate "const_uimm15_operand"
131 (and (match_code "const_int")
132 (match_test "IN_RANGE (INTVAL (op), 0, 32767)")))
133
134 (define_predicate "const_imm5_operand"
135 (and (match_code "const_int")
136 (match_test "IN_RANGE (INTVAL (op), -16, 15)")))
137
138 (define_predicate "const_imm10_operand"
139 (and (match_code "const_int")
140 (match_test "IMM10_OPERAND (INTVAL (op))")))
141
142 (define_predicate "const_imm12_operand"
143 (and (match_code "const_int")
144 (match_test "IMM12_OPERAND (INTVAL (op))")))
145
146 (define_predicate "const_imm13_operand"
147 (and (match_code "const_int")
148 (match_test "IMM13_OPERAND (INTVAL (op))")))
149
150 (define_predicate "reg_imm10_operand"
151 (ior (match_operand 0 "const_imm10_operand")
152 (match_operand 0 "register_operand")))
153
154 (define_predicate "aq8b_operand"
155 (and (match_code "const_int")
156 (match_test "loongarch_signed_immediate_p (INTVAL (op), 8, 0)")))
157
158 (define_predicate "aq8h_operand"
159 (and (match_code "const_int")
160 (match_test "loongarch_signed_immediate_p (INTVAL (op), 8, 1)")))
161
162 (define_predicate "aq8w_operand"
163 (and (match_code "const_int")
164 (match_test "loongarch_signed_immediate_p (INTVAL (op), 8, 2)")))
165
166 (define_predicate "aq8d_operand"
167 (and (match_code "const_int")
168 (match_test "loongarch_signed_immediate_p (INTVAL (op), 8, 3)")))
169
170 (define_predicate "aq10b_operand"
171 (and (match_code "const_int")
172 (match_test "loongarch_signed_immediate_p (INTVAL (op), 10, 0)")))
173
174 (define_predicate "aq10h_operand"
175 (and (match_code "const_int")
176 (match_test "loongarch_signed_immediate_p (INTVAL (op), 10, 1)")))
177
178 (define_predicate "aq10w_operand"
179 (and (match_code "const_int")
180 (match_test "loongarch_signed_immediate_p (INTVAL (op), 10, 2)")))
181
182 (define_predicate "aq10d_operand"
183 (and (match_code "const_int")
184 (match_test "loongarch_signed_immediate_p (INTVAL (op), 10, 3)")))
185
186 (define_predicate "aq12b_operand"
187 (and (match_code "const_int")
188 (match_test "loongarch_signed_immediate_p (INTVAL (op), 12, 0)")))
189
190 (define_predicate "aq12h_operand"
191 (and (match_code "const_int")
192 (match_test "loongarch_signed_immediate_p (INTVAL (op), 11, 1)")))
193
194 (define_predicate "aq12w_operand"
195 (and (match_code "const_int")
196 (match_test "loongarch_signed_immediate_p (INTVAL (op), 10, 2)")))
197
198 (define_predicate "aq12d_operand"
199 (and (match_code "const_int")
200 (match_test "loongarch_signed_immediate_p (INTVAL (op), 9, 3)")))
201
202 (define_predicate "sle_operand"
203 (and (match_code "const_int")
204 (match_test "IMM12_OPERAND (INTVAL (op) + 1)")))
205
206 (define_predicate "sleu_operand"
207 (and (match_operand 0 "sle_operand")
208 (match_test "INTVAL (op) + 1 != 0")))
209
210 (define_predicate "const_0_operand"
211 (and (match_code "const_int,const_wide_int,const_double,const_vector")
212 (match_test "op == CONST0_RTX (GET_MODE (op))")))
213
214 (define_predicate "const_m1_operand"
215 (and (match_code "const_int,const_wide_int,const_double,const_vector")
216 (match_test "op == CONSTM1_RTX (GET_MODE (op))")))
217
218 (define_predicate "reg_or_m1_operand"
219 (ior (match_operand 0 "const_m1_operand")
220 (match_operand 0 "register_operand")))
221
222 (define_predicate "reg_or_0_operand"
223 (ior (match_operand 0 "const_0_operand")
224 (match_operand 0 "register_operand")))
225
226 (define_predicate "const_1_operand"
227 (and (match_code "const_int,const_wide_int,const_double,const_vector")
228 (match_test "op == CONST1_RTX (GET_MODE (op))")))
229
230 (define_predicate "reg_or_1_operand"
231 (ior (match_operand 0 "const_1_operand")
232 (match_operand 0 "register_operand")))
233
234 ;; These are used in vec_merge, hence accept bitmask as const_int.
235 (define_predicate "const_exp_2_operand"
236 (and (match_code "const_int")
237 (match_test "IN_RANGE (exact_log2 (INTVAL (op)), 0, 1)")))
238
239 (define_predicate "const_exp_4_operand"
240 (and (match_code "const_int")
241 (match_test "IN_RANGE (exact_log2 (INTVAL (op)), 0, 3)")))
242
243 (define_predicate "const_exp_8_operand"
244 (and (match_code "const_int")
245 (match_test "IN_RANGE (exact_log2 (INTVAL (op)), 0, 7)")))
246
247 (define_predicate "const_exp_16_operand"
248 (and (match_code "const_int")
249 (match_test "IN_RANGE (exact_log2 (INTVAL (op)), 0, 15)")))
250
251 (define_predicate "const_exp_32_operand"
252 (and (match_code "const_int")
253 (match_test "IN_RANGE (exact_log2 (INTVAL (op)), 0, 31)")))
254
255 ;; This is used for indexing into vectors, and hence only accepts const_int.
256 (define_predicate "const_0_or_1_operand"
257 (and (match_code "const_int")
258 (match_test "IN_RANGE (INTVAL (op), 0, 1)")))
259
260 (define_predicate "const_0_to_3_operand"
261 (and (match_code "const_int")
262 (match_test "IN_RANGE (INTVAL (op), 0, 3)")))
263
264 (define_predicate "const_0_to_7_operand"
265 (and (match_code "const_int")
266 (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
267
268 (define_predicate "const_2_or_3_operand"
269 (and (match_code "const_int")
270 (match_test "IN_RANGE (INTVAL (op), 2, 3)")))
271
272 (define_predicate "const_4_to_7_operand"
273 (and (match_code "const_int")
274 (match_test "IN_RANGE (INTVAL (op), 4, 7)")))
275
276 (define_predicate "const_8_to_15_operand"
277 (and (match_code "const_int")
278 (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
279
280 (define_predicate "const_16_to_31_operand"
281 (and (match_code "const_int")
282 (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
283
284 (define_predicate "qi_mask_operand"
285 (and (match_code "const_int")
286 (match_test "UINTVAL (op) == 0xff")))
287
288 (define_predicate "hi_mask_operand"
289 (and (match_code "const_int")
290 (match_test "UINTVAL (op) == 0xffff")))
291
292 (define_predicate "lu52i_mask_operand"
293 (and (match_code "const_int")
294 (match_test "UINTVAL (op) == 0xfffffffffffff")))
295
296 (define_predicate "si_mask_operand"
297 (and (match_code "const_int")
298 (match_test "UINTVAL (op) == 0xffffffff")))
299
300 (define_predicate "low_bitmask_operand"
301 (and (match_code "const_int")
302 (match_test "low_bitmask_len (mode, INTVAL (op)) > 12")))
303
304 (define_predicate "d_operand"
305 (and (match_code "reg")
306 (match_test "GP_REG_P (REGNO (op))")))
307
308 (define_predicate "db4_operand"
309 (and (match_code "const_int")
310 (match_test "loongarch_unsigned_immediate_p (INTVAL (op) + 1, 4, 0)")))
311
312 (define_predicate "db7_operand"
313 (and (match_code "const_int")
314 (match_test "loongarch_unsigned_immediate_p (INTVAL (op) + 1, 7, 0)")))
315
316 (define_predicate "db8_operand"
317 (and (match_code "const_int")
318 (match_test "loongarch_unsigned_immediate_p (INTVAL (op) + 1, 8, 0)")))
319
320 (define_predicate "ib3_operand"
321 (and (match_code "const_int")
322 (match_test "loongarch_unsigned_immediate_p (INTVAL (op) - 1, 3, 0)")))
323
324 (define_predicate "sb4_operand"
325 (and (match_code "const_int")
326 (match_test "loongarch_signed_immediate_p (INTVAL (op), 4, 0)")))
327
328 (define_predicate "sb5_operand"
329 (and (match_code "const_int")
330 (match_test "loongarch_signed_immediate_p (INTVAL (op), 5, 0)")))
331
332 (define_predicate "sb8_operand"
333 (and (match_code "const_int")
334 (match_test "loongarch_signed_immediate_p (INTVAL (op), 8, 0)")))
335
336 (define_predicate "sd8_operand"
337 (and (match_code "const_int")
338 (match_test "loongarch_signed_immediate_p (INTVAL (op), 8, 3)")))
339
340 (define_predicate "ub4_operand"
341 (and (match_code "const_int")
342 (match_test "loongarch_unsigned_immediate_p (INTVAL (op), 4, 0)")))
343
344 (define_predicate "ub8_operand"
345 (and (match_code "const_int")
346 (match_test "loongarch_unsigned_immediate_p (INTVAL (op), 8, 0)")))
347
348 (define_predicate "uh4_operand"
349 (and (match_code "const_int")
350 (match_test "loongarch_unsigned_immediate_p (INTVAL (op), 4, 1)")))
351
352 (define_predicate "uw4_operand"
353 (and (match_code "const_int")
354 (match_test "loongarch_unsigned_immediate_p (INTVAL (op), 4, 2)")))
355
356 (define_predicate "uw5_operand"
357 (and (match_code "const_int")
358 (match_test "loongarch_unsigned_immediate_p (INTVAL (op), 5, 2)")))
359
360 (define_predicate "uw6_operand"
361 (and (match_code "const_int")
362 (match_test "loongarch_unsigned_immediate_p (INTVAL (op), 6, 2)")))
363
364 (define_predicate "uw8_operand"
365 (and (match_code "const_int")
366 (match_test "loongarch_unsigned_immediate_p (INTVAL (op), 8, 2)")))
367
368 (define_predicate "addiur2_operand"
369 (and (match_code "const_int")
370 (ior (match_test "INTVAL (op) == -1")
371 (match_test "INTVAL (op) == 1")
372 (match_test "INTVAL (op) == 4")
373 (match_test "INTVAL (op) == 8")
374 (match_test "INTVAL (op) == 12")
375 (match_test "INTVAL (op) == 16")
376 (match_test "INTVAL (op) == 20")
377 (match_test "INTVAL (op) == 24"))))
378
379 (define_predicate "addiusp_operand"
380 (and (match_code "const_int")
381 (ior (match_test "(IN_RANGE (INTVAL (op), 2, 257))")
382 (match_test "(IN_RANGE (INTVAL (op), -258, -3))"))))
383
384 (define_predicate "andi16_operand"
385 (and (match_code "const_int")
386 (ior (match_test "IN_RANGE (INTVAL (op), 1, 4)")
387 (match_test "IN_RANGE (INTVAL (op), 7, 8)")
388 (match_test "IN_RANGE (INTVAL (op), 15, 16)")
389 (match_test "IN_RANGE (INTVAL (op), 31, 32)")
390 (match_test "IN_RANGE (INTVAL (op), 63, 64)")
391 (match_test "INTVAL (op) == 255")
392 (match_test "INTVAL (op) == 32768")
393 (match_test "INTVAL (op) == 65535"))))
394
395 (define_predicate "movep_src_register"
396 (and (match_code "reg")
397 (ior (match_test ("IN_RANGE (REGNO (op), 2, 3)"))
398 (match_test ("IN_RANGE (REGNO (op), 16, 20)")))))
399
400 (define_predicate "movep_src_operand"
401 (ior (match_operand 0 "const_0_operand")
402 (match_operand 0 "movep_src_register")))
403
404 (define_predicate "fcc_reload_operand"
405 (and (match_code "reg,subreg")
406 (match_test "FCC_REG_P (true_regnum (op))")))
407
408 (define_predicate "muldiv_target_operand"
409 (match_operand 0 "register_operand"))
410
411 (define_predicate "const_call_insn_operand"
412 (match_code "const,symbol_ref,label_ref")
413 {
414 /* Split symbol to high and low if return false.
415 If defined TARGET_CMODEL_EXTREME, all symbol would be splited,
416 else if offset is not zero, the symbol would be splited. */
417
418 enum loongarch_symbol_type symbol_type;
419 loongarch_symbolic_constant_p (op, &symbol_type);
420
421 rtx offset, x = op;
422 split_const (x, &x, &offset);
423
424 if (offset != const0_rtx)
425 return false;
426
427 /* When compiling with '-mcmodel=medium -mexplicit-relocs'
428 symbols are splited in loongarch_legitimize_call_address.
429
430 When compiling with '-mcmodel=medium -mno-explicit-relocs',
431 first obtain the symbolic address or the address of the
432 plt entry, and then perform an indirect jump, so return false. */
433
434 switch (symbol_type)
435 {
436 case SYMBOL_PCREL:
437 if (TARGET_CMODEL_EXTREME
438 || (TARGET_CMODEL_MEDIUM && !TARGET_EXPLICIT_RELOCS))
439 return false;
440 else
441 return 1;
442
443 case SYMBOL_GOT_DISP:
444 if (TARGET_CMODEL_EXTREME
445 || !flag_plt
446 || (flag_plt && TARGET_CMODEL_MEDIUM
447 && !TARGET_EXPLICIT_RELOCS))
448 return false;
449 else
450 return 1;
451
452 default:
453 return false;
454 }
455 })
456
457 (define_predicate "call_insn_operand"
458 (ior (match_operand 0 "const_call_insn_operand")
459 (match_operand 0 "register_operand")))
460
461 (define_predicate "is_const_call_local_symbol"
462 (and (match_operand 0 "const_call_insn_operand")
463 (ior (match_test "loongarch_global_symbol_p (op) == 0")
464 (match_test "loongarch_symbol_binds_local_p (op) != 0"))
465 (match_test "CONSTANT_P (op)")))
466
467 (define_predicate "is_const_call_no_local_symbol"
468 (and (match_operand 0 "const_call_insn_operand")
469 (ior (match_test "loongarch_global_symbol_p (op) != 0")
470 (match_test "loongarch_symbol_binds_local_p (op) == 0")
471 (match_test "loongarch_weak_symbol_p (op) != 0"))
472 (match_test "CONSTANT_P (op)")))
473
474 ;; A legitimate CONST_INT operand that takes more than one instruction
475 ;; to load.
476 (define_predicate "splittable_const_int_operand"
477 (match_code "const_int")
478 {
479 /* Don't handle multi-word moves this way; we don't want to introduce
480 the individual word-mode moves until after reload. */
481 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD)
482 return false;
483
484 /* Otherwise check whether the constant can be loaded in a single
485 instruction. */
486 return !LU12I_INT (op) && !IMM12_INT (op) && !IMM12_INT_UNSIGNED (op)
487 && !LU52I_INT (op);
488 })
489
490 (define_predicate "move_operand"
491 (match_operand 0 "general_operand")
492 {
493 enum loongarch_symbol_type symbol_type;
494
495 /* The thinking here is as follows:
496
497 (1) The move expanders should split complex load sequences into
498 individual instructions. Those individual instructions can
499 then be optimized by all rtl passes.
500
501 (2) The target of pre-reload load sequences should not be used
502 to store temporary results. If the target register is only
503 assigned one value, reload can rematerialize that value
504 on demand, rather than spill it to the stack.
505
506 (3) If we allowed pre-reload passes like combine and cse to recreate
507 complex load sequences, we would want to be able to split the
508 sequences before reload as well, so that the pre-reload scheduler
509 can see the individual instructions. This falls foul of (2);
510 the splitter would be forced to reuse the target register for
511 intermediate results.
512
513 (4) We want to define complex load splitters for combine. These
514 splitters can request a temporary scratch register, which avoids
515 the problem in (2). They allow things like:
516
517 (set (reg T1) (high SYM))
518 (set (reg T2) (low (reg T1) SYM))
519 (set (reg X) (plus (reg T2) (const_int OFFSET)))
520
521 to be combined into:
522
523 (set (reg T3) (high SYM+OFFSET))
524 (set (reg X) (lo_sum (reg T3) SYM+OFFSET))
525
526 if T2 is only used this once. */
527 switch (GET_CODE (op))
528 {
529 case CONST_INT:
530 return true;
531
532 case CONST:
533 case SYMBOL_REF:
534 case LABEL_REF:
535 return (loongarch_symbolic_constant_p (op, &symbol_type)
536 && (!TARGET_EXPLICIT_RELOCS
537 || !loongarch_split_symbol_type (symbol_type)));
538
539 case HIGH:
540 /* '-mno-explicit-relocs' don't generate high/low pairs. */
541 if (!TARGET_EXPLICIT_RELOCS)
542 return false;
543
544 op = XEXP (op, 0);
545 return (loongarch_symbolic_constant_p (op, &symbol_type)
546 && loongarch_split_symbol_type (symbol_type));
547
548 default:
549 return true;
550 }
551 })
552
553 (define_predicate "symbolic_operand"
554 (match_code "const,symbol_ref,label_ref")
555 {
556 enum loongarch_symbol_type type;
557 return loongarch_symbolic_constant_p (op, &type);
558 })
559
560 (define_predicate "equality_operator"
561 (match_code "eq,ne"))
562
563 (define_predicate "order_operator"
564 (match_code "lt,ltu,le,leu,ge,geu,gt,gtu"))
565
566 ;; For NE, cstore uses sltu instructions in which the first operand is $0.
567
568 (define_predicate "loongarch_cstore_operator"
569 (match_code "ne,eq,gt,gtu,ge,geu,lt,ltu,le,leu"))
570
571 (define_predicate "small_data_pattern"
572 (and (match_code "set,parallel,unspec,unspec_volatile,prefetch")
573 (match_test "loongarch_small_data_pattern_p (op)")))
574
575 ;; Return 1 if the operand is in non-volatile memory.
576 (define_predicate "non_volatile_mem_operand"
577 (and (match_operand 0 "memory_operand")
578 (not (match_test "MEM_VOLATILE_P (op)"))))
579
580 (define_predicate "const_vector_same_val_operand"
581 (match_code "const_vector")
582 {
583 return loongarch_const_vector_same_val_p (op, mode);
584 })
585
586 (define_predicate "const_vector_same_simm5_operand"
587 (match_code "const_vector")
588 {
589 return loongarch_const_vector_same_int_p (op, mode, -16, 15);
590 })
591
592 (define_predicate "const_vector_same_uimm5_operand"
593 (match_code "const_vector")
594 {
595 return loongarch_const_vector_same_int_p (op, mode, 0, 31);
596 })
597
598 (define_predicate "const_vector_same_ximm5_operand"
599 (match_code "const_vector")
600 {
601 return loongarch_const_vector_same_int_p (op, mode, -31, 31);
602 })
603
604 (define_predicate "const_vector_same_uimm6_operand"
605 (match_code "const_vector")
606 {
607 return loongarch_const_vector_same_int_p (op, mode, 0, 63);
608 })
609
610 (define_predicate "par_const_vector_shf_set_operand"
611 (match_code "parallel")
612 {
613 return loongarch_const_vector_shuffle_set_p (op, mode);
614 })
615
616 (define_predicate "reg_or_vector_same_val_operand"
617 (ior (match_operand 0 "register_operand")
618 (match_operand 0 "const_vector_same_val_operand")))
619
620 (define_predicate "reg_or_vector_same_simm5_operand"
621 (ior (match_operand 0 "register_operand")
622 (match_operand 0 "const_vector_same_simm5_operand")))
623
624 (define_predicate "reg_or_vector_same_uimm5_operand"
625 (ior (match_operand 0 "register_operand")
626 (match_operand 0 "const_vector_same_uimm5_operand")))
627
628 (define_predicate "reg_or_vector_same_ximm5_operand"
629 (ior (match_operand 0 "register_operand")
630 (match_operand 0 "const_vector_same_ximm5_operand")))
631
632 (define_predicate "reg_or_vector_same_uimm6_operand"
633 (ior (match_operand 0 "register_operand")
634 (match_operand 0 "const_vector_same_uimm6_operand")))
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