gcc/config/iq2000/iq2000.h

   1 /* Definitions of target machine for GNU compiler.
   2    Vitesse IQ2000 processors
   3    Copyright (C) 2003 Free Software Foundation, Inc.
   4
   5    This file is part of GCC.
   6
   7    GCC is free software; you can redistribute it and/or modify it
   8    under the terms of the GNU General Public License as published
   9    by the Free Software Foundation; either version 2, or (at your
  10    option) any later version.
  11
  12    GCC is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with GCC; see the file COPYING.  If not, write to the Free
  19    Software Foundation, 59 Temple Place - Suite 330, Boston, MA
  20    02111-1307, USA.  */
  21
  22 /* Driver configuration.  */
  23
  24 #undef SWITCH_TAKES_ARG
  25 #define SWITCH_TAKES_ARG(CHAR)                                          \
  26   (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
  27
  28 /* The svr4.h LIB_SPEC with -leval and --*group tacked on */
  29 #undef  LIB_SPEC
  30 #define LIB_SPEC "%{!shared:%{!symbolic:--start-group -lc -leval -lgcc --end-group}}"
  31
  32 #undef STARTFILE_SPEC
  33 #undef ENDFILE_SPEC
  34
  35 \f
  36 /* Run-time target specifications.  */
  37
  38 #define TARGET_CPU_CPP_BUILTINS()               \
  39   do                                            \
  40     {                                           \
  41      builtin_define ("__iq2000__"); \
  42      builtin_assert ("cpu=iq2000"); \
  43      builtin_assert ("machine=iq2000"); \
  44     }                                           \
  45   while (0)
  46
  47
  48 extern int      target_flags;
  49
  50 #define MASK_GPOPT         0x00000008   /* Optimize for global pointer */
  51 #define MASK_EMBEDDED_DATA 0x00008000   /* Reduce RAM usage, not fast code */
  52 #define MASK_UNINIT_CONST_IN_RODATA \
  53                            0x00800000   /* Store uninitialized
  54                                            consts in rodata */
  55
  56 /* Macros used in the machine description to test the flags.  */
  57
  58 #define TARGET_STATS            0
  59
  60                                         /* for embedded systems, optimize for
  61                                            reduced RAM space instead of for
  62                                            fastest code.  */
  63 #define TARGET_EMBEDDED_DATA    (target_flags & MASK_EMBEDDED_DATA)
  64
  65 #define TARGET_DEBUG_MODE       (target_flags & 0)
  66 #define TARGET_DEBUG_A_MODE     (target_flags & 0)
  67 #define TARGET_DEBUG_B_MODE     (target_flags & 0)
  68 #define TARGET_DEBUG_C_MODE     (target_flags & 0)
  69 #define TARGET_DEBUG_D_MODE     (target_flags & 0)
  70
  71 #define TARGET_SWITCHES                                                 \
  72 {                                                                       \
  73   {"no-crt0",          0,                                               \
  74      N_("No default crt0.o") },                                         \
  75   {"gpopt",               MASK_GPOPT,                                   \
  76      N_("Use GP relative sdata/sbss sections")},                        \
  77   {"no-gpopt",           -MASK_GPOPT,                                   \
  78      N_("Don't use GP relative sdata/sbss sections")},                  \
  79   {"embedded-data",       MASK_EMBEDDED_DATA,                           \
  80      N_("Use ROM instead of RAM")},                                     \
  81   {"no-embedded-data",   -MASK_EMBEDDED_DATA,                           \
  82      N_("Don't use ROM instead of RAM")},                               \
  83   {"uninit-const-in-rodata", MASK_UNINIT_CONST_IN_RODATA,               \
  84      N_("Put uninitialized constants in ROM (needs -membedded-data)")}, \
  85   {"no-uninit-const-in-rodata", -MASK_UNINIT_CONST_IN_RODATA,           \
  86      N_("Don't put uninitialized constants in ROM")},                   \
  87   {"",                    (TARGET_DEFAULT                               \
  88                            | TARGET_CPU_DEFAULT),                       \
  89      NULL},                                                             \
  90 }
  91
  92 /* Default target_flags if no switches are specified.  */
  93
  94 #define TARGET_DEFAULT 0
  95
  96 #ifndef TARGET_CPU_DEFAULT
  97 #define TARGET_CPU_DEFAULT 0
  98 #endif
  99
 100 #ifndef IQ2000_ISA_DEFAULT
 101 #define IQ2000_ISA_DEFAULT 1
 102 #endif
 103
 104 #define TARGET_OPTIONS                                                  \
 105 {                                                                       \
 106   SUBTARGET_TARGET_OPTIONS                                              \
 107   { "cpu=",     & iq2000_cpu_string,                                    \
 108       N_("Specify CPU for scheduling purposes")},                       \
 109   { "arch=",    & iq2000_arch_string,                                   \
 110       N_("Specify CPU for code generation purposes")},                  \
 111 }
 112
 113 /* This is meant to be redefined in the host dependent files.  */
 114 #define SUBTARGET_TARGET_OPTIONS
 115
 116 #define IQ2000_VERSION "[1.0]"
 117
 118 #ifndef MACHINE_TYPE
 119 #define MACHINE_TYPE "IQ2000"
 120 #endif
 121
 122 #ifndef TARGET_VERSION_INTERNAL
 123 #define TARGET_VERSION_INTERNAL(STREAM)                                 \
 124   fprintf (STREAM, " %s %s", IQ2000_VERSION, MACHINE_TYPE)
 125 #endif
 126
 127 #ifndef TARGET_VERSION
 128 #define TARGET_VERSION TARGET_VERSION_INTERNAL (stderr)
 129 #endif
 130
 131 #define OVERRIDE_OPTIONS override_options ()
 132
 133 #define CAN_DEBUG_WITHOUT_FP
 134 \f
 135 /* Storage Layout.  */
 136
 137 #define BITS_BIG_ENDIAN 0
 138
 139 #define BYTES_BIG_ENDIAN 1
 140
 141 #define WORDS_BIG_ENDIAN 1
 142
 143 #define LIBGCC2_WORDS_BIG_ENDIAN 1
 144
 145 #define BITS_PER_UNIT 8
 146
 147 #define BITS_PER_WORD 32
 148
 149 #define MAX_BITS_PER_WORD 64
 150
 151 #define UNITS_PER_WORD 4
 152
 153 #define MIN_UNITS_PER_WORD 4
 154
 155 #define POINTER_SIZE 32
 156
 157 /* Define this macro if it is advisable to hold scalars in registers
 158    in a wider mode than that declared by the program.  In such cases,
 159    the value is constrained to be within the bounds of the declared
 160    type, but kept valid in the wider mode.  The signedness of the
 161    extension may differ from that of the type.
 162
 163    We promote any value smaller than SImode up to SImode.  */
 164
 165 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)     \
 166   if (GET_MODE_CLASS (MODE) == MODE_INT         \
 167       && GET_MODE_SIZE (MODE) < 4)              \
 168     (MODE) = SImode;
 169
 170 #define PROMOTE_FUNCTION_ARGS
 171
 172 #define PROMOTE_FUNCTION_RETURN
 173
 174 #define PARM_BOUNDARY 32
 175
 176 #define STACK_BOUNDARY 64
 177
 178 #define FUNCTION_BOUNDARY 32
 179
 180 #define BIGGEST_ALIGNMENT 64
 181
 182 #undef DATA_ALIGNMENT
 183 #define DATA_ALIGNMENT(TYPE, ALIGN)                                     \
 184   ((((ALIGN) < BITS_PER_WORD)                                           \
 185     && (TREE_CODE (TYPE) == ARRAY_TYPE                                  \
 186         || TREE_CODE (TYPE) == UNION_TYPE                               \
 187         || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
 188
 189 #define CONSTANT_ALIGNMENT(EXP, ALIGN)                                  \
 190   ((TREE_CODE (EXP) == STRING_CST  || TREE_CODE (EXP) == CONSTRUCTOR)   \
 191    && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
 192
 193 #define EMPTY_FIELD_BOUNDARY 32
 194
 195 #define STRUCTURE_SIZE_BOUNDARY 8
 196
 197 #define STRICT_ALIGNMENT 1
 198
 199 #define PCC_BITFIELD_TYPE_MATTERS 1
 200
 201 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
 202
 203 \f
 204 /* Layout of Source Language Data Types.  */
 205
 206 #define INT_TYPE_SIZE 32
 207
 208 #define MAX_INT_TYPE_SIZE 32
 209
 210 #define SHORT_TYPE_SIZE 16
 211
 212 #define LONG_TYPE_SIZE 32
 213
 214 #define LONG_LONG_TYPE_SIZE 64
 215
 216 #define CHAR_TYPE_SIZE BITS_PER_UNIT
 217
 218 #define FLOAT_TYPE_SIZE 32
 219
 220 #define DOUBLE_TYPE_SIZE 64
 221
 222 #define LONG_DOUBLE_TYPE_SIZE 64
 223
 224 #define DEFAULT_SIGNED_CHAR 1
 225
 226 #define MAX_WCHAR_TYPE_SIZE MAX_INT_TYPE_SIZE
 227
 228 \f
 229 /* Register Basics.  */
 230
 231 /* On the IQ2000, we have 32 integer registers.  */
 232 #define FIRST_PSEUDO_REGISTER 33
 233
 234 #define FIXED_REGISTERS                                                 \
 235 {                                                                       \
 236   1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,                       \
 237   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 1                     \
 238 }
 239
 240 #define CALL_USED_REGISTERS                                             \
 241 {                                                                       \
 242   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,                       \
 243   0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 1                     \
 244 }
 245
 246 \f
 247 /* Order of allocation of registers.  */
 248
 249 #define REG_ALLOC_ORDER                                                 \
 250 {  0,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, 12, 13, 14, 15,       \
 251   16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31        \
 252 }
 253
 254 \f
 255 /* How Values Fit in Registers.  */
 256
 257 #define HARD_REGNO_NREGS(REGNO, MODE)   \
 258   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 259
 260 #define HARD_REGNO_MODE_OK(REGNO, MODE)                                 \
 261  ((REGNO_REG_CLASS (REGNO) == GR_REGS)                                  \
 262   ? ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) <= 4                     \
 263   : ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) == 4)
 264
 265 #define MODES_TIEABLE_P(MODE1, MODE2)                                   \
 266   ((GET_MODE_CLASS (MODE1) == MODE_FLOAT ||                             \
 267     GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT)                       \
 268    == (GET_MODE_CLASS (MODE2) == MODE_FLOAT ||                          \
 269        GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
 270
 271 #define AVOID_CCMODE_COPIES
 272
 273 \f
 274 /* Register Classes.  */
 275
 276 enum reg_class
 277 {
 278   NO_REGS,                      /* no registers in set */
 279   GR_REGS,                      /* integer registers */
 280   ALL_REGS,                     /* all registers */
 281   LIM_REG_CLASSES               /* max value + 1 */
 282 };
 283
 284 #define GENERAL_REGS GR_REGS
 285
 286 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 287
 288 #define REG_CLASS_NAMES                                                 \
 289 {                                                                       \
 290   "NO_REGS",                                                            \
 291   "GR_REGS",                                                            \
 292   "ALL_REGS"                                                            \
 293 }
 294
 295 #define REG_CLASS_CONTENTS                                              \
 296 {                                                                       \
 297   { 0x00000000, 0x00000000 },   /* no registers */      \
 298   { 0xffffffff, 0x00000000 },   /* integer registers */ \
 299   { 0xffffffff, 0x00000001 }    /* all registers */     \
 300 }
 301
 302 #define REGNO_REG_CLASS(REGNO) \
 303 ((REGNO) <= GP_REG_LAST + 1 ? GR_REGS : NO_REGS)
 304
 305 #define BASE_REG_CLASS  (GR_REGS)
 306
 307 #define INDEX_REG_CLASS NO_REGS
 308
 309 #define REG_CLASS_FROM_LETTER(C) \
 310   ((C) == 'd' ? GR_REGS : \
 311    (C) == 'b' ? ALL_REGS : \
 312    (C) == 'y' ? GR_REGS : \
 313    NO_REGS)
 314
 315 #define REGNO_OK_FOR_INDEX_P(regno)     0
 316
 317 #define PREFERRED_RELOAD_CLASS(X,CLASS)                                 \
 318   ((CLASS) != ALL_REGS                                                  \
 319    ? (CLASS)                                                            \
 320    : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT                      \
 321        || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT)          \
 322       ? (GR_REGS)                               \
 323       : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_INT                     \
 324           || GET_MODE (X) == VOIDmode)                                  \
 325          ? (GR_REGS)                            \
 326          : (CLASS))))
 327
 328 #define SMALL_REGISTER_CLASSES 0
 329
 330 #define CLASS_MAX_NREGS(CLASS, MODE)    \
 331   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 332
 333 /* For IQ2000:
 334
 335    `I'  is used for the range of constants an arithmetic insn can
 336         actually contain (16 bits signed integers).
 337
 338    `J'  is used for the range which is just zero (ie, $r0).
 339
 340    `K'  is used for the range of constants a logical insn can actually
 341         contain (16 bit zero-extended integers).
 342
 343    `L'  is used for the range of constants that be loaded with lui
 344         (ie, the bottom 16 bits are zero).
 345
 346    `M'  is used for the range of constants that take two words to load
 347         (ie, not matched by `I', `K', and `L').
 348
 349    `N'  is used for constants 0xffffnnnn or 0xnnnnffff
 350
 351    `O'  is a 5 bit zero-extended integer.
 352 */
 353
 354 #define CONST_OK_FOR_LETTER_P(VALUE, C)                                 \
 355   ((C) == 'I' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000) \
 356    : (C) == 'J' ? ((VALUE) == 0)                                        \
 357    : (C) == 'K' ? ((unsigned HOST_WIDE_INT) (VALUE) < 0x10000)          \
 358    : (C) == 'L' ? (((VALUE) & 0x0000ffff) == 0                          \
 359                    && (((VALUE) & ~2147483647) == 0                     \
 360                        || ((VALUE) & ~2147483647) == ~2147483647))      \
 361    : (C) == 'M' ? ((((VALUE) & ~0x0000ffff) != 0)                       \
 362                    && (((VALUE) & ~0x0000ffff) != ~0x0000ffff)          \
 363                    && (((VALUE) & 0x0000ffff) != 0                      \
 364                        || (((VALUE) & ~2147483647) != 0                 \
 365                            && ((VALUE) & ~2147483647) != ~2147483647))) \
 366    : (C) == 'N' ? ((((VALUE) & 0xffff) == 0xffff)                       \
 367                    || (((VALUE) & 0xffff0000) == 0xffff0000))           \
 368    : (C) == 'O' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x20) < 0x40)    \
 369    : 0)
 370
 371 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)                          \
 372   ((C) == 'G'                                                           \
 373    && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))
 374
 375 /* `R' is for memory references which take 1 word for the instruction.  */
 376
 377 #define EXTRA_CONSTRAINT(OP,CODE)                                       \
 378   (((CODE) == 'R')        ? simple_memory_operand (OP, GET_MODE (OP))   \
 379    : FALSE)
 380
 381 \f
 382 /* Basic Stack Layout.  */
 383
 384 #define STACK_GROWS_DOWNWARD
 385
 386 /* #define FRAME_GROWS_DOWNWARD */
 387
 388 #define STARTING_FRAME_OFFSET                                           \
 389   (current_function_outgoing_args_size)
 390
 391 /* Use the default value zero.  */
 392 /* #define STACK_POINTER_OFFSET 0 */
 393
 394 #define FIRST_PARM_OFFSET(FNDECL) 0
 395
 396 /* The return address for the current frame is in r31 if this is a leaf
 397    function.  Otherwise, it is on the stack.  It is at a variable offset
 398    from sp/fp/ap, so we define a fake hard register rap which is a
 399    pointer to the return address on the stack.  This always gets eliminated
 400    during reload to be either the frame pointer or the stack pointer plus
 401    an offset.  */
 402
 403 #define RETURN_ADDR_RTX(count, frame)                                   \
 404   (((count) == 0)                                                       \
 405    ? (leaf_function_p ()                                                \
 406       ? gen_rtx_REG (Pmode, GP_REG_FIRST + 31)                          \
 407       : gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode,                         \
 408                                          RETURN_ADDRESS_POINTER_REGNUM))) \
 409     : (rtx) 0)
 410
 411 /* Before the prologue, RA lives in r31.  */
 412 #define INCOMING_RETURN_ADDR_RTX  gen_rtx_REG (VOIDmode, GP_REG_FIRST + 31)
 413
 414 \f
 415 /* Register That Address the Stack Frame.  */
 416
 417 #define STACK_POINTER_REGNUM (GP_REG_FIRST + 29)
 418
 419 #define FRAME_POINTER_REGNUM (GP_REG_FIRST + 1)
 420
 421 #define HARD_FRAME_POINTER_REGNUM \
 422   (GP_REG_FIRST + 27)
 423
 424 #define ARG_POINTER_REGNUM GP_REG_FIRST
 425
 426 #define RETURN_ADDRESS_POINTER_REGNUM RAP_REG_NUM
 427
 428 #define STATIC_CHAIN_REGNUM (GP_REG_FIRST + 2)
 429
 430 \f
 431 /* Eliminating the Frame Pointer and the Arg Pointer.  */
 432
 433 #define FRAME_POINTER_REQUIRED 0
 434
 435 #define ELIMINABLE_REGS                                                 \
 436 {{ ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM},                         \
 437  { ARG_POINTER_REGNUM,   HARD_FRAME_POINTER_REGNUM},                    \
 438  { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM},                \
 439  { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},           \
 440  { RETURN_ADDRESS_POINTER_REGNUM, GP_REG_FIRST + 31},                   \
 441  { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},                         \
 442  { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
 443
 444
 445 /* We can always eliminate to the frame pointer.  We can eliminate to the
 446    stack pointer unless a frame pointer is needed.  */
 447
 448 #define CAN_ELIMINATE(FROM, TO)                                         \
 449   (((FROM) == RETURN_ADDRESS_POINTER_REGNUM && (! leaf_function_p ()    \
 450    || (TO == GP_REG_FIRST + 31 && leaf_function_p)))                    \
 451   || ((FROM) != RETURN_ADDRESS_POINTER_REGNUM                           \
 452    && ((TO) == HARD_FRAME_POINTER_REGNUM                                \
 453    || ((TO) == STACK_POINTER_REGNUM && ! frame_pointer_needed))))
 454
 455 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                     \
 456         (OFFSET) = iq2000_initial_elimination_offset ((FROM), (TO))
 457 \f
 458 /* Passing Function Arguments on the Stack.  */
 459
 460 #define PROMOTE_PROTOTYPES 1
 461
 462 /* #define PUSH_ROUNDING(BYTES) 0 */
 463
 464 #define ACCUMULATE_OUTGOING_ARGS 1
 465
 466 #define REG_PARM_STACK_SPACE(FNDECL) 0
 467
 468 #define OUTGOING_REG_PARM_STACK_SPACE
 469
 470 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
 471
 472 \f
 473 /* Function Arguments in Registers.  */
 474
 475 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
 476   function_arg( &CUM, MODE, TYPE, NAMED)
 477
 478 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
 479   function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
 480
 481 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED)          \
 482   function_arg_pass_by_reference (&CUM, MODE, TYPE, NAMED)
 483
 484 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED)              \
 485   ((NAMED) && FUNCTION_ARG_PASS_BY_REFERENCE (CUM, MODE, TYPE, NAMED))
 486
 487 #define MAX_ARGS_IN_REGISTERS 8
 488
 489 typedef struct iq2000_args {
 490   int gp_reg_found;             /* whether a gp register was found yet */
 491   unsigned int arg_number;      /* argument number */
 492   unsigned int arg_words;       /* # total words the arguments take */
 493   unsigned int fp_arg_words;    /* # words for FP args (IQ2000_EABI only) */
 494   int last_arg_fp;              /* nonzero if last arg was FP (EABI only) */
 495   int fp_code;                  /* Mode of FP arguments */
 496   unsigned int num_adjusts;     /* number of adjustments made */
 497                                 /* Adjustments made to args pass in regs.  */
 498   struct rtx_def *adjust[MAX_ARGS_IN_REGISTERS*2];
 499 } CUMULATIVE_ARGS;
 500
 501 /* Initialize a variable CUM of type CUMULATIVE_ARGS
 502    for a call to a function whose data type is FNTYPE.
 503    For a library call, FNTYPE is 0.  */
 504 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT)               \
 505   init_cumulative_args (&CUM, FNTYPE, LIBNAME)                          \
 506
 507 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)                    \
 508   function_arg_advance (&CUM, MODE, TYPE, NAMED)
 509
 510 #define FUNCTION_ARG_PADDING(MODE, TYPE)                                \
 511   (! BYTES_BIG_ENDIAN                                                   \
 512    ? upward                                                             \
 513    : (((MODE) == BLKmode                                                \
 514        ? ((TYPE) && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST         \
 515           && int_size_in_bytes (TYPE) < (PARM_BOUNDARY / BITS_PER_UNIT))\
 516        : (GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY                       \
 517           && (GET_MODE_CLASS (MODE) == MODE_INT)))                      \
 518       ? downward : upward))
 519
 520 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE)                               \
 521   (((TYPE) != 0)                                                        \
 522         ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY)                          \
 523                 ? PARM_BOUNDARY                                         \
 524                 : TYPE_ALIGN(TYPE))                                     \
 525         : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY)                  \
 526                 ? PARM_BOUNDARY                                         \
 527                 : GET_MODE_ALIGNMENT(MODE)))
 528
 529 #define FUNCTION_ARG_REGNO_P(N)                                         \
 530   (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST))
 531
 532 \f
 533 /* How Scalar Function Values are Returned.  */
 534
 535 #define FUNCTION_VALUE(VALTYPE, FUNC)   iq2000_function_value (VALTYPE, FUNC)
 536
 537 #define LIBCALL_VALUE(MODE)                                             \
 538   gen_rtx (REG,                                                         \
 539            ((GET_MODE_CLASS (MODE) != MODE_INT                          \
 540              || GET_MODE_SIZE (MODE) >= 4)                              \
 541             ? (MODE)                                                    \
 542             : SImode),                                                  \
 543            GP_RETURN)
 544
 545 /* On the IQ2000, R2 and R3 are the only register thus used.  */
 546
 547 #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN)
 548
 549 \f
 550 /* How Large Values are Returned.  */
 551
 552 #define RETURN_IN_MEMORY(TYPE)                                           \
 553   (((int_size_in_bytes (TYPE)                                            \
 554        > (2 * UNITS_PER_WORD))                                           \
 555       || (int_size_in_bytes (TYPE) == -1)))
 556
 557 #define DEFAULT_PCC_STRUCT_RETURN 0
 558
 559 #define STRUCT_VALUE 0
 560
 561 \f
 562 /* Function Entry and Exit.  */
 563
 564 #define EXIT_IGNORE_STACK 1
 565
 566 \f
 567 /* Generating Code for Profiling.  */
 568
 569 #define FUNCTION_PROFILER(FILE, LABELNO)                                \
 570 {                                                                       \
 571   fprintf (FILE, "\t.set\tnoreorder\n");                                \
 572   fprintf (FILE, "\t.set\tnoat\n");                                     \
 573   fprintf (FILE, "\tmove\t%s,%s\t\t# save current return address\n",    \
 574            reg_names[GP_REG_FIRST + 1], reg_names[GP_REG_FIRST + 31]);  \
 575   fprintf (FILE, "\tjal\t_mcount\n");                                   \
 576   fprintf (FILE,                                                        \
 577            "\t%s\t%s,%s,%d\t\t# _mcount pops 2 words from  stack\n",    \
 578            "subu",                                                      \
 579            reg_names[STACK_POINTER_REGNUM],                             \
 580            reg_names[STACK_POINTER_REGNUM],                             \
 581            Pmode == DImode ? 16 : 8);                                   \
 582   fprintf (FILE, "\t.set\treorder\n");                                  \
 583   fprintf (FILE, "\t.set\tat\n");                                       \
 584 }
 585
 586 \f
 587 /* Implementing the Varargs Macros.  */
 588
 589 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL)       \
 590   iq2000_setup_incoming_varargs (CUM,MODE,TYPE,&PRETEND_SIZE,NO_RTL);
 591
 592 #define STRICT_ARGUMENT_NAMING  1
 593
 594 #define BUILD_VA_LIST_TYPE(VALIST) \
 595   (VALIST) = ptr_type_node
 596
 597 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
 598   iq2000_va_start (valist, nextarg)
 599
 600 /* Implement `va_arg'.  */
 601 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
 602   iq2000_va_arg (valist, type)
 603
 604 \f
 605 /* Trampolines for Nested Functions.  */
 606
 607 /* A C statement to output, on the stream FILE, assembler code for a
 608    block of data that contains the constant parts of a trampoline.
 609    This code should not include a label--the label is taken care of
 610    automatically.  */
 611
 612 #define TRAMPOLINE_TEMPLATE(STREAM)                                      \
 613 {                                                                        \
 614   fprintf (STREAM, "\t.word\t0x03e00821\t\t# move   $1,$31\n");         \
 615   fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n");         \
 616   fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n");                   \
 617   if (Pmode == DImode)                                                  \
 618     {                                                                   \
 619       fprintf (STREAM, "\t.word\t0xdfe30014\t\t# ld     $3,20($31)\n"); \
 620       fprintf (STREAM, "\t.word\t0xdfe2001c\t\t# ld     $2,28($31)\n"); \
 621     }                                                                   \
 622   else                                                                  \
 623     {                                                                   \
 624       fprintf (STREAM, "\t.word\t0x8fe30014\t\t# lw     $3,20($31)\n"); \
 625       fprintf (STREAM, "\t.word\t0x8fe20018\t\t# lw     $2,24($31)\n"); \
 626     }                                                                   \
 627   fprintf (STREAM, "\t.word\t0x0060c821\t\t# move   $25,$3 (abicalls)\n"); \
 628   fprintf (STREAM, "\t.word\t0x00600008\t\t# jr     $3\n");             \
 629   fprintf (STREAM, "\t.word\t0x0020f821\t\t# move   $31,$1\n");         \
 630   fprintf (STREAM, "\t.word\t0x00000000\t\t# <function address>\n"); \
 631   fprintf (STREAM, "\t.word\t0x00000000\t\t# <static chain value>\n"); \
 632 }
 633
 634 #define TRAMPOLINE_SIZE (40)
 635
 636 #define TRAMPOLINE_ALIGNMENT 32
 637
 638 #define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN)                            \
 639 {                                                                           \
 640   rtx addr = ADDR;                                                          \
 641     emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 32)), FUNC); \
 642     emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 36)), CHAIN);\
 643 }
 644
 645 \f
 646 /* Implicit Calls to Library Routines.  */
 647
 648 #define INIT_TARGET_OPTABS                                              \
 649 do                                                                      \
 650   {                                                                     \
 651     INIT_SUBTARGET_OPTABS;                                              \
 652   }                                                                     \
 653 while (0)
 654
 655 \f
 656 /* Addressing Modes.  */
 657
 658 #define CONSTANT_ADDRESS_P(X)                                           \
 659   ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF             \
 660     || GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH                \
 661     || (GET_CODE (X) == CONST)))
 662
 663 #define MAX_REGS_PER_ADDRESS 1
 664
 665 #ifdef REG_OK_STRICT
 666 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
 667 {                                               \
 668   if (iq2000_legitimate_address_p (MODE, X, 1)) \
 669     goto ADDR;                                  \
 670 }
 671 #else
 672 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
 673 {                                               \
 674   if (iq2000_legitimate_address_p (MODE, X, 0)) \
 675     goto ADDR;                                  \
 676 }
 677 #endif
 678
 679 #define REG_OK_FOR_INDEX_P(X) 0
 680
 681
 682 /* For the IQ2000, transform:
 683
 684         memory(X + <large int>)
 685    into:
 686         Y = <large int> & ~0x7fff;
 687         Z = X + Y
 688         memory (Z + (<large int> & 0x7fff));
 689 */
 690
 691 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)                             \
 692 {                                                                       \
 693   register rtx xinsn = (X);                                             \
 694                                                                         \
 695   if (TARGET_DEBUG_B_MODE)                                              \
 696     {                                                                   \
 697       GO_PRINTF ("\n========== LEGITIMIZE_ADDRESS\n");                  \
 698       GO_DEBUG_RTX (xinsn);                                             \
 699     }                                                                   \
 700                                                                         \
 701   if (iq2000_check_split (X, MODE))             \
 702     {                                                                   \
 703       X = gen_rtx_LO_SUM (Pmode,                                        \
 704                           copy_to_mode_reg (Pmode,                      \
 705                                             gen_rtx (HIGH, Pmode, X)),  \
 706                           X);                                           \
 707       goto WIN;                                                         \
 708     }                                                                   \
 709                                                                         \
 710   if (GET_CODE (xinsn) == PLUS)                                         \
 711     {                                                                   \
 712       register rtx xplus0 = XEXP (xinsn, 0);                            \
 713       register rtx xplus1 = XEXP (xinsn, 1);                            \
 714       register enum rtx_code code0 = GET_CODE (xplus0);                 \
 715       register enum rtx_code code1 = GET_CODE (xplus1);                 \
 716                                                                         \
 717       if (code0 != REG && code1 == REG)                                 \
 718         {                                                               \
 719           xplus0 = XEXP (xinsn, 1);                                     \
 720           xplus1 = XEXP (xinsn, 0);                                     \
 721           code0 = GET_CODE (xplus0);                                    \
 722           code1 = GET_CODE (xplus1);                                    \
 723         }                                                               \
 724                                                                         \
 725       if (code0 == REG && REG_MODE_OK_FOR_BASE_P (xplus0, MODE)         \
 726           && code1 == CONST_INT && !SMALL_INT (xplus1))                 \
 727         {                                                               \
 728           rtx int_reg = gen_reg_rtx (Pmode);                            \
 729           rtx ptr_reg = gen_reg_rtx (Pmode);                            \
 730                                                                         \
 731           emit_move_insn (int_reg,                                      \
 732                           GEN_INT (INTVAL (xplus1) & ~ 0x7fff));        \
 733                                                                         \
 734           emit_insn (gen_rtx_SET (VOIDmode,                             \
 735                                   ptr_reg,                              \
 736                                   gen_rtx_PLUS (Pmode, xplus0, int_reg))); \
 737                                                                         \
 738           X = plus_constant (ptr_reg, INTVAL (xplus1) & 0x7fff);        \
 739           goto WIN;                                                     \
 740         }                                                               \
 741     }                                                                   \
 742                                                                         \
 743   if (TARGET_DEBUG_B_MODE)                                              \
 744     GO_PRINTF ("LEGITIMIZE_ADDRESS could not fix.\n");                  \
 745 }
 746
 747 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
 748
 749 #define LEGITIMATE_CONSTANT_P(X) (1)
 750
 751 \f
 752 /* Describing Relative Costs of Operations.  */
 753
 754 #define CONST_COSTS(X,CODE,OUTER_CODE)                                  \
 755   case CONST_INT:                                                       \
 756     return 0;                                                           \
 757                                                                         \
 758   case LABEL_REF:                                                       \
 759     return COSTS_N_INSNS (2);                                           \
 760                                                                         \
 761   case CONST:                                                           \
 762     {                                                                   \
 763       rtx offset = const0_rtx;                                          \
 764       rtx symref = eliminate_constant_term (XEXP (X, 0), &offset);      \
 765                                                                         \
 766       if (GET_CODE (symref) == LABEL_REF)                               \
 767         return COSTS_N_INSNS (2);                                       \
 768                                                                         \
 769       if (GET_CODE (symref) != SYMBOL_REF)                              \
 770         return COSTS_N_INSNS (4);                                       \
 771                                                                         \
 772       /* let's be paranoid....  */                                      \
 773       if (INTVAL (offset) < -32768 || INTVAL (offset) > 32767)          \
 774         return COSTS_N_INSNS (2);                                       \
 775                                                                         \
 776       return COSTS_N_INSNS (SYMBOL_REF_FLAG (symref) ? 1 : 2);          \
 777     }                                                                   \
 778                                                                         \
 779   case SYMBOL_REF:                                                      \
 780     return COSTS_N_INSNS (SYMBOL_REF_FLAG (X) ? 1 : 2);                 \
 781                                                                         \
 782   case CONST_DOUBLE:                                                    \
 783     {                                                                   \
 784       rtx high, low;                                                    \
 785       split_double (X, &high, &low);                                    \
 786       return COSTS_N_INSNS ((high == CONST0_RTX (GET_MODE (high))       \
 787                              || low == CONST0_RTX (GET_MODE (low)))     \
 788                             ? 2 : 4);                                   \
 789     }
 790
 791 #define RTX_COSTS(X,CODE,OUTER_CODE)                                    \
 792   case MEM:                                                             \
 793     {                                                                   \
 794       int num_words = (GET_MODE_SIZE (GET_MODE (X)) > UNITS_PER_WORD) ? 2 : 1; \
 795       if (simple_memory_operand (X, GET_MODE (X)))                      \
 796         return COSTS_N_INSNS (num_words);                               \
 797                                                                         \
 798       return COSTS_N_INSNS (2*num_words);                               \
 799     }                                                                   \
 800                                                                         \
 801   case FFS:                                                             \
 802     return COSTS_N_INSNS (6);                                           \
 803                                                                         \
 804   case NOT:                                                             \
 805     return COSTS_N_INSNS (GET_MODE (X) == DImode && 2);                 \
 806                                                                         \
 807   case AND:                                                             \
 808   case IOR:                                                             \
 809   case XOR:                                                             \
 810     if (GET_MODE (X) == DImode)                                         \
 811       return COSTS_N_INSNS (2);                                         \
 812                                                                         \
 813     break;                                                              \
 814                                                                         \
 815   case ASHIFT:                                                          \
 816   case ASHIFTRT:                                                        \
 817   case LSHIFTRT:                                                        \
 818     if (GET_MODE (X) == DImode)                                         \
 819       return COSTS_N_INSNS ((GET_CODE (XEXP (X, 1)) == CONST_INT) ? 4 : 12); \
 820                                                                         \
 821     break;                                                              \
 822                                                                         \
 823   case ABS:                                                             \
 824     {                                                                   \
 825       enum machine_mode xmode = GET_MODE (X);                           \
 826       if (xmode == SFmode || xmode == DFmode)                           \
 827         return COSTS_N_INSNS (1);                                       \
 828                                                                         \
 829       return COSTS_N_INSNS (4);                                         \
 830     }                                                                   \
 831                                                                         \
 832   case PLUS:                                                            \
 833   case MINUS:                                                           \
 834     {                                                                   \
 835       enum machine_mode xmode = GET_MODE (X);                           \
 836       if (xmode == SFmode || xmode == DFmode)                           \
 837         {                                                               \
 838            return COSTS_N_INSNS (6);                                    \
 839         }                                                               \
 840                                                                         \
 841       if (xmode == DImode)                                              \
 842         return COSTS_N_INSNS (4);                                       \
 843                                                                         \
 844       break;                                                            \
 845     }                                                                   \
 846                                                                         \
 847   case NEG:                                                             \
 848     if (GET_MODE (X) == DImode)                                         \
 849       return 4;                                                         \
 850                                                                         \
 851     break;                                                              \
 852                                                                         \
 853   case MULT:                                                            \
 854     {                                                                   \
 855       enum machine_mode xmode = GET_MODE (X);                           \
 856       if (xmode == SFmode)                                              \
 857         {                                                               \
 858             return COSTS_N_INSNS (7);                                   \
 859         }                                                               \
 860                                                                         \
 861       if (xmode == DFmode)                                              \
 862         {                                                               \
 863             return COSTS_N_INSNS (8);                                   \
 864         }                                                               \
 865                                                                         \
 866         return COSTS_N_INSNS (10);                                      \
 867     }                                                                   \
 868                                                                         \
 869   case DIV:                                                             \
 870   case MOD:                                                             \
 871     {                                                                   \
 872       enum machine_mode xmode = GET_MODE (X);                           \
 873       if (xmode == SFmode)                                              \
 874         {                                                               \
 875             return COSTS_N_INSNS (23);                                  \
 876         }                                                               \
 877                                                                         \
 878       if (xmode == DFmode)                                              \
 879         {                                                               \
 880             return COSTS_N_INSNS (36);                                  \
 881         }                                                               \
 882     }                                                                   \
 883     /* fall through */                                                  \
 884                                                                         \
 885   case UDIV:                                                            \
 886   case UMOD:                                                            \
 887       return COSTS_N_INSNS (69);                                        \
 888                                                                         \
 889   case SIGN_EXTEND:                                                     \
 890     return COSTS_N_INSNS (2);                                           \
 891                                                                         \
 892   case ZERO_EXTEND:                                                     \
 893     return COSTS_N_INSNS (1);
 894
 895 #define ADDRESS_COST(ADDR) (REG_P (ADDR) ? 1 : iq2000_address_cost (ADDR))
 896
 897 #define REGISTER_MOVE_COST(MODE, FROM, TO)      2
 898
 899 #define MEMORY_MOVE_COST(MODE,CLASS,TO_P)       \
 900   (TO_P ? 2 : 16)
 901
 902 #define BRANCH_COST 2
 903
 904 #define SLOW_BYTE_ACCESS 1
 905
 906 #define NO_FUNCTION_CSE 1
 907
 908 #define NO_RECURSIVE_FUNCTION_CSE 1
 909
 910 #define ADJUST_COST(INSN,LINK,DEP_INSN,COST)                            \
 911   if (REG_NOTE_KIND (LINK) != 0)                                        \
 912     (COST) = 0; /* Anti or output dependence.  */
 913
 914 \f
 915 /* Dividing the output into sections.  */
 916
 917 #define TEXT_SECTION_ASM_OP     "\t.text"       /* instructions */
 918
 919 #define DATA_SECTION_ASM_OP     "\t.data"       /* large data */
 920
 921 \f
 922 /* The Overall Framework of an Assembler File.  */
 923
 924 #define ASM_COMMENT_START " #"
 925
 926 #define ASM_APP_ON "#APP\n"
 927
 928 #define ASM_APP_OFF "#NO_APP\n"
 929
 930 \f
 931 /* Output and Generation of Labels.  */
 932
 933 #undef ASM_OUTPUT_INTERNAL_LABEL
 934 #define ASM_OUTPUT_INTERNAL_LABEL(STREAM,PREFIX,NUM)                    \
 935   fprintf (STREAM, "%s%s%d:\n", LOCAL_LABEL_PREFIX, PREFIX, NUM)
 936
 937 #undef ASM_GENERATE_INTERNAL_LABEL
 938 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)                   \
 939   sprintf ((LABEL), "*%s%s%ld", (LOCAL_LABEL_PREFIX), (PREFIX), (long)(NUM))
 940
 941 #define GLOBAL_ASM_OP "\t.globl\t"
 942
 943 \f
 944 /* Output of Assembler Instructions.  */
 945
 946 #define REGISTER_NAMES                                                  \
 947 {                                                                       \
 948  "%0",   "%1",   "%2",   "%3",   "%4",   "%5",   "%6",   "%7",          \
 949  "%8",   "%9",   "%10",  "%11",  "%12",  "%13",  "%14",  "%15",         \
 950  "%16",  "%17",  "%18",  "%19",  "%20",  "%21",  "%22",  "%23",         \
 951  "%24",  "%25",  "%26",  "%27",  "%28",  "%29",  "%30",  "%31",  "%rap" \
 952 };
 953
 954 #define ADDITIONAL_REGISTER_NAMES                                       \
 955 {                                                                       \
 956   { "%0",        0 + GP_REG_FIRST },                                    \
 957   { "%1",        1 + GP_REG_FIRST },                                    \
 958   { "%2",        2 + GP_REG_FIRST },                                    \
 959   { "%3",        3 + GP_REG_FIRST },                                    \
 960   { "%4",        4 + GP_REG_FIRST },                                    \
 961   { "%5",        5 + GP_REG_FIRST },                                    \
 962   { "%6",        6 + GP_REG_FIRST },                                    \
 963   { "%7",        7 + GP_REG_FIRST },                                    \
 964   { "%8",        8 + GP_REG_FIRST },                                    \
 965   { "%9",        9 + GP_REG_FIRST },                                    \
 966   { "%10",      10 + GP_REG_FIRST },                                    \
 967   { "%11",      11 + GP_REG_FIRST },                                    \
 968   { "%12",      12 + GP_REG_FIRST },                                    \
 969   { "%13",      13 + GP_REG_FIRST },                                    \
 970   { "%14",      14 + GP_REG_FIRST },                                    \
 971   { "%15",      15 + GP_REG_FIRST },                                    \
 972   { "%16",      16 + GP_REG_FIRST },                                    \
 973   { "%17",      17 + GP_REG_FIRST },                                    \
 974   { "%18",      18 + GP_REG_FIRST },                                    \
 975   { "%19",      19 + GP_REG_FIRST },                                    \
 976   { "%20",      20 + GP_REG_FIRST },                                    \
 977   { "%21",      21 + GP_REG_FIRST },                                    \
 978   { "%22",      22 + GP_REG_FIRST },                                    \
 979   { "%23",      23 + GP_REG_FIRST },                                    \
 980   { "%24",      24 + GP_REG_FIRST },                                    \
 981   { "%25",      25 + GP_REG_FIRST },                                    \
 982   { "%26",      26 + GP_REG_FIRST },                                    \
 983   { "%27",      27 + GP_REG_FIRST },                                    \
 984   { "%28",      28 + GP_REG_FIRST },                                    \
 985   { "%29",      29 + GP_REG_FIRST },                                    \
 986   { "%30",      27 + GP_REG_FIRST },                                    \
 987   { "%31",      31 + GP_REG_FIRST },                                    \
 988   { "%rap",     32 + GP_REG_FIRST },                                    \
 989 }
 990
 991 /* Check if the current insn needs a nop in front of it
 992    because of load delays, and also update the delay slot statistics.  */
 993
 994 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS)                      \
 995   final_prescan_insn (INSN, OPVEC, NOPERANDS)
 996
 997 /* See iq2000.c for the IQ2000 specific codes.  */
 998 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
 999
1000 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) iq2000_print_operand_punct[CODE]
1001
1002 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1003
1004 #define DBR_OUTPUT_SEQEND(STREAM)                                       \
1005 do                                                                      \
1006   {                                                                     \
1007     dslots_jump_filled++;                                               \
1008     fputs ("\n", STREAM);                                               \
1009   }                                                                     \
1010 while (0)
1011
1012 #define LOCAL_LABEL_PREFIX      "$"
1013
1014 #define USER_LABEL_PREFIX       ""
1015
1016 \f
1017 /* Output of dispatch tables.  */
1018
1019 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)              \
1020 do {                                                                    \
1021   fprintf (STREAM, "\t%s\t%sL%d\n",                                     \
1022            Pmode == DImode ? ".dword" : ".word",                        \
1023            LOCAL_LABEL_PREFIX, VALUE);                                  \
1024 } while (0)
1025
1026 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)                          \
1027   fprintf (STREAM, "\t%s\t%sL%d\n",                                     \
1028            Pmode == DImode ? ".dword" : ".word",                        \
1029            LOCAL_LABEL_PREFIX,                                          \
1030            VALUE)
1031
1032 \f
1033 /* Assembler Commands for Alignment.  */
1034
1035 #undef ASM_OUTPUT_SKIP
1036 #define ASM_OUTPUT_SKIP(STREAM,SIZE)                                    \
1037   fprintf (STREAM, "\t.space\t%u\n", (SIZE))
1038
1039 #define ASM_OUTPUT_ALIGN(STREAM,LOG)                                    \
1040   if ((LOG) != 0)                                                       \
1041     fprintf (STREAM, "\t.balign %d\n", 1<<(LOG))
1042
1043 \f
1044 /* Macros Affecting all Debug Formats.  */
1045
1046 #define DEBUGGER_AUTO_OFFSET(X)  \
1047   iq2000_debugger_offset (X, (HOST_WIDE_INT) 0)
1048
1049 #define DEBUGGER_ARG_OFFSET(OFFSET, X)  \
1050   iq2000_debugger_offset (X, (HOST_WIDE_INT) OFFSET)
1051
1052 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
1053
1054 #define DWARF2_DEBUGGING_INFO 1
1055
1056 \f
1057 /* Miscellaneous Parameters.  */
1058
1059 #define PREDICATE_CODES                                                 \
1060   {"uns_arith_operand",         { REG, CONST_INT, SUBREG }},            \
1061   {"arith_operand",             { REG, CONST_INT, SUBREG }},            \
1062   {"small_int",                 { CONST_INT }},                         \
1063   {"large_int",                 { CONST_INT }},                         \
1064   {"reg_or_0_operand",          { REG, CONST_INT, CONST_DOUBLE, SUBREG }}, \
1065   {"simple_memory_operand",     { MEM, SUBREG }},                       \
1066   {"equality_op",               { EQ, NE }},                            \
1067   {"cmp_op",                    { EQ, NE, GT, GE, GTU, GEU, LT, LE,     \
1068                                   LTU, LEU }},                          \
1069   {"pc_or_label_operand",       { PC, LABEL_REF }},                     \
1070   {"call_insn_operand",         { CONST_INT, CONST, SYMBOL_REF, REG}},  \
1071   {"move_operand",              { CONST_INT, CONST_DOUBLE, CONST,       \
1072                                   SYMBOL_REF, LABEL_REF, SUBREG,        \
1073                                   REG, MEM}},                           \
1074   {"power_of_2_operand",        { CONST_INT }},
1075
1076 #define CASE_VECTOR_MODE SImode
1077
1078 #define CASE_VECTOR_PC_RELATIVE 0
1079
1080 #define WORD_REGISTER_OPERATIONS
1081
1082 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1083
1084 #define MOVE_MAX 4
1085
1086 #define MAX_MOVE_MAX 8
1087
1088 #define SHIFT_COUNT_TRUNCATED 1
1089
1090 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1091
1092 #define STORE_FLAG_VALUE 1
1093
1094 #define Pmode SImode
1095
1096 #define FUNCTION_MODE SImode
1097
1098 /* Standard GCC variables that we reference.  */
1099
1100 extern char     call_used_regs[];
1101
1102 /* IQ2000 external variables defined in iq2000.c.  */
1103
1104 /* Comparison type.  */
1105 enum cmp_type
1106 {
1107   CMP_SI,                               /* compare four byte integers */
1108   CMP_DI,                               /* compare eight byte integers */
1109   CMP_SF,                               /* compare single precision floats */
1110   CMP_DF,                               /* compare double precision floats */
1111   CMP_MAX                               /* max comparison type */
1112 };
1113
1114 /* Types of delay slot.  */
1115 enum delay_type
1116 {
1117   DELAY_NONE,                           /* no delay slot */
1118   DELAY_LOAD,                           /* load from memory delay */
1119   DELAY_FCMP                            /* delay after doing c.<xx>.{d,s} */
1120 };
1121
1122 /* Which processor to schedule for.  */
1123
1124 enum processor_type
1125 {
1126   PROCESSOR_DEFAULT,
1127   PROCESSOR_IQ2000,
1128   PROCESSOR_IQ10
1129 };
1130
1131 /* Recast the cpu class to be the cpu attribute.  */
1132 #define iq2000_cpu_attr ((enum attr_cpu)iq2000_tune)
1133
1134 extern char iq2000_print_operand_punct[];       /* print_operand punctuation chars */
1135 extern int num_source_filenames;        /* current .file # */
1136 extern int iq2000_branch_likely;                /* emit 'l' after br (branch likely) */
1137 extern struct rtx_def *branch_cmp[2];   /* operands for compare */
1138 extern enum cmp_type branch_type;       /* what type of branch to use */
1139 extern enum processor_type iq2000_arch;   /* which cpu to codegen for */
1140 extern enum processor_type iq2000_tune;   /* which cpu to schedule for */
1141 extern int iq2000_isa;                  /* architectural level */
1142 extern const char *iq2000_cpu_string;   /* for -mcpu=<xxx> */
1143 extern const char *iq2000_arch_string;    /* for -march=<xxx> */
1144 extern int dslots_load_total;           /* total # load related delay slots */
1145 extern int dslots_load_filled;          /* # filled load delay slots */
1146 extern int dslots_jump_total;           /* total # jump related delay slots */
1147 extern int dslots_jump_filled;          /* # filled jump delay slots */
1148 extern int dslots_number_nops;          /* # of nops needed by previous insn */
1149 extern int num_refs[3];                 /* # 1/2/3 word references */
1150 extern struct rtx_def *iq2000_load_reg; /* register to check for load delay */
1151 extern struct rtx_def *iq2000_load_reg2;        /* 2nd reg to check for load delay */
1152 extern struct rtx_def *iq2000_load_reg3;        /* 3rd reg to check for load delay */
1153 extern struct rtx_def *iq2000_load_reg4;        /* 4th reg to check for load delay */
1154
1155 /* Functions to change what output section we are using.  */
1156 extern void             rdata_section (void);
1157 extern void             sdata_section (void);
1158 extern void             sbss_section (void);
1159
1160 #define BITMASK_UPPER16 ((unsigned long)0xffff << 16)   /* 0xffff0000 */
1161 #define BITMASK_LOWER16 ((unsigned long)0xffff)         /* 0x0000ffff */
1162
1163 \f
1164 #define GENERATE_BRANCHLIKELY  (ISA_HAS_BRANCHLIKELY)
1165
1166 /* Macros to decide whether certain features are available or not,
1167    depending on the instruction set architecture level.  */
1168
1169 #define BRANCH_LIKELY_P()       GENERATE_BRANCHLIKELY
1170
1171 /* ISA has branch likely instructions.  */
1172 #define ISA_HAS_BRANCHLIKELY    (iq2000_isa == 1)
1173
1174 \f
1175 #undef ASM_SPEC
1176 #define ASM_SPEC "%{march=iq2000: -m2000} %{march=iq10: -m10} %{!march=*: -m2000}"
1177
1178 \f
1179 /* The mapping from gcc register number to DWARF 2 CFA column number.
1180    This mapping does not allow for tracking register 0, since
1181    register 0 is fixed.  */
1182 #define DWARF_FRAME_REGNUM(REG)                         \
1183   (REG == GP_REG_FIRST + 31 ? DWARF_FRAME_RETURN_COLUMN : REG)
1184
1185 /* The DWARF 2 CFA column which tracks the return address.  */
1186 #define DWARF_FRAME_RETURN_COLUMN ( GP_REG_FIRST + 26)
1187
1188 /* Describe how we implement __builtin_eh_return.  */
1189 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + GP_ARG_FIRST : INVALID_REGNUM)
1190
1191 /* The EH_RETURN_STACKADJ_RTX macro returns RTL which describes the
1192    location used to store the amount to adjust the stack.  This is
1193    usually a register that is available from end of the function's body
1194    to the end of the epilogue. Thus, this cannot be a register used as a
1195    temporary by the epilogue.
1196
1197    This must be an integer register.  */
1198 #define EH_RETURN_STACKADJ_REGNO        3
1199 #define EH_RETURN_STACKADJ_RTX  gen_rtx_REG (Pmode, EH_RETURN_STACKADJ_REGNO)
1200
1201 /* The EH_RETURN_HANDLER_RTX macro returns RTL which describes the
1202    location used to store the address the processor should jump to
1203    catch exception.  This is usually a registers that is available from
1204    end of the function's body to the end of the epilogue. Thus, this
1205    cannot be a register used as a temporary by the epilogue.
1206
1207    This must be an address register.  */
1208 #define EH_RETURN_HANDLER_REGNO         26
1209 #define EH_RETURN_HANDLER_RTX           \
1210         gen_rtx_REG (Pmode, EH_RETURN_HANDLER_REGNO)
1211
1212 /* Offsets recorded in opcodes are a multiple of this alignment factor.  */
1213 #define DWARF_CIE_DATA_ALIGNMENT 4
1214
1215 /* For IQ2000, width of a floating point register.  */
1216 #define UNITS_PER_FPREG 4
1217
1218 /* Force right-alignment for small varargs in 32 bit little_endian mode */
1219
1220 #define PAD_VARARGS_DOWN !BYTES_BIG_ENDIAN
1221
1222 /* Internal macros to classify a register number as to whether it's a
1223    general purpose register, a floating point register, a
1224    multiply/divide register, or a status register.  */
1225
1226 #define GP_REG_FIRST 0
1227 #define GP_REG_LAST  31
1228 #define GP_REG_NUM   (GP_REG_LAST - GP_REG_FIRST + 1)
1229
1230 #define RAP_REG_NUM   32
1231 #define AT_REGNUM       (GP_REG_FIRST + 1)
1232
1233 #define GP_REG_P(REGNO) \
1234   ((unsigned int) ((int) (REGNO) - GP_REG_FIRST) < GP_REG_NUM)
1235
1236 /* IQ2000 registers used in prologue/epilogue code when the stack frame
1237    is larger than 32K bytes.  These registers must come from the
1238    scratch register set, and not used for passing and returning
1239    arguments and any other information used in the calling sequence.  */
1240
1241 #define IQ2000_TEMP1_REGNUM (GP_REG_FIRST + 12)
1242 #define IQ2000_TEMP2_REGNUM (GP_REG_FIRST + 13)
1243
1244 /* This macro is used later on in the file.  */
1245 #define GR_REG_CLASS_P(CLASS)                                           \
1246   ((CLASS) == GR_REGS)
1247
1248 #define SMALL_INT(X) ((unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
1249 #define SMALL_INT_UNSIGNED(X) ((unsigned HOST_WIDE_INT) (INTVAL (X)) < 0x10000)
1250
1251 /* Certain machines have the property that some registers cannot be
1252    copied to some other registers without using memory.  Define this
1253    macro on those machines to be a C expression that is non-zero if
1254    objects of mode MODE in registers of CLASS1 can only be copied to
1255    registers of class CLASS2 by storing a register of CLASS1 into
1256    memory and loading that memory location into a register of CLASS2.
1257
1258    Do not define this macro if its value would always be zero.  */
1259
1260 /* Return the maximum number of consecutive registers
1261    needed to represent mode MODE in a register of class CLASS.  */
1262
1263 #define CLASS_UNITS(mode, size)                                         \
1264   ((GET_MODE_SIZE (mode) + (size) - 1) / (size))
1265
1266 /* If defined, gives a class of registers that cannot be used as the
1267    operand of a SUBREG that changes the mode of the object illegally.  */
1268
1269 #define CLASS_CANNOT_CHANGE_MODE 0
1270
1271 /* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE.  */
1272
1273 #define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \
1274   (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
1275
1276 /* Make sure 4 words are always allocated on the stack.  */
1277
1278 #ifndef STACK_ARGS_ADJUST
1279 #define STACK_ARGS_ADJUST(SIZE)                                         \
1280 {                                                                       \
1281   if (SIZE.constant < 4 * UNITS_PER_WORD)                               \
1282     SIZE.constant = 4 * UNITS_PER_WORD;                                 \
1283 }
1284 #endif
1285
1286 \f
1287 /* Symbolic macros for the registers used to return integer and floating
1288    point values.  */
1289
1290 #define GP_RETURN (GP_REG_FIRST + 2)
1291
1292 /* Symbolic macros for the first/last argument registers.  */
1293
1294 #define GP_ARG_FIRST (GP_REG_FIRST + 4)
1295 #define GP_ARG_LAST  (GP_REG_FIRST + 11)
1296
1297 #define MAX_ARGS_IN_REGISTERS   8
1298
1299 \f
1300 /* Tell prologue and epilogue if register REGNO should be saved / restored.  */
1301
1302 #define MUST_SAVE_REGISTER(regno) \
1303  ((regs_ever_live[regno] && !call_used_regs[regno])                     \
1304   || (regno == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed)       \
1305   || (regno == (GP_REG_FIRST + 31) && regs_ever_live[GP_REG_FIRST + 31]))
1306
1307 /* ALIGN FRAMES on double word boundaries */
1308 #ifndef IQ2000_STACK_ALIGN
1309 #define IQ2000_STACK_ALIGN(LOC) (((LOC) + 7) & ~7)
1310 #endif
1311
1312 \f
1313 /* These assume that REGNO is a hard or pseudo reg number.
1314    They give nonzero only if REGNO is a hard reg of the suitable class
1315    or a pseudo reg currently allocated to a suitable hard reg.
1316    These definitions are NOT overridden anywhere.  */
1317
1318 #define BASE_REG_P(regno, mode)                                 \
1319   (GP_REG_P (regno))
1320
1321 #define GP_REG_OR_PSEUDO_STRICT_P(regno, mode)                              \
1322   BASE_REG_P((regno < FIRST_PSEUDO_REGISTER) ? regno : reg_renumber[regno], \
1323              (mode))
1324
1325 #define GP_REG_OR_PSEUDO_NONSTRICT_P(regno, mode) \
1326   (((regno) >= FIRST_PSEUDO_REGISTER) || (BASE_REG_P ((regno), (mode))))
1327
1328 #define REGNO_MODE_OK_FOR_BASE_P(regno, mode) \
1329   GP_REG_OR_PSEUDO_STRICT_P ((regno), (mode))
1330
1331 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1332    and check its validity for a certain class.
1333    We have two alternate definitions for each of them.
1334    The usual definition accepts all pseudo regs; the other rejects them all.
1335    The symbol REG_OK_STRICT causes the latter definition to be used.
1336
1337    Most source files want to accept pseudo regs in the hope that
1338    they will get allocated to the class that the insn wants them to be in.
1339    Some source files that are used after register allocation
1340    need to be strict.  */
1341
1342 #ifndef REG_OK_STRICT
1343 #define REG_MODE_OK_FOR_BASE_P(X, MODE) \
1344   iq2000_reg_mode_ok_for_base_p (X, MODE, 0)
1345 #else
1346 #define REG_MODE_OK_FOR_BASE_P(X, MODE) \
1347   iq2000_reg_mode_ok_for_base_p (X, MODE, 1)
1348 #endif
1349
1350 #if 1
1351 #define GO_PRINTF(x)    fprintf(stderr, (x))
1352 #define GO_PRINTF2(x,y) fprintf(stderr, (x), (y))
1353 #define GO_DEBUG_RTX(x) debug_rtx(x)
1354
1355 #else
1356 #define GO_PRINTF(x)
1357 #define GO_PRINTF2(x,y)
1358 #define GO_DEBUG_RTX(x)
1359 #endif
1360
1361 /* Specify the tree operation to be used to convert reals to integers.  */
1362 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1363
1364 /* This is the kind of divide that is easiest to do in the general case.  */
1365 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1366
1367 /* Define this if zero-extension is slow (more than one real instruction).  */
1368 #define SLOW_ZERO_EXTEND
1369
1370 /* If defined, modifies the length assigned to instruction INSN as a
1371    function of the context in which it is used.  LENGTH is an lvalue
1372    that contains the initially computed length of the insn and should
1373    be updated with the correct length of the insn.  */
1374 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1375   ((LENGTH) = iq2000_adjust_insn_length ((INSN), (LENGTH)))
1376
1377 \f
1378 /* A list of predicates that do special things with modes, and so
1379    should not elicit warnings for VOIDmode match_operand.  */
1380
1381 #define SPECIAL_MODE_PREDICATES \
1382   "pc_or_label_operand",
1383
1384 \f
1385
1386
1387 /* How to tell the debugger about changes of source files.  */
1388
1389 #ifndef SET_FILE_NUMBER
1390 #define SET_FILE_NUMBER() ++num_source_filenames
1391 #endif
1392
1393 /* This is how to output a note the debugger telling it the line number
1394    to which the following sequence of instructions corresponds.  */
1395
1396 #ifndef LABEL_AFTER_LOC
1397 #define LABEL_AFTER_LOC(STREAM)
1398 #endif
1399
1400 /* Handle certain cpp directives used in header files on sysV.  */
1401 #define SCCS_DIRECTIVE
1402
1403 \f
1404 /* Default to -G 8 */
1405 #ifndef IQ2000_DEFAULT_GVALUE
1406 #define IQ2000_DEFAULT_GVALUE 8
1407 #endif
1408
1409 #define SDATA_SECTION_ASM_OP    "\t.sdata"      /* small data */
1410
1411 /* Given a decl node or constant node, choose the section to output it in
1412    and select that section.  */
1413
1414 #undef  TARGET_ASM_SELECT_SECTION
1415 #define TARGET_ASM_SELECT_SECTION  iq2000_select_section
1416 \f
1417 /* See iq2000_expand_prologue's use of loadgp for when this should be
1418    true.  */
1419
1420 #define DONT_ACCESS_GBLS_AFTER_EPILOGUE 0
1421 \f
1422
1423 #ifndef INIT_SUBTARGET_OPTABS
1424 #define INIT_SUBTARGET_OPTABS
1425 #endif
1426
1427 enum iq2000_builtins
1428 {
1429   IQ2000_BUILTIN_ADO16,
1430   IQ2000_BUILTIN_CFC0,
1431   IQ2000_BUILTIN_CFC1,
1432   IQ2000_BUILTIN_CFC2,
1433   IQ2000_BUILTIN_CFC3,
1434   IQ2000_BUILTIN_CHKHDR,
1435   IQ2000_BUILTIN_CTC0,
1436   IQ2000_BUILTIN_CTC1,
1437   IQ2000_BUILTIN_CTC2,
1438   IQ2000_BUILTIN_CTC3,
1439   IQ2000_BUILTIN_LU,
1440   IQ2000_BUILTIN_LUC32L,
1441   IQ2000_BUILTIN_LUC64,
1442   IQ2000_BUILTIN_LUC64L,
1443   IQ2000_BUILTIN_LUK,
1444   IQ2000_BUILTIN_LULCK,
1445   IQ2000_BUILTIN_LUM32,
1446   IQ2000_BUILTIN_LUM32L,
1447   IQ2000_BUILTIN_LUM64,
1448   IQ2000_BUILTIN_LUM64L,
1449   IQ2000_BUILTIN_LUR,
1450   IQ2000_BUILTIN_LURL,
1451   IQ2000_BUILTIN_MFC0,
1452   IQ2000_BUILTIN_MFC1,
1453   IQ2000_BUILTIN_MFC2,
1454   IQ2000_BUILTIN_MFC3,
1455   IQ2000_BUILTIN_MRGB,
1456   IQ2000_BUILTIN_MTC0,
1457   IQ2000_BUILTIN_MTC1,
1458   IQ2000_BUILTIN_MTC2,
1459   IQ2000_BUILTIN_MTC3,
1460   IQ2000_BUILTIN_PKRL,
1461   IQ2000_BUILTIN_RAM,
1462   IQ2000_BUILTIN_RB,
1463   IQ2000_BUILTIN_RX,
1464   IQ2000_BUILTIN_SRRD,
1465   IQ2000_BUILTIN_SRRDL,
1466   IQ2000_BUILTIN_SRULC,
1467   IQ2000_BUILTIN_SRULCK,
1468   IQ2000_BUILTIN_SRWR,
1469   IQ2000_BUILTIN_SRWRU,
1470   IQ2000_BUILTIN_TRAPQF,
1471   IQ2000_BUILTIN_TRAPQFL,
1472   IQ2000_BUILTIN_TRAPQN,
1473   IQ2000_BUILTIN_TRAPQNE,
1474   IQ2000_BUILTIN_TRAPRE,
1475   IQ2000_BUILTIN_TRAPREL,
1476   IQ2000_BUILTIN_WB,
1477   IQ2000_BUILTIN_WBR,
1478   IQ2000_BUILTIN_WBU,
1479   IQ2000_BUILTIN_WX,
1480   IQ2000_BUILTIN_SYSCALL
1481 };