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gcc.gnu.org Git - gcc.git/blob - gcc/config/i386/i386.h
1 /* Definitions of target machine for GNU compiler for Intel X86
3 Copyright (C) 1988, 92, 94, 95, 96, 1997 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* The purpose of this file is to define the characteristics of the i386,
23 independent of assembler syntax or operating system.
25 Three other files build on this one to describe a specific assembler syntax:
26 bsd386.h, att386.h, and sun386.h.
28 The actual tm.h file for a particular system should include
29 this file, and then the file for the appropriate assembler syntax.
31 Many macros that specify assembler syntax are omitted entirely from
32 this file because they really belong in the files for particular
33 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
34 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
35 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
37 /* Names to predefine in the preprocessor for this target machine. */
41 /* Stubs for half-pic support if not OSF/1 reference platform. */
44 #define HALF_PIC_P() 0
45 #define HALF_PIC_NUMBER_PTRS 0
46 #define HALF_PIC_NUMBER_REFS 0
47 #define HALF_PIC_ENCODE(DECL)
48 #define HALF_PIC_DECLARE(NAME)
49 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
50 #define HALF_PIC_ADDRESS_P(X) 0
51 #define HALF_PIC_PTR(X) X
52 #define HALF_PIC_FINISH(STREAM)
55 /* Define the specific costs for a given cpu */
57 struct processor_costs
{
58 int add
; /* cost of an add instruction */
59 int lea
; /* cost of a lea instruction */
60 int shift_var
; /* variable shift costs */
61 int shift_const
; /* constant shift costs */
62 int mult_init
; /* cost of starting a multiply */
63 int mult_bit
; /* cost of multiply per each bit set */
64 int divide
; /* cost of a divide/mod */
67 extern struct processor_costs
*ix86_cost
;
69 /* Run-time compilation parameters selecting different hardware subsets. */
71 extern int target_flags
;
73 /* Macros used in the machine description to test the flags. */
75 /* configure can arrange to make this 2, to force a 486. */
76 #ifndef TARGET_CPU_DEFAULT
77 #define TARGET_CPU_DEFAULT 0
80 /* Masks for the -m switches */
81 #define MASK_80387 000000000001 /* Hardware floating point */
82 #define MASK_NOTUSED1 000000000002 /* bit not currently used */
83 #define MASK_NOTUSED2 000000000004 /* bit not currently used */
84 #define MASK_RTD 000000000010 /* Use ret that pops args */
85 #define MASK_ALIGN_DOUBLE 000000000020 /* align doubles to 2 word boundary */
86 #define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */
87 #define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */
88 #define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */
89 #define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */
90 #define MASK_OMIT_LEAF_FRAME_POINTER 0x00000800 /* omit leaf frame pointers */
91 /* Temporary codegen switches */
92 #define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */
93 #define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */
94 #define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */
95 #define MASK_NO_PSEUDO 000010000000 /* Move op's args -> pseudos */
96 #define MASK_DEBUG_ARG 000020000000 /* Debug function_arg */
97 #define MASK_SCHEDULE_PROLOGUE 000040000000 /* Emit prologue as rtl */
98 #define MASK_STACK_PROBE 000100000000 /* Enable stack probing */
100 /* Use the floating point instructions */
101 #define TARGET_80387 (target_flags & MASK_80387)
103 /* Compile using ret insn that pops args.
104 This will not work unless you use prototypes at least
105 for all functions that can take varying numbers of args. */
106 #define TARGET_RTD (target_flags & MASK_RTD)
108 /* Align doubles to a two word boundary. This breaks compatibility with
109 the published ABI's for structures containing doubles, but produces
110 faster code on the pentium. */
111 #define TARGET_ALIGN_DOUBLE (target_flags & MASK_ALIGN_DOUBLE)
113 /* Put uninitialized locals into bss, not data.
114 Meaningful only on svr3. */
115 #define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB)
117 /* Use IEEE floating point comparisons. These handle correctly the cases
118 where the result of a comparison is unordered. Normally SIGFPE is
119 generated in such cases, in which case this isn't needed. */
120 #define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP)
122 /* Functions that return a floating point value may return that value
123 in the 387 FPU or in 386 integer registers. If set, this flag causes
124 the 387 to be used, which is compatible with most calling conventions. */
125 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
127 /* Disable generation of FP sin, cos and sqrt operations for 387.
128 This is because FreeBSD lacks these in the math-emulator-code */
129 #define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387)
131 /* Don't create frame pointers for leaf functions */
132 #define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
134 /* Temporary switches for tuning code generation */
136 /* Disable 32x32->64 bit multiplies that are used for long long multiplies
137 and division by constants, but sometimes cause reload problems. */
138 #define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY)
139 #define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY)
141 /* Emit/Don't emit prologue as rtl */
142 #define TARGET_SCHEDULE_PROLOGUE (target_flags & MASK_SCHEDULE_PROLOGUE)
144 /* Debug GO_IF_LEGITIMATE_ADDRESS */
145 #define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR)
147 /* Debug FUNCTION_ARG macros */
148 #define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG)
150 /* Hack macros for tuning code generation */
151 #define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
152 #define TARGET_PSEUDO ((target_flags & MASK_NO_PSEUDO) == 0) /* Move op's args into pseudos */
154 #define TARGET_386 (ix86_cpu == PROCESSOR_I386)
155 #define TARGET_486 (ix86_cpu == PROCESSOR_I486)
156 #define TARGET_PENTIUM (ix86_cpu == PROCESSOR_PENTIUM)
157 #define TARGET_PENTIUMPRO (ix86_cpu == PROCESSOR_PENTIUMPRO)
158 #define TARGET_USE_LEAVE (ix86_cpu == PROCESSOR_I386)
159 #define TARGET_PUSH_MEMORY (ix86_cpu == PROCESSOR_I386)
160 #define TARGET_ZERO_EXTEND_WITH_AND (ix86_cpu != PROCESSOR_I386 \
161 && ix86_cpu != PROCESSOR_PENTIUMPRO)
162 #define TARGET_DOUBLE_WITH_ADD (ix86_cpu != PROCESSOR_I386)
163 #define TARGET_USE_BIT_TEST (ix86_cpu == PROCESSOR_I386)
164 #define TARGET_UNROLL_STRLEN (ix86_cpu != PROCESSOR_I386)
165 #define TARGET_USE_Q_REG (ix86_cpu == PROCESSOR_PENTIUM \
166 || ix86_cpu == PROCESSOR_PENTIUMPRO)
167 #define TARGET_USE_ANY_REG (ix86_cpu == PROCESSOR_I486)
168 #define TARGET_CMOVE (ix86_arch == PROCESSOR_PENTIUMPRO)
169 #define TARGET_DEEP_BRANCH_PREDICTION (ix86_cpu == PROCESSOR_PENTIUMPRO)
170 #define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE)
172 #define TARGET_SWITCHES \
173 { { "80387", MASK_80387 }, \
174 { "no-80387", -MASK_80387 }, \
175 { "hard-float", MASK_80387 }, \
176 { "soft-float", -MASK_80387 }, \
177 { "no-soft-float", MASK_80387 }, \
183 { "pentiumpro", 0 }, \
184 { "rtd", MASK_RTD }, \
185 { "no-rtd", -MASK_RTD }, \
186 { "align-double", MASK_ALIGN_DOUBLE }, \
187 { "no-align-double", -MASK_ALIGN_DOUBLE }, \
188 { "svr3-shlib", MASK_SVR3_SHLIB }, \
189 { "no-svr3-shlib", -MASK_SVR3_SHLIB }, \
190 { "ieee-fp", MASK_IEEE_FP }, \
191 { "no-ieee-fp", -MASK_IEEE_FP }, \
192 { "fp-ret-in-387", MASK_FLOAT_RETURNS }, \
193 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS }, \
194 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387 }, \
195 { "fancy-math-387", -MASK_NO_FANCY_MATH_387 }, \
196 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER }, \
197 { "no-omit-leaf-frame-pointer",-MASK_OMIT_LEAF_FRAME_POINTER }, \
198 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY }, \
199 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY }, \
200 { "schedule-prologue", MASK_SCHEDULE_PROLOGUE }, \
201 { "no-schedule-prologue", -MASK_SCHEDULE_PROLOGUE }, \
202 { "debug-addr", MASK_DEBUG_ADDR }, \
203 { "no-debug-addr", -MASK_DEBUG_ADDR }, \
204 { "move", -MASK_NO_MOVE }, \
205 { "no-move", MASK_NO_MOVE }, \
206 { "debug-arg", MASK_DEBUG_ARG }, \
207 { "no-debug-arg", -MASK_DEBUG_ARG }, \
208 { "stack-arg-probe", MASK_STACK_PROBE }, \
209 { "no-stack-arg-probe", -MASK_STACK_PROBE }, \
211 { "", MASK_SCHEDULE_PROLOGUE | TARGET_DEFAULT}}
213 /* Which processor to schedule for. The cpu attribute defines a list that
214 mirrors this list, so changes to i386.md must be made at the same time. */
217 {PROCESSOR_I386
, /* 80386 */
218 PROCESSOR_I486
, /* 80486DX, 80486SX, 80486DX[24] */
220 PROCESSOR_PENTIUMPRO
};
222 #define PROCESSOR_I386_STRING "i386"
223 #define PROCESSOR_I486_STRING "i486"
224 #define PROCESSOR_I586_STRING "i586"
225 #define PROCESSOR_PENTIUM_STRING "pentium"
226 #define PROCESSOR_I686_STRING "i686"
227 #define PROCESSOR_PENTIUMPRO_STRING "pentiumpro"
229 extern enum processor_type ix86_cpu
;
231 extern int ix86_arch
;
233 /* Define the default processor. This is overridden by other tm.h files. */
234 #define PROCESSOR_DEFAULT \
235 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \
237 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \
238 ? PROCESSOR_PENTIUM \
239 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \
240 ? PROCESSOR_PENTIUMPRO \
242 #define PROCESSOR_DEFAULT_STRING \
243 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \
244 ? PROCESSOR_I486_STRING \
245 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \
246 ? PROCESSOR_PENTIUM_STRING \
247 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \
248 ? PROCESSOR_PENTIUMPRO_STRING \
249 : PROCESSOR_I386_STRING
251 /* This macro is similar to `TARGET_SWITCHES' but defines names of
252 command options that have values. Its definition is an
253 initializer with a subgrouping for each command option.
255 Each subgrouping contains a string constant, that defines the
256 fixed part of the option name, and the address of a variable. The
257 variable, type `char *', is set to the variable part of the given
258 option if the fixed part matches. The actual option name is made
259 by appending `-m' to the specified name. */
260 #define TARGET_OPTIONS \
261 { { "cpu=", &ix86_cpu_string}, \
262 { "arch=", &ix86_arch_string}, \
263 { "reg-alloc=", &i386_reg_alloc_order }, \
264 { "regparm=", &i386_regparm_string }, \
265 { "align-loops=", &i386_align_loops_string }, \
266 { "align-jumps=", &i386_align_jumps_string }, \
267 { "align-functions=", &i386_align_funcs_string }, \
268 { "branch-cost=", &i386_branch_cost_string }, \
272 /* Sometimes certain combinations of command options do not make
273 sense on a particular target machine. You can define a macro
274 `OVERRIDE_OPTIONS' to take account of this. This macro, if
275 defined, is executed once just after all the command options have
278 Don't use this macro to turn on various extra optimizations for
279 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
281 #define OVERRIDE_OPTIONS override_options ()
283 /* These are meant to be redefined in the host dependent files */
284 #define SUBTARGET_SWITCHES
285 #define SUBTARGET_OPTIONS
287 /* Define this to change the optimizations performed by default. */
288 #define OPTIMIZATION_OPTIONS(LEVEL) optimization_options(LEVEL)
290 /* Specs for the compiler proper */
293 #define CC1_CPU_SPEC "\
295 %{m386:-mcpu=i386 -march=i386} \
296 %{mno-486:-mcpu=i386 -march=i386} \
297 %{m486:-mcpu=i486 -march=i486} \
298 %{mno-386:-mcpu=i486 -march=i486} \
299 %{mno-pentium:-mcpu=i486 -march=i486} \
300 %{mpentium:-mcpu=pentium} \
301 %{mno-pentiumpro:-mcpu=pentium} \
302 %{mpentiumpro:-mcpu=pentiumpro}}"
307 #if TARGET_CPU_DEFAULT == 1
308 #define CPP_CPU_DEFAULT "-Di486"
310 #if TARGET_CPU_DEFAULT == 2
311 #define CPP_CPU_DEFAULT "-Di586"
313 #if TARGET_CPU_DEFAULT == 3
314 #define CPP_CPU_DEFAULT "-Di686"
316 #define CPP_CPU_DEFAULT ""
319 #endif /* TARGET_CPU_DEFAULT */
321 #define CPP_CPU_SPEC "\
322 -Di386 " CPP_CPU_DEFAULT " -Asystem(unix) -Acpu(i386) -Amachine(i386) \
323 %{mcpu=i486:-Di486} %{m486:-Di486} \
324 %{mpentium:-Dpentium -Di586} %{mcpu=pentium:-Dpentium -Di586} \
325 %{mpentiumpro:-Dpentiumpro -Di686} %{mcpu=pentiumpro:-Dpentiumpro -Di686}"
328 #define CPP_CPU_SPEC "\
329 -Di386 -Asystem(unix) -Acpu(i386) -Amachine(i386) \
330 %{mcpu=i486:-Di486} %{m486:-Di486} \
331 %{mpentium:-Dpentium -Di586} %{mcpu=pentium:-Dpentium -Di586} \
332 %{mpentiumpro:-Dpentiumpro -Di686} %{mcpu=pentiumpro:-Dpentiumpro -Di686}"
333 #endif /* __STDC__ */
334 #endif /* CPP_CPU_SPEC */
337 #define CC1_SPEC "%(cc1_spec) "
340 /* This macro defines names of additional specifications to put in the
341 specs that can be used in various specifications like CC1_SPEC. Its
342 definition is an initializer with a subgrouping for each command option.
344 Each subgrouping contains a string constant, that defines the
345 specification name, and a string constant that used by the GNU CC driver
348 Do not define this macro if it does not need to do anything. */
350 #ifndef SUBTARGET_EXTRA_SPECS
351 #define SUBTARGET_EXTRA_SPECS
354 #define EXTRA_SPECS \
355 { "cpp_cpu", CPP_CPU_SPEC }, \
356 { "cc1_cpu", CC1_CPU_SPEC }, \
357 SUBTARGET_EXTRA_SPECS
359 /* target machine storage layout */
361 /* Define for XFmode extended real floating point support.
362 This will automatically cause REAL_ARITHMETIC to be defined. */
363 #define LONG_DOUBLE_TYPE_SIZE 96
365 /* Define if you don't want extended real, but do want to use the
366 software floating point emulator for REAL_ARITHMETIC and
367 decimal <-> binary conversion. */
368 /* #define REAL_ARITHMETIC */
370 /* Define this if most significant byte of a word is the lowest numbered. */
371 /* That is true on the 80386. */
373 #define BITS_BIG_ENDIAN 0
375 /* Define this if most significant byte of a word is the lowest numbered. */
376 /* That is not true on the 80386. */
377 #define BYTES_BIG_ENDIAN 0
379 /* Define this if most significant word of a multiword number is the lowest
381 /* Not true for 80386 */
382 #define WORDS_BIG_ENDIAN 0
384 /* number of bits in an addressable storage unit */
385 #define BITS_PER_UNIT 8
387 /* Width in bits of a "word", which is the contents of a machine register.
388 Note that this is not necessarily the width of data type `int';
389 if using 16-bit ints on a 80386, this would still be 32.
390 But on a machine with 16-bit registers, this would be 16. */
391 #define BITS_PER_WORD 32
393 /* Width of a word, in units (bytes). */
394 #define UNITS_PER_WORD 4
396 /* Width in bits of a pointer.
397 See also the macro `Pmode' defined below. */
398 #define POINTER_SIZE 32
400 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
401 #define PARM_BOUNDARY 32
403 /* Boundary (in *bits*) on which stack pointer should be aligned. */
404 #define STACK_BOUNDARY 32
406 /* Allocation boundary (in *bits*) for the code of a function.
407 For i486, we get better performance by aligning to a cache
408 line (i.e. 16 byte) boundary. */
409 #define FUNCTION_BOUNDARY (1 << (i386_align_funcs + 3))
411 /* Alignment of field after `int : 0' in a structure. */
413 #define EMPTY_FIELD_BOUNDARY 32
415 /* Minimum size in bits of the largest boundary to which any
416 and all fundamental data types supported by the hardware
417 might need to be aligned. No data type wants to be aligned
418 rounder than this. The i386 supports 64-bit floating point
419 quantities, but these can be aligned on any 32-bit boundary.
420 The published ABIs say that doubles should be aligned on word
421 boundaries, but the Pentium gets better performance with them
422 aligned on 64 bit boundaries. */
423 #define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32)
425 /* align DFmode constants and nonaggregates */
426 #define ALIGN_DFmode (!TARGET_386)
428 /* Set this non-zero if move instructions will actually fail to work
429 when given unaligned data. */
430 #define STRICT_ALIGNMENT 0
432 /* If bit field type is int, don't let it cross an int,
433 and give entire struct the alignment of an int. */
434 /* Required on the 386 since it doesn't have bitfield insns. */
435 #define PCC_BITFIELD_TYPE_MATTERS 1
437 /* An integer expression for the size in bits of the largest integer
438 machine mode that should actually be used. All integer machine modes of
439 this size or smaller can be used for structures and unions with the
440 appropriate sizes. */
441 #define MAX_FIXED_MODE_SIZE 32
443 /* Maximum power of 2 that code can be aligned to. */
444 #define MAX_CODE_ALIGN 6 /* 64 byte alignment */
446 /* Align loop starts for optimal branching. */
447 #define ASM_OUTPUT_LOOP_ALIGN(FILE) ASM_OUTPUT_ALIGN (FILE, i386_align_loops)
449 /* This is how to align an instruction for optimal branching.
450 On i486 we'll get better performance by aligning on a
451 cache line (i.e. 16 byte) boundary. */
452 #define ASM_OUTPUT_ALIGN_CODE(FILE) ASM_OUTPUT_ALIGN ((FILE), i386_align_jumps)
455 /* Standard register usage. */
457 /* This processor has special stack-like registers. See reg-stack.c
461 #define IS_STACK_MODE(mode) (mode==DFmode || mode==SFmode || mode==XFmode)
463 /* Number of actual hardware registers.
464 The hardware registers are assigned numbers for the compiler
465 from 0 to just below FIRST_PSEUDO_REGISTER.
466 All registers that the compiler knows about must be given numbers,
467 even those that are not normally considered general registers.
469 In the 80386 we give the 8 general purpose registers the numbers 0-7.
470 We number the floating point registers 8-15.
471 Note that registers 0-7 can be accessed as a short or int,
472 while only 0-3 may be used with byte `mov' instructions.
474 Reg 16 does not correspond to any hardware register, but instead
475 appears in the RTL as an argument pointer prior to reload, and is
476 eliminated during reloading in favor of either the stack or frame
479 #define FIRST_PSEUDO_REGISTER 17
481 /* 1 for registers that have pervasive standard uses
482 and are not available for the register allocator.
483 On the 80386, the stack pointer is such, as is the arg pointer. */
484 #define FIXED_REGISTERS \
485 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
486 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
488 /* 1 for registers not available across function calls.
489 These must include the FIXED_REGISTERS and also any
490 registers that can be used without being saved.
491 The latter must include the registers where values are returned
492 and the register where structure-value addresses are passed.
493 Aside from that, you can include as many other registers as you like. */
495 #define CALL_USED_REGISTERS \
496 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
497 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
499 /* Order in which to allocate registers. Each register must be
500 listed once, even those in FIXED_REGISTERS. List frame pointer
501 late and fixed registers last. Note that, in general, we prefer
502 registers listed in CALL_USED_REGISTERS, keeping the others
503 available for storage of persistent values.
505 Three different versions of REG_ALLOC_ORDER have been tried:
507 If the order is edx, ecx, eax, ... it produces a slightly faster compiler,
508 but slower code on simple functions returning values in eax.
510 If the order is eax, ecx, edx, ... it causes reload to abort when compiling
511 perl 4.036 due to not being able to create a DImode register (to hold a 2
514 If the order is eax, edx, ecx, ... it produces better code for simple
515 functions, and a slightly slower compiler. Users complained about the code
516 generated by allocating edx first, so restore the 'natural' order of things. */
518 #define REG_ALLOC_ORDER \
519 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
520 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 }
522 /* A C statement (sans semicolon) to choose the order in which to
523 allocate hard registers for pseudo-registers local to a basic
526 Store the desired register order in the array `reg_alloc_order'.
527 Element 0 should be the register to allocate first; element 1, the
528 next register; and so on.
530 The macro body should not assume anything about the contents of
531 `reg_alloc_order' before execution of the macro.
533 On most machines, it is not necessary to define this macro. */
535 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
537 /* Macro to conditionally modify fixed_regs/call_used_regs. */
538 #define CONDITIONAL_REGISTER_USAGE \
542 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
543 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
545 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
549 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
550 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
551 if (TEST_HARD_REG_BIT (x, i)) \
552 fixed_regs[i] = call_used_regs[i] = 1; \
556 /* Return number of consecutive hard regs needed starting at reg REGNO
557 to hold something of mode MODE.
558 This is ordinarily the length in words of a value of mode MODE
559 but can be less for certain modes in special long registers.
561 Actually there are no two word move instructions for consecutive
562 registers. And only registers 0-3 may have mov byte instructions
566 #define HARD_REGNO_NREGS(REGNO, MODE) \
567 (FP_REGNO_P (REGNO) ? 1 \
568 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
570 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
571 On the 80386, the first 4 cpu registers can hold any mode
572 while the floating point registers may hold only floating point.
573 Make it clear that the fp regs could not hold a 16-byte float. */
575 /* The casts to int placate a compiler on a microvax,
576 for cross-compiler testing. */
578 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
581 : FP_REGNO_P (REGNO) \
582 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
583 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
584 && GET_MODE_UNIT_SIZE (MODE) <= (LONG_DOUBLE_TYPE_SIZE == 96 ? 12 : 8))\
585 : (int) (MODE) != (int) QImode ? 1 \
586 : (reload_in_progress | reload_completed) == 1)
588 /* Value is 1 if it is a good idea to tie two pseudo registers
589 when one has mode MODE1 and one has mode MODE2.
590 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
591 for any hard reg, then this must be 0 for correct output. */
593 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
595 /* Specify the registers used for certain standard purposes.
596 The values of these macros are register numbers. */
598 /* on the 386 the pc register is %eip, and is not usable as a general
599 register. The ordinary mov instructions won't work */
600 /* #define PC_REGNUM */
602 /* Register to use for pushing function arguments. */
603 #define STACK_POINTER_REGNUM 7
605 /* Base register for access to local variables of the function. */
606 #define FRAME_POINTER_REGNUM 6
608 /* First floating point reg */
609 #define FIRST_FLOAT_REG 8
611 /* First & last stack-like regs */
612 #define FIRST_STACK_REG FIRST_FLOAT_REG
613 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
615 /* Value should be nonzero if functions must have frame pointers.
616 Zero means the frame pointer need not be set up (and parms
617 may be accessed via the stack pointer) in functions that seem suitable.
618 This is computed in `reload', in reload1.c. */
619 #define FRAME_POINTER_REQUIRED (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ())
621 /* Base register for access to arguments of the function. */
622 #define ARG_POINTER_REGNUM 16
624 /* Register in which static-chain is passed to a function. */
625 #define STATIC_CHAIN_REGNUM 2
627 /* Register to hold the addressing base for position independent
628 code access to data items. */
629 #define PIC_OFFSET_TABLE_REGNUM 3
631 /* Register in which address to store a structure value
632 arrives in the function. On the 386, the prologue
633 copies this from the stack to register %eax. */
634 #define STRUCT_VALUE_INCOMING 0
636 /* Place in which caller passes the structure value address.
637 0 means push the value on the stack like an argument. */
638 #define STRUCT_VALUE 0
640 /* A C expression which can inhibit the returning of certain function
641 values in registers, based on the type of value. A nonzero value
642 says to return the function value in memory, just as large
643 structures are always returned. Here TYPE will be a C expression
644 of type `tree', representing the data type of the value.
646 Note that values of mode `BLKmode' must be explicitly handled by
647 this macro. Also, the option `-fpcc-struct-return' takes effect
648 regardless of this macro. On most systems, it is possible to
649 leave the macro undefined; this causes a default definition to be
650 used, whose value is the constant 1 for `BLKmode' values, and 0
653 Do not use this macro to indicate that structures and unions
654 should always be returned in memory. You should instead use
655 `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */
657 #define RETURN_IN_MEMORY(TYPE) \
658 ((TYPE_MODE (TYPE) == BLKmode) || int_size_in_bytes (TYPE) > 12)
661 /* Define the classes of registers for register constraints in the
662 machine description. Also define ranges of constants.
664 One of the classes must always be named ALL_REGS and include all hard regs.
665 If there is more than one class, another class must be named NO_REGS
666 and contain no registers.
668 The name GENERAL_REGS must be the name of a class (or an alias for
669 another name such as ALL_REGS). This is the class of registers
670 that is allowed by "g" or "r" in a register constraint.
671 Also, registers outside this class are allocated only when
672 instructions express preferences for them.
674 The classes must be numbered in nondecreasing order; that is,
675 a larger-numbered class must never be contained completely
676 in a smaller-numbered class.
678 For any two classes, it is very desirable that there be another
679 class that represents their union.
681 It might seem that class BREG is unnecessary, since no useful 386
682 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
683 and the "b" register constraint is useful in asms for syscalls. */
688 AREG
, DREG
, CREG
, BREG
,
689 AD_REGS
, /* %eax/%edx for DImode */
690 Q_REGS
, /* %eax %ebx %ecx %edx */
692 INDEX_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp */
693 GENERAL_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
694 FP_TOP_REG
, FP_SECOND_REG
, /* %st(0) %st(1) */
696 ALL_REGS
, LIM_REG_CLASSES
699 #define N_REG_CLASSES (int) LIM_REG_CLASSES
701 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
703 /* Give names of register classes as strings for dump file. */
705 #define REG_CLASS_NAMES \
707 "AREG", "DREG", "CREG", "BREG", \
713 "FP_TOP_REG", "FP_SECOND_REG", \
717 /* Define which registers fit in which classes.
718 This is an initializer for a vector of HARD_REG_SET
719 of length N_REG_CLASSES. */
721 #define REG_CLASS_CONTENTS \
723 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
726 0x10, 0x20, /* SIREG, DIREG */ \
727 0x7f, /* INDEX_REGS */ \
728 0x100ff, /* GENERAL_REGS */ \
729 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
730 0xff00, /* FLOAT_REGS */ \
733 /* The same information, inverted:
734 Return the class number of the smallest class containing
735 reg number REGNO. This could be a conditional expression
736 or could index an array. */
738 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
740 /* When defined, the compiler allows registers explicitly used in the
741 rtl to be used as spill registers but prevents the compiler from
742 extending the lifetime of these registers. */
744 #define SMALL_REGISTER_CLASSES 1
746 #define QI_REG_P(X) \
747 (REG_P (X) && REGNO (X) < 4)
748 #define NON_QI_REG_P(X) \
749 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
751 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
752 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
754 #define STACK_REG_P(xop) (REG_P (xop) && \
755 REGNO (xop) >= FIRST_STACK_REG && \
756 REGNO (xop) <= LAST_STACK_REG)
758 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
760 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
762 /* Try to maintain the accuracy of the death notes for regs satisfying the
763 following. Important for stack like regs, to know when to pop. */
765 /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
767 /* 1 if register REGNO can magically overlap other regs.
768 Note that nonzero values work only in very special circumstances. */
770 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
772 /* The class value for index registers, and the one for base regs. */
774 #define INDEX_REG_CLASS INDEX_REGS
775 #define BASE_REG_CLASS GENERAL_REGS
777 /* Get reg_class from a letter such as appears in the machine description. */
779 #define REG_CLASS_FROM_LETTER(C) \
780 ((C) == 'r' ? GENERAL_REGS : \
781 (C) == 'q' ? Q_REGS : \
782 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
785 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
788 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
791 (C) == 'a' ? AREG : \
792 (C) == 'b' ? BREG : \
793 (C) == 'c' ? CREG : \
794 (C) == 'd' ? DREG : \
795 (C) == 'A' ? AD_REGS : \
796 (C) == 'D' ? DIREG : \
797 (C) == 'S' ? SIREG : NO_REGS)
799 /* The letters I, J, K, L and M in a register constraint string
800 can be used to stand for particular ranges of immediate operands.
801 This macro defines what the ranges are.
802 C is the letter, and VALUE is a constant value.
803 Return 1 if VALUE is in the range specified by C.
805 I is for non-DImode shifts.
806 J is for DImode shifts.
807 K and L are for an `andsi' optimization.
808 M is for shifts that can be executed by the "lea" opcode.
811 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
812 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
813 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
814 (C) == 'K' ? (VALUE) == 0xff : \
815 (C) == 'L' ? (VALUE) == 0xffff : \
816 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
817 (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\
818 (C) == 'O' ? (VALUE) >= 0 && (VALUE) <= 32 : \
821 /* Similar, but for floating constants, and defining letters G and H.
822 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
823 TARGET_387 isn't set, because the stack register converter may need to
824 load 0.0 into the function value register. */
826 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
827 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
829 /* Place additional restrictions on the register class to use when it
830 is necessary to be able to hold a value of mode MODE in a reload
831 register for which class CLASS would ordinarily be used. */
833 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
834 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
837 /* Given an rtx X being reloaded into a reg required to be
838 in class CLASS, return the class of reg to actually use.
839 In general this is just CLASS; but on some machines
840 in some cases it is preferable to use a more restrictive class.
841 On the 80386 series, we prevent floating constants from being
842 reloaded into floating registers (since no move-insn can do that)
843 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
845 /* Put float CONST_DOUBLE in the constant pool instead of fp regs.
846 QImode must go into class Q_REGS.
847 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
848 movdf to do mem-to-mem moves through integer regs. */
850 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
851 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \
852 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
853 : ((CLASS) == ALL_REGS \
854 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
857 /* If we are copying between general and FP registers, we need a memory
860 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
861 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
862 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
864 /* Return the maximum number of consecutive registers
865 needed to represent mode MODE in a register of class CLASS. */
866 /* On the 80386, this is the size of MODE in words,
867 except in the FP regs, where a single reg is always enough. */
868 #define CLASS_MAX_NREGS(CLASS, MODE) \
869 (FLOAT_CLASS_P (CLASS) ? 1 : \
870 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
872 /* A C expression whose value is nonzero if pseudos that have been
873 assigned to registers of class CLASS would likely be spilled
874 because registers of CLASS are needed for spill registers.
876 The default value of this macro returns 1 if CLASS has exactly one
877 register and zero otherwise. On most machines, this default
878 should be used. Only define this macro to some other expression
879 if pseudo allocated by `local-alloc.c' end up in memory because
880 their hard registers were needed for spill registers. If this
881 macro returns nonzero for those classes, those pseudos will only
882 be allocated by `global.c', which knows how to reallocate the
883 pseudo to another register. If there would not be another
884 register available for reallocation, you should not change the
885 definition of this macro since the only effect of such a
886 definition would be to slow down register allocation. */
888 #define CLASS_LIKELY_SPILLED_P(CLASS) \
890 || ((CLASS) == DREG) \
891 || ((CLASS) == CREG) \
892 || ((CLASS) == BREG) \
893 || ((CLASS) == AD_REGS) \
894 || ((CLASS) == SIREG) \
895 || ((CLASS) == DIREG))
898 /* Stack layout; function entry, exit and calling. */
900 /* Define this if pushing a word on the stack
901 makes the stack pointer a smaller address. */
902 #define STACK_GROWS_DOWNWARD
904 /* Define this if the nominal address of the stack frame
905 is at the high-address end of the local variables;
906 that is, each additional local variable allocated
907 goes at a more negative offset in the frame. */
908 #define FRAME_GROWS_DOWNWARD
910 /* Offset within stack frame to start allocating local variables at.
911 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
912 first local allocated. Otherwise, it is the offset to the BEGINNING
913 of the first local allocated. */
914 #define STARTING_FRAME_OFFSET 0
916 /* If we generate an insn to push BYTES bytes,
917 this says how many the stack pointer really advances by.
918 On 386 pushw decrements by exactly 2 no matter what the position was.
919 On the 386 there is no pushb; we use pushw instead, and this
920 has the effect of rounding up to 2. */
922 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
924 /* Offset of first parameter from the argument pointer register value. */
925 #define FIRST_PARM_OFFSET(FNDECL) 0
927 /* Value is the number of bytes of arguments automatically
928 popped when returning from a subroutine call.
929 FUNDECL is the declaration node of the function (as a tree),
930 FUNTYPE is the data type of the function (as a tree),
931 or for a library call it is an identifier node for the subroutine name.
932 SIZE is the number of bytes of arguments passed on the stack.
934 On the 80386, the RTD insn may be used to pop them if the number
935 of args is fixed, but if the number is variable then the caller
936 must pop them all. RTD can't be used for library calls now
937 because the library is compiled with the Unix compiler.
938 Use of RTD is a selectable option, since it is incompatible with
939 standard Unix calling sequences. If the option is not selected,
940 the caller must always pop the args.
942 The attribute stdcall is equivalent to RTD on a per module basis. */
944 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
945 (i386_return_pops_args (FUNDECL, FUNTYPE, SIZE))
947 /* Define how to find the value returned by a function.
948 VALTYPE is the data type of the value (as a tree).
949 If the precise function being called is known, FUNC is its FUNCTION_DECL;
950 otherwise, FUNC is 0. */
951 #define FUNCTION_VALUE(VALTYPE, FUNC) \
952 gen_rtx (REG, TYPE_MODE (VALTYPE), \
953 VALUE_REGNO (TYPE_MODE (VALTYPE)))
955 /* Define how to find the value returned by a library function
956 assuming the value has mode MODE. */
958 #define LIBCALL_VALUE(MODE) \
959 gen_rtx (REG, MODE, VALUE_REGNO (MODE))
961 /* Define the size of the result block used for communication between
962 untyped_call and untyped_return. The block contains a DImode value
963 followed by the block used by fnsave and frstor. */
965 #define APPLY_RESULT_SIZE (8+108)
967 /* 1 if N is a possible register number for function argument passing. */
968 #define FUNCTION_ARG_REGNO_P(N) ((N) >= 0 && (N) < REGPARM_MAX)
970 /* Define a data type for recording info about an argument list
971 during the scan of that argument list. This data type should
972 hold all necessary information about the function itself
973 and about the args processed so far, enough to enable macros
974 such as FUNCTION_ARG to determine where the next arg should go. */
976 typedef struct i386_args
{
977 int words
; /* # words passed so far */
978 int nregs
; /* # registers available for passing */
979 int regno
; /* next available register number */
982 /* Initialize a variable CUM of type CUMULATIVE_ARGS
983 for a call to a function whose data type is FNTYPE.
984 For a library call, FNTYPE is 0. */
986 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
987 (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
989 /* Update the data in CUM to advance over an argument
990 of mode MODE and data type TYPE.
991 (TYPE is null for libcalls where that information may not be available.) */
993 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
994 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
996 /* Define where to put the arguments to a function.
997 Value is zero to push the argument on the stack,
998 or a hard register in which to store the argument.
1000 MODE is the argument's machine mode.
1001 TYPE is the data type of the argument (as a tree).
1002 This is null for libcalls where that information may
1004 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1005 the preceding args and about the function being called.
1006 NAMED is nonzero if this argument is a named parameter
1007 (otherwise it is an extra parameter matching an ellipsis). */
1009 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1010 (function_arg (&CUM, MODE, TYPE, NAMED))
1012 /* For an arg passed partly in registers and partly in memory,
1013 this is the number of registers used.
1014 For args passed entirely in registers or entirely in memory, zero. */
1016 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1017 (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED))
1019 /* This macro is invoked just before the start of a function.
1020 It is used here to output code for -fpic that will load the
1021 return address into %ebx. */
1023 #undef ASM_OUTPUT_FUNCTION_PREFIX
1024 #define ASM_OUTPUT_FUNCTION_PREFIX(FILE, FNNAME) \
1025 asm_output_function_prefix (FILE, FNNAME)
1027 /* This macro generates the assembly code for function entry.
1028 FILE is a stdio stream to output the code to.
1029 SIZE is an int: how many units of temporary storage to allocate.
1030 Refer to the array `regs_ever_live' to determine which registers
1031 to save; `regs_ever_live[I]' is nonzero if register number I
1032 is ever used in the function. This macro is responsible for
1033 knowing which registers should not be saved even if used. */
1035 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1036 function_prologue (FILE, SIZE)
1038 /* Output assembler code to FILE to increment profiler label # LABELNO
1039 for profiling a function entry. */
1041 #define FUNCTION_PROFILER(FILE, LABELNO) \
1045 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
1046 LPREFIX, (LABELNO)); \
1047 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
1051 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
1052 fprintf (FILE, "\tcall _mcount\n"); \
1057 /* There are three profiling modes for basic blocks available.
1058 The modes are selected at compile time by using the options
1059 -a or -ax of the gnu compiler.
1060 The variable `profile_block_flag' will be set according to the
1063 profile_block_flag == 0, no option used:
1067 profile_block_flag == 1, -a option used.
1069 Count frequency of execution of every basic block.
1071 profile_block_flag == 2, -ax option used.
1073 Generate code to allow several different profiling modes at run time.
1074 Available modes are:
1075 Produce a trace of all basic blocks.
1076 Count frequency of jump instructions executed.
1077 In every mode it is possible to start profiling upon entering
1078 certain functions and to disable profiling of some other functions.
1080 The result of basic-block profiling will be written to a file `bb.out'.
1081 If the -ax option is used parameters for the profiling will be read
1086 /* The following macro shall output assembler code to FILE
1087 to initialize basic-block profiling.
1089 If profile_block_flag == 2
1091 Output code to call the subroutine `__bb_init_trace_func'
1092 and pass two parameters to it. The first parameter is
1093 the address of a block allocated in the object module.
1094 The second parameter is the number of the first basic block
1097 The name of the block is a local symbol made with this statement:
1099 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1101 Of course, since you are writing the definition of
1102 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1103 can take a short cut in the definition of this macro and use the
1104 name that you know will result.
1106 The number of the first basic block of the function is
1107 passed to the macro in BLOCK_OR_LABEL.
1109 If described in a virtual assembler language the code to be
1113 parameter2 <- BLOCK_OR_LABEL
1114 call __bb_init_trace_func
1116 else if profile_block_flag != 0
1118 Output code to call the subroutine `__bb_init_func'
1119 and pass one single parameter to it, which is the same
1120 as the first parameter to `__bb_init_trace_func'.
1122 The first word of this parameter is a flag which will be nonzero if
1123 the object module has already been initialized. So test this word
1124 first, and do not call `__bb_init_func' if the flag is nonzero.
1125 Note: When profile_block_flag == 2 the test need not be done
1126 but `__bb_init_trace_func' *must* be called.
1128 BLOCK_OR_LABEL may be used to generate a label number as a
1129 branch destination in case `__bb_init_func' will not be called.
1131 If described in a virtual assembler language the code to be
1142 #undef FUNCTION_BLOCK_PROFILER
1143 #define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \
1146 static int num_func = 0; \
1148 char block_table[80], false_label[80]; \
1150 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1152 xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
1153 xops[5] = stack_pointer_rtx; \
1154 xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
1156 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1158 switch (profile_block_flag) \
1163 xops[2] = GEN_INT ((BLOCK_OR_LABEL)); \
1164 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_trace_func")); \
1165 xops[6] = GEN_INT (8); \
1167 output_asm_insn (AS1(push%L2,%2), xops); \
1169 output_asm_insn (AS1(push%L1,%1), xops); \
1172 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1173 output_asm_insn (AS1 (push%L7,%7), xops); \
1176 output_asm_insn (AS1(call,%P3), xops); \
1177 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1183 ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \
1185 xops[0] = const0_rtx; \
1186 xops[2] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, false_label)); \
1187 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_func")); \
1188 xops[4] = gen_rtx (MEM, Pmode, xops[1]); \
1189 xops[6] = GEN_INT (4); \
1191 CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \
1193 output_asm_insn (AS2(cmp%L4,%0,%4), xops); \
1194 output_asm_insn (AS1(jne,%2), xops); \
1197 output_asm_insn (AS1(push%L1,%1), xops); \
1200 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1201 output_asm_insn (AS1 (push%L7,%7), xops); \
1204 output_asm_insn (AS1(call,%P3), xops); \
1205 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1206 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LPBZ", num_func); \
1215 /* The following macro shall output assembler code to FILE
1216 to increment a counter associated with basic block number BLOCKNO.
1218 If profile_block_flag == 2
1220 Output code to initialize the global structure `__bb' and
1221 call the function `__bb_trace_func' which will increment the
1224 `__bb' consists of two words. In the first word the number
1225 of the basic block has to be stored. In the second word
1226 the address of a block allocated in the object module
1229 The basic block number is given by BLOCKNO.
1231 The address of the block is given by the label created with
1233 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1235 by FUNCTION_BLOCK_PROFILER.
1237 Of course, since you are writing the definition of
1238 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1239 can take a short cut in the definition of this macro and use the
1240 name that you know will result.
1242 If described in a virtual assembler language the code to be
1245 move BLOCKNO -> (__bb)
1246 move LPBX0 -> (__bb+4)
1247 call __bb_trace_func
1249 Note that function `__bb_trace_func' must not change the
1250 machine state, especially the flag register. To grant
1251 this, you must output code to save and restore registers
1252 either in this macro or in the macros MACHINE_STATE_SAVE
1253 and MACHINE_STATE_RESTORE. The last two macros will be
1254 used in the function `__bb_trace_func', so you must make
1255 sure that the function prologue does not change any
1256 register prior to saving it with MACHINE_STATE_SAVE.
1258 else if profile_block_flag != 0
1260 Output code to increment the counter directly.
1261 Basic blocks are numbered separately from zero within each
1262 compiled object module. The count associated with block number
1263 BLOCKNO is at index BLOCKNO in an array of words; the name of
1264 this array is a local symbol made with this statement:
1266 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
1268 Of course, since you are writing the definition of
1269 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1270 can take a short cut in the definition of this macro and use the
1271 name that you know will result.
1273 If described in a virtual assembler language the code to be
1276 inc (LPBX2+4*BLOCKNO)
1280 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1283 rtx xops[8], cnt_rtx; \
1285 char *block_table = counts; \
1287 switch (profile_block_flag) \
1292 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1294 xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
1295 xops[2] = GEN_INT ((BLOCKNO)); \
1296 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_trace_func")); \
1297 xops[4] = gen_rtx (SYMBOL_REF, VOIDmode, "__bb"); \
1298 xops[5] = plus_constant (xops[4], 4); \
1299 xops[0] = gen_rtx (MEM, SImode, xops[4]); \
1300 xops[6] = gen_rtx (MEM, SImode, xops[5]); \
1302 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1304 fprintf(FILE, "\tpushf\n"); \
1305 output_asm_insn (AS2(mov%L0,%2,%0), xops); \
1308 xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
1309 output_asm_insn (AS1(push%L7,%7), xops); \
1310 output_asm_insn (AS2(lea%L7,%a1,%7), xops); \
1311 output_asm_insn (AS2(mov%L6,%7,%6), xops); \
1312 output_asm_insn (AS1(pop%L7,%7), xops); \
1315 output_asm_insn (AS2(mov%L6,%1,%6), xops); \
1316 output_asm_insn (AS1(call,%P3), xops); \
1317 fprintf(FILE, "\tpopf\n"); \
1323 ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \
1324 cnt_rtx = gen_rtx (SYMBOL_REF, VOIDmode, counts); \
1325 SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \
1328 cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \
1331 cnt_rtx = gen_rtx (PLUS, Pmode, pic_offset_table_rtx, cnt_rtx); \
1333 xops[0] = gen_rtx (MEM, SImode, cnt_rtx); \
1334 output_asm_insn (AS1(inc%L0,%0), xops); \
1342 /* The following macro shall output assembler code to FILE
1343 to indicate a return from function during basic-block profiling.
1345 If profiling_block_flag == 2:
1347 Output assembler code to call function `__bb_trace_ret'.
1349 Note that function `__bb_trace_ret' must not change the
1350 machine state, especially the flag register. To grant
1351 this, you must output code to save and restore registers
1352 either in this macro or in the macros MACHINE_STATE_SAVE_RET
1353 and MACHINE_STATE_RESTORE_RET. The last two macros will be
1354 used in the function `__bb_trace_ret', so you must make
1355 sure that the function prologue does not change any
1356 register prior to saving it with MACHINE_STATE_SAVE_RET.
1358 else if profiling_block_flag != 0:
1360 The macro will not be used, so it need not distinguish
1364 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
1369 xops[0] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_trace_ret")); \
1371 output_asm_insn (AS1(call,%P0), xops); \
1376 /* The function `__bb_trace_func' is called in every basic block
1377 and is not allowed to change the machine state. Saving (restoring)
1378 the state can either be done in the BLOCK_PROFILER macro,
1379 before calling function (rsp. after returning from function)
1380 `__bb_trace_func', or it can be done inside the function by
1381 defining the macros:
1383 MACHINE_STATE_SAVE(ID)
1384 MACHINE_STATE_RESTORE(ID)
1386 In the latter case care must be taken, that the prologue code
1387 of function `__bb_trace_func' does not already change the
1388 state prior to saving it with MACHINE_STATE_SAVE.
1390 The parameter `ID' is a string identifying a unique macro use.
1392 On the i386 the initialization code at the begin of
1393 function `__bb_trace_func' contains a `sub' instruction
1394 therefore we handle save and restore of the flag register
1395 in the BLOCK_PROFILER macro. */
1397 #define MACHINE_STATE_SAVE(ID) \
1398 asm (" pushl %eax"); \
1399 asm (" pushl %ecx"); \
1400 asm (" pushl %edx"); \
1401 asm (" pushl %esi");
1403 #define MACHINE_STATE_RESTORE(ID) \
1404 asm (" popl %esi"); \
1405 asm (" popl %edx"); \
1406 asm (" popl %ecx"); \
1409 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1410 the stack pointer does not matter. The value is tested only in
1411 functions that have frame pointers.
1412 No definition is equivalent to always zero. */
1413 /* Note on the 386 it might be more efficient not to define this since
1414 we have to restore it ourselves from the frame pointer, in order to
1417 #define EXIT_IGNORE_STACK 1
1419 /* This macro generates the assembly code for function exit,
1420 on machines that need it. If FUNCTION_EPILOGUE is not defined
1421 then individual return instructions are generated for each
1422 return statement. Args are same as for FUNCTION_PROLOGUE.
1424 The function epilogue should not depend on the current stack pointer!
1425 It should use the frame pointer only. This is mandatory because
1426 of alloca; we also take advantage of it to omit stack adjustments
1429 If the last non-note insn in the function is a BARRIER, then there
1430 is no need to emit a function prologue, because control does not fall
1431 off the end. This happens if the function ends in an "exit" call, or
1432 if a `return' insn is emitted directly into the function. */
1435 #define FUNCTION_BEGIN_EPILOGUE(FILE) \
1437 rtx last = get_last_insn (); \
1438 if (last && GET_CODE (last) == NOTE) \
1439 last = prev_nonnote_insn (last); \
1440 /* if (! last || GET_CODE (last) != BARRIER) \
1441 function_epilogue (FILE, SIZE);*/ \
1445 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1446 function_epilogue (FILE, SIZE)
1448 /* Output assembler code for a block containing the constant parts
1449 of a trampoline, leaving space for the variable parts. */
1451 /* On the 386, the trampoline contains three instructions:
1455 #define TRAMPOLINE_TEMPLATE(FILE) \
1457 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
1458 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1459 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1460 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
1461 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1462 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1463 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
1464 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
1467 /* Length in units of the trampoline for entering a nested function. */
1469 #define TRAMPOLINE_SIZE 12
1471 /* Emit RTL insns to initialize the variable parts of a trampoline.
1472 FNADDR is an RTX for the address of the function's pure code.
1473 CXT is an RTX for the static chain value for the function. */
1475 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1477 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
1478 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
1481 /* Definitions for register eliminations.
1483 This is an array of structures. Each structure initializes one pair
1484 of eliminable registers. The "from" register number is given first,
1485 followed by "to". Eliminations of the same "from" register are listed
1486 in order of preference.
1488 We have two registers that can be eliminated on the i386. First, the
1489 frame pointer register can often be eliminated in favor of the stack
1490 pointer register. Secondly, the argument pointer register can always be
1491 eliminated; it is replaced with either the stack or frame pointer. */
1493 #define ELIMINABLE_REGS \
1494 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1495 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1496 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1498 /* Given FROM and TO register numbers, say whether this elimination is allowed.
1499 Frame pointer elimination is automatically handled.
1501 For the i386, if frame pointer elimination is being done, we would like to
1502 convert ap into sp, not fp.
1504 All other eliminations are valid. */
1506 #define CAN_ELIMINATE(FROM, TO) \
1507 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1508 ? ! frame_pointer_needed \
1511 /* Define the offset between two registers, one to be eliminated, and the other
1512 its replacement, at the start of a routine. */
1514 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1516 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1517 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1523 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
1524 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
1525 || (current_function_uses_pic_offset_table \
1526 && regno == PIC_OFFSET_TABLE_REGNUM)) \
1529 (OFFSET) = offset + get_frame_size (); \
1531 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1532 (OFFSET) += 4; /* Skip saved PC */ \
1536 /* Addressing modes, and classification of registers for them. */
1538 /* #define HAVE_POST_INCREMENT */
1539 /* #define HAVE_POST_DECREMENT */
1541 /* #define HAVE_PRE_DECREMENT */
1542 /* #define HAVE_PRE_INCREMENT */
1544 /* Macros to check register numbers against specific register classes. */
1546 /* These assume that REGNO is a hard or pseudo reg number.
1547 They give nonzero only if REGNO is a hard reg of the suitable class
1548 or a pseudo reg currently allocated to a suitable hard reg.
1549 Since they use reg_renumber, they are safe only once reg_renumber
1550 has been allocated, which happens in local-alloc.c. */
1552 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1553 ((REGNO) < STACK_POINTER_REGNUM \
1554 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
1556 #define REGNO_OK_FOR_BASE_P(REGNO) \
1557 ((REGNO) <= STACK_POINTER_REGNUM \
1558 || (REGNO) == ARG_POINTER_REGNUM \
1559 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
1561 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
1562 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
1564 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1565 and check its validity for a certain class.
1566 We have two alternate definitions for each of them.
1567 The usual definition accepts all pseudo regs; the other rejects
1568 them unless they have been allocated suitable hard regs.
1569 The symbol REG_OK_STRICT causes the latter definition to be used.
1571 Most source files want to accept pseudo regs in the hope that
1572 they will get allocated to the class that the insn wants them to be in.
1573 Source files for reload pass need to be strict.
1574 After reload, it makes no difference, since pseudo regs have
1575 been eliminated by then. */
1578 /* Non strict versions, pseudos are ok */
1579 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1580 (REGNO (X) < STACK_POINTER_REGNUM \
1581 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1583 #define REG_OK_FOR_BASE_NONSTRICT_P(X) \
1584 (REGNO (X) <= STACK_POINTER_REGNUM \
1585 || REGNO (X) == ARG_POINTER_REGNUM \
1586 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1588 #define REG_OK_FOR_STRREG_NONSTRICT_P(X) \
1589 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1591 /* Strict versions, hard registers only */
1592 #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1593 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1594 #define REG_OK_FOR_STRREG_STRICT_P(X) \
1595 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
1597 #ifndef REG_OK_STRICT
1598 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1599 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1600 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_NONSTRICT_P(X)
1603 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1604 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1605 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_STRICT_P(X)
1608 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1609 that is a valid memory address for an instruction.
1610 The MODE argument is the machine mode for the MEM expression
1611 that wants to use this address.
1613 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1614 except for CONSTANT_ADDRESS_P which is usually machine-independent.
1616 See legitimize_pic_address in i386.c for details as to what
1617 constitutes a legitimate address when -fpic is used. */
1619 #define MAX_REGS_PER_ADDRESS 2
1621 #define CONSTANT_ADDRESS_P(X) \
1622 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1623 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1624 || GET_CODE (X) == HIGH)
1626 /* Nonzero if the constant value X is a legitimate general operand.
1627 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1629 #define LEGITIMATE_CONSTANT_P(X) 1
1631 #ifdef REG_OK_STRICT
1632 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1634 if (legitimate_address_p (MODE, X, 1)) \
1639 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1641 if (legitimate_address_p (MODE, X, 0)) \
1647 /* Try machine-dependent ways of modifying an illegitimate address
1648 to be legitimate. If we find one, return the new, valid address.
1649 This macro is used in only one place: `memory_address' in explow.c.
1651 OLDX is the address as it was before break_out_memory_refs was called.
1652 In some cases it is useful to look at this to decide what needs to be done.
1654 MODE and WIN are passed so that this macro can use
1655 GO_IF_LEGITIMATE_ADDRESS.
1657 It is always safe for this macro to do nothing. It exists to recognize
1658 opportunities to optimize the output.
1660 For the 80386, we handle X+REG by loading X into a register R and
1661 using R+REG. R will go in a general reg and indexing will be used.
1662 However, if REG is a broken-out memory address or multiplication,
1663 nothing needs to be done because REG can certainly go in a general reg.
1665 When -fpic is used, special handling is needed for symbolic references.
1666 See comments by legitimize_pic_address in i386.c for details. */
1668 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1671 (X) = legitimize_address (X, OLDX, MODE); \
1672 if (memory_address_p (MODE, X)) \
1676 #define REWRITE_ADDRESS(x) rewrite_address(x)
1678 /* Nonzero if the constant value X is a legitimate general operand
1679 when generating PIC code. It is given that flag_pic is on and
1680 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1682 #define LEGITIMATE_PIC_OPERAND_P(X) \
1683 (! SYMBOLIC_CONST (X) \
1684 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1686 #define SYMBOLIC_CONST(X) \
1687 (GET_CODE (X) == SYMBOL_REF \
1688 || GET_CODE (X) == LABEL_REF \
1689 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1691 /* Go to LABEL if ADDR (a legitimate address expression)
1692 has an effect that depends on the machine mode it is used for.
1693 On the 80386, only postdecrement and postincrement address depend thus
1694 (the amount of decrement or increment being the length of the operand). */
1695 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1696 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1698 /* Define this macro if references to a symbol must be treated
1699 differently depending on something about the variable or
1700 function named by the symbol (such as what section it is in).
1702 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1703 so that we may access it directly in the GOT. */
1705 #define ENCODE_SECTION_INFO(DECL) \
1710 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1711 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1713 if (TARGET_DEBUG_ADDR \
1714 && TREE_CODE_CLASS (TREE_CODE (DECL)) == 'd') \
1716 fprintf (stderr, "Encode %s, public = %s\n", \
1717 IDENTIFIER_POINTER (DECL_NAME (DECL)), \
1718 TREE_PUBLIC (DECL)); \
1721 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1722 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1723 || ! TREE_PUBLIC (DECL)); \
1728 /* Initialize data used by insn expanders. This is called from
1729 init_emit, once for each function, before code is generated.
1730 For 386, clear stack slot assignments remembered from previous
1733 #define INIT_EXPANDERS clear_386_stack_locals ()
1735 /* The `FINALIZE_PIC' macro serves as a hook to emit these special
1736 codes once the function is being compiled into assembly code, but
1737 not before. (It is not done before, because in the case of
1738 compiling an inline function, it would lead to multiple PIC
1739 prologues being included in functions which used inline functions
1740 and were compiled to assembly language.) */
1742 #define FINALIZE_PIC \
1745 extern int current_function_uses_pic_offset_table; \
1747 current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \
1752 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1753 with arguments ARGS is a valid machine specific attribute for DECL.
1754 The attributes in ATTRIBUTES have previously been assigned to DECL. */
1756 #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \
1757 (i386_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS))
1759 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1760 with arguments ARGS is a valid machine specific attribute for TYPE.
1761 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
1763 #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \
1764 (i386_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS))
1766 /* If defined, a C expression whose value is zero if the attributes on
1767 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
1768 two if they are nearly compatible (which causes a warning to be
1771 #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
1772 (i386_comp_type_attributes (TYPE1, TYPE2))
1774 /* If defined, a C statement that assigns default attributes to newly
1777 /* #define SET_DEFAULT_TYPE_ATTRIBUTES (TYPE) */
1779 /* Max number of args passed in registers. If this is more than 3, we will
1780 have problems with ebx (register #4), since it is a caller save register and
1781 is also used as the pic register in ELF. So for now, don't allow more than
1782 3 registers to be passed in registers. */
1784 #define REGPARM_MAX 3
1787 /* Specify the machine mode that this machine uses
1788 for the index in the tablejump instruction. */
1789 #define CASE_VECTOR_MODE Pmode
1791 /* Define this if the tablejump instruction expects the table
1792 to contain offsets from the address of the table.
1793 Do not define this if the table should contain absolute addresses. */
1794 /* #define CASE_VECTOR_PC_RELATIVE */
1796 /* Specify the tree operation to be used to convert reals to integers.
1797 This should be changed to take advantage of fist --wfs ??
1799 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1801 /* This is the kind of divide that is easiest to do in the general case. */
1802 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1804 /* Define this as 1 if `char' should by default be signed; else as 0. */
1805 #define DEFAULT_SIGNED_CHAR 1
1807 /* Max number of bytes we can move from memory to memory
1808 in one reasonably fast instruction. */
1811 /* The number of scalar move insns which should be generated instead
1812 of a string move insn or a library call. Increasing the value
1813 will always make code faster, but eventually incurs high cost in
1814 increased code size.
1816 If you don't define this, a reasonable default is used.
1818 Make this large on i386, since the block move is very inefficient with small
1819 blocks, and the hard register needs of the block move require much reload
1822 #define MOVE_RATIO 5
1824 /* Define if shifts truncate the shift count
1825 which implies one can omit a sign-extension or zero-extension
1826 of a shift count. */
1827 /* On i386, shifts do truncate the count. But bit opcodes don't. */
1829 /* #define SHIFT_COUNT_TRUNCATED */
1831 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1832 is done just by pretending it is already truncated. */
1833 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1835 /* We assume that the store-condition-codes instructions store 0 for false
1836 and some other value for true. This is the value stored for true. */
1838 #define STORE_FLAG_VALUE 1
1840 /* When a prototype says `char' or `short', really pass an `int'.
1841 (The 386 can't easily push less than an int.) */
1843 #define PROMOTE_PROTOTYPES
1845 /* Specify the machine mode that pointers have.
1846 After generation of rtl, the compiler makes no further distinction
1847 between pointers and any other objects of this machine mode. */
1848 #define Pmode SImode
1850 /* A function address in a call instruction
1851 is a byte address (for indexing purposes)
1852 so give the MEM rtx a byte's mode. */
1853 #define FUNCTION_MODE QImode
1855 /* A part of a C `switch' statement that describes the relative costs
1856 of constant RTL expressions. It must contain `case' labels for
1857 expression codes `const_int', `const', `symbol_ref', `label_ref'
1858 and `const_double'. Each case must ultimately reach a `return'
1859 statement to return the relative cost of the use of that kind of
1860 constant value in an expression. The cost may depend on the
1861 precise value of the constant, which is available for examination
1862 in X, and the rtx code of the expression in which it is contained,
1863 found in OUTER_CODE.
1865 CODE is the expression code--redundant, since it can be obtained
1866 with `GET_CODE (X)'. */
1868 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1873 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 1; \
1875 case CONST_DOUBLE: \
1878 if (GET_MODE (RTX) == VOIDmode) \
1881 code = standard_80387_constant_p (RTX); \
1882 return code == 1 ? 0 : \
1887 /* Delete the definition here when TOPLEVEL_COSTS_N_INSNS gets added to cse.c */
1888 #define TOPLEVEL_COSTS_N_INSNS(N) {total = COSTS_N_INSNS (N); break;}
1890 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1891 This can be used, for example, to indicate how costly a multiply
1892 instruction is. In writing this macro, you can use the construct
1893 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1894 instructions. OUTER_CODE is the code of the expression in which X
1897 This macro is optional; do not define it if the default cost
1898 assumptions are adequate for the target machine. */
1900 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1902 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1903 && GET_MODE (XEXP (X, 0)) == SImode) \
1905 HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
1908 return COSTS_N_INSNS (ix86_cost->add) \
1909 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1911 if (value == 2 || value == 3) \
1912 return COSTS_N_INSNS (ix86_cost->lea) \
1913 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1915 /* fall through */ \
1921 if (GET_MODE (XEXP (X, 0)) == DImode) \
1923 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
1924 if (INTVAL (XEXP (X, 1)) > 32) \
1925 return COSTS_N_INSNS(ix86_cost->shift_const + 2); \
1927 return COSTS_N_INSNS(ix86_cost->shift_const * 2); \
1928 return ((GET_CODE (XEXP (X, 1)) == AND \
1929 ? COSTS_N_INSNS(ix86_cost->shift_var * 2) \
1930 : COSTS_N_INSNS(ix86_cost->shift_var * 6 + 2)) \
1931 + rtx_cost(XEXP (X, 0), OUTER_CODE)); \
1933 return COSTS_N_INSNS (GET_CODE (XEXP (X, 1)) == CONST_INT \
1934 ? ix86_cost->shift_const \
1935 : ix86_cost->shift_var) \
1936 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1939 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
1941 unsigned HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
1945 return COSTS_N_INSNS (ix86_cost->add) \
1946 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1947 if (value == 4 || value == 8) \
1948 return COSTS_N_INSNS (ix86_cost->lea) \
1949 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1951 while (value != 0) \
1958 return COSTS_N_INSNS (ix86_cost->shift_const) \
1959 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1961 return COSTS_N_INSNS (ix86_cost->mult_init \
1962 + nbits * ix86_cost->mult_bit) \
1963 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1966 else /* This is arbitrary */ \
1967 TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \
1968 + 7 * ix86_cost->mult_bit); \
1974 TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide); \
1977 if (GET_CODE (XEXP (X, 0)) == REG \
1978 && GET_MODE (XEXP (X, 0)) == SImode \
1979 && GET_CODE (XEXP (X, 1)) == PLUS) \
1980 return COSTS_N_INSNS (ix86_cost->lea); \
1982 /* fall through */ \
1987 if (GET_MODE (X) == DImode) \
1988 return COSTS_N_INSNS (ix86_cost->add) * 2 \
1989 + (rtx_cost (XEXP (X, 0), OUTER_CODE) \
1990 << (GET_MODE (XEXP (X, 0)) != DImode)) \
1991 + (rtx_cost (XEXP (X, 1), OUTER_CODE) \
1992 << (GET_MODE (XEXP (X, 1)) != DImode)); \
1995 if (GET_MODE (X) == DImode) \
1996 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add * 2) \
1997 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add)
2000 /* An expression giving the cost of an addressing mode that contains
2001 ADDRESS. If not defined, the cost is computed from the ADDRESS
2002 expression and the `CONST_COSTS' values.
2004 For most CISC machines, the default cost is a good approximation
2005 of the true cost of the addressing mode. However, on RISC
2006 machines, all instructions normally have the same length and
2007 execution time. Hence all addresses will have equal costs.
2009 In cases where more than one form of an address is known, the form
2010 with the lowest cost will be used. If multiple forms have the
2011 same, lowest, cost, the one that is the most complex will be used.
2013 For example, suppose an address that is equal to the sum of a
2014 register and a constant is used twice in the same basic block.
2015 When this macro is not defined, the address will be computed in a
2016 register and memory references will be indirect through that
2017 register. On machines where the cost of the addressing mode
2018 containing the sum is no higher than that of a simple indirect
2019 reference, this will produce an additional instruction and
2020 possibly require an additional register. Proper specification of
2021 this macro eliminates this overhead for such machines.
2023 Similar use of this macro is made in strength reduction of loops.
2025 ADDRESS need not be valid as an address. In such a case, the cost
2026 is not relevant and can be any value; invalid addresses need not be
2027 assigned a different cost.
2029 On machines where an address involving more than one register is as
2030 cheap as an address computation involving only one register,
2031 defining `ADDRESS_COST' to reflect this can cause two registers to
2032 be live over a region of code where only one would have been if
2033 `ADDRESS_COST' were not defined in that manner. This effect should
2034 be considered in the definition of this macro. Equivalent costs
2035 should probably only be given to addresses with different numbers
2036 of registers on machines with lots of registers.
2038 This macro will normally either not be defined or be defined as a
2041 For i386, it is better to use a complex address than let gcc copy
2042 the address into a reg and make a new pseudo. But not if the address
2043 requires to two regs - that would mean more pseudos with longer
2046 #define ADDRESS_COST(RTX) \
2047 ((CONSTANT_P (RTX) \
2048 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
2049 && REG_P (XEXP (RTX, 0)))) ? 0 \
2053 /* A C expression for the cost of moving data of mode M between a
2054 register and memory. A value of 2 is the default; this cost is
2055 relative to those in `REGISTER_MOVE_COST'.
2057 If moving between registers and memory is more expensive than
2058 between two registers, you should define this macro to express the
2061 On the i386, copying between floating-point and fixed-point
2062 registers is expensive. */
2064 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
2065 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
2066 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
2070 /* A C expression for the cost of moving data of mode M between a
2071 register and memory. A value of 2 is the default; this cost is
2072 relative to those in `REGISTER_MOVE_COST'.
2074 If moving between registers and memory is more expensive than
2075 between two registers, you should define this macro to express the
2078 /* #define MEMORY_MOVE_COST(M) 2 */
2080 /* A C expression for the cost of a branch instruction. A value of 1
2081 is the default; other values are interpreted relative to that. */
2083 #define BRANCH_COST i386_branch_cost
2085 /* Define this macro as a C expression which is nonzero if accessing
2086 less than a word of memory (i.e. a `char' or a `short') is no
2087 faster than accessing a word of memory, i.e., if such access
2088 require more than one instruction or if there is no difference in
2089 cost between byte and (aligned) word loads.
2091 When this macro is not defined, the compiler will access a field by
2092 finding the smallest containing object; when it is defined, a
2093 fullword load will be used if alignment permits. Unless bytes
2094 accesses are faster than word accesses, using word accesses is
2095 preferable since it may eliminate subsequent memory access if
2096 subsequent accesses occur to other fields in the same word of the
2097 structure, but to different bytes. */
2099 #define SLOW_BYTE_ACCESS 0
2101 /* Nonzero if access to memory by shorts is slow and undesirable. */
2102 #define SLOW_SHORT_ACCESS 0
2104 /* Define this macro if zero-extension (of a `char' or `short' to an
2105 `int') can be done faster if the destination is a register that is
2108 If you define this macro, you must have instruction patterns that
2109 recognize RTL structures like this:
2111 (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
2113 and likewise for `HImode'. */
2115 /* #define SLOW_ZERO_EXTEND */
2117 /* Define this macro to be the value 1 if unaligned accesses have a
2118 cost many times greater than aligned accesses, for example if they
2119 are emulated in a trap handler.
2121 When this macro is non-zero, the compiler will act as if
2122 `STRICT_ALIGNMENT' were non-zero when generating code for block
2123 moves. This can cause significantly more instructions to be
2124 produced. Therefore, do not set this macro non-zero if unaligned
2125 accesses only add a cycle or two to the time for a memory access.
2127 If the value of this macro is always zero, it need not be defined. */
2129 /* #define SLOW_UNALIGNED_ACCESS 0 */
2131 /* Define this macro to inhibit strength reduction of memory
2132 addresses. (On some machines, such strength reduction seems to do
2133 harm rather than good.) */
2135 /* #define DONT_REDUCE_ADDR */
2137 /* Define this macro if it is as good or better to call a constant
2138 function address than to call an address kept in a register.
2140 Desirable on the 386 because a CALL with a constant address is
2141 faster than one with a register address. */
2143 #define NO_FUNCTION_CSE
2145 /* Define this macro if it is as good or better for a function to call
2146 itself with an explicit address than to call an address kept in a
2149 #define NO_RECURSIVE_FUNCTION_CSE
2151 /* A C statement (sans semicolon) to update the integer variable COST
2152 based on the relationship between INSN that is dependent on
2153 DEP_INSN through the dependence LINK. The default is to make no
2154 adjustment to COST. This can be used for example to specify to
2155 the scheduler that an output- or anti-dependence does not incur
2156 the same cost as a data-dependence. */
2158 #define ADJUST_COST(insn,link,dep_insn,cost) \
2161 if (GET_CODE (dep_insn) == CALL_INSN) \
2164 else if (GET_CODE (dep_insn) == INSN \
2165 && GET_CODE (PATTERN (dep_insn)) == SET \
2166 && GET_CODE (SET_DEST (PATTERN (dep_insn))) == REG \
2167 && GET_CODE (insn) == INSN \
2168 && GET_CODE (PATTERN (insn)) == SET \
2169 && !reg_overlap_mentioned_p (SET_DEST (PATTERN (dep_insn)), \
2170 SET_SRC (PATTERN (insn)))) \
2175 else if (GET_CODE (insn) == JUMP_INSN) \
2180 if (TARGET_PENTIUM) \
2182 if (cost !=0 && is_fp_insn (insn) && is_fp_insn (dep_insn) \
2183 && !is_fp_dest (dep_insn)) \
2188 if (agi_dependent (insn, dep_insn)) \
2192 else if (GET_CODE (insn) == INSN \
2193 && GET_CODE (PATTERN (insn)) == SET \
2194 && SET_DEST (PATTERN (insn)) == cc0_rtx \
2195 && (next_inst = next_nonnote_insn (insn)) \
2196 && GET_CODE (next_inst) == JUMP_INSN) \
2197 { /* compare probably paired with jump */ \
2202 if (!is_fp_dest (dep_insn)) \
2204 if(!agi_dependent (insn, dep_insn)) \
2206 else if (TARGET_486) \
2210 if (is_fp_store (insn) && is_fp_insn (dep_insn) \
2211 && NEXT_INSN (insn) && NEXT_INSN (NEXT_INSN (insn)) \
2212 && NEXT_INSN (NEXT_INSN (NEXT_INSN (insn))) \
2213 && (GET_CODE (NEXT_INSN (insn)) == INSN) \
2214 && (GET_CODE (NEXT_INSN (NEXT_INSN (insn))) == JUMP_INSN) \
2215 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) == NOTE) \
2216 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) \
2217 == NOTE_INSN_LOOP_END)) \
2224 #define ADJUST_BLOCKAGE(last_insn,insn,blockage) \
2226 if (is_fp_store (last_insn) && is_fp_insn (insn) \
2227 && NEXT_INSN (last_insn) && NEXT_INSN (NEXT_INSN (last_insn)) \
2228 && NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn))) \
2229 && (GET_CODE (NEXT_INSN (last_insn)) == INSN) \
2230 && (GET_CODE (NEXT_INSN (NEXT_INSN (last_insn))) == JUMP_INSN) \
2231 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) == NOTE) \
2232 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) \
2233 == NOTE_INSN_LOOP_END)) \
2240 /* Add any extra modes needed to represent the condition code.
2242 For the i386, we need separate modes when floating-point equality
2243 comparisons are being done. */
2245 #define EXTRA_CC_MODES CCFPEQmode
2247 /* Define the names for the modes specified above. */
2248 #define EXTRA_CC_NAMES "CCFPEQ"
2250 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
2251 return the mode to be used for the comparison.
2253 For floating-point equality comparisons, CCFPEQmode should be used.
2254 VOIDmode should be used in all other cases. */
2256 #define SELECT_CC_MODE(OP,X,Y) \
2257 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
2258 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
2260 /* Define the information needed to generate branch and scc insns. This is
2261 stored from the compare operation. Note that we can't use "rtx" here
2262 since it hasn't been defined! */
2264 extern struct rtx_def
*(*i386_compare_gen
)(), *(*i386_compare_gen_eq
)();
2266 /* Tell final.c how to eliminate redundant test instructions. */
2268 /* Here we define machine-dependent flags and fields in cc_status
2269 (see `conditions.h'). */
2271 /* Set if the cc value was actually from the 80387 and
2272 we are testing eax directly (i.e. no sahf) */
2273 #define CC_TEST_AX 020000
2275 /* Set if the cc value is actually in the 80387, so a floating point
2276 conditional branch must be output. */
2277 #define CC_IN_80387 04000
2279 /* Set if the CC value was stored in a nonstandard way, so that
2280 the state of equality is indicated by zero in the carry bit. */
2281 #define CC_Z_IN_NOT_C 010000
2283 /* Set if the CC value was actually from the 80387 and loaded directly
2284 into the eflags instead of via eax/sahf. */
2285 #define CC_FCOMI 040000
2287 /* Store in cc_status the expressions
2288 that the condition codes will describe
2289 after execution of an instruction whose pattern is EXP.
2290 Do not alter them if the instruction would not alter the cc's. */
2292 #define NOTICE_UPDATE_CC(EXP, INSN) \
2293 notice_update_cc((EXP))
2295 /* Output a signed jump insn. Use template NORMAL ordinarily, or
2296 FLOAT following a floating point comparison.
2297 Use NO_OV following an arithmetic insn that set the cc's
2298 before a test insn that was deleted.
2299 NO_OV may be zero, meaning final should reinsert the test insn
2300 because the jump cannot be handled properly without it. */
2302 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
2304 if (cc_prev_status.flags & CC_IN_80387) \
2306 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
2311 /* Control the assembler format that we output, to the extent
2312 this does not vary between assemblers. */
2314 /* How to refer to registers in assembler output.
2315 This sequence is indexed by compiler's hard-register-number (see above). */
2317 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
2318 For non floating point regs, the following are the HImode names.
2320 For float regs, the stack top is sometimes referred to as "%st(0)"
2321 instead of just "%st". PRINT_REG handles this with the "y" code. */
2323 #define HI_REGISTER_NAMES \
2324 {"ax","dx","cx","bx","si","di","bp","sp", \
2325 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
2327 #define REGISTER_NAMES HI_REGISTER_NAMES
2329 /* Table of additional register names to use in user input. */
2331 #define ADDITIONAL_REGISTER_NAMES \
2332 { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
2333 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
2334 "al", 0, "dl", 1, "cl", 2, "bl", 3, \
2335 "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
2337 /* Note we are omitting these since currently I don't know how
2338 to get gcc to use these, since they want the same but different
2339 number as al, and ax.
2342 /* note the last four are not really qi_registers, but
2343 the md will have to never output movb into one of them
2344 only a movw . There is no movb into the last four regs */
2346 #define QI_REGISTER_NAMES \
2347 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
2349 /* These parallel the array above, and can be used to access bits 8:15
2350 of regs 0 through 3. */
2352 #define QI_HIGH_REGISTER_NAMES \
2353 {"ah", "dh", "ch", "bh", }
2355 /* How to renumber registers for dbx and gdb. */
2357 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
2358 #define DBX_REGISTER_NUMBER(n) \
2369 /* Before the prologue, RA is at 0(%esp). */
2370 #define INCOMING_RETURN_ADDR_RTX \
2371 gen_rtx (MEM, VOIDmode, gen_rtx (REG, VOIDmode, STACK_POINTER_REGNUM))
2373 /* PC is dbx register 8; let's use that column for RA. */
2374 #define DWARF_FRAME_RETURN_COLUMN 8
2376 /* Before the prologue, the top of the frame is at 4(%esp). */
2377 #define INCOMING_FRAME_SP_OFFSET 4
2379 /* This is how to output the definition of a user-level label named NAME,
2380 such as the label on a static function or variable NAME. */
2382 #define ASM_OUTPUT_LABEL(FILE,NAME) \
2383 (assemble_name (FILE, NAME), fputs (":\n", FILE))
2385 /* This is how to output an assembler line defining a `double' constant. */
2387 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2389 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
2390 if (sizeof (int) == sizeof (long)) \
2391 fprintf (FILE, "%s 0x%x,0x%x\n", ASM_LONG, l[0], l[1]); \
2393 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
2396 /* This is how to output a `long double' extended real constant. */
2398 #undef ASM_OUTPUT_LONG_DOUBLE
2399 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
2401 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
2402 if (sizeof (int) == sizeof (long)) \
2403 fprintf (FILE, "%s 0x%x,0x%x,0x%x\n", ASM_LONG, l[0], l[1], l[2]); \
2405 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
2408 /* This is how to output an assembler line defining a `float' constant. */
2410 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2412 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
2413 if (sizeof (int) == sizeof (long)) \
2414 fprintf ((FILE), "%s 0x%x\n", ASM_LONG, l); \
2416 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
2419 /* Store in OUTPUT a string (made with alloca) containing
2420 an assembler-name for a local static variable named NAME.
2421 LABELNO is an integer which is different for each call. */
2423 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2424 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2425 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2429 /* This is how to output an assembler line defining an `int' constant. */
2431 #define ASM_OUTPUT_INT(FILE,VALUE) \
2432 ( fprintf (FILE, "%s ", ASM_LONG), \
2433 output_addr_const (FILE,(VALUE)), \
2436 /* Likewise for `char' and `short' constants. */
2437 /* is this supposed to do align too?? */
2439 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2440 ( fprintf (FILE, "%s ", ASM_SHORT), \
2441 output_addr_const (FILE,(VALUE)), \
2445 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2446 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2447 output_addr_const (FILE,(VALUE)), \
2448 fputs (",", FILE), \
2449 output_addr_const (FILE,(VALUE)), \
2450 fputs (" >> 8\n",FILE))
2454 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
2455 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2456 output_addr_const (FILE, (VALUE)), \
2459 /* This is how to output an assembler line for a numeric constant byte. */
2461 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
2462 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
2464 /* This is how to output an insn to push a register on the stack.
2465 It need not be very fast code. */
2467 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2468 fprintf (FILE, "\tpushl %%e%s\n", reg_names[REGNO])
2470 /* This is how to output an insn to pop a register from the stack.
2471 It need not be very fast code. */
2473 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2474 fprintf (FILE, "\tpopl %%e%s\n", reg_names[REGNO])
2476 /* This is how to output an element of a case-vector that is absolute.
2479 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2480 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
2482 /* This is how to output an element of a case-vector that is relative.
2483 We don't use these on the 386 yet, because the ATT assembler can't do
2484 forward reference the differences.
2487 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
2488 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
2490 /* Define the parentheses used to group arithmetic operations
2491 in assembler code. */
2493 #define ASM_OPEN_PAREN ""
2494 #define ASM_CLOSE_PAREN ""
2496 /* Define results of standard character escape sequences. */
2497 #define TARGET_BELL 007
2498 #define TARGET_BS 010
2499 #define TARGET_TAB 011
2500 #define TARGET_NEWLINE 012
2501 #define TARGET_VT 013
2502 #define TARGET_FF 014
2503 #define TARGET_CR 015
2505 /* Print operand X (an rtx) in assembler syntax to file FILE.
2506 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2507 The CODE z takes the size of operand from the following digit, and
2508 outputs b,w,or l respectively.
2510 On the 80386, we use several such letters:
2511 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
2512 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
2513 R -- print the prefix for register names.
2514 z -- print the opcode suffix for the size of the current operand.
2515 * -- print a star (in certain assembler syntax)
2516 w -- print the operand as if it's a "word" (HImode) even if it isn't.
2517 b -- print the operand as if it's a byte (QImode) even if it isn't.
2518 c -- don't print special prefixes before constant operands. */
2520 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2523 /* Print the name of a register based on its machine mode and number.
2524 If CODE is 'w', pretend the mode is HImode.
2525 If CODE is 'b', pretend the mode is QImode.
2526 If CODE is 'k', pretend the mode is SImode.
2527 If CODE is 'h', pretend the reg is the `high' byte register.
2528 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
2530 extern char *hi_reg_name
[];
2531 extern char *qi_reg_name
[];
2532 extern char *qi_high_reg_name
[];
2534 #define PRINT_REG(X, CODE, FILE) \
2535 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
2537 fprintf (FILE, "%s", RP); \
2538 switch ((CODE == 'w' ? 2 \
2543 : GET_MODE_SIZE (GET_MODE (X)))) \
2546 if (STACK_TOP_P (X)) \
2548 fputs ("st(0)", FILE); \
2554 if (! FP_REG_P (X)) fputs ("e", FILE); \
2556 fputs (hi_reg_name[REGNO (X)], FILE); \
2559 fputs (qi_reg_name[REGNO (X)], FILE); \
2562 fputs (qi_high_reg_name[REGNO (X)], FILE); \
2567 #define PRINT_OPERAND(FILE, X, CODE) \
2568 print_operand (FILE, X, CODE)
2570 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2571 print_operand_address (FILE, ADDR)
2573 /* Print the name of a register for based on its machine mode and number.
2574 This macro is used to print debugging output.
2575 This macro is different from PRINT_REG in that it may be used in
2576 programs that are not linked with aux-output.o. */
2578 #define DEBUG_PRINT_REG(X, CODE, FILE) \
2579 do { static char *hi_name[] = HI_REGISTER_NAMES; \
2580 static char *qi_name[] = QI_REGISTER_NAMES; \
2581 fprintf (FILE, "%d %s", REGNO (X), RP); \
2582 if (REGNO (X) == ARG_POINTER_REGNUM) \
2583 { fputs ("argp", FILE); break; } \
2584 if (STACK_TOP_P (X)) \
2585 { fputs ("st(0)", FILE); break; } \
2587 { fputs (hi_name[REGNO(X)], FILE); break; } \
2588 switch (GET_MODE_SIZE (GET_MODE (X))) \
2591 fputs ("e", FILE); \
2593 fputs (hi_name[REGNO (X)], FILE); \
2596 fputs (qi_name[REGNO (X)], FILE); \
2601 /* Output the prefix for an immediate operand, or for an offset operand. */
2602 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
2603 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
2605 /* Routines in libgcc that return floats must return them in an fp reg,
2606 just as other functions do which return such values.
2607 These macros make that happen. */
2609 #define FLOAT_VALUE_TYPE float
2610 #define INTIFY(FLOATVAL) FLOATVAL
2612 /* Nonzero if INSN magically clobbers register REGNO. */
2614 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
2615 (FP_REGNO_P (REGNO) \
2616 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
2619 /* a letter which is not needed by the normal asm syntax, which
2620 we can use for operand syntax in the extended asm */
2622 #define ASM_OPERAND_LETTER '#'
2624 #define RET return ""
2625 #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
2627 /* Helper macros to expand a binary/unary operator if needed */
2628 #define IX86_EXPAND_BINARY_OPERATOR(OP, MODE, OPERANDS) \
2630 if (!ix86_expand_binary_operator (OP, MODE, OPERANDS)) \
2634 #define IX86_EXPAND_UNARY_OPERATOR(OP, MODE, OPERANDS) \
2636 if (!ix86_expand_unary_operator (OP, MODE, OPERANDS,)) \
2641 /* Functions in i386.c */
2642 extern void override_options ();
2643 extern void order_regs_for_local_alloc ();
2644 extern char *output_strlen_unroll ();
2645 extern struct rtx_def
*i386_sext16_if_const ();
2646 extern int i386_aligned_p ();
2647 extern int i386_cc_probably_useless_p ();
2648 extern int i386_valid_decl_attribute_p ();
2649 extern int i386_valid_type_attribute_p ();
2650 extern int i386_return_pops_args ();
2651 extern int i386_comp_type_attributes ();
2652 extern void init_cumulative_args ();
2653 extern void function_arg_advance ();
2654 extern struct rtx_def
*function_arg ();
2655 extern int function_arg_partial_nregs ();
2656 extern char *output_strlen_unroll ();
2657 extern void output_op_from_reg ();
2658 extern void output_to_reg ();
2659 extern char *singlemove_string ();
2660 extern char *output_move_double ();
2661 extern char *output_move_memory ();
2662 extern char *output_move_pushmem ();
2663 extern int standard_80387_constant_p ();
2664 extern char *output_move_const_single ();
2665 extern int symbolic_operand ();
2666 extern int call_insn_operand ();
2667 extern int expander_call_insn_operand ();
2668 extern int symbolic_reference_mentioned_p ();
2669 extern int ix86_expand_binary_operator ();
2670 extern int ix86_binary_operator_ok ();
2671 extern int ix86_expand_unary_operator ();
2672 extern int ix86_unary_operator_ok ();
2673 extern void emit_pic_move ();
2674 extern void function_prologue ();
2675 extern int simple_386_epilogue ();
2676 extern void function_epilogue ();
2677 extern int legitimate_address_p ();
2678 extern struct rtx_def
*legitimize_pic_address ();
2679 extern struct rtx_def
*legitimize_address ();
2680 extern void print_operand ();
2681 extern void print_operand_address ();
2682 extern void notice_update_cc ();
2683 extern void split_di ();
2684 extern int binary_387_op ();
2685 extern int shift_op ();
2686 extern int VOIDmode_compare_op ();
2687 extern char *output_387_binary_op ();
2688 extern char *output_fix_trunc ();
2689 extern char *output_float_compare ();
2690 extern char *output_fp_cc0_set ();
2691 extern void save_386_machine_status ();
2692 extern void restore_386_machine_status ();
2693 extern void clear_386_stack_locals ();
2694 extern struct rtx_def
*assign_386_stack_local ();
2695 extern int is_mul ();
2696 extern int is_div ();
2697 extern int last_to_set_cc ();
2698 extern int doesnt_set_condition_code ();
2699 extern int sets_condition_code ();
2700 extern int str_immediate_operand ();
2701 extern int is_fp_insn ();
2702 extern int is_fp_dest ();
2703 extern int is_fp_store ();
2704 extern int agi_dependent ();
2705 extern int reg_mentioned_in_mem ();
2708 extern struct rtx_def
*copy_all_rtx ();
2709 extern void rewrite_address ();
2712 /* Variables in i386.c */
2713 extern char *ix86_cpu_string
; /* for -mcpu=<xxx> */
2714 extern char *ix86_arch_string
; /* for -march=<xxx> */
2715 extern char *i386_reg_alloc_order
; /* register allocation order */
2716 extern char *i386_regparm_string
; /* # registers to use to pass args */
2717 extern char *i386_align_loops_string
; /* power of two alignment for loops */
2718 extern char *i386_align_jumps_string
; /* power of two alignment for non-loop jumps */
2719 extern char *i386_align_funcs_string
; /* power of two alignment for functions */
2720 extern char *i386_branch_cost_string
; /* values 1-5: see jump.c */
2721 extern int i386_regparm
; /* i386_regparm_string as a number */
2722 extern int i386_align_loops
; /* power of two alignment for loops */
2723 extern int i386_align_jumps
; /* power of two alignment for non-loop jumps */
2724 extern int i386_align_funcs
; /* power of two alignment for functions */
2725 extern int i386_branch_cost
; /* values 1-5: see jump.c */
2726 extern char *hi_reg_name
[]; /* names for 16 bit regs */
2727 extern char *qi_reg_name
[]; /* names for 8 bit regs (low) */
2728 extern char *qi_high_reg_name
[]; /* names for 8 bit regs (high) */
2729 extern enum reg_class regclass_map
[]; /* smalled class containing REGNO */
2730 extern struct rtx_def
*i386_compare_op0
; /* operand 0 for comparisons */
2731 extern struct rtx_def
*i386_compare_op1
; /* operand 1 for comparisons */
2733 /* External variables used */
2734 extern int optimize
; /* optimization level */
2735 extern int obey_regdecls
; /* TRUE if stupid register allocation */
2737 /* External functions used */
2738 extern struct rtx_def
*force_operand ();
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