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1 /* Definitions of target machine for GNU compiler for Intel X86 (386, 486, pentium)
2 Copyright (C) 1988, 1992, 1994 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* The purpose of this file is to define the characteristics of the i386,
22 independent of assembler syntax or operating system.
24 Three other files build on this one to describe a specific assembler syntax:
25 bsd386.h, att386.h, and sun386.h.
27 The actual tm.h file for a particular system should include
28 this file, and then the file for the appropriate assembler syntax.
30 Many macros that specify assembler syntax are omitted entirely from
31 this file because they really belong in the files for particular
32 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
33 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
34 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
36 /* Names to predefine in the preprocessor for this target machine. */
40 /* Stubs for half-pic support if not OSF/1 reference platform. */
43 #define HALF_PIC_P() 0
44 #define HALF_PIC_NUMBER_PTRS 0
45 #define HALF_PIC_NUMBER_REFS 0
46 #define HALF_PIC_ENCODE(DECL)
47 #define HALF_PIC_DECLARE(NAME)
48 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
49 #define HALF_PIC_ADDRESS_P(X) 0
50 #define HALF_PIC_PTR(X) X
51 #define HALF_PIC_FINISH(STREAM)
54 /* Run-time compilation parameters selecting different hardware subsets. */
56 extern int target_flags
;
58 /* Macros used in the machine description to test the flags. */
60 /* configure can arrage to make this 2, to force a 486. */
61 #ifndef TARGET_CPU_DEFAULT
62 #define TARGET_CPU_DEFAULT 0
65 /* Masks for the -m switches */
66 #define MASK_80387 000000000001 /* Hardware floating point */
67 #define MASK_486 000000000002 /* 80486 specific */
68 #define MASK_NOTUSED 000000000004 /* bit not currently used */
69 #define MASK_RTD 000000000010 /* Use ret that pops args */
70 #define MASK_REGPARM 000000000020 /* Pass args in eax, edx */
71 #define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */
72 #define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */
73 #define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */
74 #define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */
76 /* Temporary codegen switches */
77 #define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */
78 #define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */
79 #define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */
81 /* Use the floating point instructions */
82 #define TARGET_80387 (target_flags & MASK_80387)
84 /* Compile using ret insn that pops args.
85 This will not work unless you use prototypes at least
86 for all functions that can take varying numbers of args. */
87 #define TARGET_RTD (target_flags & MASK_RTD)
89 /* Compile passing first two args in regs 0 and 1.
90 This exists only to test compiler features that will
91 be needed for RISC chips. It is not usable
92 and is not intended to be usable on this cpu. */
93 #define TARGET_REGPARM (target_flags & MASK_RTD)
95 /* Put uninitialized locals into bss, not data.
96 Meaningful only on svr3. */
97 #define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB)
99 /* Use IEEE floating point comparisons. These handle correctly the cases
100 where the result of a comparison is unordered. Normally SIGFPE is
101 generated in such cases, in which case this isn't needed. */
102 #define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP)
104 /* Functions that return a floating point value may return that value
105 in the 387 FPU or in 386 integer registers. If set, this flag causes
106 the 387 to be used, which is compatible with most calling conventions. */
107 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
109 /* Disable generation of FP sin, cos and sqrt operations for 387.
110 This is because FreeBSD lacks these in the math-emulator-code */
111 #define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387)
113 /* Temporary switches for tuning code generation */
115 /* Disable 32x32->64 bit multiplies that are used for long long multiplies
116 and division by constants, but sometimes cause reload problems. */
117 #define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY)
118 #define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY)
120 /* Debug GO_IF_LEGITIMATE_ADDRESS */
121 #define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR)
123 /* Hack macros for tuning code generation */
124 #define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
126 /* Specific hardware switches */
127 #define TARGET_486 (target_flags & MASK_486) /* 80486DX, 80486SX, 80486DX[24] */
128 #define TARGET_386 (!TARGET_486) /* 80386 */
130 #define TARGET_SWITCHES \
131 { { "80387", MASK_80387 }, \
132 { "no-80387", -MASK_80387 }, \
133 { "hard-float", MASK_80387 }, \
134 { "soft-float", -MASK_80387 }, \
135 { "no-soft-float", MASK_80387 }, \
136 { "386", -MASK_486 }, \
137 { "no-386", MASK_486 }, \
138 { "486", MASK_486 }, \
139 { "no-486", -MASK_486 }, \
140 { "rtd", MASK_RTD }, \
141 { "no-rtd", -MASK_RTD }, \
142 { "regparm", MASK_REGPARM }, \
143 { "no-regparm", -MASK_REGPARM }, \
144 { "svr3-shlib", MASK_SVR3_SHLIB }, \
145 { "no-svr3-shlib", -MASK_SVR3_SHLIB }, \
146 { "ieee-fp", MASK_IEEE_FP }, \
147 { "no-ieee-fp", -MASK_IEEE_FP }, \
148 { "fp-ret-in-387", MASK_FLOAT_RETURNS }, \
149 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS }, \
150 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387 }, \
151 { "fancy-math-387", -MASK_NO_FANCY_MATH_387 }, \
152 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY }, \
153 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY }, \
154 { "debug-addr", MASK_DEBUG_ADDR }, \
155 { "no-debug-addr", -MASK_DEBUG_ADDR }, \
156 { "move", -MASK_NO_MOVE }, \
157 { "no-move", MASK_NO_MOVE }, \
159 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT}}
161 /* This macro is similar to `TARGET_SWITCHES' but defines names of
162 command options that have values. Its definition is an
163 initializer with a subgrouping for each command option.
165 Each subgrouping contains a string constant, that defines the
166 fixed part of the option name, and the address of a variable. The
167 variable, type `char *', is set to the variable part of the given
168 option if the fixed part matches. The actual option name is made
169 by appending `-m' to the specified name. */
170 #define TARGET_OPTIONS \
171 { { "reg-alloc=", &i386_reg_alloc_order }, \
174 /* Sometimes certain combinations of command options do not make
175 sense on a particular target machine. You can define a macro
176 `OVERRIDE_OPTIONS' to take account of this. This macro, if
177 defined, is executed once just after all the command options have
180 Don't use this macro to turn on various extra optimizations for
181 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
183 #define OVERRIDE_OPTIONS override_options ()
185 /* These are meant to be redefined in the host dependent files */
186 #define SUBTARGET_SWITCHES
187 #define SUBTARGET_OPTIONS
190 /* target machine storage layout */
192 /* Define for XFmode extended real floating point support.
193 This will automatically cause REAL_ARITHMETIC to be defined. */
194 #define LONG_DOUBLE_TYPE_SIZE 96
196 /* Define if you don't want extended real, but do want to use the
197 software floating point emulator for REAL_ARITHMETIC and
198 decimal <-> binary conversion. */
199 /* #define REAL_ARITHMETIC */
201 /* Define this if most significant byte of a word is the lowest numbered. */
202 /* That is true on the 80386. */
204 #define BITS_BIG_ENDIAN 0
206 /* Define this if most significant byte of a word is the lowest numbered. */
207 /* That is not true on the 80386. */
208 #define BYTES_BIG_ENDIAN 0
210 /* Define this if most significant word of a multiword number is the lowest
212 /* Not true for 80386 */
213 #define WORDS_BIG_ENDIAN 0
215 /* number of bits in an addressable storage unit */
216 #define BITS_PER_UNIT 8
218 /* Width in bits of a "word", which is the contents of a machine register.
219 Note that this is not necessarily the width of data type `int';
220 if using 16-bit ints on a 80386, this would still be 32.
221 But on a machine with 16-bit registers, this would be 16. */
222 #define BITS_PER_WORD 32
224 /* Width of a word, in units (bytes). */
225 #define UNITS_PER_WORD 4
227 /* Width in bits of a pointer.
228 See also the macro `Pmode' defined below. */
229 #define POINTER_SIZE 32
231 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
232 #define PARM_BOUNDARY 32
234 /* Boundary (in *bits*) on which stack pointer should be aligned. */
235 #define STACK_BOUNDARY 32
237 /* Allocation boundary (in *bits*) for the code of a function.
238 For i486, we get better performance by aligning to a cache
239 line (i.e. 16 byte) boundary. */
240 #define FUNCTION_BOUNDARY (TARGET_486 ? 128 : 32)
242 /* Alignment of field after `int : 0' in a structure. */
244 #define EMPTY_FIELD_BOUNDARY 32
246 /* Minimum size in bits of the largest boundary to which any
247 and all fundamental data types supported by the hardware
248 might need to be aligned. No data type wants to be aligned
249 rounder than this. The i386 supports 64-bit floating point
250 quantities, but these can be aligned on any 32-bit boundary. */
251 #define BIGGEST_ALIGNMENT 32
253 /* Set this non-zero if move instructions will actually fail to work
254 when given unaligned data. */
255 #define STRICT_ALIGNMENT 0
257 /* If bit field type is int, don't let it cross an int,
258 and give entire struct the alignment of an int. */
259 /* Required on the 386 since it doesn't have bitfield insns. */
260 #define PCC_BITFIELD_TYPE_MATTERS 1
262 /* Align loop starts for optimal branching. */
263 #define ASM_OUTPUT_LOOP_ALIGN(FILE) \
264 ASM_OUTPUT_ALIGN (FILE, 2)
266 /* This is how to align an instruction for optimal branching.
267 On i486 we'll get better performance by aligning on a
268 cache line (i.e. 16 byte) boundary. */
269 #define ASM_OUTPUT_ALIGN_CODE(FILE) \
270 ASM_OUTPUT_ALIGN ((FILE), (TARGET_486 ? 4 : 2))
272 /* Standard register usage. */
274 /* This processor has special stack-like registers. See reg-stack.c
279 /* Number of actual hardware registers.
280 The hardware registers are assigned numbers for the compiler
281 from 0 to just below FIRST_PSEUDO_REGISTER.
282 All registers that the compiler knows about must be given numbers,
283 even those that are not normally considered general registers.
285 In the 80386 we give the 8 general purpose registers the numbers 0-7.
286 We number the floating point registers 8-15.
287 Note that registers 0-7 can be accessed as a short or int,
288 while only 0-3 may be used with byte `mov' instructions.
290 Reg 16 does not correspond to any hardware register, but instead
291 appears in the RTL as an argument pointer prior to reload, and is
292 eliminated during reloading in favor of either the stack or frame
295 #define FIRST_PSEUDO_REGISTER 17
297 /* 1 for registers that have pervasive standard uses
298 and are not available for the register allocator.
299 On the 80386, the stack pointer is such, as is the arg pointer. */
300 #define FIXED_REGISTERS \
301 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
302 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
304 /* 1 for registers not available across function calls.
305 These must include the FIXED_REGISTERS and also any
306 registers that can be used without being saved.
307 The latter must include the registers where values are returned
308 and the register where structure-value addresses are passed.
309 Aside from that, you can include as many other registers as you like. */
311 #define CALL_USED_REGISTERS \
312 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
313 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
315 /* Order in which to allocate registers. Each register must be
316 listed once, even those in FIXED_REGISTERS. List frame pointer
317 late and fixed registers last. Note that, in general, we prefer
318 registers listed in CALL_USED_REGISTERS, keeping the others
319 available for storage of persistent values.
321 Three different versions of REG_ALLOC_ORDER have been tried:
323 If the order is edx, ecx, eax, ... it produces a slightly faster compiler,
324 but slower code on simple functions returning values in eax.
326 If the order is eax, ecx, edx, ... it causes reload to abort when compiling
327 perl 4.036 due to not being able to create a DImode register (to hold a 2
330 If the order is eax, edx, ecx, ... it produces better code for simple
331 functions, and a slightly slower compiler. Users complained about the code
332 generated by allocating edx first, so restore the 'natural' order of things. */
334 #define REG_ALLOC_ORDER \
335 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
336 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 }
338 /* A C statement (sans semicolon) to choose the order in which to
339 allocate hard registers for pseudo-registers local to a basic
342 Store the desired register order in the array `reg_alloc_order'.
343 Element 0 should be the register to allocate first; element 1, the
344 next register; and so on.
346 The macro body should not assume anything about the contents of
347 `reg_alloc_order' before execution of the macro.
349 On most machines, it is not necessary to define this macro. */
351 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
353 /* Macro to conditionally modify fixed_regs/call_used_regs. */
354 #define CONDITIONAL_REGISTER_USAGE \
358 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
359 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
361 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
365 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
366 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
367 if (TEST_HARD_REG_BIT (x, i)) \
368 fixed_regs[i] = call_used_regs[i] = 1; \
372 /* Return number of consecutive hard regs needed starting at reg REGNO
373 to hold something of mode MODE.
374 This is ordinarily the length in words of a value of mode MODE
375 but can be less for certain modes in special long registers.
377 Actually there are no two word move instructions for consecutive
378 registers. And only registers 0-3 may have mov byte instructions
382 #define HARD_REGNO_NREGS(REGNO, MODE) \
383 (FP_REGNO_P (REGNO) ? 1 \
384 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
386 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
387 On the 80386, the first 4 cpu registers can hold any mode
388 while the floating point registers may hold only floating point.
389 Make it clear that the fp regs could not hold a 16-byte float. */
391 /* The casts to int placate a compiler on a microvax,
392 for cross-compiler testing. */
394 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
397 : FP_REGNO_P (REGNO) \
398 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
399 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
400 && GET_MODE_UNIT_SIZE (MODE) <= 12) \
401 : (int) (MODE) != (int) QImode)
403 /* Value is 1 if it is a good idea to tie two pseudo registers
404 when one has mode MODE1 and one has mode MODE2.
405 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
406 for any hard reg, then this must be 0 for correct output. */
408 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
410 /* A C expression returning the cost of moving data from a register of class
411 CLASS1 to one of CLASS2.
413 On the i386, copying between floating-point and fixed-point
414 registers is expensive. */
416 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
417 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
418 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
421 /* Specify the registers used for certain standard purposes.
422 The values of these macros are register numbers. */
424 /* on the 386 the pc register is %eip, and is not usable as a general
425 register. The ordinary mov instructions won't work */
426 /* #define PC_REGNUM */
428 /* Register to use for pushing function arguments. */
429 #define STACK_POINTER_REGNUM 7
431 /* Base register for access to local variables of the function. */
432 #define FRAME_POINTER_REGNUM 6
434 /* First floating point reg */
435 #define FIRST_FLOAT_REG 8
437 /* First & last stack-like regs */
438 #define FIRST_STACK_REG FIRST_FLOAT_REG
439 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
441 /* Value should be nonzero if functions must have frame pointers.
442 Zero means the frame pointer need not be set up (and parms
443 may be accessed via the stack pointer) in functions that seem suitable.
444 This is computed in `reload', in reload1.c. */
445 #define FRAME_POINTER_REQUIRED 0
447 /* Base register for access to arguments of the function. */
448 #define ARG_POINTER_REGNUM 16
450 /* Register in which static-chain is passed to a function. */
451 #define STATIC_CHAIN_REGNUM 2
453 /* Register to hold the addressing base for position independent
454 code access to data items. */
455 #define PIC_OFFSET_TABLE_REGNUM 3
457 /* Register in which address to store a structure value
458 arrives in the function. On the 386, the prologue
459 copies this from the stack to register %eax. */
460 #define STRUCT_VALUE_INCOMING 0
462 /* Place in which caller passes the structure value address.
463 0 means push the value on the stack like an argument. */
464 #define STRUCT_VALUE 0
466 /* Define the classes of registers for register constraints in the
467 machine description. Also define ranges of constants.
469 One of the classes must always be named ALL_REGS and include all hard regs.
470 If there is more than one class, another class must be named NO_REGS
471 and contain no registers.
473 The name GENERAL_REGS must be the name of a class (or an alias for
474 another name such as ALL_REGS). This is the class of registers
475 that is allowed by "g" or "r" in a register constraint.
476 Also, registers outside this class are allocated only when
477 instructions express preferences for them.
479 The classes must be numbered in nondecreasing order; that is,
480 a larger-numbered class must never be contained completely
481 in a smaller-numbered class.
483 For any two classes, it is very desirable that there be another
484 class that represents their union.
486 It might seem that class BREG is unnecessary, since no useful 386
487 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
488 and the "b" register constraint is useful in asms for syscalls. */
493 AREG
, DREG
, CREG
, BREG
,
494 AD_REGS
, /* %eax/%edx for DImode */
495 Q_REGS
, /* %eax %ebx %ecx %edx */
497 INDEX_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp */
498 GENERAL_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
499 FP_TOP_REG
, FP_SECOND_REG
, /* %st(0) %st(1) */
501 ALL_REGS
, LIM_REG_CLASSES
504 #define N_REG_CLASSES (int) LIM_REG_CLASSES
506 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
508 /* Give names of register classes as strings for dump file. */
510 #define REG_CLASS_NAMES \
512 "AREG", "DREG", "CREG", "BREG", \
518 "FP_TOP_REG", "FP_SECOND_REG", \
522 /* Define which registers fit in which classes.
523 This is an initializer for a vector of HARD_REG_SET
524 of length N_REG_CLASSES. */
526 #define REG_CLASS_CONTENTS \
528 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
531 0x10, 0x20, /* SIREG, DIREG */ \
532 0x07f, /* INDEX_REGS */ \
533 0x100ff, /* GENERAL_REGS */ \
534 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
535 0xff00, /* FLOAT_REGS */ \
538 /* The same information, inverted:
539 Return the class number of the smallest class containing
540 reg number REGNO. This could be a conditional expression
541 or could index an array. */
543 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
545 /* When defined, the compiler allows registers explicitly used in the
546 rtl to be used as spill registers but prevents the compiler from
547 extending the lifetime of these registers. */
549 #define SMALL_REGISTER_CLASSES
551 #define QI_REG_P(X) \
552 (REG_P (X) && REGNO (X) < 4)
553 #define NON_QI_REG_P(X) \
554 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
556 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
557 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
559 #define STACK_REG_P(xop) (REG_P (xop) && \
560 REGNO (xop) >= FIRST_STACK_REG && \
561 REGNO (xop) <= LAST_STACK_REG)
563 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
565 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
567 /* Try to maintain the accuracy of the death notes for regs satisfying the
568 following. Important for stack like regs, to know when to pop. */
570 /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
572 /* 1 if register REGNO can magically overlap other regs.
573 Note that nonzero values work only in very special circumstances. */
575 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
577 /* The class value for index registers, and the one for base regs. */
579 #define INDEX_REG_CLASS INDEX_REGS
580 #define BASE_REG_CLASS GENERAL_REGS
582 /* Get reg_class from a letter such as appears in the machine description. */
584 #define REG_CLASS_FROM_LETTER(C) \
585 ((C) == 'r' ? GENERAL_REGS : \
586 (C) == 'q' ? Q_REGS : \
587 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
590 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
593 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
596 (C) == 'a' ? AREG : \
597 (C) == 'b' ? BREG : \
598 (C) == 'c' ? CREG : \
599 (C) == 'd' ? DREG : \
600 (C) == 'A' ? AD_REGS : \
601 (C) == 'D' ? DIREG : \
602 (C) == 'S' ? SIREG : NO_REGS)
604 /* The letters I, J, K, L and M in a register constraint string
605 can be used to stand for particular ranges of immediate operands.
606 This macro defines what the ranges are.
607 C is the letter, and VALUE is a constant value.
608 Return 1 if VALUE is in the range specified by C.
610 I is for non-DImode shifts.
611 J is for DImode shifts.
612 K and L are for an `andsi' optimization.
613 M is for shifts that can be executed by the "lea" opcode.
616 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
617 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
618 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
619 (C) == 'K' ? (VALUE) == 0xff : \
620 (C) == 'L' ? (VALUE) == 0xffff : \
621 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
624 /* Similar, but for floating constants, and defining letters G and H.
625 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
626 TARGET_387 isn't set, because the stack register converter may need to
627 load 0.0 into the function value register. */
629 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
630 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
632 /* Place additional restrictions on the register class to use when it
633 is necessary to be able to hold a value of mode MODE in a reload
634 register for which class CLASS would ordinarily be used. */
636 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
637 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
640 /* Given an rtx X being reloaded into a reg required to be
641 in class CLASS, return the class of reg to actually use.
642 In general this is just CLASS; but on some machines
643 in some cases it is preferable to use a more restrictive class.
644 On the 80386 series, we prevent floating constants from being
645 reloaded into floating registers (since no move-insn can do that)
646 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
648 /* Put float CONST_DOUBLE in the constant pool instead of fp regs.
649 QImode must go into class Q_REGS.
650 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
651 movdf to do mem-to-mem moves through integer regs. */
653 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
654 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \
655 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
656 : ((CLASS) == ALL_REGS \
657 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
660 /* If we are copying between general and FP registers, we need a memory
663 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
664 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
665 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
667 /* Return the maximum number of consecutive registers
668 needed to represent mode MODE in a register of class CLASS. */
669 /* On the 80386, this is the size of MODE in words,
670 except in the FP regs, where a single reg is always enough. */
671 #define CLASS_MAX_NREGS(CLASS, MODE) \
672 (FLOAT_CLASS_P (CLASS) ? 1 : \
673 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
675 /* A C expression whose value is nonzero if pseudos that have been
676 assigned to registers of class CLASS would likely be spilled
677 because registers of CLASS are needed for spill registers.
679 The default value of this macro returns 1 if CLASS has exactly one
680 register and zero otherwise. On most machines, this default
681 should be used. Only define this macro to some other expression
682 if pseudo allocated by `local-alloc.c' end up in memory because
683 their hard registers were needed for spill regisers. If this
684 macro returns nonzero for those classes, those pseudos will only
685 be allocated by `global.c', which knows how to reallocate the
686 pseudo to another register. If there would not be another
687 register available for reallocation, you should not change the
688 definition of this macro since the only effect of such a
689 definition would be to slow down register allocation. */
691 #define CLASS_LIKELY_SPILLED_P(CLASS) \
693 || ((CLASS) == DREG) \
694 || ((CLASS) == CREG) \
695 || ((CLASS) == BREG) \
696 || ((CLASS) == AD_REGS) \
697 || ((CLASS) == SIREG) \
698 || ((CLASS) == DIREG))
701 /* Stack layout; function entry, exit and calling. */
703 /* Define this if pushing a word on the stack
704 makes the stack pointer a smaller address. */
705 #define STACK_GROWS_DOWNWARD
707 /* Define this if the nominal address of the stack frame
708 is at the high-address end of the local variables;
709 that is, each additional local variable allocated
710 goes at a more negative offset in the frame. */
711 #define FRAME_GROWS_DOWNWARD
713 /* Offset within stack frame to start allocating local variables at.
714 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
715 first local allocated. Otherwise, it is the offset to the BEGINNING
716 of the first local allocated. */
717 #define STARTING_FRAME_OFFSET 0
719 /* If we generate an insn to push BYTES bytes,
720 this says how many the stack pointer really advances by.
721 On 386 pushw decrements by exactly 2 no matter what the position was.
722 On the 386 there is no pushb; we use pushw instead, and this
723 has the effect of rounding up to 2. */
725 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
727 /* Offset of first parameter from the argument pointer register value. */
728 #define FIRST_PARM_OFFSET(FNDECL) 0
730 /* Value is the number of bytes of arguments automatically
731 popped when returning from a subroutine call.
732 FUNTYPE is the data type of the function (as a tree),
733 or for a library call it is an identifier node for the subroutine name.
734 SIZE is the number of bytes of arguments passed on the stack.
736 On the 80386, the RTD insn may be used to pop them if the number
737 of args is fixed, but if the number is variable then the caller
738 must pop them all. RTD can't be used for library calls now
739 because the library is compiled with the Unix compiler.
740 Use of RTD is a selectable option, since it is incompatible with
741 standard Unix calling sequences. If the option is not selected,
742 the caller must always pop the args. */
744 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \
745 (TREE_CODE (FUNTYPE) == IDENTIFIER_NODE ? 0 \
747 && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
748 || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
749 == void_type_node))) ? (SIZE) \
750 : (aggregate_value_p (TREE_TYPE (FUNTYPE))) ? GET_MODE_SIZE (Pmode) : 0)
752 /* Define how to find the value returned by a function.
753 VALTYPE is the data type of the value (as a tree).
754 If the precise function being called is known, FUNC is its FUNCTION_DECL;
755 otherwise, FUNC is 0. */
756 #define FUNCTION_VALUE(VALTYPE, FUNC) \
757 gen_rtx (REG, TYPE_MODE (VALTYPE), \
758 VALUE_REGNO (TYPE_MODE (VALTYPE)))
760 /* Define how to find the value returned by a library function
761 assuming the value has mode MODE. */
763 #define LIBCALL_VALUE(MODE) \
764 gen_rtx (REG, MODE, VALUE_REGNO (MODE))
766 /* Define the size of the result block used for communication between
767 untyped_call and untyped_return. The block contains a DImode value
768 followed by the block used by fnsave and frstor. */
770 #define APPLY_RESULT_SIZE (8+108)
772 /* 1 if N is a possible register number for function argument passing.
773 On the 80386, no registers are used in this way.
774 *NOTE* -mregparm does not work.
775 It exists only to test register calling conventions. */
777 #define FUNCTION_ARG_REGNO_P(N) 0
779 /* Define a data type for recording info about an argument list
780 during the scan of that argument list. This data type should
781 hold all necessary information about the function itself
782 and about the args processed so far, enough to enable macros
783 such as FUNCTION_ARG to determine where the next arg should go.
785 On the 80386, this is a single integer, which is a number of bytes
786 of arguments scanned so far. */
788 #define CUMULATIVE_ARGS int
790 /* Initialize a variable CUM of type CUMULATIVE_ARGS
791 for a call to a function whose data type is FNTYPE.
792 For a library call, FNTYPE is 0.
794 On the 80386, the offset starts at 0. */
796 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
799 /* Update the data in CUM to advance over an argument
800 of mode MODE and data type TYPE.
801 (TYPE is null for libcalls where that information may not be available.) */
803 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
804 ((CUM) += ((MODE) != BLKmode \
805 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
806 : (int_size_in_bytes (TYPE) + 3) & ~3))
808 /* Define where to put the arguments to a function.
809 Value is zero to push the argument on the stack,
810 or a hard register in which to store the argument.
812 MODE is the argument's machine mode.
813 TYPE is the data type of the argument (as a tree).
814 This is null for libcalls where that information may
816 CUM is a variable of type CUMULATIVE_ARGS which gives info about
817 the preceding args and about the function being called.
818 NAMED is nonzero if this argument is a named parameter
819 (otherwise it is an extra parameter matching an ellipsis). */
822 /* On the 80386 all args are pushed, except if -mregparm is specified
823 then the first two words of arguments are passed in EAX, EDX.
824 *NOTE* -mregparm does not work.
825 It exists only to test register calling conventions. */
827 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
828 ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
830 /* For an arg passed partly in registers and partly in memory,
831 this is the number of registers used.
832 For args passed entirely in registers or entirely in memory, zero. */
835 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
836 ((TARGET_REGPARM && (CUM) < 8 \
837 && 8 < ((CUM) + ((MODE) == BLKmode \
838 ? int_size_in_bytes (TYPE) \
839 : GET_MODE_SIZE (MODE)))) \
842 /* This macro generates the assembly code for function entry.
843 FILE is a stdio stream to output the code to.
844 SIZE is an int: how many units of temporary storage to allocate.
845 Refer to the array `regs_ever_live' to determine which registers
846 to save; `regs_ever_live[I]' is nonzero if register number I
847 is ever used in the function. This macro is responsible for
848 knowing which registers should not be saved even if used. */
850 #define FUNCTION_PROLOGUE(FILE, SIZE) \
851 function_prologue (FILE, SIZE)
853 /* Output assembler code to FILE to increment profiler label # LABELNO
854 for profiling a function entry. */
856 #define FUNCTION_PROFILER(FILE, LABELNO) \
860 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
861 LPREFIX, (LABELNO)); \
862 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
866 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
867 fprintf (FILE, "\tcall _mcount\n"); \
871 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
872 the stack pointer does not matter. The value is tested only in
873 functions that have frame pointers.
874 No definition is equivalent to always zero. */
875 /* Note on the 386 it might be more efficient not to define this since
876 we have to restore it ourselves from the frame pointer, in order to
879 #define EXIT_IGNORE_STACK 1
881 /* This macro generates the assembly code for function exit,
882 on machines that need it. If FUNCTION_EPILOGUE is not defined
883 then individual return instructions are generated for each
884 return statement. Args are same as for FUNCTION_PROLOGUE.
886 The function epilogue should not depend on the current stack pointer!
887 It should use the frame pointer only. This is mandatory because
888 of alloca; we also take advantage of it to omit stack adjustments
891 If the last non-note insn in the function is a BARRIER, then there
892 is no need to emit a function prologue, because control does not fall
893 off the end. This happens if the function ends in an "exit" call, or
894 if a `return' insn is emitted directly into the function. */
896 #define FUNCTION_EPILOGUE(FILE, SIZE) \
898 rtx last = get_last_insn (); \
899 if (last && GET_CODE (last) == NOTE) \
900 last = prev_nonnote_insn (last); \
901 if (! last || GET_CODE (last) != BARRIER) \
902 function_epilogue (FILE, SIZE); \
905 /* Output assembler code for a block containing the constant parts
906 of a trampoline, leaving space for the variable parts. */
908 /* On the 386, the trampoline contains three instructions:
912 #define TRAMPOLINE_TEMPLATE(FILE) \
914 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
915 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
916 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
917 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
918 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
919 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
920 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
921 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
924 /* Length in units of the trampoline for entering a nested function. */
926 #define TRAMPOLINE_SIZE 12
928 /* Emit RTL insns to initialize the variable parts of a trampoline.
929 FNADDR is an RTX for the address of the function's pure code.
930 CXT is an RTX for the static chain value for the function. */
932 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
934 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
935 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
938 /* Definitions for register eliminations.
940 This is an array of structures. Each structure initializes one pair
941 of eliminable registers. The "from" register number is given first,
942 followed by "to". Eliminations of the same "from" register are listed
943 in order of preference.
945 We have two registers that can be eliminated on the i386. First, the
946 frame pointer register can often be eliminated in favor of the stack
947 pointer register. Secondly, the argument pointer register can always be
948 eliminated; it is replaced with either the stack or frame pointer. */
950 #define ELIMINABLE_REGS \
951 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
952 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
953 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
955 /* Given FROM and TO register numbers, say whether this elimination is allowed.
956 Frame pointer elimination is automatically handled.
958 For the i386, if frame pointer elimination is being done, we would like to
959 convert ap into sp, not fp.
961 All other eliminations are valid. */
963 #define CAN_ELIMINATE(FROM, TO) \
964 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
965 ? ! frame_pointer_needed \
968 /* Define the offset between two registers, one to be eliminated, and the other
969 its replacement, at the start of a routine. */
971 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
973 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
974 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
980 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
981 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
982 || (current_function_uses_pic_offset_table \
983 && regno == PIC_OFFSET_TABLE_REGNUM)) \
986 (OFFSET) = offset + get_frame_size (); \
988 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
989 (OFFSET) += 4; /* Skip saved PC */ \
993 /* Addressing modes, and classification of registers for them. */
995 /* #define HAVE_POST_INCREMENT */
996 /* #define HAVE_POST_DECREMENT */
998 /* #define HAVE_PRE_DECREMENT */
999 /* #define HAVE_PRE_INCREMENT */
1001 /* Macros to check register numbers against specific register classes. */
1003 /* These assume that REGNO is a hard or pseudo reg number.
1004 They give nonzero only if REGNO is a hard reg of the suitable class
1005 or a pseudo reg currently allocated to a suitable hard reg.
1006 Since they use reg_renumber, they are safe only once reg_renumber
1007 has been allocated, which happens in local-alloc.c. */
1009 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1010 ((REGNO) < STACK_POINTER_REGNUM \
1011 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
1013 #define REGNO_OK_FOR_BASE_P(REGNO) \
1014 ((REGNO) <= STACK_POINTER_REGNUM \
1015 || (REGNO) == ARG_POINTER_REGNUM \
1016 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
1018 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
1019 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
1021 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1022 and check its validity for a certain class.
1023 We have two alternate definitions for each of them.
1024 The usual definition accepts all pseudo regs; the other rejects
1025 them unless they have been allocated suitable hard regs.
1026 The symbol REG_OK_STRICT causes the latter definition to be used.
1028 Most source files want to accept pseudo regs in the hope that
1029 they will get allocated to the class that the insn wants them to be in.
1030 Source files for reload pass need to be strict.
1031 After reload, it makes no difference, since pseudo regs have
1032 been eliminated by then. */
1035 /* Non strict versions, pseudos are ok */
1036 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1037 (REGNO (X) < STACK_POINTER_REGNUM \
1038 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1040 #define REG_OK_FOR_BASE_NONSTRICT_P(X) \
1041 (REGNO (X) <= STACK_POINTER_REGNUM \
1042 || REGNO (X) == ARG_POINTER_REGNUM \
1043 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1045 #define REG_OK_FOR_STRREG_NONSTRICT_P(X) \
1046 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1048 /* Strict versions, hard registers only */
1049 #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1050 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1051 #define REG_OK_FOR_STRREG_STRICT_P(X) \
1052 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
1054 #ifndef REG_OK_STRICT
1055 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1056 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1057 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_NONSTRICT_P(X)
1060 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1061 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1062 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_STRICT_P(X)
1065 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1066 that is a valid memory address for an instruction.
1067 The MODE argument is the machine mode for the MEM expression
1068 that wants to use this address.
1070 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1071 except for CONSTANT_ADDRESS_P which is usually machine-independent.
1073 See legitimize_pic_address in i386.c for details as to what
1074 constitutes a legitimate address when -fpic is used. */
1076 #define MAX_REGS_PER_ADDRESS 2
1078 #define CONSTANT_ADDRESS_P(X) \
1079 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1080 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1081 || GET_CODE (X) == HIGH)
1083 /* Nonzero if the constant value X is a legitimate general operand.
1084 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1086 #define LEGITIMATE_CONSTANT_P(X) 1
1088 #ifdef REG_OK_STRICT
1089 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1091 if (legitimate_address_p (MODE, X, 1)) \
1096 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1098 if (legitimate_address_p (MODE, X, 0)) \
1104 /* Try machine-dependent ways of modifying an illegitimate address
1105 to be legitimate. If we find one, return the new, valid address.
1106 This macro is used in only one place: `memory_address' in explow.c.
1108 OLDX is the address as it was before break_out_memory_refs was called.
1109 In some cases it is useful to look at this to decide what needs to be done.
1111 MODE and WIN are passed so that this macro can use
1112 GO_IF_LEGITIMATE_ADDRESS.
1114 It is always safe for this macro to do nothing. It exists to recognize
1115 opportunities to optimize the output.
1117 For the 80386, we handle X+REG by loading X into a register R and
1118 using R+REG. R will go in a general reg and indexing will be used.
1119 However, if REG is a broken-out memory address or multiplication,
1120 nothing needs to be done because REG can certainly go in a general reg.
1122 When -fpic is used, special handling is needed for symbolic references.
1123 See comments by legitimize_pic_address in i386.c for details. */
1125 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1128 (X) = legitimize_address (X, OLDX, MODE); \
1129 if (memory_address_p (MODE, X)) \
1133 /* Nonzero if the constant value X is a legitimate general operand
1134 when generating PIC code. It is given that flag_pic is on and
1135 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1137 #define LEGITIMATE_PIC_OPERAND_P(X) \
1138 (! SYMBOLIC_CONST (X) \
1139 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1141 #define SYMBOLIC_CONST(X) \
1142 (GET_CODE (X) == SYMBOL_REF \
1143 || GET_CODE (X) == LABEL_REF \
1144 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1146 /* Go to LABEL if ADDR (a legitimate address expression)
1147 has an effect that depends on the machine mode it is used for.
1148 On the 80386, only postdecrement and postincrement address depend thus
1149 (the amount of decrement or increment being the length of the operand). */
1150 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1151 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1153 /* Define this macro if references to a symbol must be treated
1154 differently depending on something about the variable or
1155 function named by the symbol (such as what section it is in).
1157 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1158 so that we may access it directly in the GOT. */
1160 #define ENCODE_SECTION_INFO(DECL) \
1165 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1166 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1167 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1168 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1169 || ! TREE_PUBLIC (DECL)); \
1174 /* Initialize data used by insn expanders. This is called from
1175 init_emit, once for each function, before code is generated.
1176 For 386, clear stack slot assignments remembered from previous
1179 #define INIT_EXPANDERS clear_386_stack_locals ()
1181 /* The `FINALIZE_PIC' macro serves as a hook to emit these special
1182 codes once the function is being compiled into assembly code, but
1183 not before. (It is not done before, because in the case of
1184 compiling an inline function, it would lead to multiple PIC
1185 prologues being included in functions which used inline functions
1186 and were compiled to assembly language.) */
1188 #define FINALIZE_PIC \
1191 extern int current_function_uses_pic_offset_table; \
1193 current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \
1198 /* Specify the machine mode that this machine uses
1199 for the index in the tablejump instruction. */
1200 #define CASE_VECTOR_MODE Pmode
1202 /* Define this if the tablejump instruction expects the table
1203 to contain offsets from the address of the table.
1204 Do not define this if the table should contain absolute addresses. */
1205 /* #define CASE_VECTOR_PC_RELATIVE */
1207 /* Specify the tree operation to be used to convert reals to integers.
1208 This should be changed to take advantage of fist --wfs ??
1210 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1212 /* This is the kind of divide that is easiest to do in the general case. */
1213 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1215 /* Define this as 1 if `char' should by default be signed; else as 0. */
1216 #define DEFAULT_SIGNED_CHAR 1
1218 /* Max number of bytes we can move from memory to memory
1219 in one reasonably fast instruction. */
1222 /* MOVE_RATIO is the number of move instructions that is better than a
1223 block move. Make this large on i386, since the block move is very
1224 inefficient with small blocks, and the hard register needs of the
1225 block move require much reload work. */
1226 #define MOVE_RATIO 5
1228 /* Define this if zero-extension is slow (more than one real instruction). */
1229 /* #define SLOW_ZERO_EXTEND */
1231 /* Nonzero if access to memory by bytes is slow and undesirable. */
1232 #define SLOW_BYTE_ACCESS 0
1234 /* Define if shifts truncate the shift count
1235 which implies one can omit a sign-extension or zero-extension
1236 of a shift count. */
1237 /* One i386, shifts do truncate the count. But bit opcodes don't. */
1239 /* #define SHIFT_COUNT_TRUNCATED */
1241 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1242 is done just by pretending it is already truncated. */
1243 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1245 /* We assume that the store-condition-codes instructions store 0 for false
1246 and some other value for true. This is the value stored for true. */
1248 #define STORE_FLAG_VALUE 1
1250 /* When a prototype says `char' or `short', really pass an `int'.
1251 (The 386 can't easily push less than an int.) */
1253 #define PROMOTE_PROTOTYPES
1255 /* Specify the machine mode that pointers have.
1256 After generation of rtl, the compiler makes no further distinction
1257 between pointers and any other objects of this machine mode. */
1258 #define Pmode SImode
1260 /* A function address in a call instruction
1261 is a byte address (for indexing purposes)
1262 so give the MEM rtx a byte's mode. */
1263 #define FUNCTION_MODE QImode
1265 /* Define this if addresses of constant functions
1266 shouldn't be put through pseudo regs where they can be cse'd.
1267 Desirable on the 386 because a CALL with a constant address is
1268 not much slower than one with a register address. */
1269 #define NO_FUNCTION_CSE
1271 /* Provide the costs of a rtl expression. This is in the body of a
1274 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1276 return COSTS_N_INSNS (10); \
1281 return COSTS_N_INSNS (40); \
1283 if (GET_CODE (XEXP (X, 0)) == REG \
1284 && GET_CODE (XEXP (X, 1)) == CONST_INT) \
1289 /* Compute the cost of computing a constant rtl expression RTX
1290 whose rtx-code is CODE. The body of this macro is a portion
1291 of a switch statement. If the code is computed here,
1292 return it with a return statement. Otherwise, break from the switch. */
1294 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1299 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 0; \
1300 case CONST_DOUBLE: \
1303 if (GET_MODE (RTX) == VOIDmode) \
1305 code = standard_80387_constant_p (RTX); \
1306 return code == 1 ? 0 : \
1311 /* Compute the cost of an address. This is meant to approximate the size
1312 and/or execution delay of an insn using that address. If the cost is
1313 approximated by the RTL complexity, including CONST_COSTS above, as
1314 is usually the case for CISC machines, this macro should not be defined.
1315 For aggressively RISCy machines, only one insn format is allowed, so
1316 this macro should be a constant. The value of this macro only matters
1317 for valid addresses.
1319 For i386, it is better to use a complex address than let gcc copy
1320 the address into a reg and make a new pseudo. But not if the address
1321 requires to two regs - that would mean more pseudos with longer
1324 #define ADDRESS_COST(RTX) \
1325 ((CONSTANT_P (RTX) \
1326 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
1327 && REG_P (XEXP (RTX, 0)))) ? 0 \
1331 /* Add any extra modes needed to represent the condition code.
1333 For the i386, we need separate modes when floating-point equality
1334 comparisons are being done. */
1336 #define EXTRA_CC_MODES CCFPEQmode
1338 /* Define the names for the modes specified above. */
1339 #define EXTRA_CC_NAMES "CCFPEQ"
1341 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1342 return the mode to be used for the comparison.
1344 For floating-point equality comparisons, CCFPEQmode should be used.
1345 VOIDmode should be used in all other cases. */
1347 #define SELECT_CC_MODE(OP,X,Y) \
1348 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1349 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
1351 /* Define the information needed to generate branch and scc insns. This is
1352 stored from the compare operation. Note that we can't use "rtx" here
1353 since it hasn't been defined! */
1355 extern struct rtx_def
*(*i386_compare_gen
)(), *(*i386_compare_gen_eq
)();
1357 /* Tell final.c how to eliminate redundant test instructions. */
1359 /* Here we define machine-dependent flags and fields in cc_status
1360 (see `conditions.h'). */
1362 /* Set if the cc value is actually in the 80387, so a floating point
1363 conditional branch must be output. */
1364 #define CC_IN_80387 04000
1366 /* Set if the CC value was stored in a nonstandard way, so that
1367 the state of equality is indicated by zero in the carry bit. */
1368 #define CC_Z_IN_NOT_C 010000
1370 /* Store in cc_status the expressions
1371 that the condition codes will describe
1372 after execution of an instruction whose pattern is EXP.
1373 Do not alter them if the instruction would not alter the cc's. */
1375 #define NOTICE_UPDATE_CC(EXP, INSN) \
1376 notice_update_cc((EXP))
1378 /* Output a signed jump insn. Use template NORMAL ordinarily, or
1379 FLOAT following a floating point comparison.
1380 Use NO_OV following an arithmetic insn that set the cc's
1381 before a test insn that was deleted.
1382 NO_OV may be zero, meaning final should reinsert the test insn
1383 because the jump cannot be handled properly without it. */
1385 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1387 if (cc_prev_status.flags & CC_IN_80387) \
1389 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1394 /* Control the assembler format that we output, to the extent
1395 this does not vary between assemblers. */
1397 /* How to refer to registers in assembler output.
1398 This sequence is indexed by compiler's hard-register-number (see above). */
1400 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
1401 For non floating point regs, the following are the HImode names.
1403 For float regs, the stack top is sometimes referred to as "%st(0)"
1404 instead of just "%st". PRINT_REG handles this with the "y" code. */
1406 #define HI_REGISTER_NAMES \
1407 {"ax","dx","cx","bx","si","di","bp","sp", \
1408 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
1410 #define REGISTER_NAMES HI_REGISTER_NAMES
1412 /* Table of additional register names to use in user input. */
1414 #define ADDITIONAL_REGISTER_NAMES \
1415 { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
1416 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
1417 "al", 0, "dl", 1, "cl", 2, "bl", 3, \
1418 "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
1420 /* Note we are omitting these since currently I don't know how
1421 to get gcc to use these, since they want the same but different
1422 number as al, and ax.
1425 /* note the last four are not really qi_registers, but
1426 the md will have to never output movb into one of them
1427 only a movw . There is no movb into the last four regs */
1429 #define QI_REGISTER_NAMES \
1430 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
1432 /* These parallel the array above, and can be used to access bits 8:15
1433 of regs 0 through 3. */
1435 #define QI_HIGH_REGISTER_NAMES \
1436 {"ah", "dh", "ch", "bh", }
1438 /* How to renumber registers for dbx and gdb. */
1440 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
1441 #define DBX_REGISTER_NUMBER(n) \
1452 /* This is how to output the definition of a user-level label named NAME,
1453 such as the label on a static function or variable NAME. */
1455 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1456 (assemble_name (FILE, NAME), fputs (":\n", FILE))
1458 /* This is how to output an assembler line defining a `double' constant. */
1460 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1462 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
1463 if (sizeof (int) == sizeof (long)) \
1464 fprintf (FILE, "%s 0x%x,0x%x\n", ASM_LONG, l[0], l[1]); \
1466 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
1469 /* This is how to output a `long double' extended real constant. */
1471 #undef ASM_OUTPUT_LONG_DOUBLE
1472 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
1474 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
1475 if (sizeof (int) == sizeof (long)) \
1476 fprintf (FILE, "%s 0x%x,0x%x,0x%x\n", ASM_LONG, l[0], l[1], l[2]); \
1478 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
1481 /* This is how to output an assembler line defining a `float' constant. */
1483 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1485 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1486 if (sizeof (int) == sizeof (long)) \
1487 fprintf ((FILE), "%s 0x%x\n", ASM_LONG, l); \
1489 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
1492 /* Store in OUTPUT a string (made with alloca) containing
1493 an assembler-name for a local static variable named NAME.
1494 LABELNO is an integer which is different for each call. */
1496 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1497 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1498 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1502 /* This is how to output an assembler line defining an `int' constant. */
1504 #define ASM_OUTPUT_INT(FILE,VALUE) \
1505 ( fprintf (FILE, "%s ", ASM_LONG), \
1506 output_addr_const (FILE,(VALUE)), \
1509 /* Likewise for `char' and `short' constants. */
1510 /* is this supposed to do align too?? */
1512 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1513 ( fprintf (FILE, "%s ", ASM_SHORT), \
1514 output_addr_const (FILE,(VALUE)), \
1518 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1519 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1520 output_addr_const (FILE,(VALUE)), \
1521 fputs (",", FILE), \
1522 output_addr_const (FILE,(VALUE)), \
1523 fputs (" >> 8\n",FILE))
1527 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1528 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1529 output_addr_const (FILE, (VALUE)), \
1532 /* This is how to output an assembler line for a numeric constant byte. */
1534 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1535 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
1537 /* This is how to output an insn to push a register on the stack.
1538 It need not be very fast code. */
1540 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1541 fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
1543 /* This is how to output an insn to pop a register from the stack.
1544 It need not be very fast code. */
1546 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1547 fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
1549 /* This is how to output an element of a case-vector that is absolute.
1552 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1553 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
1555 /* This is how to output an element of a case-vector that is relative.
1556 We don't use these on the 386 yet, because the ATT assembler can't do
1557 forward reference the differences.
1560 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1561 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
1563 /* Define the parentheses used to group arithmetic operations
1564 in assembler code. */
1566 #define ASM_OPEN_PAREN ""
1567 #define ASM_CLOSE_PAREN ""
1569 /* Define results of standard character escape sequences. */
1570 #define TARGET_BELL 007
1571 #define TARGET_BS 010
1572 #define TARGET_TAB 011
1573 #define TARGET_NEWLINE 012
1574 #define TARGET_VT 013
1575 #define TARGET_FF 014
1576 #define TARGET_CR 015
1578 /* Print operand X (an rtx) in assembler syntax to file FILE.
1579 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1580 The CODE z takes the size of operand from the following digit, and
1581 outputs b,w,or l respectively.
1583 On the 80386, we use several such letters:
1584 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
1585 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
1586 R -- print the prefix for register names.
1587 z -- print the opcode suffix for the size of the current operand.
1588 * -- print a star (in certain assembler syntax)
1589 w -- print the operand as if it's a "word" (HImode) even if it isn't.
1590 b -- print the operand as if it's a byte (QImode) even if it isn't.
1591 c -- don't print special prefixes before constant operands. */
1593 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1596 /* Print the name of a register based on its machine mode and number.
1597 If CODE is 'w', pretend the mode is HImode.
1598 If CODE is 'b', pretend the mode is QImode.
1599 If CODE is 'k', pretend the mode is SImode.
1600 If CODE is 'h', pretend the reg is the `high' byte register.
1601 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
1603 extern char *hi_reg_name
[];
1604 extern char *qi_reg_name
[];
1605 extern char *qi_high_reg_name
[];
1607 #define PRINT_REG(X, CODE, FILE) \
1608 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
1610 fprintf (FILE, "%s", RP); \
1611 switch ((CODE == 'w' ? 2 \
1616 : GET_MODE_SIZE (GET_MODE (X)))) \
1619 if (STACK_TOP_P (X)) \
1621 fputs ("st(0)", FILE); \
1627 if (! FP_REG_P (X)) fputs ("e", FILE); \
1629 fputs (hi_reg_name[REGNO (X)], FILE); \
1632 fputs (qi_reg_name[REGNO (X)], FILE); \
1635 fputs (qi_high_reg_name[REGNO (X)], FILE); \
1640 #define PRINT_OPERAND(FILE, X, CODE) \
1641 print_operand (FILE, X, CODE)
1643 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1644 print_operand_address (FILE, ADDR)
1646 /* Print the name of a register for based on its machine mode and number.
1647 This macro is used to print debugging output.
1648 This macro is different from PRINT_REG in that it may be used in
1649 programs that are not linked with aux-output.o. */
1651 #define DEBUG_PRINT_REG(X, CODE, FILE) \
1652 do { static char *hi_name[] = HI_REGISTER_NAMES; \
1653 static char *qi_name[] = QI_REGISTER_NAMES; \
1654 fprintf (FILE, "%d %s", REGNO (X), RP); \
1655 if (REGNO (X) == ARG_POINTER_REGNUM) \
1656 { fputs ("argp", FILE); break; } \
1657 if (STACK_TOP_P (X)) \
1658 { fputs ("st(0)", FILE); break; } \
1660 { fputs (hi_name[REGNO(X)], FILE); break; } \
1661 switch (GET_MODE_SIZE (GET_MODE (X))) \
1664 fputs ("e", FILE); \
1666 fputs (hi_name[REGNO (X)], FILE); \
1669 fputs (qi_name[REGNO (X)], FILE); \
1674 /* Output the prefix for an immediate operand, or for an offset operand. */
1675 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
1676 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
1678 /* Routines in libgcc that return floats must return them in an fp reg,
1679 just as other functions do which return such values.
1680 These macros make that happen. */
1682 #define FLOAT_VALUE_TYPE float
1683 #define INTIFY(FLOATVAL) FLOATVAL
1685 /* Nonzero if INSN magically clobbers register REGNO. */
1687 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
1688 (FP_REGNO_P (REGNO) \
1689 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
1692 /* a letter which is not needed by the normal asm syntax, which
1693 we can use for operand syntax in the extended asm */
1695 #define ASM_OPERAND_LETTER '#'
1697 #define RET return ""
1698 #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
1700 /* Functions in i386.c */
1701 extern void override_options ();
1702 extern void order_regs_for_local_alloc ();
1703 extern void output_op_from_reg ();
1704 extern void output_to_reg ();
1705 extern char *singlemove_string ();
1706 extern char *output_move_double ();
1707 extern char *output_move_memory ();
1708 extern char *output_move_pushmem ();
1709 extern int standard_80387_constant_p ();
1710 extern char *output_move_const_single ();
1711 extern int symbolic_operand ();
1712 extern int call_insn_operand ();
1713 extern int expander_call_insn_operand ();
1714 extern int symbolic_reference_mentioned_p ();
1715 extern void emit_pic_move ();
1716 extern void function_prologue ();
1717 extern int simple_386_epilogue ();
1718 extern void function_epilogue ();
1719 extern int legitimate_address_p ();
1720 extern struct rtx_def
*legitimize_pic_address ();
1721 extern struct rtx_def
*legitimize_address ();
1722 extern void print_operand ();
1723 extern void print_operand_address ();
1724 extern void notice_update_cc ();
1725 extern void split_di ();
1726 extern int binary_387_op ();
1727 extern int shift_op ();
1728 extern int VOIDmode_compare_op ();
1729 extern char *output_387_binary_op ();
1730 extern char *output_fix_trunc ();
1731 extern char *output_float_compare ();
1732 extern char *output_fp_cc0_set ();
1733 extern void save_386_machine_status ();
1734 extern void restore_386_machine_status ();
1735 extern void clear_386_stack_locals ();
1736 extern struct rtx_def
*assign_386_stack_local ();
1738 /* Variables in i386.c */
1739 extern char *i386_reg_alloc_order
; /* register allocation order */
1740 extern char *hi_reg_name
[]; /* names for 16 bit regs */
1741 extern char *qi_reg_name
[]; /* names for 8 bit regs (low) */
1742 extern char *qi_high_reg_name
[]; /* names for 8 bit regs (high) */
1743 extern enum reg_class regclass_map
[]; /* smalled class containing REGNO */
1744 extern struct rtx_def
*i386_compare_op0
; /* operand 0 for comparisons */
1745 extern struct rtx_def
*i386_compare_op1
; /* operand 1 for comparisons */
1747 /* External variables used */
1748 extern int optimize
; /* optimization level */
1749 extern int obey_regdecls
; /* TRUE if stupid register allocation */
1751 /* External functions used */
1752 extern struct rtx_def
*force_operand ();
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