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1 /* Definitions of target machine for GNU compiler for Intel 80386.
2 Copyright (C) 1988, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* The purpose of this file is to define the characteristics of the i386,
22 independent of assembler syntax or operating system.
24 Three other files build on this one to describe a specific assembler syntax:
25 bsd386.h, att386.h, and sun386.h.
27 The actual tm.h file for a particular system should include
28 this file, and then the file for the appropriate assembler syntax.
30 Many macros that specify assembler syntax are omitted entirely from
31 this file because they really belong in the files for particular
32 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
33 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
34 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
36 /* Names to predefine in the preprocessor for this target machine. */
40 /* Stubs for half-pic support if not OSF/1 reference platform. */
43 #define HALF_PIC_P() 0
44 #define HALF_PIC_NUMBER_PTRS 0
45 #define HALF_PIC_NUMBER_REFS 0
46 #define HALF_PIC_ENCODE(DECL)
47 #define HALF_PIC_DECLARE(NAME)
48 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
49 #define HALF_PIC_ADDRESS_P(X) 0
50 #define HALF_PIC_PTR(X) X
51 #define HALF_PIC_FINISH(STREAM)
54 /* Run-time compilation parameters selecting different hardware subsets. */
56 extern int target_flags
;
58 /* Macros used in the machine description to test the flags. */
60 /* Compile 80387 insns for floating point (not library calls). */
61 #define TARGET_80387 (target_flags & 1)
62 /* Compile code for an i486. */
63 #define TARGET_486 (target_flags & 2)
64 /* Compile using ret insn that pops args.
65 This will not work unless you use prototypes at least
66 for all functions that can take varying numbers of args. */
67 #define TARGET_RTD (target_flags & 8)
68 /* Compile passing first two args in regs 0 and 1.
69 This exists only to test compiler features that will
70 be needed for RISC chips. It is not usable
71 and is not intended to be usable on this cpu. */
72 #define TARGET_REGPARM (target_flags & 020)
74 /* Put uninitialized locals into bss, not data.
75 Meaningful only on svr3. */
76 #define TARGET_SVR3_SHLIB (target_flags & 040)
78 /* Use IEEE floating point comparisons. These handle correctly the cases
79 where the result of a comparison is unordered. Normally SIGFPE is
80 generated in such cases, in which case this isn't needed. */
81 #define TARGET_IEEE_FP (target_flags & 0100)
83 /* Functions that return a floating point value may return that value
84 in the 387 FPU or in 386 integer registers. If set, this flag causes
85 the 387 to be used, which is compatible with most calling conventions. */
86 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & 0200)
88 /* Macro to define tables used to set the flags.
89 This is a list in braces of pairs in braces,
90 each pair being { "NAME", VALUE }
91 where VALUE is the bits to set or minus the bits to clear.
92 An empty string NAME is used to identify the default VALUE. */
94 #define TARGET_SWITCHES \
97 { "soft-float", -1}, \
98 { "no-soft-float", 1}, \
105 { "no-regparm", -020}, \
106 { "svr3-shlib", 040}, \
107 { "no-svr3-shlib", -040}, \
108 { "ieee-fp", 0100}, \
109 { "no-ieee-fp", -0100}, \
110 { "fp-ret-in-387", 0200}, \
111 { "no-fp-ret-in-387", -0200}, \
113 { "", TARGET_DEFAULT}}
115 /* This is meant to be redefined in the host dependent files */
116 #define SUBTARGET_SWITCHES
119 /* target machine storage layout */
121 /* Define this if most significant byte of a word is the lowest numbered. */
122 /* That is true on the 80386. */
124 #define BITS_BIG_ENDIAN 0
126 /* Define this if most significant byte of a word is the lowest numbered. */
127 /* That is not true on the 80386. */
128 #define BYTES_BIG_ENDIAN 0
130 /* Define this if most significant word of a multiword number is the lowest
132 /* Not true for 80386 */
133 #define WORDS_BIG_ENDIAN 0
135 /* number of bits in an addressable storage unit */
136 #define BITS_PER_UNIT 8
138 /* Width in bits of a "word", which is the contents of a machine register.
139 Note that this is not necessarily the width of data type `int';
140 if using 16-bit ints on a 80386, this would still be 32.
141 But on a machine with 16-bit registers, this would be 16. */
142 #define BITS_PER_WORD 32
144 /* Width of a word, in units (bytes). */
145 #define UNITS_PER_WORD 4
147 /* Width in bits of a pointer.
148 See also the macro `Pmode' defined below. */
149 #define POINTER_SIZE 32
151 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
152 #define PARM_BOUNDARY 32
154 /* Boundary (in *bits*) on which stack pointer should be aligned. */
155 #define STACK_BOUNDARY 32
157 /* Allocation boundary (in *bits*) for the code of a function.
158 For i486, we get better performance by aligning to a cache
159 line (i.e. 16 byte) boundary. */
160 #define FUNCTION_BOUNDARY (TARGET_486 ? 128 : 32)
162 /* Alignment of field after `int : 0' in a structure. */
164 #define EMPTY_FIELD_BOUNDARY 32
166 /* Minimum size in bits of the largest boundary to which any
167 and all fundamental data types supported by the hardware
168 might need to be aligned. No data type wants to be aligned
169 rounder than this. The i386 supports 64-bit floating point
170 quantities, but these can be aligned on any 32-bit boundary. */
171 #define BIGGEST_ALIGNMENT 32
173 /* Set this non-zero if move instructions will actually fail to work
174 when given unaligned data. */
175 #define STRICT_ALIGNMENT 0
177 /* If bit field type is int, don't let it cross an int,
178 and give entire struct the alignment of an int. */
179 /* Required on the 386 since it doesn't have bitfield insns. */
180 #define PCC_BITFIELD_TYPE_MATTERS 1
182 /* Align loop starts for optimal branching. */
183 #define ASM_OUTPUT_LOOP_ALIGN(FILE) \
184 ASM_OUTPUT_ALIGN (FILE, 2)
186 /* This is how to align an instruction for optimal branching.
187 On i486 we'll get better performance by aligning on a
188 cache line (i.e. 16 byte) boundary. */
189 #define ASM_OUTPUT_ALIGN_CODE(FILE) \
190 ASM_OUTPUT_ALIGN ((FILE), (TARGET_486 ? 4 : 2))
192 /* Standard register usage. */
194 /* This processor has special stack-like registers. See reg-stack.c
199 /* Number of actual hardware registers.
200 The hardware registers are assigned numbers for the compiler
201 from 0 to just below FIRST_PSEUDO_REGISTER.
202 All registers that the compiler knows about must be given numbers,
203 even those that are not normally considered general registers.
205 In the 80386 we give the 8 general purpose registers the numbers 0-7.
206 We number the floating point registers 8-15.
207 Note that registers 0-7 can be accessed as a short or int,
208 while only 0-3 may be used with byte `mov' instructions.
210 Reg 16 does not correspond to any hardware register, but instead
211 appears in the RTL as an argument pointer prior to reload, and is
212 eliminated during reloading in favor of either the stack or frame
215 #define FIRST_PSEUDO_REGISTER 17
217 /* 1 for registers that have pervasive standard uses
218 and are not available for the register allocator.
219 On the 80386, the stack pointer is such, as is the arg pointer. */
220 #define FIXED_REGISTERS \
221 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
222 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
224 /* 1 for registers not available across function calls.
225 These must include the FIXED_REGISTERS and also any
226 registers that can be used without being saved.
227 The latter must include the registers where values are returned
228 and the register where structure-value addresses are passed.
229 Aside from that, you can include as many other registers as you like. */
231 #define CALL_USED_REGISTERS \
232 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
233 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
235 /* Macro to conditionally modify fixed_regs/call_used_regs. */
236 #define CONDITIONAL_REGISTER_USAGE \
240 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
241 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
243 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
247 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
248 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
249 if (TEST_HARD_REG_BIT (x, i)) \
250 fixed_regs[i] = call_used_regs[i] = 1; \
254 /* Return number of consecutive hard regs needed starting at reg REGNO
255 to hold something of mode MODE.
256 This is ordinarily the length in words of a value of mode MODE
257 but can be less for certain modes in special long registers.
259 Actually there are no two word move instructions for consecutive
260 registers. And only registers 0-3 may have mov byte instructions
264 #define HARD_REGNO_NREGS(REGNO, MODE) \
265 (FP_REGNO_P (REGNO) ? 1 \
266 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
268 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
269 On the 80386, the first 4 cpu registers can hold any mode
270 while the floating point registers may hold only floating point.
271 Make it clear that the fp regs could not hold a 16-byte float. */
273 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
276 : (REGNO) >= 8 ? ((GET_MODE_CLASS (MODE) == MODE_FLOAT \
277 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
278 && GET_MODE_UNIT_SIZE (MODE) <= 8) \
281 /* Value is 1 if it is a good idea to tie two pseudo registers
282 when one has mode MODE1 and one has mode MODE2.
283 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
284 for any hard reg, then this must be 0 for correct output. */
286 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
288 /* A C expression returning the cost of moving data from a register of class
289 CLASS1 to one of CLASS2.
291 On the i386, copying between floating-point and fixed-point
292 registers is expensive. */
294 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
295 ((((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \
296 || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS)) \
299 /* Specify the registers used for certain standard purposes.
300 The values of these macros are register numbers. */
302 /* on the 386 the pc register is %eip, and is not usable as a general
303 register. The ordinary mov instructions won't work */
304 /* #define PC_REGNUM */
306 /* Register to use for pushing function arguments. */
307 #define STACK_POINTER_REGNUM 7
309 /* Base register for access to local variables of the function. */
310 #define FRAME_POINTER_REGNUM 6
312 /* First floating point reg */
313 #define FIRST_FLOAT_REG 8
315 /* First & last stack-like regs */
316 #define FIRST_STACK_REG FIRST_FLOAT_REG
317 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
319 /* Value should be nonzero if functions must have frame pointers.
320 Zero means the frame pointer need not be set up (and parms
321 may be accessed via the stack pointer) in functions that seem suitable.
322 This is computed in `reload', in reload1.c. */
323 #define FRAME_POINTER_REQUIRED 0
325 /* Base register for access to arguments of the function. */
326 #define ARG_POINTER_REGNUM 16
328 /* Register in which static-chain is passed to a function. */
329 #define STATIC_CHAIN_REGNUM 2
331 /* Register to hold the addressing base for position independent
332 code access to data items. */
333 #define PIC_OFFSET_TABLE_REGNUM 3
335 /* Register in which address to store a structure value
336 arrives in the function. On the 386, the prologue
337 copies this from the stack to register %eax. */
338 #define STRUCT_VALUE_INCOMING 0
340 /* Place in which caller passes the structure value address.
341 0 means push the value on the stack like an argument. */
342 #define STRUCT_VALUE 0
344 /* Define the classes of registers for register constraints in the
345 machine description. Also define ranges of constants.
347 One of the classes must always be named ALL_REGS and include all hard regs.
348 If there is more than one class, another class must be named NO_REGS
349 and contain no registers.
351 The name GENERAL_REGS must be the name of a class (or an alias for
352 another name such as ALL_REGS). This is the class of registers
353 that is allowed by "g" or "r" in a register constraint.
354 Also, registers outside this class are allocated only when
355 instructions express preferences for them.
357 The classes must be numbered in nondecreasing order; that is,
358 a larger-numbered class must never be contained completely
359 in a smaller-numbered class.
361 For any two classes, it is very desirable that there be another
362 class that represents their union.
364 It might seem that class BREG is unnecessary, since no useful 386
365 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
366 and the "b" register constraint is useful in asms for syscalls. */
371 AREG
, DREG
, CREG
, BREG
,
372 Q_REGS
, /* %eax %ebx %ecx %edx */
374 INDEX_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp */
375 GENERAL_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
376 FP_TOP_REG
, FP_SECOND_REG
, /* %st(0) %st(1) */
378 ALL_REGS
, LIM_REG_CLASSES
381 #define N_REG_CLASSES (int) LIM_REG_CLASSES
383 /* Give names of register classes as strings for dump file. */
385 #define REG_CLASS_NAMES \
387 "AREG", "DREG", "CREG", "BREG", \
392 "FP_TOP_REG", "FP_SECOND_REG", \
396 /* Define which registers fit in which classes.
397 This is an initializer for a vector of HARD_REG_SET
398 of length N_REG_CLASSES. */
400 #define REG_CLASS_CONTENTS \
402 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
404 0x10, 0x20, /* SIREG, DIREG */ \
405 0x1007f, /* INDEX_REGS */ \
406 0x100ff, /* GENERAL_REGS */ \
407 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
408 0xff00, /* FLOAT_REGS */ \
411 /* The same information, inverted:
412 Return the class number of the smallest class containing
413 reg number REGNO. This could be a conditional expression
414 or could index an array. */
416 extern enum reg_class regclass_map
[FIRST_PSEUDO_REGISTER
];
417 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
419 /* When defined, the compiler allows registers explicitly used in the
420 rtl to be used as spill registers but prevents the compiler from
421 extending the lifetime of these registers. */
423 #define SMALL_REGISTER_CLASSES
425 #define QI_REG_P(X) \
426 (REG_P (X) && REGNO (X) < 4)
427 #define NON_QI_REG_P(X) \
428 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
430 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
431 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
433 #define STACK_REG_P(xop) (REG_P (xop) && \
434 REGNO (xop) >= FIRST_STACK_REG && \
435 REGNO (xop) <= LAST_STACK_REG)
437 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
439 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
441 /* Try to maintain the accuracy of the death notes for regs satisfying the
442 following. Important for stack like regs, to know when to pop. */
444 /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
446 /* 1 if register REGNO can magically overlap other regs.
447 Note that nonzero values work only in very special circumstances. */
449 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
451 /* The class value for index registers, and the one for base regs. */
453 #define INDEX_REG_CLASS INDEX_REGS
454 #define BASE_REG_CLASS GENERAL_REGS
456 /* Get reg_class from a letter such as appears in the machine description. */
458 #define REG_CLASS_FROM_LETTER(C) \
459 ((C) == 'r' ? GENERAL_REGS : \
460 (C) == 'q' ? Q_REGS : \
461 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
464 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
467 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
470 (C) == 'a' ? AREG : \
471 (C) == 'b' ? BREG : \
472 (C) == 'c' ? CREG : \
473 (C) == 'd' ? DREG : \
474 (C) == 'D' ? DIREG : \
475 (C) == 'S' ? SIREG : NO_REGS)
477 /* The letters I, J, K, L and M in a register constraint string
478 can be used to stand for particular ranges of immediate operands.
479 This macro defines what the ranges are.
480 C is the letter, and VALUE is a constant value.
481 Return 1 if VALUE is in the range specified by C.
483 I is for non-DImode shifts.
484 J is for DImode shifts.
485 K and L are for an `andsi' optimization.
486 M is for shifts that can be executed by the "lea" opcode.
489 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
490 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
491 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
492 (C) == 'K' ? (VALUE) == 0xff : \
493 (C) == 'L' ? (VALUE) == 0xffff : \
494 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
497 /* Similar, but for floating constants, and defining letters G and H.
498 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
499 TARGET_387 isn't set, because the stack register converter may need to
500 load 0.0 into the function value register. */
502 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
503 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
505 /* Place additional restrictions on the register class to use when it
506 is necessary to be able to hold a value of mode @var{mode} in a reload
507 register for which class @var{class} would ordinarily be used. */
509 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
510 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
513 /* Given an rtx X being reloaded into a reg required to be
514 in class CLASS, return the class of reg to actually use.
515 In general this is just CLASS; but on some machines
516 in some cases it is preferable to use a more restrictive class.
517 On the 80386 series, we prevent floating constants from being
518 reloaded into floating registers (since no move-insn can do that)
519 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
521 /* Don't put CONST_DOUBLE into FLOAT_REGS.
522 QImode must go into class Q_REGS.
523 MODE_INT must not go into FLOAT_REGS. */
525 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
526 (GET_CODE (X) == CONST_DOUBLE \
527 ? (reg_class_subset_p ((CLASS), GENERAL_REGS) || (CLASS) == ALL_REGS \
528 ? (CLASS) : NO_REGS) \
529 : GET_MODE (X) == QImode \
530 ? (! reg_class_subset_p ((CLASS), Q_REGS) ? Q_REGS : (CLASS)) \
531 : (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT && (CLASS) == FLOAT_REGS ? \
532 GENERAL_REGS : (CLASS)))
534 /* Return the maximum number of consecutive registers
535 needed to represent mode MODE in a register of class CLASS. */
536 /* On the 80386, this is the size of MODE in words,
537 except in the FP regs, where a single reg is always enough. */
538 #define CLASS_MAX_NREGS(CLASS, MODE) \
539 ((CLASS) == FLOAT_REGS ? 1 : \
540 (CLASS) == FP_TOP_REG ? 1 : \
541 (CLASS) == FP_SECOND_REG ? 1 : \
542 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
544 /* Stack layout; function entry, exit and calling. */
546 /* Define this if pushing a word on the stack
547 makes the stack pointer a smaller address. */
548 #define STACK_GROWS_DOWNWARD
550 /* Define this if the nominal address of the stack frame
551 is at the high-address end of the local variables;
552 that is, each additional local variable allocated
553 goes at a more negative offset in the frame. */
554 #define FRAME_GROWS_DOWNWARD
556 /* Offset within stack frame to start allocating local variables at.
557 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
558 first local allocated. Otherwise, it is the offset to the BEGINNING
559 of the first local allocated. */
560 #define STARTING_FRAME_OFFSET 0
562 /* If we generate an insn to push BYTES bytes,
563 this says how many the stack pointer really advances by.
564 On 386 pushw decrements by exactly 2 no matter what the position was.
565 On the 386 there is no pushb; we use pushw instead, and this
566 has the effect of rounding up to 2. */
568 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
570 /* Offset of first parameter from the argument pointer register value. */
571 #define FIRST_PARM_OFFSET(FNDECL) 0
573 /* Value is the number of bytes of arguments automatically
574 popped when returning from a subroutine call.
575 FUNTYPE is the data type of the function (as a tree),
576 or for a library call it is an identifier node for the subroutine name.
577 SIZE is the number of bytes of arguments passed on the stack.
579 On the 80386, the RTD insn may be used to pop them if the number
580 of args is fixed, but if the number is variable then the caller
581 must pop them all. RTD can't be used for library calls now
582 because the library is compiled with the Unix compiler.
583 Use of RTD is a selectable option, since it is incompatible with
584 standard Unix calling sequences. If the option is not selected,
585 the caller must always pop the args. */
587 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \
588 (TREE_CODE (FUNTYPE) == IDENTIFIER_NODE ? 0 \
590 && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
591 || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
592 == void_type_node))) ? (SIZE) \
593 : (aggregate_value_p (FUNTYPE)) ? GET_MODE_SIZE (Pmode) : 0)
595 /* Define how to find the value returned by a function.
596 VALTYPE is the data type of the value (as a tree).
597 If the precise function being called is known, FUNC is its FUNCTION_DECL;
598 otherwise, FUNC is 0. */
599 #define FUNCTION_VALUE(VALTYPE, FUNC) \
600 gen_rtx (REG, TYPE_MODE (VALTYPE), \
601 VALUE_REGNO (TYPE_MODE (VALTYPE)))
603 /* Define how to find the value returned by a library function
604 assuming the value has mode MODE. */
606 #define LIBCALL_VALUE(MODE) \
607 gen_rtx (REG, MODE, VALUE_REGNO (MODE))
609 /* 1 if N is a possible register number for function argument passing.
610 On the 80386, no registers are used in this way.
611 *NOTE* -mregparm does not work.
612 It exists only to test register calling conventions. */
614 #define FUNCTION_ARG_REGNO_P(N) 0
616 /* Define a data type for recording info about an argument list
617 during the scan of that argument list. This data type should
618 hold all necessary information about the function itself
619 and about the args processed so far, enough to enable macros
620 such as FUNCTION_ARG to determine where the next arg should go.
622 On the 80386, this is a single integer, which is a number of bytes
623 of arguments scanned so far. */
625 #define CUMULATIVE_ARGS int
627 /* Initialize a variable CUM of type CUMULATIVE_ARGS
628 for a call to a function whose data type is FNTYPE.
629 For a library call, FNTYPE is 0.
631 On the 80386, the offset starts at 0. */
633 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
636 /* Update the data in CUM to advance over an argument
637 of mode MODE and data type TYPE.
638 (TYPE is null for libcalls where that information may not be available.) */
640 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
641 ((CUM) += ((MODE) != BLKmode \
642 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
643 : (int_size_in_bytes (TYPE) + 3) & ~3))
645 /* Define where to put the arguments to a function.
646 Value is zero to push the argument on the stack,
647 or a hard register in which to store the argument.
649 MODE is the argument's machine mode.
650 TYPE is the data type of the argument (as a tree).
651 This is null for libcalls where that information may
653 CUM is a variable of type CUMULATIVE_ARGS which gives info about
654 the preceding args and about the function being called.
655 NAMED is nonzero if this argument is a named parameter
656 (otherwise it is an extra parameter matching an ellipsis). */
659 /* On the 80386 all args are pushed, except if -mregparm is specified
660 then the first two words of arguments are passed in EAX, EDX.
661 *NOTE* -mregparm does not work.
662 It exists only to test register calling conventions. */
664 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
665 ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
667 /* For an arg passed partly in registers and partly in memory,
668 this is the number of registers used.
669 For args passed entirely in registers or entirely in memory, zero. */
672 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
673 ((TARGET_REGPARM && (CUM) < 8 \
674 && 8 < ((CUM) + ((MODE) == BLKmode \
675 ? int_size_in_bytes (TYPE) \
676 : GET_MODE_SIZE (MODE)))) \
679 /* This macro generates the assembly code for function entry.
680 FILE is a stdio stream to output the code to.
681 SIZE is an int: how many units of temporary storage to allocate.
682 Refer to the array `regs_ever_live' to determine which registers
683 to save; `regs_ever_live[I]' is nonzero if register number I
684 is ever used in the function. This macro is responsible for
685 knowing which registers should not be saved even if used. */
687 #define FUNCTION_PROLOGUE(FILE, SIZE) \
688 function_prologue (FILE, SIZE)
690 /* Output assembler code to FILE to increment profiler label # LABELNO
691 for profiling a function entry. */
693 #define FUNCTION_PROFILER(FILE, LABELNO) \
697 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
698 LPREFIX, (LABELNO)); \
699 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
703 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
704 fprintf (FILE, "\tcall _mcount\n"); \
708 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
709 the stack pointer does not matter. The value is tested only in
710 functions that have frame pointers.
711 No definition is equivalent to always zero. */
712 /* Note on the 386 it might be more efficient not to define this since
713 we have to restore it ourselves from the frame pointer, in order to
716 #define EXIT_IGNORE_STACK 1
718 /* This macro generates the assembly code for function exit,
719 on machines that need it. If FUNCTION_EPILOGUE is not defined
720 then individual return instructions are generated for each
721 return statement. Args are same as for FUNCTION_PROLOGUE.
723 The function epilogue should not depend on the current stack pointer!
724 It should use the frame pointer only. This is mandatory because
725 of alloca; we also take advantage of it to omit stack adjustments
728 If the last non-note insn in the function is a BARRIER, then there
729 is no need to emit a function prologue, because control does not fall
730 off the end. This happens if the function ends in an "exit" call, or
731 if a `return' insn is emitted directly into the function. */
733 #define FUNCTION_EPILOGUE(FILE, SIZE) \
735 rtx last = get_last_insn (); \
736 if (last && GET_CODE (last) == NOTE) \
737 last = prev_nonnote_insn (last); \
738 if (! last || GET_CODE (last) != BARRIER) \
739 function_epilogue (FILE, SIZE); \
742 /* Output assembler code for a block containing the constant parts
743 of a trampoline, leaving space for the variable parts. */
745 /* On the 386, the trampoline contains three instructions:
749 #define TRAMPOLINE_TEMPLATE(FILE) \
751 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
752 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
753 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
754 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
755 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
756 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
757 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
758 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
761 /* Length in units of the trampoline for entering a nested function. */
763 #define TRAMPOLINE_SIZE 12
765 /* Emit RTL insns to initialize the variable parts of a trampoline.
766 FNADDR is an RTX for the address of the function's pure code.
767 CXT is an RTX for the static chain value for the function. */
769 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
771 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
772 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
775 /* Definitions for register eliminations.
777 This is an array of structures. Each structure initializes one pair
778 of eliminable registers. The "from" register number is given first,
779 followed by "to". Eliminations of the same "from" register are listed
780 in order of preference.
782 We have two registers that can be eliminated on the i386. First, the
783 frame pointer register can often be eliminated in favor of the stack
784 pointer register. Secondly, the argument pointer register can always be
785 eliminated; it is replaced with either the stack or frame pointer. */
787 #define ELIMINABLE_REGS \
788 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
789 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
790 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
792 /* Given FROM and TO register numbers, say whether this elimination is allowed.
793 Frame pointer elimination is automatically handled.
795 For the i386, if frame pointer elimination is being done, we would like to
796 convert ap into sp, not fp.
798 All other eliminations are valid. */
800 #define CAN_ELIMINATE(FROM, TO) \
801 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
802 ? ! frame_pointer_needed \
805 /* Define the offset between two registers, one to be eliminated, and the other
806 its replacement, at the start of a routine. */
808 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
810 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
811 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
817 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
818 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
819 || (current_function_uses_pic_offset_table \
820 && regno == PIC_OFFSET_TABLE_REGNUM)) \
823 (OFFSET) = offset + get_frame_size (); \
825 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
826 (OFFSET) += 4; /* Skip saved PC */ \
830 /* Addressing modes, and classification of registers for them. */
832 /* #define HAVE_POST_INCREMENT */
833 /* #define HAVE_POST_DECREMENT */
835 /* #define HAVE_PRE_DECREMENT */
836 /* #define HAVE_PRE_INCREMENT */
838 /* Macros to check register numbers against specific register classes. */
840 /* These assume that REGNO is a hard or pseudo reg number.
841 They give nonzero only if REGNO is a hard reg of the suitable class
842 or a pseudo reg currently allocated to a suitable hard reg.
843 Since they use reg_renumber, they are safe only once reg_renumber
844 has been allocated, which happens in local-alloc.c. */
846 #define REGNO_OK_FOR_INDEX_P(REGNO) \
847 ((REGNO) < STACK_POINTER_REGNUM \
848 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
850 #define REGNO_OK_FOR_BASE_P(REGNO) \
851 ((REGNO) <= STACK_POINTER_REGNUM \
852 || (REGNO) == ARG_POINTER_REGNUM \
853 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
855 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
856 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
858 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
859 and check its validity for a certain class.
860 We have two alternate definitions for each of them.
861 The usual definition accepts all pseudo regs; the other rejects
862 them unless they have been allocated suitable hard regs.
863 The symbol REG_OK_STRICT causes the latter definition to be used.
865 Most source files want to accept pseudo regs in the hope that
866 they will get allocated to the class that the insn wants them to be in.
867 Source files for reload pass need to be strict.
868 After reload, it makes no difference, since pseudo regs have
869 been eliminated by then. */
871 #ifndef REG_OK_STRICT
873 /* Nonzero if X is a hard reg that can be used as an index or if
874 it is a pseudo reg. */
876 #define REG_OK_FOR_INDEX_P(X) \
877 (REGNO (X) < STACK_POINTER_REGNUM \
878 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
880 /* Nonzero if X is a hard reg that can be used as a base reg
881 of if it is a pseudo reg. */
884 #define REG_OK_FOR_BASE_P(X) \
885 (REGNO (X) <= STACK_POINTER_REGNUM \
886 || REGNO (X) == ARG_POINTER_REGNUM \
887 || REGNO(X) >= FIRST_PSEUDO_REGISTER)
889 #define REG_OK_FOR_STRREG_P(X) \
890 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
894 /* Nonzero if X is a hard reg that can be used as an index. */
895 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
896 /* Nonzero if X is a hard reg that can be used as a base reg. */
897 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
898 #define REG_OK_FOR_STRREG_P(X) \
899 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
903 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
904 that is a valid memory address for an instruction.
905 The MODE argument is the machine mode for the MEM expression
906 that wants to use this address.
908 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
909 except for CONSTANT_ADDRESS_P which is usually machine-independent.
911 See legitimize_pic_address in i386.c for details as to what
912 constitutes a legitimate address when -fpic is used. */
914 #define MAX_REGS_PER_ADDRESS 2
916 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
918 /* Nonzero if the constant value X is a legitimate general operand.
919 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
921 #define LEGITIMATE_CONSTANT_P(X) 1
923 #define GO_IF_INDEXABLE_BASE(X, ADDR) \
924 if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR
926 #define LEGITIMATE_INDEX_REG_P(X) \
927 (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))
929 /* Return 1 if X is an index or an index times a scale. */
931 #define LEGITIMATE_INDEX_P(X) \
932 (LEGITIMATE_INDEX_REG_P (X) \
933 || (GET_CODE (X) == MULT \
934 && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
935 && GET_CODE (XEXP (X, 1)) == CONST_INT \
936 && (INTVAL (XEXP (X, 1)) == 2 \
937 || INTVAL (XEXP (X, 1)) == 4 \
938 || INTVAL (XEXP (X, 1)) == 8)))
940 /* Go to ADDR if X is an index term, a base reg, or a sum of those. */
942 #define GO_IF_INDEXING(X, ADDR) \
943 { if (LEGITIMATE_INDEX_P (X)) goto ADDR; \
944 GO_IF_INDEXABLE_BASE (X, ADDR); \
945 if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
946 { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
947 if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
948 { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
950 /* We used to allow this, but it isn't ever used.
951 || ((GET_CODE (X) == POST_DEC || GET_CODE (X) == POST_INC) \
952 && REG_P (XEXP (X, 0)) \
953 && REG_OK_FOR_STRREG_P (XEXP (X, 0))) \
956 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
958 if (CONSTANT_ADDRESS_P (X) \
959 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \
961 GO_IF_INDEXING (X, ADDR); \
962 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
964 rtx x0 = XEXP (X, 0); \
965 if (! flag_pic || ! SYMBOLIC_CONST (XEXP (X, 1))) \
966 { GO_IF_INDEXING (x0, ADDR); } \
967 else if (x0 == pic_offset_table_rtx) \
969 else if (GET_CODE (x0) == PLUS) \
971 if (XEXP (x0, 0) == pic_offset_table_rtx) \
972 { GO_IF_INDEXABLE_BASE (XEXP (x0, 1), ADDR); } \
973 if (XEXP (x0, 1) == pic_offset_table_rtx) \
974 { GO_IF_INDEXABLE_BASE (XEXP (x0, 0), ADDR); } \
979 /* Try machine-dependent ways of modifying an illegitimate address
980 to be legitimate. If we find one, return the new, valid address.
981 This macro is used in only one place: `memory_address' in explow.c.
983 OLDX is the address as it was before break_out_memory_refs was called.
984 In some cases it is useful to look at this to decide what needs to be done.
986 MODE and WIN are passed so that this macro can use
987 GO_IF_LEGITIMATE_ADDRESS.
989 It is always safe for this macro to do nothing. It exists to recognize
990 opportunities to optimize the output.
992 For the 80386, we handle X+REG by loading X into a register R and
993 using R+REG. R will go in a general reg and indexing will be used.
994 However, if REG is a broken-out memory address or multiplication,
995 nothing needs to be done because REG can certainly go in a general reg.
997 When -fpic is used, special handling is needed for symbolic references.
998 See comments by legitimize_pic_address in i386.c for details. */
1000 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1001 { extern rtx legitimize_pic_address (); \
1002 int ch = (X) != (OLDX); \
1003 if (flag_pic && SYMBOLIC_CONST (X)) \
1005 (X) = legitimize_pic_address (X, 0); \
1006 if (memory_address_p (MODE, X)) \
1009 if (GET_CODE (X) == PLUS) \
1010 { if (GET_CODE (XEXP (X, 0)) == MULT) \
1011 ch = 1, XEXP (X, 0) = force_operand (XEXP (X, 0), 0); \
1012 if (GET_CODE (XEXP (X, 1)) == MULT) \
1013 ch = 1, XEXP (X, 1) = force_operand (XEXP (X, 1), 0); \
1014 if (ch && GET_CODE (XEXP (X, 1)) == REG \
1015 && GET_CODE (XEXP (X, 0)) == REG) \
1017 if (flag_pic && SYMBOLIC_CONST (XEXP (X, 1))) \
1018 ch = 1, (X) = legitimize_pic_address (X, 0); \
1019 if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
1020 if (GET_CODE (XEXP (X, 0)) == REG) \
1021 { register rtx temp = gen_reg_rtx (Pmode); \
1022 register rtx val = force_operand (XEXP (X, 1), temp); \
1023 if (val != temp) emit_move_insn (temp, val); \
1024 XEXP (X, 1) = temp; \
1026 else if (GET_CODE (XEXP (X, 1)) == REG) \
1027 { register rtx temp = gen_reg_rtx (Pmode); \
1028 register rtx val = force_operand (XEXP (X, 0), temp); \
1029 if (val != temp) emit_move_insn (temp, val); \
1030 XEXP (X, 0) = temp; \
1033 /* Nonzero if the constant value X is a legitimate general operand
1034 when generating PIC code. It is given that flag_pic is on and
1035 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1037 #define LEGITIMATE_PIC_OPERAND_P(X) \
1038 (! SYMBOLIC_CONST (X) \
1039 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1041 #define SYMBOLIC_CONST(X) \
1042 (GET_CODE (X) == SYMBOL_REF \
1043 || GET_CODE (X) == LABEL_REF \
1044 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1046 /* Go to LABEL if ADDR (a legitimate address expression)
1047 has an effect that depends on the machine mode it is used for.
1048 On the 80386, only postdecrement and postincrement address depend thus
1049 (the amount of decrement or increment being the length of the operand). */
1050 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1051 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1053 /* Define this macro if references to a symbol must be treated
1054 differently depending on something about the variable or
1055 function named by the symbol (such as what section it is in).
1057 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1058 so that we may access it directly in the GOT. */
1060 #define ENCODE_SECTION_INFO(DECL) \
1065 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1066 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1067 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1068 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1069 || ! TREE_PUBLIC (DECL)); \
1074 /* Specify the machine mode that this machine uses
1075 for the index in the tablejump instruction. */
1076 #define CASE_VECTOR_MODE Pmode
1078 /* Define this if the tablejump instruction expects the table
1079 to contain offsets from the address of the table.
1080 Do not define this if the table should contain absolute addresses. */
1081 /* #define CASE_VECTOR_PC_RELATIVE */
1083 /* Specify the tree operation to be used to convert reals to integers.
1084 This should be changed to take advantage of fist --wfs ??
1086 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1088 /* This is the kind of divide that is easiest to do in the general case. */
1089 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1091 /* Define this as 1 if `char' should by default be signed; else as 0. */
1092 #define DEFAULT_SIGNED_CHAR 1
1094 /* Max number of bytes we can move from memory to memory
1095 in one reasonably fast instruction. */
1098 /* MOVE_RATIO is the number of move instructions that is better than a
1099 block move. Make this large on i386, since the block move is very
1100 inefficient with small blocks, and the hard register needs of the
1101 block move require much reload work. */
1102 #define MOVE_RATIO 5
1104 /* Define this if zero-extension is slow (more than one real instruction). */
1105 /* #define SLOW_ZERO_EXTEND */
1107 /* Nonzero if access to memory by bytes is slow and undesirable. */
1108 #define SLOW_BYTE_ACCESS 0
1110 /* Define if shifts truncate the shift count
1111 which implies one can omit a sign-extension or zero-extension
1112 of a shift count. */
1113 /* One i386, shifts do truncate the count. But bit opcodes don't. */
1115 /* #define SHIFT_COUNT_TRUNCATED */
1117 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1118 is done just by pretending it is already truncated. */
1119 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1121 /* We assume that the store-condition-codes instructions store 0 for false
1122 and some other value for true. This is the value stored for true. */
1124 #define STORE_FLAG_VALUE 1
1126 /* When a prototype says `char' or `short', really pass an `int'.
1127 (The 386 can't easily push less than an int.) */
1129 #define PROMOTE_PROTOTYPES
1131 /* Specify the machine mode that pointers have.
1132 After generation of rtl, the compiler makes no further distinction
1133 between pointers and any other objects of this machine mode. */
1134 #define Pmode SImode
1136 /* A function address in a call instruction
1137 is a byte address (for indexing purposes)
1138 so give the MEM rtx a byte's mode. */
1139 #define FUNCTION_MODE QImode
1141 /* Define this if addresses of constant functions
1142 shouldn't be put through pseudo regs where they can be cse'd.
1143 Desirable on the 386 because a CALL with a constant address is
1144 not much slower than one with a register address. */
1145 #define NO_FUNCTION_CSE
1147 /* Provide the costs of a rtl expression. This is in the body of a
1150 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1152 return COSTS_N_INSNS (10); \
1157 return COSTS_N_INSNS (40); \
1159 if (GET_CODE (XEXP (X, 0)) == REG \
1160 && GET_CODE (XEXP (X, 1)) == CONST_INT) \
1165 /* Compute the cost of computing a constant rtl expression RTX
1166 whose rtx-code is CODE. The body of this macro is a portion
1167 of a switch statement. If the code is computed here,
1168 return it with a return statement. Otherwise, break from the switch. */
1170 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1175 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 0; \
1176 case CONST_DOUBLE: \
1178 int code = standard_80387_constant_p (RTX); \
1179 return code == 1 ? 0 : \
1184 /* Compute the cost of an address. This is meant to approximate the size
1185 and/or execution delay of an insn using that address. If the cost is
1186 approximated by the RTL complexity, including CONST_COSTS above, as
1187 is usually the case for CISC machines, this macro should not be defined.
1188 For aggressively RISCy machines, only one insn format is allowed, so
1189 this macro should be a constant. The value of this macro only matters
1190 for valid addresses.
1192 For i386, it is better to use a complex address than let gcc copy
1193 the address into a reg and make a new pseudo. But not if the address
1194 requires to two regs - that would mean more pseudos with longer
1197 #define ADDRESS_COST(RTX) \
1198 ((CONSTANT_P (RTX) \
1199 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
1200 && REG_P (XEXP (RTX, 0)))) ? 0 \
1204 /* Add any extra modes needed to represent the condition code.
1206 For the i386, we need separate modes when floating-point equality
1207 comparisons are being done. */
1209 #define EXTRA_CC_MODES CCFPEQmode
1211 /* Define the names for the modes specified above. */
1212 #define EXTRA_CC_NAMES "CCFPEQ"
1214 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1215 return the mode to be used for the comparison.
1217 For floating-point equality comparisons, CCFPEQmode should be used.
1218 VOIDmode should be used in all other cases. */
1220 #define SELECT_CC_MODE(OP,X,Y) \
1221 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1222 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : CCmode)
1224 /* Define the information needed to generate branch and scc insns. This is
1225 stored from the compare operation. Note that we can't use "rtx" here
1226 since it hasn't been defined! */
1228 extern struct rtx_def
*i386_compare_op0
, *i386_compare_op1
;
1229 extern struct rtx_def
*(*i386_compare_gen
)(), *(*i386_compare_gen_eq
)();
1231 /* Tell final.c how to eliminate redundant test instructions. */
1233 /* Here we define machine-dependent flags and fields in cc_status
1234 (see `conditions.h'). */
1236 /* Set if the cc value is actually in the 80387, so a floating point
1237 conditional branch must be output. */
1238 #define CC_IN_80387 04000
1240 /* Set if the CC value was stored in a nonstandard way, so that
1241 the state of equality is indicated by zero in the carry bit. */
1242 #define CC_Z_IN_NOT_C 010000
1244 /* Store in cc_status the expressions
1245 that the condition codes will describe
1246 after execution of an instruction whose pattern is EXP.
1247 Do not alter them if the instruction would not alter the cc's. */
1249 #define NOTICE_UPDATE_CC(EXP, INSN) \
1250 notice_update_cc((EXP))
1252 /* Output a signed jump insn. Use template NORMAL ordinarily, or
1253 FLOAT following a floating point comparison.
1254 Use NO_OV following an arithmetic insn that set the cc's
1255 before a test insn that was deleted.
1256 NO_OV may be zero, meaning final should reinsert the test insn
1257 because the jump cannot be handled properly without it. */
1259 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1261 if (cc_prev_status.flags & CC_IN_80387) \
1263 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1268 /* Control the assembler format that we output, to the extent
1269 this does not vary between assemblers. */
1271 /* How to refer to registers in assembler output.
1272 This sequence is indexed by compiler's hard-register-number (see above). */
1274 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
1275 For non floating point regs, the following are the HImode names.
1277 For float regs, the stack top is sometimes referred to as "%st(0)"
1278 instead of just "%st". PRINT_REG in i386.c handles with with the
1281 #define HI_REGISTER_NAMES \
1282 {"ax","dx","cx","bx","si","di","bp","sp", \
1283 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
1285 #define REGISTER_NAMES HI_REGISTER_NAMES
1287 /* Table of additional register names to use in user input. */
1289 #define ADDITIONAL_REGISTER_NAMES \
1290 { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
1291 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
1292 "al", 0, "dl", 1, "cl", 2, "bl", 3, \
1293 "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
1295 /* Note we are omitting these since currently I don't know how
1296 to get gcc to use these, since they want the same but different
1297 number as al, and ax.
1300 /* note the last four are not really qi_registers, but
1301 the md will have to never output movb into one of them
1302 only a movw . There is no movb into the last four regs */
1304 #define QI_REGISTER_NAMES \
1305 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
1307 /* These parallel the array above, and can be used to access bits 8:15
1308 of regs 0 through 3. */
1310 #define QI_HIGH_REGISTER_NAMES \
1311 {"ah", "dh", "ch", "bh", }
1313 /* How to renumber registers for dbx and gdb. */
1315 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
1316 #define DBX_REGISTER_NUMBER(n) \
1327 /* This is how to output the definition of a user-level label named NAME,
1328 such as the label on a static function or variable NAME. */
1330 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1331 (assemble_name (FILE, NAME), fputs (":\n", FILE))
1333 /* This is how to output an assembler line defining a `double' constant. */
1335 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1336 fprintf (FILE, "%s %.22e\n", ASM_DOUBLE, (VALUE))
1339 /* This is how to output an assembler line defining a `float' constant. */
1341 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1342 do { union { float f; long l;} tem; \
1344 fprintf((FILE), "%s 0x%x\n", ASM_LONG, tem.l); \
1348 /* Store in OUTPUT a string (made with alloca) containing
1349 an assembler-name for a local static variable named NAME.
1350 LABELNO is an integer which is different for each call. */
1352 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1353 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1354 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1358 /* This is how to output an assembler line defining an `int' constant. */
1360 #define ASM_OUTPUT_INT(FILE,VALUE) \
1361 ( fprintf (FILE, "%s ", ASM_LONG), \
1362 output_addr_const (FILE,(VALUE)), \
1365 /* Likewise for `char' and `short' constants. */
1366 /* is this supposed to do align too?? */
1368 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1369 ( fprintf (FILE, "%s ", ASM_SHORT), \
1370 output_addr_const (FILE,(VALUE)), \
1374 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1375 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1376 output_addr_const (FILE,(VALUE)), \
1377 fputs (",", FILE), \
1378 output_addr_const (FILE,(VALUE)), \
1379 fputs (" >> 8\n",FILE))
1383 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1384 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1385 output_addr_const (FILE, (VALUE)), \
1388 /* This is how to output an assembler line for a numeric constant byte. */
1390 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1391 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
1393 /* This is how to output an insn to push a register on the stack.
1394 It need not be very fast code. */
1396 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1397 fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
1399 /* This is how to output an insn to pop a register from the stack.
1400 It need not be very fast code. */
1402 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1403 fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
1405 /* This is how to output an element of a case-vector that is absolute.
1408 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1409 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
1411 /* This is how to output an element of a case-vector that is relative.
1412 We don't use these on the 386 yet, because the ATT assembler can't do
1413 forward reference the differences.
1416 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1417 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
1419 /* Define the parentheses used to group arithmetic operations
1420 in assembler code. */
1422 #define ASM_OPEN_PAREN ""
1423 #define ASM_CLOSE_PAREN ""
1425 /* Define results of standard character escape sequences. */
1426 #define TARGET_BELL 007
1427 #define TARGET_BS 010
1428 #define TARGET_TAB 011
1429 #define TARGET_NEWLINE 012
1430 #define TARGET_VT 013
1431 #define TARGET_FF 014
1432 #define TARGET_CR 015
1434 /* Print operand X (an rtx) in assembler syntax to file FILE.
1435 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1436 The CODE z takes the size of operand from the following digit, and
1437 outputs b,w,or l respectively.
1439 On the 80386, we use several such letters:
1440 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
1441 L,W,B,Q,S -- print the opcode suffix for specified size of operand.
1442 R -- print the prefix for register names.
1443 z -- print the opcode suffix for the size of the current operand.
1444 * -- print a star (in certain assembler syntax)
1445 w -- print the operand as if it's a "word" (HImode) even if it isn't.
1446 b -- print the operand as if it's a byte (QImode) even if it isn't.
1447 c -- don't print special prefixes before constant operands. */
1449 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1452 #define PRINT_OPERAND(FILE, X, CODE) \
1453 print_operand (FILE, X, CODE)
1456 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1457 print_operand_address (FILE, ADDR)
1459 /* Output the prefix for an immediate operand, or for an offset operand. */
1460 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
1461 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
1463 /* Routines in libgcc that return floats must return them in an fp reg,
1464 just as other functions do which return such values.
1465 These macros make that happen. */
1467 #define FLOAT_VALUE_TYPE float
1468 #define INTIFY(FLOATVAL) FLOATVAL
1470 /* Nonzero if INSN magically clobbers register REGNO. */
1472 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
1473 (FP_REGNO_P (REGNO) \
1474 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
1477 /* a letter which is not needed by the normal asm syntax, which
1478 we can use for operand syntax in the extended asm */
1480 #define ASM_OPERAND_LETTER '#'
1482 #define RET return ""
1483 #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
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