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gcc.gnu.org Git - gcc.git/blob - gcc/config/i386/i386.h
1 /* Definitions of target machine for GNU compiler for Intel X86
3 Copyright (C) 1988, 92, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* The purpose of this file is to define the characteristics of the i386,
23 independent of assembler syntax or operating system.
25 Three other files build on this one to describe a specific assembler syntax:
26 bsd386.h, att386.h, and sun386.h.
28 The actual tm.h file for a particular system should include
29 this file, and then the file for the appropriate assembler syntax.
31 Many macros that specify assembler syntax are omitted entirely from
32 this file because they really belong in the files for particular
33 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
34 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
35 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
37 /* Names to predefine in the preprocessor for this target machine. */
41 /* Stubs for half-pic support if not OSF/1 reference platform. */
44 #define HALF_PIC_P() 0
45 #define HALF_PIC_NUMBER_PTRS 0
46 #define HALF_PIC_NUMBER_REFS 0
47 #define HALF_PIC_ENCODE(DECL)
48 #define HALF_PIC_DECLARE(NAME)
49 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
50 #define HALF_PIC_ADDRESS_P(X) 0
51 #define HALF_PIC_PTR(X) X
52 #define HALF_PIC_FINISH(STREAM)
55 /* Define the specific costs for a given cpu */
57 struct processor_costs
{
58 int add
; /* cost of an add instruction */
59 int lea
; /* cost of a lea instruction */
60 int shift_var
; /* variable shift costs */
61 int shift_const
; /* constant shift costs */
62 int mult_init
; /* cost of starting a multiply */
63 int mult_bit
; /* cost of multiply per each bit set */
64 int divide
; /* cost of a divide/mod */
67 extern struct processor_costs
*ix86_cost
;
69 /* Run-time compilation parameters selecting different hardware subsets. */
71 extern int target_flags
;
73 /* Macros used in the machine description to test the flags. */
75 /* configure can arrange to make this 2, to force a 486. */
76 #ifndef TARGET_CPU_DEFAULT
77 #define TARGET_CPU_DEFAULT 0
80 /* Masks for the -m switches */
81 #define MASK_80387 000000000001 /* Hardware floating point */
82 #define MASK_NOTUSED1 000000000002 /* bit not currently used */
83 #define MASK_NOTUSED2 000000000004 /* bit not currently used */
84 #define MASK_RTD 000000000010 /* Use ret that pops args */
85 #define MASK_ALIGN_DOUBLE 000000000020 /* align doubles to 2 word boundary */
86 #define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */
87 #define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */
88 #define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */
89 #define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */
90 #define MASK_OMIT_LEAF_FRAME_POINTER 0x00000800 /* omit leaf frame pointers */
91 /* Temporary codegen switches */
92 #define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */
93 #define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */
94 #define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */
95 #define MASK_NO_PSEUDO 000010000000 /* Move op's args -> pseudos */
96 #define MASK_DEBUG_ARG 000020000000 /* Debug function_arg */
97 #define MASK_SCHEDULE_PROLOGUE 000040000000 /* Emit prologue as rtl */
98 #define MASK_STACK_PROBE 000100000000 /* Enable stack probing */
100 /* Use the floating point instructions */
101 #define TARGET_80387 (target_flags & MASK_80387)
103 /* Compile using ret insn that pops args.
104 This will not work unless you use prototypes at least
105 for all functions that can take varying numbers of args. */
106 #define TARGET_RTD (target_flags & MASK_RTD)
108 /* Align doubles to a two word boundary. This breaks compatibility with
109 the published ABI's for structures containing doubles, but produces
110 faster code on the pentium. */
111 #define TARGET_ALIGN_DOUBLE (target_flags & MASK_ALIGN_DOUBLE)
113 /* Put uninitialized locals into bss, not data.
114 Meaningful only on svr3. */
115 #define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB)
117 /* Use IEEE floating point comparisons. These handle correctly the cases
118 where the result of a comparison is unordered. Normally SIGFPE is
119 generated in such cases, in which case this isn't needed. */
120 #define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP)
122 /* Functions that return a floating point value may return that value
123 in the 387 FPU or in 386 integer registers. If set, this flag causes
124 the 387 to be used, which is compatible with most calling conventions. */
125 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
127 /* Disable generation of FP sin, cos and sqrt operations for 387.
128 This is because FreeBSD lacks these in the math-emulator-code */
129 #define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387)
131 /* Don't create frame pointers for leaf functions */
132 #define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
134 /* Temporary switches for tuning code generation */
136 /* Disable 32x32->64 bit multiplies that are used for long long multiplies
137 and division by constants, but sometimes cause reload problems. */
138 #define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY)
139 #define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY)
141 /* Emit/Don't emit prologue as rtl */
142 #define TARGET_SCHEDULE_PROLOGUE (target_flags & MASK_SCHEDULE_PROLOGUE)
144 /* Debug GO_IF_LEGITIMATE_ADDRESS */
145 #define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR)
147 /* Debug FUNCTION_ARG macros */
148 #define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG)
150 /* Hack macros for tuning code generation */
151 #define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
152 #define TARGET_PSEUDO ((target_flags & MASK_NO_PSEUDO) == 0) /* Move op's args into pseudos */
154 #define TARGET_386 (ix86_cpu == PROCESSOR_I386)
155 #define TARGET_486 (ix86_cpu == PROCESSOR_I486)
156 #define TARGET_PENTIUM (ix86_cpu == PROCESSOR_PENTIUM)
157 #define TARGET_PENTIUMPRO (ix86_cpu == PROCESSOR_PENTIUMPRO)
158 #define TARGET_USE_LEAVE (ix86_cpu == PROCESSOR_I386)
159 #define TARGET_PUSH_MEMORY (ix86_cpu == PROCESSOR_I386)
160 #define TARGET_ZERO_EXTEND_WITH_AND (ix86_cpu != PROCESSOR_I386 \
161 && ix86_cpu != PROCESSOR_PENTIUMPRO)
162 #define TARGET_DOUBLE_WITH_ADD (ix86_cpu != PROCESSOR_I386)
163 #define TARGET_USE_BIT_TEST (ix86_cpu == PROCESSOR_I386)
164 #define TARGET_UNROLL_STRLEN (ix86_cpu != PROCESSOR_I386)
165 #define TARGET_USE_Q_REG (ix86_cpu == PROCESSOR_PENTIUM \
166 || ix86_cpu == PROCESSOR_PENTIUMPRO)
167 #define TARGET_USE_ANY_REG (ix86_cpu == PROCESSOR_I486)
168 #define TARGET_CMOVE (ix86_arch == PROCESSOR_PENTIUMPRO)
169 #define TARGET_DEEP_BRANCH_PREDICTION (ix86_cpu == PROCESSOR_PENTIUMPRO)
170 #define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE)
172 #define TARGET_SWITCHES \
173 { { "80387", MASK_80387 }, \
174 { "no-80387", -MASK_80387 }, \
175 { "hard-float", MASK_80387 }, \
176 { "soft-float", -MASK_80387 }, \
177 { "no-soft-float", MASK_80387 }, \
183 { "pentiumpro", 0 }, \
184 { "rtd", MASK_RTD }, \
185 { "no-rtd", -MASK_RTD }, \
186 { "align-double", MASK_ALIGN_DOUBLE }, \
187 { "no-align-double", -MASK_ALIGN_DOUBLE }, \
188 { "svr3-shlib", MASK_SVR3_SHLIB }, \
189 { "no-svr3-shlib", -MASK_SVR3_SHLIB }, \
190 { "ieee-fp", MASK_IEEE_FP }, \
191 { "no-ieee-fp", -MASK_IEEE_FP }, \
192 { "fp-ret-in-387", MASK_FLOAT_RETURNS }, \
193 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS }, \
194 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387 }, \
195 { "fancy-math-387", -MASK_NO_FANCY_MATH_387 }, \
196 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER }, \
197 { "no-omit-leaf-frame-pointer",-MASK_OMIT_LEAF_FRAME_POINTER }, \
198 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY }, \
199 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY }, \
200 { "schedule-prologue", MASK_SCHEDULE_PROLOGUE }, \
201 { "no-schedule-prologue", -MASK_SCHEDULE_PROLOGUE }, \
202 { "debug-addr", MASK_DEBUG_ADDR }, \
203 { "no-debug-addr", -MASK_DEBUG_ADDR }, \
204 { "move", -MASK_NO_MOVE }, \
205 { "no-move", MASK_NO_MOVE }, \
206 { "debug-arg", MASK_DEBUG_ARG }, \
207 { "no-debug-arg", -MASK_DEBUG_ARG }, \
208 { "stack-arg-probe", MASK_STACK_PROBE }, \
209 { "no-stack-arg-probe", -MASK_STACK_PROBE }, \
213 { "", MASK_SCHEDULE_PROLOGUE | TARGET_DEFAULT}}
215 /* Which processor to schedule for. The cpu attribute defines a list that
216 mirrors this list, so changes to i386.md must be made at the same time. */
219 {PROCESSOR_I386
, /* 80386 */
220 PROCESSOR_I486
, /* 80486DX, 80486SX, 80486DX[24] */
222 PROCESSOR_PENTIUMPRO
};
224 #define PROCESSOR_I386_STRING "i386"
225 #define PROCESSOR_I486_STRING "i486"
226 #define PROCESSOR_I586_STRING "i586"
227 #define PROCESSOR_PENTIUM_STRING "pentium"
228 #define PROCESSOR_I686_STRING "i686"
229 #define PROCESSOR_PENTIUMPRO_STRING "pentiumpro"
231 extern enum processor_type ix86_cpu
;
233 extern int ix86_arch
;
235 /* Define the default processor. This is overridden by other tm.h files. */
236 #define PROCESSOR_DEFAULT \
237 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \
239 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \
240 ? PROCESSOR_PENTIUM \
241 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \
242 ? PROCESSOR_PENTIUMPRO \
244 #define PROCESSOR_DEFAULT_STRING \
245 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \
246 ? PROCESSOR_I486_STRING \
247 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \
248 ? PROCESSOR_PENTIUM_STRING \
249 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \
250 ? PROCESSOR_PENTIUMPRO_STRING \
251 : PROCESSOR_I386_STRING
253 /* This macro is similar to `TARGET_SWITCHES' but defines names of
254 command options that have values. Its definition is an
255 initializer with a subgrouping for each command option.
257 Each subgrouping contains a string constant, that defines the
258 fixed part of the option name, and the address of a variable. The
259 variable, type `char *', is set to the variable part of the given
260 option if the fixed part matches. The actual option name is made
261 by appending `-m' to the specified name. */
262 #define TARGET_OPTIONS \
263 { { "cpu=", &ix86_cpu_string}, \
264 { "arch=", &ix86_arch_string}, \
265 { "reg-alloc=", &i386_reg_alloc_order }, \
266 { "regparm=", &i386_regparm_string }, \
267 { "align-loops=", &i386_align_loops_string }, \
268 { "align-jumps=", &i386_align_jumps_string }, \
269 { "align-functions=", &i386_align_funcs_string }, \
270 { "branch-cost=", &i386_branch_cost_string }, \
274 /* Sometimes certain combinations of command options do not make
275 sense on a particular target machine. You can define a macro
276 `OVERRIDE_OPTIONS' to take account of this. This macro, if
277 defined, is executed once just after all the command options have
280 Don't use this macro to turn on various extra optimizations for
281 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
283 #define OVERRIDE_OPTIONS override_options ()
285 /* These are meant to be redefined in the host dependent files */
286 #define SUBTARGET_SWITCHES
287 #define SUBTARGET_OPTIONS
289 /* Define this to change the optimizations performed by default. */
290 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE)
292 /* Specs for the compiler proper */
295 #define CC1_CPU_SPEC "\
297 %{m386:-mcpu=i386 -march=i386} \
298 %{mno-486:-mcpu=i386 -march=i386} \
299 %{m486:-mcpu=i486 -march=i486} \
300 %{mno-386:-mcpu=i486 -march=i486} \
301 %{mno-pentium:-mcpu=i486 -march=i486} \
302 %{mpentium:-mcpu=pentium} \
303 %{mno-pentiumpro:-mcpu=pentium} \
304 %{mpentiumpro:-mcpu=pentiumpro}}"
307 #ifndef CPP_CPU_DEFAULT_SPEC
308 #if TARGET_CPU_DEFAULT == 1
309 #define CPP_CPU_DEFAULT_SPEC "-Di486"
311 #if TARGET_CPU_DEFAULT == 2
312 #define CPP_CPU_DEFAULT_SPEC "-Dpentium -Di586"
314 #if TARGET_CPU_DEFAULT == 3
315 #define CPP_CPU_DEFAULT_SPEC "-Dpentiumpro -Di686"
317 #define CPP_CPU_DEFAULT_SPEC ""
321 #endif /* CPP_CPU_DEFAULT_SPEC */
324 #define CPP_CPU_SPEC "\
325 -Di386 -Asystem(unix) -Acpu(i386) -Amachine(i386) \
326 %{mcpu=i486:-Di486} %{m486:-Di486} \
327 %{mpentium:-Dpentium -Di586} %{mcpu=pentium:-Dpentium -Di586} \
328 %{mpentiumpro:-Dpentiumpro -Di686} %{mcpu=pentiumpro:-Dpentiumpro -Di686} \
329 %{!mcpu*:%{!m486:%{!mpentium*: %[cpp_cpu_default]}}}"
333 #define CC1_SPEC "%(cc1_spec) "
336 /* This macro defines names of additional specifications to put in the
337 specs that can be used in various specifications like CC1_SPEC. Its
338 definition is an initializer with a subgrouping for each command option.
340 Each subgrouping contains a string constant, that defines the
341 specification name, and a string constant that used by the GNU CC driver
344 Do not define this macro if it does not need to do anything. */
346 #ifndef SUBTARGET_EXTRA_SPECS
347 #define SUBTARGET_EXTRA_SPECS
350 #define EXTRA_SPECS \
351 { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \
352 { "cpp_cpu", CPP_CPU_SPEC }, \
353 { "cc1_cpu", CC1_CPU_SPEC }, \
354 SUBTARGET_EXTRA_SPECS
356 /* target machine storage layout */
358 /* Define for XFmode extended real floating point support.
359 This will automatically cause REAL_ARITHMETIC to be defined. */
360 #define LONG_DOUBLE_TYPE_SIZE 96
362 /* Define if you don't want extended real, but do want to use the
363 software floating point emulator for REAL_ARITHMETIC and
364 decimal <-> binary conversion. */
365 /* #define REAL_ARITHMETIC */
367 /* Define this if most significant byte of a word is the lowest numbered. */
368 /* That is true on the 80386. */
370 #define BITS_BIG_ENDIAN 0
372 /* Define this if most significant byte of a word is the lowest numbered. */
373 /* That is not true on the 80386. */
374 #define BYTES_BIG_ENDIAN 0
376 /* Define this if most significant word of a multiword number is the lowest
378 /* Not true for 80386 */
379 #define WORDS_BIG_ENDIAN 0
381 /* number of bits in an addressable storage unit */
382 #define BITS_PER_UNIT 8
384 /* Width in bits of a "word", which is the contents of a machine register.
385 Note that this is not necessarily the width of data type `int';
386 if using 16-bit ints on a 80386, this would still be 32.
387 But on a machine with 16-bit registers, this would be 16. */
388 #define BITS_PER_WORD 32
390 /* Width of a word, in units (bytes). */
391 #define UNITS_PER_WORD 4
393 /* Width in bits of a pointer.
394 See also the macro `Pmode' defined below. */
395 #define POINTER_SIZE 32
397 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
398 #define PARM_BOUNDARY 32
400 /* Boundary (in *bits*) on which stack pointer should be aligned. */
401 #define STACK_BOUNDARY 32
403 /* Allocation boundary (in *bits*) for the code of a function.
404 For i486, we get better performance by aligning to a cache
405 line (i.e. 16 byte) boundary. */
406 #define FUNCTION_BOUNDARY (1 << (i386_align_funcs + 3))
408 /* Alignment of field after `int : 0' in a structure. */
410 #define EMPTY_FIELD_BOUNDARY 32
412 /* Minimum size in bits of the largest boundary to which any
413 and all fundamental data types supported by the hardware
414 might need to be aligned. No data type wants to be aligned
415 rounder than this. The i386 supports 64-bit floating point
416 quantities, but these can be aligned on any 32-bit boundary.
417 The published ABIs say that doubles should be aligned on word
418 boundaries, but the Pentium gets better performance with them
419 aligned on 64 bit boundaries. */
420 #define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32)
422 /* align DFmode constants and nonaggregates */
423 #define ALIGN_DFmode (!TARGET_386)
425 /* If defined, a C expression to compute the alignment for a static
426 variable. TYPE is the data type, and ALIGN is the alignment that
427 the object would ordinarily have. The value of this macro is used
428 instead of that alignment to align the object.
430 If this macro is not defined, then ALIGN is used.
432 One use of this macro is to increase alignment of medium-size
433 data to make it all fit in fewer cache lines. Another is to
434 cause character arrays to be word-aligned so that `strcpy' calls
435 that copy constants to character arrays can be done inline. */
437 #define DATA_ALIGNMENT(TYPE, ALIGN) \
438 ((AGGREGATE_TYPE_P (TYPE) \
439 && TYPE_SIZE (TYPE) \
440 && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \
441 && (TREE_INT_CST_LOW (TYPE_SIZE (TYPE)) >= 256 \
442 || TREE_INT_CST_HIGH (TYPE_SIZE (TYPE))) && (ALIGN) < 256) \
444 : TREE_CODE (TYPE) == ARRAY_TYPE \
445 ? ((TYPE_MODE (TREE_TYPE (TYPE)) == DFmode && (ALIGN) < 64) \
447 : (TYPE_MODE (TREE_TYPE (TYPE)) == XFmode && (ALIGN) < 128) \
450 : TREE_CODE (TYPE) == COMPLEX_TYPE \
451 ? ((TYPE_MODE (TYPE) == DCmode && (ALIGN) < 64) \
453 : (TYPE_MODE (TYPE) == XCmode && (ALIGN) < 128) \
456 : ((TREE_CODE (TYPE) == RECORD_TYPE \
457 || TREE_CODE (TYPE) == UNION_TYPE \
458 || TREE_CODE (TYPE) == QUAL_UNION_TYPE) \
459 && TYPE_FIELDS (TYPE)) \
460 ? ((DECL_MODE (TYPE_FIELDS (TYPE)) == DFmode && (ALIGN) < 64) \
462 : (DECL_MODE (TYPE_FIELDS (TYPE)) == XFmode && (ALIGN) < 128) \
465 : TREE_CODE (TYPE) == REAL_TYPE \
466 ? ((TYPE_MODE (TYPE) == DFmode && (ALIGN) < 64) \
468 : (TYPE_MODE (TYPE) == XFmode && (ALIGN) < 128) \
473 /* Set this non-zero if move instructions will actually fail to work
474 when given unaligned data. */
475 #define STRICT_ALIGNMENT 0
477 /* If bit field type is int, don't let it cross an int,
478 and give entire struct the alignment of an int. */
479 /* Required on the 386 since it doesn't have bitfield insns. */
480 #define PCC_BITFIELD_TYPE_MATTERS 1
482 /* Maximum power of 2 that code can be aligned to. */
483 #define MAX_CODE_ALIGN 6 /* 64 byte alignment */
485 /* Align loop starts for optimal branching. */
486 #define LOOP_ALIGN(LABEL) (i386_align_loops)
488 /* This is how to align an instruction for optimal branching.
489 On i486 we'll get better performance by aligning on a
490 cache line (i.e. 16 byte) boundary. */
491 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) (i386_align_jumps)
494 /* Standard register usage. */
496 /* This processor has special stack-like registers. See reg-stack.c
500 #define IS_STACK_MODE(mode) (mode==DFmode || mode==SFmode || mode==XFmode)
502 /* Number of actual hardware registers.
503 The hardware registers are assigned numbers for the compiler
504 from 0 to just below FIRST_PSEUDO_REGISTER.
505 All registers that the compiler knows about must be given numbers,
506 even those that are not normally considered general registers.
508 In the 80386 we give the 8 general purpose registers the numbers 0-7.
509 We number the floating point registers 8-15.
510 Note that registers 0-7 can be accessed as a short or int,
511 while only 0-3 may be used with byte `mov' instructions.
513 Reg 16 does not correspond to any hardware register, but instead
514 appears in the RTL as an argument pointer prior to reload, and is
515 eliminated during reloading in favor of either the stack or frame
518 #define FIRST_PSEUDO_REGISTER 17
520 /* 1 for registers that have pervasive standard uses
521 and are not available for the register allocator.
522 On the 80386, the stack pointer is such, as is the arg pointer. */
523 #define FIXED_REGISTERS \
524 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
525 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
527 /* 1 for registers not available across function calls.
528 These must include the FIXED_REGISTERS and also any
529 registers that can be used without being saved.
530 The latter must include the registers where values are returned
531 and the register where structure-value addresses are passed.
532 Aside from that, you can include as many other registers as you like. */
534 #define CALL_USED_REGISTERS \
535 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
536 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
538 /* Order in which to allocate registers. Each register must be
539 listed once, even those in FIXED_REGISTERS. List frame pointer
540 late and fixed registers last. Note that, in general, we prefer
541 registers listed in CALL_USED_REGISTERS, keeping the others
542 available for storage of persistent values.
544 Three different versions of REG_ALLOC_ORDER have been tried:
546 If the order is edx, ecx, eax, ... it produces a slightly faster compiler,
547 but slower code on simple functions returning values in eax.
549 If the order is eax, ecx, edx, ... it causes reload to abort when compiling
550 perl 4.036 due to not being able to create a DImode register (to hold a 2
553 If the order is eax, edx, ecx, ... it produces better code for simple
554 functions, and a slightly slower compiler. Users complained about the code
555 generated by allocating edx first, so restore the 'natural' order of things. */
557 #define REG_ALLOC_ORDER \
558 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
559 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 }
561 /* A C statement (sans semicolon) to choose the order in which to
562 allocate hard registers for pseudo-registers local to a basic
565 Store the desired register order in the array `reg_alloc_order'.
566 Element 0 should be the register to allocate first; element 1, the
567 next register; and so on.
569 The macro body should not assume anything about the contents of
570 `reg_alloc_order' before execution of the macro.
572 On most machines, it is not necessary to define this macro. */
574 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
576 /* Macro to conditionally modify fixed_regs/call_used_regs. */
577 #define CONDITIONAL_REGISTER_USAGE \
581 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
582 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
584 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
588 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
589 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
590 if (TEST_HARD_REG_BIT (x, i)) \
591 fixed_regs[i] = call_used_regs[i] = 1; \
595 /* Return number of consecutive hard regs needed starting at reg REGNO
596 to hold something of mode MODE.
597 This is ordinarily the length in words of a value of mode MODE
598 but can be less for certain modes in special long registers.
600 Actually there are no two word move instructions for consecutive
601 registers. And only registers 0-3 may have mov byte instructions
605 #define HARD_REGNO_NREGS(REGNO, MODE) \
606 (FP_REGNO_P (REGNO) ? 1 \
607 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
609 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
610 On the 80386, the first 4 cpu registers can hold any mode
611 while the floating point registers may hold only floating point.
612 Make it clear that the fp regs could not hold a 16-byte float. */
614 /* The casts to int placate a compiler on a microvax,
615 for cross-compiler testing. */
617 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
620 : FP_REGNO_P (REGNO) \
621 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
622 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
623 && GET_MODE_UNIT_SIZE (MODE) <= (LONG_DOUBLE_TYPE_SIZE == 96 ? 12 : 8))\
624 : (int) (MODE) != (int) QImode ? 1 \
625 : (reload_in_progress | reload_completed) == 1)
627 /* Value is 1 if it is a good idea to tie two pseudo registers
628 when one has mode MODE1 and one has mode MODE2.
629 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
630 for any hard reg, then this must be 0 for correct output. */
632 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
634 /* Specify the registers used for certain standard purposes.
635 The values of these macros are register numbers. */
637 /* on the 386 the pc register is %eip, and is not usable as a general
638 register. The ordinary mov instructions won't work */
639 /* #define PC_REGNUM */
641 /* Register to use for pushing function arguments. */
642 #define STACK_POINTER_REGNUM 7
644 /* Base register for access to local variables of the function. */
645 #define FRAME_POINTER_REGNUM 6
647 /* First floating point reg */
648 #define FIRST_FLOAT_REG 8
650 /* First & last stack-like regs */
651 #define FIRST_STACK_REG FIRST_FLOAT_REG
652 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
654 /* Value should be nonzero if functions must have frame pointers.
655 Zero means the frame pointer need not be set up (and parms
656 may be accessed via the stack pointer) in functions that seem suitable.
657 This is computed in `reload', in reload1.c. */
658 #define FRAME_POINTER_REQUIRED (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ())
660 /* Base register for access to arguments of the function. */
661 #define ARG_POINTER_REGNUM 16
663 /* Register in which static-chain is passed to a function. */
664 #define STATIC_CHAIN_REGNUM 2
666 /* Register to hold the addressing base for position independent
667 code access to data items. */
668 #define PIC_OFFSET_TABLE_REGNUM 3
670 /* Register in which address to store a structure value
671 arrives in the function. On the 386, the prologue
672 copies this from the stack to register %eax. */
673 #define STRUCT_VALUE_INCOMING 0
675 /* Place in which caller passes the structure value address.
676 0 means push the value on the stack like an argument. */
677 #define STRUCT_VALUE 0
679 /* A C expression which can inhibit the returning of certain function
680 values in registers, based on the type of value. A nonzero value
681 says to return the function value in memory, just as large
682 structures are always returned. Here TYPE will be a C expression
683 of type `tree', representing the data type of the value.
685 Note that values of mode `BLKmode' must be explicitly handled by
686 this macro. Also, the option `-fpcc-struct-return' takes effect
687 regardless of this macro. On most systems, it is possible to
688 leave the macro undefined; this causes a default definition to be
689 used, whose value is the constant 1 for `BLKmode' values, and 0
692 Do not use this macro to indicate that structures and unions
693 should always be returned in memory. You should instead use
694 `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */
696 #define RETURN_IN_MEMORY(TYPE) \
697 ((TYPE_MODE (TYPE) == BLKmode) || int_size_in_bytes (TYPE) > 12)
700 /* Define the classes of registers for register constraints in the
701 machine description. Also define ranges of constants.
703 One of the classes must always be named ALL_REGS and include all hard regs.
704 If there is more than one class, another class must be named NO_REGS
705 and contain no registers.
707 The name GENERAL_REGS must be the name of a class (or an alias for
708 another name such as ALL_REGS). This is the class of registers
709 that is allowed by "g" or "r" in a register constraint.
710 Also, registers outside this class are allocated only when
711 instructions express preferences for them.
713 The classes must be numbered in nondecreasing order; that is,
714 a larger-numbered class must never be contained completely
715 in a smaller-numbered class.
717 For any two classes, it is very desirable that there be another
718 class that represents their union.
720 It might seem that class BREG is unnecessary, since no useful 386
721 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
722 and the "b" register constraint is useful in asms for syscalls. */
727 AREG
, DREG
, CREG
, BREG
,
728 AD_REGS
, /* %eax/%edx for DImode */
729 Q_REGS
, /* %eax %ebx %ecx %edx */
731 INDEX_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp */
732 GENERAL_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
733 FP_TOP_REG
, FP_SECOND_REG
, /* %st(0) %st(1) */
735 ALL_REGS
, LIM_REG_CLASSES
738 #define N_REG_CLASSES (int) LIM_REG_CLASSES
740 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
742 /* Give names of register classes as strings for dump file. */
744 #define REG_CLASS_NAMES \
746 "AREG", "DREG", "CREG", "BREG", \
752 "FP_TOP_REG", "FP_SECOND_REG", \
756 /* Define which registers fit in which classes.
757 This is an initializer for a vector of HARD_REG_SET
758 of length N_REG_CLASSES. */
760 #define REG_CLASS_CONTENTS \
762 {0x1}, {0x2}, {0x4}, {0x8}, /* AREG, DREG, CREG, BREG */ \
763 {0x3}, /* AD_REGS */ \
764 {0xf}, /* Q_REGS */ \
765 {0x10}, {0x20}, /* SIREG, DIREG */ \
766 {0x7f}, /* INDEX_REGS */ \
767 {0x100ff}, /* GENERAL_REGS */ \
768 {0x0100}, {0x0200}, /* FP_TOP_REG, FP_SECOND_REG */ \
769 {0xff00}, /* FLOAT_REGS */ \
772 /* The same information, inverted:
773 Return the class number of the smallest class containing
774 reg number REGNO. This could be a conditional expression
775 or could index an array. */
777 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
779 /* When defined, the compiler allows registers explicitly used in the
780 rtl to be used as spill registers but prevents the compiler from
781 extending the lifetime of these registers. */
783 #define SMALL_REGISTER_CLASSES 1
785 #define QI_REG_P(X) \
786 (REG_P (X) && REGNO (X) < 4)
787 #define NON_QI_REG_P(X) \
788 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
790 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
791 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
793 #define STACK_REG_P(xop) (REG_P (xop) && \
794 REGNO (xop) >= FIRST_STACK_REG && \
795 REGNO (xop) <= LAST_STACK_REG)
797 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
799 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
801 /* Try to maintain the accuracy of the death notes for regs satisfying the
802 following. Important for stack like regs, to know when to pop. */
804 /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
806 /* 1 if register REGNO can magically overlap other regs.
807 Note that nonzero values work only in very special circumstances. */
809 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
811 /* The class value for index registers, and the one for base regs. */
813 #define INDEX_REG_CLASS INDEX_REGS
814 #define BASE_REG_CLASS GENERAL_REGS
816 /* Get reg_class from a letter such as appears in the machine description. */
818 #define REG_CLASS_FROM_LETTER(C) \
819 ((C) == 'r' ? GENERAL_REGS : \
820 (C) == 'q' ? Q_REGS : \
821 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
824 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
827 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
830 (C) == 'a' ? AREG : \
831 (C) == 'b' ? BREG : \
832 (C) == 'c' ? CREG : \
833 (C) == 'd' ? DREG : \
834 (C) == 'A' ? AD_REGS : \
835 (C) == 'D' ? DIREG : \
836 (C) == 'S' ? SIREG : NO_REGS)
838 /* The letters I, J, K, L and M in a register constraint string
839 can be used to stand for particular ranges of immediate operands.
840 This macro defines what the ranges are.
841 C is the letter, and VALUE is a constant value.
842 Return 1 if VALUE is in the range specified by C.
844 I is for non-DImode shifts.
845 J is for DImode shifts.
846 K and L are for an `andsi' optimization.
847 M is for shifts that can be executed by the "lea" opcode.
850 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
851 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
852 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
853 (C) == 'K' ? (VALUE) == 0xff : \
854 (C) == 'L' ? (VALUE) == 0xffff : \
855 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
856 (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\
857 (C) == 'O' ? (VALUE) >= 0 && (VALUE) <= 32 : \
860 /* Similar, but for floating constants, and defining letters G and H.
861 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
862 TARGET_387 isn't set, because the stack register converter may need to
863 load 0.0 into the function value register. */
865 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
866 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
868 /* Place additional restrictions on the register class to use when it
869 is necessary to be able to hold a value of mode MODE in a reload
870 register for which class CLASS would ordinarily be used. */
872 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
873 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
876 /* Given an rtx X being reloaded into a reg required to be
877 in class CLASS, return the class of reg to actually use.
878 In general this is just CLASS; but on some machines
879 in some cases it is preferable to use a more restrictive class.
880 On the 80386 series, we prevent floating constants from being
881 reloaded into floating registers (since no move-insn can do that)
882 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
884 /* Put float CONST_DOUBLE in the constant pool instead of fp regs.
885 QImode must go into class Q_REGS.
886 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
887 movdf to do mem-to-mem moves through integer regs. */
889 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
890 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \
891 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
892 : ((CLASS) == ALL_REGS \
893 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
896 /* If we are copying between general and FP registers, we need a memory
899 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
900 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
901 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
903 /* Return the maximum number of consecutive registers
904 needed to represent mode MODE in a register of class CLASS. */
905 /* On the 80386, this is the size of MODE in words,
906 except in the FP regs, where a single reg is always enough. */
907 #define CLASS_MAX_NREGS(CLASS, MODE) \
908 (FLOAT_CLASS_P (CLASS) ? 1 : \
909 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
911 /* A C expression whose value is nonzero if pseudos that have been
912 assigned to registers of class CLASS would likely be spilled
913 because registers of CLASS are needed for spill registers.
915 The default value of this macro returns 1 if CLASS has exactly one
916 register and zero otherwise. On most machines, this default
917 should be used. Only define this macro to some other expression
918 if pseudo allocated by `local-alloc.c' end up in memory because
919 their hard registers were needed for spill registers. If this
920 macro returns nonzero for those classes, those pseudos will only
921 be allocated by `global.c', which knows how to reallocate the
922 pseudo to another register. If there would not be another
923 register available for reallocation, you should not change the
924 definition of this macro since the only effect of such a
925 definition would be to slow down register allocation. */
927 #define CLASS_LIKELY_SPILLED_P(CLASS) \
929 || ((CLASS) == DREG) \
930 || ((CLASS) == CREG) \
931 || ((CLASS) == BREG) \
932 || ((CLASS) == AD_REGS) \
933 || ((CLASS) == SIREG) \
934 || ((CLASS) == DIREG))
937 /* Stack layout; function entry, exit and calling. */
939 /* Define this if pushing a word on the stack
940 makes the stack pointer a smaller address. */
941 #define STACK_GROWS_DOWNWARD
943 /* Define this if the nominal address of the stack frame
944 is at the high-address end of the local variables;
945 that is, each additional local variable allocated
946 goes at a more negative offset in the frame. */
947 #define FRAME_GROWS_DOWNWARD
949 /* Offset within stack frame to start allocating local variables at.
950 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
951 first local allocated. Otherwise, it is the offset to the BEGINNING
952 of the first local allocated. */
953 #define STARTING_FRAME_OFFSET 0
955 /* If we generate an insn to push BYTES bytes,
956 this says how many the stack pointer really advances by.
957 On 386 pushw decrements by exactly 2 no matter what the position was.
958 On the 386 there is no pushb; we use pushw instead, and this
959 has the effect of rounding up to 2. */
961 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
963 /* Offset of first parameter from the argument pointer register value. */
964 #define FIRST_PARM_OFFSET(FNDECL) 0
966 /* Value is the number of bytes of arguments automatically
967 popped when returning from a subroutine call.
968 FUNDECL is the declaration node of the function (as a tree),
969 FUNTYPE is the data type of the function (as a tree),
970 or for a library call it is an identifier node for the subroutine name.
971 SIZE is the number of bytes of arguments passed on the stack.
973 On the 80386, the RTD insn may be used to pop them if the number
974 of args is fixed, but if the number is variable then the caller
975 must pop them all. RTD can't be used for library calls now
976 because the library is compiled with the Unix compiler.
977 Use of RTD is a selectable option, since it is incompatible with
978 standard Unix calling sequences. If the option is not selected,
979 the caller must always pop the args.
981 The attribute stdcall is equivalent to RTD on a per module basis. */
983 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
984 (i386_return_pops_args (FUNDECL, FUNTYPE, SIZE))
986 /* Define how to find the value returned by a function.
987 VALTYPE is the data type of the value (as a tree).
988 If the precise function being called is known, FUNC is its FUNCTION_DECL;
989 otherwise, FUNC is 0. */
990 #define FUNCTION_VALUE(VALTYPE, FUNC) \
991 gen_rtx_REG (TYPE_MODE (VALTYPE), \
992 VALUE_REGNO (TYPE_MODE (VALTYPE)))
994 /* Define how to find the value returned by a library function
995 assuming the value has mode MODE. */
997 #define LIBCALL_VALUE(MODE) \
998 gen_rtx_REG (MODE, VALUE_REGNO (MODE))
1000 /* Define the size of the result block used for communication between
1001 untyped_call and untyped_return. The block contains a DImode value
1002 followed by the block used by fnsave and frstor. */
1004 #define APPLY_RESULT_SIZE (8+108)
1006 /* 1 if N is a possible register number for function argument passing. */
1007 #define FUNCTION_ARG_REGNO_P(N) ((N) >= 0 && (N) < REGPARM_MAX)
1009 /* Define a data type for recording info about an argument list
1010 during the scan of that argument list. This data type should
1011 hold all necessary information about the function itself
1012 and about the args processed so far, enough to enable macros
1013 such as FUNCTION_ARG to determine where the next arg should go. */
1015 typedef struct i386_args
{
1016 int words
; /* # words passed so far */
1017 int nregs
; /* # registers available for passing */
1018 int regno
; /* next available register number */
1021 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1022 for a call to a function whose data type is FNTYPE.
1023 For a library call, FNTYPE is 0. */
1025 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
1026 (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
1028 /* Update the data in CUM to advance over an argument
1029 of mode MODE and data type TYPE.
1030 (TYPE is null for libcalls where that information may not be available.) */
1032 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1033 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
1035 /* Define where to put the arguments to a function.
1036 Value is zero to push the argument on the stack,
1037 or a hard register in which to store the argument.
1039 MODE is the argument's machine mode.
1040 TYPE is the data type of the argument (as a tree).
1041 This is null for libcalls where that information may
1043 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1044 the preceding args and about the function being called.
1045 NAMED is nonzero if this argument is a named parameter
1046 (otherwise it is an extra parameter matching an ellipsis). */
1048 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1049 (function_arg (&CUM, MODE, TYPE, NAMED))
1051 /* For an arg passed partly in registers and partly in memory,
1052 this is the number of registers used.
1053 For args passed entirely in registers or entirely in memory, zero. */
1055 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1056 (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED))
1058 /* This macro is invoked just before the start of a function.
1059 It is used here to output code for -fpic that will load the
1060 return address into %ebx. */
1062 #undef ASM_OUTPUT_FUNCTION_PREFIX
1063 #define ASM_OUTPUT_FUNCTION_PREFIX(FILE, FNNAME) \
1064 asm_output_function_prefix (FILE, FNNAME)
1066 /* This macro generates the assembly code for function entry.
1067 FILE is a stdio stream to output the code to.
1068 SIZE is an int: how many units of temporary storage to allocate.
1069 Refer to the array `regs_ever_live' to determine which registers
1070 to save; `regs_ever_live[I]' is nonzero if register number I
1071 is ever used in the function. This macro is responsible for
1072 knowing which registers should not be saved even if used. */
1074 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1075 function_prologue (FILE, SIZE)
1077 /* Output assembler code to FILE to increment profiler label # LABELNO
1078 for profiling a function entry. */
1080 #define FUNCTION_PROFILER(FILE, LABELNO) \
1084 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
1085 LPREFIX, (LABELNO)); \
1086 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
1090 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
1091 fprintf (FILE, "\tcall _mcount\n"); \
1096 /* There are three profiling modes for basic blocks available.
1097 The modes are selected at compile time by using the options
1098 -a or -ax of the gnu compiler.
1099 The variable `profile_block_flag' will be set according to the
1102 profile_block_flag == 0, no option used:
1106 profile_block_flag == 1, -a option used.
1108 Count frequency of execution of every basic block.
1110 profile_block_flag == 2, -ax option used.
1112 Generate code to allow several different profiling modes at run time.
1113 Available modes are:
1114 Produce a trace of all basic blocks.
1115 Count frequency of jump instructions executed.
1116 In every mode it is possible to start profiling upon entering
1117 certain functions and to disable profiling of some other functions.
1119 The result of basic-block profiling will be written to a file `bb.out'.
1120 If the -ax option is used parameters for the profiling will be read
1125 /* The following macro shall output assembler code to FILE
1126 to initialize basic-block profiling.
1128 If profile_block_flag == 2
1130 Output code to call the subroutine `__bb_init_trace_func'
1131 and pass two parameters to it. The first parameter is
1132 the address of a block allocated in the object module.
1133 The second parameter is the number of the first basic block
1136 The name of the block is a local symbol made with this statement:
1138 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1140 Of course, since you are writing the definition of
1141 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1142 can take a short cut in the definition of this macro and use the
1143 name that you know will result.
1145 The number of the first basic block of the function is
1146 passed to the macro in BLOCK_OR_LABEL.
1148 If described in a virtual assembler language the code to be
1152 parameter2 <- BLOCK_OR_LABEL
1153 call __bb_init_trace_func
1155 else if profile_block_flag != 0
1157 Output code to call the subroutine `__bb_init_func'
1158 and pass one single parameter to it, which is the same
1159 as the first parameter to `__bb_init_trace_func'.
1161 The first word of this parameter is a flag which will be nonzero if
1162 the object module has already been initialized. So test this word
1163 first, and do not call `__bb_init_func' if the flag is nonzero.
1164 Note: When profile_block_flag == 2 the test need not be done
1165 but `__bb_init_trace_func' *must* be called.
1167 BLOCK_OR_LABEL may be used to generate a label number as a
1168 branch destination in case `__bb_init_func' will not be called.
1170 If described in a virtual assembler language the code to be
1181 #undef FUNCTION_BLOCK_PROFILER
1182 #define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \
1185 static int num_func = 0; \
1187 char block_table[80], false_label[80]; \
1189 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1191 xops[1] = gen_rtx_SYMBOL_REF (VOIDmode, block_table); \
1192 xops[5] = stack_pointer_rtx; \
1193 xops[7] = gen_rtx_REG (Pmode, 0); /* eax */ \
1195 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1197 switch (profile_block_flag) \
1202 xops[2] = GEN_INT ((BLOCK_OR_LABEL)); \
1203 xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_init_trace_func")); \
1204 xops[6] = GEN_INT (8); \
1206 output_asm_insn (AS1(push%L2,%2), xops); \
1208 output_asm_insn (AS1(push%L1,%1), xops); \
1211 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1212 output_asm_insn (AS1 (push%L7,%7), xops); \
1215 output_asm_insn (AS1(call,%P3), xops); \
1216 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1222 ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \
1224 xops[0] = const0_rtx; \
1225 xops[2] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, false_label)); \
1226 xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_init_func")); \
1227 xops[4] = gen_rtx_MEM (Pmode, xops[1]); \
1228 xops[6] = GEN_INT (4); \
1230 CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \
1232 output_asm_insn (AS2(cmp%L4,%0,%4), xops); \
1233 output_asm_insn (AS1(jne,%2), xops); \
1236 output_asm_insn (AS1(push%L1,%1), xops); \
1239 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1240 output_asm_insn (AS1 (push%L7,%7), xops); \
1243 output_asm_insn (AS1(call,%P3), xops); \
1244 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1245 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LPBZ", num_func); \
1254 /* The following macro shall output assembler code to FILE
1255 to increment a counter associated with basic block number BLOCKNO.
1257 If profile_block_flag == 2
1259 Output code to initialize the global structure `__bb' and
1260 call the function `__bb_trace_func' which will increment the
1263 `__bb' consists of two words. In the first word the number
1264 of the basic block has to be stored. In the second word
1265 the address of a block allocated in the object module
1268 The basic block number is given by BLOCKNO.
1270 The address of the block is given by the label created with
1272 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1274 by FUNCTION_BLOCK_PROFILER.
1276 Of course, since you are writing the definition of
1277 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1278 can take a short cut in the definition of this macro and use the
1279 name that you know will result.
1281 If described in a virtual assembler language the code to be
1284 move BLOCKNO -> (__bb)
1285 move LPBX0 -> (__bb+4)
1286 call __bb_trace_func
1288 Note that function `__bb_trace_func' must not change the
1289 machine state, especially the flag register. To grant
1290 this, you must output code to save and restore registers
1291 either in this macro or in the macros MACHINE_STATE_SAVE
1292 and MACHINE_STATE_RESTORE. The last two macros will be
1293 used in the function `__bb_trace_func', so you must make
1294 sure that the function prologue does not change any
1295 register prior to saving it with MACHINE_STATE_SAVE.
1297 else if profile_block_flag != 0
1299 Output code to increment the counter directly.
1300 Basic blocks are numbered separately from zero within each
1301 compiled object module. The count associated with block number
1302 BLOCKNO is at index BLOCKNO in an array of words; the name of
1303 this array is a local symbol made with this statement:
1305 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
1307 Of course, since you are writing the definition of
1308 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1309 can take a short cut in the definition of this macro and use the
1310 name that you know will result.
1312 If described in a virtual assembler language the code to be
1315 inc (LPBX2+4*BLOCKNO)
1319 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1322 rtx xops[8], cnt_rtx; \
1324 char *block_table = counts; \
1326 switch (profile_block_flag) \
1331 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1333 xops[1] = gen_rtx_SYMBOL_REF (VOIDmode, block_table); \
1334 xops[2] = GEN_INT ((BLOCKNO)); \
1335 xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_trace_func")); \
1336 xops[4] = gen_rtx_SYMBOL_REF (VOIDmode, "__bb"); \
1337 xops[5] = plus_constant (xops[4], 4); \
1338 xops[0] = gen_rtx_MEM (SImode, xops[4]); \
1339 xops[6] = gen_rtx_MEM (SImode, xops[5]); \
1341 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1343 fprintf(FILE, "\tpushf\n"); \
1344 output_asm_insn (AS2(mov%L0,%2,%0), xops); \
1347 xops[7] = gen_rtx_REG (Pmode, 0); /* eax */ \
1348 output_asm_insn (AS1(push%L7,%7), xops); \
1349 output_asm_insn (AS2(lea%L7,%a1,%7), xops); \
1350 output_asm_insn (AS2(mov%L6,%7,%6), xops); \
1351 output_asm_insn (AS1(pop%L7,%7), xops); \
1354 output_asm_insn (AS2(mov%L6,%1,%6), xops); \
1355 output_asm_insn (AS1(call,%P3), xops); \
1356 fprintf(FILE, "\tpopf\n"); \
1362 ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \
1363 cnt_rtx = gen_rtx_SYMBOL_REF (VOIDmode, counts); \
1364 SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \
1367 cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \
1370 cnt_rtx = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, cnt_rtx); \
1372 xops[0] = gen_rtx_MEM (SImode, cnt_rtx); \
1373 output_asm_insn (AS1(inc%L0,%0), xops); \
1381 /* The following macro shall output assembler code to FILE
1382 to indicate a return from function during basic-block profiling.
1384 If profiling_block_flag == 2:
1386 Output assembler code to call function `__bb_trace_ret'.
1388 Note that function `__bb_trace_ret' must not change the
1389 machine state, especially the flag register. To grant
1390 this, you must output code to save and restore registers
1391 either in this macro or in the macros MACHINE_STATE_SAVE_RET
1392 and MACHINE_STATE_RESTORE_RET. The last two macros will be
1393 used in the function `__bb_trace_ret', so you must make
1394 sure that the function prologue does not change any
1395 register prior to saving it with MACHINE_STATE_SAVE_RET.
1397 else if profiling_block_flag != 0:
1399 The macro will not be used, so it need not distinguish
1403 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
1408 xops[0] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_trace_ret")); \
1410 output_asm_insn (AS1(call,%P0), xops); \
1415 /* The function `__bb_trace_func' is called in every basic block
1416 and is not allowed to change the machine state. Saving (restoring)
1417 the state can either be done in the BLOCK_PROFILER macro,
1418 before calling function (rsp. after returning from function)
1419 `__bb_trace_func', or it can be done inside the function by
1420 defining the macros:
1422 MACHINE_STATE_SAVE(ID)
1423 MACHINE_STATE_RESTORE(ID)
1425 In the latter case care must be taken, that the prologue code
1426 of function `__bb_trace_func' does not already change the
1427 state prior to saving it with MACHINE_STATE_SAVE.
1429 The parameter `ID' is a string identifying a unique macro use.
1431 On the i386 the initialization code at the begin of
1432 function `__bb_trace_func' contains a `sub' instruction
1433 therefore we handle save and restore of the flag register
1434 in the BLOCK_PROFILER macro. */
1436 #define MACHINE_STATE_SAVE(ID) \
1437 asm (" pushl %eax"); \
1438 asm (" pushl %ecx"); \
1439 asm (" pushl %edx"); \
1440 asm (" pushl %esi");
1442 #define MACHINE_STATE_RESTORE(ID) \
1443 asm (" popl %esi"); \
1444 asm (" popl %edx"); \
1445 asm (" popl %ecx"); \
1448 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1449 the stack pointer does not matter. The value is tested only in
1450 functions that have frame pointers.
1451 No definition is equivalent to always zero. */
1452 /* Note on the 386 it might be more efficient not to define this since
1453 we have to restore it ourselves from the frame pointer, in order to
1456 #define EXIT_IGNORE_STACK 1
1458 /* This macro generates the assembly code for function exit,
1459 on machines that need it. If FUNCTION_EPILOGUE is not defined
1460 then individual return instructions are generated for each
1461 return statement. Args are same as for FUNCTION_PROLOGUE.
1463 The function epilogue should not depend on the current stack pointer!
1464 It should use the frame pointer only. This is mandatory because
1465 of alloca; we also take advantage of it to omit stack adjustments
1468 If the last non-note insn in the function is a BARRIER, then there
1469 is no need to emit a function prologue, because control does not fall
1470 off the end. This happens if the function ends in an "exit" call, or
1471 if a `return' insn is emitted directly into the function. */
1474 #define FUNCTION_BEGIN_EPILOGUE(FILE) \
1476 rtx last = get_last_insn (); \
1477 if (last && GET_CODE (last) == NOTE) \
1478 last = prev_nonnote_insn (last); \
1479 /* if (! last || GET_CODE (last) != BARRIER) \
1480 function_epilogue (FILE, SIZE);*/ \
1484 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1485 function_epilogue (FILE, SIZE)
1487 /* Output assembler code for a block containing the constant parts
1488 of a trampoline, leaving space for the variable parts. */
1490 /* On the 386, the trampoline contains three instructions:
1494 #define TRAMPOLINE_TEMPLATE(FILE) \
1496 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
1497 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1498 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1499 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
1500 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1501 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1502 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
1503 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
1506 /* Length in units of the trampoline for entering a nested function. */
1508 #define TRAMPOLINE_SIZE 12
1510 /* Emit RTL insns to initialize the variable parts of a trampoline.
1511 FNADDR is an RTX for the address of the function's pure code.
1512 CXT is an RTX for the static chain value for the function. */
1514 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1516 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 1)), CXT); \
1517 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 6)), FNADDR); \
1520 /* Definitions for register eliminations.
1522 This is an array of structures. Each structure initializes one pair
1523 of eliminable registers. The "from" register number is given first,
1524 followed by "to". Eliminations of the same "from" register are listed
1525 in order of preference.
1527 We have two registers that can be eliminated on the i386. First, the
1528 frame pointer register can often be eliminated in favor of the stack
1529 pointer register. Secondly, the argument pointer register can always be
1530 eliminated; it is replaced with either the stack or frame pointer. */
1532 #define ELIMINABLE_REGS \
1533 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1534 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1535 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1537 /* Given FROM and TO register numbers, say whether this elimination is allowed.
1538 Frame pointer elimination is automatically handled.
1540 For the i386, if frame pointer elimination is being done, we would like to
1541 convert ap into sp, not fp.
1543 All other eliminations are valid. */
1545 #define CAN_ELIMINATE(FROM, TO) \
1546 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1547 ? ! frame_pointer_needed \
1550 /* Define the offset between two registers, one to be eliminated, and the other
1551 its replacement, at the start of a routine. */
1553 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1555 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1556 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1562 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
1563 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
1564 || ((current_function_uses_pic_offset_table \
1565 || current_function_uses_const_pool) \
1566 && flag_pic && regno == PIC_OFFSET_TABLE_REGNUM)) \
1569 (OFFSET) = offset + get_frame_size (); \
1571 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1572 (OFFSET) += 4; /* Skip saved PC */ \
1576 /* Addressing modes, and classification of registers for them. */
1578 /* #define HAVE_POST_INCREMENT */
1579 /* #define HAVE_POST_DECREMENT */
1581 /* #define HAVE_PRE_DECREMENT */
1582 /* #define HAVE_PRE_INCREMENT */
1584 /* Macros to check register numbers against specific register classes. */
1586 /* These assume that REGNO is a hard or pseudo reg number.
1587 They give nonzero only if REGNO is a hard reg of the suitable class
1588 or a pseudo reg currently allocated to a suitable hard reg.
1589 Since they use reg_renumber, they are safe only once reg_renumber
1590 has been allocated, which happens in local-alloc.c. */
1592 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1593 ((REGNO) < STACK_POINTER_REGNUM \
1594 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
1596 #define REGNO_OK_FOR_BASE_P(REGNO) \
1597 ((REGNO) <= STACK_POINTER_REGNUM \
1598 || (REGNO) == ARG_POINTER_REGNUM \
1599 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
1601 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
1602 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
1604 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1605 and check its validity for a certain class.
1606 We have two alternate definitions for each of them.
1607 The usual definition accepts all pseudo regs; the other rejects
1608 them unless they have been allocated suitable hard regs.
1609 The symbol REG_OK_STRICT causes the latter definition to be used.
1611 Most source files want to accept pseudo regs in the hope that
1612 they will get allocated to the class that the insn wants them to be in.
1613 Source files for reload pass need to be strict.
1614 After reload, it makes no difference, since pseudo regs have
1615 been eliminated by then. */
1618 /* Non strict versions, pseudos are ok */
1619 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1620 (REGNO (X) < STACK_POINTER_REGNUM \
1621 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1623 #define REG_OK_FOR_BASE_NONSTRICT_P(X) \
1624 (REGNO (X) <= STACK_POINTER_REGNUM \
1625 || REGNO (X) == ARG_POINTER_REGNUM \
1626 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1628 #define REG_OK_FOR_STRREG_NONSTRICT_P(X) \
1629 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1631 /* Strict versions, hard registers only */
1632 #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1633 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1634 #define REG_OK_FOR_STRREG_STRICT_P(X) \
1635 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
1637 #ifndef REG_OK_STRICT
1638 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1639 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1640 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_NONSTRICT_P(X)
1643 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1644 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1645 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_STRICT_P(X)
1648 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1649 that is a valid memory address for an instruction.
1650 The MODE argument is the machine mode for the MEM expression
1651 that wants to use this address.
1653 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1654 except for CONSTANT_ADDRESS_P which is usually machine-independent.
1656 See legitimize_pic_address in i386.c for details as to what
1657 constitutes a legitimate address when -fpic is used. */
1659 #define MAX_REGS_PER_ADDRESS 2
1661 #define CONSTANT_ADDRESS_P(X) \
1662 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1663 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1664 || GET_CODE (X) == HIGH)
1666 /* Nonzero if the constant value X is a legitimate general operand.
1667 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1669 #define LEGITIMATE_CONSTANT_P(X) 1
1671 #ifdef REG_OK_STRICT
1672 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1674 if (legitimate_address_p (MODE, X, 1)) \
1679 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1681 if (legitimate_address_p (MODE, X, 0)) \
1687 /* Try machine-dependent ways of modifying an illegitimate address
1688 to be legitimate. If we find one, return the new, valid address.
1689 This macro is used in only one place: `memory_address' in explow.c.
1691 OLDX is the address as it was before break_out_memory_refs was called.
1692 In some cases it is useful to look at this to decide what needs to be done.
1694 MODE and WIN are passed so that this macro can use
1695 GO_IF_LEGITIMATE_ADDRESS.
1697 It is always safe for this macro to do nothing. It exists to recognize
1698 opportunities to optimize the output.
1700 For the 80386, we handle X+REG by loading X into a register R and
1701 using R+REG. R will go in a general reg and indexing will be used.
1702 However, if REG is a broken-out memory address or multiplication,
1703 nothing needs to be done because REG can certainly go in a general reg.
1705 When -fpic is used, special handling is needed for symbolic references.
1706 See comments by legitimize_pic_address in i386.c for details. */
1708 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1710 (X) = legitimize_address (X, OLDX, MODE); \
1711 if (memory_address_p (MODE, X)) \
1715 #define REWRITE_ADDRESS(x) rewrite_address(x)
1717 /* Nonzero if the constant value X is a legitimate general operand
1718 when generating PIC code. It is given that flag_pic is on and
1719 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1721 #define LEGITIMATE_PIC_OPERAND_P(X) \
1722 (! SYMBOLIC_CONST (X) \
1723 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1725 #define SYMBOLIC_CONST(X) \
1726 (GET_CODE (X) == SYMBOL_REF \
1727 || GET_CODE (X) == LABEL_REF \
1728 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1730 /* Go to LABEL if ADDR (a legitimate address expression)
1731 has an effect that depends on the machine mode it is used for.
1732 On the 80386, only postdecrement and postincrement address depend thus
1733 (the amount of decrement or increment being the length of the operand). */
1734 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1735 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1737 /* Define this macro if references to a symbol must be treated
1738 differently depending on something about the variable or
1739 function named by the symbol (such as what section it is in).
1741 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1742 so that we may access it directly in the GOT. */
1744 #define ENCODE_SECTION_INFO(DECL) \
1749 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1750 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1752 if (TARGET_DEBUG_ADDR \
1753 && TREE_CODE_CLASS (TREE_CODE (DECL)) == 'd') \
1755 fprintf (stderr, "Encode %s, public = %d\n", \
1756 IDENTIFIER_POINTER (DECL_NAME (DECL)), \
1757 TREE_PUBLIC (DECL)); \
1760 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1761 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1762 || ! TREE_PUBLIC (DECL)); \
1767 /* Initialize data used by insn expanders. This is called from
1768 init_emit, once for each function, before code is generated.
1769 For 386, clear stack slot assignments remembered from previous
1772 #define INIT_EXPANDERS clear_386_stack_locals ()
1774 /* The `FINALIZE_PIC' macro serves as a hook to emit these special
1775 codes once the function is being compiled into assembly code, but
1776 not before. (It is not done before, because in the case of
1777 compiling an inline function, it would lead to multiple PIC
1778 prologues being included in functions which used inline functions
1779 and were compiled to assembly language.) */
1781 #define FINALIZE_PIC \
1784 extern int current_function_uses_pic_offset_table; \
1786 current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \
1791 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1792 with arguments ARGS is a valid machine specific attribute for DECL.
1793 The attributes in ATTRIBUTES have previously been assigned to DECL. */
1795 #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \
1796 (i386_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS))
1798 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1799 with arguments ARGS is a valid machine specific attribute for TYPE.
1800 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
1802 #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \
1803 (i386_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS))
1805 /* If defined, a C expression whose value is zero if the attributes on
1806 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
1807 two if they are nearly compatible (which causes a warning to be
1810 #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
1811 (i386_comp_type_attributes (TYPE1, TYPE2))
1813 /* If defined, a C statement that assigns default attributes to newly
1816 /* #define SET_DEFAULT_TYPE_ATTRIBUTES (TYPE) */
1818 /* Max number of args passed in registers. If this is more than 3, we will
1819 have problems with ebx (register #4), since it is a caller save register and
1820 is also used as the pic register in ELF. So for now, don't allow more than
1821 3 registers to be passed in registers. */
1823 #define REGPARM_MAX 3
1826 /* Specify the machine mode that this machine uses
1827 for the index in the tablejump instruction. */
1828 #define CASE_VECTOR_MODE Pmode
1830 /* Define as C expression which evaluates to nonzero if the tablejump
1831 instruction expects the table to contain offsets from the address of the
1833 Do not define this if the table should contain absolute addresses. */
1834 /* #define CASE_VECTOR_PC_RELATIVE 1 */
1836 /* Specify the tree operation to be used to convert reals to integers.
1837 This should be changed to take advantage of fist --wfs ??
1839 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1841 /* This is the kind of divide that is easiest to do in the general case. */
1842 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1844 /* Define this as 1 if `char' should by default be signed; else as 0. */
1845 #define DEFAULT_SIGNED_CHAR 1
1847 /* Max number of bytes we can move from memory to memory
1848 in one reasonably fast instruction. */
1851 /* The number of scalar move insns which should be generated instead
1852 of a string move insn or a library call. Increasing the value
1853 will always make code faster, but eventually incurs high cost in
1854 increased code size.
1856 If you don't define this, a reasonable default is used.
1858 Make this large on i386, since the block move is very inefficient with small
1859 blocks, and the hard register needs of the block move require much reload
1862 #define MOVE_RATIO 5
1864 /* Define if shifts truncate the shift count
1865 which implies one can omit a sign-extension or zero-extension
1866 of a shift count. */
1867 /* On i386, shifts do truncate the count. But bit opcodes don't. */
1869 /* #define SHIFT_COUNT_TRUNCATED */
1871 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1872 is done just by pretending it is already truncated. */
1873 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1875 /* We assume that the store-condition-codes instructions store 0 for false
1876 and some other value for true. This is the value stored for true. */
1878 #define STORE_FLAG_VALUE 1
1880 /* When a prototype says `char' or `short', really pass an `int'.
1881 (The 386 can't easily push less than an int.) */
1883 #define PROMOTE_PROTOTYPES
1885 /* Specify the machine mode that pointers have.
1886 After generation of rtl, the compiler makes no further distinction
1887 between pointers and any other objects of this machine mode. */
1888 #define Pmode SImode
1890 /* A function address in a call instruction
1891 is a byte address (for indexing purposes)
1892 so give the MEM rtx a byte's mode. */
1893 #define FUNCTION_MODE QImode
1895 /* A part of a C `switch' statement that describes the relative costs
1896 of constant RTL expressions. It must contain `case' labels for
1897 expression codes `const_int', `const', `symbol_ref', `label_ref'
1898 and `const_double'. Each case must ultimately reach a `return'
1899 statement to return the relative cost of the use of that kind of
1900 constant value in an expression. The cost may depend on the
1901 precise value of the constant, which is available for examination
1902 in X, and the rtx code of the expression in which it is contained,
1903 found in OUTER_CODE.
1905 CODE is the expression code--redundant, since it can be obtained
1906 with `GET_CODE (X)'. */
1908 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1910 return (unsigned) INTVAL (RTX) < 256 ? 0 : 1; \
1914 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 1; \
1916 case CONST_DOUBLE: \
1919 if (GET_MODE (RTX) == VOIDmode) \
1922 code = standard_80387_constant_p (RTX); \
1923 return code == 1 ? 0 : \
1928 /* Delete the definition here when TOPLEVEL_COSTS_N_INSNS gets added to cse.c */
1929 #define TOPLEVEL_COSTS_N_INSNS(N) {total = COSTS_N_INSNS (N); break;}
1931 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1932 This can be used, for example, to indicate how costly a multiply
1933 instruction is. In writing this macro, you can use the construct
1934 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1935 instructions. OUTER_CODE is the code of the expression in which X
1938 This macro is optional; do not define it if the default cost
1939 assumptions are adequate for the target machine. */
1941 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1943 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1944 && GET_MODE (XEXP (X, 0)) == SImode) \
1946 HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
1949 return COSTS_N_INSNS (ix86_cost->add) \
1950 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1952 if (value == 2 || value == 3) \
1953 return COSTS_N_INSNS (ix86_cost->lea) \
1954 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1956 /* fall through */ \
1962 if (GET_MODE (XEXP (X, 0)) == DImode) \
1964 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
1966 if (INTVAL (XEXP (X, 1)) > 32) \
1967 return COSTS_N_INSNS(ix86_cost->shift_const + 2); \
1968 return COSTS_N_INSNS(ix86_cost->shift_const * 2); \
1970 return ((GET_CODE (XEXP (X, 1)) == AND \
1971 ? COSTS_N_INSNS(ix86_cost->shift_var * 2) \
1972 : COSTS_N_INSNS(ix86_cost->shift_var * 6 + 2)) \
1973 + rtx_cost(XEXP (X, 0), OUTER_CODE)); \
1975 return COSTS_N_INSNS (GET_CODE (XEXP (X, 1)) == CONST_INT \
1976 ? ix86_cost->shift_const \
1977 : ix86_cost->shift_var) \
1978 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1981 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
1983 unsigned HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
1987 return COSTS_N_INSNS (ix86_cost->add) \
1988 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1989 if (value == 4 || value == 8) \
1990 return COSTS_N_INSNS (ix86_cost->lea) \
1991 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1993 while (value != 0) \
2000 return COSTS_N_INSNS (ix86_cost->shift_const) \
2001 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2003 return COSTS_N_INSNS (ix86_cost->mult_init \
2004 + nbits * ix86_cost->mult_bit) \
2005 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2008 else /* This is arbitrary */ \
2009 TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \
2010 + 7 * ix86_cost->mult_bit); \
2016 TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide); \
2019 if (GET_CODE (XEXP (X, 0)) == REG \
2020 && GET_MODE (XEXP (X, 0)) == SImode \
2021 && GET_CODE (XEXP (X, 1)) == PLUS) \
2022 return COSTS_N_INSNS (ix86_cost->lea); \
2024 /* fall through */ \
2029 if (GET_MODE (X) == DImode) \
2030 return COSTS_N_INSNS (ix86_cost->add) * 2 \
2031 + (rtx_cost (XEXP (X, 0), OUTER_CODE) \
2032 << (GET_MODE (XEXP (X, 0)) != DImode)) \
2033 + (rtx_cost (XEXP (X, 1), OUTER_CODE) \
2034 << (GET_MODE (XEXP (X, 1)) != DImode)); \
2037 if (GET_MODE (X) == DImode) \
2038 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add * 2) \
2039 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add)
2042 /* An expression giving the cost of an addressing mode that contains
2043 ADDRESS. If not defined, the cost is computed from the ADDRESS
2044 expression and the `CONST_COSTS' values.
2046 For most CISC machines, the default cost is a good approximation
2047 of the true cost of the addressing mode. However, on RISC
2048 machines, all instructions normally have the same length and
2049 execution time. Hence all addresses will have equal costs.
2051 In cases where more than one form of an address is known, the form
2052 with the lowest cost will be used. If multiple forms have the
2053 same, lowest, cost, the one that is the most complex will be used.
2055 For example, suppose an address that is equal to the sum of a
2056 register and a constant is used twice in the same basic block.
2057 When this macro is not defined, the address will be computed in a
2058 register and memory references will be indirect through that
2059 register. On machines where the cost of the addressing mode
2060 containing the sum is no higher than that of a simple indirect
2061 reference, this will produce an additional instruction and
2062 possibly require an additional register. Proper specification of
2063 this macro eliminates this overhead for such machines.
2065 Similar use of this macro is made in strength reduction of loops.
2067 ADDRESS need not be valid as an address. In such a case, the cost
2068 is not relevant and can be any value; invalid addresses need not be
2069 assigned a different cost.
2071 On machines where an address involving more than one register is as
2072 cheap as an address computation involving only one register,
2073 defining `ADDRESS_COST' to reflect this can cause two registers to
2074 be live over a region of code where only one would have been if
2075 `ADDRESS_COST' were not defined in that manner. This effect should
2076 be considered in the definition of this macro. Equivalent costs
2077 should probably only be given to addresses with different numbers
2078 of registers on machines with lots of registers.
2080 This macro will normally either not be defined or be defined as a
2083 For i386, it is better to use a complex address than let gcc copy
2084 the address into a reg and make a new pseudo. But not if the address
2085 requires to two regs - that would mean more pseudos with longer
2088 #define ADDRESS_COST(RTX) \
2089 ((CONSTANT_P (RTX) \
2090 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
2091 && REG_P (XEXP (RTX, 0)))) ? 0 \
2095 /* A C expression for the cost of moving data of mode M between a
2096 register and memory. A value of 2 is the default; this cost is
2097 relative to those in `REGISTER_MOVE_COST'.
2099 If moving between registers and memory is more expensive than
2100 between two registers, you should define this macro to express the
2103 On the i386, copying between floating-point and fixed-point
2104 registers is expensive. */
2106 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
2107 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
2108 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
2112 /* A C expression for the cost of moving data of mode M between a
2113 register and memory. A value of 2 is the default; this cost is
2114 relative to those in `REGISTER_MOVE_COST'.
2116 If moving between registers and memory is more expensive than
2117 between two registers, you should define this macro to express the
2120 /* #define MEMORY_MOVE_COST(M,C,I) 2 */
2122 /* A C expression for the cost of a branch instruction. A value of 1
2123 is the default; other values are interpreted relative to that. */
2125 #define BRANCH_COST i386_branch_cost
2127 /* Define this macro as a C expression which is nonzero if accessing
2128 less than a word of memory (i.e. a `char' or a `short') is no
2129 faster than accessing a word of memory, i.e., if such access
2130 require more than one instruction or if there is no difference in
2131 cost between byte and (aligned) word loads.
2133 When this macro is not defined, the compiler will access a field by
2134 finding the smallest containing object; when it is defined, a
2135 fullword load will be used if alignment permits. Unless bytes
2136 accesses are faster than word accesses, using word accesses is
2137 preferable since it may eliminate subsequent memory access if
2138 subsequent accesses occur to other fields in the same word of the
2139 structure, but to different bytes. */
2141 #define SLOW_BYTE_ACCESS 0
2143 /* Nonzero if access to memory by shorts is slow and undesirable. */
2144 #define SLOW_SHORT_ACCESS 0
2146 /* Define this macro if zero-extension (of a `char' or `short' to an
2147 `int') can be done faster if the destination is a register that is
2150 If you define this macro, you must have instruction patterns that
2151 recognize RTL structures like this:
2153 (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
2155 and likewise for `HImode'. */
2157 /* #define SLOW_ZERO_EXTEND */
2159 /* Define this macro to be the value 1 if unaligned accesses have a
2160 cost many times greater than aligned accesses, for example if they
2161 are emulated in a trap handler.
2163 When this macro is non-zero, the compiler will act as if
2164 `STRICT_ALIGNMENT' were non-zero when generating code for block
2165 moves. This can cause significantly more instructions to be
2166 produced. Therefore, do not set this macro non-zero if unaligned
2167 accesses only add a cycle or two to the time for a memory access.
2169 If the value of this macro is always zero, it need not be defined. */
2171 /* #define SLOW_UNALIGNED_ACCESS 0 */
2173 /* Define this macro to inhibit strength reduction of memory
2174 addresses. (On some machines, such strength reduction seems to do
2175 harm rather than good.) */
2177 /* #define DONT_REDUCE_ADDR */
2179 /* Define this macro if it is as good or better to call a constant
2180 function address than to call an address kept in a register.
2182 Desirable on the 386 because a CALL with a constant address is
2183 faster than one with a register address. */
2185 #define NO_FUNCTION_CSE
2187 /* Define this macro if it is as good or better for a function to call
2188 itself with an explicit address than to call an address kept in a
2191 #define NO_RECURSIVE_FUNCTION_CSE
2193 /* A C statement (sans semicolon) to update the integer variable COST
2194 based on the relationship between INSN that is dependent on
2195 DEP_INSN through the dependence LINK. The default is to make no
2196 adjustment to COST. This can be used for example to specify to
2197 the scheduler that an output- or anti-dependence does not incur
2198 the same cost as a data-dependence. */
2200 #define ADJUST_COST(insn,link,dep_insn,cost) \
2203 if (GET_CODE (dep_insn) == CALL_INSN) \
2206 else if (GET_CODE (dep_insn) == INSN \
2207 && GET_CODE (PATTERN (dep_insn)) == SET \
2208 && GET_CODE (SET_DEST (PATTERN (dep_insn))) == REG \
2209 && GET_CODE (insn) == INSN \
2210 && GET_CODE (PATTERN (insn)) == SET \
2211 && !reg_overlap_mentioned_p (SET_DEST (PATTERN (dep_insn)), \
2212 SET_SRC (PATTERN (insn)))) \
2217 else if (GET_CODE (insn) == JUMP_INSN) \
2222 if (TARGET_PENTIUM) \
2224 if (cost !=0 && is_fp_insn (insn) && is_fp_insn (dep_insn) \
2225 && !is_fp_dest (dep_insn)) \
2230 if (agi_dependent (insn, dep_insn)) \
2234 else if (GET_CODE (insn) == INSN \
2235 && GET_CODE (PATTERN (insn)) == SET \
2236 && SET_DEST (PATTERN (insn)) == cc0_rtx \
2237 && (next_inst = next_nonnote_insn (insn)) \
2238 && GET_CODE (next_inst) == JUMP_INSN) \
2239 { /* compare probably paired with jump */ \
2244 if (!is_fp_dest (dep_insn)) \
2246 if(!agi_dependent (insn, dep_insn)) \
2248 else if (TARGET_486) \
2252 if (is_fp_store (insn) && is_fp_insn (dep_insn) \
2253 && NEXT_INSN (insn) && NEXT_INSN (NEXT_INSN (insn)) \
2254 && NEXT_INSN (NEXT_INSN (NEXT_INSN (insn))) \
2255 && (GET_CODE (NEXT_INSN (insn)) == INSN) \
2256 && (GET_CODE (NEXT_INSN (NEXT_INSN (insn))) == JUMP_INSN) \
2257 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) == NOTE) \
2258 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) \
2259 == NOTE_INSN_LOOP_END)) \
2266 #define ADJUST_BLOCKAGE(last_insn,insn,blockage) \
2268 if (is_fp_store (last_insn) && is_fp_insn (insn) \
2269 && NEXT_INSN (last_insn) && NEXT_INSN (NEXT_INSN (last_insn)) \
2270 && NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn))) \
2271 && (GET_CODE (NEXT_INSN (last_insn)) == INSN) \
2272 && (GET_CODE (NEXT_INSN (NEXT_INSN (last_insn))) == JUMP_INSN) \
2273 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) == NOTE) \
2274 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) \
2275 == NOTE_INSN_LOOP_END)) \
2282 /* Add any extra modes needed to represent the condition code.
2284 For the i386, we need separate modes when floating-point equality
2285 comparisons are being done. */
2287 #define EXTRA_CC_MODES CCFPEQmode
2289 /* Define the names for the modes specified above. */
2290 #define EXTRA_CC_NAMES "CCFPEQ"
2292 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
2293 return the mode to be used for the comparison.
2295 For floating-point equality comparisons, CCFPEQmode should be used.
2296 VOIDmode should be used in all other cases. */
2298 #define SELECT_CC_MODE(OP,X,Y) \
2299 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
2300 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
2302 /* Define the information needed to generate branch and scc insns. This is
2303 stored from the compare operation. Note that we can't use "rtx" here
2304 since it hasn't been defined! */
2306 extern struct rtx_def
*(*i386_compare_gen
)(), *(*i386_compare_gen_eq
)();
2308 /* Tell final.c how to eliminate redundant test instructions. */
2310 /* Here we define machine-dependent flags and fields in cc_status
2311 (see `conditions.h'). */
2313 /* Set if the cc value was actually from the 80387 and
2314 we are testing eax directly (i.e. no sahf) */
2315 #define CC_TEST_AX 020000
2317 /* Set if the cc value is actually in the 80387, so a floating point
2318 conditional branch must be output. */
2319 #define CC_IN_80387 04000
2321 /* Set if the CC value was stored in a nonstandard way, so that
2322 the state of equality is indicated by zero in the carry bit. */
2323 #define CC_Z_IN_NOT_C 010000
2325 /* Set if the CC value was actually from the 80387 and loaded directly
2326 into the eflags instead of via eax/sahf. */
2327 #define CC_FCOMI 040000
2329 /* Store in cc_status the expressions
2330 that the condition codes will describe
2331 after execution of an instruction whose pattern is EXP.
2332 Do not alter them if the instruction would not alter the cc's. */
2334 #define NOTICE_UPDATE_CC(EXP, INSN) \
2335 notice_update_cc((EXP))
2337 /* Output a signed jump insn. Use template NORMAL ordinarily, or
2338 FLOAT following a floating point comparison.
2339 Use NO_OV following an arithmetic insn that set the cc's
2340 before a test insn that was deleted.
2341 NO_OV may be zero, meaning final should reinsert the test insn
2342 because the jump cannot be handled properly without it. */
2344 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
2346 if (cc_prev_status.flags & CC_IN_80387) \
2348 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
2353 /* Control the assembler format that we output, to the extent
2354 this does not vary between assemblers. */
2356 /* How to refer to registers in assembler output.
2357 This sequence is indexed by compiler's hard-register-number (see above). */
2359 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
2360 For non floating point regs, the following are the HImode names.
2362 For float regs, the stack top is sometimes referred to as "%st(0)"
2363 instead of just "%st". PRINT_REG handles this with the "y" code. */
2365 #define HI_REGISTER_NAMES \
2366 {"ax","dx","cx","bx","si","di","bp","sp", \
2367 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
2369 #define REGISTER_NAMES HI_REGISTER_NAMES
2371 /* Table of additional register names to use in user input. */
2373 #define ADDITIONAL_REGISTER_NAMES \
2374 { { "eax", 0 }, { "edx", 1 }, { "ecx", 2 }, { "ebx", 3 }, \
2375 { "esi", 4 }, { "edi", 5 }, { "ebp", 6 }, { "esp", 7 }, \
2376 { "al", 0 }, { "dl", 1 }, { "cl", 2 }, { "bl", 3 }, \
2377 { "ah", 0 }, { "dh", 1 }, { "ch", 2 }, { "bh", 3 } }
2379 /* Note we are omitting these since currently I don't know how
2380 to get gcc to use these, since they want the same but different
2381 number as al, and ax.
2384 /* note the last four are not really qi_registers, but
2385 the md will have to never output movb into one of them
2386 only a movw . There is no movb into the last four regs */
2388 #define QI_REGISTER_NAMES \
2389 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
2391 /* These parallel the array above, and can be used to access bits 8:15
2392 of regs 0 through 3. */
2394 #define QI_HIGH_REGISTER_NAMES \
2395 {"ah", "dh", "ch", "bh", }
2397 /* How to renumber registers for dbx and gdb. */
2399 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
2400 #define DBX_REGISTER_NUMBER(n) \
2411 /* Before the prologue, RA is at 0(%esp). */
2412 #define INCOMING_RETURN_ADDR_RTX \
2413 gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
2415 /* After the prologue, RA is at -4(AP) in the current frame. */
2416 #define RETURN_ADDR_RTX(COUNT, FRAME) \
2418 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT(-4)))\
2419 : gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, (FRAME), GEN_INT(4))))
2421 /* PC is dbx register 8; let's use that column for RA. */
2422 #define DWARF_FRAME_RETURN_COLUMN 8
2424 /* Before the prologue, the top of the frame is at 4(%esp). */
2425 #define INCOMING_FRAME_SP_OFFSET 4
2427 /* This is how to output the definition of a user-level label named NAME,
2428 such as the label on a static function or variable NAME. */
2430 #define ASM_OUTPUT_LABEL(FILE,NAME) \
2431 (assemble_name (FILE, NAME), fputs (":\n", FILE))
2433 /* This is how to output an assembler line defining a `double' constant. */
2435 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2437 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
2438 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
2441 /* This is how to output a `long double' extended real constant. */
2443 #undef ASM_OUTPUT_LONG_DOUBLE
2444 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
2446 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
2447 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
2450 /* This is how to output an assembler line defining a `float' constant. */
2452 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2454 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
2455 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
2458 /* Store in OUTPUT a string (made with alloca) containing
2459 an assembler-name for a local static variable named NAME.
2460 LABELNO is an integer which is different for each call. */
2462 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2463 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2464 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2468 /* This is how to output an assembler line defining an `int' constant. */
2470 #define ASM_OUTPUT_INT(FILE,VALUE) \
2471 ( fprintf (FILE, "%s ", ASM_LONG), \
2472 output_addr_const (FILE,(VALUE)), \
2475 /* Likewise for `char' and `short' constants. */
2476 /* is this supposed to do align too?? */
2478 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2479 ( fprintf (FILE, "%s ", ASM_SHORT), \
2480 output_addr_const (FILE,(VALUE)), \
2484 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2485 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2486 output_addr_const (FILE,(VALUE)), \
2487 fputs (",", FILE), \
2488 output_addr_const (FILE,(VALUE)), \
2489 fputs (" >> 8\n",FILE))
2493 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
2494 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2495 output_addr_const (FILE, (VALUE)), \
2498 /* This is how to output an assembler line for a numeric constant byte. */
2500 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
2501 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
2503 /* This is how to output an insn to push a register on the stack.
2504 It need not be very fast code. */
2506 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2507 fprintf (FILE, "\tpushl %%e%s\n", reg_names[REGNO])
2509 /* This is how to output an insn to pop a register from the stack.
2510 It need not be very fast code. */
2512 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2513 fprintf (FILE, "\tpopl %%e%s\n", reg_names[REGNO])
2515 /* This is how to output an element of a case-vector that is absolute.
2518 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2519 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
2521 /* This is how to output an element of a case-vector that is relative.
2522 We don't use these on the 386 yet, because the ATT assembler can't do
2523 forward reference the differences.
2526 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
2527 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
2529 /* Define the parentheses used to group arithmetic operations
2530 in assembler code. */
2532 #define ASM_OPEN_PAREN ""
2533 #define ASM_CLOSE_PAREN ""
2535 /* Define results of standard character escape sequences. */
2536 #define TARGET_BELL 007
2537 #define TARGET_BS 010
2538 #define TARGET_TAB 011
2539 #define TARGET_NEWLINE 012
2540 #define TARGET_VT 013
2541 #define TARGET_FF 014
2542 #define TARGET_CR 015
2544 /* Print operand X (an rtx) in assembler syntax to file FILE.
2545 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2546 The CODE z takes the size of operand from the following digit, and
2547 outputs b,w,or l respectively.
2549 On the 80386, we use several such letters:
2550 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
2551 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
2552 R -- print the prefix for register names.
2553 z -- print the opcode suffix for the size of the current operand.
2554 * -- print a star (in certain assembler syntax)
2555 P -- if PIC, print an @PLT suffix.
2556 X -- don't print any sort of PIC '@' suffix for a symbol.
2557 J -- print jump insn for arithmetic_comparison_operator.
2558 s -- ??? something to do with double shifts. not actually used, afaik.
2559 C -- print a conditional move suffix corresponding to the op code.
2560 c -- likewise, but reverse the condition.
2561 F,f -- likewise, but for floating-point. */
2563 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2566 /* Print the name of a register based on its machine mode and number.
2567 If CODE is 'w', pretend the mode is HImode.
2568 If CODE is 'b', pretend the mode is QImode.
2569 If CODE is 'k', pretend the mode is SImode.
2570 If CODE is 'h', pretend the reg is the `high' byte register.
2571 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
2573 extern char *hi_reg_name
[];
2574 extern char *qi_reg_name
[];
2575 extern char *qi_high_reg_name
[];
2577 #define PRINT_REG(X, CODE, FILE) \
2578 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
2580 fprintf (FILE, "%s", RP); \
2581 switch ((CODE == 'w' ? 2 \
2586 : GET_MODE_SIZE (GET_MODE (X)))) \
2589 if (STACK_TOP_P (X)) \
2591 fputs ("st(0)", FILE); \
2597 if (! FP_REG_P (X)) fputs ("e", FILE); \
2599 fputs (hi_reg_name[REGNO (X)], FILE); \
2602 fputs (qi_reg_name[REGNO (X)], FILE); \
2605 fputs (qi_high_reg_name[REGNO (X)], FILE); \
2610 #define PRINT_OPERAND(FILE, X, CODE) \
2611 print_operand (FILE, X, CODE)
2613 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2614 print_operand_address (FILE, ADDR)
2616 /* Print the name of a register for based on its machine mode and number.
2617 This macro is used to print debugging output.
2618 This macro is different from PRINT_REG in that it may be used in
2619 programs that are not linked with aux-output.o. */
2621 #define DEBUG_PRINT_REG(X, CODE, FILE) \
2622 do { static char *hi_name[] = HI_REGISTER_NAMES; \
2623 static char *qi_name[] = QI_REGISTER_NAMES; \
2624 fprintf (FILE, "%d %s", REGNO (X), RP); \
2625 if (REGNO (X) == ARG_POINTER_REGNUM) \
2626 { fputs ("argp", FILE); break; } \
2627 if (STACK_TOP_P (X)) \
2628 { fputs ("st(0)", FILE); break; } \
2630 { fputs (hi_name[REGNO(X)], FILE); break; } \
2631 switch (GET_MODE_SIZE (GET_MODE (X))) \
2634 fputs ("e", FILE); \
2636 fputs (hi_name[REGNO (X)], FILE); \
2639 fputs (qi_name[REGNO (X)], FILE); \
2644 /* Output the prefix for an immediate operand, or for an offset operand. */
2645 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
2646 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
2648 /* Routines in libgcc that return floats must return them in an fp reg,
2649 just as other functions do which return such values.
2650 These macros make that happen. */
2652 #define FLOAT_VALUE_TYPE float
2653 #define INTIFY(FLOATVAL) FLOATVAL
2655 /* Nonzero if INSN magically clobbers register REGNO. */
2657 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
2658 (FP_REGNO_P (REGNO) \
2659 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
2662 /* a letter which is not needed by the normal asm syntax, which
2663 we can use for operand syntax in the extended asm */
2665 #define ASM_OPERAND_LETTER '#'
2666 #define RET return ""
2667 #define AT_SP(mode) (gen_rtx_MEM ((mode), stack_pointer_rtx))
2669 /* Helper macros to expand a binary/unary operator if needed */
2670 #define IX86_EXPAND_BINARY_OPERATOR(OP, MODE, OPERANDS) \
2672 if (!ix86_expand_binary_operator (OP, MODE, OPERANDS)) \
2676 #define IX86_EXPAND_UNARY_OPERATOR(OP, MODE, OPERANDS) \
2678 if (!ix86_expand_unary_operator (OP, MODE, OPERANDS,)) \
2683 /* Functions in i386.c */
2684 extern void override_options ();
2685 extern void order_regs_for_local_alloc ();
2686 extern char *output_strlen_unroll ();
2687 extern struct rtx_def
*i386_sext16_if_const ();
2688 extern int i386_aligned_p ();
2689 extern int i386_cc_probably_useless_p ();
2690 extern int i386_valid_decl_attribute_p ();
2691 extern int i386_valid_type_attribute_p ();
2692 extern int i386_return_pops_args ();
2693 extern int i386_comp_type_attributes ();
2694 extern void init_cumulative_args ();
2695 extern void function_arg_advance ();
2696 extern struct rtx_def
*function_arg ();
2697 extern int function_arg_partial_nregs ();
2698 extern char *output_strlen_unroll ();
2699 extern void output_op_from_reg ();
2700 extern void output_to_reg ();
2701 extern char *singlemove_string ();
2702 extern char *output_move_double ();
2703 extern char *output_move_memory ();
2704 extern char *output_move_pushmem ();
2705 extern int standard_80387_constant_p ();
2706 extern char *output_move_const_single ();
2707 extern int symbolic_operand ();
2708 extern int call_insn_operand ();
2709 extern int expander_call_insn_operand ();
2710 extern int symbolic_reference_mentioned_p ();
2711 extern int ix86_expand_binary_operator ();
2712 extern int ix86_binary_operator_ok ();
2713 extern int ix86_expand_unary_operator ();
2714 extern int ix86_unary_operator_ok ();
2715 extern void emit_pic_move ();
2716 extern void function_prologue ();
2717 extern int simple_386_epilogue ();
2718 extern void function_epilogue ();
2719 extern int legitimate_address_p ();
2720 extern struct rtx_def
*legitimize_pic_address ();
2721 extern struct rtx_def
*legitimize_address ();
2722 extern void print_operand ();
2723 extern void print_operand_address ();
2724 extern void notice_update_cc ();
2725 extern void split_di ();
2726 extern int binary_387_op ();
2727 extern int shift_op ();
2728 extern int VOIDmode_compare_op ();
2729 extern char *output_387_binary_op ();
2730 extern char *output_fix_trunc ();
2731 extern char *output_float_compare ();
2732 extern char *output_fp_cc0_set ();
2733 extern void save_386_machine_status ();
2734 extern void restore_386_machine_status ();
2735 extern void clear_386_stack_locals ();
2736 extern struct rtx_def
*assign_386_stack_local ();
2737 extern int is_mul ();
2738 extern int is_div ();
2739 extern int last_to_set_cc ();
2740 extern int doesnt_set_condition_code ();
2741 extern int sets_condition_code ();
2742 extern int str_immediate_operand ();
2743 extern int is_fp_insn ();
2744 extern int is_fp_dest ();
2745 extern int is_fp_store ();
2746 extern int agi_dependent ();
2747 extern int reg_mentioned_in_mem ();
2750 extern struct rtx_def
*copy_all_rtx ();
2751 extern void rewrite_address ();
2754 /* Variables in i386.c */
2755 extern char *ix86_cpu_string
; /* for -mcpu=<xxx> */
2756 extern char *ix86_arch_string
; /* for -march=<xxx> */
2757 extern char *i386_reg_alloc_order
; /* register allocation order */
2758 extern char *i386_regparm_string
; /* # registers to use to pass args */
2759 extern char *i386_align_loops_string
; /* power of two alignment for loops */
2760 extern char *i386_align_jumps_string
; /* power of two alignment for non-loop jumps */
2761 extern char *i386_align_funcs_string
; /* power of two alignment for functions */
2762 extern char *i386_branch_cost_string
; /* values 1-5: see jump.c */
2763 extern int i386_regparm
; /* i386_regparm_string as a number */
2764 extern int i386_align_loops
; /* power of two alignment for loops */
2765 extern int i386_align_jumps
; /* power of two alignment for non-loop jumps */
2766 extern int i386_align_funcs
; /* power of two alignment for functions */
2767 extern int i386_branch_cost
; /* values 1-5: see jump.c */
2768 extern char *hi_reg_name
[]; /* names for 16 bit regs */
2769 extern char *qi_reg_name
[]; /* names for 8 bit regs (low) */
2770 extern char *qi_high_reg_name
[]; /* names for 8 bit regs (high) */
2771 extern enum reg_class regclass_map
[]; /* smalled class containing REGNO */
2772 extern struct rtx_def
*i386_compare_op0
; /* operand 0 for comparisons */
2773 extern struct rtx_def
*i386_compare_op1
; /* operand 1 for comparisons */
2775 /* External variables used */
2776 extern int optimize
; /* optimization level */
2777 extern int obey_regdecls
; /* TRUE if stupid register allocation */
2779 /* External functions used */
2780 extern struct rtx_def
*force_operand ();
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