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1 /* Definitions of target machine for GNU compiler for Intel 80386.
2 Copyright (C) 1988, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* The purpose of this file is to define the characteristics of the i386,
22 independent of assembler syntax or operating system.
24 Three other files build on this one to describe a specific assembler syntax:
25 bsd386.h, att386.h, and sun386.h.
27 The actual tm.h file for a particular system should include
28 this file, and then the file for the appropriate assembler syntax.
30 Many macros that specify assembler syntax are omitted entirely from
31 this file because they really belong in the files for particular
32 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
33 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
34 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
36 /* Names to predefine in the preprocessor for this target machine. */
40 /* Stubs for half-pic support if not OSF/1 reference platform. */
43 #define HALF_PIC_P() 0
44 #define HALF_PIC_NUMBER_PTRS 0
45 #define HALF_PIC_NUMBER_REFS 0
46 #define HALF_PIC_ENCODE(DECL)
47 #define HALF_PIC_DECLARE(NAME)
48 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
49 #define HALF_PIC_ADDRESS_P(X) 0
50 #define HALF_PIC_PTR(X) X
51 #define HALF_PIC_FINISH(STREAM)
54 /* Run-time compilation parameters selecting different hardware subsets. */
56 extern int target_flags
;
58 /* Macros used in the machine description to test the flags. */
60 /* configure can arrage to make this 2, to force a 486. */
61 #ifndef TARGET_CPU_DEFAULT
62 #define TARGET_CPU_DEFAULT 0
65 /* Compile 80387 insns for floating point (not library calls). */
66 #define TARGET_80387 (target_flags & 1)
67 /* Compile code for an i486. */
68 #define TARGET_486 (target_flags & 2)
69 /* Compile using ret insn that pops args.
70 This will not work unless you use prototypes at least
71 for all functions that can take varying numbers of args. */
72 #define TARGET_RTD (target_flags & 8)
73 /* Compile passing first two args in regs 0 and 1.
74 This exists only to test compiler features that will
75 be needed for RISC chips. It is not usable
76 and is not intended to be usable on this cpu. */
77 #define TARGET_REGPARM (target_flags & 020)
79 /* Put uninitialized locals into bss, not data.
80 Meaningful only on svr3. */
81 #define TARGET_SVR3_SHLIB (target_flags & 040)
83 /* Use IEEE floating point comparisons. These handle correctly the cases
84 where the result of a comparison is unordered. Normally SIGFPE is
85 generated in such cases, in which case this isn't needed. */
86 #define TARGET_IEEE_FP (target_flags & 0100)
88 /* Functions that return a floating point value may return that value
89 in the 387 FPU or in 386 integer registers. If set, this flag causes
90 the 387 to be used, which is compatible with most calling conventions. */
91 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & 0200)
93 /* Macro to define tables used to set the flags.
94 This is a list in braces of pairs in braces,
95 each pair being { "NAME", VALUE }
96 where VALUE is the bits to set or minus the bits to clear.
97 An empty string NAME is used to identify the default VALUE. */
99 #define TARGET_SWITCHES \
102 { "soft-float", -1}, \
103 { "no-soft-float", 1}, \
110 { "no-regparm", -020}, \
111 { "svr3-shlib", 040}, \
112 { "no-svr3-shlib", -040}, \
113 { "ieee-fp", 0100}, \
114 { "no-ieee-fp", -0100}, \
115 { "fp-ret-in-387", 0200}, \
116 { "no-fp-ret-in-387", -0200}, \
118 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT}}
120 /* This is meant to be redefined in the host dependent files */
121 #define SUBTARGET_SWITCHES
123 #define OVERRIDE_OPTIONS \
125 SUBTARGET_OVERRIDE_OPTIONS \
128 /* This is meant to be redefined in the host dependent files */
129 #define SUBTARGET_OVERRIDE_OPTIONS
131 /* target machine storage layout */
133 /* Define this if most significant byte of a word is the lowest numbered. */
134 /* That is true on the 80386. */
136 #define BITS_BIG_ENDIAN 0
138 /* Define this if most significant byte of a word is the lowest numbered. */
139 /* That is not true on the 80386. */
140 #define BYTES_BIG_ENDIAN 0
142 /* Define this if most significant word of a multiword number is the lowest
144 /* Not true for 80386 */
145 #define WORDS_BIG_ENDIAN 0
147 /* number of bits in an addressable storage unit */
148 #define BITS_PER_UNIT 8
150 /* Width in bits of a "word", which is the contents of a machine register.
151 Note that this is not necessarily the width of data type `int';
152 if using 16-bit ints on a 80386, this would still be 32.
153 But on a machine with 16-bit registers, this would be 16. */
154 #define BITS_PER_WORD 32
156 /* Width of a word, in units (bytes). */
157 #define UNITS_PER_WORD 4
159 /* Width in bits of a pointer.
160 See also the macro `Pmode' defined below. */
161 #define POINTER_SIZE 32
163 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
164 #define PARM_BOUNDARY 32
166 /* Boundary (in *bits*) on which stack pointer should be aligned. */
167 #define STACK_BOUNDARY 32
169 /* Allocation boundary (in *bits*) for the code of a function.
170 For i486, we get better performance by aligning to a cache
171 line (i.e. 16 byte) boundary. */
172 #define FUNCTION_BOUNDARY (TARGET_486 ? 128 : 32)
174 /* Alignment of field after `int : 0' in a structure. */
176 #define EMPTY_FIELD_BOUNDARY 32
178 /* Minimum size in bits of the largest boundary to which any
179 and all fundamental data types supported by the hardware
180 might need to be aligned. No data type wants to be aligned
181 rounder than this. The i386 supports 64-bit floating point
182 quantities, but these can be aligned on any 32-bit boundary. */
183 #define BIGGEST_ALIGNMENT 32
185 /* Set this non-zero if move instructions will actually fail to work
186 when given unaligned data. */
187 #define STRICT_ALIGNMENT 0
189 /* If bit field type is int, don't let it cross an int,
190 and give entire struct the alignment of an int. */
191 /* Required on the 386 since it doesn't have bitfield insns. */
192 #define PCC_BITFIELD_TYPE_MATTERS 1
194 /* Align loop starts for optimal branching. */
195 #define ASM_OUTPUT_LOOP_ALIGN(FILE) \
196 ASM_OUTPUT_ALIGN (FILE, 2)
198 /* This is how to align an instruction for optimal branching.
199 On i486 we'll get better performance by aligning on a
200 cache line (i.e. 16 byte) boundary. */
201 #define ASM_OUTPUT_ALIGN_CODE(FILE) \
202 ASM_OUTPUT_ALIGN ((FILE), (TARGET_486 ? 4 : 2))
204 /* Standard register usage. */
206 /* This processor has special stack-like registers. See reg-stack.c
211 /* Number of actual hardware registers.
212 The hardware registers are assigned numbers for the compiler
213 from 0 to just below FIRST_PSEUDO_REGISTER.
214 All registers that the compiler knows about must be given numbers,
215 even those that are not normally considered general registers.
217 In the 80386 we give the 8 general purpose registers the numbers 0-7.
218 We number the floating point registers 8-15.
219 Note that registers 0-7 can be accessed as a short or int,
220 while only 0-3 may be used with byte `mov' instructions.
222 Reg 16 does not correspond to any hardware register, but instead
223 appears in the RTL as an argument pointer prior to reload, and is
224 eliminated during reloading in favor of either the stack or frame
227 #define FIRST_PSEUDO_REGISTER 17
229 /* 1 for registers that have pervasive standard uses
230 and are not available for the register allocator.
231 On the 80386, the stack pointer is such, as is the arg pointer. */
232 #define FIXED_REGISTERS \
233 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
234 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
236 /* 1 for registers not available across function calls.
237 These must include the FIXED_REGISTERS and also any
238 registers that can be used without being saved.
239 The latter must include the registers where values are returned
240 and the register where structure-value addresses are passed.
241 Aside from that, you can include as many other registers as you like. */
243 #define CALL_USED_REGISTERS \
244 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
245 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
247 /* Macro to conditionally modify fixed_regs/call_used_regs. */
248 #define CONDITIONAL_REGISTER_USAGE \
252 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
253 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
255 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
259 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
260 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
261 if (TEST_HARD_REG_BIT (x, i)) \
262 fixed_regs[i] = call_used_regs[i] = 1; \
266 /* Return number of consecutive hard regs needed starting at reg REGNO
267 to hold something of mode MODE.
268 This is ordinarily the length in words of a value of mode MODE
269 but can be less for certain modes in special long registers.
271 Actually there are no two word move instructions for consecutive
272 registers. And only registers 0-3 may have mov byte instructions
276 #define HARD_REGNO_NREGS(REGNO, MODE) \
277 (FP_REGNO_P (REGNO) ? 1 \
278 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
280 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
281 On the 80386, the first 4 cpu registers can hold any mode
282 while the floating point registers may hold only floating point.
283 Make it clear that the fp regs could not hold a 16-byte float. */
285 /* The casts to int placate a compiler on a microvax,
286 for cross-compiler testing. */
288 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
291 : FP_REGNO_P ((REGNO)) \
292 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
293 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
294 && GET_MODE_UNIT_SIZE (MODE) <= 12) \
295 : (int) (MODE) != (int) QImode)
297 /* Value is 1 if it is a good idea to tie two pseudo registers
298 when one has mode MODE1 and one has mode MODE2.
299 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
300 for any hard reg, then this must be 0 for correct output. */
302 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
304 /* A C expression returning the cost of moving data from a register of class
305 CLASS1 to one of CLASS2.
307 On the i386, copying between floating-point and fixed-point
308 registers is expensive. */
310 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
311 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
312 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
315 /* Specify the registers used for certain standard purposes.
316 The values of these macros are register numbers. */
318 /* on the 386 the pc register is %eip, and is not usable as a general
319 register. The ordinary mov instructions won't work */
320 /* #define PC_REGNUM */
322 /* Register to use for pushing function arguments. */
323 #define STACK_POINTER_REGNUM 7
325 /* Base register for access to local variables of the function. */
326 #define FRAME_POINTER_REGNUM 6
328 /* First floating point reg */
329 #define FIRST_FLOAT_REG 8
331 /* First & last stack-like regs */
332 #define FIRST_STACK_REG FIRST_FLOAT_REG
333 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
335 /* Value should be nonzero if functions must have frame pointers.
336 Zero means the frame pointer need not be set up (and parms
337 may be accessed via the stack pointer) in functions that seem suitable.
338 This is computed in `reload', in reload1.c. */
339 #define FRAME_POINTER_REQUIRED 0
341 /* Base register for access to arguments of the function. */
342 #define ARG_POINTER_REGNUM 16
344 /* Register in which static-chain is passed to a function. */
345 #define STATIC_CHAIN_REGNUM 2
347 /* Register to hold the addressing base for position independent
348 code access to data items. */
349 #define PIC_OFFSET_TABLE_REGNUM 3
351 /* Register in which address to store a structure value
352 arrives in the function. On the 386, the prologue
353 copies this from the stack to register %eax. */
354 #define STRUCT_VALUE_INCOMING 0
356 /* Place in which caller passes the structure value address.
357 0 means push the value on the stack like an argument. */
358 #define STRUCT_VALUE 0
360 /* Define the classes of registers for register constraints in the
361 machine description. Also define ranges of constants.
363 One of the classes must always be named ALL_REGS and include all hard regs.
364 If there is more than one class, another class must be named NO_REGS
365 and contain no registers.
367 The name GENERAL_REGS must be the name of a class (or an alias for
368 another name such as ALL_REGS). This is the class of registers
369 that is allowed by "g" or "r" in a register constraint.
370 Also, registers outside this class are allocated only when
371 instructions express preferences for them.
373 The classes must be numbered in nondecreasing order; that is,
374 a larger-numbered class must never be contained completely
375 in a smaller-numbered class.
377 For any two classes, it is very desirable that there be another
378 class that represents their union.
380 It might seem that class BREG is unnecessary, since no useful 386
381 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
382 and the "b" register constraint is useful in asms for syscalls. */
387 AREG
, DREG
, CREG
, BREG
,
388 Q_REGS
, /* %eax %ebx %ecx %edx */
390 INDEX_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp */
391 GENERAL_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
392 FP_TOP_REG
, FP_SECOND_REG
, /* %st(0) %st(1) */
394 ALL_REGS
, LIM_REG_CLASSES
397 #define N_REG_CLASSES (int) LIM_REG_CLASSES
399 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
401 /* Give names of register classes as strings for dump file. */
403 #define REG_CLASS_NAMES \
405 "AREG", "DREG", "CREG", "BREG", \
410 "FP_TOP_REG", "FP_SECOND_REG", \
414 /* Define which registers fit in which classes.
415 This is an initializer for a vector of HARD_REG_SET
416 of length N_REG_CLASSES. */
418 #define REG_CLASS_CONTENTS \
420 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
422 0x10, 0x20, /* SIREG, DIREG */ \
423 0x1007f, /* INDEX_REGS */ \
424 0x100ff, /* GENERAL_REGS */ \
425 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
426 0xff00, /* FLOAT_REGS */ \
429 /* The same information, inverted:
430 Return the class number of the smallest class containing
431 reg number REGNO. This could be a conditional expression
432 or could index an array. */
434 extern enum reg_class regclass_map
[FIRST_PSEUDO_REGISTER
];
435 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
437 /* When defined, the compiler allows registers explicitly used in the
438 rtl to be used as spill registers but prevents the compiler from
439 extending the lifetime of these registers. */
441 #define SMALL_REGISTER_CLASSES
443 #define QI_REG_P(X) \
444 (REG_P (X) && REGNO (X) < 4)
445 #define NON_QI_REG_P(X) \
446 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
448 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
449 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
451 #define STACK_REG_P(xop) (REG_P (xop) && \
452 REGNO (xop) >= FIRST_STACK_REG && \
453 REGNO (xop) <= LAST_STACK_REG)
455 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
457 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
459 /* Try to maintain the accuracy of the death notes for regs satisfying the
460 following. Important for stack like regs, to know when to pop. */
462 /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
464 /* 1 if register REGNO can magically overlap other regs.
465 Note that nonzero values work only in very special circumstances. */
467 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
469 /* The class value for index registers, and the one for base regs. */
471 #define INDEX_REG_CLASS INDEX_REGS
472 #define BASE_REG_CLASS GENERAL_REGS
474 /* Get reg_class from a letter such as appears in the machine description. */
476 #define REG_CLASS_FROM_LETTER(C) \
477 ((C) == 'r' ? GENERAL_REGS : \
478 (C) == 'q' ? Q_REGS : \
479 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
482 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
485 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
488 (C) == 'a' ? AREG : \
489 (C) == 'b' ? BREG : \
490 (C) == 'c' ? CREG : \
491 (C) == 'd' ? DREG : \
492 (C) == 'D' ? DIREG : \
493 (C) == 'S' ? SIREG : NO_REGS)
495 /* The letters I, J, K, L and M in a register constraint string
496 can be used to stand for particular ranges of immediate operands.
497 This macro defines what the ranges are.
498 C is the letter, and VALUE is a constant value.
499 Return 1 if VALUE is in the range specified by C.
501 I is for non-DImode shifts.
502 J is for DImode shifts.
503 K and L are for an `andsi' optimization.
504 M is for shifts that can be executed by the "lea" opcode.
507 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
508 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
509 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
510 (C) == 'K' ? (VALUE) == 0xff : \
511 (C) == 'L' ? (VALUE) == 0xffff : \
512 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
515 /* Similar, but for floating constants, and defining letters G and H.
516 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
517 TARGET_387 isn't set, because the stack register converter may need to
518 load 0.0 into the function value register. */
520 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
521 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
523 /* Place additional restrictions on the register class to use when it
524 is necessary to be able to hold a value of mode MODE in a reload
525 register for which class CLASS would ordinarily be used. */
527 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
528 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
531 /* Given an rtx X being reloaded into a reg required to be
532 in class CLASS, return the class of reg to actually use.
533 In general this is just CLASS; but on some machines
534 in some cases it is preferable to use a more restrictive class.
535 On the 80386 series, we prevent floating constants from being
536 reloaded into floating registers (since no move-insn can do that)
537 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
539 /* Put float CONST_DOUBLE in the constant pool instead of fp regs.
540 QImode must go into class Q_REGS.
541 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
542 movdf to do mem-to-mem moves through integer regs. */
544 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
545 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \
546 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
547 : ((CLASS) == ALL_REGS \
548 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
551 /* If we are copying between general and FP registers, we need a memory
554 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
555 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
556 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
558 /* Return the maximum number of consecutive registers
559 needed to represent mode MODE in a register of class CLASS. */
560 /* On the 80386, this is the size of MODE in words,
561 except in the FP regs, where a single reg is always enough. */
562 #define CLASS_MAX_NREGS(CLASS, MODE) \
563 (FLOAT_CLASS_P (CLASS) ? 1 : \
564 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
566 /* Stack layout; function entry, exit and calling. */
568 /* Define this if pushing a word on the stack
569 makes the stack pointer a smaller address. */
570 #define STACK_GROWS_DOWNWARD
572 /* Define this if the nominal address of the stack frame
573 is at the high-address end of the local variables;
574 that is, each additional local variable allocated
575 goes at a more negative offset in the frame. */
576 #define FRAME_GROWS_DOWNWARD
578 /* Offset within stack frame to start allocating local variables at.
579 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
580 first local allocated. Otherwise, it is the offset to the BEGINNING
581 of the first local allocated. */
582 #define STARTING_FRAME_OFFSET 0
584 /* If we generate an insn to push BYTES bytes,
585 this says how many the stack pointer really advances by.
586 On 386 pushw decrements by exactly 2 no matter what the position was.
587 On the 386 there is no pushb; we use pushw instead, and this
588 has the effect of rounding up to 2. */
590 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
592 /* Offset of first parameter from the argument pointer register value. */
593 #define FIRST_PARM_OFFSET(FNDECL) 0
595 /* Value is the number of bytes of arguments automatically
596 popped when returning from a subroutine call.
597 FUNTYPE is the data type of the function (as a tree),
598 or for a library call it is an identifier node for the subroutine name.
599 SIZE is the number of bytes of arguments passed on the stack.
601 On the 80386, the RTD insn may be used to pop them if the number
602 of args is fixed, but if the number is variable then the caller
603 must pop them all. RTD can't be used for library calls now
604 because the library is compiled with the Unix compiler.
605 Use of RTD is a selectable option, since it is incompatible with
606 standard Unix calling sequences. If the option is not selected,
607 the caller must always pop the args. */
609 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \
610 (TREE_CODE (FUNTYPE) == IDENTIFIER_NODE ? 0 \
612 && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
613 || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
614 == void_type_node))) ? (SIZE) \
615 : (aggregate_value_p (TREE_TYPE (FUNTYPE))) ? GET_MODE_SIZE (Pmode) : 0)
617 /* Define how to find the value returned by a function.
618 VALTYPE is the data type of the value (as a tree).
619 If the precise function being called is known, FUNC is its FUNCTION_DECL;
620 otherwise, FUNC is 0. */
621 #define FUNCTION_VALUE(VALTYPE, FUNC) \
622 gen_rtx (REG, TYPE_MODE (VALTYPE), \
623 VALUE_REGNO (TYPE_MODE (VALTYPE)))
625 /* Define how to find the value returned by a library function
626 assuming the value has mode MODE. */
628 #define LIBCALL_VALUE(MODE) \
629 gen_rtx (REG, MODE, VALUE_REGNO (MODE))
631 /* Define the size of the result block used for communication between
632 untyped_call and untyped_return. The block contains a DImode value
633 followed by the block used by fnsave and frstor. */
635 #define APPLY_RESULT_SIZE (8+108)
637 /* 1 if N is a possible register number for function argument passing.
638 On the 80386, no registers are used in this way.
639 *NOTE* -mregparm does not work.
640 It exists only to test register calling conventions. */
642 #define FUNCTION_ARG_REGNO_P(N) 0
644 /* Define a data type for recording info about an argument list
645 during the scan of that argument list. This data type should
646 hold all necessary information about the function itself
647 and about the args processed so far, enough to enable macros
648 such as FUNCTION_ARG to determine where the next arg should go.
650 On the 80386, this is a single integer, which is a number of bytes
651 of arguments scanned so far. */
653 #define CUMULATIVE_ARGS int
655 /* Initialize a variable CUM of type CUMULATIVE_ARGS
656 for a call to a function whose data type is FNTYPE.
657 For a library call, FNTYPE is 0.
659 On the 80386, the offset starts at 0. */
661 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
664 /* Update the data in CUM to advance over an argument
665 of mode MODE and data type TYPE.
666 (TYPE is null for libcalls where that information may not be available.) */
668 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
669 ((CUM) += ((MODE) != BLKmode \
670 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
671 : (int_size_in_bytes (TYPE) + 3) & ~3))
673 /* Define where to put the arguments to a function.
674 Value is zero to push the argument on the stack,
675 or a hard register in which to store the argument.
677 MODE is the argument's machine mode.
678 TYPE is the data type of the argument (as a tree).
679 This is null for libcalls where that information may
681 CUM is a variable of type CUMULATIVE_ARGS which gives info about
682 the preceding args and about the function being called.
683 NAMED is nonzero if this argument is a named parameter
684 (otherwise it is an extra parameter matching an ellipsis). */
687 /* On the 80386 all args are pushed, except if -mregparm is specified
688 then the first two words of arguments are passed in EAX, EDX.
689 *NOTE* -mregparm does not work.
690 It exists only to test register calling conventions. */
692 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
693 ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
695 /* For an arg passed partly in registers and partly in memory,
696 this is the number of registers used.
697 For args passed entirely in registers or entirely in memory, zero. */
700 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
701 ((TARGET_REGPARM && (CUM) < 8 \
702 && 8 < ((CUM) + ((MODE) == BLKmode \
703 ? int_size_in_bytes (TYPE) \
704 : GET_MODE_SIZE (MODE)))) \
707 /* This macro generates the assembly code for function entry.
708 FILE is a stdio stream to output the code to.
709 SIZE is an int: how many units of temporary storage to allocate.
710 Refer to the array `regs_ever_live' to determine which registers
711 to save; `regs_ever_live[I]' is nonzero if register number I
712 is ever used in the function. This macro is responsible for
713 knowing which registers should not be saved even if used. */
715 #define FUNCTION_PROLOGUE(FILE, SIZE) \
716 function_prologue (FILE, SIZE)
718 /* Output assembler code to FILE to increment profiler label # LABELNO
719 for profiling a function entry. */
721 #define FUNCTION_PROFILER(FILE, LABELNO) \
725 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
726 LPREFIX, (LABELNO)); \
727 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
731 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
732 fprintf (FILE, "\tcall _mcount\n"); \
736 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
737 the stack pointer does not matter. The value is tested only in
738 functions that have frame pointers.
739 No definition is equivalent to always zero. */
740 /* Note on the 386 it might be more efficient not to define this since
741 we have to restore it ourselves from the frame pointer, in order to
744 #define EXIT_IGNORE_STACK 1
746 /* This macro generates the assembly code for function exit,
747 on machines that need it. If FUNCTION_EPILOGUE is not defined
748 then individual return instructions are generated for each
749 return statement. Args are same as for FUNCTION_PROLOGUE.
751 The function epilogue should not depend on the current stack pointer!
752 It should use the frame pointer only. This is mandatory because
753 of alloca; we also take advantage of it to omit stack adjustments
756 If the last non-note insn in the function is a BARRIER, then there
757 is no need to emit a function prologue, because control does not fall
758 off the end. This happens if the function ends in an "exit" call, or
759 if a `return' insn is emitted directly into the function. */
761 #define FUNCTION_EPILOGUE(FILE, SIZE) \
763 rtx last = get_last_insn (); \
764 if (last && GET_CODE (last) == NOTE) \
765 last = prev_nonnote_insn (last); \
766 if (! last || GET_CODE (last) != BARRIER) \
767 function_epilogue (FILE, SIZE); \
770 /* Output assembler code for a block containing the constant parts
771 of a trampoline, leaving space for the variable parts. */
773 /* On the 386, the trampoline contains three instructions:
777 #define TRAMPOLINE_TEMPLATE(FILE) \
779 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
780 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
781 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
782 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
783 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
784 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
785 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
786 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
789 /* Length in units of the trampoline for entering a nested function. */
791 #define TRAMPOLINE_SIZE 12
793 /* Emit RTL insns to initialize the variable parts of a trampoline.
794 FNADDR is an RTX for the address of the function's pure code.
795 CXT is an RTX for the static chain value for the function. */
797 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
799 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
800 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
803 /* Definitions for register eliminations.
805 This is an array of structures. Each structure initializes one pair
806 of eliminable registers. The "from" register number is given first,
807 followed by "to". Eliminations of the same "from" register are listed
808 in order of preference.
810 We have two registers that can be eliminated on the i386. First, the
811 frame pointer register can often be eliminated in favor of the stack
812 pointer register. Secondly, the argument pointer register can always be
813 eliminated; it is replaced with either the stack or frame pointer. */
815 #define ELIMINABLE_REGS \
816 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
817 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
818 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
820 /* Given FROM and TO register numbers, say whether this elimination is allowed.
821 Frame pointer elimination is automatically handled.
823 For the i386, if frame pointer elimination is being done, we would like to
824 convert ap into sp, not fp.
826 All other eliminations are valid. */
828 #define CAN_ELIMINATE(FROM, TO) \
829 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
830 ? ! frame_pointer_needed \
833 /* Define the offset between two registers, one to be eliminated, and the other
834 its replacement, at the start of a routine. */
836 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
838 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
839 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
845 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
846 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
847 || (current_function_uses_pic_offset_table \
848 && regno == PIC_OFFSET_TABLE_REGNUM)) \
851 (OFFSET) = offset + get_frame_size (); \
853 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
854 (OFFSET) += 4; /* Skip saved PC */ \
858 /* Addressing modes, and classification of registers for them. */
860 /* #define HAVE_POST_INCREMENT */
861 /* #define HAVE_POST_DECREMENT */
863 /* #define HAVE_PRE_DECREMENT */
864 /* #define HAVE_PRE_INCREMENT */
866 /* Macros to check register numbers against specific register classes. */
868 /* These assume that REGNO is a hard or pseudo reg number.
869 They give nonzero only if REGNO is a hard reg of the suitable class
870 or a pseudo reg currently allocated to a suitable hard reg.
871 Since they use reg_renumber, they are safe only once reg_renumber
872 has been allocated, which happens in local-alloc.c. */
874 #define REGNO_OK_FOR_INDEX_P(REGNO) \
875 ((REGNO) < STACK_POINTER_REGNUM \
876 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
878 #define REGNO_OK_FOR_BASE_P(REGNO) \
879 ((REGNO) <= STACK_POINTER_REGNUM \
880 || (REGNO) == ARG_POINTER_REGNUM \
881 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
883 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
884 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
886 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
887 and check its validity for a certain class.
888 We have two alternate definitions for each of them.
889 The usual definition accepts all pseudo regs; the other rejects
890 them unless they have been allocated suitable hard regs.
891 The symbol REG_OK_STRICT causes the latter definition to be used.
893 Most source files want to accept pseudo regs in the hope that
894 they will get allocated to the class that the insn wants them to be in.
895 Source files for reload pass need to be strict.
896 After reload, it makes no difference, since pseudo regs have
897 been eliminated by then. */
899 #ifndef REG_OK_STRICT
901 /* Nonzero if X is a hard reg that can be used as an index or if
902 it is a pseudo reg. */
904 #define REG_OK_FOR_INDEX_P(X) \
905 (REGNO (X) < STACK_POINTER_REGNUM \
906 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
908 /* Nonzero if X is a hard reg that can be used as a base reg
909 of if it is a pseudo reg. */
912 #define REG_OK_FOR_BASE_P(X) \
913 (REGNO (X) <= STACK_POINTER_REGNUM \
914 || REGNO (X) == ARG_POINTER_REGNUM \
915 || REGNO(X) >= FIRST_PSEUDO_REGISTER)
917 #define REG_OK_FOR_STRREG_P(X) \
918 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
922 /* Nonzero if X is a hard reg that can be used as an index. */
923 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
924 /* Nonzero if X is a hard reg that can be used as a base reg. */
925 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
926 #define REG_OK_FOR_STRREG_P(X) \
927 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
931 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
932 that is a valid memory address for an instruction.
933 The MODE argument is the machine mode for the MEM expression
934 that wants to use this address.
936 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
937 except for CONSTANT_ADDRESS_P which is usually machine-independent.
939 See legitimize_pic_address in i386.c for details as to what
940 constitutes a legitimate address when -fpic is used. */
942 #define MAX_REGS_PER_ADDRESS 2
944 #define CONSTANT_ADDRESS_P(X) \
945 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
946 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
947 || GET_CODE (X) == HIGH)
949 /* Nonzero if the constant value X is a legitimate general operand.
950 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
952 #define LEGITIMATE_CONSTANT_P(X) 1
954 #define GO_IF_INDEXABLE_BASE(X, ADDR) \
955 if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR
957 #define LEGITIMATE_INDEX_REG_P(X) \
958 (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))
960 /* Return 1 if X is an index or an index times a scale. */
962 #define LEGITIMATE_INDEX_P(X) \
963 (LEGITIMATE_INDEX_REG_P (X) \
964 || (GET_CODE (X) == MULT \
965 && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
966 && GET_CODE (XEXP (X, 1)) == CONST_INT \
967 && (INTVAL (XEXP (X, 1)) == 2 \
968 || INTVAL (XEXP (X, 1)) == 4 \
969 || INTVAL (XEXP (X, 1)) == 8)))
971 /* Go to ADDR if X is an index term, a base reg, or a sum of those. */
973 #define GO_IF_INDEXING(X, ADDR) \
974 { if (LEGITIMATE_INDEX_P (X)) goto ADDR; \
975 GO_IF_INDEXABLE_BASE (X, ADDR); \
976 if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
977 { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
978 if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
979 { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
981 /* We used to allow this, but it isn't ever used.
982 || ((GET_CODE (X) == POST_DEC || GET_CODE (X) == POST_INC) \
983 && REG_P (XEXP (X, 0)) \
984 && REG_OK_FOR_STRREG_P (XEXP (X, 0))) \
987 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
989 if (CONSTANT_ADDRESS_P (X) \
990 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \
992 GO_IF_INDEXING (X, ADDR); \
993 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
995 rtx x0 = XEXP (X, 0); \
996 if (! flag_pic || ! SYMBOLIC_CONST (XEXP (X, 1))) \
997 { GO_IF_INDEXING (x0, ADDR); } \
998 else if (x0 == pic_offset_table_rtx) \
1000 else if (GET_CODE (x0) == PLUS) \
1002 if (XEXP (x0, 0) == pic_offset_table_rtx) \
1003 { GO_IF_INDEXABLE_BASE (XEXP (x0, 1), ADDR); } \
1004 if (XEXP (x0, 1) == pic_offset_table_rtx) \
1005 { GO_IF_INDEXABLE_BASE (XEXP (x0, 0), ADDR); } \
1010 /* Try machine-dependent ways of modifying an illegitimate address
1011 to be legitimate. If we find one, return the new, valid address.
1012 This macro is used in only one place: `memory_address' in explow.c.
1014 OLDX is the address as it was before break_out_memory_refs was called.
1015 In some cases it is useful to look at this to decide what needs to be done.
1017 MODE and WIN are passed so that this macro can use
1018 GO_IF_LEGITIMATE_ADDRESS.
1020 It is always safe for this macro to do nothing. It exists to recognize
1021 opportunities to optimize the output.
1023 For the 80386, we handle X+REG by loading X into a register R and
1024 using R+REG. R will go in a general reg and indexing will be used.
1025 However, if REG is a broken-out memory address or multiplication,
1026 nothing needs to be done because REG can certainly go in a general reg.
1028 When -fpic is used, special handling is needed for symbolic references.
1029 See comments by legitimize_pic_address in i386.c for details. */
1031 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1032 { extern rtx legitimize_pic_address (); \
1033 int ch = (X) != (OLDX); \
1034 if (flag_pic && SYMBOLIC_CONST (X)) \
1036 (X) = legitimize_pic_address (X, 0); \
1037 if (memory_address_p (MODE, X)) \
1040 if (GET_CODE (X) == PLUS) \
1041 { if (GET_CODE (XEXP (X, 0)) == MULT) \
1042 ch = 1, XEXP (X, 0) = force_operand (XEXP (X, 0), 0); \
1043 if (GET_CODE (XEXP (X, 1)) == MULT) \
1044 ch = 1, XEXP (X, 1) = force_operand (XEXP (X, 1), 0); \
1045 if (ch && GET_CODE (XEXP (X, 1)) == REG \
1046 && GET_CODE (XEXP (X, 0)) == REG) \
1048 if (flag_pic && SYMBOLIC_CONST (XEXP (X, 1))) \
1049 ch = 1, (X) = legitimize_pic_address (X, 0); \
1050 if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
1051 if (GET_CODE (XEXP (X, 0)) == REG) \
1052 { register rtx temp = gen_reg_rtx (Pmode); \
1053 register rtx val = force_operand (XEXP (X, 1), temp); \
1054 if (val != temp) emit_move_insn (temp, val); \
1055 XEXP (X, 1) = temp; \
1057 else if (GET_CODE (XEXP (X, 1)) == REG) \
1058 { register rtx temp = gen_reg_rtx (Pmode); \
1059 register rtx val = force_operand (XEXP (X, 0), temp); \
1060 if (val != temp) emit_move_insn (temp, val); \
1061 XEXP (X, 0) = temp; \
1064 /* Nonzero if the constant value X is a legitimate general operand
1065 when generating PIC code. It is given that flag_pic is on and
1066 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1068 #define LEGITIMATE_PIC_OPERAND_P(X) \
1069 (! SYMBOLIC_CONST (X) \
1070 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1072 #define SYMBOLIC_CONST(X) \
1073 (GET_CODE (X) == SYMBOL_REF \
1074 || GET_CODE (X) == LABEL_REF \
1075 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1077 /* Go to LABEL if ADDR (a legitimate address expression)
1078 has an effect that depends on the machine mode it is used for.
1079 On the 80386, only postdecrement and postincrement address depend thus
1080 (the amount of decrement or increment being the length of the operand). */
1081 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1082 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1084 /* Define this macro if references to a symbol must be treated
1085 differently depending on something about the variable or
1086 function named by the symbol (such as what section it is in).
1088 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1089 so that we may access it directly in the GOT. */
1091 #define ENCODE_SECTION_INFO(DECL) \
1096 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1097 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1098 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1099 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1100 || ! TREE_PUBLIC (DECL)); \
1105 /* Initialize data used by insn expanders. This is called from
1106 init_emit, once for each function, before code is generated.
1107 For 386, clear stack slot assignments remembered from previous
1110 #define INIT_EXPANDERS clear_386_stack_locals ()
1112 /* Specify the machine mode that this machine uses
1113 for the index in the tablejump instruction. */
1114 #define CASE_VECTOR_MODE Pmode
1116 /* Define this if the tablejump instruction expects the table
1117 to contain offsets from the address of the table.
1118 Do not define this if the table should contain absolute addresses. */
1119 /* #define CASE_VECTOR_PC_RELATIVE */
1121 /* Specify the tree operation to be used to convert reals to integers.
1122 This should be changed to take advantage of fist --wfs ??
1124 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1126 /* This is the kind of divide that is easiest to do in the general case. */
1127 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1129 /* Define this as 1 if `char' should by default be signed; else as 0. */
1130 #define DEFAULT_SIGNED_CHAR 1
1132 /* Max number of bytes we can move from memory to memory
1133 in one reasonably fast instruction. */
1136 /* MOVE_RATIO is the number of move instructions that is better than a
1137 block move. Make this large on i386, since the block move is very
1138 inefficient with small blocks, and the hard register needs of the
1139 block move require much reload work. */
1140 #define MOVE_RATIO 5
1142 /* Define this if zero-extension is slow (more than one real instruction). */
1143 /* #define SLOW_ZERO_EXTEND */
1145 /* Nonzero if access to memory by bytes is slow and undesirable. */
1146 #define SLOW_BYTE_ACCESS 0
1148 /* Define if shifts truncate the shift count
1149 which implies one can omit a sign-extension or zero-extension
1150 of a shift count. */
1151 /* One i386, shifts do truncate the count. But bit opcodes don't. */
1153 /* #define SHIFT_COUNT_TRUNCATED */
1155 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1156 is done just by pretending it is already truncated. */
1157 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1159 /* We assume that the store-condition-codes instructions store 0 for false
1160 and some other value for true. This is the value stored for true. */
1162 #define STORE_FLAG_VALUE 1
1164 /* When a prototype says `char' or `short', really pass an `int'.
1165 (The 386 can't easily push less than an int.) */
1167 #define PROMOTE_PROTOTYPES
1169 /* Specify the machine mode that pointers have.
1170 After generation of rtl, the compiler makes no further distinction
1171 between pointers and any other objects of this machine mode. */
1172 #define Pmode SImode
1174 /* A function address in a call instruction
1175 is a byte address (for indexing purposes)
1176 so give the MEM rtx a byte's mode. */
1177 #define FUNCTION_MODE QImode
1179 /* Define this if addresses of constant functions
1180 shouldn't be put through pseudo regs where they can be cse'd.
1181 Desirable on the 386 because a CALL with a constant address is
1182 not much slower than one with a register address. */
1183 #define NO_FUNCTION_CSE
1185 /* Provide the costs of a rtl expression. This is in the body of a
1188 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1190 return COSTS_N_INSNS (10); \
1195 return COSTS_N_INSNS (40); \
1197 if (GET_CODE (XEXP (X, 0)) == REG \
1198 && GET_CODE (XEXP (X, 1)) == CONST_INT) \
1203 /* Compute the cost of computing a constant rtl expression RTX
1204 whose rtx-code is CODE. The body of this macro is a portion
1205 of a switch statement. If the code is computed here,
1206 return it with a return statement. Otherwise, break from the switch. */
1208 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1213 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 0; \
1214 case CONST_DOUBLE: \
1217 if (GET_MODE (RTX) == VOIDmode) \
1219 code = standard_80387_constant_p (RTX); \
1220 return code == 1 ? 0 : \
1225 /* Compute the cost of an address. This is meant to approximate the size
1226 and/or execution delay of an insn using that address. If the cost is
1227 approximated by the RTL complexity, including CONST_COSTS above, as
1228 is usually the case for CISC machines, this macro should not be defined.
1229 For aggressively RISCy machines, only one insn format is allowed, so
1230 this macro should be a constant. The value of this macro only matters
1231 for valid addresses.
1233 For i386, it is better to use a complex address than let gcc copy
1234 the address into a reg and make a new pseudo. But not if the address
1235 requires to two regs - that would mean more pseudos with longer
1238 #define ADDRESS_COST(RTX) \
1239 ((CONSTANT_P (RTX) \
1240 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
1241 && REG_P (XEXP (RTX, 0)))) ? 0 \
1245 /* Add any extra modes needed to represent the condition code.
1247 For the i386, we need separate modes when floating-point equality
1248 comparisons are being done. */
1250 #define EXTRA_CC_MODES CCFPEQmode
1252 /* Define the names for the modes specified above. */
1253 #define EXTRA_CC_NAMES "CCFPEQ"
1255 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1256 return the mode to be used for the comparison.
1258 For floating-point equality comparisons, CCFPEQmode should be used.
1259 VOIDmode should be used in all other cases. */
1261 #define SELECT_CC_MODE(OP,X,Y) \
1262 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1263 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
1265 /* Define the information needed to generate branch and scc insns. This is
1266 stored from the compare operation. Note that we can't use "rtx" here
1267 since it hasn't been defined! */
1269 extern struct rtx_def
*i386_compare_op0
, *i386_compare_op1
;
1270 extern struct rtx_def
*(*i386_compare_gen
)(), *(*i386_compare_gen_eq
)();
1272 /* Tell final.c how to eliminate redundant test instructions. */
1274 /* Here we define machine-dependent flags and fields in cc_status
1275 (see `conditions.h'). */
1277 /* Set if the cc value is actually in the 80387, so a floating point
1278 conditional branch must be output. */
1279 #define CC_IN_80387 04000
1281 /* Set if the CC value was stored in a nonstandard way, so that
1282 the state of equality is indicated by zero in the carry bit. */
1283 #define CC_Z_IN_NOT_C 010000
1285 /* Store in cc_status the expressions
1286 that the condition codes will describe
1287 after execution of an instruction whose pattern is EXP.
1288 Do not alter them if the instruction would not alter the cc's. */
1290 #define NOTICE_UPDATE_CC(EXP, INSN) \
1291 notice_update_cc((EXP))
1293 /* Output a signed jump insn. Use template NORMAL ordinarily, or
1294 FLOAT following a floating point comparison.
1295 Use NO_OV following an arithmetic insn that set the cc's
1296 before a test insn that was deleted.
1297 NO_OV may be zero, meaning final should reinsert the test insn
1298 because the jump cannot be handled properly without it. */
1300 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1302 if (cc_prev_status.flags & CC_IN_80387) \
1304 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1309 /* Control the assembler format that we output, to the extent
1310 this does not vary between assemblers. */
1312 /* How to refer to registers in assembler output.
1313 This sequence is indexed by compiler's hard-register-number (see above). */
1315 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
1316 For non floating point regs, the following are the HImode names.
1318 For float regs, the stack top is sometimes referred to as "%st(0)"
1319 instead of just "%st". PRINT_REG handles this with the "y" code. */
1321 #define HI_REGISTER_NAMES \
1322 {"ax","dx","cx","bx","si","di","bp","sp", \
1323 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
1325 #define REGISTER_NAMES HI_REGISTER_NAMES
1327 /* Table of additional register names to use in user input. */
1329 #define ADDITIONAL_REGISTER_NAMES \
1330 { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
1331 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
1332 "al", 0, "dl", 1, "cl", 2, "bl", 3, \
1333 "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
1335 /* Note we are omitting these since currently I don't know how
1336 to get gcc to use these, since they want the same but different
1337 number as al, and ax.
1340 /* note the last four are not really qi_registers, but
1341 the md will have to never output movb into one of them
1342 only a movw . There is no movb into the last four regs */
1344 #define QI_REGISTER_NAMES \
1345 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
1347 /* These parallel the array above, and can be used to access bits 8:15
1348 of regs 0 through 3. */
1350 #define QI_HIGH_REGISTER_NAMES \
1351 {"ah", "dh", "ch", "bh", }
1353 /* How to renumber registers for dbx and gdb. */
1355 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
1356 #define DBX_REGISTER_NUMBER(n) \
1367 /* This is how to output the definition of a user-level label named NAME,
1368 such as the label on a static function or variable NAME. */
1370 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1371 (assemble_name (FILE, NAME), fputs (":\n", FILE))
1373 /* This is how to output an assembler line defining a `double' constant. */
1375 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1376 fprintf (FILE, "%s %.22e\n", ASM_DOUBLE, (VALUE))
1379 /* This is how to output an assembler line defining a `float' constant. */
1381 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1382 do { union { float f; long l;} tem; \
1384 fprintf((FILE), "%s 0x%x\n", ASM_LONG, tem.l); \
1388 /* Store in OUTPUT a string (made with alloca) containing
1389 an assembler-name for a local static variable named NAME.
1390 LABELNO is an integer which is different for each call. */
1392 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1393 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1394 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1398 /* This is how to output an assembler line defining an `int' constant. */
1400 #define ASM_OUTPUT_INT(FILE,VALUE) \
1401 ( fprintf (FILE, "%s ", ASM_LONG), \
1402 output_addr_const (FILE,(VALUE)), \
1405 /* Likewise for `char' and `short' constants. */
1406 /* is this supposed to do align too?? */
1408 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1409 ( fprintf (FILE, "%s ", ASM_SHORT), \
1410 output_addr_const (FILE,(VALUE)), \
1414 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1415 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1416 output_addr_const (FILE,(VALUE)), \
1417 fputs (",", FILE), \
1418 output_addr_const (FILE,(VALUE)), \
1419 fputs (" >> 8\n",FILE))
1423 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1424 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1425 output_addr_const (FILE, (VALUE)), \
1428 /* This is how to output an assembler line for a numeric constant byte. */
1430 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1431 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
1433 /* This is how to output an insn to push a register on the stack.
1434 It need not be very fast code. */
1436 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1437 fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
1439 /* This is how to output an insn to pop a register from the stack.
1440 It need not be very fast code. */
1442 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1443 fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
1445 /* This is how to output an element of a case-vector that is absolute.
1448 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1449 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
1451 /* This is how to output an element of a case-vector that is relative.
1452 We don't use these on the 386 yet, because the ATT assembler can't do
1453 forward reference the differences.
1456 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1457 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
1459 /* Define the parentheses used to group arithmetic operations
1460 in assembler code. */
1462 #define ASM_OPEN_PAREN ""
1463 #define ASM_CLOSE_PAREN ""
1465 /* Define results of standard character escape sequences. */
1466 #define TARGET_BELL 007
1467 #define TARGET_BS 010
1468 #define TARGET_TAB 011
1469 #define TARGET_NEWLINE 012
1470 #define TARGET_VT 013
1471 #define TARGET_FF 014
1472 #define TARGET_CR 015
1474 /* Print operand X (an rtx) in assembler syntax to file FILE.
1475 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1476 The CODE z takes the size of operand from the following digit, and
1477 outputs b,w,or l respectively.
1479 On the 80386, we use several such letters:
1480 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
1481 L,W,B,Q,S -- print the opcode suffix for specified size of operand.
1482 R -- print the prefix for register names.
1483 z -- print the opcode suffix for the size of the current operand.
1484 * -- print a star (in certain assembler syntax)
1485 w -- print the operand as if it's a "word" (HImode) even if it isn't.
1486 b -- print the operand as if it's a byte (QImode) even if it isn't.
1487 c -- don't print special prefixes before constant operands. */
1489 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1492 /* Print the name of a register based on its machine mode and number.
1493 If CODE is 'w', pretend the mode is HImode.
1494 If CODE is 'b', pretend the mode is QImode.
1495 If CODE is 'k', pretend the mode is SImode.
1496 If CODE is 'h', pretend the reg is the `high' byte register.
1497 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
1499 extern char *hi_reg_name
[];
1500 extern char *qi_reg_name
[];
1501 extern char *qi_high_reg_name
[];
1503 #define PRINT_REG(X, CODE, FILE) \
1504 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
1506 fprintf (FILE, "%s", RP); \
1507 switch ((CODE == 'w' ? 2 \
1512 : GET_MODE_SIZE (GET_MODE (X)))) \
1515 if (STACK_TOP_P (X)) \
1517 fputs ("st(0)", FILE); \
1522 if (! FP_REG_P (X)) fputs ("e", FILE); \
1524 fputs (hi_reg_name[REGNO (X)], FILE); \
1527 fputs (qi_reg_name[REGNO (X)], FILE); \
1530 fputs (qi_high_reg_name[REGNO (X)], FILE); \
1535 #define PRINT_OPERAND(FILE, X, CODE) \
1536 print_operand (FILE, X, CODE)
1538 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1539 print_operand_address (FILE, ADDR)
1541 /* Print the name of a register for based on its machine mode and number.
1542 This macro is used to print debugging output.
1543 This macro is different from PRINT_REG in that it may be used in
1544 programs that are not linked with aux-output.o. */
1546 #define DEBUG_PRINT_REG(X, CODE, FILE) \
1547 do { static char *hi_name[] = HI_REGISTER_NAMES; \
1548 static char *qi_name[] = QI_REGISTER_NAMES; \
1549 fprintf (FILE, "%d %s", REGNO (X), RP); \
1550 if (REGNO (X) == ARG_POINTER_REGNUM) \
1551 { fputs ("argp", FILE); break; } \
1552 if (STACK_TOP_P (X)) \
1553 { fputs ("st(0)", FILE); break; } \
1554 switch (GET_MODE_SIZE (GET_MODE (X))) \
1558 if (! FP_REG_P (X)) fputs ("e", FILE); \
1560 fputs (hi_name[REGNO (X)], FILE); \
1563 fputs (qi_name[REGNO (X)], FILE); \
1568 /* Output the prefix for an immediate operand, or for an offset operand. */
1569 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
1570 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
1572 /* Routines in libgcc that return floats must return them in an fp reg,
1573 just as other functions do which return such values.
1574 These macros make that happen. */
1576 #define FLOAT_VALUE_TYPE float
1577 #define INTIFY(FLOATVAL) FLOATVAL
1579 /* Nonzero if INSN magically clobbers register REGNO. */
1581 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
1582 (FP_REGNO_P (REGNO) \
1583 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
1586 /* a letter which is not needed by the normal asm syntax, which
1587 we can use for operand syntax in the extended asm */
1589 #define ASM_OPERAND_LETTER '#'
1591 #define RET return ""
1592 #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
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